java -Xss4m -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -s ../../../trunk/examples/settings/default/taipan/svcomp-Reach-64bit-Taipan_Default.epf -i ../../../trunk/examples/svcomp/loop-acceleration/array_false-unreach-call1_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-71425fa [2018-07-20 21:16:49,866 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-07-20 21:16:49,872 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-07-20 21:16:49,885 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-07-20 21:16:49,885 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-07-20 21:16:49,886 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-07-20 21:16:49,888 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-07-20 21:16:49,893 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-07-20 21:16:49,895 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-07-20 21:16:49,896 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-07-20 21:16:49,897 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-07-20 21:16:49,898 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-07-20 21:16:49,898 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-07-20 21:16:49,905 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-07-20 21:16:49,906 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-07-20 21:16:49,907 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-07-20 21:16:49,908 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-07-20 21:16:49,911 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-07-20 21:16:49,914 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-07-20 21:16:49,916 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-07-20 21:16:49,917 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-07-20 21:16:49,918 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-07-20 21:16:49,920 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-07-20 21:16:49,929 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/taipan/svcomp-Reach-64bit-Taipan_Default.epf [2018-07-20 21:16:49,957 INFO L110 SettingsManager]: Loading preferences was successful [2018-07-20 21:16:49,957 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-07-20 21:16:49,958 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-07-20 21:16:49,959 INFO L133 SettingsManager]: * User list type=DISABLED [2018-07-20 21:16:49,959 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-07-20 21:16:49,959 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-07-20 21:16:49,959 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-07-20 21:16:49,959 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-07-20 21:16:49,960 INFO L133 SettingsManager]: * Log string format=TERM [2018-07-20 21:16:49,960 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-07-20 21:16:49,960 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-07-20 21:16:49,960 INFO L133 SettingsManager]: * Interval Domain=false [2018-07-20 21:16:49,962 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-07-20 21:16:49,962 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-07-20 21:16:49,962 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-07-20 21:16:49,963 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-07-20 21:16:49,963 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-07-20 21:16:49,963 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-07-20 21:16:49,963 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-07-20 21:16:49,963 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-07-20 21:16:49,964 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-07-20 21:16:49,964 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-07-20 21:16:49,964 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-07-20 21:16:49,964 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-07-20 21:16:49,964 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-20 21:16:49,965 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-07-20 21:16:49,965 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-07-20 21:16:49,965 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-07-20 21:16:49,965 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-07-20 21:16:49,965 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-07-20 21:16:49,965 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-07-20 21:16:49,967 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-07-20 21:16:49,968 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-07-20 21:16:49,968 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-07-20 21:16:49,968 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-07-20 21:16:50,018 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-07-20 21:16:50,034 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-07-20 21:16:50,040 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-07-20 21:16:50,041 INFO L271 PluginConnector]: Initializing CDTParser... [2018-07-20 21:16:50,042 INFO L276 PluginConnector]: CDTParser initialized [2018-07-20 21:16:50,042 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/array_false-unreach-call1_true-termination.i [2018-07-20 21:16:50,395 INFO L220 CDTParser]: Created temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/dbe78996c/b511fe258f314507a06652137f6f9885/FLAG909b78cd0 [2018-07-20 21:16:50,605 INFO L276 CDTParser]: Found 1 translation units. [2018-07-20 21:16:50,607 INFO L158 CDTParser]: Scanning /storage/ultimate/trunk/examples/svcomp/loop-acceleration/array_false-unreach-call1_true-termination.i [2018-07-20 21:16:50,615 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/dbe78996c/b511fe258f314507a06652137f6f9885/FLAG909b78cd0 [2018-07-20 21:16:50,641 INFO L332 CDTParser]: Successfully deleted /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/dbe78996c/b511fe258f314507a06652137f6f9885 [2018-07-20 21:16:50,655 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-07-20 21:16:50,663 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-07-20 21:16:50,665 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-07-20 21:16:50,665 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-07-20 21:16:50,674 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-07-20 21:16:50,675 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:50,679 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2c137c76 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50, skipping insertion in model container [2018-07-20 21:16:50,679 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:50,892 INFO L179 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-07-20 21:16:50,939 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-20 21:16:50,959 INFO L422 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-07-20 21:16:50,964 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-20 21:16:50,981 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50 WrapperNode [2018-07-20 21:16:50,981 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-07-20 21:16:50,983 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-07-20 21:16:50,983 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-07-20 21:16:50,983 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-07-20 21:16:50,994 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:51,002 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:51,009 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-07-20 21:16:51,010 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-07-20 21:16:51,010 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-07-20 21:16:51,010 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-07-20 21:16:51,021 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:51,021 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:51,022 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:51,022 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:51,024 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:51,031 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:51,034 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (1/1) ... [2018-07-20 21:16:51,036 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-07-20 21:16:51,037 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-07-20 21:16:51,039 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-07-20 21:16:51,039 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-07-20 21:16:51,040 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-20 21:16:51,113 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-07-20 21:16:51,113 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-07-20 21:16:51,113 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-07-20 21:16:51,113 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-07-20 21:16:51,114 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assert [2018-07-20 21:16:51,114 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assert [2018-07-20 21:16:51,114 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-07-20 21:16:51,114 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-07-20 21:16:51,475 INFO L261 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-07-20 21:16:51,475 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.07 09:16:51 BoogieIcfgContainer [2018-07-20 21:16:51,476 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-07-20 21:16:51,477 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-07-20 21:16:51,477 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-07-20 21:16:51,481 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-07-20 21:16:51,481 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.07 09:16:50" (1/3) ... [2018-07-20 21:16:51,482 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5007c508 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.07 09:16:51, skipping insertion in model container [2018-07-20 21:16:51,482 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 09:16:50" (2/3) ... [2018-07-20 21:16:51,483 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5007c508 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.07 09:16:51, skipping insertion in model container [2018-07-20 21:16:51,483 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.07 09:16:51" (3/3) ... [2018-07-20 21:16:51,485 INFO L112 eAbstractionObserver]: Analyzing ICFG array_false-unreach-call1_true-termination.i [2018-07-20 21:16:51,495 INFO L132 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-07-20 21:16:51,504 INFO L144 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-07-20 21:16:51,554 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-07-20 21:16:51,555 INFO L373 AbstractCegarLoop]: Interprodecural is true [2018-07-20 21:16:51,555 INFO L374 AbstractCegarLoop]: Hoare is true [2018-07-20 21:16:51,555 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-07-20 21:16:51,556 INFO L376 AbstractCegarLoop]: Backedges is TWOTRACK [2018-07-20 21:16:51,556 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-07-20 21:16:51,556 INFO L378 AbstractCegarLoop]: Difference is false [2018-07-20 21:16:51,556 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-07-20 21:16:51,556 INFO L384 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-07-20 21:16:51,576 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states. [2018-07-20 21:16:51,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-07-20 21:16:51,590 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:51,591 INFO L358 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:51,591 INFO L414 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:51,599 INFO L82 PathProgramCache]: Analyzing trace with hash -1545523535, now seen corresponding path program 1 times [2018-07-20 21:16:51,602 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:51,653 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:51,654 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:16:51,654 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:51,654 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:51,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:51,726 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:51,729 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-20 21:16:51,729 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-07-20 21:16:51,729 INFO L254 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-20 21:16:51,733 INFO L450 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-07-20 21:16:51,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-07-20 21:16:51,749 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-20 21:16:51,752 INFO L87 Difference]: Start difference. First operand 19 states. Second operand 2 states. [2018-07-20 21:16:51,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:51,778 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2018-07-20 21:16:51,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-07-20 21:16:51,780 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-07-20 21:16:51,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:51,791 INFO L225 Difference]: With dead ends: 30 [2018-07-20 21:16:51,792 INFO L226 Difference]: Without dead ends: 13 [2018-07-20 21:16:51,795 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-20 21:16:51,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-07-20 21:16:51,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-07-20 21:16:51,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-07-20 21:16:51,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2018-07-20 21:16:51,835 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 10 [2018-07-20 21:16:51,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:51,836 INFO L471 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2018-07-20 21:16:51,837 INFO L472 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-07-20 21:16:51,837 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-07-20 21:16:51,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-07-20 21:16:51,838 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:51,838 INFO L358 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:51,839 INFO L414 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:51,839 INFO L82 PathProgramCache]: Analyzing trace with hash -936230606, now seen corresponding path program 1 times [2018-07-20 21:16:51,839 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:51,841 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:51,842 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:16:51,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:51,842 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:51,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:51,918 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:51,919 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-20 21:16:51,919 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-20 21:16:51,919 INFO L254 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-20 21:16:51,930 INFO L450 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-07-20 21:16:51,930 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-07-20 21:16:51,931 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-20 21:16:51,932 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand 3 states. [2018-07-20 21:16:52,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:52,012 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-07-20 21:16:52,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-07-20 21:16:52,013 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-07-20 21:16:52,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:52,015 INFO L225 Difference]: With dead ends: 21 [2018-07-20 21:16:52,015 INFO L226 Difference]: Without dead ends: 16 [2018-07-20 21:16:52,016 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-20 21:16:52,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-07-20 21:16:52,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 15. [2018-07-20 21:16:52,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-07-20 21:16:52,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2018-07-20 21:16:52,021 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 11 [2018-07-20 21:16:52,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:52,021 INFO L471 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2018-07-20 21:16:52,021 INFO L472 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-07-20 21:16:52,021 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2018-07-20 21:16:52,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-07-20 21:16:52,022 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:52,022 INFO L358 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:52,022 INFO L414 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:52,023 INFO L82 PathProgramCache]: Analyzing trace with hash -378713459, now seen corresponding path program 1 times [2018-07-20 21:16:52,023 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:52,024 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:52,024 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:16:52,024 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:52,025 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:52,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:52,116 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:52,116 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:52,117 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:52,118 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 15 with the following transitions: [2018-07-20 21:16:52,119 INFO L201 CegarAbsIntRunner]: [0], [4], [7], [9], [15], [19], [22], [24], [26], [32], [33], [34], [36] [2018-07-20 21:16:52,168 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-07-20 21:16:52,168 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-07-20 21:16:52,401 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-07-20 21:16:52,402 INFO L272 AbstractInterpreter]: Visited 13 different actions 44 times. Merged at 3 different actions 23 times. Widened at 1 different actions 4 times. Found 1 fixpoints after 1 different actions. Largest state had 3 variables. [2018-07-20 21:16:52,410 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-07-20 21:16:52,411 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:52,411 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:52,426 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:16:52,426 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:16:52,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:52,455 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:52,477 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:52,477 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:52,584 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:52,612 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:52,613 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:52,629 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:16:52,629 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:16:52,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:52,650 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:52,655 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:52,655 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:52,668 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:52,670 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:52,670 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-07-20 21:16:52,671 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:52,671 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-20 21:16:52,671 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-20 21:16:52,672 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-07-20 21:16:52,672 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand 4 states. [2018-07-20 21:16:52,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:52,725 INFO L93 Difference]: Finished difference Result 24 states and 24 transitions. [2018-07-20 21:16:52,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-20 21:16:52,726 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-07-20 21:16:52,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:52,727 INFO L225 Difference]: With dead ends: 24 [2018-07-20 21:16:52,727 INFO L226 Difference]: Without dead ends: 19 [2018-07-20 21:16:52,728 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-07-20 21:16:52,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-07-20 21:16:52,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 18. [2018-07-20 21:16:52,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-07-20 21:16:52,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2018-07-20 21:16:52,735 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 14 [2018-07-20 21:16:52,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:52,738 INFO L471 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2018-07-20 21:16:52,738 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-20 21:16:52,738 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-07-20 21:16:52,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-07-20 21:16:52,739 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:52,739 INFO L358 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:52,739 INFO L414 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:52,739 INFO L82 PathProgramCache]: Analyzing trace with hash -23920814, now seen corresponding path program 2 times [2018-07-20 21:16:52,740 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:52,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:52,741 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:16:52,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:52,742 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:52,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:52,822 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:52,823 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:52,823 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:52,823 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:52,823 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:52,824 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:52,824 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:52,832 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:16:52,832 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:16:52,850 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:16:52,850 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:52,852 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:52,859 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:52,860 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:53,160 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:53,187 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:53,187 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:53,203 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:16:53,203 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:16:53,219 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:16:53,219 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:53,222 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:53,231 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:53,231 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:53,290 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:53,292 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:53,293 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-07-20 21:16:53,293 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:53,293 INFO L450 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-07-20 21:16:53,294 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-07-20 21:16:53,294 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-07-20 21:16:53,294 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand 5 states. [2018-07-20 21:16:53,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:53,328 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-07-20 21:16:53,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-07-20 21:16:53,329 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-07-20 21:16:53,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:53,330 INFO L225 Difference]: With dead ends: 27 [2018-07-20 21:16:53,330 INFO L226 Difference]: Without dead ends: 22 [2018-07-20 21:16:53,330 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-07-20 21:16:53,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-07-20 21:16:53,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2018-07-20 21:16:53,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-07-20 21:16:53,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-07-20 21:16:53,335 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 17 [2018-07-20 21:16:53,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:53,336 INFO L471 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-07-20 21:16:53,336 INFO L472 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-07-20 21:16:53,336 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-07-20 21:16:53,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-07-20 21:16:53,337 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:53,337 INFO L358 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:53,337 INFO L414 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:53,338 INFO L82 PathProgramCache]: Analyzing trace with hash -310749075, now seen corresponding path program 3 times [2018-07-20 21:16:53,338 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:53,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:53,339 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:16:53,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:53,339 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:53,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:53,427 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:53,428 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:53,428 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:53,428 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:53,428 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:53,429 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:53,429 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:53,444 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:16:53,445 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:16:53,455 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-07-20 21:16:53,455 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:53,457 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:53,467 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:53,467 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:53,633 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:53,667 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:53,667 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:53,696 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:16:53,696 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:16:53,718 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-07-20 21:16:53,719 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:53,722 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:53,728 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:53,728 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:53,741 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:53,743 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:53,743 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 10 [2018-07-20 21:16:53,744 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:53,744 INFO L450 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-07-20 21:16:53,744 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-07-20 21:16:53,745 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-07-20 21:16:53,745 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 6 states. [2018-07-20 21:16:53,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:53,810 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-07-20 21:16:53,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-07-20 21:16:53,811 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-07-20 21:16:53,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:53,812 INFO L225 Difference]: With dead ends: 30 [2018-07-20 21:16:53,812 INFO L226 Difference]: Without dead ends: 25 [2018-07-20 21:16:53,812 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 76 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-07-20 21:16:53,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-07-20 21:16:53,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2018-07-20 21:16:53,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-07-20 21:16:53,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-07-20 21:16:53,817 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 20 [2018-07-20 21:16:53,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:53,817 INFO L471 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-07-20 21:16:53,817 INFO L472 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-07-20 21:16:53,817 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-07-20 21:16:53,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-07-20 21:16:53,818 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:53,818 INFO L358 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:53,819 INFO L414 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:53,819 INFO L82 PathProgramCache]: Analyzing trace with hash 1773446514, now seen corresponding path program 4 times [2018-07-20 21:16:53,819 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:53,819 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:53,820 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:16:53,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:53,820 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:53,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:53,891 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:53,891 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:53,891 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:53,892 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:53,892 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:53,892 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:53,892 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:53,899 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:16:53,899 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:16:53,908 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:16:53,908 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:53,909 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:53,916 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:53,917 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:54,471 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:54,491 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:54,492 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:54,508 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:16:54,508 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:16:54,526 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:16:54,527 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:54,530 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:54,536 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:54,537 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:54,552 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:54,558 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:54,559 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 12 [2018-07-20 21:16:54,559 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:54,559 INFO L450 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-07-20 21:16:54,559 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-07-20 21:16:54,560 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-07-20 21:16:54,560 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 7 states. [2018-07-20 21:16:54,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:54,638 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-07-20 21:16:54,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-07-20 21:16:54,639 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-07-20 21:16:54,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:54,639 INFO L225 Difference]: With dead ends: 33 [2018-07-20 21:16:54,639 INFO L226 Difference]: Without dead ends: 28 [2018-07-20 21:16:54,640 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-07-20 21:16:54,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-07-20 21:16:54,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 27. [2018-07-20 21:16:54,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-07-20 21:16:54,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-07-20 21:16:54,645 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 23 [2018-07-20 21:16:54,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:54,645 INFO L471 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-07-20 21:16:54,645 INFO L472 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-07-20 21:16:54,645 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-07-20 21:16:54,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-07-20 21:16:54,646 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:54,646 INFO L358 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:54,646 INFO L414 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:54,647 INFO L82 PathProgramCache]: Analyzing trace with hash -297959859, now seen corresponding path program 5 times [2018-07-20 21:16:54,647 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:54,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:54,650 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:16:54,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:54,650 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:54,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:54,725 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:54,725 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:54,725 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:54,726 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:54,726 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:54,726 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:54,726 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-07-20 21:16:54,741 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:16:54,741 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:54,764 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-20 21:16:54,764 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:54,766 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:54,773 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:54,774 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:54,883 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:54,903 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:54,903 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:54,918 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:16:54,918 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:16:54,962 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-20 21:16:54,962 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:54,966 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:54,975 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:54,975 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:54,988 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:54,989 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:54,990 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-07-20 21:16:54,990 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:54,990 INFO L450 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-07-20 21:16:54,991 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-07-20 21:16:54,991 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-07-20 21:16:54,991 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 8 states. [2018-07-20 21:16:55,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:55,042 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-07-20 21:16:55,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-07-20 21:16:55,043 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-07-20 21:16:55,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:55,044 INFO L225 Difference]: With dead ends: 36 [2018-07-20 21:16:55,045 INFO L226 Difference]: Without dead ends: 31 [2018-07-20 21:16:55,045 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-07-20 21:16:55,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-07-20 21:16:55,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2018-07-20 21:16:55,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-07-20 21:16:55,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-07-20 21:16:55,050 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 26 [2018-07-20 21:16:55,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:55,050 INFO L471 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-07-20 21:16:55,050 INFO L472 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-07-20 21:16:55,050 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-07-20 21:16:55,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-07-20 21:16:55,051 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:55,051 INFO L358 BasicCegarLoop]: trace histogram [7, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:55,051 INFO L414 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:55,052 INFO L82 PathProgramCache]: Analyzing trace with hash 524891026, now seen corresponding path program 6 times [2018-07-20 21:16:55,052 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:55,052 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:55,053 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:16:55,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:55,053 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:55,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:55,161 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:55,161 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:55,161 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:55,162 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:55,162 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:55,162 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:55,162 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:55,171 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:16:55,171 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:16:55,184 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-07-20 21:16:55,184 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:55,186 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:55,193 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:55,193 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:55,394 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:55,414 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:55,414 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:55,429 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:16:55,429 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:16:55,472 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-07-20 21:16:55,472 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:55,476 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:55,483 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:55,483 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:55,559 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:55,564 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:55,564 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 16 [2018-07-20 21:16:55,564 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:55,564 INFO L450 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-07-20 21:16:55,565 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-07-20 21:16:55,565 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-07-20 21:16:55,565 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 9 states. [2018-07-20 21:16:55,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:55,721 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-07-20 21:16:55,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-07-20 21:16:55,725 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-07-20 21:16:55,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:55,726 INFO L225 Difference]: With dead ends: 39 [2018-07-20 21:16:55,726 INFO L226 Difference]: Without dead ends: 34 [2018-07-20 21:16:55,727 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-07-20 21:16:55,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-07-20 21:16:55,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 33. [2018-07-20 21:16:55,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-07-20 21:16:55,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-07-20 21:16:55,732 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 29 [2018-07-20 21:16:55,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:55,732 INFO L471 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-07-20 21:16:55,732 INFO L472 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-07-20 21:16:55,733 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-07-20 21:16:55,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-07-20 21:16:55,734 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:55,734 INFO L358 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:55,734 INFO L414 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:55,735 INFO L82 PathProgramCache]: Analyzing trace with hash -1597719507, now seen corresponding path program 7 times [2018-07-20 21:16:55,735 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:55,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:55,736 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:16:55,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:55,736 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:55,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:55,823 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:55,823 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:55,824 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:55,824 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:55,824 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:55,824 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:55,824 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:55,830 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:16:55,830 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:16:55,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:55,840 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:55,848 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:55,848 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:55,997 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:56,018 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:56,018 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:56,040 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:16:56,040 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:16:56,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:56,060 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:56,068 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:56,069 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:56,092 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:56,094 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:56,094 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 18 [2018-07-20 21:16:56,094 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:56,094 INFO L450 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-07-20 21:16:56,095 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-07-20 21:16:56,095 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-07-20 21:16:56,095 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 10 states. [2018-07-20 21:16:56,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:56,148 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-07-20 21:16:56,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-07-20 21:16:56,151 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 32 [2018-07-20 21:16:56,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:56,152 INFO L225 Difference]: With dead ends: 42 [2018-07-20 21:16:56,152 INFO L226 Difference]: Without dead ends: 37 [2018-07-20 21:16:56,153 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-07-20 21:16:56,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-07-20 21:16:56,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 36. [2018-07-20 21:16:56,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-07-20 21:16:56,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-07-20 21:16:56,160 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 32 [2018-07-20 21:16:56,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:56,160 INFO L471 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-07-20 21:16:56,160 INFO L472 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-07-20 21:16:56,160 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-07-20 21:16:56,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-07-20 21:16:56,161 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:56,162 INFO L358 BasicCegarLoop]: trace histogram [9, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:56,162 INFO L414 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:56,162 INFO L82 PathProgramCache]: Analyzing trace with hash -1484609102, now seen corresponding path program 8 times [2018-07-20 21:16:56,162 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:56,163 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:56,163 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:16:56,163 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:56,163 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:56,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:56,353 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:56,353 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:56,353 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:56,354 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:56,354 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:56,354 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:56,354 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:56,360 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:16:56,360 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:16:56,371 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:16:56,371 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:56,374 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:56,387 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:56,387 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:56,564 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:56,584 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:56,585 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:56,599 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:16:56,599 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:16:56,617 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:16:56,617 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:56,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:56,629 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:56,629 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:56,686 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:56,688 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:56,688 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-07-20 21:16:56,689 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:56,689 INFO L450 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-07-20 21:16:56,689 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-07-20 21:16:56,690 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-07-20 21:16:56,690 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 11 states. [2018-07-20 21:16:56,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:56,840 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-07-20 21:16:56,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-07-20 21:16:56,843 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-07-20 21:16:56,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:56,844 INFO L225 Difference]: With dead ends: 45 [2018-07-20 21:16:56,844 INFO L226 Difference]: Without dead ends: 40 [2018-07-20 21:16:56,845 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-07-20 21:16:56,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-07-20 21:16:56,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2018-07-20 21:16:56,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-07-20 21:16:56,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-07-20 21:16:56,852 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 35 [2018-07-20 21:16:56,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:56,852 INFO L471 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-07-20 21:16:56,852 INFO L472 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-07-20 21:16:56,852 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-07-20 21:16:56,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-07-20 21:16:56,853 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:56,854 INFO L358 BasicCegarLoop]: trace histogram [10, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:56,854 INFO L414 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:56,854 INFO L82 PathProgramCache]: Analyzing trace with hash 933106189, now seen corresponding path program 9 times [2018-07-20 21:16:56,854 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:56,855 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:56,855 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:16:56,855 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:56,855 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:56,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:56,947 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:56,948 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:56,948 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:56,948 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:56,948 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:56,948 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:56,948 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:56,954 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:16:56,954 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:16:56,977 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-07-20 21:16:56,977 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:56,979 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:56,986 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:56,986 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:57,132 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:57,157 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:57,157 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:57,172 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:16:57,172 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:16:57,258 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-07-20 21:16:57,259 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:57,262 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:57,273 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:57,273 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:57,345 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:57,347 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:57,347 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 22 [2018-07-20 21:16:57,347 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:57,347 INFO L450 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-07-20 21:16:57,348 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-07-20 21:16:57,348 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-07-20 21:16:57,348 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 12 states. [2018-07-20 21:16:57,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:57,382 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-07-20 21:16:57,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-07-20 21:16:57,383 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-07-20 21:16:57,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:57,383 INFO L225 Difference]: With dead ends: 48 [2018-07-20 21:16:57,384 INFO L226 Difference]: Without dead ends: 43 [2018-07-20 21:16:57,384 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-07-20 21:16:57,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-07-20 21:16:57,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 42. [2018-07-20 21:16:57,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-07-20 21:16:57,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-07-20 21:16:57,390 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 38 [2018-07-20 21:16:57,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:57,391 INFO L471 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-07-20 21:16:57,391 INFO L472 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-07-20 21:16:57,391 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-07-20 21:16:57,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-07-20 21:16:57,392 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:57,392 INFO L358 BasicCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:57,392 INFO L414 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:57,393 INFO L82 PathProgramCache]: Analyzing trace with hash 487786450, now seen corresponding path program 10 times [2018-07-20 21:16:57,393 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:57,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:57,394 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:16:57,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:57,394 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:57,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:57,537 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:57,537 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:57,537 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:57,537 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:57,537 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:57,537 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:57,538 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:57,544 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:16:57,544 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:16:57,581 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:16:57,581 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:57,584 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:57,594 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:57,594 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:58,201 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:58,221 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:58,221 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:58,237 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:16:58,237 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:16:58,266 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:16:58,266 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:58,271 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:58,279 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:58,279 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:58,334 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:58,337 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:58,337 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 24 [2018-07-20 21:16:58,337 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:58,337 INFO L450 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-07-20 21:16:58,338 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-07-20 21:16:58,338 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-07-20 21:16:58,338 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 13 states. [2018-07-20 21:16:58,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:58,641 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-07-20 21:16:58,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-07-20 21:16:58,641 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 41 [2018-07-20 21:16:58,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:58,642 INFO L225 Difference]: With dead ends: 51 [2018-07-20 21:16:58,642 INFO L226 Difference]: Without dead ends: 46 [2018-07-20 21:16:58,643 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 153 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-07-20 21:16:58,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-07-20 21:16:58,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 45. [2018-07-20 21:16:58,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-07-20 21:16:58,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-07-20 21:16:58,648 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 41 [2018-07-20 21:16:58,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:58,648 INFO L471 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-07-20 21:16:58,648 INFO L472 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-07-20 21:16:58,648 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-07-20 21:16:58,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-07-20 21:16:58,649 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:58,649 INFO L358 BasicCegarLoop]: trace histogram [12, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:58,650 INFO L414 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:58,650 INFO L82 PathProgramCache]: Analyzing trace with hash 1121419245, now seen corresponding path program 11 times [2018-07-20 21:16:58,650 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:58,651 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:58,651 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:16:58,651 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:58,651 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:58,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:58,938 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:58,938 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:58,938 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:58,938 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:58,939 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:58,939 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:58,939 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:58,944 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:16:58,944 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:16:58,964 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-07-20 21:16:58,964 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:58,966 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:58,975 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:58,975 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:59,247 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:59,267 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:59,267 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:16:59,282 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:16:59,282 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:16:59,390 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-07-20 21:16:59,390 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:59,393 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:59,400 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:59,400 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:16:59,424 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:59,426 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:16:59,426 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-07-20 21:16:59,426 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:16:59,427 INFO L450 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-07-20 21:16:59,427 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-07-20 21:16:59,428 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-07-20 21:16:59,428 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 14 states. [2018-07-20 21:16:59,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:16:59,509 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-07-20 21:16:59,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-07-20 21:16:59,537 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-07-20 21:16:59,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:16:59,538 INFO L225 Difference]: With dead ends: 54 [2018-07-20 21:16:59,538 INFO L226 Difference]: Without dead ends: 49 [2018-07-20 21:16:59,538 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-07-20 21:16:59,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-07-20 21:16:59,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 48. [2018-07-20 21:16:59,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-07-20 21:16:59,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-07-20 21:16:59,544 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 44 [2018-07-20 21:16:59,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:16:59,544 INFO L471 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-07-20 21:16:59,544 INFO L472 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-07-20 21:16:59,544 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-07-20 21:16:59,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-07-20 21:16:59,547 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:16:59,547 INFO L358 BasicCegarLoop]: trace histogram [13, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:16:59,547 INFO L414 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:16:59,547 INFO L82 PathProgramCache]: Analyzing trace with hash 1294749170, now seen corresponding path program 12 times [2018-07-20 21:16:59,547 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:16:59,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:59,548 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:16:59,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:16:59,549 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:16:59,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:16:59,704 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:59,704 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:59,704 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:16:59,704 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:16:59,704 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:16:59,704 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:16:59,704 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:16:59,710 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:16:59,710 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:16:59,734 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-07-20 21:16:59,734 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:16:59,736 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:16:59,745 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:16:59,746 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:00,107 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:00,130 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:00,130 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:00,145 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:17:00,145 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:17:00,292 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-07-20 21:17:00,292 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:00,296 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:00,305 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:00,305 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:00,367 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:00,369 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:00,370 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-07-20 21:17:00,370 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:00,370 INFO L450 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-07-20 21:17:00,371 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-07-20 21:17:00,371 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-07-20 21:17:00,371 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 15 states. [2018-07-20 21:17:00,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:00,435 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-07-20 21:17:00,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-07-20 21:17:00,436 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2018-07-20 21:17:00,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:00,436 INFO L225 Difference]: With dead ends: 57 [2018-07-20 21:17:00,436 INFO L226 Difference]: Without dead ends: 52 [2018-07-20 21:17:00,437 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 175 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-07-20 21:17:00,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-07-20 21:17:00,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 51. [2018-07-20 21:17:00,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-07-20 21:17:00,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-07-20 21:17:00,442 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 47 [2018-07-20 21:17:00,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:00,443 INFO L471 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-07-20 21:17:00,443 INFO L472 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-07-20 21:17:00,443 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-07-20 21:17:00,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-07-20 21:17:00,444 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:00,444 INFO L358 BasicCegarLoop]: trace histogram [14, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:00,444 INFO L414 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:00,444 INFO L82 PathProgramCache]: Analyzing trace with hash -1879112243, now seen corresponding path program 13 times [2018-07-20 21:17:00,444 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:00,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:00,445 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:00,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:00,446 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:00,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:00,598 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:00,598 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:00,598 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:00,598 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:00,598 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:00,599 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:00,599 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:00,609 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:00,609 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:17:00,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:00,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:00,633 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:00,633 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:00,931 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:00,960 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:00,960 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:00,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:00,975 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:17:01,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:01,004 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:01,013 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:01,013 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:01,026 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:01,027 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:01,028 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-07-20 21:17:01,028 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:01,028 INFO L450 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-07-20 21:17:01,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-07-20 21:17:01,029 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-07-20 21:17:01,029 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 16 states. [2018-07-20 21:17:01,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:01,070 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-07-20 21:17:01,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-07-20 21:17:01,070 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-07-20 21:17:01,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:01,071 INFO L225 Difference]: With dead ends: 60 [2018-07-20 21:17:01,071 INFO L226 Difference]: Without dead ends: 55 [2018-07-20 21:17:01,072 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 186 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-07-20 21:17:01,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-07-20 21:17:01,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 54. [2018-07-20 21:17:01,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-07-20 21:17:01,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-07-20 21:17:01,077 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 50 [2018-07-20 21:17:01,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:01,077 INFO L471 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-07-20 21:17:01,077 INFO L472 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-07-20 21:17:01,078 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-07-20 21:17:01,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-07-20 21:17:01,078 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:01,079 INFO L358 BasicCegarLoop]: trace histogram [15, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:01,079 INFO L414 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:01,079 INFO L82 PathProgramCache]: Analyzing trace with hash -679445486, now seen corresponding path program 14 times [2018-07-20 21:17:01,079 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:01,080 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:01,080 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:01,080 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:01,080 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:01,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:01,337 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:01,337 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:01,337 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:01,337 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:01,338 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:01,338 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:01,338 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:01,347 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:17:01,347 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:01,364 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:17:01,364 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:01,366 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:01,374 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:01,375 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:01,665 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:01,686 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:01,686 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:01,700 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:17:01,700 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:01,731 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:17:01,731 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:01,736 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:01,745 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:01,745 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:01,812 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:01,814 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:01,814 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-07-20 21:17:01,814 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:01,815 INFO L450 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-07-20 21:17:01,815 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-07-20 21:17:01,815 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-07-20 21:17:01,815 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 17 states. [2018-07-20 21:17:01,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:01,915 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-07-20 21:17:01,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-07-20 21:17:01,915 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 53 [2018-07-20 21:17:01,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:01,916 INFO L225 Difference]: With dead ends: 63 [2018-07-20 21:17:01,916 INFO L226 Difference]: Without dead ends: 58 [2018-07-20 21:17:01,917 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 197 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-07-20 21:17:01,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-07-20 21:17:01,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 57. [2018-07-20 21:17:01,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-07-20 21:17:01,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-07-20 21:17:01,922 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 53 [2018-07-20 21:17:01,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:01,923 INFO L471 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-07-20 21:17:01,923 INFO L472 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-07-20 21:17:01,923 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-07-20 21:17:01,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-07-20 21:17:01,924 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:01,924 INFO L358 BasicCegarLoop]: trace histogram [16, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:01,924 INFO L414 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:01,925 INFO L82 PathProgramCache]: Analyzing trace with hash 170042285, now seen corresponding path program 15 times [2018-07-20 21:17:01,925 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:01,925 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:01,926 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:01,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:01,926 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:01,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:02,135 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:02,135 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:02,135 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:02,136 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:02,136 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:02,136 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:02,136 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:02,142 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:17:02,142 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:17:02,167 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-07-20 21:17:02,167 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:02,169 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:02,180 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:02,180 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:02,548 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:02,568 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:02,568 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:02,592 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:17:02,593 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:17:02,893 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-07-20 21:17:02,893 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:02,897 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:02,904 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:02,905 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:02,918 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:02,919 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:02,920 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 34 [2018-07-20 21:17:02,920 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:02,920 INFO L450 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-07-20 21:17:02,920 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-07-20 21:17:02,920 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-07-20 21:17:02,921 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 18 states. [2018-07-20 21:17:02,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:02,963 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-07-20 21:17:02,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-07-20 21:17:02,963 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2018-07-20 21:17:02,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:02,964 INFO L225 Difference]: With dead ends: 66 [2018-07-20 21:17:02,964 INFO L226 Difference]: Without dead ends: 61 [2018-07-20 21:17:02,965 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 208 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-07-20 21:17:02,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-07-20 21:17:02,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 60. [2018-07-20 21:17:02,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-07-20 21:17:02,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 60 transitions. [2018-07-20 21:17:02,974 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 60 transitions. Word has length 56 [2018-07-20 21:17:02,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:02,974 INFO L471 AbstractCegarLoop]: Abstraction has 60 states and 60 transitions. [2018-07-20 21:17:02,974 INFO L472 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-07-20 21:17:02,974 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 60 transitions. [2018-07-20 21:17:02,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-07-20 21:17:02,975 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:02,975 INFO L358 BasicCegarLoop]: trace histogram [17, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:02,976 INFO L414 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:02,978 INFO L82 PathProgramCache]: Analyzing trace with hash 1312920114, now seen corresponding path program 16 times [2018-07-20 21:17:02,979 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:02,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:02,979 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:02,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:02,979 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:02,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:03,575 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:03,575 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:03,575 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:03,575 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:03,575 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:03,575 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:03,575 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:03,581 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:17:03,582 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:17:03,602 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:17:03,603 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:03,604 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:03,611 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:03,612 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:04,250 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:04,270 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:04,270 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:04,285 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:17:04,285 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:17:04,312 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:17:04,312 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:04,316 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:04,324 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:04,324 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:04,334 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:04,336 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:04,336 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 36 [2018-07-20 21:17:04,336 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:04,336 INFO L450 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-07-20 21:17:04,337 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-07-20 21:17:04,337 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-07-20 21:17:04,337 INFO L87 Difference]: Start difference. First operand 60 states and 60 transitions. Second operand 19 states. [2018-07-20 21:17:04,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:04,386 INFO L93 Difference]: Finished difference Result 69 states and 69 transitions. [2018-07-20 21:17:04,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-07-20 21:17:04,387 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2018-07-20 21:17:04,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:04,388 INFO L225 Difference]: With dead ends: 69 [2018-07-20 21:17:04,388 INFO L226 Difference]: Without dead ends: 64 [2018-07-20 21:17:04,389 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 253 GetRequests, 219 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-07-20 21:17:04,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-07-20 21:17:04,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 63. [2018-07-20 21:17:04,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-07-20 21:17:04,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 63 transitions. [2018-07-20 21:17:04,397 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 63 transitions. Word has length 59 [2018-07-20 21:17:04,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:04,404 INFO L471 AbstractCegarLoop]: Abstraction has 63 states and 63 transitions. [2018-07-20 21:17:04,404 INFO L472 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-07-20 21:17:04,404 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 63 transitions. [2018-07-20 21:17:04,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-07-20 21:17:04,405 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:04,406 INFO L358 BasicCegarLoop]: trace histogram [18, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:04,406 INFO L414 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:04,406 INFO L82 PathProgramCache]: Analyzing trace with hash -1714398835, now seen corresponding path program 17 times [2018-07-20 21:17:04,406 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:04,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:04,407 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:04,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:04,407 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:04,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:04,784 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:04,784 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:04,803 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:04,803 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:04,803 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:04,803 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:04,804 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:04,809 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:17:04,809 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:04,850 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-07-20 21:17:04,850 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:04,852 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:04,860 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:04,860 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:05,709 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:05,730 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:05,730 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:05,744 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:17:05,745 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:06,042 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-07-20 21:17:06,043 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:06,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:06,055 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:06,056 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:06,070 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:06,071 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:06,071 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 38 [2018-07-20 21:17:06,072 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:06,072 INFO L450 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-07-20 21:17:06,072 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-07-20 21:17:06,073 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-07-20 21:17:06,073 INFO L87 Difference]: Start difference. First operand 63 states and 63 transitions. Second operand 20 states. [2018-07-20 21:17:06,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:06,134 INFO L93 Difference]: Finished difference Result 72 states and 72 transitions. [2018-07-20 21:17:06,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-07-20 21:17:06,134 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 62 [2018-07-20 21:17:06,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:06,135 INFO L225 Difference]: With dead ends: 72 [2018-07-20 21:17:06,135 INFO L226 Difference]: Without dead ends: 67 [2018-07-20 21:17:06,136 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 230 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-07-20 21:17:06,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-07-20 21:17:06,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 66. [2018-07-20 21:17:06,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-07-20 21:17:06,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 66 transitions. [2018-07-20 21:17:06,139 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 66 transitions. Word has length 62 [2018-07-20 21:17:06,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:06,140 INFO L471 AbstractCegarLoop]: Abstraction has 66 states and 66 transitions. [2018-07-20 21:17:06,140 INFO L472 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-07-20 21:17:06,140 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 66 transitions. [2018-07-20 21:17:06,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-07-20 21:17:06,141 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:06,141 INFO L358 BasicCegarLoop]: trace histogram [19, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:06,141 INFO L414 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:06,141 INFO L82 PathProgramCache]: Analyzing trace with hash 1445040210, now seen corresponding path program 18 times [2018-07-20 21:17:06,141 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:06,142 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:06,142 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:06,142 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:06,142 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:06,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:07,800 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:07,800 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:07,800 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:07,800 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:07,800 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:07,800 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:07,800 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:07,807 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:17:07,807 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:17:07,839 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-07-20 21:17:07,839 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:07,841 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:07,849 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:07,849 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:08,352 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:08,372 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:08,372 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:08,387 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:17:08,387 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:17:08,932 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-07-20 21:17:08,933 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:08,936 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:08,945 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:08,945 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:09,010 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:09,011 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:09,012 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 40 [2018-07-20 21:17:09,012 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:09,012 INFO L450 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-07-20 21:17:09,013 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-07-20 21:17:09,013 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-07-20 21:17:09,013 INFO L87 Difference]: Start difference. First operand 66 states and 66 transitions. Second operand 21 states. [2018-07-20 21:17:09,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:09,078 INFO L93 Difference]: Finished difference Result 75 states and 75 transitions. [2018-07-20 21:17:09,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-07-20 21:17:09,078 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-07-20 21:17:09,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:09,079 INFO L225 Difference]: With dead ends: 75 [2018-07-20 21:17:09,079 INFO L226 Difference]: Without dead ends: 70 [2018-07-20 21:17:09,079 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 279 GetRequests, 241 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-07-20 21:17:09,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-07-20 21:17:09,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 69. [2018-07-20 21:17:09,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-07-20 21:17:09,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 69 transitions. [2018-07-20 21:17:09,083 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 69 transitions. Word has length 65 [2018-07-20 21:17:09,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:09,084 INFO L471 AbstractCegarLoop]: Abstraction has 69 states and 69 transitions. [2018-07-20 21:17:09,084 INFO L472 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-07-20 21:17:09,084 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 69 transitions. [2018-07-20 21:17:09,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-07-20 21:17:09,085 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:09,089 INFO L358 BasicCegarLoop]: trace histogram [20, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:09,089 INFO L414 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:09,089 INFO L82 PathProgramCache]: Analyzing trace with hash 85337965, now seen corresponding path program 19 times [2018-07-20 21:17:09,089 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:09,090 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:09,090 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:09,090 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:09,090 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:09,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:09,341 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:09,341 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:09,341 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:09,341 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:09,341 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:09,342 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:09,342 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:09,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:09,348 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:17:09,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:09,362 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:09,376 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:09,376 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:09,804 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:09,824 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:09,825 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:09,840 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:09,840 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:17:09,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:09,867 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:09,877 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:09,877 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:09,938 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:09,939 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:09,940 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 42 [2018-07-20 21:17:09,940 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:09,940 INFO L450 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-07-20 21:17:09,942 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-07-20 21:17:09,942 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-07-20 21:17:09,943 INFO L87 Difference]: Start difference. First operand 69 states and 69 transitions. Second operand 22 states. [2018-07-20 21:17:10,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:10,484 INFO L93 Difference]: Finished difference Result 78 states and 78 transitions. [2018-07-20 21:17:10,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-07-20 21:17:10,485 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 68 [2018-07-20 21:17:10,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:10,485 INFO L225 Difference]: With dead ends: 78 [2018-07-20 21:17:10,485 INFO L226 Difference]: Without dead ends: 73 [2018-07-20 21:17:10,486 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 292 GetRequests, 252 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-07-20 21:17:10,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-07-20 21:17:10,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 72. [2018-07-20 21:17:10,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-07-20 21:17:10,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 72 transitions. [2018-07-20 21:17:10,489 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 72 transitions. Word has length 68 [2018-07-20 21:17:10,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:10,489 INFO L471 AbstractCegarLoop]: Abstraction has 72 states and 72 transitions. [2018-07-20 21:17:10,489 INFO L472 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-07-20 21:17:10,489 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 72 transitions. [2018-07-20 21:17:10,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-07-20 21:17:10,490 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:10,490 INFO L358 BasicCegarLoop]: trace histogram [21, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:10,490 INFO L414 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:10,490 INFO L82 PathProgramCache]: Analyzing trace with hash -967674254, now seen corresponding path program 20 times [2018-07-20 21:17:10,490 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:10,491 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:10,491 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:10,491 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:10,491 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:10,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:10,746 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:10,746 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:10,746 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:10,746 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:10,746 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:10,746 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:10,746 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:10,752 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:17:10,752 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:10,767 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:17:10,767 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:10,769 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:10,777 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:10,777 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:11,336 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:11,357 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:11,357 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:11,371 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:17:11,371 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:11,400 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:17:11,400 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:11,404 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:11,419 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:11,419 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:11,447 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:11,448 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:11,449 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 44 [2018-07-20 21:17:11,449 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:11,449 INFO L450 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-07-20 21:17:11,449 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-07-20 21:17:11,450 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-07-20 21:17:11,450 INFO L87 Difference]: Start difference. First operand 72 states and 72 transitions. Second operand 23 states. [2018-07-20 21:17:11,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:11,503 INFO L93 Difference]: Finished difference Result 81 states and 81 transitions. [2018-07-20 21:17:11,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-07-20 21:17:11,504 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 71 [2018-07-20 21:17:11,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:11,505 INFO L225 Difference]: With dead ends: 81 [2018-07-20 21:17:11,505 INFO L226 Difference]: Without dead ends: 76 [2018-07-20 21:17:11,506 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 305 GetRequests, 263 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-07-20 21:17:11,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-07-20 21:17:11,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 75. [2018-07-20 21:17:11,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-07-20 21:17:11,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 75 transitions. [2018-07-20 21:17:11,511 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 75 transitions. Word has length 71 [2018-07-20 21:17:11,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:11,511 INFO L471 AbstractCegarLoop]: Abstraction has 75 states and 75 transitions. [2018-07-20 21:17:11,511 INFO L472 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-07-20 21:17:11,512 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 75 transitions. [2018-07-20 21:17:11,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-07-20 21:17:11,512 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:11,512 INFO L358 BasicCegarLoop]: trace histogram [22, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:11,512 INFO L414 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:11,512 INFO L82 PathProgramCache]: Analyzing trace with hash -813560499, now seen corresponding path program 21 times [2018-07-20 21:17:11,513 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:11,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:11,513 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:11,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:11,513 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:11,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:12,565 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:12,566 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:12,566 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:12,566 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:12,566 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:12,566 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:12,566 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:12,573 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:17:12,573 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:17:12,616 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-07-20 21:17:12,616 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:12,618 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:12,629 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:12,630 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:13,164 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:13,185 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:13,185 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:13,200 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:17:13,200 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:17:14,062 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-07-20 21:17:14,062 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:14,066 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:14,075 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:14,075 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:14,097 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:14,098 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:14,098 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 46 [2018-07-20 21:17:14,098 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:14,099 INFO L450 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-07-20 21:17:14,099 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-07-20 21:17:14,100 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-07-20 21:17:14,100 INFO L87 Difference]: Start difference. First operand 75 states and 75 transitions. Second operand 24 states. [2018-07-20 21:17:14,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:14,168 INFO L93 Difference]: Finished difference Result 84 states and 84 transitions. [2018-07-20 21:17:14,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-07-20 21:17:14,169 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-07-20 21:17:14,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:14,169 INFO L225 Difference]: With dead ends: 84 [2018-07-20 21:17:14,169 INFO L226 Difference]: Without dead ends: 79 [2018-07-20 21:17:14,170 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 318 GetRequests, 274 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-07-20 21:17:14,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-07-20 21:17:14,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 78. [2018-07-20 21:17:14,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-07-20 21:17:14,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 78 transitions. [2018-07-20 21:17:14,173 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 78 transitions. Word has length 74 [2018-07-20 21:17:14,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:14,173 INFO L471 AbstractCegarLoop]: Abstraction has 78 states and 78 transitions. [2018-07-20 21:17:14,173 INFO L472 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-07-20 21:17:14,173 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 78 transitions. [2018-07-20 21:17:14,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-07-20 21:17:14,174 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:14,174 INFO L358 BasicCegarLoop]: trace histogram [23, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:14,174 INFO L414 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:14,174 INFO L82 PathProgramCache]: Analyzing trace with hash -930724718, now seen corresponding path program 22 times [2018-07-20 21:17:14,175 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:14,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:14,175 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:14,176 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:14,176 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:14,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:14,420 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:14,421 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:14,421 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:14,421 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:14,421 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:14,421 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:14,421 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:14,427 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:17:14,427 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:17:14,442 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:17:14,443 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:14,444 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:14,458 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:14,458 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:15,004 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:15,026 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:15,026 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:15,042 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:17:15,043 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:17:15,086 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:17:15,086 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:15,090 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:15,098 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:15,098 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:15,139 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:15,140 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:15,140 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 48 [2018-07-20 21:17:15,140 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:15,141 INFO L450 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-07-20 21:17:15,141 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-07-20 21:17:15,141 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-07-20 21:17:15,141 INFO L87 Difference]: Start difference. First operand 78 states and 78 transitions. Second operand 25 states. [2018-07-20 21:17:15,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:15,220 INFO L93 Difference]: Finished difference Result 87 states and 87 transitions. [2018-07-20 21:17:15,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-07-20 21:17:15,223 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 77 [2018-07-20 21:17:15,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:15,224 INFO L225 Difference]: With dead ends: 87 [2018-07-20 21:17:15,224 INFO L226 Difference]: Without dead ends: 82 [2018-07-20 21:17:15,225 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 331 GetRequests, 285 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-07-20 21:17:15,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-07-20 21:17:15,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 81. [2018-07-20 21:17:15,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-07-20 21:17:15,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 81 transitions. [2018-07-20 21:17:15,232 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 81 transitions. Word has length 77 [2018-07-20 21:17:15,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:15,232 INFO L471 AbstractCegarLoop]: Abstraction has 81 states and 81 transitions. [2018-07-20 21:17:15,232 INFO L472 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-07-20 21:17:15,232 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 81 transitions. [2018-07-20 21:17:15,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-07-20 21:17:15,233 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:15,233 INFO L358 BasicCegarLoop]: trace histogram [24, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:15,233 INFO L414 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:15,234 INFO L82 PathProgramCache]: Analyzing trace with hash 438438701, now seen corresponding path program 23 times [2018-07-20 21:17:15,234 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:15,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:15,235 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:15,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:15,235 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:15,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:15,521 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:15,522 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:15,522 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:15,522 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:15,522 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:15,522 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:15,522 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:15,537 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:17:15,537 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:15,618 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-07-20 21:17:15,618 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:15,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:15,630 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:15,630 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:16,191 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:16,212 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:16,212 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:16,226 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:17:16,227 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:16,919 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-07-20 21:17:16,919 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:16,923 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:16,932 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:16,932 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:16,998 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:17,000 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:17,000 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 50 [2018-07-20 21:17:17,000 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:17,001 INFO L450 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-07-20 21:17:17,001 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-07-20 21:17:17,002 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-07-20 21:17:17,002 INFO L87 Difference]: Start difference. First operand 81 states and 81 transitions. Second operand 26 states. [2018-07-20 21:17:17,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:17,133 INFO L93 Difference]: Finished difference Result 90 states and 90 transitions. [2018-07-20 21:17:17,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-07-20 21:17:17,133 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 80 [2018-07-20 21:17:17,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:17,134 INFO L225 Difference]: With dead ends: 90 [2018-07-20 21:17:17,134 INFO L226 Difference]: Without dead ends: 85 [2018-07-20 21:17:17,135 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 344 GetRequests, 296 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-07-20 21:17:17,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-07-20 21:17:17,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 84. [2018-07-20 21:17:17,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-07-20 21:17:17,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 84 transitions. [2018-07-20 21:17:17,139 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 84 transitions. Word has length 80 [2018-07-20 21:17:17,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:17,139 INFO L471 AbstractCegarLoop]: Abstraction has 84 states and 84 transitions. [2018-07-20 21:17:17,139 INFO L472 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-07-20 21:17:17,139 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 84 transitions. [2018-07-20 21:17:17,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-07-20 21:17:17,140 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:17,140 INFO L358 BasicCegarLoop]: trace histogram [25, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:17,140 INFO L414 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:17,141 INFO L82 PathProgramCache]: Analyzing trace with hash -118555982, now seen corresponding path program 24 times [2018-07-20 21:17:17,143 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:17,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:17,143 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:17,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:17,143 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:17,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:17,487 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:17,487 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:17,487 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:17,488 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:17,488 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:17,488 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:17,488 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:17,493 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:17:17,494 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:17:17,549 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 25 check-sat command(s) [2018-07-20 21:17:17,549 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:17,551 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:17,567 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:17,567 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:18,241 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:18,261 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:18,261 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:18,275 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:17:18,276 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:17:20,018 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 25 check-sat command(s) [2018-07-20 21:17:20,019 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:20,024 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:20,038 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:20,039 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:20,125 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:20,128 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:20,128 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 52 [2018-07-20 21:17:20,128 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:20,129 INFO L450 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-07-20 21:17:20,129 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-07-20 21:17:20,130 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-07-20 21:17:20,130 INFO L87 Difference]: Start difference. First operand 84 states and 84 transitions. Second operand 27 states. [2018-07-20 21:17:20,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:20,239 INFO L93 Difference]: Finished difference Result 93 states and 93 transitions. [2018-07-20 21:17:20,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-07-20 21:17:20,239 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 83 [2018-07-20 21:17:20,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:20,240 INFO L225 Difference]: With dead ends: 93 [2018-07-20 21:17:20,240 INFO L226 Difference]: Without dead ends: 88 [2018-07-20 21:17:20,241 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 357 GetRequests, 307 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-07-20 21:17:20,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-07-20 21:17:20,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 87. [2018-07-20 21:17:20,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-07-20 21:17:20,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 87 transitions. [2018-07-20 21:17:20,244 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 87 transitions. Word has length 83 [2018-07-20 21:17:20,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:20,245 INFO L471 AbstractCegarLoop]: Abstraction has 87 states and 87 transitions. [2018-07-20 21:17:20,245 INFO L472 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-07-20 21:17:20,245 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 87 transitions. [2018-07-20 21:17:20,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-07-20 21:17:20,245 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:20,246 INFO L358 BasicCegarLoop]: trace histogram [26, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:20,246 INFO L414 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:20,246 INFO L82 PathProgramCache]: Analyzing trace with hash -2088492787, now seen corresponding path program 25 times [2018-07-20 21:17:20,246 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:20,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:20,247 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:20,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:20,247 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:20,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:20,666 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:20,666 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:20,666 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:20,666 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:20,666 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:20,667 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:20,667 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:20,674 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:20,674 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:17:20,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:20,692 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:20,702 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:20,702 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:21,371 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:21,391 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:21,391 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:21,406 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:21,406 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:17:21,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:21,439 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:21,450 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:21,450 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:21,492 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:21,493 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:21,493 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 54 [2018-07-20 21:17:21,493 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:21,494 INFO L450 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-07-20 21:17:21,494 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-07-20 21:17:21,494 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1431, Invalid=1431, Unknown=0, NotChecked=0, Total=2862 [2018-07-20 21:17:21,495 INFO L87 Difference]: Start difference. First operand 87 states and 87 transitions. Second operand 28 states. [2018-07-20 21:17:21,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:21,555 INFO L93 Difference]: Finished difference Result 96 states and 96 transitions. [2018-07-20 21:17:21,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-07-20 21:17:21,556 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 86 [2018-07-20 21:17:21,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:21,557 INFO L225 Difference]: With dead ends: 96 [2018-07-20 21:17:21,557 INFO L226 Difference]: Without dead ends: 91 [2018-07-20 21:17:21,558 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 370 GetRequests, 318 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1431, Invalid=1431, Unknown=0, NotChecked=0, Total=2862 [2018-07-20 21:17:21,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-07-20 21:17:21,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 90. [2018-07-20 21:17:21,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-07-20 21:17:21,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 90 transitions. [2018-07-20 21:17:21,565 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 90 transitions. Word has length 86 [2018-07-20 21:17:21,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:21,565 INFO L471 AbstractCegarLoop]: Abstraction has 90 states and 90 transitions. [2018-07-20 21:17:21,565 INFO L472 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-07-20 21:17:21,565 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 90 transitions. [2018-07-20 21:17:21,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-07-20 21:17:21,566 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:21,566 INFO L358 BasicCegarLoop]: trace histogram [27, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:21,566 INFO L414 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:21,566 INFO L82 PathProgramCache]: Analyzing trace with hash -2042717998, now seen corresponding path program 26 times [2018-07-20 21:17:21,567 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:21,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:21,567 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:21,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:21,568 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:21,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:22,321 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:22,321 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:22,321 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:22,321 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:22,322 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:22,322 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:22,322 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:22,329 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:17:22,329 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:22,346 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:17:22,346 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:22,348 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:22,364 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:22,364 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:23,249 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:23,269 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:23,269 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:23,284 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:17:23,284 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:23,319 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:17:23,319 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:23,323 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:23,337 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:23,337 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:23,401 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:23,403 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:23,403 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 56 [2018-07-20 21:17:23,403 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:23,403 INFO L450 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-07-20 21:17:23,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-07-20 21:17:23,405 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-07-20 21:17:23,405 INFO L87 Difference]: Start difference. First operand 90 states and 90 transitions. Second operand 29 states. [2018-07-20 21:17:23,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:23,583 INFO L93 Difference]: Finished difference Result 99 states and 99 transitions. [2018-07-20 21:17:23,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-07-20 21:17:23,584 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 89 [2018-07-20 21:17:23,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:23,584 INFO L225 Difference]: With dead ends: 99 [2018-07-20 21:17:23,584 INFO L226 Difference]: Without dead ends: 94 [2018-07-20 21:17:23,585 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 383 GetRequests, 329 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-07-20 21:17:23,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-07-20 21:17:23,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 93. [2018-07-20 21:17:23,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-07-20 21:17:23,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 93 transitions. [2018-07-20 21:17:23,589 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 93 transitions. Word has length 89 [2018-07-20 21:17:23,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:23,589 INFO L471 AbstractCegarLoop]: Abstraction has 93 states and 93 transitions. [2018-07-20 21:17:23,589 INFO L472 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-07-20 21:17:23,589 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 93 transitions. [2018-07-20 21:17:23,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-07-20 21:17:23,590 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:23,590 INFO L358 BasicCegarLoop]: trace histogram [28, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:23,590 INFO L414 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:23,590 INFO L82 PathProgramCache]: Analyzing trace with hash 129388269, now seen corresponding path program 27 times [2018-07-20 21:17:23,590 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:23,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:23,591 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:23,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:23,591 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:23,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:24,246 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:24,246 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:24,246 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:24,246 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:24,246 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:24,247 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:24,247 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:24,252 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:17:24,252 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:17:24,322 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-07-20 21:17:24,322 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:24,324 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:24,334 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:24,334 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:25,079 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:25,106 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:25,115 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:25,129 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:17:25,130 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:17:27,308 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-07-20 21:17:27,308 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:27,313 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:27,325 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:27,325 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:27,371 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:27,373 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:27,373 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 58 [2018-07-20 21:17:27,373 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:27,373 INFO L450 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-07-20 21:17:27,374 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-07-20 21:17:27,374 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-07-20 21:17:27,375 INFO L87 Difference]: Start difference. First operand 93 states and 93 transitions. Second operand 30 states. [2018-07-20 21:17:27,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:27,439 INFO L93 Difference]: Finished difference Result 102 states and 102 transitions. [2018-07-20 21:17:27,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-07-20 21:17:27,440 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 92 [2018-07-20 21:17:27,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:27,440 INFO L225 Difference]: With dead ends: 102 [2018-07-20 21:17:27,440 INFO L226 Difference]: Without dead ends: 97 [2018-07-20 21:17:27,441 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 396 GetRequests, 340 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-07-20 21:17:27,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-07-20 21:17:27,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 96. [2018-07-20 21:17:27,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-07-20 21:17:27,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 96 transitions. [2018-07-20 21:17:27,446 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 96 transitions. Word has length 92 [2018-07-20 21:17:27,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:27,446 INFO L471 AbstractCegarLoop]: Abstraction has 96 states and 96 transitions. [2018-07-20 21:17:27,446 INFO L472 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-07-20 21:17:27,447 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 96 transitions. [2018-07-20 21:17:27,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-07-20 21:17:27,447 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:27,447 INFO L358 BasicCegarLoop]: trace histogram [29, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:27,448 INFO L414 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:27,448 INFO L82 PathProgramCache]: Analyzing trace with hash 1369906930, now seen corresponding path program 28 times [2018-07-20 21:17:27,448 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:27,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:27,449 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:27,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:27,449 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:27,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:27,808 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:27,809 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:27,809 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:27,809 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:27,809 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:27,809 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:27,809 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:27,815 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:17:27,815 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:17:27,833 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:17:27,833 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:27,836 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:27,853 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:27,853 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:28,958 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:28,991 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:28,991 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:29,020 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:17:29,020 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:17:29,079 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:17:29,080 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:29,085 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:29,101 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:29,101 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:29,123 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:29,124 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:29,125 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 60 [2018-07-20 21:17:29,125 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:29,125 INFO L450 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-07-20 21:17:29,125 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-07-20 21:17:29,126 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1770, Invalid=1770, Unknown=0, NotChecked=0, Total=3540 [2018-07-20 21:17:29,126 INFO L87 Difference]: Start difference. First operand 96 states and 96 transitions. Second operand 31 states. [2018-07-20 21:17:29,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:29,250 INFO L93 Difference]: Finished difference Result 105 states and 105 transitions. [2018-07-20 21:17:29,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-07-20 21:17:29,250 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 95 [2018-07-20 21:17:29,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:29,251 INFO L225 Difference]: With dead ends: 105 [2018-07-20 21:17:29,251 INFO L226 Difference]: Without dead ends: 100 [2018-07-20 21:17:29,252 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 409 GetRequests, 351 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1770, Invalid=1770, Unknown=0, NotChecked=0, Total=3540 [2018-07-20 21:17:29,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-07-20 21:17:29,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 99. [2018-07-20 21:17:29,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-07-20 21:17:29,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 99 transitions. [2018-07-20 21:17:29,256 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 99 transitions. Word has length 95 [2018-07-20 21:17:29,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:29,257 INFO L471 AbstractCegarLoop]: Abstraction has 99 states and 99 transitions. [2018-07-20 21:17:29,257 INFO L472 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-07-20 21:17:29,257 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 99 transitions. [2018-07-20 21:17:29,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-07-20 21:17:29,258 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:29,258 INFO L358 BasicCegarLoop]: trace histogram [30, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:29,258 INFO L414 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:29,258 INFO L82 PathProgramCache]: Analyzing trace with hash -532245299, now seen corresponding path program 29 times [2018-07-20 21:17:29,258 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:29,259 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:29,259 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:29,259 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:29,259 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:29,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:30,452 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:30,452 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:30,453 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:30,453 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:30,453 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:30,453 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:30,453 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:30,466 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:17:30,466 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:30,626 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-07-20 21:17:30,626 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:30,629 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:30,647 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:30,647 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:32,407 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:32,428 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:32,428 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:32,442 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:17:32,442 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:33,985 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-07-20 21:17:33,985 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:33,991 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:34,020 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:34,021 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:34,083 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:34,086 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:34,086 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 62 [2018-07-20 21:17:34,086 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:34,087 INFO L450 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-07-20 21:17:34,087 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-07-20 21:17:34,087 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-07-20 21:17:34,088 INFO L87 Difference]: Start difference. First operand 99 states and 99 transitions. Second operand 32 states. [2018-07-20 21:17:34,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:34,324 INFO L93 Difference]: Finished difference Result 108 states and 108 transitions. [2018-07-20 21:17:34,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-07-20 21:17:34,324 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 98 [2018-07-20 21:17:34,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:34,325 INFO L225 Difference]: With dead ends: 108 [2018-07-20 21:17:34,325 INFO L226 Difference]: Without dead ends: 103 [2018-07-20 21:17:34,325 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 422 GetRequests, 362 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-07-20 21:17:34,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-07-20 21:17:34,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 102. [2018-07-20 21:17:34,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-07-20 21:17:34,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 102 transitions. [2018-07-20 21:17:34,330 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 102 transitions. Word has length 98 [2018-07-20 21:17:34,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:34,330 INFO L471 AbstractCegarLoop]: Abstraction has 102 states and 102 transitions. [2018-07-20 21:17:34,331 INFO L472 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-07-20 21:17:34,331 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 102 transitions. [2018-07-20 21:17:34,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-07-20 21:17:34,331 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:34,331 INFO L358 BasicCegarLoop]: trace histogram [31, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:34,332 INFO L414 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:34,332 INFO L82 PathProgramCache]: Analyzing trace with hash 249203986, now seen corresponding path program 30 times [2018-07-20 21:17:34,332 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:34,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:34,333 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:34,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:34,333 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:34,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:34,795 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:34,795 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:34,795 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:34,795 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:34,795 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:34,796 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:34,796 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:34,802 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:17:34,802 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:17:34,903 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 31 check-sat command(s) [2018-07-20 21:17:34,903 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:34,906 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:34,920 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:34,920 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:35,924 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:35,945 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:36,048 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:36,063 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:17:36,063 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:17:40,990 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 31 check-sat command(s) [2018-07-20 21:17:40,990 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:41,095 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:41,107 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:41,107 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:41,125 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:41,126 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:41,127 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 64 [2018-07-20 21:17:41,127 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:41,127 INFO L450 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-07-20 21:17:41,127 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-07-20 21:17:41,127 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2016, Invalid=2016, Unknown=0, NotChecked=0, Total=4032 [2018-07-20 21:17:41,128 INFO L87 Difference]: Start difference. First operand 102 states and 102 transitions. Second operand 33 states. [2018-07-20 21:17:41,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:41,228 INFO L93 Difference]: Finished difference Result 111 states and 111 transitions. [2018-07-20 21:17:41,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-07-20 21:17:41,229 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 101 [2018-07-20 21:17:41,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:41,229 INFO L225 Difference]: With dead ends: 111 [2018-07-20 21:17:41,229 INFO L226 Difference]: Without dead ends: 106 [2018-07-20 21:17:41,230 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 435 GetRequests, 373 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2016, Invalid=2016, Unknown=0, NotChecked=0, Total=4032 [2018-07-20 21:17:41,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-07-20 21:17:41,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 105. [2018-07-20 21:17:41,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-07-20 21:17:41,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 105 transitions. [2018-07-20 21:17:41,235 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 105 transitions. Word has length 101 [2018-07-20 21:17:41,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:41,235 INFO L471 AbstractCegarLoop]: Abstraction has 105 states and 105 transitions. [2018-07-20 21:17:41,235 INFO L472 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-07-20 21:17:41,236 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 105 transitions. [2018-07-20 21:17:41,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-07-20 21:17:41,236 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:41,236 INFO L358 BasicCegarLoop]: trace histogram [32, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:41,237 INFO L414 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:41,237 INFO L82 PathProgramCache]: Analyzing trace with hash 1682109101, now seen corresponding path program 31 times [2018-07-20 21:17:41,237 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:41,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:41,238 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:41,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:41,238 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:41,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:41,648 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:41,648 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:41,648 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:41,648 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:41,648 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:41,648 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:41,649 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:41,656 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:41,656 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:17:41,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:41,692 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:41,704 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:41,704 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:42,678 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:42,698 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:42,698 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:42,712 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:42,712 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:17:42,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:42,752 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:42,763 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:42,763 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:42,777 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:42,778 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:42,778 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 66 [2018-07-20 21:17:42,778 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:42,779 INFO L450 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-07-20 21:17:42,779 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-07-20 21:17:42,779 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2145, Invalid=2145, Unknown=0, NotChecked=0, Total=4290 [2018-07-20 21:17:42,780 INFO L87 Difference]: Start difference. First operand 105 states and 105 transitions. Second operand 34 states. [2018-07-20 21:17:42,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:42,855 INFO L93 Difference]: Finished difference Result 114 states and 114 transitions. [2018-07-20 21:17:42,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-07-20 21:17:42,855 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 104 [2018-07-20 21:17:42,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:42,856 INFO L225 Difference]: With dead ends: 114 [2018-07-20 21:17:42,856 INFO L226 Difference]: Without dead ends: 109 [2018-07-20 21:17:42,857 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 448 GetRequests, 384 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2145, Invalid=2145, Unknown=0, NotChecked=0, Total=4290 [2018-07-20 21:17:42,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-07-20 21:17:42,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 108. [2018-07-20 21:17:42,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-07-20 21:17:42,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 108 transitions. [2018-07-20 21:17:42,864 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 108 transitions. Word has length 104 [2018-07-20 21:17:42,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:42,864 INFO L471 AbstractCegarLoop]: Abstraction has 108 states and 108 transitions. [2018-07-20 21:17:42,864 INFO L472 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-07-20 21:17:42,864 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 108 transitions. [2018-07-20 21:17:42,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-07-20 21:17:42,865 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:42,865 INFO L358 BasicCegarLoop]: trace histogram [33, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:42,866 INFO L414 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:42,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1678435122, now seen corresponding path program 32 times [2018-07-20 21:17:42,866 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:42,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:42,868 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:17:42,868 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:42,868 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:42,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:43,507 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:43,508 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:43,508 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:43,508 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:43,508 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:43,508 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:43,509 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:43,514 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:17:43,515 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:43,534 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:17:43,534 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:43,536 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:43,548 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:43,549 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:44,587 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:44,608 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:44,608 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:44,623 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:17:44,623 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:44,683 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:17:44,683 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:44,689 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:44,708 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:44,709 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:44,780 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:44,782 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:44,782 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 68 [2018-07-20 21:17:44,782 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:44,783 INFO L450 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-07-20 21:17:44,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-07-20 21:17:44,784 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2278, Invalid=2278, Unknown=0, NotChecked=0, Total=4556 [2018-07-20 21:17:44,784 INFO L87 Difference]: Start difference. First operand 108 states and 108 transitions. Second operand 35 states. [2018-07-20 21:17:45,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:45,287 INFO L93 Difference]: Finished difference Result 117 states and 117 transitions. [2018-07-20 21:17:45,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-07-20 21:17:45,287 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 107 [2018-07-20 21:17:45,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:45,288 INFO L225 Difference]: With dead ends: 117 [2018-07-20 21:17:45,288 INFO L226 Difference]: Without dead ends: 112 [2018-07-20 21:17:45,289 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 461 GetRequests, 395 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2278, Invalid=2278, Unknown=0, NotChecked=0, Total=4556 [2018-07-20 21:17:45,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-07-20 21:17:45,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 111. [2018-07-20 21:17:45,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-07-20 21:17:45,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 111 transitions. [2018-07-20 21:17:45,294 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 111 transitions. Word has length 107 [2018-07-20 21:17:45,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:45,294 INFO L471 AbstractCegarLoop]: Abstraction has 111 states and 111 transitions. [2018-07-20 21:17:45,294 INFO L472 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-07-20 21:17:45,294 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 111 transitions. [2018-07-20 21:17:45,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-07-20 21:17:45,295 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:45,295 INFO L358 BasicCegarLoop]: trace histogram [34, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:45,295 INFO L414 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:45,295 INFO L82 PathProgramCache]: Analyzing trace with hash -398890867, now seen corresponding path program 33 times [2018-07-20 21:17:45,296 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:45,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:45,296 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:45,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:45,296 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:45,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:45,758 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:45,759 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:45,759 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:45,759 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:45,759 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:45,759 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:45,759 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:45,765 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:17:45,765 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:17:45,881 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 34 check-sat command(s) [2018-07-20 21:17:45,881 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:45,883 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:45,895 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:45,896 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:47,029 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:47,050 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:47,050 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:47,064 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:17:47,064 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:17:52,211 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 34 check-sat command(s) [2018-07-20 21:17:52,211 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:52,243 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:52,255 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:52,255 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:52,275 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:52,277 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:52,277 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 70 [2018-07-20 21:17:52,277 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:52,277 INFO L450 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-07-20 21:17:52,278 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-07-20 21:17:52,278 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2415, Invalid=2415, Unknown=0, NotChecked=0, Total=4830 [2018-07-20 21:17:52,278 INFO L87 Difference]: Start difference. First operand 111 states and 111 transitions. Second operand 36 states. [2018-07-20 21:17:52,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:52,367 INFO L93 Difference]: Finished difference Result 120 states and 120 transitions. [2018-07-20 21:17:52,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-07-20 21:17:52,367 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 110 [2018-07-20 21:17:52,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:52,367 INFO L225 Difference]: With dead ends: 120 [2018-07-20 21:17:52,368 INFO L226 Difference]: Without dead ends: 115 [2018-07-20 21:17:52,368 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 474 GetRequests, 406 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2415, Invalid=2415, Unknown=0, NotChecked=0, Total=4830 [2018-07-20 21:17:52,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-07-20 21:17:52,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 114. [2018-07-20 21:17:52,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-07-20 21:17:52,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 114 transitions. [2018-07-20 21:17:52,371 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 114 transitions. Word has length 110 [2018-07-20 21:17:52,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:52,371 INFO L471 AbstractCegarLoop]: Abstraction has 114 states and 114 transitions. [2018-07-20 21:17:52,371 INFO L472 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-07-20 21:17:52,371 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 114 transitions. [2018-07-20 21:17:52,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-07-20 21:17:52,372 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:52,372 INFO L358 BasicCegarLoop]: trace histogram [35, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:52,372 INFO L414 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:52,372 INFO L82 PathProgramCache]: Analyzing trace with hash 166338898, now seen corresponding path program 34 times [2018-07-20 21:17:52,372 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:52,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:52,373 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:52,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:52,373 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:52,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:52,924 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:52,925 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:52,925 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:52,925 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:52,925 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:52,925 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:52,925 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:52,931 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:17:52,931 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:17:52,951 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:17:52,952 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:52,954 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:52,975 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:52,976 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:54,514 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:54,534 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:54,534 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:54,548 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:17:54,548 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:17:54,593 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:17:54,593 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:54,597 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:54,610 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:54,610 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:54,626 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:54,627 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:17:54,627 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 72 [2018-07-20 21:17:54,627 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:17:54,627 INFO L450 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-07-20 21:17:54,628 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-07-20 21:17:54,628 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2556, Invalid=2556, Unknown=0, NotChecked=0, Total=5112 [2018-07-20 21:17:54,628 INFO L87 Difference]: Start difference. First operand 114 states and 114 transitions. Second operand 37 states. [2018-07-20 21:17:54,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:17:54,760 INFO L93 Difference]: Finished difference Result 123 states and 123 transitions. [2018-07-20 21:17:54,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-07-20 21:17:54,763 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 113 [2018-07-20 21:17:54,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:17:54,765 INFO L225 Difference]: With dead ends: 123 [2018-07-20 21:17:54,765 INFO L226 Difference]: Without dead ends: 118 [2018-07-20 21:17:54,765 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 487 GetRequests, 417 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=2556, Invalid=2556, Unknown=0, NotChecked=0, Total=5112 [2018-07-20 21:17:54,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-07-20 21:17:54,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 117. [2018-07-20 21:17:54,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-07-20 21:17:54,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 117 transitions. [2018-07-20 21:17:54,770 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 117 transitions. Word has length 113 [2018-07-20 21:17:54,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:17:54,771 INFO L471 AbstractCegarLoop]: Abstraction has 117 states and 117 transitions. [2018-07-20 21:17:54,771 INFO L472 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-07-20 21:17:54,771 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 117 transitions. [2018-07-20 21:17:54,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-07-20 21:17:54,772 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:17:54,772 INFO L358 BasicCegarLoop]: trace histogram [36, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:17:54,772 INFO L414 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:17:54,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1640499603, now seen corresponding path program 35 times [2018-07-20 21:17:54,773 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:17:54,773 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:54,774 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:17:54,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:17:54,774 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:17:54,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:17:55,370 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:55,370 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:55,370 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:17:55,370 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:17:55,370 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:17:55,370 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:55,370 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:17:55,376 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:17:55,376 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:55,640 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 36 check-sat command(s) [2018-07-20 21:17:55,640 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:55,643 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:17:55,663 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:55,663 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:17:57,053 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:17:57,074 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:17:57,074 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:17:57,088 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:17:57,088 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:17:59,986 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 36 check-sat command(s) [2018-07-20 21:17:59,986 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:17:59,992 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:00,013 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:00,013 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:00,033 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:00,035 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:18:00,035 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 74 [2018-07-20 21:18:00,035 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:18:00,036 INFO L450 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-07-20 21:18:00,036 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-07-20 21:18:00,036 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2701, Invalid=2701, Unknown=0, NotChecked=0, Total=5402 [2018-07-20 21:18:00,036 INFO L87 Difference]: Start difference. First operand 117 states and 117 transitions. Second operand 38 states. [2018-07-20 21:18:00,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:18:00,115 INFO L93 Difference]: Finished difference Result 126 states and 126 transitions. [2018-07-20 21:18:00,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-07-20 21:18:00,116 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 116 [2018-07-20 21:18:00,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:18:00,117 INFO L225 Difference]: With dead ends: 126 [2018-07-20 21:18:00,117 INFO L226 Difference]: Without dead ends: 121 [2018-07-20 21:18:00,117 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 500 GetRequests, 428 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=2701, Invalid=2701, Unknown=0, NotChecked=0, Total=5402 [2018-07-20 21:18:00,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-07-20 21:18:00,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 120. [2018-07-20 21:18:00,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-07-20 21:18:00,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 120 transitions. [2018-07-20 21:18:00,121 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 120 transitions. Word has length 116 [2018-07-20 21:18:00,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:18:00,122 INFO L471 AbstractCegarLoop]: Abstraction has 120 states and 120 transitions. [2018-07-20 21:18:00,122 INFO L472 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-07-20 21:18:00,122 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 120 transitions. [2018-07-20 21:18:00,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-07-20 21:18:00,123 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:18:00,123 INFO L358 BasicCegarLoop]: trace histogram [37, 36, 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:18:00,123 INFO L414 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:18:00,123 INFO L82 PathProgramCache]: Analyzing trace with hash -341162126, now seen corresponding path program 36 times [2018-07-20 21:18:00,124 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:18:00,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:00,124 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:18:00,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:00,125 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:18:00,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:18:00,673 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:00,673 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:00,673 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:18:00,673 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:18:00,673 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:18:00,673 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:00,673 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:18:00,680 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:18:00,680 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:18:00,798 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 37 check-sat command(s) [2018-07-20 21:18:00,799 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:00,801 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:00,815 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:00,815 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:02,121 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:02,142 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:02,142 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:18:02,156 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:18:02,156 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:18:14,410 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 37 check-sat command(s) [2018-07-20 21:18:14,411 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:14,416 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:14,447 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:14,447 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:14,518 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:14,521 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:18:14,522 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 76 [2018-07-20 21:18:14,522 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:18:14,522 INFO L450 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-07-20 21:18:14,523 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-07-20 21:18:14,523 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2850, Invalid=2850, Unknown=0, NotChecked=0, Total=5700 [2018-07-20 21:18:14,523 INFO L87 Difference]: Start difference. First operand 120 states and 120 transitions. Second operand 39 states. [2018-07-20 21:18:14,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:18:14,852 INFO L93 Difference]: Finished difference Result 129 states and 129 transitions. [2018-07-20 21:18:14,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-07-20 21:18:14,852 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 119 [2018-07-20 21:18:14,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:18:14,853 INFO L225 Difference]: With dead ends: 129 [2018-07-20 21:18:14,853 INFO L226 Difference]: Without dead ends: 124 [2018-07-20 21:18:14,853 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 513 GetRequests, 439 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2850, Invalid=2850, Unknown=0, NotChecked=0, Total=5700 [2018-07-20 21:18:14,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-07-20 21:18:14,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 123. [2018-07-20 21:18:14,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-07-20 21:18:14,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 123 transitions. [2018-07-20 21:18:14,857 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 123 transitions. Word has length 119 [2018-07-20 21:18:14,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:18:14,857 INFO L471 AbstractCegarLoop]: Abstraction has 123 states and 123 transitions. [2018-07-20 21:18:14,857 INFO L472 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-07-20 21:18:14,857 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 123 transitions. [2018-07-20 21:18:14,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-07-20 21:18:14,858 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:18:14,858 INFO L358 BasicCegarLoop]: trace histogram [38, 37, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:18:14,859 INFO L414 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:18:14,859 INFO L82 PathProgramCache]: Analyzing trace with hash 1976343629, now seen corresponding path program 37 times [2018-07-20 21:18:14,859 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:18:14,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:14,859 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:18:14,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:14,859 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:18:14,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:18:15,758 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:15,758 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:15,792 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:18:15,792 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:18:15,792 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:18:15,792 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:15,792 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:18:15,800 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:18:15,800 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:18:15,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:18:15,835 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:15,858 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:15,858 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:17,761 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:17,781 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:17,781 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:18:17,795 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:18:17,795 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:18:17,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:18:17,841 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:17,865 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:17,865 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:17,946 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:17,948 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:18:17,948 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 78 [2018-07-20 21:18:17,948 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:18:17,949 INFO L450 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-07-20 21:18:17,949 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-07-20 21:18:17,949 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3003, Invalid=3003, Unknown=0, NotChecked=0, Total=6006 [2018-07-20 21:18:17,950 INFO L87 Difference]: Start difference. First operand 123 states and 123 transitions. Second operand 40 states. [2018-07-20 21:18:18,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:18:18,058 INFO L93 Difference]: Finished difference Result 132 states and 132 transitions. [2018-07-20 21:18:18,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-07-20 21:18:18,059 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 122 [2018-07-20 21:18:18,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:18:18,059 INFO L225 Difference]: With dead ends: 132 [2018-07-20 21:18:18,059 INFO L226 Difference]: Without dead ends: 127 [2018-07-20 21:18:18,060 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 526 GetRequests, 450 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=3003, Invalid=3003, Unknown=0, NotChecked=0, Total=6006 [2018-07-20 21:18:18,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-07-20 21:18:18,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 126. [2018-07-20 21:18:18,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-07-20 21:18:18,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 126 transitions. [2018-07-20 21:18:18,065 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 126 transitions. Word has length 122 [2018-07-20 21:18:18,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:18:18,066 INFO L471 AbstractCegarLoop]: Abstraction has 126 states and 126 transitions. [2018-07-20 21:18:18,066 INFO L472 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-07-20 21:18:18,066 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 126 transitions. [2018-07-20 21:18:18,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-07-20 21:18:18,067 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:18:18,067 INFO L358 BasicCegarLoop]: trace histogram [39, 38, 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:18:18,067 INFO L414 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:18:18,067 INFO L82 PathProgramCache]: Analyzing trace with hash 1191007634, now seen corresponding path program 38 times [2018-07-20 21:18:18,067 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:18:18,068 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:18,068 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:18:18,068 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:18,068 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:18:18,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:18:18,668 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:18,668 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:18,668 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:18:18,668 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:18:18,668 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:18:18,668 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:18,668 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:18:18,674 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:18:18,674 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:18:18,700 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:18:18,700 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:18,702 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:18,724 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:18,725 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:20,167 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:20,187 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:20,187 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:18:20,201 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:18:20,201 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:18:20,247 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:18:20,247 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:20,252 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:20,266 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:20,267 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:20,291 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:20,293 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:18:20,293 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 80 [2018-07-20 21:18:20,293 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:18:20,293 INFO L450 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-07-20 21:18:20,293 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-07-20 21:18:20,294 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3160, Invalid=3160, Unknown=0, NotChecked=0, Total=6320 [2018-07-20 21:18:20,294 INFO L87 Difference]: Start difference. First operand 126 states and 126 transitions. Second operand 41 states. [2018-07-20 21:18:20,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:18:20,484 INFO L93 Difference]: Finished difference Result 135 states and 135 transitions. [2018-07-20 21:18:20,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-07-20 21:18:20,485 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 125 [2018-07-20 21:18:20,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:18:20,486 INFO L225 Difference]: With dead ends: 135 [2018-07-20 21:18:20,486 INFO L226 Difference]: Without dead ends: 130 [2018-07-20 21:18:20,486 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 539 GetRequests, 461 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=3160, Invalid=3160, Unknown=0, NotChecked=0, Total=6320 [2018-07-20 21:18:20,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-07-20 21:18:20,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 129. [2018-07-20 21:18:20,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-07-20 21:18:20,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 129 transitions. [2018-07-20 21:18:20,492 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 129 transitions. Word has length 125 [2018-07-20 21:18:20,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:18:20,493 INFO L471 AbstractCegarLoop]: Abstraction has 129 states and 129 transitions. [2018-07-20 21:18:20,493 INFO L472 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-07-20 21:18:20,493 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 129 transitions. [2018-07-20 21:18:20,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-07-20 21:18:20,494 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:18:20,494 INFO L358 BasicCegarLoop]: trace histogram [40, 39, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:18:20,494 INFO L414 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:18:20,494 INFO L82 PathProgramCache]: Analyzing trace with hash -66758099, now seen corresponding path program 39 times [2018-07-20 21:18:20,494 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:18:20,495 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:20,495 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:18:20,495 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:20,495 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:18:20,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:18:21,496 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:21,496 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:21,496 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:18:21,496 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:18:21,496 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:18:21,497 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:21,497 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:18:21,502 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:18:21,502 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:18:21,683 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 40 check-sat command(s) [2018-07-20 21:18:21,683 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:21,686 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:21,701 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:21,702 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:23,297 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:23,330 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:23,331 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:18:23,352 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:18:23,352 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:18:34,285 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 40 check-sat command(s) [2018-07-20 21:18:34,285 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:34,290 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:34,323 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:34,324 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:34,360 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:34,362 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:18:34,362 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 82 [2018-07-20 21:18:34,362 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:18:34,362 INFO L450 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-07-20 21:18:34,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-07-20 21:18:34,363 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3321, Invalid=3321, Unknown=0, NotChecked=0, Total=6642 [2018-07-20 21:18:34,363 INFO L87 Difference]: Start difference. First operand 129 states and 129 transitions. Second operand 42 states. [2018-07-20 21:18:34,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:18:34,896 INFO L93 Difference]: Finished difference Result 138 states and 138 transitions. [2018-07-20 21:18:34,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-07-20 21:18:34,897 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 128 [2018-07-20 21:18:34,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:18:34,898 INFO L225 Difference]: With dead ends: 138 [2018-07-20 21:18:34,898 INFO L226 Difference]: Without dead ends: 133 [2018-07-20 21:18:34,898 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 552 GetRequests, 472 SyntacticMatches, 0 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=3321, Invalid=3321, Unknown=0, NotChecked=0, Total=6642 [2018-07-20 21:18:34,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-07-20 21:18:34,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 132. [2018-07-20 21:18:34,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-07-20 21:18:34,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 132 transitions. [2018-07-20 21:18:34,903 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 132 transitions. Word has length 128 [2018-07-20 21:18:34,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:18:34,904 INFO L471 AbstractCegarLoop]: Abstraction has 132 states and 132 transitions. [2018-07-20 21:18:34,904 INFO L472 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-07-20 21:18:34,904 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 132 transitions. [2018-07-20 21:18:34,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-07-20 21:18:34,905 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:18:34,905 INFO L358 BasicCegarLoop]: trace histogram [41, 40, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:18:34,905 INFO L414 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:18:34,905 INFO L82 PathProgramCache]: Analyzing trace with hash -871019598, now seen corresponding path program 40 times [2018-07-20 21:18:34,906 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:18:34,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:34,906 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:18:34,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:34,907 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:18:34,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:18:35,884 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:35,884 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:35,885 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:18:35,885 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:18:35,885 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:18:35,885 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:35,885 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:18:35,890 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:18:35,891 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:18:35,920 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:18:35,920 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:35,922 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:35,946 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:35,947 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:37,545 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:37,565 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:37,565 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:18:37,579 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:18:37,579 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:18:37,632 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:18:37,632 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:37,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:37,659 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:37,660 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:37,729 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:37,731 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:18:37,731 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43, 43, 43] total 84 [2018-07-20 21:18:37,731 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:18:37,732 INFO L450 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-07-20 21:18:37,732 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-07-20 21:18:37,733 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3486, Invalid=3486, Unknown=0, NotChecked=0, Total=6972 [2018-07-20 21:18:37,733 INFO L87 Difference]: Start difference. First operand 132 states and 132 transitions. Second operand 43 states. [2018-07-20 21:18:38,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:18:38,239 INFO L93 Difference]: Finished difference Result 141 states and 141 transitions. [2018-07-20 21:18:38,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-07-20 21:18:38,239 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 131 [2018-07-20 21:18:38,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:18:38,240 INFO L225 Difference]: With dead ends: 141 [2018-07-20 21:18:38,240 INFO L226 Difference]: Without dead ends: 136 [2018-07-20 21:18:38,241 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 565 GetRequests, 483 SyntacticMatches, 0 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=3486, Invalid=3486, Unknown=0, NotChecked=0, Total=6972 [2018-07-20 21:18:38,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-07-20 21:18:38,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 135. [2018-07-20 21:18:38,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-07-20 21:18:38,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 135 transitions. [2018-07-20 21:18:38,246 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 135 transitions. Word has length 131 [2018-07-20 21:18:38,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:18:38,247 INFO L471 AbstractCegarLoop]: Abstraction has 135 states and 135 transitions. [2018-07-20 21:18:38,247 INFO L472 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-07-20 21:18:38,247 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 135 transitions. [2018-07-20 21:18:38,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-07-20 21:18:38,248 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:18:38,248 INFO L358 BasicCegarLoop]: trace histogram [42, 41, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:18:38,248 INFO L414 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:18:38,248 INFO L82 PathProgramCache]: Analyzing trace with hash 997208077, now seen corresponding path program 41 times [2018-07-20 21:18:38,249 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:18:38,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:38,249 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:18:38,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:38,249 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:18:38,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:18:39,197 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:39,197 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:39,197 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:18:39,197 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:18:39,197 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:18:39,197 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:39,197 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:18:39,205 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:18:39,205 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:18:39,660 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 42 check-sat command(s) [2018-07-20 21:18:39,660 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:39,663 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:39,688 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:39,688 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:41,457 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:41,478 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:41,479 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:18:41,494 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:18:41,494 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:18:46,426 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 42 check-sat command(s) [2018-07-20 21:18:46,426 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:46,445 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:46,461 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:46,462 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:46,502 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:46,505 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:18:46,505 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44, 44, 44, 44] total 86 [2018-07-20 21:18:46,505 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:18:46,505 INFO L450 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-07-20 21:18:46,506 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-07-20 21:18:46,506 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3655, Invalid=3655, Unknown=0, NotChecked=0, Total=7310 [2018-07-20 21:18:46,506 INFO L87 Difference]: Start difference. First operand 135 states and 135 transitions. Second operand 44 states. [2018-07-20 21:18:47,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:18:47,103 INFO L93 Difference]: Finished difference Result 144 states and 144 transitions. [2018-07-20 21:18:47,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-07-20 21:18:47,105 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 134 [2018-07-20 21:18:47,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:18:47,106 INFO L225 Difference]: With dead ends: 144 [2018-07-20 21:18:47,106 INFO L226 Difference]: Without dead ends: 139 [2018-07-20 21:18:47,107 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 578 GetRequests, 494 SyntacticMatches, 0 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=3655, Invalid=3655, Unknown=0, NotChecked=0, Total=7310 [2018-07-20 21:18:47,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-07-20 21:18:47,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 138. [2018-07-20 21:18:47,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-07-20 21:18:47,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 138 transitions. [2018-07-20 21:18:47,112 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 138 transitions. Word has length 134 [2018-07-20 21:18:47,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:18:47,113 INFO L471 AbstractCegarLoop]: Abstraction has 138 states and 138 transitions. [2018-07-20 21:18:47,113 INFO L472 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-07-20 21:18:47,113 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 138 transitions. [2018-07-20 21:18:47,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-07-20 21:18:47,114 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:18:47,114 INFO L358 BasicCegarLoop]: trace histogram [43, 42, 42, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:18:47,114 INFO L414 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:18:47,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1113314862, now seen corresponding path program 42 times [2018-07-20 21:18:47,114 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:18:47,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:47,115 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:18:47,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:18:47,115 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:18:47,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:18:48,400 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:48,400 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:48,428 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:18:48,428 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:18:48,429 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:18:48,429 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:48,429 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:18:48,435 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:18:48,435 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:18:48,606 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2018-07-20 21:18:48,606 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:18:48,608 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:18:48,633 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:48,633 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:18:50,367 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:18:50,388 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:18:50,388 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:18:50,402 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:18:50,402 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:19:22,028 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2018-07-20 21:19:22,028 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:19:22,035 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:19:22,051 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:22,051 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:19:22,077 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:22,080 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:19:22,080 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45, 45, 45, 45] total 88 [2018-07-20 21:19:22,080 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:19:22,080 INFO L450 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-07-20 21:19:22,081 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-07-20 21:19:22,081 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3828, Invalid=3828, Unknown=0, NotChecked=0, Total=7656 [2018-07-20 21:19:22,081 INFO L87 Difference]: Start difference. First operand 138 states and 138 transitions. Second operand 45 states. [2018-07-20 21:19:22,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:19:22,183 INFO L93 Difference]: Finished difference Result 147 states and 147 transitions. [2018-07-20 21:19:22,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-07-20 21:19:22,183 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 137 [2018-07-20 21:19:22,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:19:22,184 INFO L225 Difference]: With dead ends: 147 [2018-07-20 21:19:22,184 INFO L226 Difference]: Without dead ends: 142 [2018-07-20 21:19:22,185 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 591 GetRequests, 505 SyntacticMatches, 0 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=3828, Invalid=3828, Unknown=0, NotChecked=0, Total=7656 [2018-07-20 21:19:22,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-07-20 21:19:22,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 141. [2018-07-20 21:19:22,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-07-20 21:19:22,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 141 transitions. [2018-07-20 21:19:22,190 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 141 transitions. Word has length 137 [2018-07-20 21:19:22,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:19:22,190 INFO L471 AbstractCegarLoop]: Abstraction has 141 states and 141 transitions. [2018-07-20 21:19:22,190 INFO L472 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-07-20 21:19:22,191 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 141 transitions. [2018-07-20 21:19:22,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-07-20 21:19:22,191 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:19:22,192 INFO L358 BasicCegarLoop]: trace histogram [44, 43, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:19:22,192 INFO L414 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:19:22,192 INFO L82 PathProgramCache]: Analyzing trace with hash -1675944467, now seen corresponding path program 43 times [2018-07-20 21:19:22,192 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:19:22,192 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:19:22,193 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:19:22,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:19:22,193 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:19:22,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:19:24,875 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:24,875 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:24,875 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:19:24,876 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:19:24,876 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:19:24,876 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:24,876 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:19:24,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:19:24,882 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:19:24,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:19:24,908 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:19:24,925 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:24,925 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:19:26,742 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:26,762 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:26,762 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:19:26,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:19:26,778 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-20 21:19:26,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:19:26,830 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:19:26,847 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:26,848 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:19:26,866 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:26,868 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:19:26,868 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46, 46, 46, 46] total 90 [2018-07-20 21:19:26,868 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:19:26,868 INFO L450 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-07-20 21:19:26,869 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-07-20 21:19:26,869 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4005, Invalid=4005, Unknown=0, NotChecked=0, Total=8010 [2018-07-20 21:19:26,869 INFO L87 Difference]: Start difference. First operand 141 states and 141 transitions. Second operand 46 states. [2018-07-20 21:19:27,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:19:27,004 INFO L93 Difference]: Finished difference Result 150 states and 150 transitions. [2018-07-20 21:19:27,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-07-20 21:19:27,004 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 140 [2018-07-20 21:19:27,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:19:27,005 INFO L225 Difference]: With dead ends: 150 [2018-07-20 21:19:27,005 INFO L226 Difference]: Without dead ends: 145 [2018-07-20 21:19:27,006 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 604 GetRequests, 516 SyntacticMatches, 0 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=4005, Invalid=4005, Unknown=0, NotChecked=0, Total=8010 [2018-07-20 21:19:27,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-07-20 21:19:27,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 144. [2018-07-20 21:19:27,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-07-20 21:19:27,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 144 transitions. [2018-07-20 21:19:27,011 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 144 transitions. Word has length 140 [2018-07-20 21:19:27,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:19:27,011 INFO L471 AbstractCegarLoop]: Abstraction has 144 states and 144 transitions. [2018-07-20 21:19:27,011 INFO L472 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-07-20 21:19:27,011 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 144 transitions. [2018-07-20 21:19:27,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-07-20 21:19:27,012 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:19:27,012 INFO L358 BasicCegarLoop]: trace histogram [45, 44, 44, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:19:27,012 INFO L414 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:19:27,013 INFO L82 PathProgramCache]: Analyzing trace with hash 282849266, now seen corresponding path program 44 times [2018-07-20 21:19:27,013 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:19:27,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:19:27,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-20 21:19:27,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:19:27,014 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:19:27,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:19:27,807 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:27,807 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:27,807 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:19:27,807 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:19:27,807 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:19:27,807 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:27,808 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:19:27,813 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:19:27,813 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:19:27,865 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:19:27,865 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:19:27,867 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:19:27,885 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:27,885 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:19:29,801 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:29,820 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:29,820 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:19:29,834 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-20 21:19:29,834 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:19:29,885 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-20 21:19:29,885 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:19:29,890 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:19:29,907 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:29,907 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:19:29,926 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:29,928 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:19:29,928 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47, 47, 47] total 92 [2018-07-20 21:19:29,928 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:19:29,928 INFO L450 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-07-20 21:19:29,928 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-07-20 21:19:29,929 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4186, Invalid=4186, Unknown=0, NotChecked=0, Total=8372 [2018-07-20 21:19:29,929 INFO L87 Difference]: Start difference. First operand 144 states and 144 transitions. Second operand 47 states. [2018-07-20 21:19:30,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:19:30,025 INFO L93 Difference]: Finished difference Result 153 states and 153 transitions. [2018-07-20 21:19:30,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-07-20 21:19:30,025 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 143 [2018-07-20 21:19:30,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:19:30,026 INFO L225 Difference]: With dead ends: 153 [2018-07-20 21:19:30,026 INFO L226 Difference]: Without dead ends: 148 [2018-07-20 21:19:30,026 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 617 GetRequests, 527 SyntacticMatches, 0 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=4186, Invalid=4186, Unknown=0, NotChecked=0, Total=8372 [2018-07-20 21:19:30,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-07-20 21:19:30,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 147. [2018-07-20 21:19:30,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-07-20 21:19:30,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 147 transitions. [2018-07-20 21:19:30,031 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 147 transitions. Word has length 143 [2018-07-20 21:19:30,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:19:30,032 INFO L471 AbstractCegarLoop]: Abstraction has 147 states and 147 transitions. [2018-07-20 21:19:30,032 INFO L472 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-07-20 21:19:30,032 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 147 transitions. [2018-07-20 21:19:30,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-07-20 21:19:30,033 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:19:30,033 INFO L358 BasicCegarLoop]: trace histogram [46, 45, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:19:30,033 INFO L414 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:19:30,033 INFO L82 PathProgramCache]: Analyzing trace with hash -1013701683, now seen corresponding path program 45 times [2018-07-20 21:19:30,033 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:19:30,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:19:30,034 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:19:30,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:19:30,034 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:19:30,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:19:30,826 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:30,827 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:30,827 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:19:30,827 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:19:30,827 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:19:30,827 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:30,827 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:19:30,837 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:19:30,838 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:19:31,110 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 46 check-sat command(s) [2018-07-20 21:19:31,110 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:19:31,113 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:19:31,131 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:31,131 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:19:33,115 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:33,136 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:33,136 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:19:33,149 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-20 21:19:33,150 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-20 21:19:53,970 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 46 check-sat command(s) [2018-07-20 21:19:53,970 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:19:53,993 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:19:54,011 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:54,011 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:19:54,031 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:54,033 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:19:54,033 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48, 48, 48] total 94 [2018-07-20 21:19:54,034 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:19:54,034 INFO L450 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-07-20 21:19:54,034 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-07-20 21:19:54,034 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4371, Invalid=4371, Unknown=0, NotChecked=0, Total=8742 [2018-07-20 21:19:54,035 INFO L87 Difference]: Start difference. First operand 147 states and 147 transitions. Second operand 48 states. [2018-07-20 21:19:54,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:19:54,149 INFO L93 Difference]: Finished difference Result 156 states and 156 transitions. [2018-07-20 21:19:54,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-07-20 21:19:54,151 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 146 [2018-07-20 21:19:54,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:19:54,152 INFO L225 Difference]: With dead ends: 156 [2018-07-20 21:19:54,152 INFO L226 Difference]: Without dead ends: 151 [2018-07-20 21:19:54,153 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 630 GetRequests, 538 SyntacticMatches, 0 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=4371, Invalid=4371, Unknown=0, NotChecked=0, Total=8742 [2018-07-20 21:19:54,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-07-20 21:19:54,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 150. [2018-07-20 21:19:54,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-07-20 21:19:54,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 150 transitions. [2018-07-20 21:19:54,157 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 150 transitions. Word has length 146 [2018-07-20 21:19:54,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:19:54,158 INFO L471 AbstractCegarLoop]: Abstraction has 150 states and 150 transitions. [2018-07-20 21:19:54,159 INFO L472 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-07-20 21:19:54,159 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 150 transitions. [2018-07-20 21:19:54,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-07-20 21:19:54,160 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:19:54,160 INFO L358 BasicCegarLoop]: trace histogram [47, 46, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:19:54,160 INFO L414 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:19:54,160 INFO L82 PathProgramCache]: Analyzing trace with hash -1922130414, now seen corresponding path program 46 times [2018-07-20 21:19:54,160 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:19:54,161 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:19:54,161 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:19:54,161 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:19:54,161 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:19:54,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:19:55,876 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:55,876 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:55,876 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:19:55,876 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:19:55,876 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:19:55,876 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:55,876 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:19:55,884 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:19:55,884 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:19:55,925 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:19:55,925 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:19:55,928 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:19:55,947 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:55,947 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:19:58,029 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:58,048 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:58,049 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:19:58,062 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-20 21:19:58,063 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-20 21:19:58,122 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-20 21:19:58,122 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:19:58,126 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:19:58,145 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:58,145 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:19:58,166 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:58,167 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:19:58,167 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49, 49, 49] total 96 [2018-07-20 21:19:58,167 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:19:58,167 INFO L450 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-07-20 21:19:58,168 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-07-20 21:19:58,168 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2018-07-20 21:19:58,168 INFO L87 Difference]: Start difference. First operand 150 states and 150 transitions. Second operand 49 states. [2018-07-20 21:19:58,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:19:58,272 INFO L93 Difference]: Finished difference Result 159 states and 159 transitions. [2018-07-20 21:19:58,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-07-20 21:19:58,273 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 149 [2018-07-20 21:19:58,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:19:58,274 INFO L225 Difference]: With dead ends: 159 [2018-07-20 21:19:58,274 INFO L226 Difference]: Without dead ends: 154 [2018-07-20 21:19:58,274 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 643 GetRequests, 549 SyntacticMatches, 0 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2018-07-20 21:19:58,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-07-20 21:19:58,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 153. [2018-07-20 21:19:58,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-07-20 21:19:58,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 153 transitions. [2018-07-20 21:19:58,278 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 153 transitions. Word has length 149 [2018-07-20 21:19:58,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:19:58,279 INFO L471 AbstractCegarLoop]: Abstraction has 153 states and 153 transitions. [2018-07-20 21:19:58,279 INFO L472 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-07-20 21:19:58,279 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 153 transitions. [2018-07-20 21:19:58,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-07-20 21:19:58,279 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:19:58,279 INFO L358 BasicCegarLoop]: trace histogram [48, 47, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:19:58,280 INFO L414 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:19:58,280 INFO L82 PathProgramCache]: Analyzing trace with hash 1961443757, now seen corresponding path program 47 times [2018-07-20 21:19:58,280 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:19:58,280 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:19:58,280 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:19:58,280 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:19:58,280 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:19:58,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:19:59,106 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:59,106 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:59,119 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:19:59,119 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:19:59,120 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:19:59,120 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:19:59,120 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:19:59,127 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:19:59,127 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:19:59,885 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 48 check-sat command(s) [2018-07-20 21:19:59,885 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:19:59,889 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:19:59,908 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:19:59,908 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:20:02,088 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:20:02,110 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:20:02,110 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:20:02,124 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-20 21:20:02,125 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-20 21:20:10,588 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 48 check-sat command(s) [2018-07-20 21:20:10,588 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:20:10,595 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:20:10,614 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:20:10,614 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:20:10,636 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:20:10,639 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-20 21:20:10,639 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 98 [2018-07-20 21:20:10,639 INFO L249 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-20 21:20:10,639 INFO L450 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-07-20 21:20:10,640 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-07-20 21:20:10,640 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4753, Invalid=4753, Unknown=0, NotChecked=0, Total=9506 [2018-07-20 21:20:10,640 INFO L87 Difference]: Start difference. First operand 153 states and 153 transitions. Second operand 50 states. [2018-07-20 21:20:11,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-20 21:20:11,246 INFO L93 Difference]: Finished difference Result 162 states and 162 transitions. [2018-07-20 21:20:11,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-07-20 21:20:11,247 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 152 [2018-07-20 21:20:11,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-20 21:20:11,248 INFO L225 Difference]: With dead ends: 162 [2018-07-20 21:20:11,248 INFO L226 Difference]: Without dead ends: 157 [2018-07-20 21:20:11,249 INFO L578 BasicCegarLoop]: 0 DeclaredPredicates, 656 GetRequests, 560 SyntacticMatches, 0 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=4753, Invalid=4753, Unknown=0, NotChecked=0, Total=9506 [2018-07-20 21:20:11,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-07-20 21:20:11,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 156. [2018-07-20 21:20:11,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-07-20 21:20:11,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 156 transitions. [2018-07-20 21:20:11,254 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 156 transitions. Word has length 152 [2018-07-20 21:20:11,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-20 21:20:11,255 INFO L471 AbstractCegarLoop]: Abstraction has 156 states and 156 transitions. [2018-07-20 21:20:11,255 INFO L472 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-07-20 21:20:11,255 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 156 transitions. [2018-07-20 21:20:11,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-07-20 21:20:11,256 INFO L350 BasicCegarLoop]: Found error trace [2018-07-20 21:20:11,256 INFO L358 BasicCegarLoop]: trace histogram [49, 48, 48, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-20 21:20:11,256 INFO L414 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_f_storage_ultimate_trunk_examples_svcomp_loop_acceleration_array_false_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-20 21:20:11,257 INFO L82 PathProgramCache]: Analyzing trace with hash -309447630, now seen corresponding path program 48 times [2018-07-20 21:20:11,257 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-20 21:20:11,257 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:20:11,257 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-20 21:20:11,257 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-20 21:20:11,258 INFO L282 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-20 21:20:11,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-20 21:20:12,232 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:20:12,233 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:20:12,233 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-20 21:20:12,233 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-20 21:20:12,233 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-20 21:20:12,233 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:20:12,233 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-20 21:20:12,239 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:20:12,239 INFO L282 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-20 21:20:12,506 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 49 check-sat command(s) [2018-07-20 21:20:12,506 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-20 21:20:12,510 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-20 21:20:12,530 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:20:12,530 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-20 21:20:14,794 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-20 21:20:14,814 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-20 21:20:14,815 INFO L189 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-20 21:20:14,831 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-20 21:20:14,831 INFO L282 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown