java -Xmx8000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml --generate-csv --csv-dir csv -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-acceleration/const_false-unreach-call1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dd2f093 [2018-07-24 10:48:00,813 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-07-24 10:48:00,815 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-07-24 10:48:00,832 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-07-24 10:48:00,832 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-07-24 10:48:00,834 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-07-24 10:48:00,835 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-07-24 10:48:00,837 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-07-24 10:48:00,838 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-07-24 10:48:00,843 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-07-24 10:48:00,844 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-07-24 10:48:00,844 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-07-24 10:48:00,845 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-07-24 10:48:00,846 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-07-24 10:48:00,850 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-07-24 10:48:00,852 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-07-24 10:48:00,852 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-07-24 10:48:00,859 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-07-24 10:48:00,862 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-07-24 10:48:00,863 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-07-24 10:48:00,867 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-07-24 10:48:00,869 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-07-24 10:48:00,876 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-07-24 10:48:00,877 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-07-24 10:48:00,877 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-07-24 10:48:00,878 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-07-24 10:48:00,879 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-07-24 10:48:00,880 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-07-24 10:48:00,880 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-07-24 10:48:00,881 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-07-24 10:48:00,882 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-07-24 10:48:00,882 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-07-24 10:48:00,882 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-07-24 10:48:00,883 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-07-24 10:48:00,884 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-07-24 10:48:00,884 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-07-24 10:48:00,885 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-07-24 10:48:00,905 INFO L110 SettingsManager]: Loading preferences was successful [2018-07-24 10:48:00,906 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-07-24 10:48:00,906 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-07-24 10:48:00,907 INFO L133 SettingsManager]: * User list type=DISABLED [2018-07-24 10:48:00,907 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-07-24 10:48:00,907 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-07-24 10:48:00,907 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-07-24 10:48:00,908 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-07-24 10:48:00,908 INFO L133 SettingsManager]: * Log string format=TERM [2018-07-24 10:48:00,908 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-07-24 10:48:00,908 INFO L133 SettingsManager]: * Interval Domain=false [2018-07-24 10:48:00,909 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-07-24 10:48:00,909 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-07-24 10:48:00,909 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-07-24 10:48:00,910 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-07-24 10:48:00,910 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-07-24 10:48:00,910 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-07-24 10:48:00,910 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-07-24 10:48:00,910 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-07-24 10:48:00,911 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-07-24 10:48:00,911 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-07-24 10:48:00,911 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-07-24 10:48:00,911 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-07-24 10:48:00,911 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 10:48:00,912 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-07-24 10:48:00,912 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-07-24 10:48:00,912 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-07-24 10:48:00,912 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-07-24 10:48:00,912 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-07-24 10:48:00,913 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-07-24 10:48:00,913 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-07-24 10:48:00,913 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-07-24 10:48:00,913 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-07-24 10:48:00,957 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-07-24 10:48:00,971 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-07-24 10:48:00,978 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-07-24 10:48:00,980 INFO L271 PluginConnector]: Initializing CDTParser... [2018-07-24 10:48:00,980 INFO L276 PluginConnector]: CDTParser initialized [2018-07-24 10:48:00,981 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/const_false-unreach-call1.i [2018-07-24 10:48:01,389 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ca13025a4/4bbb5b64616346e8be422b5d4f0cbe23/FLAGb45fb23d4 [2018-07-24 10:48:01,525 INFO L276 CDTParser]: Found 1 translation units. [2018-07-24 10:48:01,526 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/const_false-unreach-call1.i [2018-07-24 10:48:01,532 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ca13025a4/4bbb5b64616346e8be422b5d4f0cbe23/FLAGb45fb23d4 [2018-07-24 10:48:01,547 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ca13025a4/4bbb5b64616346e8be422b5d4f0cbe23 [2018-07-24 10:48:01,558 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-07-24 10:48:01,559 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-07-24 10:48:01,561 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-07-24 10:48:01,561 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-07-24 10:48:01,568 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-07-24 10:48:01,569 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,572 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75c82f05 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01, skipping insertion in model container [2018-07-24 10:48:01,572 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,726 INFO L179 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-07-24 10:48:01,762 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 10:48:01,779 INFO L422 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-07-24 10:48:01,783 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 10:48:01,797 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01 WrapperNode [2018-07-24 10:48:01,797 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-07-24 10:48:01,798 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-07-24 10:48:01,798 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-07-24 10:48:01,798 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-07-24 10:48:01,809 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,815 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,822 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-07-24 10:48:01,822 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-07-24 10:48:01,822 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-07-24 10:48:01,823 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-07-24 10:48:01,833 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,834 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,834 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,835 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,836 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,842 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,843 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (1/1) ... [2018-07-24 10:48:01,844 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-07-24 10:48:01,845 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-07-24 10:48:01,845 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-07-24 10:48:01,845 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-07-24 10:48:01,847 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 10:48:01,919 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-07-24 10:48:01,920 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-07-24 10:48:01,920 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-07-24 10:48:01,920 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-07-24 10:48:01,920 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-07-24 10:48:01,921 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-07-24 10:48:01,921 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assert [2018-07-24 10:48:01,921 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assert [2018-07-24 10:48:02,289 INFO L261 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-07-24 10:48:02,290 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 10:48:02 BoogieIcfgContainer [2018-07-24 10:48:02,290 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-07-24 10:48:02,291 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-07-24 10:48:02,291 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-07-24 10:48:02,294 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-07-24 10:48:02,294 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.07 10:48:01" (1/3) ... [2018-07-24 10:48:02,295 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1cca78b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 10:48:02, skipping insertion in model container [2018-07-24 10:48:02,295 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:48:01" (2/3) ... [2018-07-24 10:48:02,296 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1cca78b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 10:48:02, skipping insertion in model container [2018-07-24 10:48:02,296 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 10:48:02" (3/3) ... [2018-07-24 10:48:02,298 INFO L112 eAbstractionObserver]: Analyzing ICFG const_false-unreach-call1.i [2018-07-24 10:48:02,308 INFO L132 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-07-24 10:48:02,317 INFO L144 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-07-24 10:48:02,366 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-07-24 10:48:02,367 INFO L373 AbstractCegarLoop]: Interprodecural is true [2018-07-24 10:48:02,367 INFO L374 AbstractCegarLoop]: Hoare is true [2018-07-24 10:48:02,367 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-07-24 10:48:02,367 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-07-24 10:48:02,368 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-07-24 10:48:02,368 INFO L378 AbstractCegarLoop]: Difference is false [2018-07-24 10:48:02,368 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-07-24 10:48:02,368 INFO L384 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-07-24 10:48:02,384 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states. [2018-07-24 10:48:02,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-07-24 10:48:02,390 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:02,391 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:02,391 INFO L414 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:02,397 INFO L82 PathProgramCache]: Analyzing trace with hash -10373566, now seen corresponding path program 1 times [2018-07-24 10:48:02,400 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:02,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:02,451 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:48:02,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:02,451 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:02,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:02,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:02,510 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:48:02,510 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-07-24 10:48:02,510 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:48:02,514 INFO L450 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-07-24 10:48:02,526 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-07-24 10:48:02,527 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-24 10:48:02,529 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 2 states. [2018-07-24 10:48:02,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:02,553 INFO L93 Difference]: Finished difference Result 29 states and 32 transitions. [2018-07-24 10:48:02,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-07-24 10:48:02,555 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-07-24 10:48:02,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:02,564 INFO L225 Difference]: With dead ends: 29 [2018-07-24 10:48:02,565 INFO L226 Difference]: Without dead ends: 12 [2018-07-24 10:48:02,570 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-24 10:48:02,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states. [2018-07-24 10:48:02,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2018-07-24 10:48:02,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-07-24 10:48:02,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 12 transitions. [2018-07-24 10:48:02,616 INFO L78 Accepts]: Start accepts. Automaton has 12 states and 12 transitions. Word has length 10 [2018-07-24 10:48:02,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:02,616 INFO L471 AbstractCegarLoop]: Abstraction has 12 states and 12 transitions. [2018-07-24 10:48:02,617 INFO L472 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-07-24 10:48:02,617 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2018-07-24 10:48:02,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-07-24 10:48:02,618 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:02,618 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:02,618 INFO L414 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:02,619 INFO L82 PathProgramCache]: Analyzing trace with hash -571410792, now seen corresponding path program 1 times [2018-07-24 10:48:02,619 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:02,620 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:02,620 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:48:02,621 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:02,621 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:02,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:02,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:02,749 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:48:02,749 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-24 10:48:02,750 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:48:02,752 INFO L450 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-07-24 10:48:02,752 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-07-24 10:48:02,752 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-24 10:48:02,753 INFO L87 Difference]: Start difference. First operand 12 states and 12 transitions. Second operand 3 states. [2018-07-24 10:48:02,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:02,802 INFO L93 Difference]: Finished difference Result 19 states and 19 transitions. [2018-07-24 10:48:02,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-07-24 10:48:02,803 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-07-24 10:48:02,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:02,804 INFO L225 Difference]: With dead ends: 19 [2018-07-24 10:48:02,804 INFO L226 Difference]: Without dead ends: 14 [2018-07-24 10:48:02,806 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-24 10:48:02,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2018-07-24 10:48:02,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2018-07-24 10:48:02,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-07-24 10:48:02,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 14 transitions. [2018-07-24 10:48:02,811 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 14 transitions. Word has length 11 [2018-07-24 10:48:02,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:02,811 INFO L471 AbstractCegarLoop]: Abstraction has 14 states and 14 transitions. [2018-07-24 10:48:02,811 INFO L472 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-07-24 10:48:02,812 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-07-24 10:48:02,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-07-24 10:48:02,812 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:02,812 INFO L353 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:02,813 INFO L414 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:02,813 INFO L82 PathProgramCache]: Analyzing trace with hash 1625028318, now seen corresponding path program 1 times [2018-07-24 10:48:02,813 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:02,814 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:02,815 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:48:02,815 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:02,815 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:02,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:02,960 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:02,961 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:02,961 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:02,973 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:48:02,973 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:48:03,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:03,008 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:03,068 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:03,068 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:03,158 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:03,185 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:03,186 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:03,205 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:48:03,205 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:48:03,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:03,224 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:03,245 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:03,246 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:03,268 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:03,270 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:03,270 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-07-24 10:48:03,271 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:03,271 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 10:48:03,271 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 10:48:03,272 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-07-24 10:48:03,272 INFO L87 Difference]: Start difference. First operand 14 states and 14 transitions. Second operand 4 states. [2018-07-24 10:48:03,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:03,301 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-07-24 10:48:03,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 10:48:03,302 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-07-24 10:48:03,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:03,303 INFO L225 Difference]: With dead ends: 21 [2018-07-24 10:48:03,303 INFO L226 Difference]: Without dead ends: 16 [2018-07-24 10:48:03,304 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 48 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-07-24 10:48:03,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-07-24 10:48:03,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-07-24 10:48:03,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-07-24 10:48:03,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-07-24 10:48:03,314 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 13 [2018-07-24 10:48:03,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:03,314 INFO L471 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-07-24 10:48:03,314 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 10:48:03,314 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-07-24 10:48:03,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-07-24 10:48:03,315 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:03,315 INFO L353 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:03,315 INFO L414 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:03,316 INFO L82 PathProgramCache]: Analyzing trace with hash -720896604, now seen corresponding path program 2 times [2018-07-24 10:48:03,316 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:03,317 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:03,319 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:48:03,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:03,319 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:03,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:03,524 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:03,524 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:03,524 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:03,533 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:48:03,533 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:48:03,547 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:48:03,548 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:03,553 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:03,627 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:03,629 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:03,823 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:03,844 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:03,845 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:03,861 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:48:03,862 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:48:03,884 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:48:03,885 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:03,888 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:03,905 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:03,905 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:03,928 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:03,931 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:03,932 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-07-24 10:48:03,932 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:03,932 INFO L450 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-07-24 10:48:03,933 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-07-24 10:48:03,933 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-07-24 10:48:03,933 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 5 states. [2018-07-24 10:48:04,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:04,001 INFO L93 Difference]: Finished difference Result 23 states and 23 transitions. [2018-07-24 10:48:04,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-07-24 10:48:04,003 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-07-24 10:48:04,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:04,004 INFO L225 Difference]: With dead ends: 23 [2018-07-24 10:48:04,004 INFO L226 Difference]: Without dead ends: 18 [2018-07-24 10:48:04,006 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 55 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-07-24 10:48:04,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-07-24 10:48:04,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-07-24 10:48:04,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-07-24 10:48:04,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2018-07-24 10:48:04,013 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 15 [2018-07-24 10:48:04,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:04,013 INFO L471 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2018-07-24 10:48:04,013 INFO L472 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-07-24 10:48:04,014 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-07-24 10:48:04,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-07-24 10:48:04,014 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:04,014 INFO L353 BasicCegarLoop]: trace histogram [4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:04,015 INFO L414 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:04,015 INFO L82 PathProgramCache]: Analyzing trace with hash -296916246, now seen corresponding path program 3 times [2018-07-24 10:48:04,015 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:04,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:04,017 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:48:04,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:04,017 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:04,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:04,185 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:04,185 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:04,186 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:04,196 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:48:04,197 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:48:04,212 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-07-24 10:48:04,212 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:04,215 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:04,296 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:04,296 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:04,753 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:04,774 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:04,775 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:04,791 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:48:04,791 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:48:04,828 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-07-24 10:48:04,828 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:04,832 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:04,843 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:04,844 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:04,855 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:04,857 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:04,857 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 10 [2018-07-24 10:48:04,857 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:04,858 INFO L450 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-07-24 10:48:04,858 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-07-24 10:48:04,859 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-07-24 10:48:04,859 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand 6 states. [2018-07-24 10:48:04,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:04,913 INFO L93 Difference]: Finished difference Result 25 states and 25 transitions. [2018-07-24 10:48:04,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-07-24 10:48:04,914 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-07-24 10:48:04,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:04,915 INFO L225 Difference]: With dead ends: 25 [2018-07-24 10:48:04,915 INFO L226 Difference]: Without dead ends: 20 [2018-07-24 10:48:04,915 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 62 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-07-24 10:48:04,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-07-24 10:48:04,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-07-24 10:48:04,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-07-24 10:48:04,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-07-24 10:48:04,920 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 17 [2018-07-24 10:48:04,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:04,921 INFO L471 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-07-24 10:48:04,921 INFO L472 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-07-24 10:48:04,921 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-07-24 10:48:04,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-07-24 10:48:04,922 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:04,922 INFO L353 BasicCegarLoop]: trace histogram [5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:04,922 INFO L414 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:04,922 INFO L82 PathProgramCache]: Analyzing trace with hash -873685328, now seen corresponding path program 4 times [2018-07-24 10:48:04,923 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:04,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:04,924 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:48:04,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:04,924 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:04,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:05,253 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:05,253 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:05,254 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:05,273 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:48:05,274 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:48:05,319 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:48:05,320 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:05,322 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:05,392 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:05,392 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:05,784 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:05,805 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:05,806 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:05,822 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:48:05,822 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:48:05,842 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:48:05,842 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:05,846 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:05,859 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:05,859 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:05,882 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:05,883 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:05,884 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 12 [2018-07-24 10:48:05,884 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:05,884 INFO L450 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-07-24 10:48:05,885 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-07-24 10:48:05,885 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-07-24 10:48:05,886 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-07-24 10:48:05,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:05,953 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-07-24 10:48:05,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-07-24 10:48:05,953 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-07-24 10:48:05,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:05,954 INFO L225 Difference]: With dead ends: 27 [2018-07-24 10:48:05,954 INFO L226 Difference]: Without dead ends: 22 [2018-07-24 10:48:05,955 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-07-24 10:48:05,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-07-24 10:48:05,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-07-24 10:48:05,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-07-24 10:48:05,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-07-24 10:48:05,960 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 19 [2018-07-24 10:48:05,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:05,960 INFO L471 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-07-24 10:48:05,960 INFO L472 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-07-24 10:48:05,960 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-07-24 10:48:05,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-07-24 10:48:05,961 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:05,961 INFO L353 BasicCegarLoop]: trace histogram [6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:05,962 INFO L414 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:05,962 INFO L82 PathProgramCache]: Analyzing trace with hash -1097991946, now seen corresponding path program 5 times [2018-07-24 10:48:05,962 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:05,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:05,963 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:48:05,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:05,963 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:05,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:06,084 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:06,085 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:06,085 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:06,094 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:48:06,095 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:48:06,120 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-24 10:48:06,120 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:06,123 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:06,149 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:06,149 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:06,909 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:06,938 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:06,938 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:06,954 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:48:06,955 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:48:07,002 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-24 10:48:07,003 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:07,006 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:07,026 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:07,027 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:07,038 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:07,040 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:07,040 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-07-24 10:48:07,040 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:07,041 INFO L450 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-07-24 10:48:07,041 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-07-24 10:48:07,042 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-07-24 10:48:07,042 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 8 states. [2018-07-24 10:48:07,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:07,267 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-07-24 10:48:07,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-07-24 10:48:07,268 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-07-24 10:48:07,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:07,270 INFO L225 Difference]: With dead ends: 29 [2018-07-24 10:48:07,270 INFO L226 Difference]: Without dead ends: 24 [2018-07-24 10:48:07,271 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-07-24 10:48:07,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-07-24 10:48:07,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-07-24 10:48:07,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-07-24 10:48:07,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-07-24 10:48:07,275 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 21 [2018-07-24 10:48:07,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:07,275 INFO L471 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-07-24 10:48:07,276 INFO L472 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-07-24 10:48:07,276 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-07-24 10:48:07,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-07-24 10:48:07,277 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:07,277 INFO L353 BasicCegarLoop]: trace histogram [7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:07,277 INFO L414 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:07,277 INFO L82 PathProgramCache]: Analyzing trace with hash -1908287044, now seen corresponding path program 6 times [2018-07-24 10:48:07,277 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:07,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:07,278 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:48:07,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:07,279 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:07,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:07,499 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:07,500 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:07,500 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:07,508 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:48:07,508 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:48:07,535 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-07-24 10:48:07,535 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:07,537 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:07,553 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:07,553 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:08,712 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:08,732 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:08,732 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:08,747 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:48:08,748 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:48:08,805 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-07-24 10:48:08,806 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:08,809 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:08,824 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:08,824 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:08,834 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:08,836 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:08,836 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 16 [2018-07-24 10:48:08,837 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:08,837 INFO L450 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-07-24 10:48:08,837 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-07-24 10:48:08,837 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-07-24 10:48:08,838 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 9 states. [2018-07-24 10:48:08,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:08,903 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-07-24 10:48:08,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-07-24 10:48:08,905 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 23 [2018-07-24 10:48:08,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:08,905 INFO L225 Difference]: With dead ends: 31 [2018-07-24 10:48:08,906 INFO L226 Difference]: Without dead ends: 26 [2018-07-24 10:48:08,906 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 83 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-07-24 10:48:08,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-07-24 10:48:08,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-07-24 10:48:08,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-07-24 10:48:08,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-07-24 10:48:08,911 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 23 [2018-07-24 10:48:08,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:08,911 INFO L471 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-07-24 10:48:08,911 INFO L472 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-07-24 10:48:08,912 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-07-24 10:48:08,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-07-24 10:48:08,912 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:08,912 INFO L353 BasicCegarLoop]: trace histogram [8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:08,913 INFO L414 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:08,913 INFO L82 PathProgramCache]: Analyzing trace with hash 1082171650, now seen corresponding path program 7 times [2018-07-24 10:48:08,913 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:08,914 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:08,914 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:48:08,914 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:08,914 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:08,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:09,088 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:09,088 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:09,088 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:09,099 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:48:09,099 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:48:09,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:09,112 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:09,126 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:09,127 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:10,761 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:10,782 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:10,782 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:10,798 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:48:10,798 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:48:10,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:10,827 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:10,870 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:10,870 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:10,877 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:10,879 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:10,879 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 18 [2018-07-24 10:48:10,879 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:10,880 INFO L450 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-07-24 10:48:10,880 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-07-24 10:48:10,880 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-07-24 10:48:10,881 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 10 states. [2018-07-24 10:48:10,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:10,974 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-07-24 10:48:10,983 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-07-24 10:48:10,984 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 25 [2018-07-24 10:48:10,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:10,984 INFO L225 Difference]: With dead ends: 33 [2018-07-24 10:48:10,984 INFO L226 Difference]: Without dead ends: 28 [2018-07-24 10:48:10,985 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-07-24 10:48:10,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-07-24 10:48:10,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-07-24 10:48:10,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-07-24 10:48:10,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-07-24 10:48:10,990 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 25 [2018-07-24 10:48:10,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:10,990 INFO L471 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-07-24 10:48:10,990 INFO L472 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-07-24 10:48:10,990 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-07-24 10:48:10,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-07-24 10:48:10,991 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:10,991 INFO L353 BasicCegarLoop]: trace histogram [9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:10,992 INFO L414 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:10,992 INFO L82 PathProgramCache]: Analyzing trace with hash 1579855560, now seen corresponding path program 8 times [2018-07-24 10:48:10,992 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:10,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:10,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:48:10,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:10,993 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:11,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:11,156 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:11,156 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:11,157 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:11,164 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:48:11,164 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:48:11,190 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:48:11,190 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:11,192 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:11,224 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:11,225 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:13,995 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:14,016 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:14,016 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:14,032 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:48:14,032 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:48:14,061 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:48:14,061 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:14,065 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:14,088 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:14,088 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:14,107 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:14,108 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:14,109 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-07-24 10:48:14,109 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:14,110 INFO L450 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-07-24 10:48:14,110 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-07-24 10:48:14,110 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-07-24 10:48:14,111 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 11 states. [2018-07-24 10:48:14,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:14,222 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-07-24 10:48:14,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-07-24 10:48:14,222 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 27 [2018-07-24 10:48:14,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:14,223 INFO L225 Difference]: With dead ends: 35 [2018-07-24 10:48:14,223 INFO L226 Difference]: Without dead ends: 30 [2018-07-24 10:48:14,224 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 97 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-07-24 10:48:14,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-07-24 10:48:14,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-07-24 10:48:14,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-07-24 10:48:14,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-07-24 10:48:14,229 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 27 [2018-07-24 10:48:14,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:14,230 INFO L471 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-07-24 10:48:14,230 INFO L472 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-07-24 10:48:14,230 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-07-24 10:48:14,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-07-24 10:48:14,231 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:14,231 INFO L353 BasicCegarLoop]: trace histogram [10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:14,231 INFO L414 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:14,231 INFO L82 PathProgramCache]: Analyzing trace with hash -1182244082, now seen corresponding path program 9 times [2018-07-24 10:48:14,232 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:14,232 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:14,233 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:48:14,233 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:14,233 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:14,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:14,509 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:14,510 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:14,510 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:14,524 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:48:14,524 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:48:14,642 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-07-24 10:48:14,642 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:14,646 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:14,672 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:14,672 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:23,483 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 88 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:23,515 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:23,515 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:23,535 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:48:23,535 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:48:23,647 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-07-24 10:48:23,647 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:23,650 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:23,666 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:23,667 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:23,674 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 88 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:23,675 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:23,675 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 22 [2018-07-24 10:48:23,676 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:23,676 INFO L450 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-07-24 10:48:23,676 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-07-24 10:48:23,676 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=320, Unknown=1, NotChecked=0, Total=462 [2018-07-24 10:48:23,677 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 12 states. [2018-07-24 10:48:23,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:23,861 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-07-24 10:48:23,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-07-24 10:48:23,863 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 29 [2018-07-24 10:48:23,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:23,864 INFO L225 Difference]: With dead ends: 37 [2018-07-24 10:48:23,864 INFO L226 Difference]: Without dead ends: 32 [2018-07-24 10:48:23,865 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=141, Invalid=320, Unknown=1, NotChecked=0, Total=462 [2018-07-24 10:48:23,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-07-24 10:48:23,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-07-24 10:48:23,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-07-24 10:48:23,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-07-24 10:48:23,869 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 29 [2018-07-24 10:48:23,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:23,870 INFO L471 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-07-24 10:48:23,870 INFO L472 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-07-24 10:48:23,870 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-07-24 10:48:23,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-07-24 10:48:23,871 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:23,871 INFO L353 BasicCegarLoop]: trace histogram [11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:23,871 INFO L414 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:23,871 INFO L82 PathProgramCache]: Analyzing trace with hash -1270211116, now seen corresponding path program 10 times [2018-07-24 10:48:23,872 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:23,872 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:23,872 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:48:23,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:23,873 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:23,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:24,091 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:24,092 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:24,092 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:24,102 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:48:24,103 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:48:24,116 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:48:24,116 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:24,118 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:24,135 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:24,135 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:31,941 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 108 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:31,963 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:31,963 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:31,981 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:48:31,981 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:48:32,018 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:48:32,018 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:32,023 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:32,092 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:32,093 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:32,148 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 108 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:32,150 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:32,151 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 24 [2018-07-24 10:48:32,151 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:32,151 INFO L450 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-07-24 10:48:32,152 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-07-24 10:48:32,152 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=385, Unknown=1, NotChecked=0, Total=552 [2018-07-24 10:48:32,152 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 13 states. [2018-07-24 10:48:32,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:32,578 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-07-24 10:48:32,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-07-24 10:48:32,579 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 31 [2018-07-24 10:48:32,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:32,580 INFO L225 Difference]: With dead ends: 39 [2018-07-24 10:48:32,580 INFO L226 Difference]: Without dead ends: 34 [2018-07-24 10:48:32,581 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 8.0s TimeCoverageRelationStatistics Valid=166, Invalid=385, Unknown=1, NotChecked=0, Total=552 [2018-07-24 10:48:32,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-07-24 10:48:32,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-07-24 10:48:32,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-07-24 10:48:32,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-07-24 10:48:32,587 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 31 [2018-07-24 10:48:32,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:32,587 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-07-24 10:48:32,587 INFO L472 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-07-24 10:48:32,588 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-07-24 10:48:32,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-07-24 10:48:32,589 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:32,589 INFO L353 BasicCegarLoop]: trace histogram [12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:32,589 INFO L414 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:32,590 INFO L82 PathProgramCache]: Analyzing trace with hash 92815130, now seen corresponding path program 11 times [2018-07-24 10:48:32,590 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:32,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:32,591 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:48:32,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:32,591 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:32,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:32,853 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:32,854 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:32,854 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:32,864 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:48:32,864 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:48:51,472 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-07-24 10:48:51,472 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:51,585 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:51,593 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:51,593 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:58,805 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:58,828 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:58,829 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:48:58,843 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:48:58,844 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:48:58,961 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-07-24 10:48:58,962 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:48:58,965 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:48:58,980 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:58,980 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:48:58,993 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:58,995 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:48:58,995 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-07-24 10:48:58,995 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:48:58,996 INFO L450 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-07-24 10:48:58,996 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-07-24 10:48:58,997 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-07-24 10:48:58,997 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 14 states. [2018-07-24 10:48:59,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:48:59,138 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-07-24 10:48:59,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-07-24 10:48:59,139 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 33 [2018-07-24 10:48:59,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:48:59,140 INFO L225 Difference]: With dead ends: 41 [2018-07-24 10:48:59,140 INFO L226 Difference]: Without dead ends: 36 [2018-07-24 10:48:59,141 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 7.4s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-07-24 10:48:59,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-07-24 10:48:59,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-07-24 10:48:59,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-07-24 10:48:59,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-07-24 10:48:59,145 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 33 [2018-07-24 10:48:59,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:48:59,146 INFO L471 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-07-24 10:48:59,146 INFO L472 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-07-24 10:48:59,146 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-07-24 10:48:59,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-07-24 10:48:59,147 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:48:59,147 INFO L353 BasicCegarLoop]: trace histogram [13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:48:59,147 INFO L414 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:48:59,147 INFO L82 PathProgramCache]: Analyzing trace with hash -3987744, now seen corresponding path program 12 times [2018-07-24 10:48:59,147 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:48:59,148 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:59,148 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:48:59,148 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:48:59,149 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:48:59,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:48:59,479 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:48:59,479 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:48:59,479 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:48:59,487 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:48:59,488 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:49:01,841 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-07-24 10:49:01,842 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:49:01,854 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:49:01,887 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:01,887 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:49:10,638 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:10,659 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:49:10,659 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:49:10,674 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:49:10,674 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:49:10,836 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-07-24 10:49:10,836 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:49:10,840 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:49:10,865 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:10,865 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:49:10,927 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:10,930 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:49:10,931 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-07-24 10:49:10,931 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:49:10,931 INFO L450 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-07-24 10:49:10,932 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-07-24 10:49:10,932 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-07-24 10:49:10,932 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 15 states. [2018-07-24 10:49:11,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:49:11,127 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-07-24 10:49:11,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-07-24 10:49:11,127 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 35 [2018-07-24 10:49:11,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:49:11,129 INFO L225 Difference]: With dead ends: 43 [2018-07-24 10:49:11,129 INFO L226 Difference]: Without dead ends: 38 [2018-07-24 10:49:11,129 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 125 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-07-24 10:49:11,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-07-24 10:49:11,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-07-24 10:49:11,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-07-24 10:49:11,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-07-24 10:49:11,134 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 35 [2018-07-24 10:49:11,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:49:11,135 INFO L471 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-07-24 10:49:11,135 INFO L472 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-07-24 10:49:11,135 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-07-24 10:49:11,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-07-24 10:49:11,136 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:49:11,136 INFO L353 BasicCegarLoop]: trace histogram [14, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:49:11,136 INFO L414 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:49:11,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1457730854, now seen corresponding path program 13 times [2018-07-24 10:49:11,136 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:49:11,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:49:11,137 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:49:11,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:49:11,137 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:49:11,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:49:11,470 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:11,470 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:49:11,470 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:49:11,480 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:49:11,480 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:49:11,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:49:11,494 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:49:11,515 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:11,515 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:49:21,976 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 180 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:21,996 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:49:21,996 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:49:22,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:49:22,016 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:49:22,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:49:22,057 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:49:22,119 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:22,119 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:49:22,126 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 180 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:22,128 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:49:22,128 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-07-24 10:49:22,128 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:49:22,128 INFO L450 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-07-24 10:49:22,128 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-07-24 10:49:22,129 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=615, Unknown=2, NotChecked=0, Total=870 [2018-07-24 10:49:22,129 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 16 states. [2018-07-24 10:49:22,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:49:22,288 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-07-24 10:49:22,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-07-24 10:49:22,289 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 37 [2018-07-24 10:49:22,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:49:22,290 INFO L225 Difference]: With dead ends: 45 [2018-07-24 10:49:22,290 INFO L226 Difference]: Without dead ends: 40 [2018-07-24 10:49:22,291 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 10.7s TimeCoverageRelationStatistics Valid=253, Invalid=615, Unknown=2, NotChecked=0, Total=870 [2018-07-24 10:49:22,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-07-24 10:49:22,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-07-24 10:49:22,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-07-24 10:49:22,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-07-24 10:49:22,295 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 37 [2018-07-24 10:49:22,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:49:22,296 INFO L471 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-07-24 10:49:22,296 INFO L472 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-07-24 10:49:22,296 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-07-24 10:49:22,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-07-24 10:49:22,297 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:49:22,297 INFO L353 BasicCegarLoop]: trace histogram [15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:49:22,297 INFO L414 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:49:22,297 INFO L82 PathProgramCache]: Analyzing trace with hash 1714997740, now seen corresponding path program 14 times [2018-07-24 10:49:22,297 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:49:22,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:49:22,298 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:49:22,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:49:22,299 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:49:22,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:49:22,564 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:22,565 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:49:22,565 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:49:22,574 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:49:22,574 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:49:22,592 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:49:22,593 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:49:22,594 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:49:22,601 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:22,601 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:49:33,955 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:33,974 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:49:33,975 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:49:33,989 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:49:33,989 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:49:34,024 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:49:34,025 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:49:34,028 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:49:34,054 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:34,055 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:49:34,068 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:34,070 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:49:34,070 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-07-24 10:49:34,070 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:49:34,070 INFO L450 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-07-24 10:49:34,071 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-07-24 10:49:34,071 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=705, Unknown=1, NotChecked=0, Total=992 [2018-07-24 10:49:34,071 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 17 states. [2018-07-24 10:49:34,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:49:34,248 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-07-24 10:49:34,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-07-24 10:49:34,255 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 39 [2018-07-24 10:49:34,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:49:34,256 INFO L225 Difference]: With dead ends: 47 [2018-07-24 10:49:34,256 INFO L226 Difference]: Without dead ends: 42 [2018-07-24 10:49:34,257 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 139 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 11.5s TimeCoverageRelationStatistics Valid=286, Invalid=705, Unknown=1, NotChecked=0, Total=992 [2018-07-24 10:49:34,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-07-24 10:49:34,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-07-24 10:49:34,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-07-24 10:49:34,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-07-24 10:49:34,263 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 39 [2018-07-24 10:49:34,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:49:34,263 INFO L471 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-07-24 10:49:34,263 INFO L472 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-07-24 10:49:34,263 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-07-24 10:49:34,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-07-24 10:49:34,264 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:49:34,264 INFO L353 BasicCegarLoop]: trace histogram [16, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:49:34,264 INFO L414 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:49:34,265 INFO L82 PathProgramCache]: Analyzing trace with hash -159627982, now seen corresponding path program 15 times [2018-07-24 10:49:34,265 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:49:34,267 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:49:34,267 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:49:34,267 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:49:34,267 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:49:34,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:49:34,611 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:34,611 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:49:34,611 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:49:34,619 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:49:34,620 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:49:34,854 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-07-24 10:49:34,855 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:49:34,858 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:49:34,876 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:34,876 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:49:51,106 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 236 refuted. 4 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:51,126 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:49:51,126 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:49:51,142 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:49:51,142 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:49:51,378 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-07-24 10:49:51,379 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:49:51,382 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:49:51,405 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:51,405 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:49:51,425 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 236 refuted. 4 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:51,427 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:49:51,427 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 34 [2018-07-24 10:49:51,427 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:49:51,428 INFO L450 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-07-24 10:49:51,428 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-07-24 10:49:51,428 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=321, Invalid=799, Unknown=2, NotChecked=0, Total=1122 [2018-07-24 10:49:51,428 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 18 states. [2018-07-24 10:49:51,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:49:51,727 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-07-24 10:49:51,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-07-24 10:49:51,727 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 41 [2018-07-24 10:49:51,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:49:51,728 INFO L225 Difference]: With dead ends: 49 [2018-07-24 10:49:51,728 INFO L226 Difference]: Without dead ends: 44 [2018-07-24 10:49:51,729 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 146 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 16.5s TimeCoverageRelationStatistics Valid=321, Invalid=799, Unknown=2, NotChecked=0, Total=1122 [2018-07-24 10:49:51,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-07-24 10:49:51,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-07-24 10:49:51,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-07-24 10:49:51,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-07-24 10:49:51,734 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 41 [2018-07-24 10:49:51,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:49:51,734 INFO L471 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-07-24 10:49:51,734 INFO L472 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-07-24 10:49:51,734 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-07-24 10:49:51,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-07-24 10:49:51,735 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:49:51,735 INFO L353 BasicCegarLoop]: trace histogram [17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:49:51,735 INFO L414 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:49:51,736 INFO L82 PathProgramCache]: Analyzing trace with hash -2083649800, now seen corresponding path program 16 times [2018-07-24 10:49:51,736 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:49:51,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:49:51,736 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:49:51,737 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:49:51,737 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:49:51,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:49:52,050 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:52,050 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:49:52,050 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:49:52,058 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:49:52,058 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:49:52,078 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:49:52,078 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:49:52,079 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:49:52,099 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:49:52,099 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:08,849 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 270 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:08,869 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:08,869 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:50:08,884 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:50:08,884 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:50:08,924 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:50:08,924 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:50:08,928 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:08,985 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:08,985 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:09,010 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 270 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:09,011 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:50:09,012 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 36 [2018-07-24 10:50:09,012 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:50:09,012 INFO L450 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-07-24 10:50:09,012 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-07-24 10:50:09,013 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=358, Invalid=900, Unknown=2, NotChecked=0, Total=1260 [2018-07-24 10:50:09,013 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 19 states. [2018-07-24 10:50:09,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:09,329 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-07-24 10:50:09,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-07-24 10:50:09,330 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 43 [2018-07-24 10:50:09,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:09,331 INFO L225 Difference]: With dead ends: 51 [2018-07-24 10:50:09,331 INFO L226 Difference]: Without dead ends: 46 [2018-07-24 10:50:09,332 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 17.0s TimeCoverageRelationStatistics Valid=358, Invalid=900, Unknown=2, NotChecked=0, Total=1260 [2018-07-24 10:50:09,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-07-24 10:50:09,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-07-24 10:50:09,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-07-24 10:50:09,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-07-24 10:50:09,338 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 43 [2018-07-24 10:50:09,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:09,339 INFO L471 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-07-24 10:50:09,339 INFO L472 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-07-24 10:50:09,339 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-07-24 10:50:09,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-07-24 10:50:09,340 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:09,340 INFO L353 BasicCegarLoop]: trace histogram [18, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:09,340 INFO L414 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:09,340 INFO L82 PathProgramCache]: Analyzing trace with hash 62287678, now seen corresponding path program 17 times [2018-07-24 10:50:09,342 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:09,343 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:09,343 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:50:09,343 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:09,343 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:09,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:10,009 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:10,009 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:10,009 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:50:10,017 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:50:10,017 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:50:56,682 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-07-24 10:50:56,682 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:50:56,830 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:56,841 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:56,841 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:10,741 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:10,761 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:10,761 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:51:10,776 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:51:10,776 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:51:11,047 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-07-24 10:51:11,047 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:11,051 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:11,101 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:11,101 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:19,830 WARN L169 SmtUtils]: Spent 987.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 12 [2018-07-24 10:51:22,920 WARN L169 SmtUtils]: Spent 654.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 12 [2018-07-24 10:51:27,161 WARN L169 SmtUtils]: Spent 1.39 s on a formula simplification. DAG size of input: 14 DAG size of output: 12 [2018-07-24 10:51:29,993 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:29,997 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:51:29,997 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 43 [2018-07-24 10:51:29,997 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:51:29,997 INFO L450 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-07-24 10:51:29,998 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-07-24 10:51:29,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=512, Invalid=1293, Unknown=1, NotChecked=0, Total=1806 [2018-07-24 10:51:29,999 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 20 states. [2018-07-24 10:51:30,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:30,574 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-07-24 10:51:30,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-07-24 10:51:30,575 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 45 [2018-07-24 10:51:30,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:30,576 INFO L225 Difference]: With dead ends: 53 [2018-07-24 10:51:30,576 INFO L226 Difference]: Without dead ends: 48 [2018-07-24 10:51:30,576 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 151 SyntacticMatches, 6 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 172 ImplicationChecksByTransitivity, 33.4s TimeCoverageRelationStatistics Valid=512, Invalid=1293, Unknown=1, NotChecked=0, Total=1806 [2018-07-24 10:51:30,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-07-24 10:51:30,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-07-24 10:51:30,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-07-24 10:51:30,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-07-24 10:51:30,580 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 45 [2018-07-24 10:51:30,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:30,580 INFO L471 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-07-24 10:51:30,580 INFO L472 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-07-24 10:51:30,580 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-07-24 10:51:30,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-07-24 10:51:30,581 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:30,581 INFO L353 BasicCegarLoop]: trace histogram [19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:30,581 INFO L414 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:30,581 INFO L82 PathProgramCache]: Analyzing trace with hash 723901956, now seen corresponding path program 18 times [2018-07-24 10:51:30,582 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:30,582 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:30,582 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:51:30,582 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:30,582 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:30,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:30,983 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:30,983 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:30,983 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:30,991 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:51:30,991 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:51:33,244 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-07-24 10:51:33,244 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:33,249 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:33,277 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:33,277 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:01,103 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 338 refuted. 4 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:01,123 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:01,123 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:52:01,139 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:52:01,139 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:52:01,476 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-07-24 10:52:01,476 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:52:01,480 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:01,488 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:01,488 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:01,496 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 338 refuted. 4 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:01,498 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:52:01,498 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 40 [2018-07-24 10:52:01,498 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:52:01,498 INFO L450 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-07-24 10:52:01,499 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-07-24 10:52:01,500 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=438, Invalid=1117, Unknown=5, NotChecked=0, Total=1560 [2018-07-24 10:52:01,500 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 21 states. [2018-07-24 10:52:01,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:52:01,829 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-07-24 10:52:01,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-07-24 10:52:01,830 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 47 [2018-07-24 10:52:01,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:52:01,831 INFO L225 Difference]: With dead ends: 55 [2018-07-24 10:52:01,831 INFO L226 Difference]: Without dead ends: 50 [2018-07-24 10:52:01,832 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 167 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 28.1s TimeCoverageRelationStatistics Valid=438, Invalid=1117, Unknown=5, NotChecked=0, Total=1560 [2018-07-24 10:52:01,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-07-24 10:52:01,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-07-24 10:52:01,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-07-24 10:52:01,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-07-24 10:52:01,836 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 47 [2018-07-24 10:52:01,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:52:01,836 INFO L471 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-07-24 10:52:01,837 INFO L472 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-07-24 10:52:01,837 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-07-24 10:52:01,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-07-24 10:52:01,837 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:52:01,837 INFO L353 BasicCegarLoop]: trace histogram [20, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:52:01,838 INFO L414 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:52:01,838 INFO L82 PathProgramCache]: Analyzing trace with hash 880063306, now seen corresponding path program 19 times [2018-07-24 10:52:01,838 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:52:01,838 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:01,839 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:52:01,839 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:01,839 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:52:01,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:52:02,170 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 380 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:02,170 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:02,170 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:52:02,178 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:52:02,178 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:52:02,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:52:02,203 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:02,265 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 380 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:02,265 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:32,245 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 376 refuted. 4 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:32,265 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:32,266 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:52:32,281 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:52:32,281 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:52:32,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:52:32,331 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:32,359 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 380 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:32,359 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:32,370 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 376 refuted. 4 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:32,372 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:52:32,372 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 42 [2018-07-24 10:52:32,372 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:52:32,372 INFO L450 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-07-24 10:52:32,373 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-07-24 10:52:32,373 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=481, Invalid=1234, Unknown=7, NotChecked=0, Total=1722 [2018-07-24 10:52:32,373 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 22 states. [2018-07-24 10:52:32,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:52:32,754 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-07-24 10:52:32,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-07-24 10:52:32,754 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 49 [2018-07-24 10:52:32,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:52:32,755 INFO L225 Difference]: With dead ends: 57 [2018-07-24 10:52:32,755 INFO L226 Difference]: Without dead ends: 52 [2018-07-24 10:52:32,757 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 30.3s TimeCoverageRelationStatistics Valid=481, Invalid=1234, Unknown=7, NotChecked=0, Total=1722 [2018-07-24 10:52:32,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-07-24 10:52:32,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-07-24 10:52:32,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-07-24 10:52:32,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-07-24 10:52:32,761 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 49 [2018-07-24 10:52:32,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:52:32,761 INFO L471 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-07-24 10:52:32,761 INFO L472 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-07-24 10:52:32,761 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-07-24 10:52:32,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-07-24 10:52:32,762 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:52:32,762 INFO L353 BasicCegarLoop]: trace histogram [21, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:52:32,762 INFO L414 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_const_false_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:52:32,762 INFO L82 PathProgramCache]: Analyzing trace with hash 627265296, now seen corresponding path program 20 times [2018-07-24 10:52:32,762 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:52:32,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:32,763 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:52:32,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:32,763 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:52:32,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:52:33,182 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 0 proven. 420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:33,182 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:33,182 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:52:33,190 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:52:33,190 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:52:33,213 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:52:33,213 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:52:33,215 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:33,241 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 0 proven. 420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:33,241 INFO L316 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-07-24 10:52:44,668 INFO L177 TraceCheckSpWp]: Timeout while computing interpolants [2018-07-24 10:52:44,869 WARN L512 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 40 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:52:44,869 WARN L540 AbstractCegarLoop]: Verification canceled [2018-07-24 10:52:44,875 WARN L202 ceAbstractionStarter]: Timeout [2018-07-24 10:52:44,875 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.07 10:52:44 BoogieIcfgContainer [2018-07-24 10:52:44,875 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-07-24 10:52:44,876 INFO L168 Benchmark]: Toolchain (without parser) took 283317.58 ms. Allocated memory was 1.5 GB in the beginning and 2.6 GB in the end (delta: 1.1 GB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -830.8 MB). Peak memory consumption was 237.7 MB. Max. memory is 7.1 GB. [2018-07-24 10:52:44,877 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:52:44,877 INFO L168 Benchmark]: CACSL2BoogieTranslator took 236.57 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-07-24 10:52:44,882 INFO L168 Benchmark]: Boogie Procedure Inliner took 24.02 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:52:44,882 INFO L168 Benchmark]: Boogie Preprocessor took 22.35 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:52:44,883 INFO L168 Benchmark]: RCFGBuilder took 444.81 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 770.7 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -819.0 MB). Peak memory consumption was 27.1 MB. Max. memory is 7.1 GB. [2018-07-24 10:52:44,883 INFO L168 Benchmark]: TraceAbstraction took 282584.59 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 297.8 MB). Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: -22.4 MB). Peak memory consumption was 275.4 MB. Max. memory is 7.1 GB. [2018-07-24 10:52:44,887 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 236.57 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 24.02 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 22.35 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 444.81 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 770.7 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -819.0 MB). Peak memory consumption was 27.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 282584.59 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 297.8 MB). Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: -22.4 MB). Peak memory consumption was 275.4 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 4]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 4). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 21, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 39 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 18 locations, 1 error locations. TIMEOUT Result, 282.5s OverallTime, 22 OverallIterations, 21 TraceHistogramMax, 4.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 428 SDtfs, 0 SDslu, 4341 SDs, 0 SdLazy, 3290 SolverSat, 0 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2570 GetRequests, 2104 SyntacticMatches, 42 SemanticMatches, 424 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 363 ImplicationChecksByTransitivity, 190.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=52occurred in iteration=21, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 21 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 72.3s SatisfiabilityAnalysisTime, 192.4s InterpolantComputationTime, 1788 NumberOfCodeBlocks, 1788 NumberOfCodeBlocksAsserted, 263 NumberOfCheckSat, 2869 ConstructedInterpolants, 0 QuantifiedInterpolants, 540585 SizeOfPredicates, 38 NumberOfNonLiveVariables, 3230 ConjunctsInSsa, 878 ConjunctsInUnsatCore, 97 InterpolantComputations, 2 PerfectInterpolantSequences, 0/13300 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/const_false-unreach-call1.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-07-24_10-52-44-904.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/const_false-unreach-call1.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-07-24_10-52-44-904.csv Completed graceful shutdown