java -Xmx8000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml --generate-csv --csv-dir csv -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-new/count_by_k_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dd2f093 [2018-07-24 10:57:49,476 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-07-24 10:57:49,478 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-07-24 10:57:49,494 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-07-24 10:57:49,494 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-07-24 10:57:49,495 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-07-24 10:57:49,496 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-07-24 10:57:49,498 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-07-24 10:57:49,500 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-07-24 10:57:49,501 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-07-24 10:57:49,502 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-07-24 10:57:49,502 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-07-24 10:57:49,503 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-07-24 10:57:49,504 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-07-24 10:57:49,505 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-07-24 10:57:49,506 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-07-24 10:57:49,507 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-07-24 10:57:49,509 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-07-24 10:57:49,511 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-07-24 10:57:49,512 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-07-24 10:57:49,514 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-07-24 10:57:49,515 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-07-24 10:57:49,518 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-07-24 10:57:49,518 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-07-24 10:57:49,518 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-07-24 10:57:49,519 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-07-24 10:57:49,520 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-07-24 10:57:49,521 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-07-24 10:57:49,522 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-07-24 10:57:49,523 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-07-24 10:57:49,523 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-07-24 10:57:49,524 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-07-24 10:57:49,524 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-07-24 10:57:49,525 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-07-24 10:57:49,526 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-07-24 10:57:49,527 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-07-24 10:57:49,527 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-07-24 10:57:49,543 INFO L110 SettingsManager]: Loading preferences was successful [2018-07-24 10:57:49,543 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-07-24 10:57:49,544 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-07-24 10:57:49,544 INFO L133 SettingsManager]: * User list type=DISABLED [2018-07-24 10:57:49,544 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-07-24 10:57:49,545 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-07-24 10:57:49,545 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-07-24 10:57:49,545 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-07-24 10:57:49,545 INFO L133 SettingsManager]: * Log string format=TERM [2018-07-24 10:57:49,545 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-07-24 10:57:49,545 INFO L133 SettingsManager]: * Interval Domain=false [2018-07-24 10:57:49,546 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-07-24 10:57:49,546 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-07-24 10:57:49,547 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-07-24 10:57:49,547 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-07-24 10:57:49,547 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-07-24 10:57:49,547 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-07-24 10:57:49,547 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-07-24 10:57:49,548 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-07-24 10:57:49,548 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-07-24 10:57:49,548 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-07-24 10:57:49,548 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-07-24 10:57:49,548 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-07-24 10:57:49,549 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 10:57:49,549 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-07-24 10:57:49,549 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-07-24 10:57:49,549 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-07-24 10:57:49,549 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-07-24 10:57:49,550 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-07-24 10:57:49,550 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-07-24 10:57:49,550 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-07-24 10:57:49,550 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-07-24 10:57:49,550 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-07-24 10:57:49,593 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-07-24 10:57:49,608 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-07-24 10:57:49,615 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-07-24 10:57:49,617 INFO L271 PluginConnector]: Initializing CDTParser... [2018-07-24 10:57:49,617 INFO L276 PluginConnector]: CDTParser initialized [2018-07-24 10:57:49,618 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-new/count_by_k_true-unreach-call_true-termination.i [2018-07-24 10:57:49,963 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/589ea10a3/52ad54ce53424af5ab024c3ce593ef85/FLAGbf86374bc [2018-07-24 10:57:50,110 INFO L276 CDTParser]: Found 1 translation units. [2018-07-24 10:57:50,110 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-new/count_by_k_true-unreach-call_true-termination.i [2018-07-24 10:57:50,116 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/589ea10a3/52ad54ce53424af5ab024c3ce593ef85/FLAGbf86374bc [2018-07-24 10:57:50,132 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/589ea10a3/52ad54ce53424af5ab024c3ce593ef85 [2018-07-24 10:57:50,143 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-07-24 10:57:50,146 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-07-24 10:57:50,147 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-07-24 10:57:50,148 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-07-24 10:57:50,157 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-07-24 10:57:50,158 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,161 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6f3ef425 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50, skipping insertion in model container [2018-07-24 10:57:50,161 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,332 INFO L179 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-07-24 10:57:50,369 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 10:57:50,389 INFO L422 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-07-24 10:57:50,398 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 10:57:50,412 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50 WrapperNode [2018-07-24 10:57:50,413 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-07-24 10:57:50,413 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-07-24 10:57:50,414 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-07-24 10:57:50,414 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-07-24 10:57:50,422 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,428 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,433 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-07-24 10:57:50,434 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-07-24 10:57:50,434 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-07-24 10:57:50,434 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-07-24 10:57:50,441 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,441 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,442 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,442 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,444 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,448 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,449 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (1/1) ... [2018-07-24 10:57:50,450 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-07-24 10:57:50,450 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-07-24 10:57:50,450 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-07-24 10:57:50,451 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-07-24 10:57:50,451 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 10:57:50,515 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-07-24 10:57:50,516 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-07-24 10:57:50,516 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-07-24 10:57:50,516 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-07-24 10:57:50,516 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-07-24 10:57:50,516 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-07-24 10:57:50,516 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assert [2018-07-24 10:57:50,517 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assert [2018-07-24 10:57:50,810 INFO L261 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-07-24 10:57:50,811 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 10:57:50 BoogieIcfgContainer [2018-07-24 10:57:50,811 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-07-24 10:57:50,812 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-07-24 10:57:50,813 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-07-24 10:57:50,816 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-07-24 10:57:50,816 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.07 10:57:50" (1/3) ... [2018-07-24 10:57:50,817 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3fb08f31 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 10:57:50, skipping insertion in model container [2018-07-24 10:57:50,817 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:57:50" (2/3) ... [2018-07-24 10:57:50,818 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3fb08f31 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 10:57:50, skipping insertion in model container [2018-07-24 10:57:50,818 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 10:57:50" (3/3) ... [2018-07-24 10:57:50,820 INFO L112 eAbstractionObserver]: Analyzing ICFG count_by_k_true-unreach-call_true-termination.i [2018-07-24 10:57:50,831 INFO L132 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-07-24 10:57:50,839 INFO L144 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-07-24 10:57:50,931 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-07-24 10:57:50,933 INFO L373 AbstractCegarLoop]: Interprodecural is true [2018-07-24 10:57:50,933 INFO L374 AbstractCegarLoop]: Hoare is true [2018-07-24 10:57:50,933 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-07-24 10:57:50,933 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-07-24 10:57:50,933 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-07-24 10:57:50,934 INFO L378 AbstractCegarLoop]: Difference is false [2018-07-24 10:57:50,934 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-07-24 10:57:50,934 INFO L384 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-07-24 10:57:50,955 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-07-24 10:57:50,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-07-24 10:57:50,962 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:57:50,963 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:57:50,964 INFO L414 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:57:50,969 INFO L82 PathProgramCache]: Analyzing trace with hash 1152414567, now seen corresponding path program 1 times [2018-07-24 10:57:50,972 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:57:51,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:51,044 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:57:51,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:51,044 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:57:51,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:51,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:51,116 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:57:51,116 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-07-24 10:57:51,116 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:57:51,121 INFO L450 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-07-24 10:57:51,137 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-07-24 10:57:51,137 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-24 10:57:51,142 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 2 states. [2018-07-24 10:57:51,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:57:51,162 INFO L93 Difference]: Finished difference Result 33 states and 37 transitions. [2018-07-24 10:57:51,162 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-07-24 10:57:51,163 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 11 [2018-07-24 10:57:51,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:57:51,173 INFO L225 Difference]: With dead ends: 33 [2018-07-24 10:57:51,173 INFO L226 Difference]: Without dead ends: 14 [2018-07-24 10:57:51,181 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-24 10:57:51,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2018-07-24 10:57:51,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2018-07-24 10:57:51,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-07-24 10:57:51,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 14 transitions. [2018-07-24 10:57:51,216 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 14 transitions. Word has length 11 [2018-07-24 10:57:51,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:57:51,217 INFO L471 AbstractCegarLoop]: Abstraction has 14 states and 14 transitions. [2018-07-24 10:57:51,217 INFO L472 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-07-24 10:57:51,218 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-07-24 10:57:51,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-07-24 10:57:51,218 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:57:51,219 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:57:51,219 INFO L414 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:57:51,219 INFO L82 PathProgramCache]: Analyzing trace with hash 1083883255, now seen corresponding path program 1 times [2018-07-24 10:57:51,219 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:57:51,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:51,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:57:51,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:51,221 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:57:51,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:51,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:51,463 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:57:51,464 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-07-24 10:57:51,464 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:57:51,466 INFO L450 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-07-24 10:57:51,466 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-07-24 10:57:51,466 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-07-24 10:57:51,467 INFO L87 Difference]: Start difference. First operand 14 states and 14 transitions. Second operand 6 states. [2018-07-24 10:57:51,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:57:51,857 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-07-24 10:57:51,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-07-24 10:57:51,858 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 12 [2018-07-24 10:57:51,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:57:51,859 INFO L225 Difference]: With dead ends: 21 [2018-07-24 10:57:51,859 INFO L226 Difference]: Without dead ends: 16 [2018-07-24 10:57:51,860 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-07-24 10:57:51,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-07-24 10:57:51,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-07-24 10:57:51,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-07-24 10:57:51,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-07-24 10:57:51,865 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 12 [2018-07-24 10:57:51,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:57:51,866 INFO L471 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-07-24 10:57:51,866 INFO L472 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-07-24 10:57:51,866 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-07-24 10:57:51,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-07-24 10:57:51,867 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:57:51,867 INFO L353 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:57:51,867 INFO L414 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:57:51,868 INFO L82 PathProgramCache]: Analyzing trace with hash 1128913667, now seen corresponding path program 1 times [2018-07-24 10:57:51,868 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:57:51,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:51,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:57:51,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:51,869 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:57:51,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:51,998 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:51,999 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:51,999 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:57:52,011 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:57:52,011 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:57:52,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:52,055 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:52,205 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:52,206 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:52,311 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:52,333 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:52,333 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:57:52,351 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:57:52,351 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:57:52,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:52,369 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:52,375 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:52,376 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:52,635 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:52,639 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:57:52,639 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-07-24 10:57:52,640 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:57:52,640 INFO L450 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-07-24 10:57:52,641 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-07-24 10:57:52,641 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-07-24 10:57:52,641 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 7 states. [2018-07-24 10:57:52,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:57:52,853 INFO L93 Difference]: Finished difference Result 30 states and 32 transitions. [2018-07-24 10:57:52,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-07-24 10:57:52,855 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 [2018-07-24 10:57:52,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:57:52,856 INFO L225 Difference]: With dead ends: 30 [2018-07-24 10:57:52,856 INFO L226 Difference]: Without dead ends: 25 [2018-07-24 10:57:52,858 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 53 SyntacticMatches, 4 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-07-24 10:57:52,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-07-24 10:57:52,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-07-24 10:57:52,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-07-24 10:57:52,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-07-24 10:57:52,865 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 15 [2018-07-24 10:57:52,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:57:52,865 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-07-24 10:57:52,865 INFO L472 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-07-24 10:57:52,866 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-07-24 10:57:52,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-07-24 10:57:52,867 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:57:52,867 INFO L353 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:57:52,867 INFO L414 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:57:52,867 INFO L82 PathProgramCache]: Analyzing trace with hash 1437681655, now seen corresponding path program 2 times [2018-07-24 10:57:52,868 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:57:52,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:52,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:57:52,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:52,869 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:57:52,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:53,118 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:53,118 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:53,118 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:57:53,134 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:57:53,134 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:57:53,155 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:57:53,156 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:53,158 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:53,353 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:53,353 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:53,852 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:53,872 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:53,873 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:57:53,889 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:57:53,889 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:57:53,907 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:57:53,907 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:53,911 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:53,920 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:53,920 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:54,014 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:54,016 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:57:54,016 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-07-24 10:57:54,016 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:57:54,017 INFO L450 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-07-24 10:57:54,017 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-07-24 10:57:54,017 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-07-24 10:57:54,018 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 10 states. [2018-07-24 10:57:54,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:57:54,265 INFO L93 Difference]: Finished difference Result 39 states and 41 transitions. [2018-07-24 10:57:54,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-07-24 10:57:54,265 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 24 [2018-07-24 10:57:54,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:57:54,266 INFO L225 Difference]: With dead ends: 39 [2018-07-24 10:57:54,266 INFO L226 Difference]: Without dead ends: 34 [2018-07-24 10:57:54,267 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 86 SyntacticMatches, 4 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=127, Invalid=253, Unknown=0, NotChecked=0, Total=380 [2018-07-24 10:57:54,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-07-24 10:57:54,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-07-24 10:57:54,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-07-24 10:57:54,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-07-24 10:57:54,274 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 24 [2018-07-24 10:57:54,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:57:54,274 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-07-24 10:57:54,275 INFO L472 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-07-24 10:57:54,275 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-07-24 10:57:54,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-07-24 10:57:54,276 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:57:54,276 INFO L353 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:57:54,276 INFO L414 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:57:54,277 INFO L82 PathProgramCache]: Analyzing trace with hash -656200317, now seen corresponding path program 3 times [2018-07-24 10:57:54,277 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:57:54,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:54,278 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:57:54,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:54,278 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:57:54,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:54,540 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:54,541 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:54,541 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:57:54,553 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:57:54,553 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:57:54,576 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-07-24 10:57:54,577 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:54,579 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:54,660 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:54,660 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:54,964 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:54,993 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:54,994 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:57:55,009 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:57:55,010 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:57:55,054 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-07-24 10:57:55,054 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:55,060 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:55,071 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:55,072 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:55,157 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:55,159 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:57:55,159 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-07-24 10:57:55,159 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:57:55,160 INFO L450 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-07-24 10:57:55,160 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-07-24 10:57:55,161 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=261, Unknown=0, NotChecked=0, Total=380 [2018-07-24 10:57:55,161 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 13 states. [2018-07-24 10:57:55,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:57:55,546 INFO L93 Difference]: Finished difference Result 48 states and 50 transitions. [2018-07-24 10:57:55,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-07-24 10:57:55,548 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 33 [2018-07-24 10:57:55,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:57:55,549 INFO L225 Difference]: With dead ends: 48 [2018-07-24 10:57:55,549 INFO L226 Difference]: Without dead ends: 43 [2018-07-24 10:57:55,550 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 119 SyntacticMatches, 4 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=277, Invalid=535, Unknown=0, NotChecked=0, Total=812 [2018-07-24 10:57:55,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-07-24 10:57:55,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-07-24 10:57:55,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-07-24 10:57:55,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-07-24 10:57:55,558 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 33 [2018-07-24 10:57:55,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:57:55,558 INFO L471 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-07-24 10:57:55,558 INFO L472 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-07-24 10:57:55,559 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-07-24 10:57:55,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-07-24 10:57:55,560 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:57:55,560 INFO L353 BasicCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:57:55,561 INFO L414 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:57:55,561 INFO L82 PathProgramCache]: Analyzing trace with hash -1490238089, now seen corresponding path program 4 times [2018-07-24 10:57:55,561 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:57:55,562 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:55,562 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:57:55,562 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:55,563 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:57:55,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:55,860 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:55,860 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:55,861 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:57:55,868 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:57:55,869 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:57:55,889 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:57:55,890 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:55,892 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:55,970 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:55,970 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:56,482 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:56,502 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:56,503 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:57:56,519 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:57:56,519 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:57:56,543 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:57:56,544 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:56,549 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:56,562 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:56,563 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:56,832 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:56,836 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:57:56,836 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-07-24 10:57:56,836 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:57:56,837 INFO L450 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-07-24 10:57:56,839 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-07-24 10:57:56,839 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=209, Invalid=441, Unknown=0, NotChecked=0, Total=650 [2018-07-24 10:57:56,839 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 16 states. [2018-07-24 10:57:57,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:57:57,532 INFO L93 Difference]: Finished difference Result 57 states and 59 transitions. [2018-07-24 10:57:57,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-07-24 10:57:57,532 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-07-24 10:57:57,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:57:57,533 INFO L225 Difference]: With dead ends: 57 [2018-07-24 10:57:57,534 INFO L226 Difference]: Without dead ends: 52 [2018-07-24 10:57:57,535 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 152 SyntacticMatches, 4 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=490, Invalid=916, Unknown=0, NotChecked=0, Total=1406 [2018-07-24 10:57:57,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-07-24 10:57:57,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-07-24 10:57:57,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-07-24 10:57:57,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-07-24 10:57:57,543 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 42 [2018-07-24 10:57:57,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:57:57,543 INFO L471 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-07-24 10:57:57,543 INFO L472 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-07-24 10:57:57,544 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-07-24 10:57:57,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-07-24 10:57:57,545 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:57:57,545 INFO L353 BasicCegarLoop]: trace histogram [14, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:57:57,546 INFO L414 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:57:57,546 INFO L82 PathProgramCache]: Analyzing trace with hash 45932547, now seen corresponding path program 5 times [2018-07-24 10:57:57,546 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:57:57,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:57,547 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:57:57,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:57,548 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:57:57,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:58,367 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:58,368 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:58,368 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:57:58,377 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:57:58,378 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:57:58,413 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-07-24 10:57:58,413 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:58,417 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:58,491 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:58,492 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:59,305 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:59,327 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:59,327 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:57:59,343 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:57:59,344 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:57:59,411 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-07-24 10:57:59,411 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:59,415 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:59,431 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:59,431 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:59,586 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:59,589 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:57:59,589 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-07-24 10:57:59,589 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:57:59,590 INFO L450 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-07-24 10:57:59,590 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-07-24 10:57:59,591 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=326, Invalid=666, Unknown=0, NotChecked=0, Total=992 [2018-07-24 10:57:59,591 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 19 states. [2018-07-24 10:58:00,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:00,283 INFO L93 Difference]: Finished difference Result 66 states and 68 transitions. [2018-07-24 10:58:00,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-07-24 10:58:00,286 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 51 [2018-07-24 10:58:00,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:00,287 INFO L225 Difference]: With dead ends: 66 [2018-07-24 10:58:00,287 INFO L226 Difference]: Without dead ends: 61 [2018-07-24 10:58:00,289 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 234 GetRequests, 185 SyntacticMatches, 4 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 235 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=766, Invalid=1396, Unknown=0, NotChecked=0, Total=2162 [2018-07-24 10:58:00,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-07-24 10:58:00,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-07-24 10:58:00,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-07-24 10:58:00,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 61 transitions. [2018-07-24 10:58:00,296 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 61 transitions. Word has length 51 [2018-07-24 10:58:00,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:00,297 INFO L471 AbstractCegarLoop]: Abstraction has 61 states and 61 transitions. [2018-07-24 10:58:00,297 INFO L472 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-07-24 10:58:00,297 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 61 transitions. [2018-07-24 10:58:00,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-07-24 10:58:00,299 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:00,299 INFO L353 BasicCegarLoop]: trace histogram [17, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:00,299 INFO L414 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:00,299 INFO L82 PathProgramCache]: Analyzing trace with hash -1227627785, now seen corresponding path program 6 times [2018-07-24 10:58:00,299 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:00,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:00,300 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:58:00,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:00,301 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:00,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:01,231 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:01,231 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:01,231 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:01,238 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:58:01,239 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:58:01,290 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2018-07-24 10:58:01,290 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:01,293 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:01,429 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:01,429 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:01,977 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:01,998 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:01,998 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:02,013 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:58:02,013 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:58:02,110 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2018-07-24 10:58:02,110 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:02,114 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:02,130 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:02,130 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:02,255 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:02,260 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:02,260 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 38 [2018-07-24 10:58:02,260 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:02,261 INFO L450 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-07-24 10:58:02,261 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-07-24 10:58:02,262 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=470, Invalid=936, Unknown=0, NotChecked=0, Total=1406 [2018-07-24 10:58:02,262 INFO L87 Difference]: Start difference. First operand 61 states and 61 transitions. Second operand 22 states. [2018-07-24 10:58:03,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:03,281 INFO L93 Difference]: Finished difference Result 75 states and 77 transitions. [2018-07-24 10:58:03,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-07-24 10:58:03,282 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-07-24 10:58:03,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:03,283 INFO L225 Difference]: With dead ends: 75 [2018-07-24 10:58:03,283 INFO L226 Difference]: Without dead ends: 70 [2018-07-24 10:58:03,284 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 276 GetRequests, 218 SyntacticMatches, 4 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 310 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1105, Invalid=1975, Unknown=0, NotChecked=0, Total=3080 [2018-07-24 10:58:03,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-07-24 10:58:03,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2018-07-24 10:58:03,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-07-24 10:58:03,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 70 transitions. [2018-07-24 10:58:03,294 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 70 transitions. Word has length 60 [2018-07-24 10:58:03,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:03,294 INFO L471 AbstractCegarLoop]: Abstraction has 70 states and 70 transitions. [2018-07-24 10:58:03,294 INFO L472 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-07-24 10:58:03,294 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 70 transitions. [2018-07-24 10:58:03,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-07-24 10:58:03,296 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:03,296 INFO L353 BasicCegarLoop]: trace histogram [20, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:03,296 INFO L414 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:03,296 INFO L82 PathProgramCache]: Analyzing trace with hash 360641155, now seen corresponding path program 7 times [2018-07-24 10:58:03,296 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:03,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:03,297 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:58:03,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:03,297 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:03,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:04,383 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:04,383 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:04,383 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:04,391 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:58:04,391 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:58:04,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:04,424 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:04,645 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:04,645 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:05,470 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:05,491 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:05,491 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:05,508 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:58:05,508 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:58:05,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:05,548 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:05,564 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:05,564 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:05,884 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:05,887 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:05,887 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 44 [2018-07-24 10:58:05,887 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:05,888 INFO L450 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-07-24 10:58:05,890 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-07-24 10:58:05,891 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=641, Invalid=1251, Unknown=0, NotChecked=0, Total=1892 [2018-07-24 10:58:05,892 INFO L87 Difference]: Start difference. First operand 70 states and 70 transitions. Second operand 25 states. [2018-07-24 10:58:07,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:07,155 INFO L93 Difference]: Finished difference Result 84 states and 86 transitions. [2018-07-24 10:58:07,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-07-24 10:58:07,158 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 69 [2018-07-24 10:58:07,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:07,160 INFO L225 Difference]: With dead ends: 84 [2018-07-24 10:58:07,160 INFO L226 Difference]: Without dead ends: 79 [2018-07-24 10:58:07,162 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 318 GetRequests, 251 SyntacticMatches, 4 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 394 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=1507, Invalid=2653, Unknown=0, NotChecked=0, Total=4160 [2018-07-24 10:58:07,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-07-24 10:58:07,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-07-24 10:58:07,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-07-24 10:58:07,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 79 transitions. [2018-07-24 10:58:07,169 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 79 transitions. Word has length 69 [2018-07-24 10:58:07,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:07,170 INFO L471 AbstractCegarLoop]: Abstraction has 79 states and 79 transitions. [2018-07-24 10:58:07,170 INFO L472 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-07-24 10:58:07,170 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 79 transitions. [2018-07-24 10:58:07,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-07-24 10:58:07,171 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:07,172 INFO L353 BasicCegarLoop]: trace histogram [23, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:07,172 INFO L414 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:07,172 INFO L82 PathProgramCache]: Analyzing trace with hash -318857097, now seen corresponding path program 8 times [2018-07-24 10:58:07,172 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:07,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:07,173 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:58:07,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:07,173 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:07,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:07,638 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:07,639 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:07,639 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:07,646 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:58:07,646 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:58:07,679 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:58:07,679 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:07,692 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:07,784 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:07,785 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:09,325 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:09,345 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:09,345 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:09,361 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:58:09,361 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:58:09,398 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:58:09,398 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:09,402 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:09,532 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:09,533 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:09,682 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:09,684 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:09,684 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 55 [2018-07-24 10:58:09,685 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:09,685 INFO L450 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-07-24 10:58:09,686 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-07-24 10:58:09,687 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=982, Invalid=1988, Unknown=0, NotChecked=0, Total=2970 [2018-07-24 10:58:09,687 INFO L87 Difference]: Start difference. First operand 79 states and 79 transitions. Second operand 28 states. [2018-07-24 10:58:10,443 WARN L169 SmtUtils]: Spent 309.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 11 [2018-07-24 10:58:11,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:11,507 INFO L93 Difference]: Finished difference Result 93 states and 95 transitions. [2018-07-24 10:58:11,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-07-24 10:58:11,508 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 78 [2018-07-24 10:58:11,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:11,510 INFO L225 Difference]: With dead ends: 93 [2018-07-24 10:58:11,510 INFO L226 Difference]: Without dead ends: 88 [2018-07-24 10:58:11,513 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 278 SyntacticMatches, 6 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 794 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=2153, Invalid=3853, Unknown=0, NotChecked=0, Total=6006 [2018-07-24 10:58:11,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-07-24 10:58:11,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-07-24 10:58:11,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-07-24 10:58:11,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 88 transitions. [2018-07-24 10:58:11,522 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 88 transitions. Word has length 78 [2018-07-24 10:58:11,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:11,522 INFO L471 AbstractCegarLoop]: Abstraction has 88 states and 88 transitions. [2018-07-24 10:58:11,522 INFO L472 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-07-24 10:58:11,522 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 88 transitions. [2018-07-24 10:58:11,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-07-24 10:58:11,524 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:11,524 INFO L353 BasicCegarLoop]: trace histogram [26, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:11,524 INFO L414 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:11,524 INFO L82 PathProgramCache]: Analyzing trace with hash -1949211389, now seen corresponding path program 9 times [2018-07-24 10:58:11,524 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:11,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:11,525 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:58:11,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:11,526 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:11,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:12,393 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:12,393 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:12,394 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:12,408 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:58:12,408 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:58:12,451 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 26 check-sat command(s) [2018-07-24 10:58:12,452 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:12,457 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:12,550 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:12,550 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:14,404 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:14,425 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:14,425 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:14,440 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:58:14,441 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:58:14,610 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 26 check-sat command(s) [2018-07-24 10:58:14,610 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:14,614 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:14,633 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:14,633 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:14,778 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:14,780 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:14,780 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 56 [2018-07-24 10:58:14,781 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:14,781 INFO L450 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-07-24 10:58:14,781 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-07-24 10:58:14,782 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1064, Invalid=2016, Unknown=0, NotChecked=0, Total=3080 [2018-07-24 10:58:14,782 INFO L87 Difference]: Start difference. First operand 88 states and 88 transitions. Second operand 31 states. [2018-07-24 10:58:15,527 WARN L169 SmtUtils]: Spent 241.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 11 [2018-07-24 10:58:15,840 WARN L169 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 11 [2018-07-24 10:58:16,987 WARN L169 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 11 [2018-07-24 10:58:17,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:17,429 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2018-07-24 10:58:17,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-07-24 10:58:17,429 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 87 [2018-07-24 10:58:17,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:17,430 INFO L225 Difference]: With dead ends: 102 [2018-07-24 10:58:17,431 INFO L226 Difference]: Without dead ends: 97 [2018-07-24 10:58:17,433 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 402 GetRequests, 317 SyntacticMatches, 4 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 589 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=2500, Invalid=4306, Unknown=0, NotChecked=0, Total=6806 [2018-07-24 10:58:17,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-07-24 10:58:17,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2018-07-24 10:58:17,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-07-24 10:58:17,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 97 transitions. [2018-07-24 10:58:17,442 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 97 transitions. Word has length 87 [2018-07-24 10:58:17,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:17,443 INFO L471 AbstractCegarLoop]: Abstraction has 97 states and 97 transitions. [2018-07-24 10:58:17,443 INFO L472 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-07-24 10:58:17,443 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 97 transitions. [2018-07-24 10:58:17,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-07-24 10:58:17,445 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:17,445 INFO L353 BasicCegarLoop]: trace histogram [29, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:17,446 INFO L414 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:17,446 INFO L82 PathProgramCache]: Analyzing trace with hash 1275395575, now seen corresponding path program 10 times [2018-07-24 10:58:17,447 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:17,447 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:17,448 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:58:17,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:17,448 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:17,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:18,049 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:18,049 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:18,049 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:18,057 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:58:18,057 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:58:18,096 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:58:18,096 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:18,110 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:18,231 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:18,231 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:20,217 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:20,238 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:20,239 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:20,255 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:58:20,256 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:58:20,295 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:58:20,295 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:20,300 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:20,748 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:20,748 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:21,340 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:21,343 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:21,344 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 81 [2018-07-24 10:58:21,344 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:21,344 INFO L450 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-07-24 10:58:21,345 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-07-24 10:58:21,348 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1909, Invalid=4571, Unknown=0, NotChecked=0, Total=6480 [2018-07-24 10:58:21,349 INFO L87 Difference]: Start difference. First operand 97 states and 97 transitions. Second operand 34 states. [2018-07-24 10:58:23,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:23,754 INFO L93 Difference]: Finished difference Result 111 states and 113 transitions. [2018-07-24 10:58:23,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-07-24 10:58:23,755 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 96 [2018-07-24 10:58:23,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:23,756 INFO L225 Difference]: With dead ends: 111 [2018-07-24 10:58:23,756 INFO L226 Difference]: Without dead ends: 106 [2018-07-24 10:58:23,759 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 444 GetRequests, 330 SyntacticMatches, 6 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2255 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=3944, Invalid=8046, Unknown=0, NotChecked=0, Total=11990 [2018-07-24 10:58:23,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-07-24 10:58:23,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-07-24 10:58:23,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-07-24 10:58:23,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 106 transitions. [2018-07-24 10:58:23,767 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 106 transitions. Word has length 96 [2018-07-24 10:58:23,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:23,767 INFO L471 AbstractCegarLoop]: Abstraction has 106 states and 106 transitions. [2018-07-24 10:58:23,767 INFO L472 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-07-24 10:58:23,767 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 106 transitions. [2018-07-24 10:58:23,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-07-24 10:58:23,769 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:23,769 INFO L353 BasicCegarLoop]: trace histogram [32, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:23,769 INFO L414 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:23,769 INFO L82 PathProgramCache]: Analyzing trace with hash -2040776829, now seen corresponding path program 11 times [2018-07-24 10:58:23,770 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:23,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:23,770 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:58:23,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:23,771 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:23,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:24,951 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:24,951 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:24,951 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:24,958 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:58:24,958 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:58:25,028 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 32 check-sat command(s) [2018-07-24 10:58:25,028 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:25,038 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:25,155 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:25,155 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:26,902 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:26,922 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:26,922 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:26,948 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:58:26,948 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:58:27,152 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 32 check-sat command(s) [2018-07-24 10:58:27,152 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:27,156 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:27,180 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:27,180 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:27,403 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:27,405 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:27,405 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 68 [2018-07-24 10:58:27,405 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:27,405 INFO L450 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-07-24 10:58:27,406 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-07-24 10:58:27,408 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1595, Invalid=2961, Unknown=0, NotChecked=0, Total=4556 [2018-07-24 10:58:27,408 INFO L87 Difference]: Start difference. First operand 106 states and 106 transitions. Second operand 37 states. [2018-07-24 10:58:30,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:30,047 INFO L93 Difference]: Finished difference Result 120 states and 122 transitions. [2018-07-24 10:58:30,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-07-24 10:58:30,048 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 105 [2018-07-24 10:58:30,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:30,049 INFO L225 Difference]: With dead ends: 120 [2018-07-24 10:58:30,049 INFO L226 Difference]: Without dead ends: 115 [2018-07-24 10:58:30,053 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 486 GetRequests, 383 SyntacticMatches, 4 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 820 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=3745, Invalid=6355, Unknown=0, NotChecked=0, Total=10100 [2018-07-24 10:58:30,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-07-24 10:58:30,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-07-24 10:58:30,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-07-24 10:58:30,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 115 transitions. [2018-07-24 10:58:30,060 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 115 transitions. Word has length 105 [2018-07-24 10:58:30,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:30,061 INFO L471 AbstractCegarLoop]: Abstraction has 115 states and 115 transitions. [2018-07-24 10:58:30,061 INFO L472 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-07-24 10:58:30,061 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 115 transitions. [2018-07-24 10:58:30,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-07-24 10:58:30,063 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:30,063 INFO L353 BasicCegarLoop]: trace histogram [35, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:30,063 INFO L414 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:30,063 INFO L82 PathProgramCache]: Analyzing trace with hash -264307849, now seen corresponding path program 12 times [2018-07-24 10:58:30,063 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:30,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:30,064 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:58:30,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:30,064 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:30,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:30,864 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:30,864 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:30,864 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:30,873 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:58:30,873 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:58:30,952 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 35 check-sat command(s) [2018-07-24 10:58:30,952 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:30,956 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:31,105 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:31,105 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:32,924 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:32,944 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:32,944 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:32,960 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:58:32,960 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:58:33,220 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 35 check-sat command(s) [2018-07-24 10:58:33,220 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:33,224 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:33,252 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:33,252 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:33,418 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:33,420 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:33,420 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 74 [2018-07-24 10:58:33,420 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:33,420 INFO L450 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-07-24 10:58:33,421 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-07-24 10:58:33,421 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1901, Invalid=3501, Unknown=0, NotChecked=0, Total=5402 [2018-07-24 10:58:33,422 INFO L87 Difference]: Start difference. First operand 115 states and 115 transitions. Second operand 40 states. [2018-07-24 10:58:36,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:36,514 INFO L93 Difference]: Finished difference Result 129 states and 131 transitions. [2018-07-24 10:58:36,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-07-24 10:58:36,514 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 114 [2018-07-24 10:58:36,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:36,515 INFO L225 Difference]: With dead ends: 129 [2018-07-24 10:58:36,515 INFO L226 Difference]: Without dead ends: 124 [2018-07-24 10:58:36,516 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 528 GetRequests, 416 SyntacticMatches, 4 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 949 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=4462, Invalid=7528, Unknown=0, NotChecked=0, Total=11990 [2018-07-24 10:58:36,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-07-24 10:58:36,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-07-24 10:58:36,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-07-24 10:58:36,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 124 transitions. [2018-07-24 10:58:36,524 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 124 transitions. Word has length 114 [2018-07-24 10:58:36,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:36,524 INFO L471 AbstractCegarLoop]: Abstraction has 124 states and 124 transitions. [2018-07-24 10:58:36,524 INFO L472 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-07-24 10:58:36,525 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 124 transitions. [2018-07-24 10:58:36,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-07-24 10:58:36,526 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:36,526 INFO L353 BasicCegarLoop]: trace histogram [38, 37, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:36,526 INFO L414 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:36,527 INFO L82 PathProgramCache]: Analyzing trace with hash 1271360003, now seen corresponding path program 13 times [2018-07-24 10:58:36,527 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:36,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:36,528 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:58:36,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:36,528 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:36,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:37,537 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:37,538 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:37,538 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:37,545 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:58:37,545 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:58:37,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:37,690 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:37,818 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:37,819 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:40,352 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:40,372 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:40,372 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:40,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:58:40,389 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:58:40,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:40,462 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:40,494 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:40,494 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:40,768 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:40,769 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:40,770 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 80 [2018-07-24 10:58:40,770 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:40,770 INFO L450 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-07-24 10:58:40,771 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-07-24 10:58:40,771 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2234, Invalid=4086, Unknown=0, NotChecked=0, Total=6320 [2018-07-24 10:58:40,771 INFO L87 Difference]: Start difference. First operand 124 states and 124 transitions. Second operand 43 states. [2018-07-24 10:58:44,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:44,652 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-07-24 10:58:44,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-07-24 10:58:44,652 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 123 [2018-07-24 10:58:44,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:44,653 INFO L225 Difference]: With dead ends: 138 [2018-07-24 10:58:44,653 INFO L226 Difference]: Without dead ends: 133 [2018-07-24 10:58:44,655 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 570 GetRequests, 449 SyntacticMatches, 4 SemanticMatches, 117 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1087 ImplicationChecksByTransitivity, 7.2s TimeCoverageRelationStatistics Valid=5242, Invalid=8800, Unknown=0, NotChecked=0, Total=14042 [2018-07-24 10:58:44,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-07-24 10:58:44,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-07-24 10:58:44,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-07-24 10:58:44,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 133 transitions. [2018-07-24 10:58:44,663 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 133 transitions. Word has length 123 [2018-07-24 10:58:44,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:44,663 INFO L471 AbstractCegarLoop]: Abstraction has 133 states and 133 transitions. [2018-07-24 10:58:44,663 INFO L472 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-07-24 10:58:44,663 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 133 transitions. [2018-07-24 10:58:44,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-07-24 10:58:44,665 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:44,665 INFO L353 BasicCegarLoop]: trace histogram [41, 40, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:44,665 INFO L414 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:44,665 INFO L82 PathProgramCache]: Analyzing trace with hash -1878746889, now seen corresponding path program 14 times [2018-07-24 10:58:44,665 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:44,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:44,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:58:44,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:44,667 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:44,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:45,731 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:45,731 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:45,731 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:45,740 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:58:45,740 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:58:45,855 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:58:45,855 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:45,916 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:46,056 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:46,057 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:48,423 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:48,443 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:48,443 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:48,459 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:58:48,459 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:58:48,542 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:58:48,542 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:48,546 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:48,741 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:48,741 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:48,983 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:48,985 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:48,986 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44, 44, 44, 44] total 91 [2018-07-24 10:58:48,986 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:48,986 INFO L450 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-07-24 10:58:48,987 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-07-24 10:58:48,988 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2827, Invalid=5363, Unknown=0, NotChecked=0, Total=8190 [2018-07-24 10:58:48,988 INFO L87 Difference]: Start difference. First operand 133 states and 133 transitions. Second operand 46 states. [2018-07-24 10:58:53,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:53,587 INFO L93 Difference]: Finished difference Result 147 states and 149 transitions. [2018-07-24 10:58:53,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-07-24 10:58:53,588 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 132 [2018-07-24 10:58:53,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:53,589 INFO L225 Difference]: With dead ends: 147 [2018-07-24 10:58:53,589 INFO L226 Difference]: Without dead ends: 142 [2018-07-24 10:58:53,590 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 612 GetRequests, 476 SyntacticMatches, 6 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1757 ImplicationChecksByTransitivity, 7.8s TimeCoverageRelationStatistics Valid=6392, Invalid=10900, Unknown=0, NotChecked=0, Total=17292 [2018-07-24 10:58:53,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-07-24 10:58:53,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-07-24 10:58:53,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-07-24 10:58:53,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 142 transitions. [2018-07-24 10:58:53,597 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 142 transitions. Word has length 132 [2018-07-24 10:58:53,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:53,597 INFO L471 AbstractCegarLoop]: Abstraction has 142 states and 142 transitions. [2018-07-24 10:58:53,597 INFO L472 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-07-24 10:58:53,597 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 142 transitions. [2018-07-24 10:58:53,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-07-24 10:58:53,598 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:53,598 INFO L353 BasicCegarLoop]: trace histogram [44, 43, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:53,599 INFO L414 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:53,599 INFO L82 PathProgramCache]: Analyzing trace with hash -927269757, now seen corresponding path program 15 times [2018-07-24 10:58:53,599 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:53,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:53,600 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:58:53,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:53,600 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:53,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:55,061 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:55,061 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:55,061 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:55,069 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:58:55,070 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:58:55,119 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 44 check-sat command(s) [2018-07-24 10:58:55,119 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:55,125 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:55,302 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:55,303 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:58,054 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:58,076 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:58,076 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:58,092 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:58:58,093 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:58:58,456 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 44 check-sat command(s) [2018-07-24 10:58:58,456 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:58,461 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:58,500 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:58,501 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:58,701 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:58,703 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:58,703 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47, 47, 47] total 92 [2018-07-24 10:58:58,703 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:58,704 INFO L450 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-07-24 10:58:58,704 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-07-24 10:58:58,704 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2981, Invalid=5391, Unknown=0, NotChecked=0, Total=8372 [2018-07-24 10:58:58,704 INFO L87 Difference]: Start difference. First operand 142 states and 142 transitions. Second operand 49 states. [2018-07-24 10:59:03,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:59:03,920 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2018-07-24 10:59:03,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-07-24 10:59:03,921 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 141 [2018-07-24 10:59:03,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:59:03,923 INFO L225 Difference]: With dead ends: 156 [2018-07-24 10:59:03,923 INFO L226 Difference]: Without dead ends: 151 [2018-07-24 10:59:03,924 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 654 GetRequests, 515 SyntacticMatches, 4 SemanticMatches, 135 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1390 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=6991, Invalid=11641, Unknown=0, NotChecked=0, Total=18632 [2018-07-24 10:59:03,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-07-24 10:59:03,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-07-24 10:59:03,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-07-24 10:59:03,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 151 transitions. [2018-07-24 10:59:03,930 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 151 transitions. Word has length 141 [2018-07-24 10:59:03,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:59:03,931 INFO L471 AbstractCegarLoop]: Abstraction has 151 states and 151 transitions. [2018-07-24 10:59:03,931 INFO L472 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-07-24 10:59:03,931 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 151 transitions. [2018-07-24 10:59:03,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2018-07-24 10:59:03,932 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:59:03,932 INFO L353 BasicCegarLoop]: trace histogram [47, 46, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:59:03,932 INFO L414 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:59:03,932 INFO L82 PathProgramCache]: Analyzing trace with hash -72493449, now seen corresponding path program 16 times [2018-07-24 10:59:03,933 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:59:03,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:59:03,933 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:59:03,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:59:03,934 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:59:04,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:59:05,535 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:05,535 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:59:05,535 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:59:05,545 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:59:05,546 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:59:05,606 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:59:05,606 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:59:05,624 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:59:05,792 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:05,792 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:59:09,327 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:09,348 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:59:09,348 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:59:09,377 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:59:09,378 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:59:09,441 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:59:09,442 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:59:09,446 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:59:10,125 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:10,126 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:59:10,644 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:10,646 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:59:10,647 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 109 [2018-07-24 10:59:10,647 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:59:10,647 INFO L450 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-07-24 10:59:10,648 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-07-24 10:59:10,649 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3868, Invalid=7904, Unknown=0, NotChecked=0, Total=11772 [2018-07-24 10:59:10,649 INFO L87 Difference]: Start difference. First operand 151 states and 151 transitions. Second operand 52 states. [2018-07-24 10:59:11,142 WARN L169 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 147 DAG size of output: 9 [2018-07-24 10:59:11,287 WARN L169 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-07-24 10:59:16,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:59:16,896 INFO L93 Difference]: Finished difference Result 165 states and 167 transitions. [2018-07-24 10:59:16,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-07-24 10:59:16,897 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 150 [2018-07-24 10:59:16,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:59:16,899 INFO L225 Difference]: With dead ends: 165 [2018-07-24 10:59:16,899 INFO L226 Difference]: Without dead ends: 160 [2018-07-24 10:59:16,901 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 696 GetRequests, 536 SyntacticMatches, 6 SemanticMatches, 154 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2906 ImplicationChecksByTransitivity, 11.8s TimeCoverageRelationStatistics Valid=8657, Invalid=15523, Unknown=0, NotChecked=0, Total=24180 [2018-07-24 10:59:16,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-07-24 10:59:16,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2018-07-24 10:59:16,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-07-24 10:59:16,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 160 transitions. [2018-07-24 10:59:16,907 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 160 transitions. Word has length 150 [2018-07-24 10:59:16,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:59:16,907 INFO L471 AbstractCegarLoop]: Abstraction has 160 states and 160 transitions. [2018-07-24 10:59:16,907 INFO L472 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-07-24 10:59:16,907 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 160 transitions. [2018-07-24 10:59:16,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-07-24 10:59:16,908 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:59:16,908 INFO L353 BasicCegarLoop]: trace histogram [50, 49, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:59:16,908 INFO L414 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:59:16,908 INFO L82 PathProgramCache]: Analyzing trace with hash 266268419, now seen corresponding path program 17 times [2018-07-24 10:59:16,908 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:59:16,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:59:16,909 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:59:16,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:59:16,909 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:59:17,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:59:18,483 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:18,484 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:59:18,484 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:59:18,497 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:59:18,497 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:59:18,772 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 50 check-sat command(s) [2018-07-24 10:59:18,773 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:59:18,794 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:59:19,006 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:19,007 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:59:22,977 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:23,009 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:59:23,009 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:59:23,034 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:59:23,034 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:59:23,462 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 50 check-sat command(s) [2018-07-24 10:59:23,462 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:59:23,467 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:59:23,513 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:23,513 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:59:23,678 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:23,680 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:59:23,680 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53, 53, 53, 53] total 104 [2018-07-24 10:59:23,680 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:59:23,681 INFO L450 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-07-24 10:59:23,681 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-07-24 10:59:23,682 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3836, Invalid=6876, Unknown=0, NotChecked=0, Total=10712 [2018-07-24 10:59:23,682 INFO L87 Difference]: Start difference. First operand 160 states and 160 transitions. Second operand 55 states. [2018-07-24 10:59:24,114 WARN L169 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 156 DAG size of output: 9 [2018-07-24 10:59:24,245 WARN L169 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-07-24 10:59:24,397 WARN L169 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-07-24 10:59:24,531 WARN L169 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-07-24 10:59:24,675 WARN L169 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-07-24 10:59:24,970 WARN L169 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 140 DAG size of output: 11 [2018-07-24 10:59:25,163 WARN L169 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 137 DAG size of output: 11 [2018-07-24 10:59:30,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:59:30,691 INFO L93 Difference]: Finished difference Result 174 states and 176 transitions. [2018-07-24 10:59:30,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-07-24 10:59:30,694 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 159 [2018-07-24 10:59:30,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:59:30,695 INFO L225 Difference]: With dead ends: 174 [2018-07-24 10:59:30,695 INFO L226 Difference]: Without dead ends: 169 [2018-07-24 10:59:30,697 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 738 GetRequests, 581 SyntacticMatches, 4 SemanticMatches, 153 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1729 ImplicationChecksByTransitivity, 12.0s TimeCoverageRelationStatistics Valid=8992, Invalid=14878, Unknown=0, NotChecked=0, Total=23870 [2018-07-24 10:59:30,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-07-24 10:59:30,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2018-07-24 10:59:30,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-07-24 10:59:30,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 169 transitions. [2018-07-24 10:59:30,703 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 169 transitions. Word has length 159 [2018-07-24 10:59:30,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:59:30,703 INFO L471 AbstractCegarLoop]: Abstraction has 169 states and 169 transitions. [2018-07-24 10:59:30,703 INFO L472 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-07-24 10:59:30,703 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 169 transitions. [2018-07-24 10:59:30,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-07-24 10:59:30,704 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:59:30,704 INFO L353 BasicCegarLoop]: trace histogram [53, 52, 52, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:59:30,704 INFO L414 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:59:30,705 INFO L82 PathProgramCache]: Analyzing trace with hash -1651330057, now seen corresponding path program 18 times [2018-07-24 10:59:30,705 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:59:30,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:59:30,706 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:59:30,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:59:30,706 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:59:30,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:59:32,789 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:32,789 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:59:32,789 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:59:32,796 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:59:32,796 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:59:32,871 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 53 check-sat command(s) [2018-07-24 10:59:32,871 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:59:32,877 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:59:33,133 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:33,134 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:59:37,299 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:37,321 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:59:37,321 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:59:37,338 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:59:37,338 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:59:37,841 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 53 check-sat command(s) [2018-07-24 10:59:37,842 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:59:37,847 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:59:37,900 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:37,901 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:59:39,125 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:39,127 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:59:39,127 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56, 56, 56, 56] total 110 [2018-07-24 10:59:39,127 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:59:39,128 INFO L450 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-07-24 10:59:39,128 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-07-24 10:59:39,129 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4304, Invalid=7686, Unknown=0, NotChecked=0, Total=11990 [2018-07-24 10:59:39,129 INFO L87 Difference]: Start difference. First operand 169 states and 169 transitions. Second operand 58 states. [2018-07-24 10:59:39,313 WARN L169 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 156 DAG size of output: 8 [2018-07-24 10:59:39,437 WARN L169 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 159 DAG size of output: 8 [2018-07-24 10:59:39,579 WARN L169 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 165 DAG size of output: 9 [2018-07-24 10:59:39,722 WARN L169 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-07-24 10:59:39,871 WARN L169 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-07-24 10:59:40,020 WARN L169 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-07-24 10:59:40,170 WARN L169 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-07-24 10:59:40,330 WARN L169 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-07-24 10:59:40,500 WARN L169 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-07-24 10:59:40,670 WARN L169 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-07-24 10:59:46,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:59:46,984 INFO L93 Difference]: Finished difference Result 183 states and 185 transitions. [2018-07-24 10:59:46,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-07-24 10:59:46,985 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 168 [2018-07-24 10:59:46,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:59:46,987 INFO L225 Difference]: With dead ends: 183 [2018-07-24 10:59:46,987 INFO L226 Difference]: Without dead ends: 178 [2018-07-24 10:59:46,988 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 780 GetRequests, 614 SyntacticMatches, 4 SemanticMatches, 162 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1912 ImplicationChecksByTransitivity, 14.6s TimeCoverageRelationStatistics Valid=10087, Invalid=16645, Unknown=0, NotChecked=0, Total=26732 [2018-07-24 10:59:46,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-07-24 10:59:46,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2018-07-24 10:59:46,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-07-24 10:59:46,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 178 transitions. [2018-07-24 10:59:46,996 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 178 transitions. Word has length 168 [2018-07-24 10:59:46,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:59:46,997 INFO L471 AbstractCegarLoop]: Abstraction has 178 states and 178 transitions. [2018-07-24 10:59:46,997 INFO L472 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-07-24 10:59:46,997 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 178 transitions. [2018-07-24 10:59:46,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2018-07-24 10:59:46,998 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:59:46,998 INFO L353 BasicCegarLoop]: trace histogram [56, 55, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:59:46,998 INFO L414 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:59:46,998 INFO L82 PathProgramCache]: Analyzing trace with hash -639942269, now seen corresponding path program 19 times [2018-07-24 10:59:46,998 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:59:46,999 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:59:46,999 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:59:46,999 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:59:46,999 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:59:47,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:59:48,806 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:48,806 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:59:48,806 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:59:48,813 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:59:48,813 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:59:49,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:59:49,226 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:59:49,416 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:49,416 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:59:54,145 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:54,166 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:59:54,166 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:59:54,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:59:54,182 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:59:54,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:59:54,330 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:59:54,387 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:54,387 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:59:54,605 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:59:54,606 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:59:54,607 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59, 59, 59, 59] total 116 [2018-07-24 10:59:54,607 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:59:54,607 INFO L450 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-07-24 10:59:54,607 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-07-24 10:59:54,608 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4799, Invalid=8541, Unknown=0, NotChecked=0, Total=13340 [2018-07-24 10:59:54,609 INFO L87 Difference]: Start difference. First operand 178 states and 178 transitions. Second operand 61 states. [2018-07-24 10:59:54,825 WARN L169 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 165 DAG size of output: 8 [2018-07-24 10:59:54,956 WARN L169 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 168 DAG size of output: 8 [2018-07-24 10:59:55,110 WARN L169 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 174 DAG size of output: 9 [2018-07-24 10:59:55,263 WARN L169 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-07-24 10:59:55,421 WARN L169 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-07-24 10:59:55,588 WARN L169 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 [2018-07-24 10:59:55,767 WARN L169 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-07-24 10:59:55,999 WARN L169 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-07-24 10:59:56,181 WARN L169 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-07-24 10:59:56,354 WARN L169 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-07-24 10:59:56,535 WARN L169 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-07-24 10:59:56,710 WARN L169 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-07-24 11:00:03,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 11:00:03,477 INFO L93 Difference]: Finished difference Result 192 states and 194 transitions. [2018-07-24 11:00:03,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-07-24 11:00:03,478 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 177 [2018-07-24 11:00:03,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 11:00:03,479 INFO L225 Difference]: With dead ends: 192 [2018-07-24 11:00:03,479 INFO L226 Difference]: Without dead ends: 187 [2018-07-24 11:00:03,480 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 822 GetRequests, 647 SyntacticMatches, 4 SemanticMatches, 171 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2104 ImplicationChecksByTransitivity, 14.8s TimeCoverageRelationStatistics Valid=11245, Invalid=18511, Unknown=0, NotChecked=0, Total=29756 [2018-07-24 11:00:03,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-07-24 11:00:03,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 187. [2018-07-24 11:00:03,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-07-24 11:00:03,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 187 transitions. [2018-07-24 11:00:03,489 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 187 transitions. Word has length 177 [2018-07-24 11:00:03,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 11:00:03,490 INFO L471 AbstractCegarLoop]: Abstraction has 187 states and 187 transitions. [2018-07-24 11:00:03,490 INFO L472 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-07-24 11:00:03,490 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 187 transitions. [2018-07-24 11:00:03,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2018-07-24 11:00:03,491 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 11:00:03,491 INFO L353 BasicCegarLoop]: trace histogram [59, 58, 58, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 11:00:03,491 INFO L414 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 11:00:03,491 INFO L82 PathProgramCache]: Analyzing trace with hash -99929737, now seen corresponding path program 20 times [2018-07-24 11:00:03,491 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 11:00:03,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 11:00:03,492 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 11:00:03,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 11:00:03,492 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 11:00:03,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 11:00:05,607 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:05,607 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 11:00:05,607 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 11:00:05,614 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 11:00:05,615 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 11:00:05,926 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 11:00:05,926 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 11:00:06,107 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 11:00:06,426 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:06,426 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 11:00:11,636 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:11,656 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 11:00:11,656 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 11:00:11,671 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 11:00:11,672 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 11:00:11,833 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 11:00:11,833 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 11:00:11,838 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 11:00:12,108 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:12,108 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 11:00:12,477 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:12,479 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 11:00:12,479 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62, 62, 62, 62] total 127 [2018-07-24 11:00:12,479 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 11:00:12,480 INFO L450 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-07-24 11:00:12,480 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-07-24 11:00:12,481 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5644, Invalid=10358, Unknown=0, NotChecked=0, Total=16002 [2018-07-24 11:00:12,481 INFO L87 Difference]: Start difference. First operand 187 states and 187 transitions. Second operand 64 states. [2018-07-24 11:00:12,694 WARN L169 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 174 DAG size of output: 8 [2018-07-24 11:00:12,838 WARN L169 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 177 DAG size of output: 8 [2018-07-24 11:00:13,005 WARN L169 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 183 DAG size of output: 9 [2018-07-24 11:00:13,180 WARN L169 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 182 DAG size of output: 11 [2018-07-24 11:00:13,360 WARN L169 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 179 DAG size of output: 11 [2018-07-24 11:00:13,539 WARN L169 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 176 DAG size of output: 11 [2018-07-24 11:00:13,725 WARN L169 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-07-24 11:00:13,908 WARN L169 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-07-24 11:00:14,096 WARN L169 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 [2018-07-24 11:00:14,293 WARN L169 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-07-24 11:00:14,487 WARN L169 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-07-24 11:00:14,691 WARN L169 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-07-24 11:00:14,891 WARN L169 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-07-24 11:00:15,087 WARN L169 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-07-24 11:00:15,279 WARN L169 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-07-24 11:00:15,482 WARN L169 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-07-24 11:00:16,508 WARN L169 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 131 DAG size of output: 11 [2018-07-24 11:00:22,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 11:00:22,760 INFO L93 Difference]: Finished difference Result 201 states and 203 transitions. [2018-07-24 11:00:22,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-07-24 11:00:22,762 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 186 [2018-07-24 11:00:22,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 11:00:22,764 INFO L225 Difference]: With dead ends: 201 [2018-07-24 11:00:22,764 INFO L226 Difference]: Without dead ends: 196 [2018-07-24 11:00:22,765 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 864 GetRequests, 674 SyntacticMatches, 6 SemanticMatches, 184 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3044 ImplicationChecksByTransitivity, 17.5s TimeCoverageRelationStatistics Valid=12899, Invalid=21511, Unknown=0, NotChecked=0, Total=34410 [2018-07-24 11:00:22,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-07-24 11:00:22,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2018-07-24 11:00:22,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-07-24 11:00:22,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 196 transitions. [2018-07-24 11:00:22,773 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 196 transitions. Word has length 186 [2018-07-24 11:00:22,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 11:00:22,773 INFO L471 AbstractCegarLoop]: Abstraction has 196 states and 196 transitions. [2018-07-24 11:00:22,773 INFO L472 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-07-24 11:00:22,773 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 196 transitions. [2018-07-24 11:00:22,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2018-07-24 11:00:22,774 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 11:00:22,775 INFO L353 BasicCegarLoop]: trace histogram [62, 61, 61, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 11:00:22,775 INFO L414 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 11:00:22,775 INFO L82 PathProgramCache]: Analyzing trace with hash 89650179, now seen corresponding path program 21 times [2018-07-24 11:00:22,775 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 11:00:22,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 11:00:22,776 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 11:00:22,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 11:00:22,776 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 11:00:23,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 11:00:25,301 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:25,301 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 11:00:25,301 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 11:00:25,310 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 11:00:25,310 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 11:00:25,383 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 62 check-sat command(s) [2018-07-24 11:00:25,383 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 11:00:25,390 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 11:00:25,607 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:25,607 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 11:00:31,319 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:31,340 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 11:00:31,341 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 11:00:31,357 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 11:00:31,357 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 11:00:31,975 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 62 check-sat command(s) [2018-07-24 11:00:31,975 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 11:00:31,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 11:00:32,046 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:32,046 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 11:00:32,270 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:32,271 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 11:00:32,272 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65, 65, 65, 65] total 128 [2018-07-24 11:00:32,272 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 11:00:32,272 INFO L450 AbstractCegarLoop]: Interpolant automaton has 67 states [2018-07-24 11:00:32,273 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2018-07-24 11:00:32,273 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5870, Invalid=10386, Unknown=0, NotChecked=0, Total=16256 [2018-07-24 11:00:32,274 INFO L87 Difference]: Start difference. First operand 196 states and 196 transitions. Second operand 67 states. [2018-07-24 11:00:32,504 WARN L169 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 183 DAG size of output: 8 [2018-07-24 11:00:32,655 WARN L169 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 186 DAG size of output: 8 [2018-07-24 11:00:32,833 WARN L169 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 192 DAG size of output: 9 [2018-07-24 11:00:33,016 WARN L169 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 191 DAG size of output: 11 [2018-07-24 11:00:33,194 WARN L169 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 188 DAG size of output: 11 [2018-07-24 11:00:33,386 WARN L169 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 185 DAG size of output: 11 [2018-07-24 11:00:33,578 WARN L169 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 182 DAG size of output: 11 [2018-07-24 11:00:33,776 WARN L169 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 179 DAG size of output: 11 [2018-07-24 11:00:33,983 WARN L169 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 176 DAG size of output: 11 [2018-07-24 11:00:34,184 WARN L169 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-07-24 11:00:34,386 WARN L169 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-07-24 11:00:34,604 WARN L169 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 [2018-07-24 11:00:34,814 WARN L169 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-07-24 11:00:35,012 WARN L169 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-07-24 11:00:35,218 WARN L169 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-07-24 11:00:35,428 WARN L169 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-07-24 11:00:35,634 WARN L169 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-07-24 11:00:35,969 WARN L169 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-07-24 11:00:36,177 WARN L169 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-07-24 11:00:36,379 WARN L169 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 143 DAG size of output: 11 [2018-07-24 11:00:36,615 WARN L169 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 140 DAG size of output: 11 [2018-07-24 11:00:36,848 WARN L169 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 137 DAG size of output: 11 [2018-07-24 11:00:43,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 11:00:43,723 INFO L93 Difference]: Finished difference Result 210 states and 212 transitions. [2018-07-24 11:00:43,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-07-24 11:00:43,724 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 195 [2018-07-24 11:00:43,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 11:00:43,725 INFO L225 Difference]: With dead ends: 210 [2018-07-24 11:00:43,725 INFO L226 Difference]: Without dead ends: 205 [2018-07-24 11:00:43,727 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 906 GetRequests, 713 SyntacticMatches, 4 SemanticMatches, 189 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2515 ImplicationChecksByTransitivity, 19.0s TimeCoverageRelationStatistics Valid=13750, Invalid=22540, Unknown=0, NotChecked=0, Total=36290 [2018-07-24 11:00:43,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-07-24 11:00:43,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 205. [2018-07-24 11:00:43,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-07-24 11:00:43,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 205 transitions. [2018-07-24 11:00:43,732 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 205 transitions. Word has length 195 [2018-07-24 11:00:43,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 11:00:43,733 INFO L471 AbstractCegarLoop]: Abstraction has 205 states and 205 transitions. [2018-07-24 11:00:43,733 INFO L472 AbstractCegarLoop]: Interpolant automaton has 67 states. [2018-07-24 11:00:43,733 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 205 transitions. [2018-07-24 11:00:43,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-07-24 11:00:43,734 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 11:00:43,734 INFO L353 BasicCegarLoop]: trace histogram [65, 64, 64, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 11:00:43,734 INFO L414 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 11:00:43,734 INFO L82 PathProgramCache]: Analyzing trace with hash 795823863, now seen corresponding path program 22 times [2018-07-24 11:00:43,734 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 11:00:43,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 11:00:43,735 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 11:00:43,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 11:00:43,735 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 11:00:43,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 11:00:46,431 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:46,431 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 11:00:46,431 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 11:00:46,440 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 11:00:46,440 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 11:00:46,722 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 11:00:46,723 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 11:00:46,872 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 11:00:47,311 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:47,311 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 11:00:53,442 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:53,463 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 11:00:53,463 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 11:00:53,478 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 11:00:53,479 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 11:00:53,580 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 11:00:53,581 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 11:00:53,588 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 11:00:56,190 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:56,190 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 11:00:58,599 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:00:58,601 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 11:00:58,601 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 68, 68, 68, 68] total 181 [2018-07-24 11:00:58,601 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 11:00:58,602 INFO L450 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-07-24 11:00:58,602 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-07-24 11:00:58,603 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9403, Invalid=23177, Unknown=0, NotChecked=0, Total=32580 [2018-07-24 11:00:58,603 INFO L87 Difference]: Start difference. First operand 205 states and 205 transitions. Second operand 70 states. [2018-07-24 11:00:58,889 WARN L169 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 192 DAG size of output: 8 [2018-07-24 11:00:59,056 WARN L169 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 195 DAG size of output: 8 [2018-07-24 11:00:59,317 WARN L169 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 201 DAG size of output: 9 [2018-07-24 11:00:59,582 WARN L169 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 200 DAG size of output: 11 [2018-07-24 11:00:59,842 WARN L169 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 197 DAG size of output: 11 [2018-07-24 11:01:00,108 WARN L169 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 194 DAG size of output: 11 [2018-07-24 11:01:00,377 WARN L169 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 191 DAG size of output: 11 [2018-07-24 11:01:00,648 WARN L169 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 188 DAG size of output: 11 [2018-07-24 11:01:00,926 WARN L169 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 185 DAG size of output: 11 [2018-07-24 11:01:01,198 WARN L169 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 182 DAG size of output: 11 [2018-07-24 11:01:01,475 WARN L169 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 179 DAG size of output: 11 [2018-07-24 11:01:01,745 WARN L169 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 176 DAG size of output: 11 [2018-07-24 11:01:02,032 WARN L169 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-07-24 11:01:02,332 WARN L169 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-07-24 11:01:02,634 WARN L169 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 [2018-07-24 11:01:02,919 WARN L169 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-07-24 11:01:03,200 WARN L169 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-07-24 11:01:03,476 WARN L169 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-07-24 11:01:03,750 WARN L169 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-07-24 11:01:04,030 WARN L169 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-07-24 11:01:04,305 WARN L169 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-07-24 11:01:04,577 WARN L169 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-07-24 11:01:05,672 WARN L169 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 11 [2018-07-24 11:01:13,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 11:01:13,008 INFO L93 Difference]: Finished difference Result 219 states and 221 transitions. [2018-07-24 11:01:13,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-07-24 11:01:13,009 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 204 [2018-07-24 11:01:13,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 11:01:13,011 INFO L225 Difference]: With dead ends: 219 [2018-07-24 11:01:13,011 INFO L226 Difference]: Without dead ends: 214 [2018-07-24 11:01:13,013 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 948 GetRequests, 698 SyntacticMatches, 6 SemanticMatches, 244 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11294 ImplicationChecksByTransitivity, 27.3s TimeCoverageRelationStatistics Valid=19709, Invalid=40561, Unknown=0, NotChecked=0, Total=60270 [2018-07-24 11:01:13,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-07-24 11:01:13,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2018-07-24 11:01:13,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-07-24 11:01:13,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 214 transitions. [2018-07-24 11:01:13,021 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 214 transitions. Word has length 204 [2018-07-24 11:01:13,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 11:01:13,021 INFO L471 AbstractCegarLoop]: Abstraction has 214 states and 214 transitions. [2018-07-24 11:01:13,021 INFO L472 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-07-24 11:01:13,022 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 214 transitions. [2018-07-24 11:01:13,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2018-07-24 11:01:13,023 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 11:01:13,023 INFO L353 BasicCegarLoop]: trace histogram [68, 67, 67, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 11:01:13,023 INFO L414 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 11:01:13,023 INFO L82 PathProgramCache]: Analyzing trace with hash 385681027, now seen corresponding path program 23 times [2018-07-24 11:01:13,023 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 11:01:13,024 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 11:01:13,024 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 11:01:13,024 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 11:01:13,024 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 11:01:13,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 11:01:15,834 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:01:15,834 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 11:01:15,834 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 11:01:15,842 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 11:01:15,842 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 11:01:16,287 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 68 check-sat command(s) [2018-07-24 11:01:16,288 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 11:01:16,338 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 11:01:16,553 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:01:16,553 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 11:01:23,596 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:01:23,616 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 11:01:23,616 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 11:01:23,632 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 11:01:23,633 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 11:01:24,507 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 68 check-sat command(s) [2018-07-24 11:01:24,507 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 11:01:24,514 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 11:01:24,591 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:01:24,591 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 11:01:24,842 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:01:24,843 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 11:01:24,844 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [71, 71, 71, 71, 71] total 140 [2018-07-24 11:01:24,844 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 11:01:24,844 INFO L450 AbstractCegarLoop]: Interpolant automaton has 73 states [2018-07-24 11:01:24,845 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2018-07-24 11:01:24,846 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7049, Invalid=12411, Unknown=0, NotChecked=0, Total=19460 [2018-07-24 11:01:24,846 INFO L87 Difference]: Start difference. First operand 214 states and 214 transitions. Second operand 73 states. [2018-07-24 11:01:25,381 WARN L169 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 201 DAG size of output: 8 [2018-07-24 11:01:25,556 WARN L169 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 204 DAG size of output: 8 [2018-07-24 11:01:25,759 WARN L169 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 210 DAG size of output: 9 [2018-07-24 11:01:25,976 WARN L169 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 209 DAG size of output: 11 [2018-07-24 11:01:26,181 WARN L169 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 206 DAG size of output: 11 [2018-07-24 11:01:26,403 WARN L169 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 203 DAG size of output: 11 [2018-07-24 11:01:26,613 WARN L169 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 200 DAG size of output: 11 [2018-07-24 11:01:26,845 WARN L169 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 197 DAG size of output: 11 [2018-07-24 11:01:27,070 WARN L169 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 194 DAG size of output: 11 [2018-07-24 11:01:27,384 WARN L169 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 191 DAG size of output: 11 [2018-07-24 11:01:27,603 WARN L169 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 188 DAG size of output: 11 [2018-07-24 11:01:27,846 WARN L169 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 185 DAG size of output: 11 [2018-07-24 11:01:28,103 WARN L169 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 182 DAG size of output: 11 [2018-07-24 11:01:28,339 WARN L169 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 179 DAG size of output: 11 [2018-07-24 11:01:28,575 WARN L169 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 176 DAG size of output: 11 [2018-07-24 11:01:28,814 WARN L169 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-07-24 11:01:29,043 WARN L169 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-07-24 11:01:29,298 WARN L169 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 [2018-07-24 11:01:29,530 WARN L169 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-07-24 11:01:29,777 WARN L169 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-07-24 11:01:30,014 WARN L169 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-07-24 11:01:30,253 WARN L169 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-07-24 11:01:30,488 WARN L169 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-07-24 11:01:30,726 WARN L169 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-07-24 11:01:30,961 WARN L169 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-07-24 11:01:32,795 WARN L169 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 125 DAG size of output: 11 [2018-07-24 11:01:39,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 11:01:39,749 INFO L93 Difference]: Finished difference Result 228 states and 230 transitions. [2018-07-24 11:01:39,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2018-07-24 11:01:39,749 INFO L78 Accepts]: Start accepts. Automaton has 73 states. Word has length 213 [2018-07-24 11:01:39,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 11:01:39,751 INFO L225 Difference]: With dead ends: 228 [2018-07-24 11:01:39,751 INFO L226 Difference]: Without dead ends: 223 [2018-07-24 11:01:39,752 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 990 GetRequests, 779 SyntacticMatches, 4 SemanticMatches, 207 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2962 ImplicationChecksByTransitivity, 23.6s TimeCoverageRelationStatistics Valid=16507, Invalid=26965, Unknown=0, NotChecked=0, Total=43472 [2018-07-24 11:01:39,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-07-24 11:01:39,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 223. [2018-07-24 11:01:39,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-07-24 11:01:39,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 223 transitions. [2018-07-24 11:01:39,761 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 223 transitions. Word has length 213 [2018-07-24 11:01:39,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 11:01:39,762 INFO L471 AbstractCegarLoop]: Abstraction has 223 states and 223 transitions. [2018-07-24 11:01:39,762 INFO L472 AbstractCegarLoop]: Interpolant automaton has 73 states. [2018-07-24 11:01:39,762 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 223 transitions. [2018-07-24 11:01:39,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2018-07-24 11:01:39,763 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 11:01:39,763 INFO L353 BasicCegarLoop]: trace histogram [71, 70, 70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 11:01:39,763 INFO L414 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_k_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 11:01:39,764 INFO L82 PathProgramCache]: Analyzing trace with hash 1981222007, now seen corresponding path program 24 times [2018-07-24 11:01:39,764 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 11:01:39,764 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 11:01:39,764 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 11:01:39,765 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 11:01:39,765 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 11:01:40,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 11:01:43,298 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 0 proven. 7385 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:01:43,298 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 11:01:43,298 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 11:01:43,307 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 11:01:43,308 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 11:01:43,421 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 71 check-sat command(s) [2018-07-24 11:01:43,421 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 11:01:43,430 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 11:01:43,709 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 0 proven. 7385 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:01:43,709 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 11:01:51,024 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 0 proven. 7385 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:01:51,046 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 11:01:51,047 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 11:01:51,062 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 11:01:51,062 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 11:01:51,864 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 71 check-sat command(s) [2018-07-24 11:01:51,864 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 11:01:51,888 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 11:01:51,957 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 0 proven. 7385 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:01:51,957 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 11:01:52,204 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 0 proven. 7385 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 11:01:52,205 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 11:01:52,206 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [74, 74, 74, 74, 74] total 146 [2018-07-24 11:01:52,206 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 11:01:52,210 INFO L450 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-07-24 11:01:52,210 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-07-24 11:01:52,211 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7679, Invalid=13491, Unknown=0, NotChecked=0, Total=21170 [2018-07-24 11:01:52,211 INFO L87 Difference]: Start difference. First operand 223 states and 223 transitions. Second operand 76 states. [2018-07-24 11:01:52,510 WARN L169 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 210 DAG size of output: 8 [2018-07-24 11:01:52,698 WARN L169 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 213 DAG size of output: 8 [2018-07-24 11:01:52,915 WARN L169 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 219 DAG size of output: 9 [2018-07-24 11:01:53,138 WARN L169 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 218 DAG size of output: 11 [2018-07-24 11:01:53,364 WARN L169 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 215 DAG size of output: 11 [2018-07-24 11:01:53,627 WARN L169 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 212 DAG size of output: 11 [2018-07-24 11:01:53,888 WARN L169 SmtUtils]: Spent 206.00 ms on a formula simplification. DAG size of input: 209 DAG size of output: 11 [2018-07-24 11:01:54,124 WARN L169 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 206 DAG size of output: 11 [2018-07-24 11:01:54,355 WARN L169 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 203 DAG size of output: 11 [2018-07-24 11:01:54,586 WARN L169 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 200 DAG size of output: 11 [2018-07-24 11:01:54,828 WARN L169 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 197 DAG size of output: 11 [2018-07-24 11:01:55,080 WARN L169 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 194 DAG size of output: 11 [2018-07-24 11:01:55,331 WARN L169 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 191 DAG size of output: 11 [2018-07-24 11:01:55,589 WARN L169 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 188 DAG size of output: 11 [2018-07-24 11:01:55,846 WARN L169 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 185 DAG size of output: 11 [2018-07-24 11:01:56,109 WARN L169 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 182 DAG size of output: 11 [2018-07-24 11:01:56,373 WARN L169 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 179 DAG size of output: 11 [2018-07-24 11:01:56,632 WARN L169 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 176 DAG size of output: 11 [2018-07-24 11:01:56,897 WARN L169 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-07-24 11:01:57,172 WARN L169 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-07-24 11:01:57,431 WARN L169 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 Received shutdown request... [2018-07-24 11:01:57,595 WARN L177 SmtUtils]: Removed 47 from assertion stack [2018-07-24 11:01:57,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-07-24 11:01:57,596 WARN L540 AbstractCegarLoop]: Verification canceled [2018-07-24 11:01:57,600 WARN L202 ceAbstractionStarter]: Timeout [2018-07-24 11:01:57,601 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.07 11:01:57 BoogieIcfgContainer [2018-07-24 11:01:57,601 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-07-24 11:01:57,602 INFO L168 Benchmark]: Toolchain (without parser) took 247457.90 ms. Allocated memory was 1.5 GB in the beginning and 2.1 GB in the end (delta: 610.3 MB). Free memory was 1.4 GB in the beginning and 1.9 GB in the end (delta: -541.8 MB). Peak memory consumption was 68.5 MB. Max. memory is 7.1 GB. [2018-07-24 11:01:57,602 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 11:01:57,603 INFO L168 Benchmark]: CACSL2BoogieTranslator took 265.51 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-07-24 11:01:57,603 INFO L168 Benchmark]: Boogie Procedure Inliner took 19.90 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 11:01:57,603 INFO L168 Benchmark]: Boogie Preprocessor took 16.46 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 11:01:57,604 INFO L168 Benchmark]: RCFGBuilder took 360.97 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 682.1 MB). Free memory was 1.4 GB in the beginning and 2.1 GB in the end (delta: -718.9 MB). Peak memory consumption was 27.2 MB. Max. memory is 7.1 GB. [2018-07-24 11:01:57,604 INFO L168 Benchmark]: TraceAbstraction took 246788.49 ms. Allocated memory was 2.2 GB in the beginning and 2.1 GB in the end (delta: -71.8 MB). Free memory was 2.1 GB in the beginning and 1.9 GB in the end (delta: 166.6 MB). Peak memory consumption was 94.7 MB. Max. memory is 7.1 GB. [2018-07-24 11:01:57,607 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 265.51 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 19.90 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 16.46 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 360.97 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 682.1 MB). Free memory was 1.4 GB in the beginning and 2.1 GB in the end (delta: -718.9 MB). Peak memory consumption was 27.2 MB. Max. memory is 7.1 GB. * TraceAbstraction took 246788.49 ms. Allocated memory was 2.2 GB in the beginning and 2.1 GB in the end (delta: -71.8 MB). Free memory was 2.1 GB in the beginning and 1.9 GB in the end (delta: 166.6 MB). Peak memory consumption was 94.7 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was constructing difference of abstraction (223states) and interpolant automaton (currently 23 states, 76 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 164. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 21 locations, 1 error locations. TIMEOUT Result, 246.6s OverallTime, 26 OverallIterations, 71 TraceHistogramMax, 117.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 339 SDtfs, 3586 SDslu, 7965 SDs, 0 SdLazy, 3711 SolverSat, 2298 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 13133 GetRequests, 10286 SyntacticMatches, 108 SemanticMatches, 2738 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40150 ImplicationChecksByTransitivity, 218.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=223occurred in iteration=25, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 25 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 10.2s SatisfiabilityAnalysisTime, 116.2s InterpolantComputationTime, 8555 NumberOfCodeBlocks, 8555 NumberOfCodeBlocksAsserted, 1026 NumberOfCheckSat, 14121 ConstructedInterpolants, 142 QuantifiedInterpolants, 13440723 SizeOfPredicates, 144 NumberOfNonLiveVariables, 8208 ConjunctsInSsa, 1848 ConjunctsInUnsatCore, 122 InterpolantComputations, 2 PerfectInterpolantSequences, 0/306600 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/count_by_k_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-07-24_11-01-57-616.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/count_by_k_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-07-24_11-01-57-616.csv Completed graceful shutdown