java -Xmx8000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml --generate-csv --csv-dir csv -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-acceleration/diamond_true-unreach-call1_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dd2f093 [2018-07-24 10:49:59,413 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-07-24 10:49:59,415 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-07-24 10:49:59,429 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-07-24 10:49:59,430 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-07-24 10:49:59,431 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-07-24 10:49:59,432 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-07-24 10:49:59,434 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-07-24 10:49:59,435 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-07-24 10:49:59,436 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-07-24 10:49:59,437 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-07-24 10:49:59,438 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-07-24 10:49:59,439 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-07-24 10:49:59,440 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-07-24 10:49:59,441 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-07-24 10:49:59,442 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-07-24 10:49:59,445 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-07-24 10:49:59,450 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-07-24 10:49:59,455 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-07-24 10:49:59,460 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-07-24 10:49:59,461 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-07-24 10:49:59,464 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-07-24 10:49:59,467 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-07-24 10:49:59,467 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-07-24 10:49:59,470 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-07-24 10:49:59,471 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-07-24 10:49:59,472 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-07-24 10:49:59,473 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-07-24 10:49:59,474 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-07-24 10:49:59,478 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-07-24 10:49:59,479 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-07-24 10:49:59,480 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-07-24 10:49:59,480 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-07-24 10:49:59,480 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-07-24 10:49:59,484 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-07-24 10:49:59,485 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-07-24 10:49:59,485 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-07-24 10:49:59,512 INFO L110 SettingsManager]: Loading preferences was successful [2018-07-24 10:49:59,513 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-07-24 10:49:59,514 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-07-24 10:49:59,514 INFO L133 SettingsManager]: * User list type=DISABLED [2018-07-24 10:49:59,514 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-07-24 10:49:59,514 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-07-24 10:49:59,514 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-07-24 10:49:59,515 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-07-24 10:49:59,515 INFO L133 SettingsManager]: * Log string format=TERM [2018-07-24 10:49:59,515 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-07-24 10:49:59,515 INFO L133 SettingsManager]: * Interval Domain=false [2018-07-24 10:49:59,516 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-07-24 10:49:59,516 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-07-24 10:49:59,516 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-07-24 10:49:59,516 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-07-24 10:49:59,517 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-07-24 10:49:59,517 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-07-24 10:49:59,517 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-07-24 10:49:59,517 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-07-24 10:49:59,518 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-07-24 10:49:59,518 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-07-24 10:49:59,518 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-07-24 10:49:59,518 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-07-24 10:49:59,518 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 10:49:59,519 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-07-24 10:49:59,519 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-07-24 10:49:59,519 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-07-24 10:49:59,519 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-07-24 10:49:59,519 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-07-24 10:49:59,520 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-07-24 10:49:59,520 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-07-24 10:49:59,520 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-07-24 10:49:59,520 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-07-24 10:49:59,565 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-07-24 10:49:59,582 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-07-24 10:49:59,589 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-07-24 10:49:59,590 INFO L271 PluginConnector]: Initializing CDTParser... [2018-07-24 10:49:59,591 INFO L276 PluginConnector]: CDTParser initialized [2018-07-24 10:49:59,592 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/diamond_true-unreach-call1_true-termination.i [2018-07-24 10:49:59,939 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/58d636e4c/368e286735d74418ae130b50df307923/FLAG808624227 [2018-07-24 10:50:00,115 INFO L276 CDTParser]: Found 1 translation units. [2018-07-24 10:50:00,117 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/diamond_true-unreach-call1_true-termination.i [2018-07-24 10:50:00,126 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/58d636e4c/368e286735d74418ae130b50df307923/FLAG808624227 [2018-07-24 10:50:00,148 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/58d636e4c/368e286735d74418ae130b50df307923 [2018-07-24 10:50:00,163 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-07-24 10:50:00,166 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-07-24 10:50:00,167 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-07-24 10:50:00,167 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-07-24 10:50:00,175 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-07-24 10:50:00,176 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,180 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4a9c81f9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00, skipping insertion in model container [2018-07-24 10:50:00,180 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,356 INFO L179 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-07-24 10:50:00,398 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 10:50:00,414 INFO L422 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-07-24 10:50:00,419 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 10:50:00,434 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00 WrapperNode [2018-07-24 10:50:00,434 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-07-24 10:50:00,435 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-07-24 10:50:00,435 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-07-24 10:50:00,435 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-07-24 10:50:00,445 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,451 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,457 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-07-24 10:50:00,458 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-07-24 10:50:00,458 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-07-24 10:50:00,458 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-07-24 10:50:00,468 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,468 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,469 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,469 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,471 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,476 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,477 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (1/1) ... [2018-07-24 10:50:00,479 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-07-24 10:50:00,479 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-07-24 10:50:00,480 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-07-24 10:50:00,480 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-07-24 10:50:00,481 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 10:50:00,550 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-07-24 10:50:00,550 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-07-24 10:50:00,550 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assert [2018-07-24 10:50:00,551 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assert [2018-07-24 10:50:00,551 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-07-24 10:50:00,551 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-07-24 10:50:00,553 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-07-24 10:50:00,553 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-07-24 10:50:00,894 INFO L261 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-07-24 10:50:00,895 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 10:50:00 BoogieIcfgContainer [2018-07-24 10:50:00,895 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-07-24 10:50:00,896 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-07-24 10:50:00,896 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-07-24 10:50:00,899 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-07-24 10:50:00,900 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.07 10:50:00" (1/3) ... [2018-07-24 10:50:00,900 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@36f8302a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 10:50:00, skipping insertion in model container [2018-07-24 10:50:00,901 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:50:00" (2/3) ... [2018-07-24 10:50:00,901 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@36f8302a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 10:50:00, skipping insertion in model container [2018-07-24 10:50:00,901 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 10:50:00" (3/3) ... [2018-07-24 10:50:00,903 INFO L112 eAbstractionObserver]: Analyzing ICFG diamond_true-unreach-call1_true-termination.i [2018-07-24 10:50:00,913 INFO L132 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-07-24 10:50:00,921 INFO L144 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-07-24 10:50:00,971 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-07-24 10:50:00,972 INFO L373 AbstractCegarLoop]: Interprodecural is true [2018-07-24 10:50:00,972 INFO L374 AbstractCegarLoop]: Hoare is true [2018-07-24 10:50:00,972 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-07-24 10:50:00,972 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-07-24 10:50:00,972 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-07-24 10:50:00,973 INFO L378 AbstractCegarLoop]: Difference is false [2018-07-24 10:50:00,973 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-07-24 10:50:00,973 INFO L384 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-07-24 10:50:00,991 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states. [2018-07-24 10:50:00,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-07-24 10:50:00,998 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:00,999 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:00,999 INFO L414 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:01,004 INFO L82 PathProgramCache]: Analyzing trace with hash 2038308009, now seen corresponding path program 1 times [2018-07-24 10:50:01,008 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:01,054 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:01,054 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:50:01,055 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:01,055 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:01,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:01,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:01,118 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:50:01,119 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-07-24 10:50:01,119 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:50:01,123 INFO L450 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-07-24 10:50:01,137 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-07-24 10:50:01,137 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-24 10:50:01,140 INFO L87 Difference]: Start difference. First operand 19 states. Second operand 2 states. [2018-07-24 10:50:01,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:01,160 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-07-24 10:50:01,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-07-24 10:50:01,161 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-07-24 10:50:01,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:01,169 INFO L225 Difference]: With dead ends: 30 [2018-07-24 10:50:01,169 INFO L226 Difference]: Without dead ends: 13 [2018-07-24 10:50:01,173 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-24 10:50:01,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-07-24 10:50:01,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-07-24 10:50:01,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-07-24 10:50:01,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2018-07-24 10:50:01,211 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 10 [2018-07-24 10:50:01,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:01,212 INFO L471 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2018-07-24 10:50:01,212 INFO L472 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-07-24 10:50:01,212 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2018-07-24 10:50:01,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-07-24 10:50:01,213 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:01,213 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:01,213 INFO L414 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:01,214 INFO L82 PathProgramCache]: Analyzing trace with hash -1653203952, now seen corresponding path program 1 times [2018-07-24 10:50:01,214 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:01,215 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:01,215 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:50:01,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:01,216 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:01,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:01,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:01,409 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:50:01,409 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-24 10:50:01,409 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:50:01,416 INFO L450 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-07-24 10:50:01,417 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-07-24 10:50:01,417 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-24 10:50:01,417 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand 3 states. [2018-07-24 10:50:01,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:01,486 INFO L93 Difference]: Finished difference Result 21 states and 23 transitions. [2018-07-24 10:50:01,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-07-24 10:50:01,487 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-07-24 10:50:01,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:01,489 INFO L225 Difference]: With dead ends: 21 [2018-07-24 10:50:01,490 INFO L226 Difference]: Without dead ends: 16 [2018-07-24 10:50:01,491 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-24 10:50:01,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-07-24 10:50:01,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 15. [2018-07-24 10:50:01,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-07-24 10:50:01,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2018-07-24 10:50:01,496 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 11 [2018-07-24 10:50:01,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:01,497 INFO L471 AbstractCegarLoop]: Abstraction has 15 states and 16 transitions. [2018-07-24 10:50:01,497 INFO L472 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-07-24 10:50:01,497 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2018-07-24 10:50:01,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-07-24 10:50:01,497 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:01,498 INFO L353 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:01,498 INFO L414 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:01,498 INFO L82 PathProgramCache]: Analyzing trace with hash 862972002, now seen corresponding path program 1 times [2018-07-24 10:50:01,498 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:01,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:01,500 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:50:01,500 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:01,500 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:01,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:01,632 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:01,633 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:01,633 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:50:01,645 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:50:01,646 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:50:01,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:01,685 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:01,720 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:01,721 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:01,812 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:01,835 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:01,835 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:50:01,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:50:01,852 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:50:01,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:01,877 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:01,914 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:01,914 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:01,954 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:01,956 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:50:01,957 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-07-24 10:50:01,957 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:50:01,958 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 10:50:01,958 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 10:50:01,958 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-07-24 10:50:01,959 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. Second operand 4 states. [2018-07-24 10:50:02,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:02,093 INFO L93 Difference]: Finished difference Result 24 states and 27 transitions. [2018-07-24 10:50:02,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 10:50:02,094 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-07-24 10:50:02,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:02,095 INFO L225 Difference]: With dead ends: 24 [2018-07-24 10:50:02,095 INFO L226 Difference]: Without dead ends: 19 [2018-07-24 10:50:02,096 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-07-24 10:50:02,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-07-24 10:50:02,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 18. [2018-07-24 10:50:02,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-07-24 10:50:02,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 20 transitions. [2018-07-24 10:50:02,101 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 20 transitions. Word has length 14 [2018-07-24 10:50:02,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:02,103 INFO L471 AbstractCegarLoop]: Abstraction has 18 states and 20 transitions. [2018-07-24 10:50:02,104 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 10:50:02,104 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2018-07-24 10:50:02,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-07-24 10:50:02,105 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:02,105 INFO L353 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:02,105 INFO L414 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:02,105 INFO L82 PathProgramCache]: Analyzing trace with hash -1656987932, now seen corresponding path program 1 times [2018-07-24 10:50:02,105 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:02,106 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:02,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:50:02,107 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:02,107 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:02,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:02,200 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:02,200 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:02,200 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:50:02,210 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:50:02,210 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:50:02,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:02,230 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:02,262 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:02,262 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:02,323 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:02,344 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:02,344 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:50:02,360 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:50:02,360 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:50:02,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:02,380 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:02,407 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:02,407 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:02,423 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:02,426 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:50:02,426 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-07-24 10:50:02,426 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:50:02,427 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 10:50:02,427 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 10:50:02,427 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-07-24 10:50:02,428 INFO L87 Difference]: Start difference. First operand 18 states and 20 transitions. Second operand 4 states. [2018-07-24 10:50:02,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:02,636 INFO L93 Difference]: Finished difference Result 26 states and 29 transitions. [2018-07-24 10:50:02,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 10:50:02,636 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-07-24 10:50:02,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:02,637 INFO L225 Difference]: With dead ends: 26 [2018-07-24 10:50:02,637 INFO L226 Difference]: Without dead ends: 21 [2018-07-24 10:50:02,638 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-07-24 10:50:02,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-07-24 10:50:02,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 18. [2018-07-24 10:50:02,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-07-24 10:50:02,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 20 transitions. [2018-07-24 10:50:02,643 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 20 transitions. Word has length 14 [2018-07-24 10:50:02,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:02,643 INFO L471 AbstractCegarLoop]: Abstraction has 18 states and 20 transitions. [2018-07-24 10:50:02,644 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 10:50:02,644 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2018-07-24 10:50:02,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-07-24 10:50:02,645 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:02,645 INFO L353 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:02,645 INFO L414 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:02,645 INFO L82 PathProgramCache]: Analyzing trace with hash 196600528, now seen corresponding path program 2 times [2018-07-24 10:50:02,646 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:02,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:02,646 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:50:02,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:02,647 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:02,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:02,754 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:02,754 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:02,755 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:50:02,772 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:50:02,773 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:50:02,794 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:50:02,794 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:50:02,796 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:02,811 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:02,812 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:03,018 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:03,039 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:03,039 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:50:03,057 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:50:03,057 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:50:03,086 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:50:03,086 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:50:03,090 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:03,101 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:03,102 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:03,122 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:03,126 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:50:03,127 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-07-24 10:50:03,127 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:50:03,127 INFO L450 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-07-24 10:50:03,128 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-07-24 10:50:03,128 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-07-24 10:50:03,128 INFO L87 Difference]: Start difference. First operand 18 states and 20 transitions. Second operand 5 states. [2018-07-24 10:50:03,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:03,258 INFO L93 Difference]: Finished difference Result 29 states and 33 transitions. [2018-07-24 10:50:03,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-07-24 10:50:03,258 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-07-24 10:50:03,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:03,259 INFO L225 Difference]: With dead ends: 29 [2018-07-24 10:50:03,259 INFO L226 Difference]: Without dead ends: 24 [2018-07-24 10:50:03,260 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-07-24 10:50:03,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-07-24 10:50:03,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 21. [2018-07-24 10:50:03,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-07-24 10:50:03,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 24 transitions. [2018-07-24 10:50:03,265 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 24 transitions. Word has length 17 [2018-07-24 10:50:03,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:03,265 INFO L471 AbstractCegarLoop]: Abstraction has 21 states and 24 transitions. [2018-07-24 10:50:03,265 INFO L472 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-07-24 10:50:03,266 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2018-07-24 10:50:03,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-07-24 10:50:03,266 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:03,266 INFO L353 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:03,267 INFO L414 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:03,267 INFO L82 PathProgramCache]: Analyzing trace with hash 1971607890, now seen corresponding path program 1 times [2018-07-24 10:50:03,267 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:03,268 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:03,268 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:50:03,268 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:03,269 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:03,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:05,336 WARN L169 SmtUtils]: Spent 2.02 s on a formula simplification. DAG size of input: 27 DAG size of output: 12 [2018-07-24 10:50:05,339 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:05,339 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:50:05,339 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-24 10:50:05,339 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:50:05,340 INFO L450 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-07-24 10:50:05,340 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-07-24 10:50:05,340 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-24 10:50:05,341 INFO L87 Difference]: Start difference. First operand 21 states and 24 transitions. Second operand 3 states. [2018-07-24 10:50:05,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:05,354 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2018-07-24 10:50:05,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-07-24 10:50:05,356 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-07-24 10:50:05,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:05,357 INFO L225 Difference]: With dead ends: 35 [2018-07-24 10:50:05,358 INFO L226 Difference]: Without dead ends: 27 [2018-07-24 10:50:05,358 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-24 10:50:05,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-07-24 10:50:05,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 26. [2018-07-24 10:50:05,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-07-24 10:50:05,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 29 transitions. [2018-07-24 10:50:05,365 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 29 transitions. Word has length 17 [2018-07-24 10:50:05,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:05,366 INFO L471 AbstractCegarLoop]: Abstraction has 26 states and 29 transitions. [2018-07-24 10:50:05,366 INFO L472 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-07-24 10:50:05,366 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 29 transitions. [2018-07-24 10:50:05,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-07-24 10:50:05,367 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:05,367 INFO L353 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:05,367 INFO L414 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:05,367 INFO L82 PathProgramCache]: Analyzing trace with hash -196426482, now seen corresponding path program 2 times [2018-07-24 10:50:05,367 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:05,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:05,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:50:05,369 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:05,369 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:05,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:07,413 WARN L1010 $PredicateComparison]: unable to prove that (let ((.cse4 (div c_main_~y~0 2))) (let ((.cse1 (* 2 .cse4))) (let ((.cse2 (* (- 2) .cse4)) (.cse0 (= .cse1 c_main_~y~0)) (.cse3 (* 4294967296 (div c_main_~y~0 4294967296)))) (and (or .cse0 (not (= (+ .cse1 (* 4294967296 (div (+ c_main_~y~0 .cse2 (- 2)) 4294967296)) 2) c_main_~y~0)) (<= .cse3 c_main_~y~0)) (or (not (= (+ .cse1 (* 4294967296 (div (+ c_main_~y~0 .cse2) 4294967296))) c_main_~y~0)) (and (not .cse0) (< c_main_~y~0 .cse3))))))) is different from false [2018-07-24 10:50:07,418 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:07,419 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:50:07,419 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-24 10:50:07,419 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:50:07,419 INFO L450 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-07-24 10:50:07,420 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-07-24 10:50:07,420 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=2, Unknown=1, NotChecked=0, Total=6 [2018-07-24 10:50:07,420 INFO L87 Difference]: Start difference. First operand 26 states and 29 transitions. Second operand 3 states. [2018-07-24 10:50:07,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:07,425 INFO L93 Difference]: Finished difference Result 34 states and 37 transitions. [2018-07-24 10:50:07,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-07-24 10:50:07,426 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-07-24 10:50:07,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:07,427 INFO L225 Difference]: With dead ends: 34 [2018-07-24 10:50:07,427 INFO L226 Difference]: Without dead ends: 26 [2018-07-24 10:50:07,427 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=3, Invalid=2, Unknown=1, NotChecked=0, Total=6 [2018-07-24 10:50:07,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-07-24 10:50:07,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-07-24 10:50:07,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-07-24 10:50:07,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 28 transitions. [2018-07-24 10:50:07,434 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 28 transitions. Word has length 17 [2018-07-24 10:50:07,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:07,434 INFO L471 AbstractCegarLoop]: Abstraction has 26 states and 28 transitions. [2018-07-24 10:50:07,435 INFO L472 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-07-24 10:50:07,435 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2018-07-24 10:50:07,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-07-24 10:50:07,436 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:07,436 INFO L353 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:07,436 INFO L414 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:07,436 INFO L82 PathProgramCache]: Analyzing trace with hash 1578580880, now seen corresponding path program 2 times [2018-07-24 10:50:07,436 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:07,437 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:07,437 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:50:07,438 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:07,438 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:07,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:07,537 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:07,538 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:07,538 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:50:07,547 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:50:07,548 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:50:07,556 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:50:07,556 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:50:07,558 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:07,593 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:07,593 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:08,009 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:08,038 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:08,038 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:50:08,053 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:50:08,053 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:50:08,083 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:50:08,083 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:50:08,087 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:08,150 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:08,151 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:08,192 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:08,195 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:50:08,195 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-07-24 10:50:08,195 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:50:08,196 INFO L450 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-07-24 10:50:08,196 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-07-24 10:50:08,196 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-07-24 10:50:08,197 INFO L87 Difference]: Start difference. First operand 26 states and 28 transitions. Second operand 5 states. [2018-07-24 10:50:08,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:08,337 INFO L93 Difference]: Finished difference Result 35 states and 37 transitions. [2018-07-24 10:50:08,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-07-24 10:50:08,338 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-07-24 10:50:08,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:08,339 INFO L225 Difference]: With dead ends: 35 [2018-07-24 10:50:08,339 INFO L226 Difference]: Without dead ends: 30 [2018-07-24 10:50:08,340 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-07-24 10:50:08,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-07-24 10:50:08,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2018-07-24 10:50:08,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-07-24 10:50:08,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 31 transitions. [2018-07-24 10:50:08,346 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 31 transitions. Word has length 17 [2018-07-24 10:50:08,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:08,346 INFO L471 AbstractCegarLoop]: Abstraction has 29 states and 31 transitions. [2018-07-24 10:50:08,346 INFO L472 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-07-24 10:50:08,347 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2018-07-24 10:50:08,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-07-24 10:50:08,348 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:08,348 INFO L353 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:08,348 INFO L414 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:08,348 INFO L82 PathProgramCache]: Analyzing trace with hash -337139294, now seen corresponding path program 3 times [2018-07-24 10:50:08,349 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:08,349 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:08,350 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:50:08,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:08,350 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:08,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:08,679 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:08,680 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:08,680 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:50:08,689 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:50:08,690 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:50:08,701 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-07-24 10:50:08,701 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:50:08,703 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:08,724 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:08,724 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:09,207 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:09,228 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:09,228 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:50:09,244 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:50:09,245 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:50:09,289 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-07-24 10:50:09,289 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:50:09,293 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:09,311 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:09,311 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:09,327 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:09,329 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:50:09,329 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 10 [2018-07-24 10:50:09,329 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:50:09,330 INFO L450 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-07-24 10:50:09,330 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-07-24 10:50:09,330 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-07-24 10:50:09,331 INFO L87 Difference]: Start difference. First operand 29 states and 31 transitions. Second operand 6 states. [2018-07-24 10:50:09,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:09,447 INFO L93 Difference]: Finished difference Result 38 states and 40 transitions. [2018-07-24 10:50:09,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-07-24 10:50:09,448 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-07-24 10:50:09,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:09,450 INFO L225 Difference]: With dead ends: 38 [2018-07-24 10:50:09,450 INFO L226 Difference]: Without dead ends: 33 [2018-07-24 10:50:09,451 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 74 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-07-24 10:50:09,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-07-24 10:50:09,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2018-07-24 10:50:09,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-07-24 10:50:09,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 34 transitions. [2018-07-24 10:50:09,457 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 34 transitions. Word has length 20 [2018-07-24 10:50:09,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:09,457 INFO L471 AbstractCegarLoop]: Abstraction has 32 states and 34 transitions. [2018-07-24 10:50:09,457 INFO L472 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-07-24 10:50:09,458 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 34 transitions. [2018-07-24 10:50:09,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-07-24 10:50:09,458 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:09,459 INFO L353 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:09,459 INFO L414 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:09,459 INFO L82 PathProgramCache]: Analyzing trace with hash 458035044, now seen corresponding path program 3 times [2018-07-24 10:50:09,459 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:09,460 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:09,460 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:50:09,460 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:09,461 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:09,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:50:09,583 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:09,583 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:09,583 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:50:09,591 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:50:09,591 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:50:33,638 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-07-24 10:50:33,638 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:50:33,640 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:33,652 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:33,653 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:33,791 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:33,812 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:50:33,812 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:50:33,827 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:50:33,827 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:50:59,782 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-07-24 10:50:59,783 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:50:59,786 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:50:59,814 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:59,815 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:50:59,832 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:50:59,839 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:50:59,839 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 10 [2018-07-24 10:50:59,840 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:50:59,840 INFO L450 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-07-24 10:50:59,840 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-07-24 10:50:59,840 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-07-24 10:50:59,841 INFO L87 Difference]: Start difference. First operand 32 states and 34 transitions. Second operand 6 states. [2018-07-24 10:50:59,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:50:59,910 INFO L93 Difference]: Finished difference Result 41 states and 43 transitions. [2018-07-24 10:50:59,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-07-24 10:50:59,910 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-07-24 10:50:59,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:50:59,911 INFO L225 Difference]: With dead ends: 41 [2018-07-24 10:50:59,911 INFO L226 Difference]: Without dead ends: 36 [2018-07-24 10:50:59,912 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 74 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-07-24 10:50:59,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-07-24 10:50:59,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 35. [2018-07-24 10:50:59,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-07-24 10:50:59,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 37 transitions. [2018-07-24 10:50:59,919 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 37 transitions. Word has length 20 [2018-07-24 10:50:59,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:50:59,920 INFO L471 AbstractCegarLoop]: Abstraction has 35 states and 37 transitions. [2018-07-24 10:50:59,920 INFO L472 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-07-24 10:50:59,920 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 37 transitions. [2018-07-24 10:50:59,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-07-24 10:50:59,921 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:50:59,921 INFO L353 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:50:59,921 INFO L414 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:50:59,922 INFO L82 PathProgramCache]: Analyzing trace with hash -1011246704, now seen corresponding path program 4 times [2018-07-24 10:50:59,922 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:50:59,922 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:59,923 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:50:59,923 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:50:59,923 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:50:59,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:00,140 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:00,141 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:00,141 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:00,153 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:51:00,153 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:51:00,163 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:51:00,163 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:00,166 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:00,187 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:00,187 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:00,640 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:00,660 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:00,661 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:51:00,678 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:51:00,678 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:51:00,705 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:51:00,705 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:00,709 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:00,749 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:00,750 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:00,756 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:00,757 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:51:00,757 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 12 [2018-07-24 10:51:00,757 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:51:00,758 INFO L450 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-07-24 10:51:00,758 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-07-24 10:51:00,758 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-07-24 10:51:00,759 INFO L87 Difference]: Start difference. First operand 35 states and 37 transitions. Second operand 7 states. [2018-07-24 10:51:00,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:00,919 INFO L93 Difference]: Finished difference Result 44 states and 46 transitions. [2018-07-24 10:51:00,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-07-24 10:51:00,920 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-07-24 10:51:00,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:00,921 INFO L225 Difference]: With dead ends: 44 [2018-07-24 10:51:00,921 INFO L226 Difference]: Without dead ends: 39 [2018-07-24 10:51:00,922 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 85 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-07-24 10:51:00,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-07-24 10:51:00,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 38. [2018-07-24 10:51:00,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-07-24 10:51:00,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 40 transitions. [2018-07-24 10:51:00,930 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 40 transitions. Word has length 23 [2018-07-24 10:51:00,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:00,930 INFO L471 AbstractCegarLoop]: Abstraction has 38 states and 40 transitions. [2018-07-24 10:51:00,931 INFO L472 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-07-24 10:51:00,931 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 40 transitions. [2018-07-24 10:51:00,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-07-24 10:51:00,932 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:00,932 INFO L353 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:00,932 INFO L414 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:00,932 INFO L82 PathProgramCache]: Analyzing trace with hash -1237140720, now seen corresponding path program 4 times [2018-07-24 10:51:00,932 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:00,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:00,933 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:51:00,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:00,934 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:00,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:01,180 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:01,181 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:01,181 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:01,188 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:51:01,188 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:51:01,206 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:51:01,206 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:01,208 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:01,230 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:01,230 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:01,376 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:01,397 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:01,397 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:51:01,412 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:51:01,412 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:51:01,435 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:51:01,436 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:01,439 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:01,461 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:01,461 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:01,510 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:01,515 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:51:01,515 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 12 [2018-07-24 10:51:01,516 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:51:01,516 INFO L450 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-07-24 10:51:01,516 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-07-24 10:51:01,517 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-07-24 10:51:01,517 INFO L87 Difference]: Start difference. First operand 38 states and 40 transitions. Second operand 7 states. [2018-07-24 10:51:01,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:01,791 INFO L93 Difference]: Finished difference Result 47 states and 49 transitions. [2018-07-24 10:51:01,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-07-24 10:51:01,793 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-07-24 10:51:01,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:01,794 INFO L225 Difference]: With dead ends: 47 [2018-07-24 10:51:01,794 INFO L226 Difference]: Without dead ends: 42 [2018-07-24 10:51:01,794 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 85 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-07-24 10:51:01,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-07-24 10:51:01,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2018-07-24 10:51:01,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-07-24 10:51:01,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 43 transitions. [2018-07-24 10:51:01,803 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 43 transitions. Word has length 23 [2018-07-24 10:51:01,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:01,803 INFO L471 AbstractCegarLoop]: Abstraction has 41 states and 43 transitions. [2018-07-24 10:51:01,803 INFO L472 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-07-24 10:51:01,804 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 43 transitions. [2018-07-24 10:51:01,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-07-24 10:51:01,805 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:01,805 INFO L353 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:01,805 INFO L414 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:01,805 INFO L82 PathProgramCache]: Analyzing trace with hash -78021918, now seen corresponding path program 5 times [2018-07-24 10:51:01,805 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:01,806 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:01,806 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:51:01,807 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:01,807 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:01,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:02,131 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:02,131 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:02,132 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:02,141 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:51:02,141 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:51:02,176 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-24 10:51:02,176 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:02,178 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:02,188 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:02,188 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:02,762 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:02,792 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:02,793 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:51:02,815 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:51:02,816 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:51:02,872 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-24 10:51:02,872 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:02,875 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:02,907 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:02,907 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:02,951 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:02,953 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:51:02,954 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-07-24 10:51:02,954 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:51:02,954 INFO L450 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-07-24 10:51:02,954 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-07-24 10:51:02,955 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-07-24 10:51:02,955 INFO L87 Difference]: Start difference. First operand 41 states and 43 transitions. Second operand 8 states. [2018-07-24 10:51:03,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:03,170 INFO L93 Difference]: Finished difference Result 50 states and 52 transitions. [2018-07-24 10:51:03,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-07-24 10:51:03,171 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-07-24 10:51:03,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:03,172 INFO L225 Difference]: With dead ends: 50 [2018-07-24 10:51:03,173 INFO L226 Difference]: Without dead ends: 45 [2018-07-24 10:51:03,173 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 96 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-07-24 10:51:03,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-07-24 10:51:03,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 44. [2018-07-24 10:51:03,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-07-24 10:51:03,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 46 transitions. [2018-07-24 10:51:03,181 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 46 transitions. Word has length 26 [2018-07-24 10:51:03,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:03,181 INFO L471 AbstractCegarLoop]: Abstraction has 44 states and 46 transitions. [2018-07-24 10:51:03,181 INFO L472 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-07-24 10:51:03,181 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 46 transitions. [2018-07-24 10:51:03,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-07-24 10:51:03,182 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:03,183 INFO L353 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:03,183 INFO L414 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:03,183 INFO L82 PathProgramCache]: Analyzing trace with hash -1992859676, now seen corresponding path program 5 times [2018-07-24 10:51:03,183 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:03,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:03,184 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:51:03,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:03,184 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:03,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:03,520 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:03,521 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:03,521 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:03,529 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:51:03,529 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:51:03,722 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-24 10:51:03,722 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:03,723 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:03,746 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:03,746 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:04,067 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:04,090 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:04,091 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:51:04,106 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:51:04,106 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:51:04,164 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-24 10:51:04,164 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:04,168 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:04,183 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:04,183 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:04,196 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:04,199 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:51:04,199 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-07-24 10:51:04,199 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:51:04,200 INFO L450 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-07-24 10:51:04,200 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-07-24 10:51:04,200 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-07-24 10:51:04,201 INFO L87 Difference]: Start difference. First operand 44 states and 46 transitions. Second operand 8 states. [2018-07-24 10:51:04,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:04,430 INFO L93 Difference]: Finished difference Result 53 states and 55 transitions. [2018-07-24 10:51:04,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-07-24 10:51:04,431 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-07-24 10:51:04,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:04,432 INFO L225 Difference]: With dead ends: 53 [2018-07-24 10:51:04,432 INFO L226 Difference]: Without dead ends: 48 [2018-07-24 10:51:04,433 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 96 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-07-24 10:51:04,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-07-24 10:51:04,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 47. [2018-07-24 10:51:04,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-07-24 10:51:04,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 49 transitions. [2018-07-24 10:51:04,441 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 49 transitions. Word has length 26 [2018-07-24 10:51:04,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:04,441 INFO L471 AbstractCegarLoop]: Abstraction has 47 states and 49 transitions. [2018-07-24 10:51:04,441 INFO L472 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-07-24 10:51:04,441 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 49 transitions. [2018-07-24 10:51:04,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-07-24 10:51:04,442 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:04,443 INFO L353 BasicCegarLoop]: trace histogram [7, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:04,443 INFO L414 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:04,443 INFO L82 PathProgramCache]: Analyzing trace with hash 298270800, now seen corresponding path program 6 times [2018-07-24 10:51:04,443 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:04,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:04,444 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:51:04,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:04,444 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:04,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:04,635 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:04,635 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:04,635 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:04,643 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:51:04,644 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:51:04,662 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-07-24 10:51:04,662 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:04,664 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:04,673 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:04,673 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:05,945 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:05,966 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:05,966 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:51:05,981 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:51:05,981 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:51:06,076 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-07-24 10:51:06,076 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:06,079 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:06,090 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:06,090 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:06,102 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:06,104 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:51:06,104 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 16 [2018-07-24 10:51:06,105 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:51:06,105 INFO L450 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-07-24 10:51:06,106 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-07-24 10:51:06,106 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-07-24 10:51:06,107 INFO L87 Difference]: Start difference. First operand 47 states and 49 transitions. Second operand 9 states. [2018-07-24 10:51:06,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:06,256 INFO L93 Difference]: Finished difference Result 56 states and 58 transitions. [2018-07-24 10:51:06,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-07-24 10:51:06,257 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-07-24 10:51:06,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:06,258 INFO L225 Difference]: With dead ends: 56 [2018-07-24 10:51:06,258 INFO L226 Difference]: Without dead ends: 51 [2018-07-24 10:51:06,258 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 107 SyntacticMatches, 3 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-07-24 10:51:06,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-07-24 10:51:06,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 50. [2018-07-24 10:51:06,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-07-24 10:51:06,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 52 transitions. [2018-07-24 10:51:06,265 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 52 transitions. Word has length 29 [2018-07-24 10:51:06,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:06,266 INFO L471 AbstractCegarLoop]: Abstraction has 50 states and 52 transitions. [2018-07-24 10:51:06,266 INFO L472 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-07-24 10:51:06,266 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 52 transitions. [2018-07-24 10:51:06,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-07-24 10:51:06,267 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:06,267 INFO L353 BasicCegarLoop]: trace histogram [7, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:06,267 INFO L414 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:06,268 INFO L82 PathProgramCache]: Analyzing trace with hash -1397712240, now seen corresponding path program 6 times [2018-07-24 10:51:06,268 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:06,268 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:06,268 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:51:06,269 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:06,269 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:06,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:06,662 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:06,663 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:06,663 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:06,671 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:51:06,671 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:51:06,706 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2018-07-24 10:51:06,706 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:06,707 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:09,369 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-07-24 10:51:09,370 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:39,815 WARN L169 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 16 [2018-07-24 10:51:43,869 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 28 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-07-24 10:51:43,890 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-07-24 10:51:43,890 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [9, 8] total 21 [2018-07-24 10:51:43,890 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:51:43,891 INFO L450 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-07-24 10:51:43,891 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-07-24 10:51:43,891 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=345, Unknown=9, NotChecked=0, Total=420 [2018-07-24 10:51:43,892 INFO L87 Difference]: Start difference. First operand 50 states and 52 transitions. Second operand 8 states. [2018-07-24 10:51:46,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:46,221 INFO L93 Difference]: Finished difference Result 55 states and 56 transitions. [2018-07-24 10:51:46,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-07-24 10:51:46,222 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-07-24 10:51:46,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:46,222 INFO L225 Difference]: With dead ends: 55 [2018-07-24 10:51:46,223 INFO L226 Difference]: Without dead ends: 33 [2018-07-24 10:51:46,223 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 33.3s TimeCoverageRelationStatistics Valid=79, Invalid=417, Unknown=10, NotChecked=0, Total=506 [2018-07-24 10:51:46,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-07-24 10:51:46,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-07-24 10:51:46,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-07-24 10:51:46,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-07-24 10:51:46,227 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 29 [2018-07-24 10:51:46,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:46,227 INFO L471 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-07-24 10:51:46,227 INFO L472 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-07-24 10:51:46,228 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-07-24 10:51:46,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-07-24 10:51:46,228 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:46,228 INFO L353 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:46,229 INFO L414 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:46,229 INFO L82 PathProgramCache]: Analyzing trace with hash 569990178, now seen corresponding path program 7 times [2018-07-24 10:51:46,229 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:46,230 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:46,230 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:51:46,230 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:46,230 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:46,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:46,393 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:46,394 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:46,394 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:46,405 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:51:46,405 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:51:46,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:46,418 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:46,476 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:46,477 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:48,208 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:48,229 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:48,229 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:51:48,244 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:51:48,245 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:51:48,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:48,275 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:48,285 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:48,285 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:48,340 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:48,343 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:51:48,344 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 18 [2018-07-24 10:51:48,344 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:51:48,344 INFO L450 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-07-24 10:51:48,344 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-07-24 10:51:48,345 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-07-24 10:51:48,345 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 10 states. [2018-07-24 10:51:48,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:48,501 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-07-24 10:51:48,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-07-24 10:51:48,501 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 32 [2018-07-24 10:51:48,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:48,502 INFO L225 Difference]: With dead ends: 42 [2018-07-24 10:51:48,503 INFO L226 Difference]: Without dead ends: 37 [2018-07-24 10:51:48,504 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 118 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-07-24 10:51:48,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-07-24 10:51:48,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 36. [2018-07-24 10:51:48,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-07-24 10:51:48,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-07-24 10:51:48,508 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 32 [2018-07-24 10:51:48,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:48,509 INFO L471 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-07-24 10:51:48,509 INFO L472 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-07-24 10:51:48,509 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-07-24 10:51:48,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-07-24 10:51:48,510 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:48,510 INFO L353 BasicCegarLoop]: trace histogram [9, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:48,510 INFO L414 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:48,510 INFO L82 PathProgramCache]: Analyzing trace with hash -651372784, now seen corresponding path program 8 times [2018-07-24 10:51:48,510 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:48,511 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:48,511 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:51:48,511 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:48,511 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:48,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:48,717 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:48,717 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:48,717 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:48,725 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:51:48,725 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:51:48,737 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:51:48,737 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:48,739 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:48,754 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:48,754 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:51,266 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:51,285 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:51,286 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:51:51,301 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:51:51,302 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:51:51,332 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:51:51,332 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:51,335 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:51,344 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:51,344 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:51,352 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:51,354 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:51:51,354 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-07-24 10:51:51,355 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:51:51,355 INFO L450 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-07-24 10:51:51,355 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-07-24 10:51:51,355 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-07-24 10:51:51,355 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 11 states. [2018-07-24 10:51:51,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:51,509 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-07-24 10:51:51,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-07-24 10:51:51,510 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-07-24 10:51:51,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:51,511 INFO L225 Difference]: With dead ends: 45 [2018-07-24 10:51:51,511 INFO L226 Difference]: Without dead ends: 40 [2018-07-24 10:51:51,511 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 129 SyntacticMatches, 3 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-07-24 10:51:51,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-07-24 10:51:51,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2018-07-24 10:51:51,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-07-24 10:51:51,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-07-24 10:51:51,516 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 35 [2018-07-24 10:51:51,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:51,516 INFO L471 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-07-24 10:51:51,516 INFO L472 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-07-24 10:51:51,516 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-07-24 10:51:51,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-07-24 10:51:51,517 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:51,517 INFO L353 BasicCegarLoop]: trace histogram [10, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:51,517 INFO L414 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:51,518 INFO L82 PathProgramCache]: Analyzing trace with hash 687557986, now seen corresponding path program 9 times [2018-07-24 10:51:51,518 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:51,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:51,518 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:51:51,519 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:51,519 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:51,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:51,703 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:51,703 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:51,703 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:51,712 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:51:51,712 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:51:51,781 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-07-24 10:51:51,782 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:51,783 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:51,792 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:51,792 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:54,899 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:54,918 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:54,919 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:51:54,933 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:51:54,933 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:51:55,106 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-07-24 10:51:55,107 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:55,110 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:55,118 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:55,118 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:55,123 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:55,124 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:51:55,124 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 22 [2018-07-24 10:51:55,124 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:51:55,125 INFO L450 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-07-24 10:51:55,125 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-07-24 10:51:55,125 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-07-24 10:51:55,126 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 12 states. [2018-07-24 10:51:55,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:55,302 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-07-24 10:51:55,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-07-24 10:51:55,302 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-07-24 10:51:55,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:55,303 INFO L225 Difference]: With dead ends: 48 [2018-07-24 10:51:55,303 INFO L226 Difference]: Without dead ends: 43 [2018-07-24 10:51:55,304 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 140 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-07-24 10:51:55,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-07-24 10:51:55,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 42. [2018-07-24 10:51:55,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-07-24 10:51:55,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-07-24 10:51:55,311 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 38 [2018-07-24 10:51:55,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:55,311 INFO L471 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-07-24 10:51:55,311 INFO L472 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-07-24 10:51:55,311 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-07-24 10:51:55,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-07-24 10:51:55,312 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:55,312 INFO L353 BasicCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:55,313 INFO L414 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:55,313 INFO L82 PathProgramCache]: Analyzing trace with hash 1412849104, now seen corresponding path program 10 times [2018-07-24 10:51:55,313 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:55,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:55,314 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:51:55,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:55,314 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:55,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:55,601 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:55,601 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:55,602 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:55,615 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:51:55,615 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:51:55,654 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:51:55,655 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:55,656 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:55,700 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:55,701 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:58,855 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:58,876 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:58,876 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:51:58,895 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:51:58,895 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:51:58,930 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:51:58,930 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:51:58,933 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:51:58,946 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:58,947 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:51:58,956 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:58,958 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:51:58,958 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 24 [2018-07-24 10:51:58,958 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:51:58,958 INFO L450 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-07-24 10:51:58,959 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-07-24 10:51:58,959 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-07-24 10:51:58,959 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 13 states. [2018-07-24 10:51:59,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:51:59,196 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-07-24 10:51:59,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-07-24 10:51:59,196 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 41 [2018-07-24 10:51:59,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:51:59,197 INFO L225 Difference]: With dead ends: 51 [2018-07-24 10:51:59,197 INFO L226 Difference]: Without dead ends: 46 [2018-07-24 10:51:59,198 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 151 SyntacticMatches, 3 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-07-24 10:51:59,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-07-24 10:51:59,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 45. [2018-07-24 10:51:59,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-07-24 10:51:59,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-07-24 10:51:59,202 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 41 [2018-07-24 10:51:59,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:51:59,202 INFO L471 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-07-24 10:51:59,203 INFO L472 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-07-24 10:51:59,203 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-07-24 10:51:59,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-07-24 10:51:59,203 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:51:59,203 INFO L353 BasicCegarLoop]: trace histogram [12, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:51:59,204 INFO L414 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:51:59,204 INFO L82 PathProgramCache]: Analyzing trace with hash 580079266, now seen corresponding path program 11 times [2018-07-24 10:51:59,204 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:51:59,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:59,205 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:51:59,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:51:59,205 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:51:59,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:51:59,444 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:51:59,445 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:51:59,445 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:51:59,452 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:51:59,453 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:52:02,599 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-07-24 10:52:02,599 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:52:02,635 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:02,660 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:02,660 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:05,970 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:05,991 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:05,991 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:52:06,006 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:52:06,006 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:52:06,191 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-07-24 10:52:06,191 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:52:06,195 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:06,208 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:06,208 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:06,229 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:06,230 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:52:06,231 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-07-24 10:52:06,231 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:52:06,231 INFO L450 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-07-24 10:52:06,231 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-07-24 10:52:06,232 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-07-24 10:52:06,232 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 14 states. [2018-07-24 10:52:06,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:52:06,485 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-07-24 10:52:06,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-07-24 10:52:06,485 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-07-24 10:52:06,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:52:06,486 INFO L225 Difference]: With dead ends: 54 [2018-07-24 10:52:06,486 INFO L226 Difference]: Without dead ends: 49 [2018-07-24 10:52:06,487 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 162 SyntacticMatches, 3 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-07-24 10:52:06,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-07-24 10:52:06,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 48. [2018-07-24 10:52:06,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-07-24 10:52:06,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-07-24 10:52:06,491 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 44 [2018-07-24 10:52:06,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:52:06,492 INFO L471 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-07-24 10:52:06,492 INFO L472 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-07-24 10:52:06,492 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-07-24 10:52:06,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-07-24 10:52:06,493 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:52:06,493 INFO L353 BasicCegarLoop]: trace histogram [13, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:52:06,493 INFO L414 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:52:06,493 INFO L82 PathProgramCache]: Analyzing trace with hash -735062896, now seen corresponding path program 12 times [2018-07-24 10:52:06,493 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:52:06,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:06,494 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:52:06,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:06,495 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:52:06,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:52:07,761 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:07,762 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:07,762 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:52:07,769 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:52:07,769 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:52:31,899 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-07-24 10:52:31,899 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:52:31,980 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:32,012 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:32,012 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:35,810 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:35,831 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:35,831 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:52:35,847 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:52:35,847 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:52:36,109 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-07-24 10:52:36,110 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:52:36,113 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:36,129 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:36,130 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:36,186 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:36,190 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:52:36,191 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-07-24 10:52:36,191 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:52:36,191 INFO L450 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-07-24 10:52:36,191 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-07-24 10:52:36,192 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-07-24 10:52:36,192 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 15 states. [2018-07-24 10:52:36,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:52:36,462 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-07-24 10:52:36,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-07-24 10:52:36,465 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2018-07-24 10:52:36,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:52:36,465 INFO L225 Difference]: With dead ends: 57 [2018-07-24 10:52:36,465 INFO L226 Difference]: Without dead ends: 52 [2018-07-24 10:52:36,466 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 173 SyntacticMatches, 3 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-07-24 10:52:36,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-07-24 10:52:36,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 51. [2018-07-24 10:52:36,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-07-24 10:52:36,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-07-24 10:52:36,470 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 47 [2018-07-24 10:52:36,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:52:36,470 INFO L471 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-07-24 10:52:36,470 INFO L472 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-07-24 10:52:36,470 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-07-24 10:52:36,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-07-24 10:52:36,471 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:52:36,471 INFO L353 BasicCegarLoop]: trace histogram [14, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:52:36,471 INFO L414 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:52:36,471 INFO L82 PathProgramCache]: Analyzing trace with hash -1443536926, now seen corresponding path program 13 times [2018-07-24 10:52:36,471 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:52:36,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:36,472 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:52:36,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:36,472 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:52:36,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:52:36,703 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:36,703 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:36,703 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:52:36,711 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:52:36,711 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:52:36,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:52:36,726 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:36,757 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:36,757 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:43,610 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:43,630 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:43,631 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:52:43,646 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:52:43,646 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:52:43,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:52:43,689 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:43,708 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:43,708 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:43,762 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:43,764 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:52:43,765 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-07-24 10:52:43,765 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:52:43,765 INFO L450 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-07-24 10:52:43,765 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-07-24 10:52:43,766 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-07-24 10:52:43,766 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 16 states. [2018-07-24 10:52:44,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:52:44,216 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-07-24 10:52:44,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-07-24 10:52:44,218 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-07-24 10:52:44,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:52:44,219 INFO L225 Difference]: With dead ends: 60 [2018-07-24 10:52:44,219 INFO L226 Difference]: Without dead ends: 55 [2018-07-24 10:52:44,220 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 184 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 7.0s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-07-24 10:52:44,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-07-24 10:52:44,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 54. [2018-07-24 10:52:44,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-07-24 10:52:44,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-07-24 10:52:44,224 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 50 [2018-07-24 10:52:44,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:52:44,225 INFO L471 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-07-24 10:52:44,225 INFO L472 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-07-24 10:52:44,225 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-07-24 10:52:44,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-07-24 10:52:44,226 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:52:44,226 INFO L353 BasicCegarLoop]: trace histogram [15, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:52:44,226 INFO L414 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:52:44,226 INFO L82 PathProgramCache]: Analyzing trace with hash -2124072112, now seen corresponding path program 14 times [2018-07-24 10:52:44,226 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:52:44,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:44,227 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:52:44,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:44,227 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:52:44,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:52:44,504 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:44,505 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:44,505 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:52:44,513 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:52:44,514 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:52:44,528 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:52:44,528 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:52:44,530 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:44,541 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:44,542 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:49,650 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:49,670 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:49,671 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:52:49,685 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:52:49,685 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:52:49,732 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:52:49,732 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:52:49,736 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:49,782 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:49,783 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:52:49,795 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:49,798 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:52:49,799 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-07-24 10:52:49,799 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:52:49,799 INFO L450 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-07-24 10:52:49,799 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-07-24 10:52:49,800 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-07-24 10:52:49,800 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 17 states. [2018-07-24 10:52:50,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:52:50,564 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-07-24 10:52:50,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-07-24 10:52:50,564 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 53 [2018-07-24 10:52:50,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:52:50,565 INFO L225 Difference]: With dead ends: 63 [2018-07-24 10:52:50,565 INFO L226 Difference]: Without dead ends: 58 [2018-07-24 10:52:50,566 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 195 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-07-24 10:52:50,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-07-24 10:52:50,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 57. [2018-07-24 10:52:50,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-07-24 10:52:50,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-07-24 10:52:50,570 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 53 [2018-07-24 10:52:50,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:52:50,570 INFO L471 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-07-24 10:52:50,570 INFO L472 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-07-24 10:52:50,570 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-07-24 10:52:50,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-07-24 10:52:50,571 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:52:50,571 INFO L353 BasicCegarLoop]: trace histogram [16, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:52:50,571 INFO L414 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:52:50,571 INFO L82 PathProgramCache]: Analyzing trace with hash 592806178, now seen corresponding path program 15 times [2018-07-24 10:52:50,571 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:52:50,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:50,572 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:52:50,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:52:50,572 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:52:50,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:52:51,496 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:51,496 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:52:51,496 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:52:51,504 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:52:51,504 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:52:58,621 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-07-24 10:52:58,622 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:52:58,643 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:52:58,678 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:52:58,679 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:53:09,894 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 342 refuted. 3 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:53:09,915 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:53:09,915 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:53:09,931 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:53:09,931 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:53:10,329 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-07-24 10:53:10,330 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:53:10,333 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:53:10,344 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:53:10,344 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:53:10,356 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 342 refuted. 3 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:53:10,358 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:53:10,358 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 34 [2018-07-24 10:53:10,358 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:53:10,359 INFO L450 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-07-24 10:53:10,359 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-07-24 10:53:10,359 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=321, Invalid=799, Unknown=2, NotChecked=0, Total=1122 [2018-07-24 10:53:10,359 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 18 states. [2018-07-24 10:53:10,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:53:10,764 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-07-24 10:53:10,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-07-24 10:53:10,767 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2018-07-24 10:53:10,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:53:10,767 INFO L225 Difference]: With dead ends: 66 [2018-07-24 10:53:10,767 INFO L226 Difference]: Without dead ends: 61 [2018-07-24 10:53:10,768 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 206 SyntacticMatches, 3 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 12.0s TimeCoverageRelationStatistics Valid=321, Invalid=799, Unknown=2, NotChecked=0, Total=1122 [2018-07-24 10:53:10,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-07-24 10:53:10,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 60. [2018-07-24 10:53:10,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-07-24 10:53:10,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 60 transitions. [2018-07-24 10:53:10,772 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 60 transitions. Word has length 56 [2018-07-24 10:53:10,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:53:10,772 INFO L471 AbstractCegarLoop]: Abstraction has 60 states and 60 transitions. [2018-07-24 10:53:10,772 INFO L472 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-07-24 10:53:10,772 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 60 transitions. [2018-07-24 10:53:10,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-07-24 10:53:10,773 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:53:10,773 INFO L353 BasicCegarLoop]: trace histogram [17, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:53:10,773 INFO L414 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:53:10,773 INFO L82 PathProgramCache]: Analyzing trace with hash 455250448, now seen corresponding path program 16 times [2018-07-24 10:53:10,773 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:53:10,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:53:10,774 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:53:10,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:53:10,774 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:53:10,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:53:11,094 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:53:11,094 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:53:11,094 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:53:11,102 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:53:11,102 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:53:11,123 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:53:11,123 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:53:11,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:53:11,154 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:53:11,154 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:53:18,215 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:53:18,236 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:53:18,236 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:53:18,252 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:53:18,253 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:53:18,303 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:53:18,304 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:53:18,307 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:53:18,336 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:53:18,336 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:53:18,371 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:53:18,373 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:53:18,374 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 36 [2018-07-24 10:53:18,374 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:53:18,374 INFO L450 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-07-24 10:53:18,375 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-07-24 10:53:18,375 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-07-24 10:53:18,375 INFO L87 Difference]: Start difference. First operand 60 states and 60 transitions. Second operand 19 states. [2018-07-24 10:53:18,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:53:18,823 INFO L93 Difference]: Finished difference Result 69 states and 69 transitions. [2018-07-24 10:53:18,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-07-24 10:53:18,824 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2018-07-24 10:53:18,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:53:18,825 INFO L225 Difference]: With dead ends: 69 [2018-07-24 10:53:18,825 INFO L226 Difference]: Without dead ends: 64 [2018-07-24 10:53:18,826 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 254 GetRequests, 217 SyntacticMatches, 3 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-07-24 10:53:18,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-07-24 10:53:18,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 63. [2018-07-24 10:53:18,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-07-24 10:53:18,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 63 transitions. [2018-07-24 10:53:18,830 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 63 transitions. Word has length 59 [2018-07-24 10:53:18,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:53:18,830 INFO L471 AbstractCegarLoop]: Abstraction has 63 states and 63 transitions. [2018-07-24 10:53:18,830 INFO L472 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-07-24 10:53:18,830 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 63 transitions. [2018-07-24 10:53:18,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-07-24 10:53:18,831 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:53:18,831 INFO L353 BasicCegarLoop]: trace histogram [18, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:53:18,831 INFO L414 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_diamond_true_unreach_call__true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:53:18,831 INFO L82 PathProgramCache]: Analyzing trace with hash -68701598, now seen corresponding path program 17 times [2018-07-24 10:53:18,831 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:53:18,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:53:18,832 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:53:18,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:53:18,832 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:53:18,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:53:19,996 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:53:19,996 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:53:19,996 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:53:20,004 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:53:20,005 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:54:33,121 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-07-24 10:54:33,122 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:33,197 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:33,232 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:33,232 INFO L316 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-07-24 10:54:40,536 INFO L177 TraceCheckSpWp]: Timeout while computing interpolants [2018-07-24 10:54:40,737 WARN L512 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 45 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:40,737 WARN L540 AbstractCegarLoop]: Verification canceled [2018-07-24 10:54:40,743 WARN L202 ceAbstractionStarter]: Timeout [2018-07-24 10:54:40,743 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.07 10:54:40 BoogieIcfgContainer [2018-07-24 10:54:40,743 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-07-24 10:54:40,744 INFO L168 Benchmark]: Toolchain (without parser) took 280579.54 ms. Allocated memory was 1.5 GB in the beginning and 2.6 GB in the end (delta: 1.1 GB). Free memory was 1.4 GB in the beginning and 2.3 GB in the end (delta: -875.8 MB). Peak memory consumption was 196.9 MB. Max. memory is 7.1 GB. [2018-07-24 10:54:40,745 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:54:40,745 INFO L168 Benchmark]: CACSL2BoogieTranslator took 267.92 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-07-24 10:54:40,745 INFO L168 Benchmark]: Boogie Procedure Inliner took 22.37 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:54:40,746 INFO L168 Benchmark]: Boogie Preprocessor took 21.39 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:54:40,746 INFO L168 Benchmark]: RCFGBuilder took 415.59 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 761.8 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -800.3 MB). Peak memory consumption was 27.1 MB. Max. memory is 7.1 GB. [2018-07-24 10:54:40,747 INFO L168 Benchmark]: TraceAbstraction took 279847.47 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 310.9 MB). Free memory was 2.2 GB in the beginning and 2.3 GB in the end (delta: -86.0 MB). Peak memory consumption was 224.9 MB. Max. memory is 7.1 GB. [2018-07-24 10:54:40,750 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 267.92 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 22.37 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 21.39 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 415.59 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 761.8 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -800.3 MB). Peak memory consumption was 27.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 279847.47 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 310.9 MB). Free memory was 2.2 GB in the beginning and 2.3 GB in the end (delta: -86.0 MB). Peak memory consumption was 224.9 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was analyzing trace of length 63 with TraceHistMax 18, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 37 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 19 locations, 1 error locations. TIMEOUT Result, 279.7s OverallTime, 27 OverallIterations, 18 TraceHistogramMax, 7.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 458 SDtfs, 27 SDslu, 3152 SDs, 0 SdLazy, 4234 SolverSat, 6 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3010 GetRequests, 2577 SyntacticMatches, 65 SemanticMatches, 368 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 217 ImplicationChecksByTransitivity, 95.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=63occurred in iteration=26, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 26 MinimizatonAttempts, 27 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 86.7s SatisfiabilityAnalysisTime, 101.7s InterpolantComputationTime, 2165 NumberOfCodeBlocks, 2153 NumberOfCodeBlocksAsserted, 225 NumberOfCheckSat, 3450 ConstructedInterpolants, 11 QuantifiedInterpolants, 737106 SizeOfPredicates, 46 NumberOfNonLiveVariables, 2867 ConjunctsInSsa, 741 ConjunctsInUnsatCore, 112 InterpolantComputations, 5 PerfectInterpolantSequences, 117/12195 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/diamond_true-unreach-call1_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-07-24_10-54-40-762.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/diamond_true-unreach-call1_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-07-24_10-54-40-762.csv Completed graceful shutdown