java -Xmx8000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml --generate-csv --csv-dir csv -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loops/invert_string_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dd2f093 [2018-07-24 10:44:18,887 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-07-24 10:44:18,890 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-07-24 10:44:18,908 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-07-24 10:44:18,908 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-07-24 10:44:18,910 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-07-24 10:44:18,911 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-07-24 10:44:18,914 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-07-24 10:44:18,916 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-07-24 10:44:18,925 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-07-24 10:44:18,926 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-07-24 10:44:18,927 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-07-24 10:44:18,930 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-07-24 10:44:18,931 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-07-24 10:44:18,932 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-07-24 10:44:18,935 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-07-24 10:44:18,936 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-07-24 10:44:18,941 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-07-24 10:44:18,943 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-07-24 10:44:18,947 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-07-24 10:44:18,950 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-07-24 10:44:18,954 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-07-24 10:44:18,959 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-07-24 10:44:18,975 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-07-24 10:44:19,004 INFO L110 SettingsManager]: Loading preferences was successful [2018-07-24 10:44:19,005 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-07-24 10:44:19,006 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-07-24 10:44:19,007 INFO L133 SettingsManager]: * User list type=DISABLED [2018-07-24 10:44:19,007 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-07-24 10:44:19,007 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-07-24 10:44:19,007 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-07-24 10:44:19,008 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-07-24 10:44:19,008 INFO L133 SettingsManager]: * Log string format=TERM [2018-07-24 10:44:19,008 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-07-24 10:44:19,008 INFO L133 SettingsManager]: * Interval Domain=false [2018-07-24 10:44:19,009 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-07-24 10:44:19,009 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-07-24 10:44:19,009 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-07-24 10:44:19,010 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-07-24 10:44:19,010 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-07-24 10:44:19,010 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-07-24 10:44:19,010 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-07-24 10:44:19,012 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-07-24 10:44:19,012 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-07-24 10:44:19,012 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-07-24 10:44:19,012 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-07-24 10:44:19,012 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-07-24 10:44:19,013 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 10:44:19,013 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-07-24 10:44:19,013 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-07-24 10:44:19,013 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-07-24 10:44:19,014 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-07-24 10:44:19,014 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-07-24 10:44:19,014 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-07-24 10:44:19,014 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-07-24 10:44:19,014 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-07-24 10:44:19,015 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-07-24 10:44:19,091 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-07-24 10:44:19,104 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-07-24 10:44:19,113 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-07-24 10:44:19,115 INFO L271 PluginConnector]: Initializing CDTParser... [2018-07-24 10:44:19,115 INFO L276 PluginConnector]: CDTParser initialized [2018-07-24 10:44:19,116 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/invert_string_true-unreach-call_true-termination.i [2018-07-24 10:44:19,471 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/01b32d06d/da479858af5f4009bed418568405444f/FLAG19454d172 [2018-07-24 10:44:19,610 INFO L276 CDTParser]: Found 1 translation units. [2018-07-24 10:44:19,611 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string_true-unreach-call_true-termination.i [2018-07-24 10:44:19,618 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/01b32d06d/da479858af5f4009bed418568405444f/FLAG19454d172 [2018-07-24 10:44:19,635 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/01b32d06d/da479858af5f4009bed418568405444f [2018-07-24 10:44:19,646 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-07-24 10:44:19,648 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-07-24 10:44:19,649 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-07-24 10:44:19,649 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-07-24 10:44:19,656 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-07-24 10:44:19,657 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:19,660 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7bd2667d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19, skipping insertion in model container [2018-07-24 10:44:19,660 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:19,874 INFO L179 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-07-24 10:44:19,937 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 10:44:19,957 INFO L422 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-07-24 10:44:19,969 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 10:44:19,986 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19 WrapperNode [2018-07-24 10:44:19,987 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-07-24 10:44:19,988 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-07-24 10:44:19,988 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-07-24 10:44:19,988 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-07-24 10:44:19,998 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:20,008 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:20,015 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-07-24 10:44:20,016 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-07-24 10:44:20,016 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-07-24 10:44:20,016 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-07-24 10:44:20,027 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:20,028 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:20,029 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:20,029 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:20,033 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:20,048 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:20,049 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (1/1) ... [2018-07-24 10:44:20,051 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-07-24 10:44:20,052 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-07-24 10:44:20,052 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-07-24 10:44:20,052 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-07-24 10:44:20,053 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 10:44:20,122 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-07-24 10:44:20,122 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-07-24 10:44:20,123 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assert [2018-07-24 10:44:20,123 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assert [2018-07-24 10:44:20,123 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-07-24 10:44:20,124 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-07-24 10:44:20,124 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-07-24 10:44:20,124 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-07-24 10:44:20,509 INFO L261 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-07-24 10:44:20,510 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 10:44:20 BoogieIcfgContainer [2018-07-24 10:44:20,511 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-07-24 10:44:20,512 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-07-24 10:44:20,512 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-07-24 10:44:20,516 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-07-24 10:44:20,516 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.07 10:44:19" (1/3) ... [2018-07-24 10:44:20,517 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b05603e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 10:44:20, skipping insertion in model container [2018-07-24 10:44:20,517 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:44:19" (2/3) ... [2018-07-24 10:44:20,521 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b05603e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 10:44:20, skipping insertion in model container [2018-07-24 10:44:20,521 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 10:44:20" (3/3) ... [2018-07-24 10:44:20,523 INFO L112 eAbstractionObserver]: Analyzing ICFG invert_string_true-unreach-call_true-termination.i [2018-07-24 10:44:20,537 INFO L132 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-07-24 10:44:20,548 INFO L144 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-07-24 10:44:20,603 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-07-24 10:44:20,605 INFO L373 AbstractCegarLoop]: Interprodecural is true [2018-07-24 10:44:20,606 INFO L374 AbstractCegarLoop]: Hoare is true [2018-07-24 10:44:20,606 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-07-24 10:44:20,606 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-07-24 10:44:20,606 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-07-24 10:44:20,606 INFO L378 AbstractCegarLoop]: Difference is false [2018-07-24 10:44:20,607 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-07-24 10:44:20,607 INFO L384 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-07-24 10:44:20,627 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states. [2018-07-24 10:44:20,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-07-24 10:44:20,634 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:20,635 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:20,635 INFO L414 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:20,641 INFO L82 PathProgramCache]: Analyzing trace with hash 2061587637, now seen corresponding path program 1 times [2018-07-24 10:44:20,644 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:20,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:20,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:20,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:20,689 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:20,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:20,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:44:20,750 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:44:20,750 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-07-24 10:44:20,750 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:44:20,754 INFO L450 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-07-24 10:44:20,767 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-07-24 10:44:20,768 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-24 10:44:20,771 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 2 states. [2018-07-24 10:44:20,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:44:20,793 INFO L93 Difference]: Finished difference Result 48 states and 59 transitions. [2018-07-24 10:44:20,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-07-24 10:44:20,795 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 15 [2018-07-24 10:44:20,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:44:20,803 INFO L225 Difference]: With dead ends: 48 [2018-07-24 10:44:20,804 INFO L226 Difference]: Without dead ends: 24 [2018-07-24 10:44:20,808 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-24 10:44:20,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-07-24 10:44:20,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-07-24 10:44:20,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-07-24 10:44:20,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2018-07-24 10:44:20,848 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 15 [2018-07-24 10:44:20,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:44:20,849 INFO L471 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2018-07-24 10:44:20,849 INFO L472 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-07-24 10:44:20,849 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2018-07-24 10:44:20,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-07-24 10:44:20,850 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:20,850 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:20,850 INFO L414 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:20,851 INFO L82 PathProgramCache]: Analyzing trace with hash -1099360928, now seen corresponding path program 1 times [2018-07-24 10:44:20,851 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:20,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:20,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:20,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:20,853 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:20,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:21,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:44:21,109 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:44:21,110 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-07-24 10:44:21,110 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:44:21,112 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 10:44:21,113 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 10:44:21,113 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-07-24 10:44:21,114 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand 4 states. [2018-07-24 10:44:21,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:44:21,321 INFO L93 Difference]: Finished difference Result 39 states and 42 transitions. [2018-07-24 10:44:21,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 10:44:21,322 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-07-24 10:44:21,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:44:21,323 INFO L225 Difference]: With dead ends: 39 [2018-07-24 10:44:21,323 INFO L226 Difference]: Without dead ends: 27 [2018-07-24 10:44:21,324 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-07-24 10:44:21,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-07-24 10:44:21,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 26. [2018-07-24 10:44:21,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-07-24 10:44:21,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 28 transitions. [2018-07-24 10:44:21,331 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 28 transitions. Word has length 17 [2018-07-24 10:44:21,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:44:21,332 INFO L471 AbstractCegarLoop]: Abstraction has 26 states and 28 transitions. [2018-07-24 10:44:21,332 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 10:44:21,332 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2018-07-24 10:44:21,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-07-24 10:44:21,333 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:21,333 INFO L353 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:21,334 INFO L414 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:21,334 INFO L82 PathProgramCache]: Analyzing trace with hash 407334938, now seen corresponding path program 1 times [2018-07-24 10:44:21,334 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:21,335 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:21,335 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:21,336 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:21,336 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:21,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:21,608 WARN L169 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 14 [2018-07-24 10:44:21,792 WARN L169 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 13 [2018-07-24 10:44:21,799 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:44:21,800 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:21,801 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:44:21,810 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:21,810 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:44:21,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:21,837 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:21,931 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:21,931 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:22,114 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:22,145 INFO L309 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-07-24 10:44:22,145 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [5] total 10 [2018-07-24 10:44:22,146 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:44:22,146 INFO L450 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-07-24 10:44:22,146 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-07-24 10:44:22,147 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-07-24 10:44:22,147 INFO L87 Difference]: Start difference. First operand 26 states and 28 transitions. Second operand 5 states. [2018-07-24 10:44:22,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:44:22,300 INFO L93 Difference]: Finished difference Result 54 states and 59 transitions. [2018-07-24 10:44:22,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-07-24 10:44:22,302 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-07-24 10:44:22,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:44:22,305 INFO L225 Difference]: With dead ends: 54 [2018-07-24 10:44:22,305 INFO L226 Difference]: Without dead ends: 34 [2018-07-24 10:44:22,306 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-07-24 10:44:22,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-07-24 10:44:22,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 28. [2018-07-24 10:44:22,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-07-24 10:44:22,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 30 transitions. [2018-07-24 10:44:22,325 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 30 transitions. Word has length 20 [2018-07-24 10:44:22,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:44:22,325 INFO L471 AbstractCegarLoop]: Abstraction has 28 states and 30 transitions. [2018-07-24 10:44:22,325 INFO L472 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-07-24 10:44:22,326 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 30 transitions. [2018-07-24 10:44:22,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-07-24 10:44:22,327 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:22,327 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:22,327 INFO L414 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:22,327 INFO L82 PathProgramCache]: Analyzing trace with hash -2066955587, now seen corresponding path program 1 times [2018-07-24 10:44:22,328 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:22,329 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:22,329 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:22,329 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:22,329 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:22,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:22,633 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:22,634 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:22,634 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:44:22,645 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:22,645 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:44:22,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:22,678 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:22,827 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-07-24 10:44:22,827 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:22,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-07-24 10:44:22,849 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:22,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:44:22,876 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:22 [2018-07-24 10:44:23,104 WARN L169 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 15 DAG size of output: 13 [2018-07-24 10:44:23,416 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:23,417 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:23,878 WARN L169 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 31 [2018-07-24 10:44:23,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2018-07-24 10:44:23,885 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:23,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2018-07-24 10:44:23,997 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:24,109 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:44:24,110 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:65, output treesize:45 [2018-07-24 10:44:24,200 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:24,222 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:24,222 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:44:24,244 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:24,244 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:44:24,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:24,273 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:24,295 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-07-24 10:44:24,295 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:24,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-07-24 10:44:24,307 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:24,363 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:44:24,364 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:22 [2018-07-24 10:44:24,433 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:24,433 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:24,550 WARN L169 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 31 [2018-07-24 10:44:24,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2018-07-24 10:44:24,556 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:24,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 34 [2018-07-24 10:44:24,591 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:24,710 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:44:24,710 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:65, output treesize:45 [2018-07-24 10:44:24,746 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:24,747 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:44:24,747 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 9, 9, 9, 9] total 19 [2018-07-24 10:44:24,748 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:44:24,748 INFO L450 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-07-24 10:44:24,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-07-24 10:44:24,749 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=285, Unknown=0, NotChecked=0, Total=342 [2018-07-24 10:44:24,749 INFO L87 Difference]: Start difference. First operand 28 states and 30 transitions. Second operand 12 states. [2018-07-24 10:44:25,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:44:25,259 INFO L93 Difference]: Finished difference Result 44 states and 47 transitions. [2018-07-24 10:44:25,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-07-24 10:44:25,260 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 23 [2018-07-24 10:44:25,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:44:25,262 INFO L225 Difference]: With dead ends: 44 [2018-07-24 10:44:25,262 INFO L226 Difference]: Without dead ends: 32 [2018-07-24 10:44:25,263 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 77 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=95, Invalid=411, Unknown=0, NotChecked=0, Total=506 [2018-07-24 10:44:25,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-07-24 10:44:25,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2018-07-24 10:44:25,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-07-24 10:44:25,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2018-07-24 10:44:25,270 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 33 transitions. Word has length 23 [2018-07-24 10:44:25,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:44:25,271 INFO L471 AbstractCegarLoop]: Abstraction has 31 states and 33 transitions. [2018-07-24 10:44:25,271 INFO L472 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-07-24 10:44:25,271 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 33 transitions. [2018-07-24 10:44:25,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-07-24 10:44:25,272 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:25,272 INFO L353 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:25,272 INFO L414 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:25,273 INFO L82 PathProgramCache]: Analyzing trace with hash -1679627875, now seen corresponding path program 2 times [2018-07-24 10:44:25,273 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:25,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:25,274 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:25,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:25,274 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:25,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:25,581 WARN L169 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 14 [2018-07-24 10:44:25,716 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:25,716 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:25,716 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:44:25,723 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:44:25,724 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:44:25,743 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:44:25,743 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:25,745 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:25,862 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-07-24 10:44:25,862 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:25,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-07-24 10:44:25,869 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:25,884 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:44:25,884 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:57, output treesize:27 [2018-07-24 10:44:26,141 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:26,141 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:26,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2018-07-24 10:44:26,616 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:26,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2018-07-24 10:44:26,677 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:26,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:44:26,727 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:65, output treesize:45 [2018-07-24 10:44:26,937 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:26,967 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:26,968 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:44:26,990 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:44:26,991 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:44:27,025 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:44:27,026 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:27,030 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:27,302 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:27,303 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:27,516 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:27,519 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:44:27,520 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 11, 11, 7, 7] total 33 [2018-07-24 10:44:27,520 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:44:27,520 INFO L450 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-07-24 10:44:27,521 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-07-24 10:44:27,522 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=870, Unknown=0, NotChecked=0, Total=1056 [2018-07-24 10:44:27,522 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. Second operand 15 states. [2018-07-24 10:44:28,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:44:28,221 INFO L93 Difference]: Finished difference Result 47 states and 50 transitions. [2018-07-24 10:44:28,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-07-24 10:44:28,223 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 26 [2018-07-24 10:44:28,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:44:28,224 INFO L225 Difference]: With dead ends: 47 [2018-07-24 10:44:28,224 INFO L226 Difference]: Without dead ends: 35 [2018-07-24 10:44:28,225 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 74 SyntacticMatches, 6 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 309 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=259, Invalid=1073, Unknown=0, NotChecked=0, Total=1332 [2018-07-24 10:44:28,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-07-24 10:44:28,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2018-07-24 10:44:28,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-07-24 10:44:28,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 36 transitions. [2018-07-24 10:44:28,231 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 36 transitions. Word has length 26 [2018-07-24 10:44:28,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:44:28,232 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 36 transitions. [2018-07-24 10:44:28,232 INFO L472 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-07-24 10:44:28,232 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 36 transitions. [2018-07-24 10:44:28,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-07-24 10:44:28,233 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:28,233 INFO L353 BasicCegarLoop]: trace histogram [4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:28,233 INFO L414 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:28,233 INFO L82 PathProgramCache]: Analyzing trace with hash 918083261, now seen corresponding path program 3 times [2018-07-24 10:44:28,234 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:28,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:28,235 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:44:28,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:28,235 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:28,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:28,467 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:28,467 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:28,467 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:44:28,475 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:44:28,476 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:44:28,494 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-07-24 10:44:28,494 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:28,497 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:28,524 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-24 10:44:28,525 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:28,793 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-24 10:44:28,815 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:28,815 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:44:28,834 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:44:28,835 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:44:28,865 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-07-24 10:44:28,865 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:28,869 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:28,873 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-24 10:44:28,873 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:28,954 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-24 10:44:28,956 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:44:28,956 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 8, 4, 4] total 17 [2018-07-24 10:44:28,956 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:44:28,957 INFO L450 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-07-24 10:44:28,957 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-07-24 10:44:28,958 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=204, Unknown=0, NotChecked=0, Total=272 [2018-07-24 10:44:28,958 INFO L87 Difference]: Start difference. First operand 34 states and 36 transitions. Second operand 9 states. [2018-07-24 10:44:29,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:44:29,544 INFO L93 Difference]: Finished difference Result 84 states and 93 transitions. [2018-07-24 10:44:29,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-07-24 10:44:29,544 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-07-24 10:44:29,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:44:29,545 INFO L225 Difference]: With dead ends: 84 [2018-07-24 10:44:29,545 INFO L226 Difference]: Without dead ends: 60 [2018-07-24 10:44:29,546 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=107, Invalid=313, Unknown=0, NotChecked=0, Total=420 [2018-07-24 10:44:29,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-07-24 10:44:29,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 40. [2018-07-24 10:44:29,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-07-24 10:44:29,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 42 transitions. [2018-07-24 10:44:29,556 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 42 transitions. Word has length 29 [2018-07-24 10:44:29,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:44:29,557 INFO L471 AbstractCegarLoop]: Abstraction has 40 states and 42 transitions. [2018-07-24 10:44:29,557 INFO L472 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-07-24 10:44:29,557 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 42 transitions. [2018-07-24 10:44:29,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-07-24 10:44:29,558 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:29,558 INFO L353 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:29,558 INFO L414 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:29,559 INFO L82 PathProgramCache]: Analyzing trace with hash 1041615808, now seen corresponding path program 4 times [2018-07-24 10:44:29,559 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:29,560 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:29,560 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:44:29,560 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:29,560 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:29,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:29,999 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-24 10:44:29,999 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:29,999 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:44:30,006 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:44:30,006 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:44:30,048 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:44:30,049 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:30,051 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:30,531 WARN L169 SmtUtils]: Spent 134.00 ms on a formula simplification that was a NOOP. DAG size: 22 [2018-07-24 10:44:30,767 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-07-24 10:44:30,767 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:30,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-07-24 10:44:30,774 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:30,782 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:44:30,783 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:57, output treesize:27 [2018-07-24 10:44:31,100 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-24 10:44:31,100 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:31,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 34 [2018-07-24 10:44:31,461 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:31,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2018-07-24 10:44:31,536 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:31,647 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:44:31,647 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:65, output treesize:45 [2018-07-24 10:44:32,286 WARN L169 SmtUtils]: Spent 126.00 ms on a formula simplification that was a NOOP. DAG size: 21 [2018-07-24 10:44:32,298 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-24 10:44:32,319 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:32,320 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:44:32,336 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:44:32,336 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:44:32,382 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:44:32,382 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:32,387 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:32,949 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-24 10:44:32,949 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:33,403 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-24 10:44:33,404 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:44:33,405 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 15, 15, 11, 9] total 50 [2018-07-24 10:44:33,405 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:44:33,405 INFO L450 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-07-24 10:44:33,406 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-07-24 10:44:33,407 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=352, Invalid=2098, Unknown=0, NotChecked=0, Total=2450 [2018-07-24 10:44:33,407 INFO L87 Difference]: Start difference. First operand 40 states and 42 transitions. Second operand 22 states. [2018-07-24 10:44:36,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:44:36,482 INFO L93 Difference]: Finished difference Result 83 states and 93 transitions. [2018-07-24 10:44:36,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-07-24 10:44:36,482 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 35 [2018-07-24 10:44:36,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:44:36,484 INFO L225 Difference]: With dead ends: 83 [2018-07-24 10:44:36,484 INFO L226 Difference]: Without dead ends: 71 [2018-07-24 10:44:36,486 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 100 SyntacticMatches, 10 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 991 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=609, Invalid=3051, Unknown=0, NotChecked=0, Total=3660 [2018-07-24 10:44:36,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-07-24 10:44:36,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 52. [2018-07-24 10:44:36,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-07-24 10:44:36,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 55 transitions. [2018-07-24 10:44:36,495 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 55 transitions. Word has length 35 [2018-07-24 10:44:36,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:44:36,495 INFO L471 AbstractCegarLoop]: Abstraction has 52 states and 55 transitions. [2018-07-24 10:44:36,495 INFO L472 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-07-24 10:44:36,495 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 55 transitions. [2018-07-24 10:44:36,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-07-24 10:44:36,496 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:36,497 INFO L353 BasicCegarLoop]: trace histogram [6, 5, 5, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:36,497 INFO L414 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:36,497 INFO L82 PathProgramCache]: Analyzing trace with hash 1980931514, now seen corresponding path program 5 times [2018-07-24 10:44:36,497 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:36,498 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:36,498 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:44:36,498 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:36,498 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:36,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:36,797 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-07-24 10:44:36,797 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:36,798 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:44:36,808 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:44:36,809 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:44:36,827 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-24 10:44:36,828 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:36,830 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:37,229 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-07-24 10:44:37,229 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:37,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-07-24 10:44:37,232 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:37,242 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:44:37,243 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:57, output treesize:27 [2018-07-24 10:44:37,504 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-24 10:44:37,504 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:37,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 34 [2018-07-24 10:44:37,859 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:37,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2018-07-24 10:44:37,896 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:37,964 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:44:37,965 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:65, output treesize:45 [2018-07-24 10:44:38,665 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-24 10:44:38,686 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:38,687 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:44:38,703 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:44:38,703 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:44:38,844 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-24 10:44:38,844 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:38,850 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:39,134 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-07-24 10:44:39,135 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:39,788 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-07-24 10:44:39,790 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:44:39,790 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 18, 17, 5, 6] total 44 [2018-07-24 10:44:39,790 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:44:39,790 INFO L450 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-07-24 10:44:39,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-07-24 10:44:39,792 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=241, Invalid=1651, Unknown=0, NotChecked=0, Total=1892 [2018-07-24 10:44:39,792 INFO L87 Difference]: Start difference. First operand 52 states and 55 transitions. Second operand 22 states. [2018-07-24 10:44:40,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:44:40,674 INFO L93 Difference]: Finished difference Result 115 states and 124 transitions. [2018-07-24 10:44:40,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-07-24 10:44:40,677 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 38 [2018-07-24 10:44:40,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:44:40,678 INFO L225 Difference]: With dead ends: 115 [2018-07-24 10:44:40,678 INFO L226 Difference]: Without dead ends: 76 [2018-07-24 10:44:40,679 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 113 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 322 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=311, Invalid=1945, Unknown=0, NotChecked=0, Total=2256 [2018-07-24 10:44:40,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-07-24 10:44:40,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 63. [2018-07-24 10:44:40,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-07-24 10:44:40,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 66 transitions. [2018-07-24 10:44:40,690 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 66 transitions. Word has length 38 [2018-07-24 10:44:40,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:44:40,690 INFO L471 AbstractCegarLoop]: Abstraction has 63 states and 66 transitions. [2018-07-24 10:44:40,691 INFO L472 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-07-24 10:44:40,691 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 66 transitions. [2018-07-24 10:44:40,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-07-24 10:44:40,692 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:40,692 INFO L353 BasicCegarLoop]: trace histogram [6, 5, 5, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:40,692 INFO L414 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:40,693 INFO L82 PathProgramCache]: Analyzing trace with hash 334341358, now seen corresponding path program 1 times [2018-07-24 10:44:40,693 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:40,694 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:40,694 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:44:40,694 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:40,694 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:40,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:41,418 WARN L169 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 15 [2018-07-24 10:44:41,432 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-07-24 10:44:41,432 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:41,432 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:44:41,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:41,440 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:44:41,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:41,461 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:41,770 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-07-24 10:44:41,770 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:41,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-07-24 10:44:41,773 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:41,796 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:44:41,796 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:57, output treesize:55 [2018-07-24 10:44:41,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 36 [2018-07-24 10:44:41,905 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:41,983 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:44:41,984 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:75, output treesize:36 [2018-07-24 10:44:42,539 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 1 proven. 59 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:44:42,540 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:43,207 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:43,208 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:44:43,209 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:44:43,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 66 [2018-07-24 10:44:43,218 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-07-24 10:44:43,262 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:43,263 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:44:43,264 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:44:43,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-07-24 10:44:43,272 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-07-24 10:44:43,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 51 [2018-07-24 10:44:43,369 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:43,370 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:43,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 21 [2018-07-24 10:44:43,372 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:43,434 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:43,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 38 [2018-07-24 10:44:43,532 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-07-24 10:44:43,835 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-07-24 10:44:43,888 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 53 [2018-07-24 10:44:43,960 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:43,961 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:43,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2018-07-24 10:44:43,963 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:43,968 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:43,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 42 [2018-07-24 10:44:43,980 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-07-24 10:44:44,020 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-07-24 10:44:44,087 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-07-24 10:44:44,088 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 4 variables, input treesize:137, output treesize:119 [2018-07-24 10:44:44,778 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 1 proven. 44 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-24 10:44:44,799 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:44,799 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:44:44,815 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:44,815 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:44:44,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:44,881 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:44,978 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-07-24 10:44:44,978 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:46,025 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-07-24 10:44:46,027 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:44:46,027 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 24, 21, 6, 7] total 53 [2018-07-24 10:44:46,027 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:44:46,028 INFO L450 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-07-24 10:44:46,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-07-24 10:44:46,029 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=317, Invalid=2439, Unknown=0, NotChecked=0, Total=2756 [2018-07-24 10:44:46,029 INFO L87 Difference]: Start difference. First operand 63 states and 66 transitions. Second operand 29 states. [2018-07-24 10:44:48,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:44:48,145 INFO L93 Difference]: Finished difference Result 150 states and 162 transitions. [2018-07-24 10:44:48,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-07-24 10:44:48,146 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 50 [2018-07-24 10:44:48,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:44:48,147 INFO L225 Difference]: With dead ends: 150 [2018-07-24 10:44:48,148 INFO L226 Difference]: Without dead ends: 103 [2018-07-24 10:44:48,149 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 151 SyntacticMatches, 3 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 685 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=460, Invalid=3200, Unknown=0, NotChecked=0, Total=3660 [2018-07-24 10:44:48,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-07-24 10:44:48,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 75. [2018-07-24 10:44:48,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-07-24 10:44:48,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 78 transitions. [2018-07-24 10:44:48,165 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 78 transitions. Word has length 50 [2018-07-24 10:44:48,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:44:48,166 INFO L471 AbstractCegarLoop]: Abstraction has 75 states and 78 transitions. [2018-07-24 10:44:48,166 INFO L472 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-07-24 10:44:48,166 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 78 transitions. [2018-07-24 10:44:48,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-07-24 10:44:48,168 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:48,168 INFO L353 BasicCegarLoop]: trace histogram [9, 8, 8, 5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:48,168 INFO L414 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:48,168 INFO L82 PathProgramCache]: Analyzing trace with hash -960300512, now seen corresponding path program 6 times [2018-07-24 10:44:48,169 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:48,169 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:48,169 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:44:48,170 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:48,170 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:48,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:48,686 WARN L169 SmtUtils]: Spent 303.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 15 [2018-07-24 10:44:48,939 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 80 proven. 20 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-07-24 10:44:48,939 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:48,939 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:44:48,950 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:44:48,950 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:44:49,353 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-07-24 10:44:49,353 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:49,368 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:49,920 WARN L169 SmtUtils]: Spent 123.00 ms on a formula simplification that was a NOOP. DAG size: 16 [2018-07-24 10:44:50,487 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 23 proven. 77 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-07-24 10:44:50,487 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:51,117 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 100 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-07-24 10:44:51,137 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-07-24 10:44:51,138 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [11, 18] total 36 [2018-07-24 10:44:51,138 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:44:51,138 INFO L450 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-07-24 10:44:51,138 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-07-24 10:44:51,139 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=909, Unknown=0, NotChecked=0, Total=1260 [2018-07-24 10:44:51,139 INFO L87 Difference]: Start difference. First operand 75 states and 78 transitions. Second operand 12 states. [2018-07-24 10:44:51,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:44:51,946 INFO L93 Difference]: Finished difference Result 128 states and 139 transitions. [2018-07-24 10:44:51,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-07-24 10:44:51,947 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 53 [2018-07-24 10:44:51,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:44:51,949 INFO L225 Difference]: With dead ends: 128 [2018-07-24 10:44:51,950 INFO L226 Difference]: Without dead ends: 105 [2018-07-24 10:44:51,951 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 79 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 689 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=540, Invalid=1352, Unknown=0, NotChecked=0, Total=1892 [2018-07-24 10:44:51,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-07-24 10:44:51,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 65. [2018-07-24 10:44:51,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-07-24 10:44:51,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 66 transitions. [2018-07-24 10:44:51,966 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 66 transitions. Word has length 53 [2018-07-24 10:44:51,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:44:51,967 INFO L471 AbstractCegarLoop]: Abstraction has 65 states and 66 transitions. [2018-07-24 10:44:51,967 INFO L472 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-07-24 10:44:51,967 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 66 transitions. [2018-07-24 10:44:51,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-07-24 10:44:51,968 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:44:51,968 INFO L353 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:44:51,969 INFO L414 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:44:51,969 INFO L82 PathProgramCache]: Analyzing trace with hash -1833360198, now seen corresponding path program 2 times [2018-07-24 10:44:51,969 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:44:51,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:51,970 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:44:51,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:44:51,970 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:44:51,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:44:52,467 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 8 proven. 26 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-07-24 10:44:52,467 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:52,467 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:44:52,482 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:44:52,483 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:44:52,526 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:44:52,527 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:52,530 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:52,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-07-24 10:44:52,925 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:52,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-07-24 10:44:52,927 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:52,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:44:52,950 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:57, output treesize:55 [2018-07-24 10:44:53,077 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:44:53,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 46 [2018-07-24 10:44:53,080 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:53,114 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:44:53,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 46 [2018-07-24 10:44:53,117 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:53,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:44:53,149 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:83, output treesize:81 [2018-07-24 10:44:53,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 45 [2018-07-24 10:44:53,372 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:53,404 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:44:53,405 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:93, output treesize:45 [2018-07-24 10:44:55,244 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 3 proven. 79 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-07-24 10:44:55,244 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:56,382 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,382 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,384 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:44:56,384 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,385 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,386 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:44:56,399 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 4 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 95 [2018-07-24 10:44:56,401 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-07-24 10:44:56,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 63 [2018-07-24 10:44:56,452 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 53 [2018-07-24 10:44:56,515 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,517 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 38 treesize of output 79 [2018-07-24 10:44:56,547 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 8 xjuncts. [2018-07-24 10:44:56,549 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,550 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,550 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,551 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 39 [2018-07-24 10:44:56,555 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:56,644 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-07-24 10:44:56,721 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-07-24 10:44:56,837 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,838 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,839 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:44:56,840 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,840 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,843 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:44:56,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 4 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 93 [2018-07-24 10:44:56,858 INFO L267 ElimStorePlain]: Start of recursive call 7: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-07-24 10:44:56,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 61 [2018-07-24 10:44:56,979 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:56,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 51 [2018-07-24 10:44:57,034 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:57,035 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:57,035 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:57,037 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:57,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 35 [2018-07-24 10:44:57,041 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-07-24 10:44:57,045 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:57,049 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:44:57,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 73 [2018-07-24 10:44:57,078 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 8 xjuncts. [2018-07-24 10:44:57,173 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-07-24 10:44:57,252 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-07-24 10:44:57,427 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-07-24 10:44:57,427 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 4 variables, input treesize:173, output treesize:413 [2018-07-24 10:44:57,735 WARN L169 SmtUtils]: Spent 215.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 21 [2018-07-24 10:44:58,073 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 3 proven. 55 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-07-24 10:44:58,096 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:44:58,096 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:44:58,112 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:44:58,112 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:44:58,198 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:44:58,198 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:44:58,203 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:44:58,503 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2018-07-24 10:44:58,504 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:44:59,589 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 4 proven. 26 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-07-24 10:44:59,590 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:44:59,591 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 26, 23, 7, 8] total 63 [2018-07-24 10:44:59,591 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:44:59,591 INFO L450 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-07-24 10:44:59,592 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-07-24 10:44:59,593 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=371, Invalid=3535, Unknown=0, NotChecked=0, Total=3906 [2018-07-24 10:44:59,594 INFO L87 Difference]: Start difference. First operand 65 states and 66 transitions. Second operand 32 states. [2018-07-24 10:45:02,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:45:02,512 INFO L93 Difference]: Finished difference Result 126 states and 129 transitions. [2018-07-24 10:45:02,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-07-24 10:45:02,513 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 62 [2018-07-24 10:45:02,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:45:02,514 INFO L225 Difference]: With dead ends: 126 [2018-07-24 10:45:02,514 INFO L226 Difference]: Without dead ends: 80 [2018-07-24 10:45:02,518 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 269 GetRequests, 191 SyntacticMatches, 6 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1002 ImplicationChecksByTransitivity, 7.2s TimeCoverageRelationStatistics Valid=579, Invalid=4823, Unknown=0, NotChecked=0, Total=5402 [2018-07-24 10:45:02,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-07-24 10:45:02,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 77. [2018-07-24 10:45:02,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-07-24 10:45:02,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 78 transitions. [2018-07-24 10:45:02,535 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 78 transitions. Word has length 62 [2018-07-24 10:45:02,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:45:02,536 INFO L471 AbstractCegarLoop]: Abstraction has 77 states and 78 transitions. [2018-07-24 10:45:02,536 INFO L472 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-07-24 10:45:02,536 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 78 transitions. [2018-07-24 10:45:02,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-07-24 10:45:02,537 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:45:02,537 INFO L353 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:45:02,538 INFO L414 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:45:02,538 INFO L82 PathProgramCache]: Analyzing trace with hash 882349806, now seen corresponding path program 3 times [2018-07-24 10:45:02,538 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:45:02,539 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:45:02,539 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:45:02,539 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:45:02,539 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:45:02,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:45:03,425 WARN L169 SmtUtils]: Spent 262.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 40 [2018-07-24 10:45:04,640 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 5 proven. 109 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-07-24 10:45:04,641 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:45:04,641 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:45:04,649 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:45:04,649 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:45:04,730 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-07-24 10:45:04,730 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:45:04,733 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:45:05,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-07-24 10:45:05,216 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:05,231 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:45:05,231 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:24, output treesize:23 [2018-07-24 10:45:05,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-07-24 10:45:05,370 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:05,405 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:45:05,406 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:33, output treesize:32 [2018-07-24 10:45:05,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2018-07-24 10:45:05,516 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:05,529 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:45:05,530 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:42, output treesize:41 [2018-07-24 10:45:05,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 35 [2018-07-24 10:45:05,655 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:05,670 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:45:05,671 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-07-24 10:45:06,522 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 11 proven. 98 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-07-24 10:45:06,523 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:45:11,301 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,302 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,302 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,303 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,303 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,304 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,305 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:11,306 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,307 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,308 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:11,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 7 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 129 [2018-07-24 10:45:11,328 INFO L267 ElimStorePlain]: Start of recursive call 2: 4 dim-0 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-07-24 10:45:11,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 71 [2018-07-24 10:45:11,409 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 63 [2018-07-24 10:45:11,414 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,414 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,415 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 73 [2018-07-24 10:45:11,464 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,465 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,466 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,466 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,467 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,468 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 68 [2018-07-24 10:45:11,476 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:11,495 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,496 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,496 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,497 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:11,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 60 [2018-07-24 10:45:11,502 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:11,505 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,505 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,509 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,510 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,511 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,512 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 55 treesize of output 122 [2018-07-24 10:45:11,567 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 6 xjuncts. [2018-07-24 10:45:11,569 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-07-24 10:45:11,569 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:11,689 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-07-24 10:45:11,776 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-07-24 10:45:11,853 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-07-24 10:45:11,978 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,979 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,979 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,980 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,980 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,981 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,982 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:11,983 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,983 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:11,985 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:12,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 7 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 129 [2018-07-24 10:45:12,005 INFO L267 ElimStorePlain]: Start of recursive call 10: 4 dim-0 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-07-24 10:45:12,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 71 [2018-07-24 10:45:12,157 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 63 [2018-07-24 10:45:12,164 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,164 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,165 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 73 [2018-07-24 10:45:12,214 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,214 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,215 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,216 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,217 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:12,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 58 [2018-07-24 10:45:12,223 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:12,229 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,237 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,237 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,239 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,240 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,241 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 55 treesize of output 122 [2018-07-24 10:45:12,275 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 6 xjuncts. [2018-07-24 10:45:12,278 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,278 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,278 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,279 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,279 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,279 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:12,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 68 [2018-07-24 10:45:12,287 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:12,292 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-07-24 10:45:12,292 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:12,425 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-07-24 10:45:12,523 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-07-24 10:45:12,609 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-07-24 10:45:12,840 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-1 vars, End of recursive call: and 10 xjuncts. [2018-07-24 10:45:12,840 INFO L202 ElimStorePlain]: Needed 17 recursive calls to eliminate 4 variables, input treesize:211, output treesize:463 [2018-07-24 10:45:13,091 WARN L169 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 21 [2018-07-24 10:45:13,384 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 11 proven. 65 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-07-24 10:45:13,405 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:45:13,406 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:45:13,421 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:45:13,421 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:45:14,091 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-07-24 10:45:14,091 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:45:14,099 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:45:14,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-07-24 10:45:14,171 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,175 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,175 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:7 [2018-07-24 10:45:14,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-07-24 10:45:14,236 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,241 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,241 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:13, output treesize:3 [2018-07-24 10:45:14,244 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-07-24 10:45:14,244 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-07-24 10:45:14,246 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,255 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,255 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:66, output treesize:19 [2018-07-24 10:45:14,447 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-07-24 10:45:14,448 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,457 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,458 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:31, output treesize:30 [2018-07-24 10:45:14,606 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:14,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 21 [2018-07-24 10:45:14,609 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,627 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-07-24 10:45:14,627 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:45, output treesize:44 [2018-07-24 10:45:14,817 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:14,818 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:14,819 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:14,824 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 38 [2018-07-24 10:45:14,825 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:14,859 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-07-24 10:45:14,859 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:59, output treesize:58 [2018-07-24 10:45:15,160 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:15,162 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:15,164 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:15,165 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:15,167 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:15,169 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:15,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 59 [2018-07-24 10:45:15,193 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:15,247 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-07-24 10:45:15,248 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:71, output treesize:67 [2018-07-24 10:45:16,013 WARN L169 SmtUtils]: Spent 427.00 ms on a formula simplification that was a NOOP. DAG size: 48 [2018-07-24 10:45:17,018 WARN L169 SmtUtils]: Spent 837.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 45 [2018-07-24 10:45:17,923 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 6 proven. 104 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-07-24 10:45:17,923 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:45:24,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 81 [2018-07-24 10:45:24,553 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:24,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 54 [2018-07-24 10:45:24,604 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:24,617 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:24,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 63 [2018-07-24 10:45:24,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 23 [2018-07-24 10:45:24,677 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:24,689 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:24,692 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:24,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 76 [2018-07-24 10:45:24,715 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 4 xjuncts. [2018-07-24 10:45:24,798 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 6 xjuncts. [2018-07-24 10:45:24,865 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-07-24 10:45:24,941 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-07-24 10:45:25,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 81 [2018-07-24 10:45:25,111 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:25,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 54 [2018-07-24 10:45:25,118 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:25,119 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:25,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 63 [2018-07-24 10:45:25,159 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:25,162 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:25,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 76 [2018-07-24 10:45:25,186 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 4 xjuncts. [2018-07-24 10:45:25,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 24 [2018-07-24 10:45:25,192 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:25,299 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 6 xjuncts. [2018-07-24 10:45:25,386 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-07-24 10:45:25,530 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-07-24 10:45:25,836 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 2 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-07-24 10:45:25,837 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 8 variables, input treesize:157, output treesize:303 [2018-07-24 10:45:25,974 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 6 proven. 64 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-07-24 10:45:25,976 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:45:25,976 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 29, 25, 29, 23] total 100 [2018-07-24 10:45:25,976 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:45:25,976 INFO L450 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-07-24 10:45:25,977 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-07-24 10:45:25,979 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1349, Invalid=8549, Unknown=2, NotChecked=0, Total=9900 [2018-07-24 10:45:25,979 INFO L87 Difference]: Start difference. First operand 77 states and 78 transitions. Second operand 53 states. [2018-07-24 10:45:29,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:45:29,588 INFO L93 Difference]: Finished difference Result 90 states and 91 transitions. [2018-07-24 10:45:29,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-07-24 10:45:29,589 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 74 [2018-07-24 10:45:29,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:45:29,591 INFO L225 Difference]: With dead ends: 90 [2018-07-24 10:45:29,591 INFO L226 Difference]: Without dead ends: 88 [2018-07-24 10:45:29,596 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 342 GetRequests, 208 SyntacticMatches, 20 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5523 ImplicationChecksByTransitivity, 20.9s TimeCoverageRelationStatistics Valid=1849, Invalid=11489, Unknown=2, NotChecked=0, Total=13340 [2018-07-24 10:45:29,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-07-24 10:45:29,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 86. [2018-07-24 10:45:29,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-07-24 10:45:29,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 87 transitions. [2018-07-24 10:45:29,613 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 87 transitions. Word has length 74 [2018-07-24 10:45:29,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:45:29,614 INFO L471 AbstractCegarLoop]: Abstraction has 86 states and 87 transitions. [2018-07-24 10:45:29,614 INFO L472 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-07-24 10:45:29,614 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 87 transitions. [2018-07-24 10:45:29,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-07-24 10:45:29,615 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:45:29,615 INFO L353 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:45:29,616 INFO L414 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:45:29,616 INFO L82 PathProgramCache]: Analyzing trace with hash 1175234237, now seen corresponding path program 4 times [2018-07-24 10:45:29,616 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:45:29,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:45:29,617 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:45:29,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:45:29,617 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:45:29,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:45:30,269 WARN L169 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 8 DAG size of output: 5 [2018-07-24 10:45:30,964 WARN L169 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 76 [2018-07-24 10:45:31,138 WARN L169 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 66 [2018-07-24 10:45:31,317 WARN L169 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 67 [2018-07-24 10:45:31,465 WARN L169 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 57 [2018-07-24 10:45:31,602 WARN L169 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 58 [2018-07-24 10:45:32,483 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 7 proven. 132 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-24 10:45:32,484 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:45:32,484 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:45:32,498 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:45:32,498 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:45:32,525 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:45:32,525 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:45:32,528 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:45:32,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-07-24 10:45:32,631 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:32,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-07-24 10:45:32,642 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:32,663 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:45:32,664 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:53 [2018-07-24 10:45:32,897 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:32,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 46 [2018-07-24 10:45:32,900 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:32,930 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:32,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 46 [2018-07-24 10:45:32,933 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:32,965 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:45:32,965 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:83, output treesize:81 [2018-07-24 10:45:33,199 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,200 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,201 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 71 [2018-07-24 10:45:33,207 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:33,254 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,255 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,256 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 71 [2018-07-24 10:45:33,262 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:33,307 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:45:33,307 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:105, output treesize:103 [2018-07-24 10:45:33,560 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,561 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,563 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,564 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,565 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,566 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 104 [2018-07-24 10:45:33,576 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:33,628 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,629 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,630 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,631 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,632 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,633 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:33,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 104 [2018-07-24 10:45:33,643 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:33,699 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:45:33,700 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:127, output treesize:125 [2018-07-24 10:45:34,093 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-07-24 10:45:34,094 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:34,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-07-24 10:45:34,129 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:34,149 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-07-24 10:45:34,149 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:129, output treesize:63 [2018-07-24 10:45:47,900 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 7 proven. 130 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-07-24 10:45:47,900 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:45:50,262 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,263 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,263 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,264 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,264 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,266 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:50,267 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,268 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,268 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,269 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,270 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,271 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:50,272 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,273 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 12 disjoint index pairs (out of 21 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 123 treesize of output 165 [2018-07-24 10:45:50,308 INFO L267 ElimStorePlain]: Start of recursive call 2: 5 dim-0 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-07-24 10:45:50,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 121 treesize of output 119 [2018-07-24 10:45:50,397 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,399 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 105 [2018-07-24 10:45:50,409 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,410 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,410 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 111 [2018-07-24 10:45:50,422 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,423 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,424 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,424 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,425 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,425 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 124 [2018-07-24 10:45:50,486 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-07-24 10:45:50,486 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:50,489 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-07-24 10:45:50,490 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:50,493 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,493 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,494 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,498 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,499 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,501 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,509 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,522 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,590 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 11 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 7 case distinctions, treesize of input 79 treesize of output 214 [2018-07-24 10:45:50,590 WARN L136 XnfTransformerHelper]: expecting exponential blowup for input size 7 [2018-07-24 10:45:50,637 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 128 xjuncts. [2018-07-24 10:45:50,660 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,661 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,662 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,663 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,664 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,665 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,666 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,667 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,668 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,689 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,699 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:50,704 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 13 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 97 [2018-07-24 10:45:50,705 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:51,952 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 20 xjuncts. [2018-07-24 10:45:52,281 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 10 xjuncts. [2018-07-24 10:45:52,555 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 10 xjuncts. [2018-07-24 10:45:52,842 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 10 xjuncts. [2018-07-24 10:45:53,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 83 [2018-07-24 10:45:53,524 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 73 [2018-07-24 10:45:53,529 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,529 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,530 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 83 [2018-07-24 10:45:53,537 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,538 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,538 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,539 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,539 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,540 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 100 [2018-07-24 10:45:53,619 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,619 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,620 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,620 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,620 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,621 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,621 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,621 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,622 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,623 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,628 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 11 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 92 [2018-07-24 10:45:53,637 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:53,640 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,641 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,642 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,645 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,645 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,650 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,650 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:53,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 9 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 7 case distinctions, treesize of input 54 treesize of output 174 [2018-07-24 10:45:53,720 WARN L136 XnfTransformerHelper]: expecting exponential blowup for input size 7 [2018-07-24 10:45:53,746 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 128 xjuncts. [2018-07-24 10:45:54,989 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 20 xjuncts. [2018-07-24 10:45:55,359 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 12 xjuncts. [2018-07-24 10:45:55,693 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 12 xjuncts. [2018-07-24 10:45:56,057 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 12 xjuncts. [2018-07-24 10:45:56,959 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:56,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 99 [2018-07-24 10:45:56,961 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:56,964 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:56,965 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:56,966 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:56,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 106 [2018-07-24 10:45:56,968 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:56,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 96 [2018-07-24 10:45:56,981 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:56,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 98 [2018-07-24 10:45:56,984 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:56,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 96 [2018-07-24 10:45:56,986 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:56,989 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:56,990 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 99 [2018-07-24 10:45:56,991 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:56,997 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:56,997 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:56,998 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:56,998 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:57,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 113 [2018-07-24 10:45:57,006 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:57,011 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:57,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 99 [2018-07-24 10:45:57,012 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:57,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 96 [2018-07-24 10:45:57,015 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:57,018 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:45:57,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 87 [2018-07-24 10:45:57,019 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:57,661 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-1 vars, End of recursive call: and 13 xjuncts. [2018-07-24 10:45:57,662 INFO L202 ElimStorePlain]: Needed 26 recursive calls to eliminate 4 variables, input treesize:245, output treesize:1058 [2018-07-24 10:45:57,953 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 7 proven. 92 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-07-24 10:45:57,974 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:45:57,974 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:45:57,990 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:45:57,990 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:45:58,145 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:45:58,145 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:45:58,153 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:45:58,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-07-24 10:45:58,164 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:58,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 28 [2018-07-24 10:45:58,169 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:58,200 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:45:58,200 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:52 [2018-07-24 10:45:58,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 32 [2018-07-24 10:45:58,342 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:58,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 34 [2018-07-24 10:45:58,373 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:58,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-07-24 10:45:58,402 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:67, output treesize:67 [2018-07-24 10:45:58,754 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:58,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 52 [2018-07-24 10:45:58,756 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:58,799 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:58,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 60 [2018-07-24 10:45:58,802 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:58,841 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-07-24 10:45:58,842 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:103, output treesize:101 [2018-07-24 10:45:59,241 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:59,242 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:59,243 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:59,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 74 [2018-07-24 10:45:59,248 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:59,310 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:59,312 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:59,313 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:45:59,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 86 [2018-07-24 10:45:59,319 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:45:59,370 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-07-24 10:45:59,370 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:131, output treesize:129 [2018-07-24 10:46:00,067 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,068 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,069 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,069 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,071 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,072 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 116 [2018-07-24 10:46:00,082 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:46:00,162 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,163 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,164 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,165 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,166 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,168 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:00,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 100 [2018-07-24 10:46:00,177 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-07-24 10:46:00,254 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 2 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-07-24 10:46:00,254 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:159, output treesize:157 [2018-07-24 10:46:01,115 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:01,117 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:01,119 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:01,121 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:01,123 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:01,125 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:01,127 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:01,129 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:01,131 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:01,133 INFO L700 Elim1Store]: detected not equals via solver [2018-07-24 10:46:01,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 148 [2018-07-24 10:46:01,157 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-07-24 10:46:01,291 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 2 dim-1 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-07-24 10:46:01,292 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 10 variables, input treesize:183, output treesize:92 [2018-07-24 10:46:10,445 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 8 proven. 120 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-07-24 10:46:10,445 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:46:28,392 WARN L169 SmtUtils]: Spent 873.00 ms on a formula simplification that was a NOOP. DAG size: 71 [2018-07-24 10:46:30,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 93 [2018-07-24 10:46:30,820 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:30,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 61 [2018-07-24 10:46:30,827 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:30,828 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:30,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 70 [2018-07-24 10:46:30,836 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:30,836 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:30,837 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:30,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 82 [2018-07-24 10:46:30,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 32 [2018-07-24 10:46:30,899 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-07-24 10:46:30,908 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:30,914 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:30,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 57 treesize of output 106 [2018-07-24 10:46:30,947 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 8 xjuncts. [2018-07-24 10:46:31,110 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-07-24 10:46:31,213 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-07-24 10:46:31,300 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-07-24 10:46:31,401 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-07-24 10:46:31,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 93 [2018-07-24 10:46:31,635 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:31,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 61 [2018-07-24 10:46:31,640 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:31,641 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:31,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 70 [2018-07-24 10:46:31,652 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:31,653 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:31,653 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:31,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 82 [2018-07-24 10:46:31,713 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:31,718 INFO L682 Elim1Store]: detected equality via solver [2018-07-24 10:46:31,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 57 treesize of output 106 [2018-07-24 10:46:31,756 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 8 xjuncts. [2018-07-24 10:46:31,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 33 [2018-07-24 10:46:31,767 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-07-24 10:46:31,992 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-07-24 10:46:32,121 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-07-24 10:46:32,235 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-07-24 10:46:32,344 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-07-24 10:46:32,763 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 2 dim-1 vars, End of recursive call: and 10 xjuncts. [2018-07-24 10:46:32,764 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 10 variables, input treesize:181, output treesize:383 [2018-07-24 10:46:36,993 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 8 proven. 82 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-07-24 10:46:36,995 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:46:36,995 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 27, 29, 25] total 101 [2018-07-24 10:46:36,995 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:46:36,996 INFO L450 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-07-24 10:46:36,996 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-07-24 10:46:36,999 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1052, Invalid=9038, Unknown=10, NotChecked=0, Total=10100 [2018-07-24 10:46:36,999 INFO L87 Difference]: Start difference. First operand 86 states and 87 transitions. Second operand 54 states. [2018-07-24 10:46:42,451 WARN L169 SmtUtils]: Spent 2.14 s on a formula simplification. DAG size of input: 59 DAG size of output: 41 [2018-07-24 10:46:46,989 WARN L169 SmtUtils]: Spent 4.12 s on a formula simplification. DAG size of input: 65 DAG size of output: 48 [2018-07-24 10:46:47,514 WARN L169 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 55 [2018-07-24 10:46:49,821 WARN L1010 $PredicateComparison]: unable to prove that (let ((.cse24 (+ c_main_~max~0 4294967295))) (let ((.cse23 (div .cse24 4294967296))) (let ((.cse25 (+ c_main_~max~0 2147483648)) (.cse21 (* 4294967296 .cse23))) (let ((.cse18 (+ c_main_~i~0 c_main_~j~0 .cse21 5)) (.cse20 (+ c_main_~max~0 4294967291)) (.cse6 (+ c_main_~i~0 c_main_~j~0 .cse21)) (.cse5 (+ c_main_~max~0 4294967292)) (.cse4 (< .cse21 .cse25)) (.cse1 (<= .cse25 .cse21)) (.cse2 (+ c_main_~i~0 c_main_~j~0 .cse21 4))) (let ((.cse13 (+ c_main_~i~0 4)) (.cse14 (mod .cse24 4294967296)) (.cse0 (+ c_main_~i~0 1)) (.cse19 (select c_main_~str1~0 (+ c_main_~i~0 3))) (.cse16 (or .cse1 (not (= .cse2 c_main_~max~0)))) (.cse3 (or .cse1 (not (= c_main_~max~0 (+ c_main_~i~0 c_main_~j~0 .cse21 3))))) (.cse17 (or (not (= .cse6 .cse5)) .cse4)) (.cse7 (* (- 1) c_main_~i~0)) (.cse8 (* (- 4294967296) .cse23)) (.cse10 (or (not (= (+ c_main_~max~0 4294967293) .cse6)) .cse4)) (.cse11 (or (not (= .cse6 .cse20)) .cse4)) (.cse12 (or (not (= .cse18 c_main_~max~0)) .cse1))) (and (<= 0 c_main_~i~0) (= (select c_main_~str1~0 .cse0) (select c_main_~str2~0 3)) (or (and (or .cse1 (not (= c_main_~max~0 .cse2))) .cse3 (or .cse4 (not (= .cse5 .cse6))) (let ((.cse9 (select c_main_~str1~0 (+ c_main_~i~0 (+ 3 (- 1)))))) (or (and .cse1 (= (select c_main_~str2~0 (+ .cse7 c_main_~max~0 .cse8 4294967293)) .cse9)) (and (= (select c_main_~str2~0 (+ .cse7 c_main_~max~0 .cse8 (- 3))) .cse9) .cse4) (<= 3 c_main_~i~0))) .cse10 .cse11 .cse12) (<= c_main_~i~0 1)) (= (select c_main_~str2~0 0) (select c_main_~str1~0 .cse13)) (<= .cse14 2147483647) (= (select c_main_~str1~0 (+ c_main_~i~0 2)) (select c_main_~str2~0 2)) (= .cse13 .cse14) (or (and (let ((.cse15 (select c_main_~str1~0 (+ c_main_~i~0 (+ 3 1))))) (or (and (= (select c_main_~str2~0 (+ .cse7 c_main_~max~0 .cse8 (- 5))) .cse15) .cse4) (<= 1 c_main_~i~0) (and (= (select c_main_~str2~0 (+ .cse7 c_main_~max~0 .cse8 4294967291)) .cse15) .cse1))) .cse11 .cse12) (<= .cse0 0)) (or (and .cse16 .cse17 (or .cse1 (not (= c_main_~max~0 .cse18))) (or (<= 2 c_main_~i~0) (and (= (select c_main_~str2~0 (+ .cse7 c_main_~max~0 .cse8 (- 4))) .cse19) .cse4) (and .cse1 (= (select c_main_~str2~0 (+ .cse7 c_main_~max~0 .cse8 4294967292)) .cse19))) (or (not (= .cse20 .cse6)) .cse4)) (<= c_main_~i~0 0)) (= (select c_main_~str2~0 1) .cse19) (= (select c_main_~str2~0 4) (select c_main_~str1~0 c_main_~i~0)) (or (and .cse16 (or .cse1 (not (= (+ c_main_~i~0 c_main_~j~0 .cse21 2) c_main_~max~0))) .cse3 .cse17 (let ((.cse22 (select c_main_~str1~0 (+ c_main_~i~0 (+ 3 (- 2)))))) (or (and .cse1 (= (select c_main_~str2~0 (+ .cse7 c_main_~max~0 .cse8 4294967294)) .cse22)) (<= 4 c_main_~i~0) (and (= (select c_main_~str2~0 (+ .cse7 c_main_~max~0 .cse8 (- 2))) .cse22) .cse4))) .cse10 (or (not (= .cse6 (+ c_main_~max~0 4294967294))) .cse4) .cse11 .cse12) (<= c_main_~i~0 2)))))))) is different from false [2018-07-24 10:47:13,446 WARN L169 SmtUtils]: Spent 21.42 s on a formula simplification. DAG size of input: 138 DAG size of output: 61 [2018-07-24 10:47:15,759 WARN L169 SmtUtils]: Spent 2.12 s on a formula simplification. DAG size of input: 180 DAG size of output: 40 [2018-07-24 10:47:22,733 WARN L1010 $PredicateComparison]: unable to prove that (let ((.cse17 (+ c_main_~max~0 4294967295))) (let ((.cse7 (select c_main_~str2~0 0)) (.cse8 (+ c_main_~i~0 1)) (.cse1 (mod .cse17 4294967296))) (and (exists ((v_prenex_37 Int)) (let ((.cse0 (mod (+ v_prenex_37 4294967295) 4294967296))) (and (<= 4 .cse0) (= (select c_main_~str2~0 2) (select c_main_~str1~0 (+ .cse0 (- 2)))) (< .cse0 5) (= (select c_main_~str1~0 (+ .cse0 (- 4))) (select c_main_~str2~0 4)) (= (select c_main_~str2~0 0) (select c_main_~str1~0 .cse0)) (= (select c_main_~str2~0 3) (select c_main_~str1~0 (+ .cse0 (- 3)))) (= .cse0 (+ c_main_~j~0 1)) (= (select c_main_~str2~0 1) (select c_main_~str1~0 (+ .cse0 (- 1)))) (<= .cse0 2147483647)))) (= (select c_main_~str2~0 1) (select c_main_~str1~0 (+ .cse1 (- 1)))) (= (select c_main_~str1~0 (+ .cse1 (- 4))) (select c_main_~str2~0 4)) (let ((.cse6 (+ c_main_~i~0 3))) (let ((.cse2 (= c_main_~j~0 3)) (.cse3 (= (select c_main_~str1~0 (+ c_main_~i~0 2)) (select c_main_~str2~0 (+ c_main_~j~0 (- 2))))) (.cse4 (= (select c_main_~str1~0 .cse8) (select c_main_~str2~0 (+ c_main_~j~0 (- 1))))) (.cse5 (= .cse7 (select c_main_~str1~0 .cse6)))) (or (and .cse2 (= (+ c_main_~i~0 4294967299) .cse1) .cse3 .cse4 (< 2147483647 .cse1) .cse5) (and .cse2 (= .cse1 .cse6) (<= .cse1 2147483647) .cse3 .cse4 .cse5)))) (= c_main_~i~0 1) (< .cse1 5) (= .cse7 (select c_main_~str1~0 .cse1)) (or (let ((.cse14 (div .cse17 4294967296))) (let ((.cse15 (* 4294967296 .cse14)) (.cse16 (+ c_main_~max~0 2147483648))) (let ((.cse12 (< .cse15 .cse16)) (.cse13 (<= .cse16 .cse15))) (and (let ((.cse9 (* (- 1) c_main_~i~0)) (.cse10 (* (- 4294967296) .cse14)) (.cse11 (select c_main_~str1~0 (+ c_main_~i~0 (+ 3 1))))) (or (and (= (select c_main_~str2~0 (+ .cse9 c_main_~max~0 .cse10 (- 5))) .cse11) .cse12) (<= 1 c_main_~i~0) (and (= (select c_main_~str2~0 (+ .cse9 c_main_~max~0 .cse10 4294967291)) .cse11) .cse13))) (or (not (= (+ c_main_~i~0 c_main_~j~0 .cse15) (+ c_main_~max~0 4294967291))) .cse12) (or (not (= (+ c_main_~i~0 c_main_~j~0 .cse15 5) c_main_~max~0)) .cse13))))) (<= .cse8 0)) (= (select c_main_~str2~0 2) (select c_main_~str1~0 (+ .cse1 (- 2)))) (<= 4 .cse1) (= (select c_main_~str2~0 3) (select c_main_~str1~0 (+ .cse1 (- 3))))))) is different from false [2018-07-24 10:47:26,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:47:26,266 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2018-07-24 10:47:26,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-07-24 10:47:26,267 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 83 [2018-07-24 10:47:26,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:47:26,268 INFO L225 Difference]: With dead ends: 100 [2018-07-24 10:47:26,268 INFO L226 Difference]: Without dead ends: 98 [2018-07-24 10:47:26,269 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 379 GetRequests, 245 SyntacticMatches, 22 SemanticMatches, 112 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 5199 ImplicationChecksByTransitivity, 93.8s TimeCoverageRelationStatistics Valid=1302, Invalid=11125, Unknown=13, NotChecked=442, Total=12882 [2018-07-24 10:47:26,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-07-24 10:47:26,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 95. [2018-07-24 10:47:26,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-07-24 10:47:26,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 96 transitions. [2018-07-24 10:47:26,288 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 96 transitions. Word has length 83 [2018-07-24 10:47:26,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:47:26,288 INFO L471 AbstractCegarLoop]: Abstraction has 95 states and 96 transitions. [2018-07-24 10:47:26,288 INFO L472 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-07-24 10:47:26,288 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 96 transitions. [2018-07-24 10:47:26,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-07-24 10:47:26,289 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:47:26,290 INFO L353 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:47:26,290 INFO L414 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:47:26,290 INFO L82 PathProgramCache]: Analyzing trace with hash -583340082, now seen corresponding path program 5 times [2018-07-24 10:47:26,290 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:47:26,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:47:26,291 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:47:26,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:47:26,291 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:47:26,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:47:26,990 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 15 proven. 60 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-07-24 10:47:26,990 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:47:26,990 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:47:26,998 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:47:26,998 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:47:51,664 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-24 10:47:51,664 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:47:51,751 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:47:51,883 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 15 proven. 60 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-07-24 10:47:51,883 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:47:52,053 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 15 proven. 60 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-07-24 10:47:52,074 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:47:52,074 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:47:52,090 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:47:52,090 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:47:52,452 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-07-24 10:47:52,453 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:47:52,459 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:47:52,483 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 15 proven. 60 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-07-24 10:47:52,483 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:47:52,524 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 15 proven. 60 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-07-24 10:47:52,526 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:47:52,527 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9, 9, 9] total 23 [2018-07-24 10:47:52,527 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:47:52,527 INFO L450 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-07-24 10:47:52,527 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-07-24 10:47:52,528 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=397, Unknown=0, NotChecked=0, Total=506 [2018-07-24 10:47:52,528 INFO L87 Difference]: Start difference. First operand 95 states and 96 transitions. Second operand 16 states. [2018-07-24 10:47:52,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:47:52,805 INFO L93 Difference]: Finished difference Result 164 states and 166 transitions. [2018-07-24 10:47:52,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-07-24 10:47:52,806 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 92 [2018-07-24 10:47:52,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:47:52,807 INFO L225 Difference]: With dead ends: 164 [2018-07-24 10:47:52,807 INFO L226 Difference]: Without dead ends: 0 [2018-07-24 10:47:52,809 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 376 GetRequests, 353 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=109, Invalid=397, Unknown=0, NotChecked=0, Total=506 [2018-07-24 10:47:52,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-07-24 10:47:52,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-07-24 10:47:52,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-07-24 10:47:52,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-07-24 10:47:52,809 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 92 [2018-07-24 10:47:52,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:47:52,810 INFO L471 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-07-24 10:47:52,810 INFO L472 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-07-24 10:47:52,810 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-07-24 10:47:52,810 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-07-24 10:47:52,814 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-07-24 10:47:52,866 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-07-24 10:47:52,878 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-07-24 10:47:53,013 WARN L169 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 264 DAG size of output: 260 [2018-07-24 10:47:55,326 WARN L169 SmtUtils]: Spent 2.18 s on a formula simplification. DAG size of input: 200 DAG size of output: 86 [2018-07-24 10:47:57,227 WARN L169 SmtUtils]: Spent 1.90 s on a formula simplification. DAG size of input: 260 DAG size of output: 124 [2018-07-24 10:47:57,792 WARN L169 SmtUtils]: Spent 561.00 ms on a formula simplification. DAG size of input: 210 DAG size of output: 97 [2018-07-24 10:47:58,065 WARN L169 SmtUtils]: Spent 270.00 ms on a formula simplification. DAG size of input: 138 DAG size of output: 35 [2018-07-24 10:47:58,069 INFO L421 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-07-24 10:47:58,069 INFO L424 ceAbstractionStarter]: At program point ULTIMATE.initFINAL(line -1) the Hoare annotation is: true [2018-07-24 10:47:58,069 INFO L421 ceAbstractionStarter]: For program point L4(lines 4 6) no Hoare annotation was computed. [2018-07-24 10:47:58,069 INFO L421 ceAbstractionStarter]: For program point L5(line 5) no Hoare annotation was computed. [2018-07-24 10:47:58,069 INFO L424 ceAbstractionStarter]: At program point __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertENTRY(lines 3 8) the Hoare annotation is: true [2018-07-24 10:47:58,069 INFO L421 ceAbstractionStarter]: For program point L4''(lines 3 8) no Hoare annotation was computed. [2018-07-24 10:47:58,069 INFO L421 ceAbstractionStarter]: For program point __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertEXIT(lines 3 8) no Hoare annotation was computed. [2018-07-24 10:47:58,069 INFO L421 ceAbstractionStarter]: For program point __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loops_invert_string_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION(line 5) no Hoare annotation was computed. [2018-07-24 10:47:58,069 INFO L424 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-07-24 10:47:58,069 INFO L424 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-07-24 10:47:58,070 INFO L421 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-07-24 10:47:58,070 INFO L421 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-07-24 10:47:58,070 INFO L417 ceAbstractionStarter]: At program point L16'''(lines 16 18) the Hoare annotation is: (let ((.cse0 (<= 5 main_~max~0))) (let ((.cse1 (* 2 main_~i~0)) (.cse2 (and (<= main_~max~0 5) (<= 4294967298 (+ main_~i~0 (* 4294967296 (div (+ main_~max~0 4294967295) 4294967296)))) .cse0))) (or (and .cse0 (<= main_~max~0 (+ .cse1 5)) (= main_~i~0 0)) (and (<= main_~i~0 1) .cse0 (<= main_~max~0 (+ .cse1 3))) (and .cse2 (< main_~i~0 4)) (and .cse2 (= main_~i~0 5)) (and .cse2 (= main_~i~0 4))))) [2018-07-24 10:47:58,070 INFO L421 ceAbstractionStarter]: For program point L24(lines 24 27) no Hoare annotation was computed. [2018-07-24 10:47:58,070 INFO L421 ceAbstractionStarter]: For program point L30''(lines 30 33) no Hoare annotation was computed. [2018-07-24 10:47:58,070 INFO L421 ceAbstractionStarter]: For program point L24''''(lines 24 27) no Hoare annotation was computed. [2018-07-24 10:47:58,070 INFO L421 ceAbstractionStarter]: For program point L16''(lines 16 18) no Hoare annotation was computed. [2018-07-24 10:47:58,070 INFO L421 ceAbstractionStarter]: For program point L31'(line 31) no Hoare annotation was computed. [2018-07-24 10:47:58,070 INFO L421 ceAbstractionStarter]: For program point L24''(lines 24 27) no Hoare annotation was computed. [2018-07-24 10:47:58,070 INFO L421 ceAbstractionStarter]: For program point L30(lines 30 33) no Hoare annotation was computed. [2018-07-24 10:47:58,071 INFO L417 ceAbstractionStarter]: At program point L31(line 31) the Hoare annotation is: (let ((.cse0 (mod (+ main_~max~0 4294967295) 4294967296)) (.cse5 (+ main_~i~0 3)) (.cse2 (= main_~max~0 5))) (or (and (= .cse0 (+ main_~i~0 2)) (exists ((v_prenex_37 Int)) (let ((.cse1 (mod (+ v_prenex_37 4294967295) 4294967296))) (and (<= 4 .cse1) (= (select main_~str2~0 2) (select main_~str1~0 (+ .cse1 (- 2)))) (< .cse1 5) (= (select main_~str1~0 (+ .cse1 (- 4))) (select main_~str2~0 4)) (= (select main_~str2~0 0) (select main_~str1~0 .cse1)) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse1 (- 3)))) (= (select main_~str2~0 1) (select main_~str1~0 (+ .cse1 (- 1)))) (<= .cse1 2147483647) (= (+ main_~j~0 2) .cse1)))) .cse2) (and (= main_~i~0 3) .cse2 (exists ((v_prenex_37 Int)) (let ((.cse3 (mod (+ v_prenex_37 4294967295) 4294967296))) (and (<= 4 .cse3) (= (select main_~str2~0 2) (select main_~str1~0 (+ .cse3 (- 2)))) (< .cse3 5) (= (select main_~str1~0 (+ .cse3 (- 4))) (select main_~str2~0 4)) (= (select main_~str2~0 0) (select main_~str1~0 .cse3)) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse3 (- 3)))) (= (+ main_~j~0 3) .cse3) (= (select main_~str2~0 1) (select main_~str1~0 (+ .cse3 (- 1)))) (<= .cse3 2147483647))))) (and (= (select main_~str2~0 0) (select main_~str1~0 (+ main_~i~0 4))) (exists ((main_~max~0 Int)) (let ((.cse4 (mod (+ main_~max~0 4294967295) 4294967296))) (and (= (select main_~str1~0 (+ .cse4 (- 4))) (select main_~str2~0 4)) (<= .cse4 4) (<= .cse4 2147483647) (= (select main_~str2~0 2) (select main_~str1~0 (+ .cse4 (- 2)))) (= main_~j~0 .cse4) (<= 4 .cse4) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse4 (- 3))))))) .cse2 (= (select main_~str2~0 (+ main_~j~0 (- 3))) (select main_~str1~0 .cse5)) (= main_~i~0 0)) (and (exists ((v_prenex_37 Int)) (let ((.cse6 (mod (+ v_prenex_37 4294967295) 4294967296))) (and (<= 4 .cse6) (= (select main_~str2~0 2) (select main_~str1~0 (+ .cse6 (- 2)))) (< .cse6 5) (= (select main_~str1~0 (+ .cse6 (- 4))) (select main_~str2~0 4)) (= (select main_~str2~0 0) (select main_~str1~0 .cse6)) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse6 (- 3)))) (= (select main_~str2~0 1) (select main_~str1~0 (+ .cse6 (- 1)))) (<= .cse6 2147483647) (= .cse6 (+ main_~j~0 4))))) .cse2 (= main_~i~0 4)) (and (exists ((v_prenex_37 Int)) (let ((.cse7 (mod (+ v_prenex_37 4294967295) 4294967296))) (and (<= 4 .cse7) (= (select main_~str2~0 2) (select main_~str1~0 (+ .cse7 (- 2)))) (< .cse7 5) (= (select main_~str1~0 (+ .cse7 (- 4))) (select main_~str2~0 4)) (= (select main_~str2~0 0) (select main_~str1~0 .cse7)) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse7 (- 3)))) (= .cse7 (+ main_~j~0 1)) (= (select main_~str2~0 1) (select main_~str1~0 (+ .cse7 (- 1)))) (<= .cse7 2147483647)))) (= .cse0 .cse5) .cse2))) [2018-07-24 10:47:58,071 INFO L417 ceAbstractionStarter]: At program point L30'''(lines 30 33) the Hoare annotation is: (let ((.cse14 (+ main_~max~0 4294967295))) (let ((.cse0 (mod .cse14 4294967296)) (.cse9 (* 4294967296 (div .cse14 4294967296))) (.cse8 (= main_~i~0 0)) (.cse4 (= main_~max~0 5))) (let ((.cse7 (+ main_~i~0 3)) (.cse2 (and (or (and (<= main_~max~0 5) (<= 4294967298 (+ main_~i~0 .cse9))) (and .cse4 .cse8) (and .cse4 (= main_~i~0 1))) (<= 5 main_~max~0))) (.cse10 (select main_~str2~0 1)) (.cse5 (select main_~str2~0 0)) (.cse11 (= (select main_~str2~0 2) (select main_~str1~0 (+ .cse0 (- 2)))))) (or (and (= .cse0 (+ main_~i~0 2)) (exists ((v_prenex_37 Int)) (let ((.cse1 (mod (+ v_prenex_37 4294967295) 4294967296))) (and (<= 4 .cse1) (= (select main_~str2~0 2) (select main_~str1~0 (+ .cse1 (- 2)))) (< .cse1 5) (= (select main_~str1~0 (+ .cse1 (- 4))) (select main_~str2~0 4)) (= (select main_~str2~0 0) (select main_~str1~0 .cse1)) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse1 (- 3)))) (= (select main_~str2~0 1) (select main_~str1~0 (+ .cse1 (- 1)))) (<= .cse1 2147483647) (= (+ main_~j~0 2) .cse1)))) .cse2) (and (exists ((v_prenex_37 Int)) (let ((.cse3 (mod (+ v_prenex_37 4294967295) 4294967296))) (and (<= 4 .cse3) (= (select main_~str2~0 2) (select main_~str1~0 (+ .cse3 (- 2)))) (< .cse3 5) (= (select main_~str1~0 (+ .cse3 (- 4))) (select main_~str2~0 4)) (= (select main_~str2~0 0) (select main_~str1~0 .cse3)) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse3 (- 3)))) (= (select main_~str2~0 1) (select main_~str1~0 (+ .cse3 (- 1)))) (<= .cse3 2147483647) (= .cse3 (+ main_~j~0 4))))) .cse4 (= main_~i~0 4)) (and (= .cse5 (select main_~str1~0 (+ main_~i~0 4))) (exists ((main_~max~0 Int)) (let ((.cse6 (mod (+ main_~max~0 4294967295) 4294967296))) (and (= (select main_~str1~0 (+ .cse6 (- 4))) (select main_~str2~0 4)) (<= .cse6 4) (<= .cse6 2147483647) (= (select main_~str2~0 2) (select main_~str1~0 (+ .cse6 (- 2)))) (= main_~j~0 .cse6) (<= 4 .cse6) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse6 (- 3))))))) .cse4 (= (select main_~str2~0 (+ main_~j~0 (- 3))) (select main_~str1~0 .cse7)) .cse8) (and (= (select main_~str1~0 (+ .cse0 (- 4))) (select main_~str2~0 4)) (not (= (+ main_~max~0 4294967293) (+ main_~i~0 main_~j~0 .cse9))) (= main_~i~0 5) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse0 (- 3)))) (= .cse10 (select main_~str1~0 (+ .cse0 (- 1)))) .cse4 .cse11) (and (= main_~i~0 3) .cse4 (exists ((v_prenex_37 Int)) (let ((.cse12 (mod (+ v_prenex_37 4294967295) 4294967296))) (and (<= 4 .cse12) (= (select main_~str2~0 2) (select main_~str1~0 (+ .cse12 (- 2)))) (< .cse12 5) (= (select main_~str1~0 (+ .cse12 (- 4))) (select main_~str2~0 4)) (= (select main_~str2~0 0) (select main_~str1~0 .cse12)) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse12 (- 3)))) (= (+ main_~j~0 3) .cse12) (= (select main_~str2~0 1) (select main_~str1~0 (+ .cse12 (- 1)))) (<= .cse12 2147483647))))) (and (exists ((main_~max~0 Int)) (let ((.cse13 (mod (+ main_~max~0 4294967295) 4294967296))) (and (= (select main_~str1~0 (+ .cse13 (- 4))) (select main_~str2~0 4)) (<= .cse13 4) (= .cse13 (+ main_~j~0 1)) (<= .cse13 2147483647) (<= 4 .cse13) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse13 (- 3))))))) (= .cse0 .cse7) .cse2 (= (select main_~str1~0 3) .cse10) (= .cse5 (select main_~str1~0 .cse0)) .cse11))))) [2018-07-24 10:47:58,071 INFO L421 ceAbstractionStarter]: For program point mainEXIT(lines 11 34) no Hoare annotation was computed. [2018-07-24 10:47:58,071 INFO L424 ceAbstractionStarter]: At program point mainENTRY(lines 11 34) the Hoare annotation is: true [2018-07-24 10:47:58,071 INFO L421 ceAbstractionStarter]: For program point L16(lines 16 18) no Hoare annotation was computed. [2018-07-24 10:47:58,072 INFO L417 ceAbstractionStarter]: At program point L24'''(lines 24 27) the Hoare annotation is: (let ((.cse10 (+ main_~i~0 1)) (.cse11 (+ main_~i~0 2)) (.cse1 (+ main_~max~0 4294967295))) (let ((.cse8 (select main_~str1~0 (+ main_~i~0 3))) (.cse7 (select main_~str2~0 2)) (.cse3 (mod .cse1 4294967296)) (.cse0 (= main_~max~0 5)) (.cse9 (select main_~str1~0 .cse11)) (.cse6 (select main_~str2~0 0)) (.cse5 (select main_~str1~0 .cse10)) (.cse2 (select main_~str2~0 1))) (or (and .cse0 (= main_~j~0 0) (= main_~i~0 4)) (let ((.cse4 (+ main_~i~0 5))) (and (<= .cse1 (+ main_~i~0 main_~j~0 (* 4294967296 (div .cse1 4294967296)))) (= .cse2 (select main_~str1~0 (+ .cse3 (- 1)))) (= .cse4 .cse3) (= .cse5 (select main_~str2~0 4)) (= (select main_~str2~0 3) (select main_~str1~0 (+ .cse3 (- 3)))) .cse0 (= .cse6 (select main_~str1~0 .cse4)) (= .cse7 (select main_~str1~0 (+ .cse3 (- 2)))))) (and .cse0 (and (= .cse6 (select main_~str1~0 (+ main_~i~0 4))) (= (select main_~str2~0 (+ main_~j~0 (- 3))) .cse8) (= .cse9 (select main_~str2~0 (+ main_~j~0 (- 2)))) (= .cse5 (select main_~str2~0 (+ main_~j~0 (- 1)))) (= main_~j~0 4)) (= main_~i~0 0)) (and .cse0 (= .cse10 .cse3) (= .cse6 (select main_~str1~0 .cse3)) (= main_~j~0 1)) (and .cse0 (= main_~i~0 1) (and (= main_~j~0 3) (= .cse6 .cse8)) (= .cse5 .cse7) (= .cse2 .cse9)) (and (= main_~j~0 2) (= .cse3 .cse11) .cse0 (= .cse9 .cse6) (= .cse5 .cse2))))) [2018-07-24 10:47:58,072 INFO L421 ceAbstractionStarter]: For program point L16''''(lines 16 18) no Hoare annotation was computed. [2018-07-24 10:47:58,072 INFO L421 ceAbstractionStarter]: For program point L30''''(lines 11 34) no Hoare annotation was computed. [2018-07-24 10:47:58,091 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,092 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,093 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,093 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,093 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,093 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,094 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,094 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,094 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,094 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,095 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,095 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,095 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,095 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,096 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,096 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,096 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,096 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,097 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,097 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,097 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,097 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,098 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,098 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,098 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,098 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,099 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,103 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,104 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,104 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,104 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,105 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,105 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,105 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,105 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,106 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,106 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,106 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,106 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,107 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,107 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,107 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,107 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,108 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,108 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,108 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,108 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,109 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,109 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,109 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,109 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,110 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,110 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,110 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,115 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.07 10:47:58 BoogieIcfgContainer [2018-07-24 10:47:58,115 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-07-24 10:47:58,116 INFO L168 Benchmark]: Toolchain (without parser) took 218469.07 ms. Allocated memory was 1.5 GB in the beginning and 2.6 GB in the end (delta: 1.1 GB). Free memory was 1.4 GB in the beginning and 2.5 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.0 GB. Max. memory is 7.1 GB. [2018-07-24 10:47:58,117 INFO L168 Benchmark]: CDTParser took 0.27 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:47:58,117 INFO L168 Benchmark]: CACSL2BoogieTranslator took 338.23 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-07-24 10:47:58,117 INFO L168 Benchmark]: Boogie Procedure Inliner took 27.64 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:47:58,118 INFO L168 Benchmark]: Boogie Preprocessor took 35.76 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:47:58,118 INFO L168 Benchmark]: RCFGBuilder took 458.90 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 716.2 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -771.1 MB). Peak memory consumption was 26.7 MB. Max. memory is 7.1 GB. [2018-07-24 10:47:58,118 INFO L168 Benchmark]: TraceAbstraction took 217603.49 ms. Allocated memory was 2.2 GB in the beginning and 2.6 GB in the end (delta: 393.2 MB). Free memory was 2.2 GB in the beginning and 2.5 GB in the end (delta: -310.0 MB). Peak memory consumption was 1.1 GB. Max. memory is 7.1 GB. [2018-07-24 10:47:58,120 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 338.23 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 27.64 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 35.76 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 458.90 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 716.2 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -771.1 MB). Peak memory consumption was 26.7 MB. Max. memory is 7.1 GB. * TraceAbstraction took 217603.49 ms. Allocated memory was 2.2 GB in the beginning and 2.6 GB in the end (delta: 393.2 MB). Free memory was 2.2 GB in the beginning and 2.5 GB in the end (delta: -310.0 MB). Peak memory consumption was 1.1 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 5]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 24]: Loop Invariant Derived loop invariant: ((((((max == 5 && j == 0) && i == 4) || (((((((max + 4294967295 <= i + j + 4294967296 * ((max + 4294967295) / 4294967296) && str2[1] == str1[(max + 4294967295) % 4294967296 + -1]) && i + 5 == (max + 4294967295) % 4294967296) && str1[i + 1] == str2[4]) && str2[3] == str1[(max + 4294967295) % 4294967296 + -3]) && max == 5) && str2[0] == str1[i + 5]) && str2[2] == str1[(max + 4294967295) % 4294967296 + -2])) || ((max == 5 && (((str2[0] == str1[i + 4] && str2[j + -3] == str1[i + 3]) && str1[i + 2] == str2[j + -2]) && str1[i + 1] == str2[j + -1]) && j == 4) && i == 0)) || (((max == 5 && i + 1 == (max + 4294967295) % 4294967296) && str2[0] == str1[(max + 4294967295) % 4294967296]) && j == 1)) || ((((max == 5 && i == 1) && j == 3 && str2[0] == str1[i + 3]) && str1[i + 1] == str2[2]) && str2[1] == str1[i + 2])) || ((((j == 2 && (max + 4294967295) % 4294967296 == i + 2) && max == 5) && str1[i + 2] == str2[0]) && str1[i + 1] == str2[1]) - InvariantResult [Line: 30]: Loop Invariant [2018-07-24 10:47:58,128 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,128 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,128 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,129 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,129 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,129 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,129 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,129 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,130 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,130 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,130 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,130 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,130 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,131 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,131 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,131 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,131 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,132 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,132 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,132 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,132 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,132 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,133 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,133 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,133 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,133 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,133 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,135 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,135 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,135 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,136 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,136 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,136 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,136 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,137 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,137 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,137 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,137 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,137 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,138 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,138 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,138 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,138 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,138 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,139 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,139 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,139 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,139 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,140 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,140 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,140 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,140 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,140 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] [2018-07-24 10:47:58,140 WARN L343 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_prenex_37,QUANTIFIED] Derived loop invariant: (((((((max + 4294967295) % 4294967296 == i + 2 && (\exists v_prenex_37 : int :: (((((((4 <= (v_prenex_37 + 4294967295) % 4294967296 && str2[2] == str1[(v_prenex_37 + 4294967295) % 4294967296 + -2]) && (v_prenex_37 + 4294967295) % 4294967296 < 5) && str1[(v_prenex_37 + 4294967295) % 4294967296 + -4] == str2[4]) && str2[0] == str1[(v_prenex_37 + 4294967295) % 4294967296]) && str2[3] == str1[(v_prenex_37 + 4294967295) % 4294967296 + -3]) && str2[1] == str1[(v_prenex_37 + 4294967295) % 4294967296 + -1]) && (v_prenex_37 + 4294967295) % 4294967296 <= 2147483647) && j + 2 == (v_prenex_37 + 4294967295) % 4294967296)) && (((max <= 5 && 4294967298 <= i + 4294967296 * ((max + 4294967295) / 4294967296)) || (max == 5 && i == 0)) || (max == 5 && i == 1)) && 5 <= max) || (((\exists v_prenex_37 : int :: (((((((4 <= (v_prenex_37 + 4294967295) % 4294967296 && str2[2] == str1[(v_prenex_37 + 4294967295) % 4294967296 + -2]) && (v_prenex_37 + 4294967295) % 4294967296 < 5) && str1[(v_prenex_37 + 4294967295) % 4294967296 + -4] == str2[4]) && str2[0] == str1[(v_prenex_37 + 4294967295) % 4294967296]) && str2[3] == str1[(v_prenex_37 + 4294967295) % 4294967296 + -3]) && str2[1] == str1[(v_prenex_37 + 4294967295) % 4294967296 + -1]) && (v_prenex_37 + 4294967295) % 4294967296 <= 2147483647) && (v_prenex_37 + 4294967295) % 4294967296 == j + 4) && max == 5) && i == 4)) || ((((str2[0] == str1[i + 4] && (\exists main_~max~0 : int :: (((((str1[(max + 4294967295) % 4294967296 + -4] == str2[4] && (max + 4294967295) % 4294967296 <= 4) && (max + 4294967295) % 4294967296 <= 2147483647) && str2[2] == str1[(max + 4294967295) % 4294967296 + -2]) && j == (max + 4294967295) % 4294967296) && 4 <= (max + 4294967295) % 4294967296) && str2[3] == str1[(max + 4294967295) % 4294967296 + -3])) && max == 5) && str2[j + -3] == str1[i + 3]) && i == 0)) || ((((((str1[(max + 4294967295) % 4294967296 + -4] == str2[4] && !(max + 4294967293 == i + j + 4294967296 * ((max + 4294967295) / 4294967296))) && i == 5) && str2[3] == str1[(max + 4294967295) % 4294967296 + -3]) && str2[1] == str1[(max + 4294967295) % 4294967296 + -1]) && max == 5) && str2[2] == str1[(max + 4294967295) % 4294967296 + -2])) || ((i == 3 && max == 5) && (\exists v_prenex_37 : int :: (((((((4 <= (v_prenex_37 + 4294967295) % 4294967296 && str2[2] == str1[(v_prenex_37 + 4294967295) % 4294967296 + -2]) && (v_prenex_37 + 4294967295) % 4294967296 < 5) && str1[(v_prenex_37 + 4294967295) % 4294967296 + -4] == str2[4]) && str2[0] == str1[(v_prenex_37 + 4294967295) % 4294967296]) && str2[3] == str1[(v_prenex_37 + 4294967295) % 4294967296 + -3]) && j + 3 == (v_prenex_37 + 4294967295) % 4294967296) && str2[1] == str1[(v_prenex_37 + 4294967295) % 4294967296 + -1]) && (v_prenex_37 + 4294967295) % 4294967296 <= 2147483647))) || ((((((\exists main_~max~0 : int :: ((((str1[(max + 4294967295) % 4294967296 + -4] == str2[4] && (max + 4294967295) % 4294967296 <= 4) && (max + 4294967295) % 4294967296 == j + 1) && (max + 4294967295) % 4294967296 <= 2147483647) && 4 <= (max + 4294967295) % 4294967296) && str2[3] == str1[(max + 4294967295) % 4294967296 + -3]) && (max + 4294967295) % 4294967296 == i + 3) && (((max <= 5 && 4294967298 <= i + 4294967296 * ((max + 4294967295) / 4294967296)) || (max == 5 && i == 0)) || (max == 5 && i == 1)) && 5 <= max) && str1[3] == str2[1]) && str2[0] == str1[(max + 4294967295) % 4294967296]) && str2[2] == str1[(max + 4294967295) % 4294967296 + -2]) - InvariantResult [Line: 16]: Loop Invariant Derived loop invariant: (((((5 <= max && max <= 2 * i + 5) && i == 0) || ((i <= 1 && 5 <= max) && max <= 2 * i + 3)) || (((max <= 5 && 4294967298 <= i + 4294967296 * ((max + 4294967295) / 4294967296)) && 5 <= max) && i < 4)) || (((max <= 5 && 4294967298 <= i + 4294967296 * ((max + 4294967295) / 4294967296)) && 5 <= max) && i == 5)) || (((max <= 5 && 4294967298 <= i + 4294967296 * ((max + 4294967295) / 4294967296)) && 5 <= max) && i == 4) - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 28 locations, 1 error locations. SAFE Result, 217.4s OverallTime, 14 OverallIterations, 9 TraceHistogramMax, 65.2s AutomataDifference, 0.0s DeadEndRemovalTime, 5.2s HoareAnnotationTime, HoareTripleCheckerStatistics: 378 SDtfs, 691 SDslu, 4465 SDs, 0 SdLazy, 7089 SolverSat, 611 SolverUnsat, 4 SolverUnknown, 0 SolverNotchecked, 17.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2429 GetRequests, 1736 SyntacticMatches, 82 SemanticMatches, 611 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 15000 ImplicationChecksByTransitivity, 143.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=95occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 14 MinimizatonAttempts, 137 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 9 LocationsWithAnnotation, 33 PreInvPairs, 64 NumberOfFragments, 1511 HoareAnnotationTreeSize, 33 FomulaSimplifications, 287234 FormulaSimplificationTreeSizeReduction, 0.3s HoareSimplificationTime, 9 FomulaSimplificationsInter, 246120 FormulaSimplificationTreeSizeReductionInter, 4.9s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 27.2s SatisfiabilityAnalysisTime, 118.5s InterpolantComputationTime, 1714 NumberOfCodeBlocks, 1702 NumberOfCodeBlocksAsserted, 84 NumberOfCheckSat, 2753 ConstructedInterpolants, 169 QuantifiedInterpolants, 3029842 SizeOfPredicates, 111 NumberOfNonLiveVariables, 2315 ConjunctsInSsa, 661 ConjunctsInUnsatCore, 58 InterpolantComputations, 5 PerfectInterpolantSequences, 1947/4014 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/invert_string_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-07-24_10-47-58-154.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/invert_string_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-07-24_10-47-58-154.csv Received shutdown request...