java -Xmx8000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml --generate-csv --csv-dir csv -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-invgen/string_concat-noarr_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dd2f093 [2018-07-24 10:54:30,880 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-07-24 10:54:30,882 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-07-24 10:54:30,894 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-07-24 10:54:30,894 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-07-24 10:54:30,895 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-07-24 10:54:30,896 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-07-24 10:54:30,898 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-07-24 10:54:30,899 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-07-24 10:54:30,900 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-07-24 10:54:30,901 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-07-24 10:54:30,901 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-07-24 10:54:30,902 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-07-24 10:54:30,903 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-07-24 10:54:30,904 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-07-24 10:54:30,905 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-07-24 10:54:30,906 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-07-24 10:54:30,907 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-07-24 10:54:30,909 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-07-24 10:54:30,911 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-07-24 10:54:30,912 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-07-24 10:54:30,913 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-07-24 10:54:30,915 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-07-24 10:54:30,915 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-07-24 10:54:30,915 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-07-24 10:54:30,916 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-07-24 10:54:30,917 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-07-24 10:54:30,918 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-07-24 10:54:30,918 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-07-24 10:54:30,919 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-07-24 10:54:30,920 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-07-24 10:54:30,920 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-07-24 10:54:30,926 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-07-24 10:54:30,955 INFO L110 SettingsManager]: Loading preferences was successful [2018-07-24 10:54:30,956 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-07-24 10:54:30,957 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-07-24 10:54:30,958 INFO L133 SettingsManager]: * User list type=DISABLED [2018-07-24 10:54:30,958 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-07-24 10:54:30,958 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-07-24 10:54:30,958 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-07-24 10:54:30,958 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-07-24 10:54:30,959 INFO L133 SettingsManager]: * Log string format=TERM [2018-07-24 10:54:30,959 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-07-24 10:54:30,959 INFO L133 SettingsManager]: * Interval Domain=false [2018-07-24 10:54:30,960 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-07-24 10:54:30,960 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-07-24 10:54:30,960 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-07-24 10:54:30,960 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-07-24 10:54:30,960 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-07-24 10:54:30,961 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-07-24 10:54:30,961 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-07-24 10:54:30,961 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-07-24 10:54:30,961 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-07-24 10:54:30,961 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-07-24 10:54:30,962 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-07-24 10:54:30,962 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-07-24 10:54:30,962 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 10:54:30,962 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-07-24 10:54:30,962 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-07-24 10:54:30,963 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-07-24 10:54:30,963 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-07-24 10:54:30,963 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-07-24 10:54:30,963 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-07-24 10:54:30,963 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-07-24 10:54:30,964 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-07-24 10:54:30,964 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-07-24 10:54:31,017 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-07-24 10:54:31,032 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-07-24 10:54:31,037 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-07-24 10:54:31,039 INFO L271 PluginConnector]: Initializing CDTParser... [2018-07-24 10:54:31,039 INFO L276 PluginConnector]: CDTParser initialized [2018-07-24 10:54:31,040 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-invgen/string_concat-noarr_true-unreach-call_true-termination.i [2018-07-24 10:54:31,383 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13bef93cd/72f63f840b164fadbad9f0ba2874699c/FLAGb612f19a9 [2018-07-24 10:54:31,536 INFO L276 CDTParser]: Found 1 translation units. [2018-07-24 10:54:31,536 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-invgen/string_concat-noarr_true-unreach-call_true-termination.i [2018-07-24 10:54:31,542 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13bef93cd/72f63f840b164fadbad9f0ba2874699c/FLAGb612f19a9 [2018-07-24 10:54:31,557 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13bef93cd/72f63f840b164fadbad9f0ba2874699c [2018-07-24 10:54:31,566 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-07-24 10:54:31,568 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-07-24 10:54:31,569 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-07-24 10:54:31,569 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-07-24 10:54:31,577 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-07-24 10:54:31,578 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,581 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@13f8f258 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31, skipping insertion in model container [2018-07-24 10:54:31,582 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,773 INFO L179 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-07-24 10:54:31,828 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 10:54:31,846 INFO L422 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-07-24 10:54:31,854 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 10:54:31,868 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31 WrapperNode [2018-07-24 10:54:31,870 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-07-24 10:54:31,871 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-07-24 10:54:31,871 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-07-24 10:54:31,871 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-07-24 10:54:31,880 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,887 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,894 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-07-24 10:54:31,895 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-07-24 10:54:31,895 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-07-24 10:54:31,895 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-07-24 10:54:31,905 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,905 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,906 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,911 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,913 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,919 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,920 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (1/1) ... [2018-07-24 10:54:31,922 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-07-24 10:54:31,929 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-07-24 10:54:31,929 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-07-24 10:54:31,929 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-07-24 10:54:31,930 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 10:54:31,998 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-07-24 10:54:31,999 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-07-24 10:54:31,999 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-07-24 10:54:31,999 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-07-24 10:54:31,999 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-07-24 10:54:31,999 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-07-24 10:54:31,999 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assert [2018-07-24 10:54:32,000 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assert [2018-07-24 10:54:32,317 INFO L261 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-07-24 10:54:32,318 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 10:54:32 BoogieIcfgContainer [2018-07-24 10:54:32,318 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-07-24 10:54:32,319 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-07-24 10:54:32,319 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-07-24 10:54:32,322 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-07-24 10:54:32,322 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.07 10:54:31" (1/3) ... [2018-07-24 10:54:32,323 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a6761e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 10:54:32, skipping insertion in model container [2018-07-24 10:54:32,323 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 10:54:31" (2/3) ... [2018-07-24 10:54:32,324 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a6761e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 10:54:32, skipping insertion in model container [2018-07-24 10:54:32,324 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 10:54:32" (3/3) ... [2018-07-24 10:54:32,326 INFO L112 eAbstractionObserver]: Analyzing ICFG string_concat-noarr_true-unreach-call_true-termination.i [2018-07-24 10:54:32,334 INFO L132 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-07-24 10:54:32,342 INFO L144 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-07-24 10:54:32,390 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-07-24 10:54:32,391 INFO L373 AbstractCegarLoop]: Interprodecural is true [2018-07-24 10:54:32,391 INFO L374 AbstractCegarLoop]: Hoare is true [2018-07-24 10:54:32,391 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-07-24 10:54:32,391 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-07-24 10:54:32,391 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-07-24 10:54:32,391 INFO L378 AbstractCegarLoop]: Difference is false [2018-07-24 10:54:32,391 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-07-24 10:54:32,392 INFO L384 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-07-24 10:54:32,407 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states. [2018-07-24 10:54:32,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-07-24 10:54:32,413 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:32,414 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:32,414 INFO L414 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:32,419 INFO L82 PathProgramCache]: Analyzing trace with hash -745796184, now seen corresponding path program 1 times [2018-07-24 10:54:32,422 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:32,475 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:32,476 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:32,476 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:32,476 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:32,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:32,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:32,535 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:54:32,536 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-07-24 10:54:32,536 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:54:32,541 INFO L450 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-07-24 10:54:32,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-07-24 10:54:32,556 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-24 10:54:32,559 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 2 states. [2018-07-24 10:54:32,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:32,588 INFO L93 Difference]: Finished difference Result 45 states and 54 transitions. [2018-07-24 10:54:32,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-07-24 10:54:32,590 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-07-24 10:54:32,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:32,599 INFO L225 Difference]: With dead ends: 45 [2018-07-24 10:54:32,599 INFO L226 Difference]: Without dead ends: 19 [2018-07-24 10:54:32,603 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-24 10:54:32,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-07-24 10:54:32,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-07-24 10:54:32,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-07-24 10:54:32,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2018-07-24 10:54:32,638 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 14 [2018-07-24 10:54:32,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:32,639 INFO L471 AbstractCegarLoop]: Abstraction has 19 states and 20 transitions. [2018-07-24 10:54:32,639 INFO L472 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-07-24 10:54:32,639 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 20 transitions. [2018-07-24 10:54:32,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-07-24 10:54:32,640 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:32,640 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:32,641 INFO L414 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:32,641 INFO L82 PathProgramCache]: Analyzing trace with hash 800081396, now seen corresponding path program 1 times [2018-07-24 10:54:32,641 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:32,642 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:32,643 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:32,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:32,643 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:32,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:32,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:32,869 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:54:32,869 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-07-24 10:54:32,869 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:54:32,871 INFO L450 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-07-24 10:54:32,871 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-07-24 10:54:32,871 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-07-24 10:54:32,872 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. Second operand 5 states. [2018-07-24 10:54:33,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:33,012 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2018-07-24 10:54:33,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-07-24 10:54:33,013 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-07-24 10:54:33,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:33,014 INFO L225 Difference]: With dead ends: 32 [2018-07-24 10:54:33,014 INFO L226 Difference]: Without dead ends: 26 [2018-07-24 10:54:33,015 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-07-24 10:54:33,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-07-24 10:54:33,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-07-24 10:54:33,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-07-24 10:54:33,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 28 transitions. [2018-07-24 10:54:33,021 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 28 transitions. Word has length 18 [2018-07-24 10:54:33,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:33,021 INFO L471 AbstractCegarLoop]: Abstraction has 26 states and 28 transitions. [2018-07-24 10:54:33,021 INFO L472 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-07-24 10:54:33,021 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2018-07-24 10:54:33,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-07-24 10:54:33,022 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:33,022 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:33,023 INFO L414 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:33,023 INFO L82 PathProgramCache]: Analyzing trace with hash 1097925811, now seen corresponding path program 1 times [2018-07-24 10:54:33,023 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:33,024 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:33,024 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:33,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:33,025 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:33,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:33,130 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-07-24 10:54:33,130 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 10:54:33,130 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-07-24 10:54:33,131 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-24 10:54:33,131 INFO L450 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-07-24 10:54:33,131 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-07-24 10:54:33,132 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-07-24 10:54:33,132 INFO L87 Difference]: Start difference. First operand 26 states and 28 transitions. Second operand 5 states. [2018-07-24 10:54:33,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:33,302 INFO L93 Difference]: Finished difference Result 35 states and 37 transitions. [2018-07-24 10:54:33,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-07-24 10:54:33,303 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-07-24 10:54:33,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:33,304 INFO L225 Difference]: With dead ends: 35 [2018-07-24 10:54:33,304 INFO L226 Difference]: Without dead ends: 29 [2018-07-24 10:54:33,305 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-07-24 10:54:33,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-07-24 10:54:33,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 22. [2018-07-24 10:54:33,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-07-24 10:54:33,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2018-07-24 10:54:33,310 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 23 transitions. Word has length 21 [2018-07-24 10:54:33,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:33,310 INFO L471 AbstractCegarLoop]: Abstraction has 22 states and 23 transitions. [2018-07-24 10:54:33,310 INFO L472 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-07-24 10:54:33,310 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2018-07-24 10:54:33,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-07-24 10:54:33,311 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:33,312 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:33,313 INFO L414 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:33,314 INFO L82 PathProgramCache]: Analyzing trace with hash -278190259, now seen corresponding path program 1 times [2018-07-24 10:54:33,314 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:33,316 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:33,317 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:33,317 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:33,317 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:33,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:33,554 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:33,554 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:33,555 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:33,572 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:33,572 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:54:33,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:33,598 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:33,672 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:33,673 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:33,801 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:33,824 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:33,824 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:33,840 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:33,841 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:54:33,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:33,865 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:33,875 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:33,875 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:33,936 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:33,943 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:33,943 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 12 [2018-07-24 10:54:33,943 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:33,944 INFO L450 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-07-24 10:54:33,944 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-07-24 10:54:33,944 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-07-24 10:54:33,945 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. Second operand 8 states. [2018-07-24 10:54:34,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:34,130 INFO L93 Difference]: Finished difference Result 63 states and 70 transitions. [2018-07-24 10:54:34,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-07-24 10:54:34,131 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-07-24 10:54:34,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:34,134 INFO L225 Difference]: With dead ends: 63 [2018-07-24 10:54:34,134 INFO L226 Difference]: Without dead ends: 53 [2018-07-24 10:54:34,135 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2018-07-24 10:54:34,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-07-24 10:54:34,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 39. [2018-07-24 10:54:34,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-07-24 10:54:34,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 42 transitions. [2018-07-24 10:54:34,142 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 42 transitions. Word has length 21 [2018-07-24 10:54:34,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:34,142 INFO L471 AbstractCegarLoop]: Abstraction has 39 states and 42 transitions. [2018-07-24 10:54:34,142 INFO L472 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-07-24 10:54:34,142 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 42 transitions. [2018-07-24 10:54:34,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-07-24 10:54:34,144 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:34,144 INFO L353 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:34,144 INFO L414 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:34,144 INFO L82 PathProgramCache]: Analyzing trace with hash -2006845708, now seen corresponding path program 1 times [2018-07-24 10:54:34,145 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:34,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:34,146 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:34,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:34,146 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:34,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:34,332 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:34,333 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:34,333 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-07-24 10:54:34,348 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:34,348 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:34,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:34,373 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:34,394 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:34,394 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:34,826 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:34,846 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:34,847 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:34,864 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:34,864 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:54:34,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:34,889 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:34,898 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:34,899 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:34,944 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:34,946 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:34,947 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 16 [2018-07-24 10:54:34,947 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:34,948 INFO L450 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-07-24 10:54:34,948 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-07-24 10:54:34,949 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=164, Unknown=0, NotChecked=0, Total=240 [2018-07-24 10:54:34,949 INFO L87 Difference]: Start difference. First operand 39 states and 42 transitions. Second operand 9 states. [2018-07-24 10:54:35,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:35,164 INFO L93 Difference]: Finished difference Result 75 states and 81 transitions. [2018-07-24 10:54:35,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-07-24 10:54:35,165 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 30 [2018-07-24 10:54:35,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:35,169 INFO L225 Difference]: With dead ends: 75 [2018-07-24 10:54:35,169 INFO L226 Difference]: Without dead ends: 69 [2018-07-24 10:54:35,169 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=82, Invalid=190, Unknown=0, NotChecked=0, Total=272 [2018-07-24 10:54:35,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-07-24 10:54:35,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 46. [2018-07-24 10:54:35,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-07-24 10:54:35,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 50 transitions. [2018-07-24 10:54:35,177 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 50 transitions. Word has length 30 [2018-07-24 10:54:35,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:35,177 INFO L471 AbstractCegarLoop]: Abstraction has 46 states and 50 transitions. [2018-07-24 10:54:35,178 INFO L472 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-07-24 10:54:35,178 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 50 transitions. [2018-07-24 10:54:35,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-07-24 10:54:35,179 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:35,179 INFO L353 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:35,179 INFO L414 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:35,180 INFO L82 PathProgramCache]: Analyzing trace with hash 750227251, now seen corresponding path program 2 times [2018-07-24 10:54:35,180 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:35,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:35,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:35,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:35,181 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:35,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:35,320 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:35,321 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:35,321 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:35,330 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:54:35,330 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:54:35,354 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:54:35,354 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:35,357 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:35,366 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:35,367 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:35,676 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:35,697 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:35,697 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:35,713 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:54:35,713 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:54:35,742 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:54:35,742 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:35,747 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:35,756 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:35,757 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:35,814 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:35,816 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:35,816 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 18 [2018-07-24 10:54:35,817 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:35,817 INFO L450 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-07-24 10:54:35,818 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-07-24 10:54:35,818 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=205, Unknown=0, NotChecked=0, Total=306 [2018-07-24 10:54:35,818 INFO L87 Difference]: Start difference. First operand 46 states and 50 transitions. Second operand 10 states. [2018-07-24 10:54:36,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:36,182 INFO L93 Difference]: Finished difference Result 82 states and 89 transitions. [2018-07-24 10:54:36,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-07-24 10:54:36,184 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 33 [2018-07-24 10:54:36,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:36,185 INFO L225 Difference]: With dead ends: 82 [2018-07-24 10:54:36,185 INFO L226 Difference]: Without dead ends: 76 [2018-07-24 10:54:36,186 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=107, Invalid=235, Unknown=0, NotChecked=0, Total=342 [2018-07-24 10:54:36,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-07-24 10:54:36,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 53. [2018-07-24 10:54:36,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-07-24 10:54:36,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2018-07-24 10:54:36,196 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 33 [2018-07-24 10:54:36,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:36,197 INFO L471 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2018-07-24 10:54:36,197 INFO L472 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-07-24 10:54:36,197 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2018-07-24 10:54:36,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-07-24 10:54:36,200 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:36,200 INFO L353 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:36,200 INFO L414 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:36,200 INFO L82 PathProgramCache]: Analyzing trace with hash -243819884, now seen corresponding path program 3 times [2018-07-24 10:54:36,200 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:36,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:36,202 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:54:36,202 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:36,202 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:36,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:36,394 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:36,395 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:36,395 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:36,404 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:54:36,404 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:54:36,418 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-07-24 10:54:36,418 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:36,420 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:36,463 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-07-24 10:54:36,464 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:36,555 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-07-24 10:54:36,576 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:36,576 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:36,594 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:54:36,594 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:54:36,622 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-07-24 10:54:36,623 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:36,627 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:36,634 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-07-24 10:54:36,634 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:36,651 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-07-24 10:54:36,653 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:36,653 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7, 7, 7, 7] total 19 [2018-07-24 10:54:36,653 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:36,654 INFO L450 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-07-24 10:54:36,654 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-07-24 10:54:36,654 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=227, Unknown=0, NotChecked=0, Total=342 [2018-07-24 10:54:36,655 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand 14 states. [2018-07-24 10:54:36,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:36,869 INFO L93 Difference]: Finished difference Result 119 states and 133 transitions. [2018-07-24 10:54:36,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-07-24 10:54:36,869 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 36 [2018-07-24 10:54:36,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:36,871 INFO L225 Difference]: With dead ends: 119 [2018-07-24 10:54:36,872 INFO L226 Difference]: Without dead ends: 107 [2018-07-24 10:54:36,873 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=121, Invalid=259, Unknown=0, NotChecked=0, Total=380 [2018-07-24 10:54:36,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-07-24 10:54:36,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 77. [2018-07-24 10:54:36,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-07-24 10:54:36,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 85 transitions. [2018-07-24 10:54:36,881 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 85 transitions. Word has length 36 [2018-07-24 10:54:36,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:36,883 INFO L471 AbstractCegarLoop]: Abstraction has 77 states and 85 transitions. [2018-07-24 10:54:36,883 INFO L472 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-07-24 10:54:36,883 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 85 transitions. [2018-07-24 10:54:36,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-07-24 10:54:36,884 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:36,885 INFO L353 BasicCegarLoop]: trace histogram [8, 8, 7, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:36,885 INFO L414 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:36,885 INFO L82 PathProgramCache]: Analyzing trace with hash 1071743214, now seen corresponding path program 4 times [2018-07-24 10:54:36,885 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:36,886 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:36,886 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:54:36,886 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:36,887 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:36,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:37,088 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:37,088 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:37,088 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:37,096 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:54:37,097 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:54:37,127 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:54:37,127 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:37,130 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:37,143 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:37,143 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:37,488 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:37,509 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:37,510 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:37,527 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:54:37,528 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:54:37,564 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:54:37,564 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:37,568 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:37,580 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:37,581 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:37,602 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:37,604 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:37,604 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-07-24 10:54:37,604 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:37,605 INFO L450 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-07-24 10:54:37,605 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-07-24 10:54:37,606 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=470, Unknown=0, NotChecked=0, Total=756 [2018-07-24 10:54:37,606 INFO L87 Difference]: Start difference. First operand 77 states and 85 transitions. Second operand 15 states. [2018-07-24 10:54:37,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:37,812 INFO L93 Difference]: Finished difference Result 129 states and 141 transitions. [2018-07-24 10:54:37,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-07-24 10:54:37,812 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 48 [2018-07-24 10:54:37,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:37,814 INFO L225 Difference]: With dead ends: 129 [2018-07-24 10:54:37,814 INFO L226 Difference]: Without dead ends: 123 [2018-07-24 10:54:37,815 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 179 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=292, Invalid=520, Unknown=0, NotChecked=0, Total=812 [2018-07-24 10:54:37,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-07-24 10:54:37,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 84. [2018-07-24 10:54:37,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-07-24 10:54:37,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 93 transitions. [2018-07-24 10:54:37,823 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 93 transitions. Word has length 48 [2018-07-24 10:54:37,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:37,823 INFO L471 AbstractCegarLoop]: Abstraction has 84 states and 93 transitions. [2018-07-24 10:54:37,824 INFO L472 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-07-24 10:54:37,824 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 93 transitions. [2018-07-24 10:54:37,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-07-24 10:54:37,825 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:37,825 INFO L353 BasicCegarLoop]: trace histogram [9, 9, 8, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:37,825 INFO L414 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:37,826 INFO L82 PathProgramCache]: Analyzing trace with hash 535766893, now seen corresponding path program 5 times [2018-07-24 10:54:37,826 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:37,826 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:37,827 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:54:37,827 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:37,827 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:37,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:38,032 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:38,032 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:38,032 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:38,046 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:54:38,046 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:54:38,168 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-07-24 10:54:38,168 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:38,171 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:38,183 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:38,183 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:39,046 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:39,067 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:39,067 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:39,082 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:54:39,082 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:54:39,145 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-07-24 10:54:39,146 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:39,150 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:39,163 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:39,163 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:39,194 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:39,195 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:39,195 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-07-24 10:54:39,196 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:39,196 INFO L450 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-07-24 10:54:39,196 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-07-24 10:54:39,197 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=335, Invalid=535, Unknown=0, NotChecked=0, Total=870 [2018-07-24 10:54:39,197 INFO L87 Difference]: Start difference. First operand 84 states and 93 transitions. Second operand 16 states. [2018-07-24 10:54:39,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:39,487 INFO L93 Difference]: Finished difference Result 136 states and 149 transitions. [2018-07-24 10:54:39,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-07-24 10:54:39,487 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 51 [2018-07-24 10:54:39,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:39,488 INFO L225 Difference]: With dead ends: 136 [2018-07-24 10:54:39,488 INFO L226 Difference]: Without dead ends: 130 [2018-07-24 10:54:39,489 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 190 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=341, Invalid=589, Unknown=0, NotChecked=0, Total=930 [2018-07-24 10:54:39,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-07-24 10:54:39,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 91. [2018-07-24 10:54:39,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-07-24 10:54:39,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 101 transitions. [2018-07-24 10:54:39,507 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 101 transitions. Word has length 51 [2018-07-24 10:54:39,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:39,509 INFO L471 AbstractCegarLoop]: Abstraction has 91 states and 101 transitions. [2018-07-24 10:54:39,510 INFO L472 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-07-24 10:54:39,510 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 101 transitions. [2018-07-24 10:54:39,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-07-24 10:54:39,511 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:39,511 INFO L353 BasicCegarLoop]: trace histogram [10, 10, 9, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:39,511 INFO L414 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:39,511 INFO L82 PathProgramCache]: Analyzing trace with hash 1953594510, now seen corresponding path program 6 times [2018-07-24 10:54:39,512 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:39,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:39,516 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:54:39,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:39,516 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:39,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:39,730 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:39,731 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:39,731 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:39,744 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:54:39,745 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:54:39,777 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-07-24 10:54:39,778 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:39,780 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:39,859 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 135 trivial. 0 not checked. [2018-07-24 10:54:39,860 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:39,961 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 135 trivial. 0 not checked. [2018-07-24 10:54:39,982 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:39,982 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:40,001 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:54:40,001 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:54:40,067 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-07-24 10:54:40,067 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:40,071 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:40,077 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 135 trivial. 0 not checked. [2018-07-24 10:54:40,077 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:40,138 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 135 trivial. 0 not checked. [2018-07-24 10:54:40,141 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:40,141 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 8, 8, 8, 8] total 27 [2018-07-24 10:54:40,141 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:40,142 INFO L450 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-07-24 10:54:40,142 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-07-24 10:54:40,142 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=439, Unknown=0, NotChecked=0, Total=702 [2018-07-24 10:54:40,143 INFO L87 Difference]: Start difference. First operand 91 states and 101 transitions. Second operand 21 states. [2018-07-24 10:54:40,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:40,400 INFO L93 Difference]: Finished difference Result 188 states and 210 transitions. [2018-07-24 10:54:40,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-07-24 10:54:40,401 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 54 [2018-07-24 10:54:40,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:40,404 INFO L225 Difference]: With dead ends: 188 [2018-07-24 10:54:40,404 INFO L226 Difference]: Without dead ends: 174 [2018-07-24 10:54:40,405 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 232 GetRequests, 206 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=269, Invalid=487, Unknown=0, NotChecked=0, Total=756 [2018-07-24 10:54:40,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-07-24 10:54:40,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 122. [2018-07-24 10:54:40,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-07-24 10:54:40,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 136 transitions. [2018-07-24 10:54:40,413 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 136 transitions. Word has length 54 [2018-07-24 10:54:40,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:40,413 INFO L471 AbstractCegarLoop]: Abstraction has 122 states and 136 transitions. [2018-07-24 10:54:40,413 INFO L472 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-07-24 10:54:40,414 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 136 transitions. [2018-07-24 10:54:40,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-07-24 10:54:40,415 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:40,415 INFO L353 BasicCegarLoop]: trace histogram [14, 14, 13, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:40,415 INFO L414 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:40,415 INFO L82 PathProgramCache]: Analyzing trace with hash 1732418355, now seen corresponding path program 7 times [2018-07-24 10:54:40,416 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:40,416 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:40,416 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:54:40,417 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:40,417 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:40,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:40,779 INFO L134 CoverageAnalysis]: Checked inductivity of 303 backedges. 0 proven. 303 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:40,780 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:40,780 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:40,789 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:40,789 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:54:40,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:40,813 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:40,828 INFO L134 CoverageAnalysis]: Checked inductivity of 303 backedges. 0 proven. 303 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:40,828 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:41,712 INFO L134 CoverageAnalysis]: Checked inductivity of 303 backedges. 0 proven. 303 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:41,733 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:41,734 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:41,749 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:41,749 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:54:41,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:41,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:41,820 INFO L134 CoverageAnalysis]: Checked inductivity of 303 backedges. 0 proven. 303 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:41,821 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:41,869 INFO L134 CoverageAnalysis]: Checked inductivity of 303 backedges. 0 proven. 303 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:41,872 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:41,872 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 42 [2018-07-24 10:54:41,872 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:41,872 INFO L450 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-07-24 10:54:41,873 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-07-24 10:54:41,873 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=713, Invalid=1009, Unknown=0, NotChecked=0, Total=1722 [2018-07-24 10:54:41,874 INFO L87 Difference]: Start difference. First operand 122 states and 136 transitions. Second operand 22 states. [2018-07-24 10:54:42,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:42,140 INFO L93 Difference]: Finished difference Result 193 states and 212 transitions. [2018-07-24 10:54:42,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-07-24 10:54:42,140 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 69 [2018-07-24 10:54:42,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:42,141 INFO L225 Difference]: With dead ends: 193 [2018-07-24 10:54:42,142 INFO L226 Difference]: Without dead ends: 187 [2018-07-24 10:54:42,143 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 297 GetRequests, 256 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=719, Invalid=1087, Unknown=0, NotChecked=0, Total=1806 [2018-07-24 10:54:42,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-07-24 10:54:42,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 129. [2018-07-24 10:54:42,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-07-24 10:54:42,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 144 transitions. [2018-07-24 10:54:42,149 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 144 transitions. Word has length 69 [2018-07-24 10:54:42,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:42,150 INFO L471 AbstractCegarLoop]: Abstraction has 129 states and 144 transitions. [2018-07-24 10:54:42,150 INFO L472 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-07-24 10:54:42,150 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 144 transitions. [2018-07-24 10:54:42,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-07-24 10:54:42,152 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:42,152 INFO L353 BasicCegarLoop]: trace histogram [15, 15, 14, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:42,152 INFO L414 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:42,152 INFO L82 PathProgramCache]: Analyzing trace with hash 1957710356, now seen corresponding path program 8 times [2018-07-24 10:54:42,152 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:42,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:42,153 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:42,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:42,153 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:42,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:42,466 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:42,467 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:42,467 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:42,475 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:54:42,475 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:54:42,500 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:54:42,500 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:42,502 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:42,515 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:42,515 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:43,759 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:43,780 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:43,780 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:43,795 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:54:43,795 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:54:43,849 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:54:43,849 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:43,855 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:43,869 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:43,870 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:43,933 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:43,936 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:43,936 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 44 [2018-07-24 10:54:43,936 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:43,937 INFO L450 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-07-24 10:54:43,937 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-07-24 10:54:43,938 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=790, Invalid=1102, Unknown=0, NotChecked=0, Total=1892 [2018-07-24 10:54:43,938 INFO L87 Difference]: Start difference. First operand 129 states and 144 transitions. Second operand 23 states. [2018-07-24 10:54:44,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:44,180 INFO L93 Difference]: Finished difference Result 200 states and 220 transitions. [2018-07-24 10:54:44,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-07-24 10:54:44,181 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 72 [2018-07-24 10:54:44,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:44,183 INFO L225 Difference]: With dead ends: 200 [2018-07-24 10:54:44,183 INFO L226 Difference]: Without dead ends: 194 [2018-07-24 10:54:44,184 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 310 GetRequests, 267 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=796, Invalid=1184, Unknown=0, NotChecked=0, Total=1980 [2018-07-24 10:54:44,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-07-24 10:54:44,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 136. [2018-07-24 10:54:44,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-07-24 10:54:44,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 152 transitions. [2018-07-24 10:54:44,189 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 152 transitions. Word has length 72 [2018-07-24 10:54:44,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:44,190 INFO L471 AbstractCegarLoop]: Abstraction has 136 states and 152 transitions. [2018-07-24 10:54:44,190 INFO L472 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-07-24 10:54:44,190 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 152 transitions. [2018-07-24 10:54:44,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-07-24 10:54:44,192 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:44,192 INFO L353 BasicCegarLoop]: trace histogram [16, 16, 15, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:44,192 INFO L414 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:44,192 INFO L82 PathProgramCache]: Analyzing trace with hash 597828499, now seen corresponding path program 9 times [2018-07-24 10:54:44,192 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:44,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:44,193 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:54:44,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:44,194 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:44,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:44,626 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 390 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:44,627 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:44,627 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:44,635 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:54:44,635 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:54:44,654 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-07-24 10:54:44,655 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:44,658 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:45,009 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2018-07-24 10:54:45,009 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:45,236 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2018-07-24 10:54:45,256 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:45,257 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:45,275 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:54:45,275 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:54:45,320 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-07-24 10:54:45,320 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:45,323 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:45,330 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2018-07-24 10:54:45,331 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:45,356 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2018-07-24 10:54:45,358 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:45,358 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 9, 9, 9, 9] total 36 [2018-07-24 10:54:45,358 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:45,358 INFO L450 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-07-24 10:54:45,359 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-07-24 10:54:45,359 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=506, Invalid=754, Unknown=0, NotChecked=0, Total=1260 [2018-07-24 10:54:45,359 INFO L87 Difference]: Start difference. First operand 136 states and 152 transitions. Second operand 29 states. [2018-07-24 10:54:45,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:45,782 INFO L93 Difference]: Finished difference Result 270 states and 301 transitions. [2018-07-24 10:54:45,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-07-24 10:54:45,783 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 75 [2018-07-24 10:54:45,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:45,785 INFO L225 Difference]: With dead ends: 270 [2018-07-24 10:54:45,785 INFO L226 Difference]: Without dead ends: 254 [2018-07-24 10:54:45,787 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 288 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=512, Invalid=820, Unknown=0, NotChecked=0, Total=1332 [2018-07-24 10:54:45,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-07-24 10:54:45,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 174. [2018-07-24 10:54:45,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-07-24 10:54:45,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 195 transitions. [2018-07-24 10:54:45,792 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 195 transitions. Word has length 75 [2018-07-24 10:54:45,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:45,792 INFO L471 AbstractCegarLoop]: Abstraction has 174 states and 195 transitions. [2018-07-24 10:54:45,792 INFO L472 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-07-24 10:54:45,792 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 195 transitions. [2018-07-24 10:54:45,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-07-24 10:54:45,794 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:45,794 INFO L353 BasicCegarLoop]: trace histogram [21, 21, 20, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:45,794 INFO L414 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:45,795 INFO L82 PathProgramCache]: Analyzing trace with hash 1143150669, now seen corresponding path program 10 times [2018-07-24 10:54:45,795 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:45,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:45,796 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:54:45,796 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:45,796 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:45,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:46,922 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 0 proven. 675 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:46,923 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:46,923 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:46,930 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:54:46,930 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:54:46,970 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:54:46,971 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:46,973 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:46,991 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 0 proven. 675 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:46,991 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:47,852 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 0 proven. 675 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:47,872 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:47,872 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:47,887 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:54:47,887 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:54:47,955 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:54:47,955 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:47,960 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:47,975 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 0 proven. 675 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:47,975 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:47,995 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 0 proven. 675 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:47,996 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:47,996 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 58 [2018-07-24 10:54:47,996 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:47,997 INFO L450 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-07-24 10:54:47,997 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-07-24 10:54:47,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1441, Invalid=1865, Unknown=0, NotChecked=0, Total=3306 [2018-07-24 10:54:47,998 INFO L87 Difference]: Start difference. First operand 174 states and 195 transitions. Second operand 30 states. [2018-07-24 10:54:48,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:48,322 INFO L93 Difference]: Finished difference Result 267 states and 294 transitions. [2018-07-24 10:54:48,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-07-24 10:54:48,323 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 93 [2018-07-24 10:54:48,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:48,325 INFO L225 Difference]: With dead ends: 267 [2018-07-24 10:54:48,326 INFO L226 Difference]: Without dead ends: 261 [2018-07-24 10:54:48,327 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 401 GetRequests, 344 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 178 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1447, Invalid=1975, Unknown=0, NotChecked=0, Total=3422 [2018-07-24 10:54:48,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states. [2018-07-24 10:54:48,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 181. [2018-07-24 10:54:48,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-07-24 10:54:48,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 203 transitions. [2018-07-24 10:54:48,333 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 203 transitions. Word has length 93 [2018-07-24 10:54:48,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:48,333 INFO L471 AbstractCegarLoop]: Abstraction has 181 states and 203 transitions. [2018-07-24 10:54:48,333 INFO L472 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-07-24 10:54:48,333 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 203 transitions. [2018-07-24 10:54:48,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-07-24 10:54:48,335 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:48,335 INFO L353 BasicCegarLoop]: trace histogram [22, 22, 21, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:48,335 INFO L414 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:48,335 INFO L82 PathProgramCache]: Analyzing trace with hash 492467246, now seen corresponding path program 11 times [2018-07-24 10:54:48,335 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:48,336 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:48,336 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:54:48,336 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:48,336 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:48,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:49,346 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 0 proven. 738 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:49,346 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:49,347 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:49,354 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:54:49,355 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:54:49,397 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-07-24 10:54:49,397 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:49,400 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:49,418 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 0 proven. 738 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:49,418 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:50,542 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 0 proven. 738 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:50,562 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:50,562 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:50,587 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:54:50,588 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:54:50,779 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-07-24 10:54:50,779 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:50,784 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:50,802 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 0 proven. 738 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:50,802 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:50,842 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 0 proven. 738 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:50,843 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:50,844 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 60 [2018-07-24 10:54:50,844 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:50,844 INFO L450 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-07-24 10:54:50,844 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-07-24 10:54:50,845 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1550, Invalid=1990, Unknown=0, NotChecked=0, Total=3540 [2018-07-24 10:54:50,845 INFO L87 Difference]: Start difference. First operand 181 states and 203 transitions. Second operand 31 states. [2018-07-24 10:54:51,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:51,234 INFO L93 Difference]: Finished difference Result 274 states and 302 transitions. [2018-07-24 10:54:51,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-07-24 10:54:51,235 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 96 [2018-07-24 10:54:51,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:51,237 INFO L225 Difference]: With dead ends: 274 [2018-07-24 10:54:51,237 INFO L226 Difference]: Without dead ends: 268 [2018-07-24 10:54:51,239 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 414 GetRequests, 355 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 185 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1556, Invalid=2104, Unknown=0, NotChecked=0, Total=3660 [2018-07-24 10:54:51,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2018-07-24 10:54:51,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 188. [2018-07-24 10:54:51,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-07-24 10:54:51,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 211 transitions. [2018-07-24 10:54:51,244 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 211 transitions. Word has length 96 [2018-07-24 10:54:51,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:51,244 INFO L471 AbstractCegarLoop]: Abstraction has 188 states and 211 transitions. [2018-07-24 10:54:51,245 INFO L472 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-07-24 10:54:51,245 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 211 transitions. [2018-07-24 10:54:51,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-07-24 10:54:51,246 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:51,246 INFO L353 BasicCegarLoop]: trace histogram [23, 23, 22, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:51,246 INFO L414 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:51,247 INFO L82 PathProgramCache]: Analyzing trace with hash -829980499, now seen corresponding path program 12 times [2018-07-24 10:54:51,247 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:51,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:51,248 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:54:51,248 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:51,248 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:51,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:51,697 INFO L134 CoverageAnalysis]: Checked inductivity of 804 backedges. 0 proven. 804 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:51,697 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:51,697 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:51,704 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:54:51,705 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:54:51,734 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-07-24 10:54:51,734 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:51,737 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:51,943 INFO L134 CoverageAnalysis]: Checked inductivity of 804 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 759 trivial. 0 not checked. [2018-07-24 10:54:51,943 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:52,163 INFO L134 CoverageAnalysis]: Checked inductivity of 804 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 759 trivial. 0 not checked. [2018-07-24 10:54:52,183 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:52,183 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:52,199 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:54:52,199 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:54:52,302 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-07-24 10:54:52,302 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:52,306 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:52,316 INFO L134 CoverageAnalysis]: Checked inductivity of 804 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 759 trivial. 0 not checked. [2018-07-24 10:54:52,316 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:52,386 INFO L134 CoverageAnalysis]: Checked inductivity of 804 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 759 trivial. 0 not checked. [2018-07-24 10:54:52,389 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:52,389 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 10, 10, 10, 10] total 46 [2018-07-24 10:54:52,389 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:52,390 INFO L450 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-07-24 10:54:52,393 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-07-24 10:54:52,394 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=871, Invalid=1199, Unknown=0, NotChecked=0, Total=2070 [2018-07-24 10:54:52,394 INFO L87 Difference]: Start difference. First operand 188 states and 211 transitions. Second operand 38 states. [2018-07-24 10:54:52,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:52,882 INFO L93 Difference]: Finished difference Result 365 states and 406 transitions. [2018-07-24 10:54:52,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-07-24 10:54:52,883 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 99 [2018-07-24 10:54:52,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:52,885 INFO L225 Difference]: With dead ends: 365 [2018-07-24 10:54:52,886 INFO L226 Difference]: Without dead ends: 347 [2018-07-24 10:54:52,887 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 427 GetRequests, 382 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 138 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=877, Invalid=1285, Unknown=0, NotChecked=0, Total=2162 [2018-07-24 10:54:52,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-07-24 10:54:52,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 233. [2018-07-24 10:54:52,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-07-24 10:54:52,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 262 transitions. [2018-07-24 10:54:52,893 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 262 transitions. Word has length 99 [2018-07-24 10:54:52,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:52,893 INFO L471 AbstractCegarLoop]: Abstraction has 233 states and 262 transitions. [2018-07-24 10:54:52,894 INFO L472 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-07-24 10:54:52,894 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 262 transitions. [2018-07-24 10:54:52,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-07-24 10:54:52,895 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:52,895 INFO L353 BasicCegarLoop]: trace histogram [29, 29, 28, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:52,895 INFO L414 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:52,896 INFO L82 PathProgramCache]: Analyzing trace with hash -612030252, now seen corresponding path program 13 times [2018-07-24 10:54:52,896 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:52,896 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:52,897 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:54:52,897 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:52,897 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:52,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:53,863 INFO L134 CoverageAnalysis]: Checked inductivity of 1281 backedges. 0 proven. 1281 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:53,863 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:53,863 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:53,873 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:53,873 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:54:53,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:53,914 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:53,935 INFO L134 CoverageAnalysis]: Checked inductivity of 1281 backedges. 0 proven. 1281 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:53,936 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:56,623 INFO L134 CoverageAnalysis]: Checked inductivity of 1281 backedges. 0 proven. 1281 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:56,644 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:56,644 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:54:56,660 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:56,660 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:54:56,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:56,742 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:56,765 INFO L134 CoverageAnalysis]: Checked inductivity of 1281 backedges. 0 proven. 1281 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:56,765 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:54:56,793 INFO L134 CoverageAnalysis]: Checked inductivity of 1281 backedges. 0 proven. 1281 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:56,795 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:54:56,795 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 76 [2018-07-24 10:54:56,795 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:54:56,796 INFO L450 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-07-24 10:54:56,796 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-07-24 10:54:56,797 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2566, Invalid=3134, Unknown=0, NotChecked=0, Total=5700 [2018-07-24 10:54:56,797 INFO L87 Difference]: Start difference. First operand 233 states and 262 transitions. Second operand 39 states. [2018-07-24 10:54:57,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:54:57,365 INFO L93 Difference]: Finished difference Result 351 states and 387 transitions. [2018-07-24 10:54:57,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-07-24 10:54:57,366 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 120 [2018-07-24 10:54:57,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:54:57,367 INFO L225 Difference]: With dead ends: 351 [2018-07-24 10:54:57,367 INFO L226 Difference]: Without dead ends: 345 [2018-07-24 10:54:57,369 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 518 GetRequests, 443 SyntacticMatches, 0 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 241 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=2572, Invalid=3280, Unknown=0, NotChecked=0, Total=5852 [2018-07-24 10:54:57,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states. [2018-07-24 10:54:57,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 240. [2018-07-24 10:54:57,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240 states. [2018-07-24 10:54:57,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 270 transitions. [2018-07-24 10:54:57,375 INFO L78 Accepts]: Start accepts. Automaton has 240 states and 270 transitions. Word has length 120 [2018-07-24 10:54:57,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:54:57,375 INFO L471 AbstractCegarLoop]: Abstraction has 240 states and 270 transitions. [2018-07-24 10:54:57,375 INFO L472 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-07-24 10:54:57,375 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 270 transitions. [2018-07-24 10:54:57,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-07-24 10:54:57,376 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:54:57,377 INFO L353 BasicCegarLoop]: trace histogram [30, 30, 29, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:54:57,377 INFO L414 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:54:57,377 INFO L82 PathProgramCache]: Analyzing trace with hash -314283949, now seen corresponding path program 14 times [2018-07-24 10:54:57,377 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:54:57,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:57,378 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:54:57,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:54:57,378 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:54:57,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:54:59,225 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 0 proven. 1368 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:59,226 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:54:59,226 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:54:59,233 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:54:59,234 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:54:59,276 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:54:59,276 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:54:59,279 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:54:59,297 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 0 proven. 1368 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:54:59,297 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:00,818 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 0 proven. 1368 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:00,838 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:00,839 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:55:00,853 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:55:00,853 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:55:00,940 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:55:00,940 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:00,945 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:00,964 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 0 proven. 1368 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:00,964 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:01,010 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 0 proven. 1368 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:01,012 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:55:01,012 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 78 [2018-07-24 10:55:01,012 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:55:01,015 INFO L450 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-07-24 10:55:01,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-07-24 10:55:01,018 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2711, Invalid=3295, Unknown=0, NotChecked=0, Total=6006 [2018-07-24 10:55:01,018 INFO L87 Difference]: Start difference. First operand 240 states and 270 transitions. Second operand 40 states. [2018-07-24 10:55:01,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:55:01,545 INFO L93 Difference]: Finished difference Result 358 states and 395 transitions. [2018-07-24 10:55:01,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-07-24 10:55:01,546 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 123 [2018-07-24 10:55:01,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:55:01,549 INFO L225 Difference]: With dead ends: 358 [2018-07-24 10:55:01,549 INFO L226 Difference]: Without dead ends: 352 [2018-07-24 10:55:01,552 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 531 GetRequests, 454 SyntacticMatches, 0 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 248 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=2717, Invalid=3445, Unknown=0, NotChecked=0, Total=6162 [2018-07-24 10:55:01,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2018-07-24 10:55:01,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 247. [2018-07-24 10:55:01,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-07-24 10:55:01,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 278 transitions. [2018-07-24 10:55:01,559 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 278 transitions. Word has length 123 [2018-07-24 10:55:01,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:55:01,560 INFO L471 AbstractCegarLoop]: Abstraction has 247 states and 278 transitions. [2018-07-24 10:55:01,560 INFO L472 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-07-24 10:55:01,560 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 278 transitions. [2018-07-24 10:55:01,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-07-24 10:55:01,562 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:55:01,562 INFO L353 BasicCegarLoop]: trace histogram [31, 31, 30, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:55:01,562 INFO L414 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:55:01,562 INFO L82 PathProgramCache]: Analyzing trace with hash 738362484, now seen corresponding path program 15 times [2018-07-24 10:55:01,562 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:55:01,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:01,563 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:55:01,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:01,564 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:55:01,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:02,261 INFO L134 CoverageAnalysis]: Checked inductivity of 1458 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:02,261 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:02,262 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:55:02,271 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:55:02,271 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:55:02,294 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-07-24 10:55:02,294 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:02,296 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:02,576 INFO L134 CoverageAnalysis]: Checked inductivity of 1458 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 1395 trivial. 0 not checked. [2018-07-24 10:55:02,576 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:02,885 INFO L134 CoverageAnalysis]: Checked inductivity of 1458 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 1395 trivial. 0 not checked. [2018-07-24 10:55:02,905 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:02,905 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:55:02,925 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:55:02,925 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:55:02,996 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-07-24 10:55:02,996 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:02,999 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:03,011 INFO L134 CoverageAnalysis]: Checked inductivity of 1458 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 1395 trivial. 0 not checked. [2018-07-24 10:55:03,011 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:03,034 INFO L134 CoverageAnalysis]: Checked inductivity of 1458 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 1395 trivial. 0 not checked. [2018-07-24 10:55:03,035 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:55:03,036 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 11, 11, 11, 11] total 57 [2018-07-24 10:55:03,036 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:55:03,036 INFO L450 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-07-24 10:55:03,037 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-07-24 10:55:03,038 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1388, Invalid=1804, Unknown=0, NotChecked=0, Total=3192 [2018-07-24 10:55:03,038 INFO L87 Difference]: Start difference. First operand 247 states and 278 transitions. Second operand 48 states. [2018-07-24 10:55:04,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:55:04,826 INFO L93 Difference]: Finished difference Result 473 states and 525 transitions. [2018-07-24 10:55:04,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-07-24 10:55:04,826 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 126 [2018-07-24 10:55:04,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:55:04,830 INFO L225 Difference]: With dead ends: 473 [2018-07-24 10:55:04,830 INFO L226 Difference]: Without dead ends: 453 [2018-07-24 10:55:04,831 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 544 GetRequests, 488 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 179 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1394, Invalid=1912, Unknown=0, NotChecked=0, Total=3306 [2018-07-24 10:55:04,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 453 states. [2018-07-24 10:55:04,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 453 to 299. [2018-07-24 10:55:04,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 299 states. [2018-07-24 10:55:04,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 337 transitions. [2018-07-24 10:55:04,838 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 337 transitions. Word has length 126 [2018-07-24 10:55:04,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:55:04,838 INFO L471 AbstractCegarLoop]: Abstraction has 299 states and 337 transitions. [2018-07-24 10:55:04,839 INFO L472 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-07-24 10:55:04,839 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 337 transitions. [2018-07-24 10:55:04,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2018-07-24 10:55:04,840 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:55:04,840 INFO L353 BasicCegarLoop]: trace histogram [38, 38, 37, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:55:04,841 INFO L414 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:55:04,841 INFO L82 PathProgramCache]: Analyzing trace with hash -1973406962, now seen corresponding path program 16 times [2018-07-24 10:55:04,841 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:55:04,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:04,842 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:55:04,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:04,842 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:55:04,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:06,020 INFO L134 CoverageAnalysis]: Checked inductivity of 2193 backedges. 0 proven. 2193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:06,020 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:06,020 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:55:06,029 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:55:06,029 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:55:06,076 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:55:06,076 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:06,079 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:06,112 INFO L134 CoverageAnalysis]: Checked inductivity of 2193 backedges. 0 proven. 2193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:06,112 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:08,461 INFO L134 CoverageAnalysis]: Checked inductivity of 2193 backedges. 0 proven. 2193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:08,482 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:08,482 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:55:08,497 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:55:08,497 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:55:08,600 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:55:08,600 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:08,607 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:08,638 INFO L134 CoverageAnalysis]: Checked inductivity of 2193 backedges. 0 proven. 2193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:08,639 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:08,722 INFO L134 CoverageAnalysis]: Checked inductivity of 2193 backedges. 0 proven. 2193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:08,725 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:55:08,725 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49, 49, 49] total 96 [2018-07-24 10:55:08,725 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:55:08,726 INFO L450 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-07-24 10:55:08,727 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-07-24 10:55:08,727 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4196, Invalid=4924, Unknown=0, NotChecked=0, Total=9120 [2018-07-24 10:55:08,728 INFO L87 Difference]: Start difference. First operand 299 states and 337 transitions. Second operand 49 states. [2018-07-24 10:55:09,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:55:09,504 INFO L93 Difference]: Finished difference Result 445 states and 491 transitions. [2018-07-24 10:55:09,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-07-24 10:55:09,505 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 150 [2018-07-24 10:55:09,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:55:09,508 INFO L225 Difference]: With dead ends: 445 [2018-07-24 10:55:09,508 INFO L226 Difference]: Without dead ends: 439 [2018-07-24 10:55:09,510 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 648 GetRequests, 553 SyntacticMatches, 0 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 311 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=4202, Invalid=5110, Unknown=0, NotChecked=0, Total=9312 [2018-07-24 10:55:09,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states. [2018-07-24 10:55:09,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 306. [2018-07-24 10:55:09,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 306 states. [2018-07-24 10:55:09,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 306 states to 306 states and 345 transitions. [2018-07-24 10:55:09,516 INFO L78 Accepts]: Start accepts. Automaton has 306 states and 345 transitions. Word has length 150 [2018-07-24 10:55:09,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:55:09,516 INFO L471 AbstractCegarLoop]: Abstraction has 306 states and 345 transitions. [2018-07-24 10:55:09,516 INFO L472 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-07-24 10:55:09,516 INFO L276 IsEmpty]: Start isEmpty. Operand 306 states and 345 transitions. [2018-07-24 10:55:09,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2018-07-24 10:55:09,518 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:55:09,518 INFO L353 BasicCegarLoop]: trace histogram [39, 39, 38, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:55:09,518 INFO L414 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:55:09,519 INFO L82 PathProgramCache]: Analyzing trace with hash -324892083, now seen corresponding path program 17 times [2018-07-24 10:55:09,519 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:55:09,519 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:09,520 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:55:09,520 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:09,520 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:55:09,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:10,501 INFO L134 CoverageAnalysis]: Checked inductivity of 2307 backedges. 0 proven. 2307 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:10,501 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:10,501 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:55:10,508 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:55:10,509 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:55:10,593 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 39 check-sat command(s) [2018-07-24 10:55:10,593 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:10,597 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:10,631 INFO L134 CoverageAnalysis]: Checked inductivity of 2307 backedges. 0 proven. 2307 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:10,631 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:13,568 INFO L134 CoverageAnalysis]: Checked inductivity of 2307 backedges. 0 proven. 2307 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:13,589 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:13,589 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:55:13,606 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:55:13,607 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:55:14,069 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 39 check-sat command(s) [2018-07-24 10:55:14,069 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:14,075 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:14,107 INFO L134 CoverageAnalysis]: Checked inductivity of 2307 backedges. 0 proven. 2307 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:14,108 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:14,185 INFO L134 CoverageAnalysis]: Checked inductivity of 2307 backedges. 0 proven. 2307 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:14,187 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:55:14,187 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 98 [2018-07-24 10:55:14,187 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:55:14,188 INFO L450 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-07-24 10:55:14,189 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-07-24 10:55:14,189 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4381, Invalid=5125, Unknown=0, NotChecked=0, Total=9506 [2018-07-24 10:55:14,190 INFO L87 Difference]: Start difference. First operand 306 states and 345 transitions. Second operand 50 states. [2018-07-24 10:55:14,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:55:14,847 INFO L93 Difference]: Finished difference Result 452 states and 499 transitions. [2018-07-24 10:55:14,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-07-24 10:55:14,847 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 153 [2018-07-24 10:55:14,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:55:14,850 INFO L225 Difference]: With dead ends: 452 [2018-07-24 10:55:14,850 INFO L226 Difference]: Without dead ends: 446 [2018-07-24 10:55:14,852 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 661 GetRequests, 564 SyntacticMatches, 0 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 318 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=4387, Invalid=5315, Unknown=0, NotChecked=0, Total=9702 [2018-07-24 10:55:14,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 446 states. [2018-07-24 10:55:14,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 446 to 313. [2018-07-24 10:55:14,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 313 states. [2018-07-24 10:55:14,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 313 states to 313 states and 353 transitions. [2018-07-24 10:55:14,858 INFO L78 Accepts]: Start accepts. Automaton has 313 states and 353 transitions. Word has length 153 [2018-07-24 10:55:14,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:55:14,859 INFO L471 AbstractCegarLoop]: Abstraction has 313 states and 353 transitions. [2018-07-24 10:55:14,859 INFO L472 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-07-24 10:55:14,859 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 353 transitions. [2018-07-24 10:55:14,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2018-07-24 10:55:14,861 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:55:14,861 INFO L353 BasicCegarLoop]: trace histogram [40, 40, 39, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:55:14,861 INFO L414 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:55:14,861 INFO L82 PathProgramCache]: Analyzing trace with hash 1925805742, now seen corresponding path program 18 times [2018-07-24 10:55:14,861 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:55:14,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:14,862 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:55:14,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:14,862 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:55:14,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:16,153 INFO L134 CoverageAnalysis]: Checked inductivity of 2424 backedges. 0 proven. 2424 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:16,154 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:16,154 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:55:16,161 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:55:16,161 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:55:16,198 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-07-24 10:55:16,199 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:16,201 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:16,524 INFO L134 CoverageAnalysis]: Checked inductivity of 2424 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 2340 trivial. 0 not checked. [2018-07-24 10:55:16,524 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:16,940 INFO L134 CoverageAnalysis]: Checked inductivity of 2424 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 2340 trivial. 0 not checked. [2018-07-24 10:55:16,960 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:16,960 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:55:16,976 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:55:16,976 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:55:17,132 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-07-24 10:55:17,133 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:17,137 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:17,154 INFO L134 CoverageAnalysis]: Checked inductivity of 2424 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 2340 trivial. 0 not checked. [2018-07-24 10:55:17,155 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:17,221 INFO L134 CoverageAnalysis]: Checked inductivity of 2424 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 2340 trivial. 0 not checked. [2018-07-24 10:55:17,222 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:55:17,223 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 12, 12, 12, 12] total 69 [2018-07-24 10:55:17,223 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:55:17,223 INFO L450 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-07-24 10:55:17,224 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-07-24 10:55:17,224 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2090, Invalid=2602, Unknown=0, NotChecked=0, Total=4692 [2018-07-24 10:55:17,224 INFO L87 Difference]: Start difference. First operand 313 states and 353 transitions. Second operand 59 states. [2018-07-24 10:55:18,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:55:18,295 INFO L93 Difference]: Finished difference Result 594 states and 658 transitions. [2018-07-24 10:55:18,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-07-24 10:55:18,298 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 156 [2018-07-24 10:55:18,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:55:18,301 INFO L225 Difference]: With dead ends: 594 [2018-07-24 10:55:18,301 INFO L226 Difference]: Without dead ends: 572 [2018-07-24 10:55:18,302 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 674 GetRequests, 606 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 224 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=2096, Invalid=2734, Unknown=0, NotChecked=0, Total=4830 [2018-07-24 10:55:18,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2018-07-24 10:55:18,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 372. [2018-07-24 10:55:18,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 372 states. [2018-07-24 10:55:18,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 420 transitions. [2018-07-24 10:55:18,310 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 420 transitions. Word has length 156 [2018-07-24 10:55:18,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:55:18,310 INFO L471 AbstractCegarLoop]: Abstraction has 372 states and 420 transitions. [2018-07-24 10:55:18,310 INFO L472 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-07-24 10:55:18,310 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 420 transitions. [2018-07-24 10:55:18,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2018-07-24 10:55:18,313 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:55:18,313 INFO L353 BasicCegarLoop]: trace histogram [48, 48, 47, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:55:18,313 INFO L414 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:55:18,313 INFO L82 PathProgramCache]: Analyzing trace with hash -252635693, now seen corresponding path program 19 times [2018-07-24 10:55:18,313 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:55:18,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:18,314 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:55:18,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:18,314 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:55:18,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:19,859 INFO L134 CoverageAnalysis]: Checked inductivity of 3492 backedges. 0 proven. 3492 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:19,860 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:19,860 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:55:19,867 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:55:19,867 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:55:19,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:19,924 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:19,968 INFO L134 CoverageAnalysis]: Checked inductivity of 3492 backedges. 0 proven. 3492 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:19,968 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:24,949 INFO L134 CoverageAnalysis]: Checked inductivity of 3492 backedges. 0 proven. 3492 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:24,969 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:24,969 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:55:24,984 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:55:24,984 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:55:25,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:25,101 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:25,141 INFO L134 CoverageAnalysis]: Checked inductivity of 3492 backedges. 0 proven. 3492 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:25,141 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:25,236 INFO L134 CoverageAnalysis]: Checked inductivity of 3492 backedges. 0 proven. 3492 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:25,238 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:55:25,238 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 60, 60, 60, 60] total 118 [2018-07-24 10:55:25,238 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:55:25,239 INFO L450 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-07-24 10:55:25,240 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-07-24 10:55:25,241 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6451, Invalid=7355, Unknown=0, NotChecked=0, Total=13806 [2018-07-24 10:55:25,241 INFO L87 Difference]: Start difference. First operand 372 states and 420 transitions. Second operand 60 states. [2018-07-24 10:55:26,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:55:26,238 INFO L93 Difference]: Finished difference Result 549 states and 606 transitions. [2018-07-24 10:55:26,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-07-24 10:55:26,239 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 183 [2018-07-24 10:55:26,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:55:26,243 INFO L225 Difference]: With dead ends: 549 [2018-07-24 10:55:26,243 INFO L226 Difference]: Without dead ends: 543 [2018-07-24 10:55:26,244 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 791 GetRequests, 674 SyntacticMatches, 0 SemanticMatches, 117 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 388 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=6457, Invalid=7585, Unknown=0, NotChecked=0, Total=14042 [2018-07-24 10:55:26,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states. [2018-07-24 10:55:26,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 379. [2018-07-24 10:55:26,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 379 states. [2018-07-24 10:55:26,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 379 states to 379 states and 428 transitions. [2018-07-24 10:55:26,252 INFO L78 Accepts]: Start accepts. Automaton has 379 states and 428 transitions. Word has length 183 [2018-07-24 10:55:26,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:55:26,252 INFO L471 AbstractCegarLoop]: Abstraction has 379 states and 428 transitions. [2018-07-24 10:55:26,252 INFO L472 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-07-24 10:55:26,253 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 428 transitions. [2018-07-24 10:55:26,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2018-07-24 10:55:26,254 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:55:26,254 INFO L353 BasicCegarLoop]: trace histogram [49, 49, 48, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:55:26,254 INFO L414 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:55:26,254 INFO L82 PathProgramCache]: Analyzing trace with hash 895935092, now seen corresponding path program 20 times [2018-07-24 10:55:26,255 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:55:26,255 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:26,255 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:55:26,255 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:26,256 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:55:26,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:27,556 INFO L134 CoverageAnalysis]: Checked inductivity of 3636 backedges. 0 proven. 3636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:27,556 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:27,557 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:55:27,564 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:55:27,564 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:55:27,627 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:55:27,627 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:27,630 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:27,663 INFO L134 CoverageAnalysis]: Checked inductivity of 3636 backedges. 0 proven. 3636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:27,663 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:31,851 INFO L134 CoverageAnalysis]: Checked inductivity of 3636 backedges. 0 proven. 3636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:31,881 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:31,882 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:55:31,910 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:55:31,910 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:55:32,027 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:55:32,027 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:32,034 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:32,061 INFO L134 CoverageAnalysis]: Checked inductivity of 3636 backedges. 0 proven. 3636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:32,061 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:32,100 INFO L134 CoverageAnalysis]: Checked inductivity of 3636 backedges. 0 proven. 3636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:32,102 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:55:32,102 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61, 61, 61, 61] total 120 [2018-07-24 10:55:32,102 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:55:32,103 INFO L450 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-07-24 10:55:32,103 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-07-24 10:55:32,105 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6680, Invalid=7600, Unknown=0, NotChecked=0, Total=14280 [2018-07-24 10:55:32,105 INFO L87 Difference]: Start difference. First operand 379 states and 428 transitions. Second operand 61 states. [2018-07-24 10:55:34,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:55:34,116 INFO L93 Difference]: Finished difference Result 556 states and 614 transitions. [2018-07-24 10:55:34,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-07-24 10:55:34,116 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 186 [2018-07-24 10:55:34,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:55:34,119 INFO L225 Difference]: With dead ends: 556 [2018-07-24 10:55:34,120 INFO L226 Difference]: Without dead ends: 550 [2018-07-24 10:55:34,122 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 804 GetRequests, 685 SyntacticMatches, 0 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 395 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=6686, Invalid=7834, Unknown=0, NotChecked=0, Total=14520 [2018-07-24 10:55:34,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 550 states. [2018-07-24 10:55:34,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 550 to 386. [2018-07-24 10:55:34,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 386 states. [2018-07-24 10:55:34,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 386 states and 436 transitions. [2018-07-24 10:55:34,129 INFO L78 Accepts]: Start accepts. Automaton has 386 states and 436 transitions. Word has length 186 [2018-07-24 10:55:34,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:55:34,130 INFO L471 AbstractCegarLoop]: Abstraction has 386 states and 436 transitions. [2018-07-24 10:55:34,130 INFO L472 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-07-24 10:55:34,130 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 436 transitions. [2018-07-24 10:55:34,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2018-07-24 10:55:34,131 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:55:34,131 INFO L353 BasicCegarLoop]: trace histogram [50, 50, 49, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:55:34,132 INFO L414 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:55:34,132 INFO L82 PathProgramCache]: Analyzing trace with hash -36256205, now seen corresponding path program 21 times [2018-07-24 10:55:34,132 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:55:34,133 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:34,133 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:55:34,133 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:34,133 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:55:34,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:35,883 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 3783 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:35,883 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:35,883 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:55:35,892 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:55:35,892 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:55:36,039 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-07-24 10:55:36,040 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:36,043 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:36,898 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-07-24 10:55:36,898 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:37,503 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-07-24 10:55:37,523 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:37,523 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:55:37,538 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:55:37,539 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:55:37,637 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-07-24 10:55:37,637 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:37,641 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:37,664 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-07-24 10:55:37,665 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:37,724 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-07-24 10:55:37,725 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:55:37,725 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 13, 13, 13, 13] total 82 [2018-07-24 10:55:37,725 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:55:37,726 INFO L450 AbstractCegarLoop]: Interpolant automaton has 71 states [2018-07-24 10:55:37,727 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2018-07-24 10:55:37,727 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3013, Invalid=3629, Unknown=0, NotChecked=0, Total=6642 [2018-07-24 10:55:37,727 INFO L87 Difference]: Start difference. First operand 386 states and 436 transitions. Second operand 71 states. [2018-07-24 10:55:39,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:55:39,659 INFO L93 Difference]: Finished difference Result 728 states and 805 transitions. [2018-07-24 10:55:39,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-07-24 10:55:39,660 INFO L78 Accepts]: Start accepts. Automaton has 71 states. Word has length 189 [2018-07-24 10:55:39,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:55:39,662 INFO L225 Difference]: With dead ends: 728 [2018-07-24 10:55:39,662 INFO L226 Difference]: Without dead ends: 704 [2018-07-24 10:55:39,663 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 817 GetRequests, 736 SyntacticMatches, 0 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 273 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=3019, Invalid=3787, Unknown=0, NotChecked=0, Total=6806 [2018-07-24 10:55:39,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 704 states. [2018-07-24 10:55:39,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 704 to 452. [2018-07-24 10:55:39,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 452 states. [2018-07-24 10:55:39,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 452 states to 452 states and 511 transitions. [2018-07-24 10:55:39,673 INFO L78 Accepts]: Start accepts. Automaton has 452 states and 511 transitions. Word has length 189 [2018-07-24 10:55:39,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:55:39,674 INFO L471 AbstractCegarLoop]: Abstraction has 452 states and 511 transitions. [2018-07-24 10:55:39,674 INFO L472 AbstractCegarLoop]: Interpolant automaton has 71 states. [2018-07-24 10:55:39,674 INFO L276 IsEmpty]: Start isEmpty. Operand 452 states and 511 transitions. [2018-07-24 10:55:39,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2018-07-24 10:55:39,676 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:55:39,676 INFO L353 BasicCegarLoop]: trace histogram [59, 59, 58, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:55:39,676 INFO L414 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:55:39,676 INFO L82 PathProgramCache]: Analyzing trace with hash -518064979, now seen corresponding path program 22 times [2018-07-24 10:55:39,677 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:55:39,677 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:39,677 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:55:39,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:39,678 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:55:39,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:41,801 INFO L134 CoverageAnalysis]: Checked inductivity of 5268 backedges. 0 proven. 5268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:41,802 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:41,802 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:55:41,809 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:55:41,809 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:55:41,877 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:55:41,878 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:41,881 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:41,929 INFO L134 CoverageAnalysis]: Checked inductivity of 5268 backedges. 0 proven. 5268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:41,930 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:47,137 INFO L134 CoverageAnalysis]: Checked inductivity of 5268 backedges. 0 proven. 5268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:47,157 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:47,157 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:55:47,172 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:55:47,173 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:55:47,337 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:55:47,337 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:47,347 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:47,408 INFO L134 CoverageAnalysis]: Checked inductivity of 5268 backedges. 0 proven. 5268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:47,409 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:47,517 INFO L134 CoverageAnalysis]: Checked inductivity of 5268 backedges. 0 proven. 5268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:47,522 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:55:47,522 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [72, 72, 72, 72, 72] total 142 [2018-07-24 10:55:47,522 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:55:47,523 INFO L450 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-07-24 10:55:47,524 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-07-24 10:55:47,525 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9463, Invalid=10559, Unknown=0, NotChecked=0, Total=20022 [2018-07-24 10:55:47,525 INFO L87 Difference]: Start difference. First operand 452 states and 511 transitions. Second operand 72 states. [2018-07-24 10:55:49,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:55:49,297 INFO L93 Difference]: Finished difference Result 663 states and 732 transitions. [2018-07-24 10:55:49,297 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2018-07-24 10:55:49,297 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 219 [2018-07-24 10:55:49,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:55:49,302 INFO L225 Difference]: With dead ends: 663 [2018-07-24 10:55:49,302 INFO L226 Difference]: Without dead ends: 657 [2018-07-24 10:55:49,303 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 947 GetRequests, 806 SyntacticMatches, 0 SemanticMatches, 141 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 472 ImplicationChecksByTransitivity, 7.1s TimeCoverageRelationStatistics Valid=9469, Invalid=10837, Unknown=0, NotChecked=0, Total=20306 [2018-07-24 10:55:49,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 657 states. [2018-07-24 10:55:49,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 657 to 459. [2018-07-24 10:55:49,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 459 states. [2018-07-24 10:55:49,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 459 states to 459 states and 519 transitions. [2018-07-24 10:55:49,311 INFO L78 Accepts]: Start accepts. Automaton has 459 states and 519 transitions. Word has length 219 [2018-07-24 10:55:49,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:55:49,311 INFO L471 AbstractCegarLoop]: Abstraction has 459 states and 519 transitions. [2018-07-24 10:55:49,311 INFO L472 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-07-24 10:55:49,312 INFO L276 IsEmpty]: Start isEmpty. Operand 459 states and 519 transitions. [2018-07-24 10:55:49,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2018-07-24 10:55:49,313 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:55:49,313 INFO L353 BasicCegarLoop]: trace histogram [60, 60, 59, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:55:49,314 INFO L414 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:55:49,314 INFO L82 PathProgramCache]: Analyzing trace with hash -399850290, now seen corresponding path program 23 times [2018-07-24 10:55:49,314 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:55:49,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:49,315 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:55:49,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:55:49,315 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:55:49,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:55:51,808 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 0 proven. 5445 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:51,808 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:51,808 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:55:51,816 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:55:51,816 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:55:51,940 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 60 check-sat command(s) [2018-07-24 10:55:51,940 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:51,944 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:51,994 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 0 proven. 5445 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:51,994 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:57,483 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 0 proven. 5445 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:57,503 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:55:57,504 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:55:57,519 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:55:57,519 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:55:58,466 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 60 check-sat command(s) [2018-07-24 10:55:58,467 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:55:58,475 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:55:58,531 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 0 proven. 5445 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:58,531 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:55:58,625 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 0 proven. 5445 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:55:58,626 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:55:58,627 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [73, 73, 73, 73, 73] total 144 [2018-07-24 10:55:58,627 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:55:58,627 INFO L450 AbstractCegarLoop]: Interpolant automaton has 73 states [2018-07-24 10:55:58,628 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2018-07-24 10:55:58,629 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9740, Invalid=10852, Unknown=0, NotChecked=0, Total=20592 [2018-07-24 10:55:58,629 INFO L87 Difference]: Start difference. First operand 459 states and 519 transitions. Second operand 73 states. [2018-07-24 10:56:00,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:56:00,645 INFO L93 Difference]: Finished difference Result 670 states and 740 transitions. [2018-07-24 10:56:00,646 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2018-07-24 10:56:00,646 INFO L78 Accepts]: Start accepts. Automaton has 73 states. Word has length 222 [2018-07-24 10:56:00,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:56:00,650 INFO L225 Difference]: With dead ends: 670 [2018-07-24 10:56:00,650 INFO L226 Difference]: Without dead ends: 664 [2018-07-24 10:56:00,650 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 960 GetRequests, 817 SyntacticMatches, 0 SemanticMatches, 143 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 479 ImplicationChecksByTransitivity, 7.8s TimeCoverageRelationStatistics Valid=9746, Invalid=11134, Unknown=0, NotChecked=0, Total=20880 [2018-07-24 10:56:00,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 664 states. [2018-07-24 10:56:00,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 664 to 466. [2018-07-24 10:56:00,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 466 states. [2018-07-24 10:56:00,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 466 states to 466 states and 527 transitions. [2018-07-24 10:56:00,658 INFO L78 Accepts]: Start accepts. Automaton has 466 states and 527 transitions. Word has length 222 [2018-07-24 10:56:00,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:56:00,658 INFO L471 AbstractCegarLoop]: Abstraction has 466 states and 527 transitions. [2018-07-24 10:56:00,658 INFO L472 AbstractCegarLoop]: Interpolant automaton has 73 states. [2018-07-24 10:56:00,658 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 527 transitions. [2018-07-24 10:56:00,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2018-07-24 10:56:00,660 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:56:00,660 INFO L353 BasicCegarLoop]: trace histogram [61, 61, 60, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:56:00,660 INFO L414 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:56:00,660 INFO L82 PathProgramCache]: Analyzing trace with hash -539233011, now seen corresponding path program 24 times [2018-07-24 10:56:00,661 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:56:00,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:56:00,661 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:56:00,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:56:00,662 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:56:00,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:56:02,798 INFO L134 CoverageAnalysis]: Checked inductivity of 5625 backedges. 0 proven. 5625 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:02,799 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:56:02,799 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:56:02,806 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:56:02,806 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:56:02,854 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-07-24 10:56:02,854 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:56:02,857 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:56:03,438 INFO L134 CoverageAnalysis]: Checked inductivity of 5625 backedges. 0 proven. 135 refuted. 0 times theorem prover too weak. 5490 trivial. 0 not checked. [2018-07-24 10:56:03,438 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:56:04,146 INFO L134 CoverageAnalysis]: Checked inductivity of 5625 backedges. 0 proven. 135 refuted. 0 times theorem prover too weak. 5490 trivial. 0 not checked. [2018-07-24 10:56:04,176 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:56:04,176 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:56:04,204 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:56:04,204 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:56:04,429 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-07-24 10:56:04,430 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:56:04,434 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:56:04,465 INFO L134 CoverageAnalysis]: Checked inductivity of 5625 backedges. 0 proven. 135 refuted. 0 times theorem prover too weak. 5490 trivial. 0 not checked. [2018-07-24 10:56:04,465 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:56:04,556 INFO L134 CoverageAnalysis]: Checked inductivity of 5625 backedges. 0 proven. 135 refuted. 0 times theorem prover too weak. 5490 trivial. 0 not checked. [2018-07-24 10:56:04,558 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:56:04,559 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [74, 14, 14, 14, 14] total 96 [2018-07-24 10:56:04,559 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:56:04,559 INFO L450 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-07-24 10:56:04,560 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-07-24 10:56:04,561 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4196, Invalid=4924, Unknown=0, NotChecked=0, Total=9120 [2018-07-24 10:56:04,561 INFO L87 Difference]: Start difference. First operand 466 states and 527 transitions. Second operand 84 states. [2018-07-24 10:56:07,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:56:07,826 INFO L93 Difference]: Finished difference Result 875 states and 966 transitions. [2018-07-24 10:56:07,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2018-07-24 10:56:07,826 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 225 [2018-07-24 10:56:07,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:56:07,831 INFO L225 Difference]: With dead ends: 875 [2018-07-24 10:56:07,831 INFO L226 Difference]: Without dead ends: 849 [2018-07-24 10:56:07,832 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 973 GetRequests, 878 SyntacticMatches, 0 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 326 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=4202, Invalid=5110, Unknown=0, NotChecked=0, Total=9312 [2018-07-24 10:56:07,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 849 states. [2018-07-24 10:56:07,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 849 to 539. [2018-07-24 10:56:07,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 539 states. [2018-07-24 10:56:07,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 539 states to 539 states and 610 transitions. [2018-07-24 10:56:07,842 INFO L78 Accepts]: Start accepts. Automaton has 539 states and 610 transitions. Word has length 225 [2018-07-24 10:56:07,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:56:07,842 INFO L471 AbstractCegarLoop]: Abstraction has 539 states and 610 transitions. [2018-07-24 10:56:07,842 INFO L472 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-07-24 10:56:07,842 INFO L276 IsEmpty]: Start isEmpty. Operand 539 states and 610 transitions. [2018-07-24 10:56:07,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 259 [2018-07-24 10:56:07,844 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:56:07,845 INFO L353 BasicCegarLoop]: trace histogram [71, 71, 70, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:56:07,845 INFO L414 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:56:07,845 INFO L82 PathProgramCache]: Analyzing trace with hash 412573620, now seen corresponding path program 25 times [2018-07-24 10:56:07,845 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:56:07,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:56:07,846 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:56:07,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:56:07,846 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:56:07,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:56:10,726 INFO L134 CoverageAnalysis]: Checked inductivity of 7620 backedges. 0 proven. 7620 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:10,726 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:56:10,726 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:56:10,734 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:56:10,734 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:56:10,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:56:10,818 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:56:10,883 INFO L134 CoverageAnalysis]: Checked inductivity of 7620 backedges. 0 proven. 7620 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:10,884 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:56:18,125 INFO L134 CoverageAnalysis]: Checked inductivity of 7620 backedges. 0 proven. 7620 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:18,145 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:56:18,145 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:56:18,161 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:56:18,161 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:56:18,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:56:18,342 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:56:18,413 INFO L134 CoverageAnalysis]: Checked inductivity of 7620 backedges. 0 proven. 7620 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:18,413 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:56:18,532 INFO L134 CoverageAnalysis]: Checked inductivity of 7620 backedges. 0 proven. 7620 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:18,534 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:56:18,534 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [85, 85, 85, 85, 85] total 168 [2018-07-24 10:56:18,535 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:56:18,535 INFO L450 AbstractCegarLoop]: Interpolant automaton has 85 states [2018-07-24 10:56:18,536 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 85 interpolants. [2018-07-24 10:56:18,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13376, Invalid=14680, Unknown=0, NotChecked=0, Total=28056 [2018-07-24 10:56:18,537 INFO L87 Difference]: Start difference. First operand 539 states and 610 transitions. Second operand 85 states. [2018-07-24 10:56:21,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:56:21,848 INFO L93 Difference]: Finished difference Result 787 states and 869 transitions. [2018-07-24 10:56:21,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2018-07-24 10:56:21,849 INFO L78 Accepts]: Start accepts. Automaton has 85 states. Word has length 258 [2018-07-24 10:56:21,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:56:21,854 INFO L225 Difference]: With dead ends: 787 [2018-07-24 10:56:21,854 INFO L226 Difference]: Without dead ends: 781 [2018-07-24 10:56:21,855 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 1116 GetRequests, 949 SyntacticMatches, 0 SemanticMatches, 167 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 563 ImplicationChecksByTransitivity, 9.9s TimeCoverageRelationStatistics Valid=13382, Invalid=15010, Unknown=0, NotChecked=0, Total=28392 [2018-07-24 10:56:21,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 781 states. [2018-07-24 10:56:21,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 781 to 546. [2018-07-24 10:56:21,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 546 states. [2018-07-24 10:56:21,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 546 states to 546 states and 618 transitions. [2018-07-24 10:56:21,863 INFO L78 Accepts]: Start accepts. Automaton has 546 states and 618 transitions. Word has length 258 [2018-07-24 10:56:21,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:56:21,864 INFO L471 AbstractCegarLoop]: Abstraction has 546 states and 618 transitions. [2018-07-24 10:56:21,864 INFO L472 AbstractCegarLoop]: Interpolant automaton has 85 states. [2018-07-24 10:56:21,864 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 618 transitions. [2018-07-24 10:56:21,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-07-24 10:56:21,866 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:56:21,866 INFO L353 BasicCegarLoop]: trace histogram [72, 72, 71, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:56:21,869 INFO L414 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:56:21,870 INFO L82 PathProgramCache]: Analyzing trace with hash 431856755, now seen corresponding path program 26 times [2018-07-24 10:56:21,870 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:56:21,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:56:21,870 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:56:21,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:56:21,871 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:56:21,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:56:24,461 INFO L134 CoverageAnalysis]: Checked inductivity of 7833 backedges. 0 proven. 7833 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:24,461 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:56:24,462 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:56:24,471 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:56:24,471 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:56:24,549 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:56:24,549 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:56:24,555 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:56:24,619 INFO L134 CoverageAnalysis]: Checked inductivity of 7833 backedges. 0 proven. 7833 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:24,619 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:56:32,235 INFO L134 CoverageAnalysis]: Checked inductivity of 7833 backedges. 0 proven. 7833 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:32,255 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:56:32,256 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:56:32,271 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:56:32,271 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:56:32,444 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:56:32,444 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:56:32,453 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:56:32,500 INFO L134 CoverageAnalysis]: Checked inductivity of 7833 backedges. 0 proven. 7833 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:32,500 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:56:32,596 INFO L134 CoverageAnalysis]: Checked inductivity of 7833 backedges. 0 proven. 7833 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:32,598 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:56:32,598 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [86, 86, 86, 86, 86] total 170 [2018-07-24 10:56:32,598 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:56:32,599 INFO L450 AbstractCegarLoop]: Interpolant automaton has 86 states [2018-07-24 10:56:32,600 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2018-07-24 10:56:32,601 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13705, Invalid=15025, Unknown=0, NotChecked=0, Total=28730 [2018-07-24 10:56:32,601 INFO L87 Difference]: Start difference. First operand 546 states and 618 transitions. Second operand 86 states. [2018-07-24 10:56:35,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:56:35,984 INFO L93 Difference]: Finished difference Result 794 states and 877 transitions. [2018-07-24 10:56:35,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2018-07-24 10:56:35,984 INFO L78 Accepts]: Start accepts. Automaton has 86 states. Word has length 261 [2018-07-24 10:56:35,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:56:35,988 INFO L225 Difference]: With dead ends: 794 [2018-07-24 10:56:35,988 INFO L226 Difference]: Without dead ends: 788 [2018-07-24 10:56:35,989 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 1129 GetRequests, 960 SyntacticMatches, 0 SemanticMatches, 169 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 570 ImplicationChecksByTransitivity, 10.0s TimeCoverageRelationStatistics Valid=13711, Invalid=15359, Unknown=0, NotChecked=0, Total=29070 [2018-07-24 10:56:35,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 788 states. [2018-07-24 10:56:35,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 788 to 553. [2018-07-24 10:56:35,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 553 states. [2018-07-24 10:56:35,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 626 transitions. [2018-07-24 10:56:35,997 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 626 transitions. Word has length 261 [2018-07-24 10:56:35,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:56:35,998 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 626 transitions. [2018-07-24 10:56:35,998 INFO L472 AbstractCegarLoop]: Interpolant automaton has 86 states. [2018-07-24 10:56:35,998 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 626 transitions. [2018-07-24 10:56:36,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2018-07-24 10:56:36,000 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:56:36,000 INFO L353 BasicCegarLoop]: trace histogram [73, 73, 72, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:56:36,000 INFO L414 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:56:36,001 INFO L82 PathProgramCache]: Analyzing trace with hash -629886124, now seen corresponding path program 27 times [2018-07-24 10:56:36,001 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:56:36,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:56:36,001 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:56:36,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:56:36,002 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:56:36,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:56:38,770 INFO L134 CoverageAnalysis]: Checked inductivity of 8049 backedges. 0 proven. 8049 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:38,770 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:56:38,770 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:56:38,778 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:56:38,778 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:56:38,830 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-07-24 10:56:38,830 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:56:38,833 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:56:39,532 INFO L134 CoverageAnalysis]: Checked inductivity of 8049 backedges. 0 proven. 165 refuted. 0 times theorem prover too weak. 7884 trivial. 0 not checked. [2018-07-24 10:56:39,532 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:56:40,387 INFO L134 CoverageAnalysis]: Checked inductivity of 8049 backedges. 0 proven. 165 refuted. 0 times theorem prover too weak. 7884 trivial. 0 not checked. [2018-07-24 10:56:40,407 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:56:40,407 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:56:40,421 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-24 10:56:40,422 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-24 10:56:40,556 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-07-24 10:56:40,557 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:56:40,561 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:56:40,585 INFO L134 CoverageAnalysis]: Checked inductivity of 8049 backedges. 0 proven. 165 refuted. 0 times theorem prover too weak. 7884 trivial. 0 not checked. [2018-07-24 10:56:40,586 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:56:40,615 INFO L134 CoverageAnalysis]: Checked inductivity of 8049 backedges. 0 proven. 165 refuted. 0 times theorem prover too weak. 7884 trivial. 0 not checked. [2018-07-24 10:56:40,616 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:56:40,616 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [87, 15, 15, 15, 15] total 111 [2018-07-24 10:56:40,617 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:56:40,617 INFO L450 AbstractCegarLoop]: Interpolant automaton has 98 states [2018-07-24 10:56:40,618 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2018-07-24 10:56:40,619 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5681, Invalid=6529, Unknown=0, NotChecked=0, Total=12210 [2018-07-24 10:56:40,619 INFO L87 Difference]: Start difference. First operand 553 states and 626 transitions. Second operand 98 states. [2018-07-24 10:56:43,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:56:43,837 INFO L93 Difference]: Finished difference Result 1035 states and 1141 transitions. [2018-07-24 10:56:43,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2018-07-24 10:56:43,837 INFO L78 Accepts]: Start accepts. Automaton has 98 states. Word has length 264 [2018-07-24 10:56:43,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:56:43,842 INFO L225 Difference]: With dead ends: 1035 [2018-07-24 10:56:43,842 INFO L226 Difference]: Without dead ends: 1007 [2018-07-24 10:56:43,843 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 1142 GetRequests, 1032 SyntacticMatches, 0 SemanticMatches, 110 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 383 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=5687, Invalid=6745, Unknown=0, NotChecked=0, Total=12432 [2018-07-24 10:56:43,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1007 states. [2018-07-24 10:56:43,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1007 to 633. [2018-07-24 10:56:43,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 633 states. [2018-07-24 10:56:43,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 633 states to 633 states and 717 transitions. [2018-07-24 10:56:43,852 INFO L78 Accepts]: Start accepts. Automaton has 633 states and 717 transitions. Word has length 264 [2018-07-24 10:56:43,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:56:43,853 INFO L471 AbstractCegarLoop]: Abstraction has 633 states and 717 transitions. [2018-07-24 10:56:43,853 INFO L472 AbstractCegarLoop]: Interpolant automaton has 98 states. [2018-07-24 10:56:43,853 INFO L276 IsEmpty]: Start isEmpty. Operand 633 states and 717 transitions. [2018-07-24 10:56:43,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 301 [2018-07-24 10:56:43,855 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:56:43,856 INFO L353 BasicCegarLoop]: trace histogram [84, 84, 83, 12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:56:43,856 INFO L414 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:56:43,856 INFO L82 PathProgramCache]: Analyzing trace with hash 1112549934, now seen corresponding path program 28 times [2018-07-24 10:56:43,856 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:56:43,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:56:43,857 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:56:43,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:56:43,857 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:56:43,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:56:47,936 INFO L134 CoverageAnalysis]: Checked inductivity of 10656 backedges. 0 proven. 10656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:47,936 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:56:47,936 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:56:47,946 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:56:47,947 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:56:48,035 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:56:48,035 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:56:48,039 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:56:48,113 INFO L134 CoverageAnalysis]: Checked inductivity of 10656 backedges. 0 proven. 10656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:48,113 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:56:58,300 INFO L134 CoverageAnalysis]: Checked inductivity of 10656 backedges. 0 proven. 10656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:58,320 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:56:58,321 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:56:58,354 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-24 10:56:58,354 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-24 10:56:58,538 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-24 10:56:58,538 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:56:58,548 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:56:58,618 INFO L134 CoverageAnalysis]: Checked inductivity of 10656 backedges. 0 proven. 10656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:58,618 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:56:58,756 INFO L134 CoverageAnalysis]: Checked inductivity of 10656 backedges. 0 proven. 10656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:56:58,758 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:56:58,758 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [99, 99, 99, 99, 99] total 196 [2018-07-24 10:56:58,759 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:56:58,759 INFO L450 AbstractCegarLoop]: Interpolant automaton has 99 states [2018-07-24 10:56:58,760 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2018-07-24 10:56:58,761 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18346, Invalid=19874, Unknown=0, NotChecked=0, Total=38220 [2018-07-24 10:56:58,761 INFO L87 Difference]: Start difference. First operand 633 states and 717 transitions. Second operand 99 states. [2018-07-24 10:57:03,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:57:03,368 INFO L93 Difference]: Finished difference Result 921 states and 1017 transitions. [2018-07-24 10:57:03,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2018-07-24 10:57:03,369 INFO L78 Accepts]: Start accepts. Automaton has 99 states. Word has length 300 [2018-07-24 10:57:03,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:57:03,374 INFO L225 Difference]: With dead ends: 921 [2018-07-24 10:57:03,374 INFO L226 Difference]: Without dead ends: 915 [2018-07-24 10:57:03,375 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 1298 GetRequests, 1103 SyntacticMatches, 0 SemanticMatches, 195 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 661 ImplicationChecksByTransitivity, 14.0s TimeCoverageRelationStatistics Valid=18352, Invalid=20260, Unknown=0, NotChecked=0, Total=38612 [2018-07-24 10:57:03,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 915 states. [2018-07-24 10:57:03,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 915 to 640. [2018-07-24 10:57:03,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 640 states. [2018-07-24 10:57:03,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 640 states to 640 states and 725 transitions. [2018-07-24 10:57:03,383 INFO L78 Accepts]: Start accepts. Automaton has 640 states and 725 transitions. Word has length 300 [2018-07-24 10:57:03,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:57:03,383 INFO L471 AbstractCegarLoop]: Abstraction has 640 states and 725 transitions. [2018-07-24 10:57:03,383 INFO L472 AbstractCegarLoop]: Interpolant automaton has 99 states. [2018-07-24 10:57:03,383 INFO L276 IsEmpty]: Start isEmpty. Operand 640 states and 725 transitions. [2018-07-24 10:57:03,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 304 [2018-07-24 10:57:03,386 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:57:03,386 INFO L353 BasicCegarLoop]: trace histogram [85, 85, 84, 12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:57:03,386 INFO L414 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:57:03,386 INFO L82 PathProgramCache]: Analyzing trace with hash -709031891, now seen corresponding path program 29 times [2018-07-24 10:57:03,386 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:57:03,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:03,387 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:57:03,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:03,387 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:57:03,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:07,931 INFO L134 CoverageAnalysis]: Checked inductivity of 10908 backedges. 0 proven. 10908 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:07,931 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:07,932 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:57:07,938 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:57:07,938 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:57:08,135 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 85 check-sat command(s) [2018-07-24 10:57:08,135 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:08,140 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:08,211 INFO L134 CoverageAnalysis]: Checked inductivity of 10908 backedges. 0 proven. 10908 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:08,212 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:18,627 INFO L134 CoverageAnalysis]: Checked inductivity of 10908 backedges. 0 proven. 10908 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:18,647 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:18,647 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:57:18,664 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-24 10:57:18,664 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:57:20,414 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 85 check-sat command(s) [2018-07-24 10:57:20,414 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:20,424 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:20,517 INFO L134 CoverageAnalysis]: Checked inductivity of 10908 backedges. 0 proven. 10908 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:20,517 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:20,599 INFO L134 CoverageAnalysis]: Checked inductivity of 10908 backedges. 0 proven. 10908 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:20,600 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:57:20,601 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [100, 100, 100, 100, 100] total 198 [2018-07-24 10:57:20,601 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:57:20,601 INFO L450 AbstractCegarLoop]: Interpolant automaton has 100 states [2018-07-24 10:57:20,602 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 100 interpolants. [2018-07-24 10:57:20,603 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18731, Invalid=20275, Unknown=0, NotChecked=0, Total=39006 [2018-07-24 10:57:20,603 INFO L87 Difference]: Start difference. First operand 640 states and 725 transitions. Second operand 100 states. [2018-07-24 10:57:26,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:57:26,225 INFO L93 Difference]: Finished difference Result 928 states and 1025 transitions. [2018-07-24 10:57:26,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2018-07-24 10:57:26,225 INFO L78 Accepts]: Start accepts. Automaton has 100 states. Word has length 303 [2018-07-24 10:57:26,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:57:26,230 INFO L225 Difference]: With dead ends: 928 [2018-07-24 10:57:26,230 INFO L226 Difference]: Without dead ends: 922 [2018-07-24 10:57:26,232 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 1311 GetRequests, 1114 SyntacticMatches, 0 SemanticMatches, 197 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 668 ImplicationChecksByTransitivity, 14.7s TimeCoverageRelationStatistics Valid=18737, Invalid=20665, Unknown=0, NotChecked=0, Total=39402 [2018-07-24 10:57:26,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 922 states. [2018-07-24 10:57:26,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 922 to 647. [2018-07-24 10:57:26,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 647 states. [2018-07-24 10:57:26,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 647 states and 733 transitions. [2018-07-24 10:57:26,241 INFO L78 Accepts]: Start accepts. Automaton has 647 states and 733 transitions. Word has length 303 [2018-07-24 10:57:26,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:57:26,241 INFO L471 AbstractCegarLoop]: Abstraction has 647 states and 733 transitions. [2018-07-24 10:57:26,241 INFO L472 AbstractCegarLoop]: Interpolant automaton has 100 states. [2018-07-24 10:57:26,241 INFO L276 IsEmpty]: Start isEmpty. Operand 647 states and 733 transitions. [2018-07-24 10:57:26,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 307 [2018-07-24 10:57:26,244 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:57:26,244 INFO L353 BasicCegarLoop]: trace histogram [86, 86, 85, 12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:57:26,244 INFO L414 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:57:26,244 INFO L82 PathProgramCache]: Analyzing trace with hash -541395506, now seen corresponding path program 30 times [2018-07-24 10:57:26,245 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:57:26,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:26,245 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:57:26,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:26,245 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:57:26,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:30,208 INFO L134 CoverageAnalysis]: Checked inductivity of 11163 backedges. 0 proven. 11163 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:30,208 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:30,208 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:57:30,216 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:57:30,217 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:57:30,276 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 23 check-sat command(s) [2018-07-24 10:57:30,277 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:30,279 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:31,170 INFO L134 CoverageAnalysis]: Checked inductivity of 11163 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 10965 trivial. 0 not checked. [2018-07-24 10:57:31,171 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:32,242 INFO L134 CoverageAnalysis]: Checked inductivity of 11163 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 10965 trivial. 0 not checked. [2018-07-24 10:57:32,262 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:32,262 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:57:32,279 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-24 10:57:32,279 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-24 10:57:32,588 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 23 check-sat command(s) [2018-07-24 10:57:32,588 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:57:32,594 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:32,631 INFO L134 CoverageAnalysis]: Checked inductivity of 11163 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 10965 trivial. 0 not checked. [2018-07-24 10:57:32,631 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:32,682 INFO L134 CoverageAnalysis]: Checked inductivity of 11163 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 10965 trivial. 0 not checked. [2018-07-24 10:57:32,683 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:57:32,684 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [101, 16, 16, 16, 16] total 127 [2018-07-24 10:57:32,684 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:57:32,684 INFO L450 AbstractCegarLoop]: Interpolant automaton has 113 states [2018-07-24 10:57:32,685 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 113 interpolants. [2018-07-24 10:57:32,685 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7513, Invalid=8489, Unknown=0, NotChecked=0, Total=16002 [2018-07-24 10:57:32,686 INFO L87 Difference]: Start difference. First operand 647 states and 733 transitions. Second operand 113 states. [2018-07-24 10:57:37,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:57:37,214 INFO L93 Difference]: Finished difference Result 1208 states and 1330 transitions. [2018-07-24 10:57:37,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 113 states. [2018-07-24 10:57:37,215 INFO L78 Accepts]: Start accepts. Automaton has 113 states. Word has length 306 [2018-07-24 10:57:37,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:57:37,220 INFO L225 Difference]: With dead ends: 1208 [2018-07-24 10:57:37,220 INFO L226 Difference]: Without dead ends: 1178 [2018-07-24 10:57:37,221 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 1324 GetRequests, 1198 SyntacticMatches, 0 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 444 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=7519, Invalid=8737, Unknown=0, NotChecked=0, Total=16256 [2018-07-24 10:57:37,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1178 states. [2018-07-24 10:57:37,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1178 to 734. [2018-07-24 10:57:37,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 734 states. [2018-07-24 10:57:37,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 832 transitions. [2018-07-24 10:57:37,230 INFO L78 Accepts]: Start accepts. Automaton has 734 states and 832 transitions. Word has length 306 [2018-07-24 10:57:37,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:57:37,230 INFO L471 AbstractCegarLoop]: Abstraction has 734 states and 832 transitions. [2018-07-24 10:57:37,230 INFO L472 AbstractCegarLoop]: Interpolant automaton has 113 states. [2018-07-24 10:57:37,230 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 832 transitions. [2018-07-24 10:57:37,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2018-07-24 10:57:37,233 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:57:37,233 INFO L353 BasicCegarLoop]: trace histogram [98, 98, 97, 13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:57:37,233 INFO L414 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:57:37,234 INFO L82 PathProgramCache]: Analyzing trace with hash -294769805, now seen corresponding path program 31 times [2018-07-24 10:57:37,234 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:57:37,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:37,235 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:57:37,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:57:37,235 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:57:37,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:41,912 INFO L134 CoverageAnalysis]: Checked inductivity of 14493 backedges. 0 proven. 14493 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:41,912 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:41,912 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:57:41,920 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:57:41,920 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:57:42,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:42,022 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:42,140 INFO L134 CoverageAnalysis]: Checked inductivity of 14493 backedges. 0 proven. 14493 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:42,140 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:54,333 INFO L134 CoverageAnalysis]: Checked inductivity of 14493 backedges. 0 proven. 14493 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:54,352 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:57:54,353 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:57:54,367 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:57:54,368 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-24 10:57:54,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:57:54,602 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:57:54,702 INFO L134 CoverageAnalysis]: Checked inductivity of 14493 backedges. 0 proven. 14493 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:54,702 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:57:56,152 INFO L134 CoverageAnalysis]: Checked inductivity of 14493 backedges. 0 proven. 14493 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:57:56,154 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:57:56,154 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [114, 114, 114, 114, 114] total 206 [2018-07-24 10:57:56,154 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:57:56,155 INFO L450 AbstractCegarLoop]: Interpolant automaton has 114 states [2018-07-24 10:57:56,156 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 114 interpolants. [2018-07-24 10:57:56,157 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20311, Invalid=21919, Unknown=0, NotChecked=0, Total=42230 [2018-07-24 10:57:56,158 INFO L87 Difference]: Start difference. First operand 734 states and 832 transitions. Second operand 114 states. [2018-07-24 10:58:03,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:03,100 INFO L93 Difference]: Finished difference Result 867 states and 978 transitions. [2018-07-24 10:58:03,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 114 states. [2018-07-24 10:58:03,100 INFO L78 Accepts]: Start accepts. Automaton has 114 states. Word has length 345 [2018-07-24 10:58:03,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:03,104 INFO L225 Difference]: With dead ends: 867 [2018-07-24 10:58:03,104 INFO L226 Difference]: Without dead ends: 861 [2018-07-24 10:58:03,105 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 1493 GetRequests, 1248 SyntacticMatches, 40 SemanticMatches, 205 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4686 ImplicationChecksByTransitivity, 18.0s TimeCoverageRelationStatistics Valid=20317, Invalid=22325, Unknown=0, NotChecked=0, Total=42642 [2018-07-24 10:58:03,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 861 states. [2018-07-24 10:58:03,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 861 to 741. [2018-07-24 10:58:03,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 741 states. [2018-07-24 10:58:03,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 741 states and 840 transitions. [2018-07-24 10:58:03,112 INFO L78 Accepts]: Start accepts. Automaton has 741 states and 840 transitions. Word has length 345 [2018-07-24 10:58:03,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:03,113 INFO L471 AbstractCegarLoop]: Abstraction has 741 states and 840 transitions. [2018-07-24 10:58:03,113 INFO L472 AbstractCegarLoop]: Interpolant automaton has 114 states. [2018-07-24 10:58:03,113 INFO L276 IsEmpty]: Start isEmpty. Operand 741 states and 840 transitions. [2018-07-24 10:58:03,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 349 [2018-07-24 10:58:03,116 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:03,116 INFO L353 BasicCegarLoop]: trace histogram [99, 99, 98, 13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:03,116 INFO L414 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:03,116 INFO L82 PathProgramCache]: Analyzing trace with hash -304447532, now seen corresponding path program 32 times [2018-07-24 10:58:03,116 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:03,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:03,117 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 10:58:03,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:03,117 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:03,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 10:58:07,902 INFO L134 CoverageAnalysis]: Checked inductivity of 14787 backedges. 0 proven. 14787 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:07,902 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:07,902 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 10:58:07,911 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:58:07,911 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:58:08,036 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:58:08,036 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:08,041 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:08,137 INFO L134 CoverageAnalysis]: Checked inductivity of 14787 backedges. 0 proven. 14787 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:08,137 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:20,296 INFO L134 CoverageAnalysis]: Checked inductivity of 14787 backedges. 0 proven. 14787 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:20,318 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 10:58:20,318 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-24 10:58:20,334 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-24 10:58:20,334 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-24 10:58:20,573 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-24 10:58:20,574 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-24 10:58:20,585 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 10:58:20,677 INFO L134 CoverageAnalysis]: Checked inductivity of 14787 backedges. 0 proven. 14787 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:20,677 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-24 10:58:22,351 INFO L134 CoverageAnalysis]: Checked inductivity of 14787 backedges. 0 proven. 14787 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 10:58:22,353 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-24 10:58:22,353 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [115, 115, 115, 115, 115] total 206 [2018-07-24 10:58:22,354 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-24 10:58:22,354 INFO L450 AbstractCegarLoop]: Interpolant automaton has 115 states [2018-07-24 10:58:22,355 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 115 interpolants. [2018-07-24 10:58:22,356 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20311, Invalid=21919, Unknown=0, NotChecked=0, Total=42230 [2018-07-24 10:58:22,356 INFO L87 Difference]: Start difference. First operand 741 states and 840 transitions. Second operand 115 states. [2018-07-24 10:58:30,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 10:58:31,000 INFO L93 Difference]: Finished difference Result 838 states and 950 transitions. [2018-07-24 10:58:31,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 115 states. [2018-07-24 10:58:31,000 INFO L78 Accepts]: Start accepts. Automaton has 115 states. Word has length 348 [2018-07-24 10:58:31,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 10:58:31,005 INFO L225 Difference]: With dead ends: 838 [2018-07-24 10:58:31,005 INFO L226 Difference]: Without dead ends: 832 [2018-07-24 10:58:31,006 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 1506 GetRequests, 1257 SyntacticMatches, 44 SemanticMatches, 205 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5085 ImplicationChecksByTransitivity, 18.2s TimeCoverageRelationStatistics Valid=20317, Invalid=22325, Unknown=0, NotChecked=0, Total=42642 [2018-07-24 10:58:31,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 832 states. [2018-07-24 10:58:31,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 832 to 748. [2018-07-24 10:58:31,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 748 states. [2018-07-24 10:58:31,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 748 states to 748 states and 848 transitions. [2018-07-24 10:58:31,015 INFO L78 Accepts]: Start accepts. Automaton has 748 states and 848 transitions. Word has length 348 [2018-07-24 10:58:31,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 10:58:31,016 INFO L471 AbstractCegarLoop]: Abstraction has 748 states and 848 transitions. [2018-07-24 10:58:31,016 INFO L472 AbstractCegarLoop]: Interpolant automaton has 115 states. [2018-07-24 10:58:31,016 INFO L276 IsEmpty]: Start isEmpty. Operand 748 states and 848 transitions. [2018-07-24 10:58:31,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2018-07-24 10:58:31,019 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 10:58:31,019 INFO L353 BasicCegarLoop]: trace histogram [100, 100, 99, 13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 10:58:31,019 INFO L414 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_string_concat_noarr_true_unreach_call_true_termination_i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 10:58:31,019 INFO L82 PathProgramCache]: Analyzing trace with hash -850803757, now seen corresponding path program 33 times [2018-07-24 10:58:31,020 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-07-24 10:58:31,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:31,020 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-24 10:58:31,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 10:58:31,021 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-24 10:58:31,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat Received shutdown request... [2018-07-24 10:58:35,442 WARN L540 AbstractCegarLoop]: Verification canceled [2018-07-24 10:58:35,446 WARN L202 ceAbstractionStarter]: Timeout [2018-07-24 10:58:35,446 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.07 10:58:35 BoogieIcfgContainer [2018-07-24 10:58:35,446 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-07-24 10:58:35,447 INFO L168 Benchmark]: Toolchain (without parser) took 243880.19 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 790.1 MB). Free memory was 1.4 GB in the beginning and 1.8 GB in the end (delta: -409.7 MB). Peak memory consumption was 380.4 MB. Max. memory is 7.1 GB. [2018-07-24 10:58:35,449 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:58:35,449 INFO L168 Benchmark]: CACSL2BoogieTranslator took 301.51 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-07-24 10:58:35,450 INFO L168 Benchmark]: Boogie Procedure Inliner took 24.05 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:58:35,450 INFO L168 Benchmark]: Boogie Preprocessor took 27.06 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 10:58:35,450 INFO L168 Benchmark]: RCFGBuilder took 389.63 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 743.4 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -796.7 MB). Peak memory consumption was 27.1 MB. Max. memory is 7.1 GB. [2018-07-24 10:58:35,451 INFO L168 Benchmark]: TraceAbstraction took 243127.46 ms. Allocated memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 46.7 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 376.4 MB). Peak memory consumption was 423.1 MB. Max. memory is 7.1 GB. [2018-07-24 10:58:35,457 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 301.51 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 24.05 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 27.06 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 389.63 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 743.4 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -796.7 MB). Peak memory consumption was 27.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 243127.46 ms. Allocated memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 46.7 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 376.4 MB). Peak memory consumption was 423.1 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was analyzing trace of length 352 with TraceHistMax 100, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 108 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 27 locations, 1 error locations. TIMEOUT Result, 243.0s OverallTime, 37 OverallIterations, 100 TraceHistogramMax, 62.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 519 SDtfs, 14017 SDslu, 14275 SDs, 0 SdLazy, 9889 SolverSat, 4652 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 21.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 22542 GetRequests, 19489 SyntacticMatches, 84 SemanticMatches, 2969 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18110 ImplicationChecksByTransitivity, 157.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=748occurred in iteration=36, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 36 MinimizatonAttempts, 4855 StatesRemovedByMinimization, 34 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.7s SsaConstructionTime, 8.6s SatisfiabilityAnalysisTime, 164.0s InterpolantComputationTime, 15695 NumberOfCodeBlocks, 13985 NumberOfCodeBlocksAsserted, 744 NumberOfCheckSat, 25955 ConstructedInterpolants, 0 QuantifiedInterpolants, 14688867 SizeOfPredicates, 153 NumberOfNonLiveVariables, 20694 ConjunctsInSsa, 2772 ConjunctsInUnsatCore, 168 InterpolantComputations, 3 PerfectInterpolantSequences, 132135/637563 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/string_concat-noarr_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-07-24_10-58-35-473.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/string_concat-noarr_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-07-24_10-58-35-473.csv Completed graceful shutdown