java -Xmx8000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml --generate-csv --csv-dir csv -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/eca-rers2012/Problem18_label00_false-unreach-call.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dd2f093 [2018-07-24 01:03:56,562 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-07-24 01:03:56,564 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-07-24 01:03:56,577 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-07-24 01:03:56,577 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-07-24 01:03:56,578 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-07-24 01:03:56,579 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-07-24 01:03:56,581 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-07-24 01:03:56,583 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-07-24 01:03:56,584 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-07-24 01:03:56,585 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-07-24 01:03:56,585 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-07-24 01:03:56,586 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-07-24 01:03:56,587 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-07-24 01:03:56,588 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-07-24 01:03:56,589 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-07-24 01:03:56,590 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-07-24 01:03:56,592 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-07-24 01:03:56,594 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-07-24 01:03:56,595 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-07-24 01:03:56,597 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-07-24 01:03:56,598 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-07-24 01:03:56,600 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-07-24 01:03:56,601 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-07-24 01:03:56,601 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-07-24 01:03:56,602 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-07-24 01:03:56,603 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-07-24 01:03:56,604 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-07-24 01:03:56,605 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-07-24 01:03:56,606 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-07-24 01:03:56,606 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-07-24 01:03:56,607 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-07-24 01:03:56,609 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf [2018-07-24 01:03:56,635 INFO L110 SettingsManager]: Loading preferences was successful [2018-07-24 01:03:56,635 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-07-24 01:03:56,636 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-07-24 01:03:56,636 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-07-24 01:03:56,637 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-07-24 01:03:56,637 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-07-24 01:03:56,637 INFO L133 SettingsManager]: * Use SBE=true [2018-07-24 01:03:56,637 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-07-24 01:03:56,637 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-07-24 01:03:56,638 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-07-24 01:03:56,638 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-07-24 01:03:56,638 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-07-24 01:03:56,638 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-07-24 01:03:56,638 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-07-24 01:03:56,639 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-07-24 01:03:56,639 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-07-24 01:03:56,639 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-07-24 01:03:56,639 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-07-24 01:03:56,639 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-07-24 01:03:56,640 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 01:03:56,640 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-07-24 01:03:56,640 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-07-24 01:03:56,640 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-07-24 01:03:56,640 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-07-24 01:03:56,641 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-07-24 01:03:56,641 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-07-24 01:03:56,641 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-07-24 01:03:56,641 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-07-24 01:03:56,683 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-07-24 01:03:56,697 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-07-24 01:03:56,703 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-07-24 01:03:56,705 INFO L271 PluginConnector]: Initializing CDTParser... [2018-07-24 01:03:56,706 INFO L276 PluginConnector]: CDTParser initialized [2018-07-24 01:03:56,707 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/eca-rers2012/Problem18_label00_false-unreach-call.c [2018-07-24 01:03:57,066 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/73e4ae481/ae3e702652a5474e93c741a0e977f620/FLAG793bdc4f9 [2018-07-24 01:03:57,587 INFO L276 CDTParser]: Found 1 translation units. [2018-07-24 01:03:57,588 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/eca-rers2012/Problem18_label00_false-unreach-call.c [2018-07-24 01:03:57,625 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/73e4ae481/ae3e702652a5474e93c741a0e977f620/FLAG793bdc4f9 [2018-07-24 01:03:57,648 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/73e4ae481/ae3e702652a5474e93c741a0e977f620 [2018-07-24 01:03:57,660 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-07-24 01:03:57,662 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-07-24 01:03:57,663 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-07-24 01:03:57,663 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-07-24 01:03:57,673 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-07-24 01:03:57,674 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 01:03:57" (1/1) ... [2018-07-24 01:03:57,677 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5cd8592f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:57, skipping insertion in model container [2018-07-24 01:03:57,677 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.07 01:03:57" (1/1) ... [2018-07-24 01:03:58,015 INFO L179 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-07-24 01:03:58,964 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 01:03:58,983 INFO L422 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-07-24 01:03:59,570 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-24 01:03:59,723 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59 WrapperNode [2018-07-24 01:03:59,723 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-07-24 01:03:59,724 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-07-24 01:03:59,725 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-07-24 01:03:59,725 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-07-24 01:03:59,737 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (1/1) ... [2018-07-24 01:03:59,826 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (1/1) ... [2018-07-24 01:04:00,029 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-07-24 01:04:00,029 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-07-24 01:04:00,030 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-07-24 01:04:00,030 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-07-24 01:04:00,547 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (1/1) ... [2018-07-24 01:04:00,547 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (1/1) ... [2018-07-24 01:04:00,571 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (1/1) ... [2018-07-24 01:04:00,572 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (1/1) ... [2018-07-24 01:04:00,661 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (1/1) ... [2018-07-24 01:04:00,689 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (1/1) ... [2018-07-24 01:04:00,726 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (1/1) ... [2018-07-24 01:04:00,753 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-07-24 01:04:00,754 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-07-24 01:04:00,754 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-07-24 01:04:00,754 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-07-24 01:04:00,755 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-24 01:04:00,829 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-07-24 01:04:00,829 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-07-24 01:04:00,829 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-07-24 01:04:07,568 INFO L261 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-07-24 01:04:07,569 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 01:04:07 BoogieIcfgContainer [2018-07-24 01:04:07,569 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-07-24 01:04:07,570 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-07-24 01:04:07,570 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-07-24 01:04:07,575 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-07-24 01:04:07,575 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.07 01:03:57" (1/3) ... [2018-07-24 01:04:07,576 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4367a2ef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 01:04:07, skipping insertion in model container [2018-07-24 01:04:07,576 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.07 01:03:59" (2/3) ... [2018-07-24 01:04:07,577 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4367a2ef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.07 01:04:07, skipping insertion in model container [2018-07-24 01:04:07,578 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.07 01:04:07" (3/3) ... [2018-07-24 01:04:07,581 INFO L112 eAbstractionObserver]: Analyzing ICFG Problem18_label00_false-unreach-call.c [2018-07-24 01:04:07,591 INFO L132 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-07-24 01:04:07,605 INFO L144 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-07-24 01:04:07,666 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-07-24 01:04:07,667 INFO L373 AbstractCegarLoop]: Interprodecural is true [2018-07-24 01:04:07,667 INFO L374 AbstractCegarLoop]: Hoare is true [2018-07-24 01:04:07,667 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-07-24 01:04:07,667 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-07-24 01:04:07,667 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-07-24 01:04:07,668 INFO L378 AbstractCegarLoop]: Difference is false [2018-07-24 01:04:07,668 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-07-24 01:04:07,668 INFO L384 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-07-24 01:04:07,705 INFO L276 IsEmpty]: Start isEmpty. Operand 758 states. [2018-07-24 01:04:07,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-07-24 01:04:07,712 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:04:07,713 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:04:07,714 INFO L414 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:04:07,720 INFO L82 PathProgramCache]: Analyzing trace with hash 183950178, now seen corresponding path program 1 times [2018-07-24 01:04:07,722 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:04:07,723 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:04:07,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:07,776 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:04:07,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:07,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:04:08,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 01:04:08,087 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:04:08,088 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-24 01:04:08,093 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:04:08,106 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:04:08,107 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:04:08,110 INFO L87 Difference]: Start difference. First operand 758 states. Second operand 4 states. [2018-07-24 01:04:19,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:04:19,053 INFO L93 Difference]: Finished difference Result 2902 states and 5650 transitions. [2018-07-24 01:04:19,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 01:04:19,056 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2018-07-24 01:04:19,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:04:19,101 INFO L225 Difference]: With dead ends: 2902 [2018-07-24 01:04:19,101 INFO L226 Difference]: Without dead ends: 2137 [2018-07-24 01:04:19,109 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:04:19,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2137 states. [2018-07-24 01:04:19,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2137 to 2137. [2018-07-24 01:04:19,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2137 states. [2018-07-24 01:04:19,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2137 states to 2137 states and 3649 transitions. [2018-07-24 01:04:19,305 INFO L78 Accepts]: Start accepts. Automaton has 2137 states and 3649 transitions. Word has length 20 [2018-07-24 01:04:19,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:04:19,306 INFO L471 AbstractCegarLoop]: Abstraction has 2137 states and 3649 transitions. [2018-07-24 01:04:19,306 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:04:19,306 INFO L276 IsEmpty]: Start isEmpty. Operand 2137 states and 3649 transitions. [2018-07-24 01:04:19,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-07-24 01:04:19,312 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:04:19,312 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:04:19,313 INFO L414 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:04:19,313 INFO L82 PathProgramCache]: Analyzing trace with hash -487647188, now seen corresponding path program 1 times [2018-07-24 01:04:19,313 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:04:19,313 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:04:19,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:19,315 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:04:19,316 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:19,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:04:19,544 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 01:04:19,544 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:04:19,545 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-24 01:04:19,547 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:04:19,547 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:04:19,547 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:04:19,548 INFO L87 Difference]: Start difference. First operand 2137 states and 3649 transitions. Second operand 4 states. [2018-07-24 01:04:27,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:04:27,388 INFO L93 Difference]: Finished difference Result 6345 states and 10882 transitions. [2018-07-24 01:04:27,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-07-24 01:04:27,389 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 87 [2018-07-24 01:04:27,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:04:27,413 INFO L225 Difference]: With dead ends: 6345 [2018-07-24 01:04:27,413 INFO L226 Difference]: Without dead ends: 4210 [2018-07-24 01:04:27,418 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:04:27,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4210 states. [2018-07-24 01:04:27,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4210 to 4210. [2018-07-24 01:04:27,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4210 states. [2018-07-24 01:04:27,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4210 states to 4210 states and 6149 transitions. [2018-07-24 01:04:27,500 INFO L78 Accepts]: Start accepts. Automaton has 4210 states and 6149 transitions. Word has length 87 [2018-07-24 01:04:27,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:04:27,501 INFO L471 AbstractCegarLoop]: Abstraction has 4210 states and 6149 transitions. [2018-07-24 01:04:27,501 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:04:27,501 INFO L276 IsEmpty]: Start isEmpty. Operand 4210 states and 6149 transitions. [2018-07-24 01:04:27,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-07-24 01:04:27,505 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:04:27,505 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:04:27,505 INFO L414 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:04:27,506 INFO L82 PathProgramCache]: Analyzing trace with hash 2037212259, now seen corresponding path program 1 times [2018-07-24 01:04:27,506 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:04:27,506 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:04:27,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:27,507 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:04:27,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:27,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:04:27,677 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 01:04:27,678 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:04:27,678 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-24 01:04:27,678 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:04:27,678 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:04:27,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:04:27,679 INFO L87 Difference]: Start difference. First operand 4210 states and 6149 transitions. Second operand 4 states. [2018-07-24 01:04:34,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:04:34,342 INFO L93 Difference]: Finished difference Result 9800 states and 14064 transitions. [2018-07-24 01:04:34,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 01:04:34,343 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 92 [2018-07-24 01:04:34,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:04:34,370 INFO L225 Difference]: With dead ends: 9800 [2018-07-24 01:04:34,370 INFO L226 Difference]: Without dead ends: 5592 [2018-07-24 01:04:34,377 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:04:34,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5592 states. [2018-07-24 01:04:34,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5592 to 5592. [2018-07-24 01:04:34,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5592 states. [2018-07-24 01:04:34,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5592 states to 5592 states and 7461 transitions. [2018-07-24 01:04:34,471 INFO L78 Accepts]: Start accepts. Automaton has 5592 states and 7461 transitions. Word has length 92 [2018-07-24 01:04:34,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:04:34,471 INFO L471 AbstractCegarLoop]: Abstraction has 5592 states and 7461 transitions. [2018-07-24 01:04:34,471 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:04:34,472 INFO L276 IsEmpty]: Start isEmpty. Operand 5592 states and 7461 transitions. [2018-07-24 01:04:34,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-07-24 01:04:34,474 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:04:34,474 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:04:34,475 INFO L414 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:04:34,475 INFO L82 PathProgramCache]: Analyzing trace with hash -75196788, now seen corresponding path program 1 times [2018-07-24 01:04:34,475 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:04:34,475 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:04:34,476 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:34,476 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:04:34,477 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:34,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:04:34,751 WARN L169 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 7 DAG size of output: 4 [2018-07-24 01:04:34,839 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-24 01:04:34,840 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:04:34,840 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-07-24 01:04:34,841 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:04:34,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:04:34,841 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:04:34,842 INFO L87 Difference]: Start difference. First operand 5592 states and 7461 transitions. Second operand 4 states. [2018-07-24 01:04:42,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:04:42,219 INFO L93 Difference]: Finished difference Result 21547 states and 28748 transitions. [2018-07-24 01:04:42,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 01:04:42,228 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 114 [2018-07-24 01:04:42,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:04:42,293 INFO L225 Difference]: With dead ends: 21547 [2018-07-24 01:04:42,293 INFO L226 Difference]: Without dead ends: 15957 [2018-07-24 01:04:42,304 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:04:42,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15957 states. [2018-07-24 01:04:42,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15957 to 15957. [2018-07-24 01:04:42,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15957 states. [2018-07-24 01:04:42,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15957 states to 15957 states and 20051 transitions. [2018-07-24 01:04:42,594 INFO L78 Accepts]: Start accepts. Automaton has 15957 states and 20051 transitions. Word has length 114 [2018-07-24 01:04:42,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:04:42,596 INFO L471 AbstractCegarLoop]: Abstraction has 15957 states and 20051 transitions. [2018-07-24 01:04:42,596 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:04:42,596 INFO L276 IsEmpty]: Start isEmpty. Operand 15957 states and 20051 transitions. [2018-07-24 01:04:42,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2018-07-24 01:04:42,609 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:04:42,610 INFO L353 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:04:42,610 INFO L414 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:04:42,610 INFO L82 PathProgramCache]: Analyzing trace with hash -399144802, now seen corresponding path program 1 times [2018-07-24 01:04:42,611 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:04:42,611 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:04:42,612 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:42,612 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:04:42,612 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:42,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:04:42,952 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 103 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-07-24 01:04:42,952 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:04:42,953 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-24 01:04:42,953 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:04:42,954 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:04:42,954 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:04:42,954 INFO L87 Difference]: Start difference. First operand 15957 states and 20051 transitions. Second operand 4 states. [2018-07-24 01:04:50,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:04:50,982 INFO L93 Difference]: Finished difference Result 57494 states and 72303 transitions. [2018-07-24 01:04:50,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 01:04:50,982 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 229 [2018-07-24 01:04:50,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:04:51,066 INFO L225 Difference]: With dead ends: 57494 [2018-07-24 01:04:51,066 INFO L226 Difference]: Without dead ends: 41539 [2018-07-24 01:04:51,089 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:04:51,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41539 states. [2018-07-24 01:04:51,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41539 to 40848. [2018-07-24 01:04:51,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40848 states. [2018-07-24 01:04:51,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40848 states to 40848 states and 47918 transitions. [2018-07-24 01:04:51,620 INFO L78 Accepts]: Start accepts. Automaton has 40848 states and 47918 transitions. Word has length 229 [2018-07-24 01:04:51,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:04:51,621 INFO L471 AbstractCegarLoop]: Abstraction has 40848 states and 47918 transitions. [2018-07-24 01:04:51,621 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:04:51,621 INFO L276 IsEmpty]: Start isEmpty. Operand 40848 states and 47918 transitions. [2018-07-24 01:04:51,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2018-07-24 01:04:51,635 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:04:51,635 INFO L353 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:04:51,635 INFO L414 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:04:51,636 INFO L82 PathProgramCache]: Analyzing trace with hash -1422191609, now seen corresponding path program 1 times [2018-07-24 01:04:51,636 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:04:51,636 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:04:51,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:51,637 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:04:51,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:04:51,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:04:52,095 WARN L169 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 11 [2018-07-24 01:04:52,442 INFO L134 CoverageAnalysis]: Checked inductivity of 356 backedges. 227 proven. 0 refuted. 0 times theorem prover too weak. 129 trivial. 0 not checked. [2018-07-24 01:04:52,443 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:04:52,443 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-07-24 01:04:52,444 INFO L450 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-07-24 01:04:52,444 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-07-24 01:04:52,444 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-07-24 01:04:52,444 INFO L87 Difference]: Start difference. First operand 40848 states and 47918 transitions. Second operand 5 states. [2018-07-24 01:05:01,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:05:01,283 INFO L93 Difference]: Finished difference Result 87222 states and 101820 transitions. [2018-07-24 01:05:01,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-07-24 01:05:01,284 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 354 [2018-07-24 01:05:01,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:05:01,334 INFO L225 Difference]: With dead ends: 87222 [2018-07-24 01:05:01,334 INFO L226 Difference]: Without dead ends: 45684 [2018-07-24 01:05:01,364 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-07-24 01:05:01,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45684 states. [2018-07-24 01:05:01,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45684 to 44993. [2018-07-24 01:05:01,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44993 states. [2018-07-24 01:05:01,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44993 states to 44993 states and 52296 transitions. [2018-07-24 01:05:01,850 INFO L78 Accepts]: Start accepts. Automaton has 44993 states and 52296 transitions. Word has length 354 [2018-07-24 01:05:01,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:05:01,851 INFO L471 AbstractCegarLoop]: Abstraction has 44993 states and 52296 transitions. [2018-07-24 01:05:01,851 INFO L472 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-07-24 01:05:01,851 INFO L276 IsEmpty]: Start isEmpty. Operand 44993 states and 52296 transitions. [2018-07-24 01:05:01,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 538 [2018-07-24 01:05:01,877 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:05:01,877 INFO L353 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:05:01,877 INFO L414 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:05:01,878 INFO L82 PathProgramCache]: Analyzing trace with hash 384769455, now seen corresponding path program 1 times [2018-07-24 01:05:01,878 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:05:01,878 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:05:01,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:01,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:05:01,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:01,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:05:02,353 WARN L169 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 7 [2018-07-24 01:05:02,663 INFO L134 CoverageAnalysis]: Checked inductivity of 707 backedges. 466 proven. 4 refuted. 0 times theorem prover too weak. 237 trivial. 0 not checked. [2018-07-24 01:05:02,664 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 01:05:02,664 INFO L221 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 01:05:02,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:05:02,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:05:02,848 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 01:05:03,170 INFO L134 CoverageAnalysis]: Checked inductivity of 707 backedges. 571 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-07-24 01:05:03,191 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-07-24 01:05:03,191 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 6 [2018-07-24 01:05:03,193 INFO L450 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-07-24 01:05:03,193 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-07-24 01:05:03,193 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-07-24 01:05:03,193 INFO L87 Difference]: Start difference. First operand 44993 states and 52296 transitions. Second operand 6 states. [2018-07-24 01:05:19,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:05:19,630 INFO L93 Difference]: Finished difference Result 100364 states and 115385 transitions. [2018-07-24 01:05:19,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-07-24 01:05:19,631 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 537 [2018-07-24 01:05:19,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:05:19,719 INFO L225 Difference]: With dead ends: 100364 [2018-07-24 01:05:19,720 INFO L226 Difference]: Without dead ends: 46364 [2018-07-24 01:05:19,750 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 547 GetRequests, 539 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=31, Invalid=41, Unknown=0, NotChecked=0, Total=72 [2018-07-24 01:05:19,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46364 states. [2018-07-24 01:05:20,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46364 to 38743. [2018-07-24 01:05:20,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38743 states. [2018-07-24 01:05:20,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38743 states to 38743 states and 41073 transitions. [2018-07-24 01:05:20,423 INFO L78 Accepts]: Start accepts. Automaton has 38743 states and 41073 transitions. Word has length 537 [2018-07-24 01:05:20,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:05:20,424 INFO L471 AbstractCegarLoop]: Abstraction has 38743 states and 41073 transitions. [2018-07-24 01:05:20,424 INFO L472 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-07-24 01:05:20,424 INFO L276 IsEmpty]: Start isEmpty. Operand 38743 states and 41073 transitions. [2018-07-24 01:05:20,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 603 [2018-07-24 01:05:20,444 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:05:20,445 INFO L353 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:05:20,445 INFO L414 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:05:20,446 INFO L82 PathProgramCache]: Analyzing trace with hash 941583305, now seen corresponding path program 1 times [2018-07-24 01:05:20,446 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:05:20,446 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:05:20,447 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:20,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:05:20,447 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:20,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:05:21,094 INFO L134 CoverageAnalysis]: Checked inductivity of 583 backedges. 493 proven. 0 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2018-07-24 01:05:21,095 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:05:21,095 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-07-24 01:05:21,096 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:05:21,096 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:05:21,096 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:05:21,097 INFO L87 Difference]: Start difference. First operand 38743 states and 41073 transitions. Second operand 4 states. [2018-07-24 01:05:26,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:05:26,340 INFO L93 Difference]: Finished difference Result 98225 states and 105023 transitions. [2018-07-24 01:05:26,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 01:05:26,340 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 602 [2018-07-24 01:05:26,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:05:26,414 INFO L225 Difference]: With dead ends: 98225 [2018-07-24 01:05:26,414 INFO L226 Difference]: Without dead ends: 58791 [2018-07-24 01:05:26,440 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:05:26,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58791 states. [2018-07-24 01:05:26,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58791 to 47034. [2018-07-24 01:05:26,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47034 states. [2018-07-24 01:05:27,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47034 states to 47034 states and 49683 transitions. [2018-07-24 01:05:27,016 INFO L78 Accepts]: Start accepts. Automaton has 47034 states and 49683 transitions. Word has length 602 [2018-07-24 01:05:27,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:05:27,017 INFO L471 AbstractCegarLoop]: Abstraction has 47034 states and 49683 transitions. [2018-07-24 01:05:27,017 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:05:27,017 INFO L276 IsEmpty]: Start isEmpty. Operand 47034 states and 49683 transitions. [2018-07-24 01:05:27,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 666 [2018-07-24 01:05:27,047 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:05:27,048 INFO L353 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:05:27,048 INFO L414 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:05:27,048 INFO L82 PathProgramCache]: Analyzing trace with hash 1948939876, now seen corresponding path program 1 times [2018-07-24 01:05:27,048 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:05:27,049 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:05:27,049 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:27,050 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:05:27,050 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:27,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:05:27,550 WARN L169 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 8 [2018-07-24 01:05:27,692 INFO L134 CoverageAnalysis]: Checked inductivity of 469 backedges. 451 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-07-24 01:05:27,692 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:05:27,693 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-07-24 01:05:27,693 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:05:27,693 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:05:27,694 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:05:27,694 INFO L87 Difference]: Start difference. First operand 47034 states and 49683 transitions. Second operand 4 states. [2018-07-24 01:05:33,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:05:33,472 INFO L93 Difference]: Finished difference Result 112723 states and 119222 transitions. [2018-07-24 01:05:33,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 01:05:33,472 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 665 [2018-07-24 01:05:33,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:05:33,533 INFO L225 Difference]: With dead ends: 112723 [2018-07-24 01:05:33,534 INFO L226 Difference]: Without dead ends: 66382 [2018-07-24 01:05:33,564 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:05:33,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66382 states. [2018-07-24 01:05:34,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66382 to 65000. [2018-07-24 01:05:34,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65000 states. [2018-07-24 01:05:34,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65000 states to 65000 states and 67861 transitions. [2018-07-24 01:05:34,221 INFO L78 Accepts]: Start accepts. Automaton has 65000 states and 67861 transitions. Word has length 665 [2018-07-24 01:05:34,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:05:34,222 INFO L471 AbstractCegarLoop]: Abstraction has 65000 states and 67861 transitions. [2018-07-24 01:05:34,222 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:05:34,222 INFO L276 IsEmpty]: Start isEmpty. Operand 65000 states and 67861 transitions. [2018-07-24 01:05:34,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 806 [2018-07-24 01:05:34,242 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:05:34,243 INFO L353 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:05:34,243 INFO L414 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:05:34,244 INFO L82 PathProgramCache]: Analyzing trace with hash 319084717, now seen corresponding path program 1 times [2018-07-24 01:05:34,244 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:05:34,244 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:05:34,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:34,245 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:05:34,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:34,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:05:35,137 INFO L134 CoverageAnalysis]: Checked inductivity of 839 backedges. 71 proven. 0 refuted. 0 times theorem prover too weak. 768 trivial. 0 not checked. [2018-07-24 01:05:35,138 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:05:35,138 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-24 01:05:35,139 INFO L450 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-07-24 01:05:35,139 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-07-24 01:05:35,139 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-24 01:05:35,140 INFO L87 Difference]: Start difference. First operand 65000 states and 67861 transitions. Second operand 3 states. [2018-07-24 01:05:39,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:05:39,168 INFO L93 Difference]: Finished difference Result 128614 states and 134293 transitions. [2018-07-24 01:05:39,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-07-24 01:05:39,168 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 805 [2018-07-24 01:05:39,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:05:39,229 INFO L225 Difference]: With dead ends: 128614 [2018-07-24 01:05:39,229 INFO L226 Difference]: Without dead ends: 64307 [2018-07-24 01:05:39,261 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 5 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-24 01:05:39,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64307 states. [2018-07-24 01:05:39,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64307 to 64307. [2018-07-24 01:05:39,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64307 states. [2018-07-24 01:05:39,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64307 states to 64307 states and 66651 transitions. [2018-07-24 01:05:39,821 INFO L78 Accepts]: Start accepts. Automaton has 64307 states and 66651 transitions. Word has length 805 [2018-07-24 01:05:39,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:05:39,822 INFO L471 AbstractCegarLoop]: Abstraction has 64307 states and 66651 transitions. [2018-07-24 01:05:39,822 INFO L472 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-07-24 01:05:39,822 INFO L276 IsEmpty]: Start isEmpty. Operand 64307 states and 66651 transitions. [2018-07-24 01:05:39,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1211 [2018-07-24 01:05:39,930 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:05:39,931 INFO L353 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:05:39,932 INFO L414 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:05:39,932 INFO L82 PathProgramCache]: Analyzing trace with hash -1934925295, now seen corresponding path program 1 times [2018-07-24 01:05:39,932 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:05:39,933 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:05:39,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:39,934 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:05:39,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:40,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:05:40,790 WARN L169 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-07-24 01:05:42,714 INFO L134 CoverageAnalysis]: Checked inductivity of 1409 backedges. 454 proven. 637 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-07-24 01:05:42,715 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 01:05:42,715 INFO L221 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 01:05:42,725 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:05:43,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:05:43,074 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 01:05:44,095 INFO L134 CoverageAnalysis]: Checked inductivity of 1409 backedges. 741 proven. 0 refuted. 0 times theorem prover too weak. 668 trivial. 0 not checked. [2018-07-24 01:05:44,116 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-07-24 01:05:44,117 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2018-07-24 01:05:44,119 INFO L450 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-07-24 01:05:44,120 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-07-24 01:05:44,120 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-07-24 01:05:44,120 INFO L87 Difference]: Start difference. First operand 64307 states and 66651 transitions. Second operand 10 states. [2018-07-24 01:05:57,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:05:57,113 INFO L93 Difference]: Finished difference Result 178258 states and 185578 transitions. [2018-07-24 01:05:57,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-07-24 01:05:57,118 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 1210 [2018-07-24 01:05:57,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:05:57,241 INFO L225 Difference]: With dead ends: 178258 [2018-07-24 01:05:57,241 INFO L226 Difference]: Without dead ends: 114644 [2018-07-24 01:05:57,276 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 1238 GetRequests, 1218 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=116, Invalid=264, Unknown=0, NotChecked=0, Total=380 [2018-07-24 01:05:57,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114644 states. [2018-07-24 01:05:58,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114644 to 82964. [2018-07-24 01:05:58,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82964 states. [2018-07-24 01:05:58,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82964 states to 82964 states and 85842 transitions. [2018-07-24 01:05:58,324 INFO L78 Accepts]: Start accepts. Automaton has 82964 states and 85842 transitions. Word has length 1210 [2018-07-24 01:05:58,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:05:58,325 INFO L471 AbstractCegarLoop]: Abstraction has 82964 states and 85842 transitions. [2018-07-24 01:05:58,325 INFO L472 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-07-24 01:05:58,325 INFO L276 IsEmpty]: Start isEmpty. Operand 82964 states and 85842 transitions. [2018-07-24 01:05:58,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1803 [2018-07-24 01:05:58,402 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:05:58,403 INFO L353 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:05:58,404 INFO L414 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:05:58,404 INFO L82 PathProgramCache]: Analyzing trace with hash 1573441914, now seen corresponding path program 1 times [2018-07-24 01:05:58,404 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:05:58,405 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:05:58,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:58,407 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:05:58,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:05:58,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:06:02,690 INFO L134 CoverageAnalysis]: Checked inductivity of 3034 backedges. 1369 proven. 0 refuted. 0 times theorem prover too weak. 1665 trivial. 0 not checked. [2018-07-24 01:06:02,690 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:06:02,691 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-07-24 01:06:02,692 INFO L450 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-07-24 01:06:02,692 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-07-24 01:06:02,692 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-07-24 01:06:02,693 INFO L87 Difference]: Start difference. First operand 82964 states and 85842 transitions. Second operand 8 states. [2018-07-24 01:06:14,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:06:14,311 INFO L93 Difference]: Finished difference Result 257463 states and 266714 transitions. [2018-07-24 01:06:14,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-07-24 01:06:14,311 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 1802 [2018-07-24 01:06:14,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:06:14,485 INFO L225 Difference]: With dead ends: 257463 [2018-07-24 01:06:14,485 INFO L226 Difference]: Without dead ends: 164808 [2018-07-24 01:06:14,547 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 11 SyntacticMatches, 6 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=87, Invalid=153, Unknown=0, NotChecked=0, Total=240 [2018-07-24 01:06:14,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164808 states. [2018-07-24 01:06:15,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164808 to 99199. [2018-07-24 01:06:15,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99199 states. [2018-07-24 01:06:15,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99199 states to 99199 states and 102283 transitions. [2018-07-24 01:06:15,585 INFO L78 Accepts]: Start accepts. Automaton has 99199 states and 102283 transitions. Word has length 1802 [2018-07-24 01:06:15,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:06:15,586 INFO L471 AbstractCegarLoop]: Abstraction has 99199 states and 102283 transitions. [2018-07-24 01:06:15,586 INFO L472 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-07-24 01:06:15,586 INFO L276 IsEmpty]: Start isEmpty. Operand 99199 states and 102283 transitions. [2018-07-24 01:06:15,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1804 [2018-07-24 01:06:15,660 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:06:15,661 INFO L353 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:06:15,662 INFO L414 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:06:15,662 INFO L82 PathProgramCache]: Analyzing trace with hash 308074768, now seen corresponding path program 1 times [2018-07-24 01:06:15,662 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:06:15,662 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:06:15,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:06:15,663 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:06:15,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:06:15,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:06:17,040 WARN L169 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-07-24 01:06:17,454 WARN L169 SmtUtils]: Spent 378.00 ms on a formula simplification. DAG size of input: 19 DAG size of output: 14 [2018-07-24 01:06:17,741 WARN L169 SmtUtils]: Spent 218.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 19 [2018-07-24 01:06:21,547 INFO L134 CoverageAnalysis]: Checked inductivity of 3038 backedges. 1777 proven. 724 refuted. 0 times theorem prover too weak. 537 trivial. 0 not checked. [2018-07-24 01:06:21,548 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 01:06:21,548 INFO L221 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 01:06:21,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:06:22,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:06:22,054 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 01:06:24,227 INFO L134 CoverageAnalysis]: Checked inductivity of 3038 backedges. 1911 proven. 0 refuted. 0 times theorem prover too weak. 1127 trivial. 0 not checked. [2018-07-24 01:06:24,248 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-07-24 01:06:24,249 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2018-07-24 01:06:24,250 INFO L450 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-07-24 01:06:24,250 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-07-24 01:06:24,251 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-07-24 01:06:24,251 INFO L87 Difference]: Start difference. First operand 99199 states and 102283 transitions. Second operand 10 states. [2018-07-24 01:06:42,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:06:42,601 INFO L93 Difference]: Finished difference Result 333394 states and 344045 transitions. [2018-07-24 01:06:42,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-07-24 01:06:42,601 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 1803 [2018-07-24 01:06:42,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:06:42,822 INFO L225 Difference]: With dead ends: 333394 [2018-07-24 01:06:42,822 INFO L226 Difference]: Without dead ends: 201069 [2018-07-24 01:06:42,892 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 1837 GetRequests, 1815 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=139, Invalid=367, Unknown=0, NotChecked=0, Total=506 [2018-07-24 01:06:43,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201069 states. [2018-07-24 01:06:44,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201069 to 85690. [2018-07-24 01:06:44,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85690 states. [2018-07-24 01:06:44,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85690 states to 85690 states and 87748 transitions. [2018-07-24 01:06:44,133 INFO L78 Accepts]: Start accepts. Automaton has 85690 states and 87748 transitions. Word has length 1803 [2018-07-24 01:06:44,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:06:44,134 INFO L471 AbstractCegarLoop]: Abstraction has 85690 states and 87748 transitions. [2018-07-24 01:06:44,134 INFO L472 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-07-24 01:06:44,134 INFO L276 IsEmpty]: Start isEmpty. Operand 85690 states and 87748 transitions. [2018-07-24 01:06:44,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1944 [2018-07-24 01:06:44,191 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:06:44,192 INFO L353 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:06:44,192 INFO L414 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:06:44,193 INFO L82 PathProgramCache]: Analyzing trace with hash -1981691541, now seen corresponding path program 1 times [2018-07-24 01:06:44,193 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:06:44,193 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:06:44,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:06:44,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:06:44,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:06:44,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:06:47,064 INFO L134 CoverageAnalysis]: Checked inductivity of 4161 backedges. 2745 proven. 0 refuted. 0 times theorem prover too weak. 1416 trivial. 0 not checked. [2018-07-24 01:06:47,064 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:06:47,065 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-07-24 01:06:47,066 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:06:47,066 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:06:47,066 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:06:47,067 INFO L87 Difference]: Start difference. First operand 85690 states and 87748 transitions. Second operand 4 states. [2018-07-24 01:06:51,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:06:51,843 INFO L93 Difference]: Finished difference Result 171378 states and 175510 transitions. [2018-07-24 01:06:51,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 01:06:51,845 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 1943 [2018-07-24 01:06:51,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:06:51,933 INFO L225 Difference]: With dead ends: 171378 [2018-07-24 01:06:51,933 INFO L226 Difference]: Without dead ends: 86381 [2018-07-24 01:06:51,968 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:06:52,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86381 states. [2018-07-24 01:06:52,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86381 to 84999. [2018-07-24 01:06:52,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84999 states. [2018-07-24 01:06:52,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84999 states to 84999 states and 86729 transitions. [2018-07-24 01:06:52,718 INFO L78 Accepts]: Start accepts. Automaton has 84999 states and 86729 transitions. Word has length 1943 [2018-07-24 01:06:52,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:06:52,719 INFO L471 AbstractCegarLoop]: Abstraction has 84999 states and 86729 transitions. [2018-07-24 01:06:52,719 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:06:52,719 INFO L276 IsEmpty]: Start isEmpty. Operand 84999 states and 86729 transitions. [2018-07-24 01:06:52,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1945 [2018-07-24 01:06:52,775 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:06:52,776 INFO L353 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:06:52,777 INFO L414 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:06:52,777 INFO L82 PathProgramCache]: Analyzing trace with hash 1598616683, now seen corresponding path program 1 times [2018-07-24 01:06:52,777 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:06:52,777 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:06:52,778 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:06:52,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:06:52,778 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:06:52,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:06:55,219 INFO L134 CoverageAnalysis]: Checked inductivity of 4169 backedges. 2475 proven. 0 refuted. 0 times theorem prover too weak. 1694 trivial. 0 not checked. [2018-07-24 01:06:55,219 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:06:55,220 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-07-24 01:06:55,221 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:06:55,221 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:06:55,221 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:06:55,221 INFO L87 Difference]: Start difference. First operand 84999 states and 86729 transitions. Second operand 4 states. [2018-07-24 01:06:59,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:06:59,464 INFO L93 Difference]: Finished difference Result 169305 states and 172764 transitions. [2018-07-24 01:06:59,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 01:06:59,465 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 1944 [2018-07-24 01:06:59,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:06:59,545 INFO L225 Difference]: With dead ends: 169305 [2018-07-24 01:06:59,545 INFO L226 Difference]: Without dead ends: 84999 [2018-07-24 01:06:59,587 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:06:59,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84999 states. [2018-07-24 01:07:00,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84999 to 84999. [2018-07-24 01:07:00,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84999 states. [2018-07-24 01:07:00,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84999 states to 84999 states and 86599 transitions. [2018-07-24 01:07:00,721 INFO L78 Accepts]: Start accepts. Automaton has 84999 states and 86599 transitions. Word has length 1944 [2018-07-24 01:07:00,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:07:00,723 INFO L471 AbstractCegarLoop]: Abstraction has 84999 states and 86599 transitions. [2018-07-24 01:07:00,723 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:07:00,723 INFO L276 IsEmpty]: Start isEmpty. Operand 84999 states and 86599 transitions. [2018-07-24 01:07:00,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2006 [2018-07-24 01:07:00,786 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:07:00,787 INFO L353 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:07:00,787 INFO L414 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:07:00,788 INFO L82 PathProgramCache]: Analyzing trace with hash -1902165143, now seen corresponding path program 1 times [2018-07-24 01:07:00,788 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:07:00,788 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:07:00,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:07:00,789 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:07:00,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:07:00,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:07:02,019 WARN L169 SmtUtils]: Spent 194.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 8 [2018-07-24 01:07:03,438 INFO L134 CoverageAnalysis]: Checked inductivity of 3865 backedges. 2793 proven. 0 refuted. 0 times theorem prover too weak. 1072 trivial. 0 not checked. [2018-07-24 01:07:03,439 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:07:03,439 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-07-24 01:07:03,440 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:07:03,440 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:07:03,440 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:07:03,441 INFO L87 Difference]: Start difference. First operand 84999 states and 86599 transitions. Second operand 4 states. [2018-07-24 01:07:08,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:07:08,525 INFO L93 Difference]: Finished difference Result 184507 states and 188185 transitions. [2018-07-24 01:07:08,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 01:07:08,525 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 2005 [2018-07-24 01:07:08,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:07:08,628 INFO L225 Difference]: With dead ends: 184507 [2018-07-24 01:07:08,629 INFO L226 Difference]: Without dead ends: 100201 [2018-07-24 01:07:08,674 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:07:08,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100201 states. [2018-07-24 01:07:09,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100201 to 99510. [2018-07-24 01:07:09,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99510 states. [2018-07-24 01:07:09,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99510 states to 99510 states and 101154 transitions. [2018-07-24 01:07:09,547 INFO L78 Accepts]: Start accepts. Automaton has 99510 states and 101154 transitions. Word has length 2005 [2018-07-24 01:07:09,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:07:09,548 INFO L471 AbstractCegarLoop]: Abstraction has 99510 states and 101154 transitions. [2018-07-24 01:07:09,548 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:07:09,548 INFO L276 IsEmpty]: Start isEmpty. Operand 99510 states and 101154 transitions. [2018-07-24 01:07:09,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2135 [2018-07-24 01:07:09,608 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:07:09,609 INFO L353 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:07:09,609 INFO L414 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:07:09,610 INFO L82 PathProgramCache]: Analyzing trace with hash 503151644, now seen corresponding path program 1 times [2018-07-24 01:07:09,610 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:07:09,610 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:07:09,611 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:07:09,611 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:07:09,611 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:07:09,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:07:12,339 INFO L134 CoverageAnalysis]: Checked inductivity of 4970 backedges. 3212 proven. 0 refuted. 0 times theorem prover too weak. 1758 trivial. 0 not checked. [2018-07-24 01:07:12,339 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-24 01:07:12,339 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-07-24 01:07:12,340 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-24 01:07:12,341 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-24 01:07:12,341 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:07:12,341 INFO L87 Difference]: Start difference. First operand 99510 states and 101154 transitions. Second operand 4 states. [2018-07-24 01:07:17,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-24 01:07:17,826 INFO L93 Difference]: Finished difference Result 199018 states and 202307 transitions. [2018-07-24 01:07:17,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-24 01:07:17,827 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 2134 [2018-07-24 01:07:17,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-24 01:07:17,928 INFO L225 Difference]: With dead ends: 199018 [2018-07-24 01:07:17,928 INFO L226 Difference]: Without dead ends: 100201 [2018-07-24 01:07:17,978 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-07-24 01:07:18,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100201 states. [2018-07-24 01:07:19,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100201 to 97437. [2018-07-24 01:07:19,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97437 states. [2018-07-24 01:07:19,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97437 states to 97437 states and 98881 transitions. [2018-07-24 01:07:19,190 INFO L78 Accepts]: Start accepts. Automaton has 97437 states and 98881 transitions. Word has length 2134 [2018-07-24 01:07:19,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-24 01:07:19,191 INFO L471 AbstractCegarLoop]: Abstraction has 97437 states and 98881 transitions. [2018-07-24 01:07:19,191 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-24 01:07:19,191 INFO L276 IsEmpty]: Start isEmpty. Operand 97437 states and 98881 transitions. [2018-07-24 01:07:19,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2193 [2018-07-24 01:07:19,262 INFO L345 BasicCegarLoop]: Found error trace [2018-07-24 01:07:19,263 INFO L353 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-24 01:07:19,263 INFO L414 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0AssertViolationERROR_FUNCTION]=== [2018-07-24 01:07:19,263 INFO L82 PathProgramCache]: Analyzing trace with hash 437704272, now seen corresponding path program 1 times [2018-07-24 01:07:19,263 INFO L221 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-07-24 01:07:19,264 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-07-24 01:07:19,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:07:19,264 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:07:19,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-24 01:07:19,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:07:23,022 INFO L134 CoverageAnalysis]: Checked inductivity of 4626 backedges. 3628 proven. 249 refuted. 0 times theorem prover too weak. 749 trivial. 0 not checked. [2018-07-24 01:07:23,022 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-24 01:07:23,022 INFO L221 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-24 01:07:23,029 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-24 01:07:23,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-24 01:07:23,679 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-24 01:07:26,066 WARN L1010 $PredicateComparison]: unable to prove that (or (exists ((v_prenex_29 Int)) (let ((.cse0 (mod v_prenex_29 55))) (let ((.cse2 (+ .cse0 329))) (let ((.cse1 (+ (* 48 (div .cse2 5)) 48))) (and (< 417 v_prenex_29) (< (+ .cse0 274) 0) (<= (div .cse1 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 .cse1) (= .cse0 0) (not (= 0 (mod (+ .cse0 4) 5))) (< .cse2 0)))))) (exists ((v_prenex_46 Int)) (let ((.cse3 (mod v_prenex_46 55))) (let ((.cse5 (div (+ .cse3 274) 5))) (let ((.cse4 (* 48 .cse5))) (and (< v_prenex_46 0) (not (= .cse3 0)) (< .cse4 0) (< 417 v_prenex_46) (not (= 0 (mod (* 8 .cse5) 10))) (<= (+ (div .cse4 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= 0 (mod (+ .cse3 4) 5))))))) (exists ((v_prenex_2 Int)) (let ((.cse7 (mod v_prenex_2 55))) (let ((.cse8 (+ .cse7 274))) (let ((.cse6 (* 48 (div .cse8 5)))) (and (< 417 v_prenex_2) (<= 0 .cse6) (not (= .cse7 0)) (not (= 0 (mod (+ .cse7 4) 5))) (<= (div .cse6 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< (+ .cse7 329) 0) (< v_prenex_2 0) (<= 0 .cse8)))))) (exists ((v_prenex_2 Int)) (let ((.cse10 (mod v_prenex_2 55))) (let ((.cse11 (+ .cse10 329))) (let ((.cse9 (div .cse11 5))) (and (= (mod (+ (* 8 .cse9) 8) 10) 0) (< 417 v_prenex_2) (<= (div (+ (* 48 .cse9) 48) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= 0 (mod (+ .cse10 4) 5))) (< .cse11 0) (<= 0 v_prenex_2) (<= 0 (+ .cse10 274))))))) (exists ((v_prenex_3 Int)) (let ((.cse13 (mod v_prenex_3 55))) (let ((.cse14 (+ .cse13 329))) (let ((.cse12 (* 48 (div .cse14 5)))) (and (<= 0 .cse12) (<= 0 v_prenex_3) (< 417 v_prenex_3) (= 0 (mod (+ .cse13 4) 5)) (<= (div .cse12 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 .cse14)))))) (exists ((v_prenex_35 Int)) (let ((.cse17 (mod v_prenex_35 55))) (let ((.cse15 (+ .cse17 329))) (let ((.cse16 (div .cse15 5))) (and (<= 0 .cse15) (= 0 (mod (* 8 .cse16) 10)) (<= (div (* 48 .cse16) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 v_prenex_35) (= 0 (mod (+ .cse17 4) 5)) (< 417 v_prenex_35)))))) (exists ((v_prenex_18 Int)) (let ((.cse20 (mod v_prenex_18 55))) (let ((.cse19 (+ .cse20 274))) (let ((.cse18 (div .cse19 5))) (let ((.cse21 (* 48 .cse18))) (and (not (= 0 (mod (* 8 .cse18) 10))) (<= 0 .cse19) (not (= .cse20 0)) (<= 0 (+ .cse20 329)) (< 417 v_prenex_18) (< v_prenex_18 0) (< .cse21 0) (<= (+ (div .cse21 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0))))))) (exists ((v_prenex_6 Int)) (let ((.cse23 (mod v_prenex_6 55))) (let ((.cse22 (* 48 (div (+ .cse23 329) 5)))) (and (<= (div .cse22 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< 417 v_prenex_6) (<= 0 .cse22) (<= 0 v_prenex_6) (= 0 (mod (+ .cse23 4) 5)))))) (exists ((v_prenex_31 Int)) (let ((.cse27 (mod v_prenex_31 55))) (let ((.cse24 (+ .cse27 329))) (let ((.cse26 (div .cse24 5))) (let ((.cse25 (* 48 .cse26))) (and (<= 0 .cse24) (< 417 v_prenex_31) (<= (+ (div .cse25 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= 0 (mod (* 8 .cse26) 10))) (<= 0 (+ .cse27 274)) (< .cse25 0) (<= 0 v_prenex_31))))))) (exists ((v_prenex_12 Int)) (let ((.cse30 (mod v_prenex_12 55))) (let ((.cse29 (+ .cse30 329))) (let ((.cse31 (div .cse29 5))) (let ((.cse28 (* 48 .cse31))) (and (<= 0 v_prenex_12) (<= (+ (div .cse28 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 .cse29) (< .cse28 0) (= 0 (mod (+ .cse30 4) 5)) (not (= 0 (mod (* 8 .cse31) 10))) (< 417 v_prenex_12))))))) (exists ((v_prenex_37 Int)) (let ((.cse32 (mod v_prenex_37 55))) (let ((.cse33 (div (+ .cse32 329) 5))) (and (<= 0 (+ .cse32 274)) (<= (div (* 48 .cse33) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= .cse32 0) (< 417 v_prenex_37) (= 0 (mod (+ .cse32 4) 5)) (= 0 (mod (* 8 .cse33) 10)))))) (exists ((v_prenex_13 Int)) (let ((.cse35 (mod v_prenex_13 55))) (let ((.cse36 (+ .cse35 329))) (let ((.cse37 (div .cse36 5))) (let ((.cse34 (* 48 .cse37))) (and (<= (+ (div .cse34 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< .cse34 0) (= .cse35 0) (<= 0 .cse36) (< 417 v_prenex_13) (< (+ .cse35 274) 0) (not (= 0 (mod (+ .cse35 4) 5))) (not (= 0 (mod (* 8 .cse37) 10))))))))) (exists ((v_prenex_41 Int)) (let ((.cse38 (mod v_prenex_41 55))) (let ((.cse39 (div (+ .cse38 274) 5))) (and (< v_prenex_41 0) (< 417 v_prenex_41) (not (= .cse38 0)) (<= (div (* 48 .cse39) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= 0 (mod (+ .cse38 4) 5)) (= 0 (mod (* 8 .cse39) 10)) (<= 0 (+ .cse38 329)))))) (exists ((v_prenex_27 Int)) (let ((.cse40 (mod v_prenex_27 55))) (let ((.cse41 (+ .cse40 329))) (let ((.cse43 (div .cse41 5))) (let ((.cse42 (+ (* 48 .cse43) 48))) (and (< (+ .cse40 274) 0) (< .cse41 0) (< 417 v_prenex_27) (not (= 0 (mod (+ .cse40 4) 5))) (< .cse42 0) (not (= (mod (+ (* 8 .cse43) 8) 10) 0)) (<= (+ (div .cse42 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= .cse40 0))))))) (exists ((v_prenex_2 Int)) (let ((.cse44 (mod v_prenex_2 55))) (let ((.cse46 (+ .cse44 329))) (let ((.cse47 (div .cse46 5))) (let ((.cse45 (+ (* 48 .cse47) 48))) (and (< 417 v_prenex_2) (not (= 0 (mod (+ .cse44 4) 5))) (<= (+ (div .cse45 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< .cse46 0) (not (= (mod (+ (* 8 .cse47) 8) 10) 0)) (<= 0 v_prenex_2) (<= 0 (+ .cse44 274)) (< .cse45 0))))))) (exists ((v_prenex_15 Int)) (let ((.cse48 (mod v_prenex_15 55))) (let ((.cse49 (div (+ .cse48 329) 5))) (let ((.cse50 (* 48 .cse49))) (and (= .cse48 0) (not (= 0 (mod (* 8 .cse49) 10))) (<= (+ (div .cse50 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 (+ .cse48 274)) (= 0 (mod (+ .cse48 4) 5)) (< .cse50 0) (< 417 v_prenex_15)))))) (exists ((v_prenex_7 Int)) (let ((.cse53 (mod v_prenex_7 55))) (let ((.cse51 (+ .cse53 329))) (let ((.cse54 (div .cse51 5))) (let ((.cse52 (+ (* 48 .cse54) 48))) (and (<= 0 v_prenex_7) (< .cse51 0) (<= (+ (div .cse52 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< .cse52 0) (not (= 0 (mod (+ .cse53 4) 5))) (not (= (mod (+ (* 8 .cse54) 8) 10) 0)) (< (+ .cse53 274) 0) (< 417 v_prenex_7))))))) (exists ((v_prenex_2 Int)) (let ((.cse56 (mod v_prenex_2 55))) (let ((.cse57 (+ .cse56 329))) (let ((.cse55 (+ (* 48 (div .cse57 5)) 48))) (and (< 417 v_prenex_2) (<= 0 .cse55) (<= (div .cse55 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= 0 (mod (+ .cse56 4) 5))) (< .cse57 0) (<= 0 v_prenex_2) (<= 0 (+ .cse56 274))))))) (exists ((v_prenex_43 Int)) (let ((.cse58 (mod v_prenex_43 55))) (let ((.cse60 (+ .cse58 329))) (let ((.cse59 (div .cse60 5))) (and (< (+ .cse58 274) 0) (<= (div (* 48 .cse59) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 .cse60) (< 417 v_prenex_43) (not (= 0 (mod (+ .cse58 4) 5))) (= 0 (mod (* 8 .cse59) 10)) (<= 0 v_prenex_43)))))) (exists ((v_prenex_9 Int)) (let ((.cse61 (mod v_prenex_9 55))) (let ((.cse62 (* 48 (div (+ .cse61 329) 5)))) (and (< 417 v_prenex_9) (= 0 (mod (+ .cse61 4) 5)) (<= 0 .cse62) (<= 0 (+ .cse61 274)) (<= 0 v_prenex_9) (<= (div .cse62 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0))))) (exists ((v_prenex_26 Int)) (let ((.cse63 (mod v_prenex_26 55))) (let ((.cse64 (div (+ .cse63 329) 5))) (and (= 0 (mod (+ .cse63 4) 5)) (<= 0 (+ .cse63 274)) (<= (div (* 48 .cse64) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= 0 (mod (* 8 .cse64) 10)) (<= 0 v_prenex_26) (< 417 v_prenex_26))))) (exists ((v_prenex_43 Int)) (let ((.cse65 (mod v_prenex_43 55))) (let ((.cse67 (+ .cse65 329))) (let ((.cse66 (* 48 (div .cse67 5)))) (and (< (+ .cse65 274) 0) (<= (div .cse66 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 .cse67) (< 417 v_prenex_43) (not (= 0 (mod (+ .cse65 4) 5))) (<= 0 .cse66) (<= 0 v_prenex_43)))))) (exists ((v_prenex_48 Int)) (let ((.cse69 (mod v_prenex_48 55))) (let ((.cse70 (+ .cse69 274))) (let ((.cse71 (div .cse70 5))) (let ((.cse68 (+ (* 48 .cse71) 48))) (and (<= (+ (div .cse68 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= .cse69 0)) (< .cse70 0) (< v_prenex_48 0) (< .cse68 0) (< 417 v_prenex_48) (not (= 0 (mod (+ (* 8 .cse71) 8) 10))) (<= 0 (+ .cse69 329)) (not (= 0 (mod (+ .cse69 4) 5))))))))) (exists ((v_prenex_30 Int)) (let ((.cse73 (mod v_prenex_30 55))) (let ((.cse74 (div (+ .cse73 329) 5))) (let ((.cse72 (* 48 .cse74))) (and (< 417 v_prenex_30) (<= (+ (div .cse72 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 v_prenex_30) (< .cse72 0) (= 0 (mod (+ .cse73 4) 5)) (not (= 0 (mod (* 8 .cse74) 10)))))))) (exists ((v_prenex_5 Int)) (let ((.cse76 (mod v_prenex_5 55))) (let ((.cse77 (div (+ .cse76 329) 5))) (let ((.cse75 (* 48 .cse77))) (and (< .cse75 0) (< 417 v_prenex_5) (= .cse76 0) (= 0 (mod (+ .cse76 4) 5)) (not (= 0 (mod (* 8 .cse77) 10))) (<= (+ (div .cse75 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0)))))) (exists ((v_prenex_19 Int)) (let ((.cse79 (mod v_prenex_19 55))) (let ((.cse80 (+ .cse79 274))) (let ((.cse78 (div .cse80 5))) (and (<= (div (+ (* 48 .cse78) 48) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 (+ .cse79 329)) (= 0 (mod (+ (* 8 .cse78) 8) 10)) (not (= 0 (mod (+ .cse79 4) 5))) (not (= .cse79 0)) (< v_prenex_19 0) (< .cse80 0) (< 417 v_prenex_19)))))) (exists ((v_prenex_47 Int)) (let ((.cse83 (mod v_prenex_47 55))) (let ((.cse81 (div (+ .cse83 329) 5))) (let ((.cse82 (* 48 .cse81))) (and (not (= 0 (mod (* 8 .cse81) 10))) (<= (+ (div .cse82 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< 417 v_prenex_47) (< .cse82 0) (<= 0 (+ .cse83 274)) (<= 0 v_prenex_47) (= 0 (mod (+ .cse83 4) 5))))))) (exists ((v_prenex_45 Int)) (let ((.cse85 (mod v_prenex_45 55))) (let ((.cse86 (+ .cse85 329))) (let ((.cse87 (div .cse86 5))) (let ((.cse84 (* 48 .cse87))) (and (< .cse84 0) (= .cse85 0) (< 417 v_prenex_45) (<= 0 .cse86) (<= 0 (+ .cse85 274)) (<= (+ (div .cse84 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= 0 (mod (* 8 .cse87) 10))))))))) (exists ((v_prenex_11 Int)) (let ((.cse90 (mod v_prenex_11 55))) (let ((.cse89 (+ .cse90 329))) (let ((.cse88 (div .cse89 5))) (and (= 0 (mod (* 8 .cse88) 10)) (<= 0 .cse89) (<= 0 (+ .cse90 274)) (= .cse90 0) (< 417 v_prenex_11) (<= (div (* 48 .cse88) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0)))))) (exists ((v_prenex_42 Int)) (let ((.cse92 (mod v_prenex_42 55))) (let ((.cse91 (+ .cse92 329))) (let ((.cse93 (div .cse91 5))) (and (<= 0 .cse91) (= 0 (mod (+ .cse92 4) 5)) (<= (div (* 48 .cse93) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= 0 (mod (* 8 .cse93) 10)) (< 417 v_prenex_42) (= .cse92 0)))))) (exists ((v_prenex_32 Int)) (let ((.cse95 (mod v_prenex_32 55))) (let ((.cse94 (* 48 (div (+ .cse95 274) 5)))) (and (<= 0 .cse94) (not (= .cse95 0)) (< v_prenex_32 0) (< 417 v_prenex_32) (= 0 (mod (+ .cse95 4) 5)) (<= (div .cse94 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0))))) (exists ((v_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0_1864 Int)) (let ((.cse97 (mod v_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0_1864 55))) (let ((.cse96 (+ .cse97 329))) (let ((.cse98 (* 48 (div .cse96 5)))) (and (< 417 v_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0_1864) (<= 0 .cse96) (<= 0 (+ .cse97 274)) (<= (div .cse98 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 .cse98) (<= 0 v_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0_1864)))))) (exists ((v_prenex_17 Int)) (let ((.cse99 (mod v_prenex_17 55))) (let ((.cse100 (* 48 (div (+ .cse99 329) 5)))) (and (<= 0 (+ .cse99 274)) (= .cse99 0) (< 417 v_prenex_17) (<= 0 .cse100) (= 0 (mod (+ .cse99 4) 5)) (<= (div .cse100 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0))))) (exists ((v_prenex_44 Int)) (let ((.cse101 (mod v_prenex_44 55))) (let ((.cse102 (+ .cse101 274))) (let ((.cse103 (+ (* 48 (div .cse102 5)) 48))) (and (not (= 0 (mod (+ .cse101 4) 5))) (< .cse102 0) (<= 0 .cse103) (< 417 v_prenex_44) (< v_prenex_44 0) (<= (div .cse103 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= .cse101 0)) (< (+ .cse101 329) 0)))))) (exists ((v_prenex_28 Int)) (let ((.cse105 (mod v_prenex_28 55))) (let ((.cse106 (+ .cse105 329))) (let ((.cse104 (div .cse106 5))) (and (= (mod (+ (* 8 .cse104) 8) 10) 0) (< 417 v_prenex_28) (< (+ .cse105 274) 0) (<= (div (+ (* 48 .cse104) 48) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 v_prenex_28) (not (= 0 (mod (+ .cse105 4) 5))) (< .cse106 0)))))) (exists ((v_prenex_2 Int)) (let ((.cse107 (mod v_prenex_2 55))) (let ((.cse109 (+ .cse107 329))) (let ((.cse110 (div .cse109 5))) (let ((.cse108 (+ (* 48 .cse110) 48))) (and (< 417 v_prenex_2) (not (= 0 (mod (+ .cse107 4) 5))) (= .cse107 0) (<= (+ (div .cse108 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< .cse109 0) (not (= (mod (+ (* 8 .cse110) 8) 10) 0)) (<= 0 (+ .cse107 274)) (< .cse108 0))))))) (exists ((v_prenex_39 Int)) (let ((.cse111 (mod v_prenex_39 55))) (let ((.cse113 (+ .cse111 329))) (let ((.cse112 (* 48 (div .cse113 5)))) (and (<= 0 (+ .cse111 274)) (<= 0 .cse112) (<= (div .cse112 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 .cse113) (< 417 v_prenex_39) (= .cse111 0)))))) (exists ((v_prenex_22 Int)) (let ((.cse115 (mod v_prenex_22 55))) (let ((.cse116 (+ .cse115 329))) (let ((.cse117 (div .cse116 5))) (let ((.cse114 (* 48 .cse117))) (and (<= (+ (div .cse114 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< 417 v_prenex_22) (= 0 (mod (+ .cse115 4) 5)) (< .cse114 0) (<= 0 .cse116) (= .cse115 0) (not (= 0 (mod (* 8 .cse117) 10))))))))) (exists ((v_prenex_43 Int)) (let ((.cse118 (mod v_prenex_43 55))) (let ((.cse119 (+ .cse118 329))) (let ((.cse121 (div .cse119 5))) (let ((.cse120 (* 48 .cse121))) (and (< (+ .cse118 274) 0) (<= 0 .cse119) (< 417 v_prenex_43) (< .cse120 0) (not (= 0 (mod (+ .cse118 4) 5))) (not (= 0 (mod (* 8 .cse121) 10))) (<= (+ (div .cse120 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 v_prenex_43))))))) (exists ((v_prenex_2 Int)) (let ((.cse123 (mod v_prenex_2 55))) (let ((.cse125 (+ .cse123 274))) (let ((.cse124 (div .cse125 5))) (let ((.cse122 (* 48 .cse124))) (and (< 417 v_prenex_2) (< .cse122 0) (not (= .cse123 0)) (not (= 0 (mod (+ .cse123 4) 5))) (not (= 0 (mod (* 8 .cse124) 10))) (< (+ .cse123 329) 0) (< v_prenex_2 0) (<= 0 .cse125) (<= (+ (div .cse122 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0))))))) (exists ((v_prenex_50 Int)) (let ((.cse127 (mod v_prenex_50 55))) (let ((.cse129 (+ .cse127 274))) (let ((.cse128 (div .cse129 5))) (let ((.cse126 (+ (* 48 .cse128) 48))) (and (< .cse126 0) (not (= .cse127 0)) (< v_prenex_50 0) (not (= 0 (mod (+ (* 8 .cse128) 8) 10))) (< 417 v_prenex_50) (< .cse129 0) (not (= 0 (mod (+ .cse127 4) 5))) (<= (+ (div .cse126 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< (+ .cse127 329) 0))))))) (exists ((v_prenex_38 Int)) (let ((.cse130 (mod v_prenex_38 55))) (let ((.cse132 (+ .cse130 274))) (let ((.cse133 (div .cse132 5))) (let ((.cse131 (* 48 .cse133))) (and (< 417 v_prenex_38) (= 0 (mod (+ .cse130 4) 5)) (<= (+ (div .cse131 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< v_prenex_38 0) (< .cse131 0) (<= 0 .cse132) (not (= .cse130 0)) (not (= 0 (mod (* 8 .cse133) 10))))))))) (exists ((v_prenex_2 Int)) (let ((.cse134 (mod v_prenex_2 55))) (let ((.cse136 (+ .cse134 274))) (let ((.cse135 (div .cse136 5))) (and (< 417 v_prenex_2) (not (= .cse134 0)) (not (= 0 (mod (+ .cse134 4) 5))) (<= (div (* 48 .cse135) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= 0 (mod (* 8 .cse135) 10)) (< (+ .cse134 329) 0) (< v_prenex_2 0) (<= 0 .cse136)))))) (exists ((v_prenex_40 Int)) (let ((.cse138 (mod v_prenex_40 55))) (let ((.cse139 (+ .cse138 274))) (let ((.cse137 (div .cse139 5))) (and (<= (div (* 48 .cse137) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= .cse138 0)) (= 0 (mod (+ .cse138 4) 5)) (<= 0 .cse139) (< v_prenex_40 0) (< 417 v_prenex_40) (= 0 (mod (* 8 .cse137) 10))))))) (exists ((v_prenex_2 Int)) (let ((.cse141 (mod v_prenex_2 55))) (let ((.cse142 (+ .cse141 329))) (let ((.cse140 (div .cse142 5))) (and (= (mod (+ (* 8 .cse140) 8) 10) 0) (< 417 v_prenex_2) (<= (div (+ (* 48 .cse140) 48) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= 0 (mod (+ .cse141 4) 5))) (= .cse141 0) (< .cse142 0) (<= 0 (+ .cse141 274))))))) (exists ((v_prenex_33 Int)) (let ((.cse144 (mod v_prenex_33 55))) (let ((.cse143 (div (+ .cse144 274) 5))) (and (<= (div (* 48 .cse143) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= 0 (mod (* 8 .cse143) 10)) (< 417 v_prenex_33) (= 0 (mod (+ .cse144 4) 5)) (not (= .cse144 0)) (< v_prenex_33 0))))) (exists ((v_prenex_24 Int)) (let ((.cse146 (mod v_prenex_24 55))) (let ((.cse145 (* 48 (div (+ .cse146 274) 5)))) (and (<= (div .cse145 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< 417 v_prenex_24) (< v_prenex_24 0) (<= 0 (+ .cse146 329)) (= 0 (mod (+ .cse146 4) 5)) (not (= .cse146 0)) (<= 0 .cse145))))) (exists ((v_prenex_25 Int)) (let ((.cse149 (mod v_prenex_25 55))) (let ((.cse148 (+ .cse149 274))) (let ((.cse147 (* 48 (div .cse148 5)))) (and (<= (div .cse147 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 .cse148) (not (= .cse149 0)) (< v_prenex_25 0) (= 0 (mod (+ .cse149 4) 5)) (<= 0 .cse147) (< 417 v_prenex_25)))))) (exists ((v_prenex_1 Int)) (let ((.cse150 (mod v_prenex_1 55))) (let ((.cse151 (div (+ .cse150 329) 5))) (and (= 0 (mod (+ .cse150 4) 5)) (= .cse150 0) (<= (div (* 48 .cse151) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< 417 v_prenex_1) (= 0 (mod (* 8 .cse151) 10)))))) (exists ((v_prenex_23 Int)) (let ((.cse152 (mod v_prenex_23 55))) (let ((.cse153 (* 48 (div (+ .cse152 329) 5)))) (and (= .cse152 0) (= 0 (mod (+ .cse152 4) 5)) (<= 0 .cse153) (<= (div .cse153 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< 417 v_prenex_23))))) (exists ((v_prenex_21 Int)) (let ((.cse155 (mod v_prenex_21 55))) (let ((.cse156 (+ .cse155 274))) (let ((.cse154 (div .cse156 5))) (and (<= (div (* 48 .cse154) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= 0 (mod (* 8 .cse154) 10)) (< v_prenex_21 0) (<= 0 (+ .cse155 329)) (< 417 v_prenex_21) (not (= .cse155 0)) (<= 0 .cse156)))))) (exists ((v_prenex_36 Int)) (let ((.cse158 (mod v_prenex_36 55))) (let ((.cse157 (div (+ .cse158 329) 5))) (and (<= (div (* 48 .cse157) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 v_prenex_36) (= 0 (mod (* 8 .cse157) 10)) (< 417 v_prenex_36) (= 0 (mod (+ .cse158 4) 5)))))) (exists ((v_prenex_49 Int)) (let ((.cse161 (mod v_prenex_49 55))) (let ((.cse160 (+ .cse161 274))) (let ((.cse159 (+ (* 48 (div .cse160 5)) 48))) (and (<= 0 .cse159) (< .cse160 0) (< 417 v_prenex_49) (not (= .cse161 0)) (<= 0 (+ .cse161 329)) (not (= 0 (mod (+ .cse161 4) 5))) (< v_prenex_49 0) (<= (div .cse159 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0)))))) (exists ((v_prenex_20 Int)) (let ((.cse162 (mod v_prenex_20 55))) (let ((.cse164 (+ .cse162 329))) (let ((.cse163 (div .cse164 5))) (and (< (+ .cse162 274) 0) (= (mod (+ (* 8 .cse163) 8) 10) 0) (< 417 v_prenex_20) (not (= 0 (mod (+ .cse162 4) 5))) (< .cse164 0) (= .cse162 0) (<= (div (+ (* 48 .cse163) 48) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0)))))) (exists ((v_prenex_13 Int)) (let ((.cse166 (mod v_prenex_13 55))) (let ((.cse167 (+ .cse166 329))) (let ((.cse165 (* 48 (div .cse167 5)))) (and (<= (div .cse165 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= .cse166 0) (<= 0 .cse167) (< 417 v_prenex_13) (< (+ .cse166 274) 0) (<= 0 .cse165) (not (= 0 (mod (+ .cse166 4) 5)))))))) (exists ((v_prenex_13 Int)) (let ((.cse169 (mod v_prenex_13 55))) (let ((.cse170 (+ .cse169 329))) (let ((.cse168 (div .cse170 5))) (and (<= (div (* 48 .cse168) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (= .cse169 0) (<= 0 .cse170) (< 417 v_prenex_13) (= 0 (mod (* 8 .cse168) 10)) (< (+ .cse169 274) 0) (not (= 0 (mod (+ .cse169 4) 5)))))))) (exists ((v_prenex_10 Int)) (let ((.cse172 (mod v_prenex_10 55))) (let ((.cse171 (+ .cse172 274))) (let ((.cse173 (* 48 (div .cse171 5)))) (and (<= 0 .cse171) (< 417 v_prenex_10) (< v_prenex_10 0) (not (= .cse172 0)) (<= 0 (+ .cse172 329)) (<= 0 .cse173) (<= (div .cse173 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0)))))) (exists ((v_prenex_14 Int)) (let ((.cse174 (mod v_prenex_14 55))) (let ((.cse176 (+ .cse174 329))) (let ((.cse175 (div .cse176 5))) (and (<= 0 (+ .cse174 274)) (<= (div (* 48 .cse175) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (<= 0 .cse176) (= 0 (mod (* 8 .cse175) 10)) (< 417 v_prenex_14) (<= 0 v_prenex_14)))))) (exists ((v_prenex_34 Int)) (let ((.cse177 (mod v_prenex_34 55))) (let ((.cse179 (div (+ .cse177 274) 5))) (let ((.cse178 (* 48 .cse179))) (and (< 417 v_prenex_34) (<= 0 (+ .cse177 329)) (< .cse178 0) (< v_prenex_34 0) (<= (+ (div .cse178 10) 1) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= .cse177 0)) (= 0 (mod (+ .cse177 4) 5)) (not (= 0 (mod (* 8 .cse179) 10)))))))) (exists ((v_prenex_16 Int)) (let ((.cse182 (mod v_prenex_16 55))) (let ((.cse181 (+ .cse182 274))) (let ((.cse180 (div .cse181 5))) (and (= 0 (mod (+ (* 8 .cse180) 8) 10)) (< v_prenex_16 0) (< .cse181 0) (< 417 v_prenex_16) (<= (div (+ (* 48 .cse180) 48) 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= 0 (mod (+ .cse182 4) 5))) (not (= .cse182 0)) (< (+ .cse182 329) 0)))))) (exists ((v_prenex_8 Int)) (let ((.cse183 (mod v_prenex_8 55))) (let ((.cse185 (+ .cse183 329))) (let ((.cse184 (+ (* 48 (div .cse185 5)) 48))) (and (< 417 v_prenex_8) (< (+ .cse183 274) 0) (<= 0 .cse184) (<= 0 v_prenex_8) (not (= 0 (mod (+ .cse183 4) 5))) (< .cse185 0) (<= (div .cse184 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0)))))) (exists ((v_prenex_2 Int)) (let ((.cse187 (mod v_prenex_2 55))) (let ((.cse188 (+ .cse187 329))) (let ((.cse186 (+ (* 48 (div .cse188 5)) 48))) (and (< 417 v_prenex_2) (<= 0 .cse186) (<= (div .cse186 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (not (= 0 (mod (+ .cse187 4) 5))) (= .cse187 0) (< .cse188 0) (<= 0 (+ .cse187 274))))))) (exists ((v_prenex_4 Int)) (let ((.cse191 (mod v_prenex_4 55))) (let ((.cse189 (+ .cse191 329))) (let ((.cse190 (* 48 (div .cse189 5)))) (and (<= 0 .cse189) (<= (div .cse190 10) c_~__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_eca_rers_____Problem___label___false_unreach_call_c__a3~0) (< 417 v_prenex_4) (= 0 (mod (+ .cse191 4) 5)) (= .cse191 0) (<= 0 .cse190))))))) is different from false [2018-07-24 01:07:27,221 WARN L169 SmtUtils]: Spent 738.00 ms on a formula simplification. DAG size of input: 1312 DAG size of output: 27 [2018-07-24 01:07:30,283 INFO L134 CoverageAnalysis]: Checked inductivity of 4626 backedges. 1741 proven. 18 refuted. 0 times theorem prover too weak. 2867 trivial. 0 not checked. [2018-07-24 01:07:30,305 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-07-24 01:07:30,306 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-07-24 01:07:30,308 INFO L450 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-07-24 01:07:30,308 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-07-24 01:07:30,308 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=30, Unknown=1, NotChecked=10, Total=56 [2018-07-24 01:07:30,309 INFO L87 Difference]: Start difference. First operand 97437 states and 98881 transitions. Second operand 8 states. Received shutdown request... [2018-07-24 01:07:49,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-07-24 01:07:49,009 WARN L540 AbstractCegarLoop]: Verification canceled [2018-07-24 01:07:49,016 WARN L202 ceAbstractionStarter]: Timeout [2018-07-24 01:07:49,016 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.07 01:07:49 BoogieIcfgContainer [2018-07-24 01:07:49,016 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-07-24 01:07:49,017 INFO L168 Benchmark]: Toolchain (without parser) took 231356.78 ms. Allocated memory was 1.5 GB in the beginning and 4.0 GB in the end (delta: 2.5 GB). Free memory was 1.4 GB in the beginning and 992.7 MB in the end (delta: 409.7 MB). Peak memory consumption was 2.9 GB. Max. memory is 7.1 GB. [2018-07-24 01:07:49,018 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-07-24 01:07:49,019 INFO L168 Benchmark]: CACSL2BoogieTranslator took 2061.01 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.2 GB in the end (delta: 180.0 MB). Peak memory consumption was 180.0 MB. Max. memory is 7.1 GB. [2018-07-24 01:07:49,020 INFO L168 Benchmark]: Boogie Procedure Inliner took 304.49 ms. Allocated memory is still 1.5 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 42.3 MB). Peak memory consumption was 42.3 MB. Max. memory is 7.1 GB. [2018-07-24 01:07:49,020 INFO L168 Benchmark]: Boogie Preprocessor took 724.13 ms. Allocated memory was 1.5 GB in the beginning and 2.4 GB in the end (delta: 888.1 MB). Free memory was 1.2 GB in the beginning and 2.3 GB in the end (delta: -1.1 GB). Peak memory consumption was 108.1 MB. Max. memory is 7.1 GB. [2018-07-24 01:07:49,021 INFO L168 Benchmark]: RCFGBuilder took 6815.12 ms. Allocated memory is still 2.4 GB. Free memory was 2.3 GB in the beginning and 1.7 GB in the end (delta: 567.1 MB). Peak memory consumption was 567.1 MB. Max. memory is 7.1 GB. [2018-07-24 01:07:49,022 INFO L168 Benchmark]: TraceAbstraction took 221446.87 ms. Allocated memory was 2.4 GB in the beginning and 4.0 GB in the end (delta: 1.6 GB). Free memory was 1.7 GB in the beginning and 992.7 MB in the end (delta: 731.4 MB). Peak memory consumption was 2.3 GB. Max. memory is 7.1 GB. [2018-07-24 01:07:49,027 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 2061.01 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.2 GB in the end (delta: 180.0 MB). Peak memory consumption was 180.0 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 304.49 ms. Allocated memory is still 1.5 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 42.3 MB). Peak memory consumption was 42.3 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 724.13 ms. Allocated memory was 1.5 GB in the beginning and 2.4 GB in the end (delta: 888.1 MB). Free memory was 1.2 GB in the beginning and 2.3 GB in the end (delta: -1.1 GB). Peak memory consumption was 108.1 MB. Max. memory is 7.1 GB. * RCFGBuilder took 6815.12 ms. Allocated memory is still 2.4 GB. Free memory was 2.3 GB in the beginning and 1.7 GB in the end (delta: 567.1 MB). Peak memory consumption was 567.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 221446.87 ms. Allocated memory was 2.4 GB in the beginning and 4.0 GB in the end (delta: 1.6 GB). Free memory was 1.7 GB in the beginning and 992.7 MB in the end (delta: 731.4 MB). Peak memory consumption was 2.3 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 66]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 66). Cancelled while BasicCegarLoop was constructing difference of abstraction (97437states) and interpolant automaton (currently 13 states, 8 states before enhancement), while ReachableStatesComputation was computing reachable states (22311 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 758 locations, 1 error locations. TIMEOUT Result, 221.3s OverallTime, 18 OverallIterations, 10 TraceHistogramMax, 164.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 9611 SDtfs, 46015 SDslu, 1805 SDs, 0 SdLazy, 98301 SolverSat, 14681 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 130.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5919 GetRequests, 5801 SyntacticMatches, 19 SemanticMatches, 99 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 204 ImplicationChecksByTransitivity, 8.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=99510occurred in iteration=16, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 11.4s AutomataMinimizationTime, 17 MinimizatonAttempts, 239647 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.7s SsaConstructionTime, 2.7s SatisfiabilityAnalysisTime, 23.4s InterpolantComputationTime, 24280 NumberOfCodeBlocks, 24280 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 24258 ConstructedInterpolants, 20 QuantifiedInterpolants, 88792748 SizeOfPredicates, 1 NumberOfNonLiveVariables, 6560 ConjunctsInSsa, 10 ConjunctsInUnsatCore, 22 InterpolantComputations, 17 PerfectInterpolantSequences, 40546/42178 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/Problem18_label00_false-unreach-call.c_svcomp-Reach-64bit-Automizer_Default.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-07-24_01-07-49-040.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/Problem18_label00_false-unreach-call.c_svcomp-Reach-64bit-Automizer_Default.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-07-24_01-07-49-040.csv Completed graceful shutdown