java -Xmx8000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml --generate-csv --csv-dir csv -s ../../../trunk/examples/settings/default/taipan/svcomp-Reach-64bit-Taipan_Default-old.epf -i ../../../trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dd2f093 [2018-07-23 18:14:10,571 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-07-23 18:14:10,573 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-07-23 18:14:10,585 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-07-23 18:14:10,585 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-07-23 18:14:10,586 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-07-23 18:14:10,588 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-07-23 18:14:10,589 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-07-23 18:14:10,591 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-07-23 18:14:10,592 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-07-23 18:14:10,593 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-07-23 18:14:10,593 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-07-23 18:14:10,594 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-07-23 18:14:10,595 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-07-23 18:14:10,596 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-07-23 18:14:10,597 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-07-23 18:14:10,598 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-07-23 18:14:10,600 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-07-23 18:14:10,602 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-07-23 18:14:10,603 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-07-23 18:14:10,604 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-07-23 18:14:10,605 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-07-23 18:14:10,608 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-07-23 18:14:10,608 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-07-23 18:14:10,608 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-07-23 18:14:10,609 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-07-23 18:14:10,610 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-07-23 18:14:10,611 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-07-23 18:14:10,611 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-07-23 18:14:10,613 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-07-23 18:14:10,613 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-07-23 18:14:10,614 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-07-23 18:14:10,616 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/taipan/svcomp-Reach-64bit-Taipan_Default-old.epf [2018-07-23 18:14:10,631 INFO L110 SettingsManager]: Loading preferences was successful [2018-07-23 18:14:10,631 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-07-23 18:14:10,632 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-07-23 18:14:10,632 INFO L133 SettingsManager]: * User list type=DISABLED [2018-07-23 18:14:10,632 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-07-23 18:14:10,632 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-07-23 18:14:10,632 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-07-23 18:14:10,633 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-07-23 18:14:10,633 INFO L133 SettingsManager]: * Log string format=TERM [2018-07-23 18:14:10,633 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-07-23 18:14:10,633 INFO L133 SettingsManager]: * Interval Domain=false [2018-07-23 18:14:10,634 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-07-23 18:14:10,634 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-07-23 18:14:10,634 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-07-23 18:14:10,635 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-07-23 18:14:10,635 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-07-23 18:14:10,635 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-07-23 18:14:10,635 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-07-23 18:14:10,635 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-07-23 18:14:10,636 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-07-23 18:14:10,636 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-07-23 18:14:10,636 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-07-23 18:14:10,636 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-07-23 18:14:10,636 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-23 18:14:10,637 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-07-23 18:14:10,637 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-07-23 18:14:10,637 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-07-23 18:14:10,637 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-07-23 18:14:10,637 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-07-23 18:14:10,638 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-07-23 18:14:10,638 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-07-23 18:14:10,638 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-07-23 18:14:10,639 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-07-23 18:14:10,701 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-07-23 18:14:10,719 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-07-23 18:14:10,725 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-07-23 18:14:10,727 INFO L271 PluginConnector]: Initializing CDTParser... [2018-07-23 18:14:10,727 INFO L276 PluginConnector]: CDTParser initialized [2018-07-23 18:14:10,728 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i [2018-07-23 18:14:11,076 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0a6cdb944/4aae1f7a2fb04934acb46339563bab07/FLAG181ce8e06 [2018-07-23 18:14:11,227 INFO L276 CDTParser]: Found 1 translation units. [2018-07-23 18:14:11,228 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i [2018-07-23 18:14:11,234 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0a6cdb944/4aae1f7a2fb04934acb46339563bab07/FLAG181ce8e06 [2018-07-23 18:14:11,248 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0a6cdb944/4aae1f7a2fb04934acb46339563bab07 [2018-07-23 18:14:11,259 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-07-23 18:14:11,260 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-07-23 18:14:11,264 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-07-23 18:14:11,264 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-07-23 18:14:11,270 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-07-23 18:14:11,271 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,274 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5ea7f8fe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11, skipping insertion in model container [2018-07-23 18:14:11,274 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,418 INFO L179 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-07-23 18:14:11,452 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-23 18:14:11,467 INFO L422 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-07-23 18:14:11,473 INFO L175 PostProcessor]: Settings: Checked method=main [2018-07-23 18:14:11,485 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11 WrapperNode [2018-07-23 18:14:11,485 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-07-23 18:14:11,486 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-07-23 18:14:11,486 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-07-23 18:14:11,487 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-07-23 18:14:11,496 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,502 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,508 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-07-23 18:14:11,508 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-07-23 18:14:11,508 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-07-23 18:14:11,508 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-07-23 18:14:11,518 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,518 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,519 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,519 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,521 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,526 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,527 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (1/1) ... [2018-07-23 18:14:11,528 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-07-23 18:14:11,529 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-07-23 18:14:11,529 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-07-23 18:14:11,529 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-07-23 18:14:11,530 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-07-23 18:14:11,600 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-07-23 18:14:11,600 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-07-23 18:14:11,601 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-07-23 18:14:11,601 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-07-23 18:14:11,601 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-07-23 18:14:11,601 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-07-23 18:14:11,601 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assert [2018-07-23 18:14:11,601 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assert [2018-07-23 18:14:11,958 INFO L261 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-07-23 18:14:11,959 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.07 06:14:11 BoogieIcfgContainer [2018-07-23 18:14:11,959 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-07-23 18:14:11,960 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-07-23 18:14:11,960 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-07-23 18:14:11,963 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-07-23 18:14:11,964 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.07 06:14:11" (1/3) ... [2018-07-23 18:14:11,964 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e8973 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.07 06:14:11, skipping insertion in model container [2018-07-23 18:14:11,965 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 06:14:11" (2/3) ... [2018-07-23 18:14:11,965 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e8973 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.07 06:14:11, skipping insertion in model container [2018-07-23 18:14:11,965 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.07 06:14:11" (3/3) ... [2018-07-23 18:14:11,967 INFO L112 eAbstractionObserver]: Analyzing ICFG phases_true-unreach-call1.i [2018-07-23 18:14:11,976 INFO L132 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-07-23 18:14:11,984 INFO L144 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-07-23 18:14:12,040 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-07-23 18:14:12,042 INFO L373 AbstractCegarLoop]: Interprodecural is true [2018-07-23 18:14:12,042 INFO L374 AbstractCegarLoop]: Hoare is true [2018-07-23 18:14:12,042 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-07-23 18:14:12,042 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-07-23 18:14:12,043 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-07-23 18:14:12,043 INFO L378 AbstractCegarLoop]: Difference is false [2018-07-23 18:14:12,043 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-07-23 18:14:12,043 INFO L384 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-07-23 18:14:12,060 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states. [2018-07-23 18:14:12,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-07-23 18:14:12,065 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:12,066 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:12,066 INFO L414 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:12,072 INFO L82 PathProgramCache]: Analyzing trace with hash 1713253442, now seen corresponding path program 1 times [2018-07-23 18:14:12,075 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:12,127 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:12,127 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:12,127 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:12,127 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:12,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:12,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:12,183 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-23 18:14:12,184 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-07-23 18:14:12,184 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-23 18:14:12,189 INFO L450 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-07-23 18:14:12,203 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-07-23 18:14:12,204 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-23 18:14:12,207 INFO L87 Difference]: Start difference. First operand 19 states. Second operand 2 states. [2018-07-23 18:14:12,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:12,231 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-07-23 18:14:12,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-07-23 18:14:12,235 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-07-23 18:14:12,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:12,243 INFO L225 Difference]: With dead ends: 30 [2018-07-23 18:14:12,243 INFO L226 Difference]: Without dead ends: 13 [2018-07-23 18:14:12,247 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-07-23 18:14:12,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-07-23 18:14:12,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-07-23 18:14:12,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-07-23 18:14:12,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2018-07-23 18:14:12,281 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 10 [2018-07-23 18:14:12,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:12,282 INFO L471 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2018-07-23 18:14:12,282 INFO L472 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-07-23 18:14:12,282 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2018-07-23 18:14:12,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-07-23 18:14:12,283 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:12,283 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:12,283 INFO L414 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:12,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1144102878, now seen corresponding path program 1 times [2018-07-23 18:14:12,284 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:12,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:12,285 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:12,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:12,286 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:12,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:12,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:12,465 INFO L309 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-07-23 18:14:12,466 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-07-23 18:14:12,466 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-23 18:14:12,468 INFO L450 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-07-23 18:14:12,468 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-07-23 18:14:12,468 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-23 18:14:12,474 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand 3 states. [2018-07-23 18:14:12,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:12,546 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2018-07-23 18:14:12,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-07-23 18:14:12,547 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-07-23 18:14:12,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:12,548 INFO L225 Difference]: With dead ends: 24 [2018-07-23 18:14:12,548 INFO L226 Difference]: Without dead ends: 16 [2018-07-23 18:14:12,549 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-07-23 18:14:12,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-07-23 18:14:12,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-07-23 18:14:12,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-07-23 18:14:12,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2018-07-23 18:14:12,554 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 17 transitions. Word has length 11 [2018-07-23 18:14:12,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:12,555 INFO L471 AbstractCegarLoop]: Abstraction has 16 states and 17 transitions. [2018-07-23 18:14:12,555 INFO L472 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-07-23 18:14:12,555 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 17 transitions. [2018-07-23 18:14:12,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-07-23 18:14:12,556 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:12,556 INFO L353 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:12,556 INFO L414 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:12,556 INFO L82 PathProgramCache]: Analyzing trace with hash -2056921797, now seen corresponding path program 1 times [2018-07-23 18:14:12,556 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:12,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:12,557 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:12,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:12,558 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:12,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:12,678 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:12,681 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:12,682 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:12,682 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 15 with the following transitions: [2018-07-23 18:14:12,685 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [12], [14], [17], [26], [29], [31], [37], [38], [39], [41] [2018-07-23 18:14:12,724 INFO L148 AbstractInterpreter]: Using domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-07-23 18:14:12,724 INFO L101 FixpointEngine]: Starting fixpoint engine with domain CompoundDomain (maxUnwinding=3, maxParallelStates=2) [2018-07-23 18:14:12,803 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-07-23 18:14:13,138 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-07-23 18:14:13,142 INFO L272 AbstractInterpreter]: Visited 13 different actions 93 times. Merged at 4 different actions 42 times. Widened at 1 different actions 7 times. Found 1 fixpoints after 1 different actions. Largest state had 2 variables. [2018-07-23 18:14:13,188 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-07-23 18:14:13,188 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:13,188 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:13,210 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:13,210 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-23 18:14:13,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:13,260 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:13,323 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:13,323 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:13,407 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:13,438 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:13,438 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:14:13,458 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:13,459 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-23 18:14:13,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:13,478 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:13,501 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:13,501 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:13,552 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:13,553 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:14:13,553 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-07-23 18:14:13,553 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:14:13,554 INFO L450 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-07-23 18:14:13,554 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-07-23 18:14:13,554 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-07-23 18:14:13,555 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. Second operand 4 states. [2018-07-23 18:14:13,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:13,662 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2018-07-23 18:14:13,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-07-23 18:14:13,663 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-07-23 18:14:13,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:13,664 INFO L225 Difference]: With dead ends: 27 [2018-07-23 18:14:13,664 INFO L226 Difference]: Without dead ends: 19 [2018-07-23 18:14:13,665 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-07-23 18:14:13,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-07-23 18:14:13,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-07-23 18:14:13,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-07-23 18:14:13,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2018-07-23 18:14:13,669 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 14 [2018-07-23 18:14:13,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:13,670 INFO L471 AbstractCegarLoop]: Abstraction has 19 states and 20 transitions. [2018-07-23 18:14:13,670 INFO L472 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-07-23 18:14:13,670 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 20 transitions. [2018-07-23 18:14:13,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-07-23 18:14:13,671 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:13,671 INFO L353 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:13,671 INFO L414 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:13,672 INFO L82 PathProgramCache]: Analyzing trace with hash 1670825662, now seen corresponding path program 2 times [2018-07-23 18:14:13,672 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:13,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:13,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:13,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:13,673 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:13,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:13,921 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:13,921 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:13,922 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:13,922 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:14:13,922 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:14:13,922 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:13,922 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:13,940 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-23 18:14:13,940 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:14:13,962 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-23 18:14:13,963 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:13,964 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:13,984 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:13,985 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:14,073 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:14,096 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:14,097 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:14:14,114 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-23 18:14:14,114 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:14:14,134 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-23 18:14:14,135 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:14,138 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:14,171 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:14,172 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:14,207 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:14,212 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:14:14,212 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-07-23 18:14:14,212 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:14:14,213 INFO L450 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-07-23 18:14:14,213 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-07-23 18:14:14,213 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-07-23 18:14:14,214 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. Second operand 5 states. [2018-07-23 18:14:14,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:14,286 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-07-23 18:14:14,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-07-23 18:14:14,287 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-07-23 18:14:14,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:14,288 INFO L225 Difference]: With dead ends: 30 [2018-07-23 18:14:14,288 INFO L226 Difference]: Without dead ends: 22 [2018-07-23 18:14:14,289 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-07-23 18:14:14,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-07-23 18:14:14,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-07-23 18:14:14,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-07-23 18:14:14,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2018-07-23 18:14:14,294 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 23 transitions. Word has length 17 [2018-07-23 18:14:14,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:14,294 INFO L471 AbstractCegarLoop]: Abstraction has 22 states and 23 transitions. [2018-07-23 18:14:14,294 INFO L472 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-07-23 18:14:14,294 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2018-07-23 18:14:14,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-07-23 18:14:14,295 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:14,295 INFO L353 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:14,296 INFO L414 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:14,296 INFO L82 PathProgramCache]: Analyzing trace with hash 26004059, now seen corresponding path program 3 times [2018-07-23 18:14:14,296 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:14,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:14,297 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:14:14,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:14,297 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:14,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:14,579 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:14,579 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:14,580 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:14,580 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:14:14,580 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:14:14,580 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:14,581 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:14,590 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-23 18:14:14,590 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-23 18:14:14,597 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-07-23 18:14:14,598 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:14,599 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:14,628 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-07-23 18:14:14,628 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:14,657 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-07-23 18:14:14,678 INFO L309 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-07-23 18:14:14,678 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [6] total 8 [2018-07-23 18:14:14,679 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-07-23 18:14:14,679 INFO L450 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-07-23 18:14:14,679 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-07-23 18:14:14,680 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-07-23 18:14:14,680 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. Second operand 3 states. [2018-07-23 18:14:14,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:14,713 INFO L93 Difference]: Finished difference Result 30 states and 32 transitions. [2018-07-23 18:14:14,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-07-23 18:14:14,714 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2018-07-23 18:14:14,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:14,716 INFO L225 Difference]: With dead ends: 30 [2018-07-23 18:14:14,716 INFO L226 Difference]: Without dead ends: 25 [2018-07-23 18:14:14,717 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-07-23 18:14:14,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-07-23 18:14:14,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2018-07-23 18:14:14,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-07-23 18:14:14,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 25 transitions. [2018-07-23 18:14:14,722 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 25 transitions. Word has length 20 [2018-07-23 18:14:14,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:14,722 INFO L471 AbstractCegarLoop]: Abstraction has 24 states and 25 transitions. [2018-07-23 18:14:14,722 INFO L472 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-07-23 18:14:14,722 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 25 transitions. [2018-07-23 18:14:14,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-07-23 18:14:14,723 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:14,724 INFO L353 BasicCegarLoop]: trace histogram [5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:14,724 INFO L414 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:14,724 INFO L82 PathProgramCache]: Analyzing trace with hash -2092450784, now seen corresponding path program 1 times [2018-07-23 18:14:14,724 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:14,725 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:14,725 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:14:14,725 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:14,725 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:14,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:14,904 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:14,905 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:14,905 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:14,905 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 24 with the following transitions: [2018-07-23 18:14:14,905 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [12], [14], [17], [19], [26], [29], [31], [37], [38], [39], [41] [2018-07-23 18:14:14,907 INFO L148 AbstractInterpreter]: Using domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-07-23 18:14:14,907 INFO L101 FixpointEngine]: Starting fixpoint engine with domain CompoundDomain (maxUnwinding=3, maxParallelStates=2) [2018-07-23 18:14:14,910 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-07-23 18:14:15,147 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-07-23 18:14:15,147 INFO L272 AbstractInterpreter]: Visited 14 different actions 114 times. Merged at 5 different actions 46 times. Widened at 2 different actions 7 times. Found 12 fixpoints after 2 different actions. Largest state had 2 variables. [2018-07-23 18:14:15,178 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-07-23 18:14:15,178 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:15,178 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-07-23 18:14:15,191 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:15,191 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:15,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:15,223 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:15,403 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:15,403 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:15,853 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:15,889 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:15,889 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:14:15,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:15,917 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-23 18:14:15,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:15,944 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:15,970 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:15,970 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:16,168 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:16,170 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:14:16,170 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 7, 6, 6] total 15 [2018-07-23 18:14:16,170 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:14:16,171 INFO L450 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-07-23 18:14:16,171 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-07-23 18:14:16,171 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=133, Unknown=0, NotChecked=0, Total=210 [2018-07-23 18:14:16,172 INFO L87 Difference]: Start difference. First operand 24 states and 25 transitions. Second operand 7 states. [2018-07-23 18:14:16,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:16,334 INFO L93 Difference]: Finished difference Result 37 states and 40 transitions. [2018-07-23 18:14:16,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-07-23 18:14:16,335 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-07-23 18:14:16,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:16,336 INFO L225 Difference]: With dead ends: 37 [2018-07-23 18:14:16,336 INFO L226 Difference]: Without dead ends: 27 [2018-07-23 18:14:16,337 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 81 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=77, Invalid=133, Unknown=0, NotChecked=0, Total=210 [2018-07-23 18:14:16,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-07-23 18:14:16,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-07-23 18:14:16,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-07-23 18:14:16,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2018-07-23 18:14:16,343 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 23 [2018-07-23 18:14:16,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:16,344 INFO L471 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2018-07-23 18:14:16,344 INFO L472 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-07-23 18:14:16,344 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2018-07-23 18:14:16,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-07-23 18:14:16,345 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:16,345 INFO L353 BasicCegarLoop]: trace histogram [6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:16,345 INFO L414 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:16,346 INFO L82 PathProgramCache]: Analyzing trace with hash 1956763133, now seen corresponding path program 2 times [2018-07-23 18:14:16,346 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:16,349 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:16,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:16,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:16,350 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:16,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:16,522 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:16,522 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:16,522 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:16,523 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:14:16,523 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:14:16,523 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:16,523 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:16,531 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-23 18:14:16,531 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:14:16,552 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-23 18:14:16,552 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:16,554 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:16,579 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:16,579 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:16,780 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:16,800 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:16,800 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:14:16,816 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-23 18:14:16,816 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:14:16,839 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-23 18:14:16,839 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:16,843 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:16,858 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:16,858 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:16,867 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:16,869 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:14:16,869 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-07-23 18:14:16,869 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:14:16,869 INFO L450 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-07-23 18:14:16,870 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-07-23 18:14:16,870 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-07-23 18:14:16,870 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand 8 states. [2018-07-23 18:14:17,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:17,011 INFO L93 Difference]: Finished difference Result 40 states and 43 transitions. [2018-07-23 18:14:17,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-07-23 18:14:17,011 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-07-23 18:14:17,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:17,012 INFO L225 Difference]: With dead ends: 40 [2018-07-23 18:14:17,012 INFO L226 Difference]: Without dead ends: 30 [2018-07-23 18:14:17,013 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 96 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-07-23 18:14:17,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-07-23 18:14:17,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-07-23 18:14:17,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-07-23 18:14:17,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 31 transitions. [2018-07-23 18:14:17,018 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 31 transitions. Word has length 26 [2018-07-23 18:14:17,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:17,019 INFO L471 AbstractCegarLoop]: Abstraction has 30 states and 31 transitions. [2018-07-23 18:14:17,019 INFO L472 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-07-23 18:14:17,019 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2018-07-23 18:14:17,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-07-23 18:14:17,020 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:17,020 INFO L353 BasicCegarLoop]: trace histogram [7, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:17,021 INFO L414 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:17,021 INFO L82 PathProgramCache]: Analyzing trace with hash -657878272, now seen corresponding path program 3 times [2018-07-23 18:14:17,021 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:17,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:17,022 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:14:17,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:17,022 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:17,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:17,269 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:17,270 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:17,270 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:17,270 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:14:17,270 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:14:17,271 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:17,271 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:17,283 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-23 18:14:17,283 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-23 18:14:17,296 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-07-23 18:14:17,297 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:17,298 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:17,350 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-07-23 18:14:17,351 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:17,402 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-07-23 18:14:17,423 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:17,423 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:14:17,439 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-23 18:14:17,439 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-23 18:14:17,469 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-07-23 18:14:17,470 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:17,473 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:17,481 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-07-23 18:14:17,481 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:17,489 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-07-23 18:14:17,491 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:14:17,491 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 4, 4, 4, 4] total 13 [2018-07-23 18:14:17,491 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:14:17,492 INFO L450 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-07-23 18:14:17,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-07-23 18:14:17,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=105, Unknown=0, NotChecked=0, Total=156 [2018-07-23 18:14:17,493 INFO L87 Difference]: Start difference. First operand 30 states and 31 transitions. Second operand 11 states. [2018-07-23 18:14:17,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:17,889 INFO L93 Difference]: Finished difference Result 50 states and 57 transitions. [2018-07-23 18:14:17,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-07-23 18:14:17,892 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 29 [2018-07-23 18:14:17,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:17,893 INFO L225 Difference]: With dead ends: 50 [2018-07-23 18:14:17,893 INFO L226 Difference]: Without dead ends: 40 [2018-07-23 18:14:17,894 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 112 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-07-23 18:14:17,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-07-23 18:14:17,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 36. [2018-07-23 18:14:17,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-07-23 18:14:17,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2018-07-23 18:14:17,899 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 38 transitions. Word has length 29 [2018-07-23 18:14:17,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:17,900 INFO L471 AbstractCegarLoop]: Abstraction has 36 states and 38 transitions. [2018-07-23 18:14:17,900 INFO L472 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-07-23 18:14:17,900 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-07-23 18:14:17,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-07-23 18:14:17,901 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:17,901 INFO L353 BasicCegarLoop]: trace histogram [9, 8, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:17,901 INFO L414 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:17,902 INFO L82 PathProgramCache]: Analyzing trace with hash -249977826, now seen corresponding path program 4 times [2018-07-23 18:14:17,902 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:17,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:17,903 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:14:17,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:17,903 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:17,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:18,168 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:18,168 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:18,168 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:18,169 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:14:18,169 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:14:18,169 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:18,169 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:18,177 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-23 18:14:18,177 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-23 18:14:18,190 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-23 18:14:18,190 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:18,192 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:18,246 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-23 18:14:18,246 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:18,670 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-23 18:14:18,691 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:18,692 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:14:18,708 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-23 18:14:18,708 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-23 18:14:18,733 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-23 18:14:18,733 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:18,737 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:18,773 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-23 18:14:18,773 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:19,053 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-23 18:14:19,055 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:14:19,055 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10, 9, 9] total 25 [2018-07-23 18:14:19,055 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:14:19,055 INFO L450 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-07-23 18:14:19,055 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-07-23 18:14:19,056 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=201, Invalid=399, Unknown=0, NotChecked=0, Total=600 [2018-07-23 18:14:19,056 INFO L87 Difference]: Start difference. First operand 36 states and 38 transitions. Second operand 11 states. [2018-07-23 18:14:19,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:19,190 INFO L93 Difference]: Finished difference Result 52 states and 57 transitions. [2018-07-23 18:14:19,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-07-23 18:14:19,190 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-07-23 18:14:19,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:19,192 INFO L225 Difference]: With dead ends: 52 [2018-07-23 18:14:19,192 INFO L226 Difference]: Without dead ends: 39 [2018-07-23 18:14:19,193 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 123 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=201, Invalid=399, Unknown=0, NotChecked=0, Total=600 [2018-07-23 18:14:19,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-07-23 18:14:19,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-07-23 18:14:19,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-07-23 18:14:19,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 41 transitions. [2018-07-23 18:14:19,197 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 41 transitions. Word has length 35 [2018-07-23 18:14:19,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:19,198 INFO L471 AbstractCegarLoop]: Abstraction has 39 states and 41 transitions. [2018-07-23 18:14:19,198 INFO L472 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-07-23 18:14:19,198 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 41 transitions. [2018-07-23 18:14:19,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-07-23 18:14:19,199 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:19,199 INFO L353 BasicCegarLoop]: trace histogram [10, 9, 7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:19,199 INFO L414 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:19,199 INFO L82 PathProgramCache]: Analyzing trace with hash 1580391035, now seen corresponding path program 5 times [2018-07-23 18:14:19,200 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:19,200 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:19,201 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:14:19,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:19,201 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:19,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:19,564 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:19,565 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:19,565 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:19,565 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:14:19,565 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:14:19,565 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:19,565 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:19,574 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-23 18:14:19,574 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:14:51,864 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-07-23 18:14:51,865 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:52,106 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:52,362 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 18 proven. 108 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:52,363 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:52,948 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 18 proven. 108 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:52,952 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:52,952 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:14:52,967 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-23 18:14:52,967 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:14:53,070 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-07-23 18:14:53,070 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:53,073 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:53,091 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-23 18:14:53,091 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:53,695 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-07-23 18:14:53,699 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:14:53,700 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 12, 10, 10] total 29 [2018-07-23 18:14:53,700 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:14:53,700 INFO L450 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-07-23 18:14:53,700 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-07-23 18:14:53,701 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=254, Invalid=558, Unknown=0, NotChecked=0, Total=812 [2018-07-23 18:14:53,702 INFO L87 Difference]: Start difference. First operand 39 states and 41 transitions. Second operand 12 states. [2018-07-23 18:14:54,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:54,204 INFO L93 Difference]: Finished difference Result 55 states and 60 transitions. [2018-07-23 18:14:54,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-07-23 18:14:54,204 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-07-23 18:14:54,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:54,206 INFO L225 Difference]: With dead ends: 55 [2018-07-23 18:14:54,206 INFO L226 Difference]: Without dead ends: 42 [2018-07-23 18:14:54,207 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 132 SyntacticMatches, 4 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=254, Invalid=558, Unknown=0, NotChecked=0, Total=812 [2018-07-23 18:14:54,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-07-23 18:14:54,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-07-23 18:14:54,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-07-23 18:14:54,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 44 transitions. [2018-07-23 18:14:54,213 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 44 transitions. Word has length 38 [2018-07-23 18:14:54,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:54,213 INFO L471 AbstractCegarLoop]: Abstraction has 42 states and 44 transitions. [2018-07-23 18:14:54,213 INFO L472 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-07-23 18:14:54,214 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 44 transitions. [2018-07-23 18:14:54,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-07-23 18:14:54,215 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:54,215 INFO L353 BasicCegarLoop]: trace histogram [11, 10, 8, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:54,215 INFO L414 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:54,215 INFO L82 PathProgramCache]: Analyzing trace with hash 1194339070, now seen corresponding path program 6 times [2018-07-23 18:14:54,215 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:54,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:54,216 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:14:54,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:54,216 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:54,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:54,431 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:54,432 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:54,432 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:54,432 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:14:54,432 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:14:54,432 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:54,432 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:54,448 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-23 18:14:54,448 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-23 18:14:54,521 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-07-23 18:14:54,521 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:54,523 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:54,609 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-07-23 18:14:54,609 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:54,675 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-07-23 18:14:54,696 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:54,696 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:14:54,714 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-23 18:14:54,714 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-23 18:14:54,831 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-07-23 18:14:54,832 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:54,835 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:54,840 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-07-23 18:14:54,841 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:54,854 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-07-23 18:14:54,856 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:14:54,856 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 5, 5, 5, 5] total 19 [2018-07-23 18:14:54,856 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:14:54,856 INFO L450 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-07-23 18:14:54,856 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-07-23 18:14:54,857 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=241, Unknown=0, NotChecked=0, Total=342 [2018-07-23 18:14:54,857 INFO L87 Difference]: Start difference. First operand 42 states and 44 transitions. Second operand 16 states. [2018-07-23 18:14:56,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:56,109 INFO L93 Difference]: Finished difference Result 65 states and 74 transitions. [2018-07-23 18:14:56,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-07-23 18:14:56,110 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 41 [2018-07-23 18:14:56,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:56,112 INFO L225 Difference]: With dead ends: 65 [2018-07-23 18:14:56,112 INFO L226 Difference]: Without dead ends: 52 [2018-07-23 18:14:56,113 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 159 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=129, Invalid=291, Unknown=0, NotChecked=0, Total=420 [2018-07-23 18:14:56,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-07-23 18:14:56,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 48. [2018-07-23 18:14:56,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-07-23 18:14:56,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 51 transitions. [2018-07-23 18:14:56,118 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 51 transitions. Word has length 41 [2018-07-23 18:14:56,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:56,118 INFO L471 AbstractCegarLoop]: Abstraction has 48 states and 51 transitions. [2018-07-23 18:14:56,119 INFO L472 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-07-23 18:14:56,119 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 51 transitions. [2018-07-23 18:14:56,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-07-23 18:14:56,120 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:56,120 INFO L353 BasicCegarLoop]: trace histogram [13, 12, 9, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:56,120 INFO L414 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:56,120 INFO L82 PathProgramCache]: Analyzing trace with hash -565963040, now seen corresponding path program 7 times [2018-07-23 18:14:56,120 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:56,121 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:56,121 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:14:56,121 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:56,122 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:56,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:56,586 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:56,586 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:56,586 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:56,586 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:14:56,586 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:14:56,587 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:56,587 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:56,594 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:56,595 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-23 18:14:56,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:56,609 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:56,720 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-23 18:14:56,720 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:57,383 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-23 18:14:57,405 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:57,405 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:14:57,421 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:57,421 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-23 18:14:57,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:57,456 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:57,479 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-23 18:14:57,479 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:58,494 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-07-23 18:14:58,496 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:14:58,496 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12, 13, 12, 12] total 35 [2018-07-23 18:14:58,496 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:14:58,496 INFO L450 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-07-23 18:14:58,497 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-07-23 18:14:58,497 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=382, Invalid=808, Unknown=0, NotChecked=0, Total=1190 [2018-07-23 18:14:58,498 INFO L87 Difference]: Start difference. First operand 48 states and 51 transitions. Second operand 15 states. [2018-07-23 18:14:58,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:14:58,817 INFO L93 Difference]: Finished difference Result 67 states and 74 transitions. [2018-07-23 18:14:58,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-07-23 18:14:58,818 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2018-07-23 18:14:58,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:14:58,818 INFO L225 Difference]: With dead ends: 67 [2018-07-23 18:14:58,818 INFO L226 Difference]: Without dead ends: 51 [2018-07-23 18:14:58,820 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 165 SyntacticMatches, 4 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=382, Invalid=808, Unknown=0, NotChecked=0, Total=1190 [2018-07-23 18:14:58,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-07-23 18:14:58,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-07-23 18:14:58,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-07-23 18:14:58,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 54 transitions. [2018-07-23 18:14:58,825 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 54 transitions. Word has length 47 [2018-07-23 18:14:58,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:14:58,826 INFO L471 AbstractCegarLoop]: Abstraction has 51 states and 54 transitions. [2018-07-23 18:14:58,826 INFO L472 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-07-23 18:14:58,826 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 54 transitions. [2018-07-23 18:14:58,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-07-23 18:14:58,827 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:14:58,827 INFO L353 BasicCegarLoop]: trace histogram [14, 13, 10, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:14:58,827 INFO L414 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:14:58,827 INFO L82 PathProgramCache]: Analyzing trace with hash -1227511363, now seen corresponding path program 8 times [2018-07-23 18:14:58,828 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:14:58,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:58,828 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:14:58,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:14:58,829 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:14:58,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:14:59,083 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:59,084 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:59,084 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:14:59,084 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:14:59,084 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:14:59,085 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:59,085 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:14:59,099 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-23 18:14:59,099 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:14:59,115 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-23 18:14:59,116 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:59,117 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:59,130 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:59,130 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:59,753 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:59,778 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:14:59,778 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:14:59,793 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-23 18:14:59,793 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:14:59,826 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-23 18:14:59,826 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:14:59,829 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:14:59,864 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:59,864 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:14:59,918 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:14:59,920 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:14:59,920 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-07-23 18:14:59,920 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:14:59,920 INFO L450 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-07-23 18:14:59,921 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-07-23 18:14:59,921 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-07-23 18:14:59,921 INFO L87 Difference]: Start difference. First operand 51 states and 54 transitions. Second operand 16 states. [2018-07-23 18:15:00,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:15:00,253 INFO L93 Difference]: Finished difference Result 70 states and 77 transitions. [2018-07-23 18:15:00,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-07-23 18:15:00,254 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-07-23 18:15:00,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:15:00,255 INFO L225 Difference]: With dead ends: 70 [2018-07-23 18:15:00,255 INFO L226 Difference]: Without dead ends: 54 [2018-07-23 18:15:00,256 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 184 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-07-23 18:15:00,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-07-23 18:15:00,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-07-23 18:15:00,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-07-23 18:15:00,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 57 transitions. [2018-07-23 18:15:00,262 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 57 transitions. Word has length 50 [2018-07-23 18:15:00,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:15:00,262 INFO L471 AbstractCegarLoop]: Abstraction has 54 states and 57 transitions. [2018-07-23 18:15:00,262 INFO L472 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-07-23 18:15:00,262 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 57 transitions. [2018-07-23 18:15:00,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-07-23 18:15:00,263 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:15:00,263 INFO L353 BasicCegarLoop]: trace histogram [15, 14, 11, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:15:00,264 INFO L414 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:15:00,264 INFO L82 PathProgramCache]: Analyzing trace with hash 191319488, now seen corresponding path program 9 times [2018-07-23 18:15:00,264 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:15:00,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:15:00,265 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:15:00,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:15:00,265 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:15:00,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:15:00,556 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:15:00,556 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:15:00,556 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:15:00,556 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:15:00,556 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:15:00,556 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:15:00,557 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:15:00,565 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-23 18:15:00,565 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-23 18:15:00,580 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-07-23 18:15:00,580 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:15:00,582 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:15:00,726 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-07-23 18:15:00,726 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:15:00,845 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-07-23 18:15:00,865 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:15:00,865 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:15:00,880 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-23 18:15:00,880 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-23 18:15:00,952 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-07-23 18:15:00,952 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:15:00,956 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:15:00,966 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-07-23 18:15:00,967 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:15:00,980 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-07-23 18:15:00,982 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:15:00,982 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 6, 6, 6, 6] total 25 [2018-07-23 18:15:00,982 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:15:00,983 INFO L450 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-07-23 18:15:00,983 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-07-23 18:15:00,983 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=433, Unknown=0, NotChecked=0, Total=600 [2018-07-23 18:15:00,984 INFO L87 Difference]: Start difference. First operand 54 states and 57 transitions. Second operand 21 states. [2018-07-23 18:15:01,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:15:01,947 INFO L93 Difference]: Finished difference Result 80 states and 91 transitions. [2018-07-23 18:15:01,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-07-23 18:15:01,948 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 53 [2018-07-23 18:15:01,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:15:01,949 INFO L225 Difference]: With dead ends: 80 [2018-07-23 18:15:01,949 INFO L226 Difference]: Without dead ends: 64 [2018-07-23 18:15:01,949 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 233 GetRequests, 206 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=221, Invalid=535, Unknown=0, NotChecked=0, Total=756 [2018-07-23 18:15:01,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-07-23 18:15:01,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 60. [2018-07-23 18:15:01,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-07-23 18:15:01,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 64 transitions. [2018-07-23 18:15:01,956 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 64 transitions. Word has length 53 [2018-07-23 18:15:01,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:15:01,956 INFO L471 AbstractCegarLoop]: Abstraction has 60 states and 64 transitions. [2018-07-23 18:15:01,956 INFO L472 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-07-23 18:15:01,957 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 64 transitions. [2018-07-23 18:15:01,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-07-23 18:15:01,958 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:15:01,958 INFO L353 BasicCegarLoop]: trace histogram [17, 16, 12, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:15:01,958 INFO L414 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:15:01,958 INFO L82 PathProgramCache]: Analyzing trace with hash 794925150, now seen corresponding path program 10 times [2018-07-23 18:15:01,958 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:15:01,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:15:01,959 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:15:01,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:15:01,960 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:15:01,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:15:02,299 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:15:02,299 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:15:02,300 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:15:02,300 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:15:02,300 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:15:02,300 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:15:02,300 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:15:02,308 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-23 18:15:02,308 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-23 18:15:02,333 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-23 18:15:02,333 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:15:02,335 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:15:02,370 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-23 18:15:02,370 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:15:03,769 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-23 18:15:03,789 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:15:03,789 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:15:03,805 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-23 18:15:03,805 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-23 18:15:03,845 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-23 18:15:03,845 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:15:03,848 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:15:03,886 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-23 18:15:03,886 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:15:04,872 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-23 18:15:04,874 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:15:04,874 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 15, 16, 15, 15] total 45 [2018-07-23 18:15:04,874 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:15:04,874 INFO L450 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-07-23 18:15:04,875 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-07-23 18:15:04,875 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=620, Invalid=1360, Unknown=0, NotChecked=0, Total=1980 [2018-07-23 18:15:04,876 INFO L87 Difference]: Start difference. First operand 60 states and 64 transitions. Second operand 19 states. [2018-07-23 18:15:05,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:15:05,285 INFO L93 Difference]: Finished difference Result 82 states and 91 transitions. [2018-07-23 18:15:05,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-07-23 18:15:05,286 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2018-07-23 18:15:05,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:15:05,287 INFO L225 Difference]: With dead ends: 82 [2018-07-23 18:15:05,287 INFO L226 Difference]: Without dead ends: 63 [2018-07-23 18:15:05,289 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 254 GetRequests, 207 SyntacticMatches, 4 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=620, Invalid=1360, Unknown=0, NotChecked=0, Total=1980 [2018-07-23 18:15:05,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-07-23 18:15:05,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-07-23 18:15:05,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-07-23 18:15:05,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 67 transitions. [2018-07-23 18:15:05,296 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 67 transitions. Word has length 59 [2018-07-23 18:15:05,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:15:05,296 INFO L471 AbstractCegarLoop]: Abstraction has 63 states and 67 transitions. [2018-07-23 18:15:05,296 INFO L472 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-07-23 18:15:05,296 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 67 transitions. [2018-07-23 18:15:05,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-07-23 18:15:05,297 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:15:05,298 INFO L353 BasicCegarLoop]: trace histogram [18, 17, 13, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:15:05,298 INFO L414 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:15:05,298 INFO L82 PathProgramCache]: Analyzing trace with hash 1464125371, now seen corresponding path program 11 times [2018-07-23 18:15:05,298 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:15:05,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:15:05,299 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:15:05,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:15:05,299 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:15:05,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:15:05,643 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:15:05,643 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:15:05,643 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:15:05,643 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:15:05,643 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:15:05,643 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:15:05,643 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:15:05,651 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-23 18:15:05,652 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:17:16,488 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-07-23 18:17:16,489 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:17:18,417 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:18,480 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 34 proven. 408 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:18,480 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:19,787 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 34 proven. 408 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:19,791 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:19,792 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:17:19,811 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-23 18:17:19,811 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:17:20,182 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-07-23 18:17:20,183 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:17:20,187 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:20,200 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 154 proven. 273 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-23 18:17:20,200 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:23,923 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 154 proven. 273 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-07-23 18:17:23,924 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:17:23,924 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 20, 16, 16] total 51 [2018-07-23 18:17:23,924 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:17:23,925 INFO L450 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-07-23 18:17:23,925 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-07-23 18:17:23,926 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=729, Invalid=1820, Unknown=1, NotChecked=0, Total=2550 [2018-07-23 18:17:23,926 INFO L87 Difference]: Start difference. First operand 63 states and 67 transitions. Second operand 20 states. [2018-07-23 18:17:25,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:17:25,016 INFO L93 Difference]: Finished difference Result 85 states and 94 transitions. [2018-07-23 18:17:25,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-07-23 18:17:25,018 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 62 [2018-07-23 18:17:25,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:17:25,019 INFO L225 Difference]: With dead ends: 85 [2018-07-23 18:17:25,019 INFO L226 Difference]: Without dead ends: 66 [2018-07-23 18:17:25,021 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 214 SyntacticMatches, 4 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=729, Invalid=1820, Unknown=1, NotChecked=0, Total=2550 [2018-07-23 18:17:25,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-07-23 18:17:25,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-07-23 18:17:25,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-07-23 18:17:25,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-07-23 18:17:25,028 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 62 [2018-07-23 18:17:25,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:17:25,028 INFO L471 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-07-23 18:17:25,029 INFO L472 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-07-23 18:17:25,029 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-07-23 18:17:25,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-07-23 18:17:25,030 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:17:25,030 INFO L353 BasicCegarLoop]: trace histogram [19, 18, 14, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:17:25,030 INFO L414 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:17:25,030 INFO L82 PathProgramCache]: Analyzing trace with hash 369721150, now seen corresponding path program 12 times [2018-07-23 18:17:25,030 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:17:25,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:25,031 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:17:25,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:25,031 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:17:25,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:17:25,638 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:25,639 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:25,639 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:17:25,639 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:17:25,639 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:17:25,639 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:25,639 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:17:25,648 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-23 18:17:25,648 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-23 18:17:28,184 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-07-23 18:17:28,184 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:17:28,226 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:28,445 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-07-23 18:17:28,445 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:28,789 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-07-23 18:17:28,819 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:28,819 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:17:28,843 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-07-23 18:17:28,844 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-07-23 18:17:29,190 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-07-23 18:17:29,190 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:17:29,194 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:29,201 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-07-23 18:17:29,201 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:29,212 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-07-23 18:17:29,214 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:17:29,214 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 7, 7, 7, 7] total 31 [2018-07-23 18:17:29,214 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:17:29,215 INFO L450 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-07-23 18:17:29,215 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-07-23 18:17:29,215 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=681, Unknown=0, NotChecked=0, Total=930 [2018-07-23 18:17:29,216 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 26 states. [2018-07-23 18:17:31,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:17:31,916 INFO L93 Difference]: Finished difference Result 95 states and 108 transitions. [2018-07-23 18:17:31,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-07-23 18:17:31,917 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 65 [2018-07-23 18:17:31,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:17:31,917 INFO L225 Difference]: With dead ends: 95 [2018-07-23 18:17:31,918 INFO L226 Difference]: Without dead ends: 76 [2018-07-23 18:17:31,919 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 287 GetRequests, 253 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=337, Invalid=853, Unknown=0, NotChecked=0, Total=1190 [2018-07-23 18:17:31,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-07-23 18:17:31,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 72. [2018-07-23 18:17:31,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-07-23 18:17:31,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 77 transitions. [2018-07-23 18:17:31,926 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 77 transitions. Word has length 65 [2018-07-23 18:17:31,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:17:31,927 INFO L471 AbstractCegarLoop]: Abstraction has 72 states and 77 transitions. [2018-07-23 18:17:31,927 INFO L472 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-07-23 18:17:31,927 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 77 transitions. [2018-07-23 18:17:31,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-07-23 18:17:31,928 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:17:31,928 INFO L353 BasicCegarLoop]: trace histogram [21, 20, 15, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:17:31,928 INFO L414 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:17:31,929 INFO L82 PathProgramCache]: Analyzing trace with hash -512392800, now seen corresponding path program 13 times [2018-07-23 18:17:31,929 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:17:31,929 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:31,930 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:17:31,930 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:31,930 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:17:31,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:17:32,638 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:32,638 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:32,639 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:17:32,639 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:17:32,639 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:17:32,639 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:32,639 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:17:32,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:17:32,647 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-23 18:17:32,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:17:32,667 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:32,724 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-07-23 18:17:32,724 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:34,996 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-07-23 18:17:35,017 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:35,017 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:17:35,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:17:35,033 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-07-23 18:17:35,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:17:35,077 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:35,116 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-07-23 18:17:35,116 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:36,818 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-07-23 18:17:36,819 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:17:36,819 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 18, 19, 18, 18] total 55 [2018-07-23 18:17:36,819 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:17:36,820 INFO L450 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-07-23 18:17:36,820 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-07-23 18:17:36,821 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=915, Invalid=2055, Unknown=0, NotChecked=0, Total=2970 [2018-07-23 18:17:36,822 INFO L87 Difference]: Start difference. First operand 72 states and 77 transitions. Second operand 23 states. [2018-07-23 18:17:37,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:17:37,644 INFO L93 Difference]: Finished difference Result 97 states and 108 transitions. [2018-07-23 18:17:37,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-07-23 18:17:37,645 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 71 [2018-07-23 18:17:37,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:17:37,646 INFO L225 Difference]: With dead ends: 97 [2018-07-23 18:17:37,646 INFO L226 Difference]: Without dead ends: 75 [2018-07-23 18:17:37,647 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 306 GetRequests, 249 SyntacticMatches, 4 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=915, Invalid=2055, Unknown=0, NotChecked=0, Total=2970 [2018-07-23 18:17:37,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-07-23 18:17:37,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2018-07-23 18:17:37,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-07-23 18:17:37,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 80 transitions. [2018-07-23 18:17:37,654 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 80 transitions. Word has length 71 [2018-07-23 18:17:37,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:17:37,654 INFO L471 AbstractCegarLoop]: Abstraction has 75 states and 80 transitions. [2018-07-23 18:17:37,655 INFO L472 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-07-23 18:17:37,655 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 80 transitions. [2018-07-23 18:17:37,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-07-23 18:17:37,656 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:17:37,656 INFO L353 BasicCegarLoop]: trace histogram [22, 21, 16, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:17:37,656 INFO L414 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:17:37,656 INFO L82 PathProgramCache]: Analyzing trace with hash 10718589, now seen corresponding path program 14 times [2018-07-23 18:17:37,656 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:17:37,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:37,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-07-23 18:17:37,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:37,657 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:17:37,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:17:38,086 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:38,087 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:38,087 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:17:38,087 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:17:38,087 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:17:38,087 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:38,087 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:17:38,097 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-23 18:17:38,097 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:17:38,117 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-23 18:17:38,117 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:17:38,119 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:38,140 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:38,140 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:39,524 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:39,544 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:39,544 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:17:39,559 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-07-23 18:17:39,560 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-07-23 18:17:39,608 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-07-23 18:17:39,608 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:17:39,612 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:39,644 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:39,644 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:39,662 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:39,664 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:17:39,664 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 46 [2018-07-23 18:17:39,664 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:17:39,664 INFO L450 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-07-23 18:17:39,665 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-07-23 18:17:39,665 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-07-23 18:17:39,666 INFO L87 Difference]: Start difference. First operand 75 states and 80 transitions. Second operand 24 states. [2018-07-23 18:17:40,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:17:40,375 INFO L93 Difference]: Finished difference Result 100 states and 111 transitions. [2018-07-23 18:17:40,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-07-23 18:17:40,375 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-07-23 18:17:40,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:17:40,377 INFO L225 Difference]: With dead ends: 100 [2018-07-23 18:17:40,377 INFO L226 Difference]: Without dead ends: 78 [2018-07-23 18:17:40,378 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 319 GetRequests, 272 SyntacticMatches, 3 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-07-23 18:17:40,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-07-23 18:17:40,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-07-23 18:17:40,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-07-23 18:17:40,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 83 transitions. [2018-07-23 18:17:40,386 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 83 transitions. Word has length 74 [2018-07-23 18:17:40,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:17:40,387 INFO L471 AbstractCegarLoop]: Abstraction has 78 states and 83 transitions. [2018-07-23 18:17:40,387 INFO L472 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-07-23 18:17:40,387 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2018-07-23 18:17:40,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-07-23 18:17:40,388 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:17:40,388 INFO L353 BasicCegarLoop]: trace histogram [23, 22, 17, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:17:40,388 INFO L414 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:17:40,388 INFO L82 PathProgramCache]: Analyzing trace with hash 1880758400, now seen corresponding path program 15 times [2018-07-23 18:17:40,388 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:17:40,389 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:40,389 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:17:40,389 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:40,389 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:17:40,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:17:41,493 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:41,493 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:41,493 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:17:41,493 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:17:41,494 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:17:41,494 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:41,494 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:17:41,503 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-23 18:17:41,503 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-23 18:17:41,535 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-07-23 18:17:41,536 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:17:41,537 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:41,842 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-07-23 18:17:41,843 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:42,109 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-07-23 18:17:42,130 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:42,130 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:17:42,145 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-07-23 18:17:42,145 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-07-23 18:17:42,285 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-07-23 18:17:42,285 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:17:42,288 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:42,313 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-07-23 18:17:42,314 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:42,334 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-07-23 18:17:42,336 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:17:42,336 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 8, 8, 8, 8] total 37 [2018-07-23 18:17:42,336 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:17:42,337 INFO L450 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-07-23 18:17:42,337 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-07-23 18:17:42,337 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=347, Invalid=985, Unknown=0, NotChecked=0, Total=1332 [2018-07-23 18:17:42,338 INFO L87 Difference]: Start difference. First operand 78 states and 83 transitions. Second operand 31 states. [2018-07-23 18:17:49,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:17:49,560 INFO L93 Difference]: Finished difference Result 110 states and 125 transitions. [2018-07-23 18:17:49,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-07-23 18:17:49,561 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 77 [2018-07-23 18:17:49,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:17:49,561 INFO L225 Difference]: With dead ends: 110 [2018-07-23 18:17:49,561 INFO L226 Difference]: Without dead ends: 88 [2018-07-23 18:17:49,562 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 343 GetRequests, 300 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=477, Invalid=1245, Unknown=0, NotChecked=0, Total=1722 [2018-07-23 18:17:49,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-07-23 18:17:49,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 84. [2018-07-23 18:17:49,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-07-23 18:17:49,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 90 transitions. [2018-07-23 18:17:49,570 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 90 transitions. Word has length 77 [2018-07-23 18:17:49,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:17:49,570 INFO L471 AbstractCegarLoop]: Abstraction has 84 states and 90 transitions. [2018-07-23 18:17:49,570 INFO L472 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-07-23 18:17:49,570 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 90 transitions. [2018-07-23 18:17:49,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-07-23 18:17:49,571 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:17:49,571 INFO L353 BasicCegarLoop]: trace histogram [25, 24, 18, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:17:49,572 INFO L414 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:17:49,572 INFO L82 PathProgramCache]: Analyzing trace with hash -1326089058, now seen corresponding path program 16 times [2018-07-23 18:17:49,572 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:17:49,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:49,573 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:17:49,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:49,573 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:17:49,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:17:50,380 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 48 proven. 828 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:50,381 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:50,381 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:17:50,381 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:17:50,381 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:17:50,381 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:50,381 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:17:50,391 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-23 18:17:50,391 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-23 18:17:50,414 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-23 18:17:50,414 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:17:50,416 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:50,468 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-07-23 18:17:50,469 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:52,087 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-07-23 18:17:52,107 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:52,108 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-07-23 18:17:52,123 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-07-23 18:17:52,123 INFO L288 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-07-23 18:17:52,175 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-07-23 18:17:52,175 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-07-23 18:17:52,179 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-07-23 18:17:52,215 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-07-23 18:17:52,216 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-07-23 18:17:54,452 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-07-23 18:17:54,454 INFO L309 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-07-23 18:17:54,454 INFO L324 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 21, 22, 21, 21] total 65 [2018-07-23 18:17:54,455 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-07-23 18:17:54,455 INFO L450 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-07-23 18:17:54,456 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-07-23 18:17:54,457 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1291, Invalid=2869, Unknown=0, NotChecked=0, Total=4160 [2018-07-23 18:17:54,458 INFO L87 Difference]: Start difference. First operand 84 states and 90 transitions. Second operand 27 states. [2018-07-23 18:17:55,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-07-23 18:17:55,230 INFO L93 Difference]: Finished difference Result 115 states and 129 transitions. [2018-07-23 18:17:55,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-07-23 18:17:55,230 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 83 [2018-07-23 18:17:55,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-07-23 18:17:55,231 INFO L225 Difference]: With dead ends: 115 [2018-07-23 18:17:55,231 INFO L226 Difference]: Without dead ends: 90 [2018-07-23 18:17:55,234 INFO L573 BasicCegarLoop]: 0 DeclaredPredicates, 357 GetRequests, 291 SyntacticMatches, 3 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=1291, Invalid=2869, Unknown=0, NotChecked=0, Total=4160 [2018-07-23 18:17:55,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-07-23 18:17:55,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2018-07-23 18:17:55,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-07-23 18:17:55,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 96 transitions. [2018-07-23 18:17:55,241 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 96 transitions. Word has length 83 [2018-07-23 18:17:55,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-07-23 18:17:55,241 INFO L471 AbstractCegarLoop]: Abstraction has 90 states and 96 transitions. [2018-07-23 18:17:55,241 INFO L472 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-07-23 18:17:55,241 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 96 transitions. [2018-07-23 18:17:55,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-07-23 18:17:55,242 INFO L345 BasicCegarLoop]: Found error trace [2018-07-23 18:17:55,242 INFO L353 BasicCegarLoop]: trace histogram [27, 26, 20, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-07-23 18:17:55,242 INFO L414 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0AssertViolationERROR_FUNCTION]=== [2018-07-23 18:17:55,243 INFO L82 PathProgramCache]: Analyzing trace with hash -502348930, now seen corresponding path program 17 times [2018-07-23 18:17:55,243 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-07-23 18:17:55,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:55,244 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-07-23 18:17:55,244 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-07-23 18:17:55,244 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-07-23 18:17:55,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-07-23 18:17:55,821 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 52 proven. 975 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-07-23 18:17:55,821 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:55,821 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-07-23 18:17:55,821 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-07-23 18:17:55,822 INFO L419 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-07-23 18:17:55,822 INFO L297 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-07-23 18:17:55,822 INFO L191 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-07-23 18:17:55,829 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-07-23 18:17:55,830 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown