java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-new/count_by_2_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-ddc4263 [2018-08-07 10:54:28,476 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-08-07 10:54:28,478 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-08-07 10:54:28,494 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-08-07 10:54:28,495 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-08-07 10:54:28,496 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-08-07 10:54:28,497 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-08-07 10:54:28,499 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-08-07 10:54:28,502 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-08-07 10:54:28,503 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-08-07 10:54:28,504 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-08-07 10:54:28,504 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-08-07 10:54:28,505 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-08-07 10:54:28,509 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-08-07 10:54:28,510 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-08-07 10:54:28,513 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-08-07 10:54:28,514 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-08-07 10:54:28,519 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-08-07 10:54:28,524 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-08-07 10:54:28,526 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-08-07 10:54:28,528 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-08-07 10:54:28,531 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-08-07 10:54:28,537 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-08-07 10:54:28,537 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-08-07 10:54:28,537 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-08-07 10:54:28,539 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-08-07 10:54:28,540 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-08-07 10:54:28,541 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-08-07 10:54:28,542 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-08-07 10:54:28,543 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-08-07 10:54:28,546 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-08-07 10:54:28,547 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-08-07 10:54:28,551 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-08-07 10:54:28,579 INFO L110 SettingsManager]: Loading preferences was successful [2018-08-07 10:54:28,580 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-08-07 10:54:28,581 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-08-07 10:54:28,581 INFO L133 SettingsManager]: * User list type=DISABLED [2018-08-07 10:54:28,581 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-08-07 10:54:28,581 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-08-07 10:54:28,581 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-08-07 10:54:28,582 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-08-07 10:54:28,582 INFO L133 SettingsManager]: * Log string format=TERM [2018-08-07 10:54:28,582 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-08-07 10:54:28,582 INFO L133 SettingsManager]: * Interval Domain=false [2018-08-07 10:54:28,583 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-08-07 10:54:28,583 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-08-07 10:54:28,583 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-08-07 10:54:28,583 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-08-07 10:54:28,584 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-08-07 10:54:28,584 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-08-07 10:54:28,584 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-08-07 10:54:28,584 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-08-07 10:54:28,584 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-08-07 10:54:28,585 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-08-07 10:54:28,585 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-08-07 10:54:28,585 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-08-07 10:54:28,585 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-08-07 10:54:28,585 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-08-07 10:54:28,586 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-08-07 10:54:28,586 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-08-07 10:54:28,586 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-08-07 10:54:28,586 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-08-07 10:54:28,586 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-08-07 10:54:28,586 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-08-07 10:54:28,587 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-08-07 10:54:28,587 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-08-07 10:54:28,630 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-08-07 10:54:28,643 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-08-07 10:54:28,647 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-08-07 10:54:28,648 INFO L271 PluginConnector]: Initializing CDTParser... [2018-08-07 10:54:28,649 INFO L276 PluginConnector]: CDTParser initialized [2018-08-07 10:54:28,649 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-new/count_by_2_true-unreach-call_true-termination.i [2018-08-07 10:54:28,997 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a975f5d68/c1864f83750f415e94fc1b28627994a1/FLAG5ac11a44f [2018-08-07 10:54:29,143 INFO L276 CDTParser]: Found 1 translation units. [2018-08-07 10:54:29,144 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-new/count_by_2_true-unreach-call_true-termination.i [2018-08-07 10:54:29,150 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a975f5d68/c1864f83750f415e94fc1b28627994a1/FLAG5ac11a44f [2018-08-07 10:54:29,165 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a975f5d68/c1864f83750f415e94fc1b28627994a1 [2018-08-07 10:54:29,179 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-08-07 10:54:29,181 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-08-07 10:54:29,182 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-08-07 10:54:29,182 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-08-07 10:54:29,190 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-08-07 10:54:29,191 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,195 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5b16058 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29, skipping insertion in model container [2018-08-07 10:54:29,195 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,394 INFO L179 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-08-07 10:54:29,433 INFO L175 PostProcessor]: Settings: Checked method=main [2018-08-07 10:54:29,453 INFO L422 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-08-07 10:54:29,457 INFO L175 PostProcessor]: Settings: Checked method=main [2018-08-07 10:54:29,469 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29 WrapperNode [2018-08-07 10:54:29,469 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-08-07 10:54:29,470 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-08-07 10:54:29,470 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-08-07 10:54:29,470 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-08-07 10:54:29,479 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,485 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,490 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-08-07 10:54:29,490 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-08-07 10:54:29,490 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-08-07 10:54:29,490 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-08-07 10:54:29,498 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,498 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,498 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,499 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,500 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,505 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,506 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (1/1) ... [2018-08-07 10:54:29,507 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-08-07 10:54:29,508 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-08-07 10:54:29,508 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-08-07 10:54:29,508 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-08-07 10:54:29,509 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-08-07 10:54:29,571 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-08-07 10:54:29,571 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-08-07 10:54:29,571 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assert [2018-08-07 10:54:29,572 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assert [2018-08-07 10:54:29,572 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-08-07 10:54:29,572 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-08-07 10:54:29,572 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-08-07 10:54:29,572 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-08-07 10:54:29,791 INFO L273 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-08-07 10:54:29,791 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.08 10:54:29 BoogieIcfgContainer [2018-08-07 10:54:29,791 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-08-07 10:54:29,792 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-08-07 10:54:29,792 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-08-07 10:54:29,796 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-08-07 10:54:29,796 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.08 10:54:29" (1/3) ... [2018-08-07 10:54:29,797 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3102bc7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.08 10:54:29, skipping insertion in model container [2018-08-07 10:54:29,797 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:29" (2/3) ... [2018-08-07 10:54:29,797 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3102bc7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.08 10:54:29, skipping insertion in model container [2018-08-07 10:54:29,797 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.08 10:54:29" (3/3) ... [2018-08-07 10:54:29,799 INFO L112 eAbstractionObserver]: Analyzing ICFG count_by_2_true-unreach-call_true-termination.i [2018-08-07 10:54:29,808 INFO L133 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-08-07 10:54:29,815 INFO L145 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-08-07 10:54:29,860 INFO L129 ementStrategyFactory]: Using default assertion order modulation [2018-08-07 10:54:29,861 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-08-07 10:54:29,861 INFO L382 AbstractCegarLoop]: Hoare is true [2018-08-07 10:54:29,862 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-08-07 10:54:29,862 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-08-07 10:54:29,862 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-08-07 10:54:29,862 INFO L386 AbstractCegarLoop]: Difference is false [2018-08-07 10:54:29,862 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-08-07 10:54:29,862 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-08-07 10:54:29,881 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states. [2018-08-07 10:54:29,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-08-07 10:54:29,887 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:29,888 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:29,889 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:29,894 INFO L82 PathProgramCache]: Analyzing trace with hash 888303788, now seen corresponding path program 1 times [2018-08-07 10:54:29,897 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:29,949 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:29,949 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:29,949 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:29,949 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:29,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:30,001 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:30,003 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-08-07 10:54:30,003 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-08-07 10:54:30,003 INFO L262 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-08-07 10:54:30,007 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-08-07 10:54:30,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-08-07 10:54:30,019 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-08-07 10:54:30,021 INFO L87 Difference]: Start difference. First operand 20 states. Second operand 2 states. [2018-08-07 10:54:30,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:30,041 INFO L93 Difference]: Finished difference Result 32 states and 35 transitions. [2018-08-07 10:54:30,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-08-07 10:54:30,043 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-08-07 10:54:30,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:30,050 INFO L225 Difference]: With dead ends: 32 [2018-08-07 10:54:30,050 INFO L226 Difference]: Without dead ends: 13 [2018-08-07 10:54:30,054 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-08-07 10:54:30,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-08-07 10:54:30,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-08-07 10:54:30,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-08-07 10:54:30,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2018-08-07 10:54:30,089 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 10 [2018-08-07 10:54:30,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:30,090 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2018-08-07 10:54:30,090 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-08-07 10:54:30,090 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-08-07 10:54:30,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-08-07 10:54:30,091 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:30,091 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:30,091 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:30,092 INFO L82 PathProgramCache]: Analyzing trace with hash 1497168015, now seen corresponding path program 1 times [2018-08-07 10:54:30,092 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:30,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:30,093 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:30,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:30,094 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:30,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:30,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:30,151 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-08-07 10:54:30,151 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-08-07 10:54:30,151 INFO L262 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-08-07 10:54:30,153 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-08-07 10:54:30,153 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-08-07 10:54:30,154 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-08-07 10:54:30,154 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand 3 states. [2018-08-07 10:54:30,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:30,232 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-08-07 10:54:30,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-08-07 10:54:30,233 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-08-07 10:54:30,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:30,235 INFO L225 Difference]: With dead ends: 21 [2018-08-07 10:54:30,235 INFO L226 Difference]: Without dead ends: 16 [2018-08-07 10:54:30,236 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-08-07 10:54:30,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-08-07 10:54:30,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 15. [2018-08-07 10:54:30,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-08-07 10:54:30,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2018-08-07 10:54:30,242 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 11 [2018-08-07 10:54:30,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:30,242 INFO L480 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2018-08-07 10:54:30,242 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-08-07 10:54:30,242 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2018-08-07 10:54:30,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-08-07 10:54:30,243 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:30,243 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:30,244 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:30,244 INFO L82 PathProgramCache]: Analyzing trace with hash 1742853384, now seen corresponding path program 1 times [2018-08-07 10:54:30,244 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:30,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:30,245 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:30,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:30,246 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:30,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:30,367 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:30,367 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:30,367 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:30,380 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:30,381 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:30,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:30,404 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:30,426 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:30,426 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:30,504 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:30,525 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:30,525 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:30,541 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:30,542 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:30,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:30,557 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:30,562 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:30,562 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:30,613 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:30,615 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:30,615 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-08-07 10:54:30,615 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:30,615 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-08-07 10:54:30,616 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-08-07 10:54:30,616 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-08-07 10:54:30,618 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand 4 states. [2018-08-07 10:54:30,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:30,672 INFO L93 Difference]: Finished difference Result 24 states and 24 transitions. [2018-08-07 10:54:30,675 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-08-07 10:54:30,677 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-08-07 10:54:30,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:30,678 INFO L225 Difference]: With dead ends: 24 [2018-08-07 10:54:30,678 INFO L226 Difference]: Without dead ends: 19 [2018-08-07 10:54:30,678 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-08-07 10:54:30,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-08-07 10:54:30,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 18. [2018-08-07 10:54:30,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-08-07 10:54:30,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2018-08-07 10:54:30,684 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 14 [2018-08-07 10:54:30,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:30,684 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2018-08-07 10:54:30,684 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-08-07 10:54:30,685 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-08-07 10:54:30,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-08-07 10:54:30,685 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:30,686 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:30,686 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:30,686 INFO L82 PathProgramCache]: Analyzing trace with hash -1963558417, now seen corresponding path program 2 times [2018-08-07 10:54:30,686 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:30,687 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:30,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:30,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:30,688 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:30,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:30,766 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:30,766 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:30,766 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:30,780 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:30,780 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:30,802 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:30,803 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:30,805 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:30,813 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:30,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:31,055 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:31,085 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:31,085 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:31,105 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:31,106 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:31,121 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:31,121 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:31,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:31,129 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:31,130 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:31,145 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:31,150 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:31,150 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-08-07 10:54:31,150 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:31,151 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-08-07 10:54:31,151 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-08-07 10:54:31,151 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-08-07 10:54:31,152 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand 5 states. [2018-08-07 10:54:31,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:31,214 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-08-07 10:54:31,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-08-07 10:54:31,215 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-08-07 10:54:31,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:31,216 INFO L225 Difference]: With dead ends: 27 [2018-08-07 10:54:31,216 INFO L226 Difference]: Without dead ends: 22 [2018-08-07 10:54:31,217 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-08-07 10:54:31,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-08-07 10:54:31,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2018-08-07 10:54:31,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-08-07 10:54:31,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-08-07 10:54:31,222 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 17 [2018-08-07 10:54:31,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:31,222 INFO L480 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-08-07 10:54:31,222 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-08-07 10:54:31,223 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-08-07 10:54:31,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-08-07 10:54:31,223 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:31,224 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:31,224 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:31,225 INFO L82 PathProgramCache]: Analyzing trace with hash -363309144, now seen corresponding path program 3 times [2018-08-07 10:54:31,225 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:31,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:31,226 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:31,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:31,226 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:31,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:31,322 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:31,323 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:31,323 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:31,340 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:31,340 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:31,352 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-08-07 10:54:31,352 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:31,354 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:31,360 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:31,360 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:31,483 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:31,504 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:31,504 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:31,520 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:31,520 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:31,546 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-08-07 10:54:31,546 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:31,550 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:31,556 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:31,556 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:31,609 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:31,612 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:31,613 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 10 [2018-08-07 10:54:31,613 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:31,613 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-08-07 10:54:31,618 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-08-07 10:54:31,619 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-08-07 10:54:31,619 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 6 states. [2018-08-07 10:54:31,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:31,721 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-08-07 10:54:31,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-08-07 10:54:31,723 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-08-07 10:54:31,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:31,724 INFO L225 Difference]: With dead ends: 30 [2018-08-07 10:54:31,724 INFO L226 Difference]: Without dead ends: 25 [2018-08-07 10:54:31,725 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 76 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-08-07 10:54:31,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-08-07 10:54:31,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2018-08-07 10:54:31,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-08-07 10:54:31,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-08-07 10:54:31,729 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 20 [2018-08-07 10:54:31,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:31,730 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-08-07 10:54:31,730 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-08-07 10:54:31,730 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-08-07 10:54:31,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-08-07 10:54:31,731 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:31,731 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:31,732 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:31,732 INFO L82 PathProgramCache]: Analyzing trace with hash -1474202801, now seen corresponding path program 4 times [2018-08-07 10:54:31,732 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:31,733 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:31,733 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:31,734 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:31,734 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:31,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:31,821 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:31,821 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:31,822 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:31,839 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:31,839 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:31,850 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:31,851 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:31,853 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:31,859 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:31,859 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:32,178 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:32,210 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:32,210 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:32,239 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:32,239 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:32,260 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:32,261 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:32,265 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:32,275 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:32,275 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:32,301 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:32,304 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:32,304 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 12 [2018-08-07 10:54:32,304 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:32,305 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-08-07 10:54:32,305 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-08-07 10:54:32,305 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-08-07 10:54:32,305 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 7 states. [2018-08-07 10:54:32,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:32,347 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-08-07 10:54:32,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-08-07 10:54:32,348 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-08-07 10:54:32,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:32,349 INFO L225 Difference]: With dead ends: 33 [2018-08-07 10:54:32,349 INFO L226 Difference]: Without dead ends: 28 [2018-08-07 10:54:32,350 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-08-07 10:54:32,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-08-07 10:54:32,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 27. [2018-08-07 10:54:32,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-08-07 10:54:32,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-08-07 10:54:32,355 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 23 [2018-08-07 10:54:32,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:32,355 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-08-07 10:54:32,355 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-08-07 10:54:32,355 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-08-07 10:54:32,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-08-07 10:54:32,356 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:32,356 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:32,357 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:32,357 INFO L82 PathProgramCache]: Analyzing trace with hash 910844488, now seen corresponding path program 5 times [2018-08-07 10:54:32,357 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:32,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:32,358 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:32,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:32,359 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:32,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:32,506 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:32,506 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:32,507 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:32,524 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:32,524 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:32,579 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-08-07 10:54:32,579 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:32,581 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:32,590 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:32,591 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:32,737 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:32,758 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:32,758 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:32,775 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:32,775 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:32,799 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-08-07 10:54:32,799 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:32,803 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:32,809 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:32,810 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:32,831 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:32,832 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:32,832 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-08-07 10:54:32,833 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:32,833 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-08-07 10:54:32,833 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-08-07 10:54:32,834 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-08-07 10:54:32,834 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 8 states. [2018-08-07 10:54:32,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:32,890 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-08-07 10:54:32,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-08-07 10:54:32,891 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-08-07 10:54:32,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:32,893 INFO L225 Difference]: With dead ends: 36 [2018-08-07 10:54:32,893 INFO L226 Difference]: Without dead ends: 31 [2018-08-07 10:54:32,893 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-08-07 10:54:32,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-08-07 10:54:32,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2018-08-07 10:54:32,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-08-07 10:54:32,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-08-07 10:54:32,898 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 26 [2018-08-07 10:54:32,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:32,899 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-08-07 10:54:32,899 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-08-07 10:54:32,899 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-08-07 10:54:32,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-08-07 10:54:32,900 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:32,900 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:32,900 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:32,901 INFO L82 PathProgramCache]: Analyzing trace with hash -2084313937, now seen corresponding path program 6 times [2018-08-07 10:54:32,901 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:32,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:32,902 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:32,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:32,902 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:32,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:33,022 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:33,023 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:33,023 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:33,031 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:33,032 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:33,044 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-08-07 10:54:33,044 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:33,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:33,054 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:33,054 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:33,313 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:33,343 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:33,343 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:33,358 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:33,358 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:33,391 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-08-07 10:54:33,392 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:33,395 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:33,402 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:33,403 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:33,424 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:33,426 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:33,426 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 16 [2018-08-07 10:54:33,426 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:33,427 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-08-07 10:54:33,427 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-08-07 10:54:33,427 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-08-07 10:54:33,428 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 9 states. [2018-08-07 10:54:33,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:33,479 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-08-07 10:54:33,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-08-07 10:54:33,482 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-08-07 10:54:33,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:33,483 INFO L225 Difference]: With dead ends: 39 [2018-08-07 10:54:33,483 INFO L226 Difference]: Without dead ends: 34 [2018-08-07 10:54:33,484 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-08-07 10:54:33,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-08-07 10:54:33,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 33. [2018-08-07 10:54:33,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-08-07 10:54:33,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-08-07 10:54:33,489 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 29 [2018-08-07 10:54:33,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:33,489 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-08-07 10:54:33,489 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-08-07 10:54:33,489 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-08-07 10:54:33,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-08-07 10:54:33,490 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:33,490 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:33,491 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:33,491 INFO L82 PathProgramCache]: Analyzing trace with hash 1391588584, now seen corresponding path program 7 times [2018-08-07 10:54:33,491 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:33,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:33,492 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:33,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:33,492 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:33,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:33,632 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:33,632 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:33,633 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:33,640 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:33,640 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:33,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:33,652 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:33,660 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:33,661 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:33,874 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:33,897 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:33,897 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:33,913 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:33,913 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:33,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:33,929 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:33,937 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:33,938 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:33,973 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:33,975 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:33,975 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 18 [2018-08-07 10:54:33,975 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:33,976 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-08-07 10:54:33,976 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-08-07 10:54:33,976 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-08-07 10:54:33,976 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 10 states. [2018-08-07 10:54:34,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:34,028 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-08-07 10:54:34,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-08-07 10:54:34,031 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 32 [2018-08-07 10:54:34,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:34,031 INFO L225 Difference]: With dead ends: 42 [2018-08-07 10:54:34,032 INFO L226 Difference]: Without dead ends: 37 [2018-08-07 10:54:34,032 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-08-07 10:54:34,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-08-07 10:54:34,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 36. [2018-08-07 10:54:34,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-08-07 10:54:34,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-08-07 10:54:34,036 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 32 [2018-08-07 10:54:34,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:34,037 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-08-07 10:54:34,037 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-08-07 10:54:34,037 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-08-07 10:54:34,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-08-07 10:54:34,038 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:34,038 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:34,038 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:34,039 INFO L82 PathProgramCache]: Analyzing trace with hash 342085135, now seen corresponding path program 8 times [2018-08-07 10:54:34,039 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:34,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:34,040 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:34,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:34,040 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:34,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:34,180 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:34,181 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:34,181 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:34,189 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:34,189 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:34,215 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:34,215 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:34,217 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:34,225 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:34,226 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:34,472 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:34,493 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:34,493 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:34,508 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:34,508 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:34,526 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:34,526 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:34,529 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:34,537 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:34,537 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:34,591 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:34,593 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:34,594 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-08-07 10:54:34,594 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:34,594 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-08-07 10:54:34,595 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-08-07 10:54:34,595 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-08-07 10:54:34,595 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 11 states. [2018-08-07 10:54:34,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:34,667 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-08-07 10:54:34,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-08-07 10:54:34,667 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-08-07 10:54:34,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:34,668 INFO L225 Difference]: With dead ends: 45 [2018-08-07 10:54:34,668 INFO L226 Difference]: Without dead ends: 40 [2018-08-07 10:54:34,669 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-08-07 10:54:34,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-08-07 10:54:34,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2018-08-07 10:54:34,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-08-07 10:54:34,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-08-07 10:54:34,674 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 35 [2018-08-07 10:54:34,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:34,674 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-08-07 10:54:34,675 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-08-07 10:54:34,675 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-08-07 10:54:34,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-08-07 10:54:34,676 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:34,676 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:34,676 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:34,676 INFO L82 PathProgramCache]: Analyzing trace with hash 1946750856, now seen corresponding path program 9 times [2018-08-07 10:54:34,677 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:34,677 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:34,678 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:34,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:34,678 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:34,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:34,881 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:34,881 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:34,881 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:34,895 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:34,895 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:34,923 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-08-07 10:54:34,924 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:34,925 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:34,934 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:34,934 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:35,351 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:35,371 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:35,371 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:35,388 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:35,388 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:35,434 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-08-07 10:54:35,434 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:35,437 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:35,454 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:35,454 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:35,530 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:35,533 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:35,533 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 22 [2018-08-07 10:54:35,533 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:35,534 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-08-07 10:54:35,534 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-08-07 10:54:35,534 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-08-07 10:54:35,535 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 12 states. [2018-08-07 10:54:35,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:35,666 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-08-07 10:54:35,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-08-07 10:54:35,666 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-08-07 10:54:35,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:35,667 INFO L225 Difference]: With dead ends: 48 [2018-08-07 10:54:35,667 INFO L226 Difference]: Without dead ends: 43 [2018-08-07 10:54:35,668 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-08-07 10:54:35,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-08-07 10:54:35,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 42. [2018-08-07 10:54:35,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-08-07 10:54:35,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-08-07 10:54:35,673 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 38 [2018-08-07 10:54:35,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:35,673 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-08-07 10:54:35,674 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-08-07 10:54:35,674 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-08-07 10:54:35,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-08-07 10:54:35,674 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:35,675 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:35,675 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:35,675 INFO L82 PathProgramCache]: Analyzing trace with hash -737726609, now seen corresponding path program 10 times [2018-08-07 10:54:35,675 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:35,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:35,676 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:35,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:35,677 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:35,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:35,831 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:35,831 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:35,831 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:35,839 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:35,839 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:35,863 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:35,864 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:35,865 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:35,876 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:35,876 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:36,377 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:36,398 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:36,399 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:36,414 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:36,415 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:36,435 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:36,436 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:36,439 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:36,448 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:36,448 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:36,463 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:36,465 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:36,465 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 24 [2018-08-07 10:54:36,465 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:36,466 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-08-07 10:54:36,466 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-08-07 10:54:36,468 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-08-07 10:54:36,468 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 13 states. [2018-08-07 10:54:36,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:36,567 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-08-07 10:54:36,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-08-07 10:54:36,568 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 41 [2018-08-07 10:54:36,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:36,569 INFO L225 Difference]: With dead ends: 51 [2018-08-07 10:54:36,569 INFO L226 Difference]: Without dead ends: 46 [2018-08-07 10:54:36,570 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 153 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-08-07 10:54:36,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-08-07 10:54:36,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 45. [2018-08-07 10:54:36,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-08-07 10:54:36,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-08-07 10:54:36,575 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 41 [2018-08-07 10:54:36,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:36,576 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-08-07 10:54:36,576 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-08-07 10:54:36,576 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-08-07 10:54:36,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-08-07 10:54:36,577 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:36,577 INFO L376 BasicCegarLoop]: trace histogram [12, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:36,578 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:36,578 INFO L82 PathProgramCache]: Analyzing trace with hash -1714834904, now seen corresponding path program 11 times [2018-08-07 10:54:36,578 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:36,579 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:36,579 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:36,579 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:36,579 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:36,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:36,854 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:36,855 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:36,855 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:36,866 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:36,866 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:36,877 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-08-07 10:54:36,877 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:36,878 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:36,886 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:36,886 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:37,186 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:37,207 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:37,207 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:37,221 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:37,222 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:37,272 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-08-07 10:54:37,272 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:37,274 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:37,281 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:37,281 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:37,304 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:37,305 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:37,305 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-08-07 10:54:37,305 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:37,305 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-08-07 10:54:37,306 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-08-07 10:54:37,306 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-08-07 10:54:37,307 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 14 states. [2018-08-07 10:54:37,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:37,380 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-08-07 10:54:37,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-08-07 10:54:37,384 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-08-07 10:54:37,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:37,384 INFO L225 Difference]: With dead ends: 54 [2018-08-07 10:54:37,384 INFO L226 Difference]: Without dead ends: 49 [2018-08-07 10:54:37,385 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-08-07 10:54:37,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-08-07 10:54:37,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 48. [2018-08-07 10:54:37,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-08-07 10:54:37,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-08-07 10:54:37,390 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 44 [2018-08-07 10:54:37,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:37,390 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-08-07 10:54:37,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-08-07 10:54:37,390 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-08-07 10:54:37,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-08-07 10:54:37,391 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:37,391 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:37,392 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:37,392 INFO L82 PathProgramCache]: Analyzing trace with hash 540281039, now seen corresponding path program 12 times [2018-08-07 10:54:37,392 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:37,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:37,393 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:37,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:37,393 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:37,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:37,562 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:37,563 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:37,563 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:37,572 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:37,572 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:37,587 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-08-07 10:54:37,587 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:37,589 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:37,597 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:37,597 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:37,884 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:37,905 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:37,905 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:37,920 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:37,920 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:37,977 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-08-07 10:54:37,977 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:37,980 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:37,988 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:37,988 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:38,025 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:38,026 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:38,026 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-08-07 10:54:38,026 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:38,026 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-08-07 10:54:38,027 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-08-07 10:54:38,027 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-08-07 10:54:38,027 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 15 states. [2018-08-07 10:54:38,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:38,078 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-08-07 10:54:38,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-08-07 10:54:38,079 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2018-08-07 10:54:38,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:38,080 INFO L225 Difference]: With dead ends: 57 [2018-08-07 10:54:38,080 INFO L226 Difference]: Without dead ends: 52 [2018-08-07 10:54:38,081 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 175 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-08-07 10:54:38,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-08-07 10:54:38,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 51. [2018-08-07 10:54:38,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-08-07 10:54:38,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-08-07 10:54:38,088 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 47 [2018-08-07 10:54:38,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:38,088 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-08-07 10:54:38,088 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-08-07 10:54:38,088 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-08-07 10:54:38,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-08-07 10:54:38,089 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:38,089 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:38,090 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:38,090 INFO L82 PathProgramCache]: Analyzing trace with hash 820894920, now seen corresponding path program 13 times [2018-08-07 10:54:38,090 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:38,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:38,093 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:38,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:38,094 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:38,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:38,277 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:38,277 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:38,277 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:38,284 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:38,284 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:38,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:38,308 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:38,317 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:38,318 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:38,990 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:39,011 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:39,011 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:39,027 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:39,027 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:39,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:39,048 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:39,060 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:39,060 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:39,116 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:39,117 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:39,117 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-08-07 10:54:39,118 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:39,118 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-08-07 10:54:39,118 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-08-07 10:54:39,119 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-08-07 10:54:39,119 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 16 states. [2018-08-07 10:54:39,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:39,253 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-08-07 10:54:39,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-08-07 10:54:39,254 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-08-07 10:54:39,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:39,255 INFO L225 Difference]: With dead ends: 60 [2018-08-07 10:54:39,255 INFO L226 Difference]: Without dead ends: 55 [2018-08-07 10:54:39,257 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 186 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-08-07 10:54:39,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-08-07 10:54:39,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 54. [2018-08-07 10:54:39,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-08-07 10:54:39,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-08-07 10:54:39,261 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 50 [2018-08-07 10:54:39,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:39,262 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-08-07 10:54:39,262 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-08-07 10:54:39,262 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-08-07 10:54:39,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-08-07 10:54:39,262 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:39,263 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:39,263 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:39,263 INFO L82 PathProgramCache]: Analyzing trace with hash -1712301521, now seen corresponding path program 14 times [2018-08-07 10:54:39,263 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:39,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:39,264 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:39,264 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:39,264 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:39,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:39,435 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:39,435 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:39,435 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:39,443 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:39,443 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:39,468 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:39,469 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:39,470 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:39,479 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:39,479 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:39,879 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:39,900 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:39,900 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:39,915 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:39,915 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:39,937 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:39,937 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:39,940 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:39,949 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:39,949 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:39,960 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:39,961 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:39,962 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-08-07 10:54:39,962 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:39,962 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-08-07 10:54:39,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-08-07 10:54:39,963 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-08-07 10:54:39,963 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 17 states. [2018-08-07 10:54:40,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:40,098 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-08-07 10:54:40,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-08-07 10:54:40,098 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 53 [2018-08-07 10:54:40,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:40,099 INFO L225 Difference]: With dead ends: 63 [2018-08-07 10:54:40,099 INFO L226 Difference]: Without dead ends: 58 [2018-08-07 10:54:40,100 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 197 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-08-07 10:54:40,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-08-07 10:54:40,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 57. [2018-08-07 10:54:40,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-08-07 10:54:40,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-08-07 10:54:40,105 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 53 [2018-08-07 10:54:40,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:40,105 INFO L480 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-08-07 10:54:40,105 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-08-07 10:54:40,105 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-08-07 10:54:40,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-08-07 10:54:40,106 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:40,106 INFO L376 BasicCegarLoop]: trace histogram [16, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:40,106 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:40,107 INFO L82 PathProgramCache]: Analyzing trace with hash -1297117336, now seen corresponding path program 15 times [2018-08-07 10:54:40,107 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:40,107 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:40,107 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:40,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:40,108 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:40,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:40,309 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:40,310 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:40,310 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:40,318 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:40,318 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:40,334 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-08-07 10:54:40,335 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:40,336 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:40,345 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:40,345 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:40,682 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:40,702 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:40,702 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:40,718 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:40,718 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:40,795 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-08-07 10:54:40,796 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:40,799 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:40,808 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:40,809 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:40,820 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:40,822 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:40,822 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 34 [2018-08-07 10:54:40,822 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:40,822 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-08-07 10:54:40,822 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-08-07 10:54:40,823 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-08-07 10:54:40,823 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 18 states. [2018-08-07 10:54:40,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:40,911 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-08-07 10:54:40,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-08-07 10:54:40,912 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2018-08-07 10:54:40,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:40,913 INFO L225 Difference]: With dead ends: 66 [2018-08-07 10:54:40,913 INFO L226 Difference]: Without dead ends: 61 [2018-08-07 10:54:40,914 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 208 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-08-07 10:54:40,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-08-07 10:54:40,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 60. [2018-08-07 10:54:40,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-08-07 10:54:40,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 60 transitions. [2018-08-07 10:54:40,919 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 60 transitions. Word has length 56 [2018-08-07 10:54:40,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:40,919 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 60 transitions. [2018-08-07 10:54:40,919 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-08-07 10:54:40,920 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 60 transitions. [2018-08-07 10:54:40,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-08-07 10:54:40,920 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:40,921 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:40,921 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:40,921 INFO L82 PathProgramCache]: Analyzing trace with hash -2050874481, now seen corresponding path program 16 times [2018-08-07 10:54:40,921 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:40,922 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:40,922 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:40,922 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:40,922 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:40,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:41,493 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:41,494 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:41,494 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:41,502 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:41,502 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:41,514 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:41,515 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:41,517 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:41,528 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:41,528 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:42,209 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:42,229 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:42,229 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:42,249 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:42,249 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:42,280 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:42,280 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:42,283 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:42,292 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:42,292 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:42,353 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (33)] Exception during sending of exit command (exit): Broken pipe [2018-08-07 10:54:42,355 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:42,355 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 36 [2018-08-07 10:54:42,355 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:42,356 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-08-07 10:54:42,356 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-08-07 10:54:42,358 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-08-07 10:54:42,358 INFO L87 Difference]: Start difference. First operand 60 states and 60 transitions. Second operand 19 states. [2018-08-07 10:54:42,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:42,476 INFO L93 Difference]: Finished difference Result 69 states and 69 transitions. [2018-08-07 10:54:42,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-08-07 10:54:42,476 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2018-08-07 10:54:42,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:42,478 INFO L225 Difference]: With dead ends: 69 [2018-08-07 10:54:42,478 INFO L226 Difference]: Without dead ends: 64 [2018-08-07 10:54:42,479 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 253 GetRequests, 219 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-08-07 10:54:42,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-08-07 10:54:42,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 63. [2018-08-07 10:54:42,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-08-07 10:54:42,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 63 transitions. [2018-08-07 10:54:42,489 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 63 transitions. Word has length 59 [2018-08-07 10:54:42,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:42,489 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 63 transitions. [2018-08-07 10:54:42,490 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-08-07 10:54:42,490 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 63 transitions. [2018-08-07 10:54:42,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-08-07 10:54:42,496 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:42,496 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:42,496 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:42,496 INFO L82 PathProgramCache]: Analyzing trace with hash 1154009608, now seen corresponding path program 17 times [2018-08-07 10:54:42,496 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:42,497 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:42,497 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:42,497 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:42,497 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:42,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:42,775 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:42,776 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:42,776 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:42,783 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:42,783 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:42,801 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-08-07 10:54:42,801 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:42,803 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:42,813 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:42,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:43,685 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:43,705 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:43,705 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:43,719 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:43,720 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:43,805 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-08-07 10:54:43,805 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:43,808 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:43,815 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:43,815 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:43,873 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:43,875 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:43,876 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 38 [2018-08-07 10:54:43,876 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:43,876 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-08-07 10:54:43,876 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-08-07 10:54:43,877 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-08-07 10:54:43,879 INFO L87 Difference]: Start difference. First operand 63 states and 63 transitions. Second operand 20 states. [2018-08-07 10:54:44,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:44,359 INFO L93 Difference]: Finished difference Result 72 states and 72 transitions. [2018-08-07 10:54:44,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-08-07 10:54:44,360 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 62 [2018-08-07 10:54:44,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:44,360 INFO L225 Difference]: With dead ends: 72 [2018-08-07 10:54:44,361 INFO L226 Difference]: Without dead ends: 67 [2018-08-07 10:54:44,361 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 230 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-08-07 10:54:44,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-08-07 10:54:44,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 66. [2018-08-07 10:54:44,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-08-07 10:54:44,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 66 transitions. [2018-08-07 10:54:44,365 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 66 transitions. Word has length 62 [2018-08-07 10:54:44,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:44,365 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 66 transitions. [2018-08-07 10:54:44,365 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-08-07 10:54:44,365 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 66 transitions. [2018-08-07 10:54:44,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-08-07 10:54:44,366 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:44,366 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:44,366 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:44,367 INFO L82 PathProgramCache]: Analyzing trace with hash 732914927, now seen corresponding path program 18 times [2018-08-07 10:54:44,367 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:44,367 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:44,367 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:44,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:44,368 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:44,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:44,936 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:44,937 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:44,937 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:44,947 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:44,947 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:44,967 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-08-07 10:54:44,967 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:44,969 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:44,979 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:44,979 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:45,581 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:45,605 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:45,606 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:45,621 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:45,621 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:45,723 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-08-07 10:54:45,723 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:45,726 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:45,735 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:45,735 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:45,767 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:45,768 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:45,769 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 40 [2018-08-07 10:54:45,769 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:45,769 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-08-07 10:54:45,769 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-08-07 10:54:45,770 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-08-07 10:54:45,770 INFO L87 Difference]: Start difference. First operand 66 states and 66 transitions. Second operand 21 states. [2018-08-07 10:54:45,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:45,849 INFO L93 Difference]: Finished difference Result 75 states and 75 transitions. [2018-08-07 10:54:45,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-08-07 10:54:45,850 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-08-07 10:54:45,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:45,851 INFO L225 Difference]: With dead ends: 75 [2018-08-07 10:54:45,851 INFO L226 Difference]: Without dead ends: 70 [2018-08-07 10:54:45,852 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 279 GetRequests, 241 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-08-07 10:54:45,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-08-07 10:54:45,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 69. [2018-08-07 10:54:45,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-08-07 10:54:45,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 69 transitions. [2018-08-07 10:54:45,856 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 69 transitions. Word has length 65 [2018-08-07 10:54:45,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:45,856 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 69 transitions. [2018-08-07 10:54:45,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-08-07 10:54:45,856 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 69 transitions. [2018-08-07 10:54:45,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-08-07 10:54:45,857 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:45,857 INFO L376 BasicCegarLoop]: trace histogram [20, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:45,858 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:45,858 INFO L82 PathProgramCache]: Analyzing trace with hash 1500744872, now seen corresponding path program 19 times [2018-08-07 10:54:45,858 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:45,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:45,859 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:45,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:45,859 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:45,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:46,128 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,128 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:46,129 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:46,136 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:46,136 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:46,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:46,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:46,162 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,163 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:46,716 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,736 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:46,736 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:46,751 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:46,751 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:46,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:46,780 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:46,790 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,791 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:46,807 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,808 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:46,808 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 42 [2018-08-07 10:54:46,808 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:46,809 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-08-07 10:54:46,809 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-08-07 10:54:46,809 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-08-07 10:54:46,810 INFO L87 Difference]: Start difference. First operand 69 states and 69 transitions. Second operand 22 states. [2018-08-07 10:54:46,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:46,918 INFO L93 Difference]: Finished difference Result 78 states and 78 transitions. [2018-08-07 10:54:46,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-08-07 10:54:46,919 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 68 [2018-08-07 10:54:46,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:46,920 INFO L225 Difference]: With dead ends: 78 [2018-08-07 10:54:46,920 INFO L226 Difference]: Without dead ends: 73 [2018-08-07 10:54:46,921 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 292 GetRequests, 252 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-08-07 10:54:46,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-08-07 10:54:46,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 72. [2018-08-07 10:54:46,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-08-07 10:54:46,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 72 transitions. [2018-08-07 10:54:46,924 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 72 transitions. Word has length 68 [2018-08-07 10:54:46,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:46,925 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 72 transitions. [2018-08-07 10:54:46,925 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-08-07 10:54:46,925 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 72 transitions. [2018-08-07 10:54:46,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-08-07 10:54:46,925 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:46,926 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:46,926 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:46,926 INFO L82 PathProgramCache]: Analyzing trace with hash 926817871, now seen corresponding path program 20 times [2018-08-07 10:54:46,926 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:46,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:46,927 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:46,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:46,927 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:46,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:47,296 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:47,296 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:47,296 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:47,303 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:47,304 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:47,321 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:47,321 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:47,323 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:47,335 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:47,335 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:48,009 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,029 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:48,029 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:48,044 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:48,044 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:48,073 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:48,073 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:48,076 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:48,085 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,086 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:48,103 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,104 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:48,104 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 44 [2018-08-07 10:54:48,105 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:48,105 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-08-07 10:54:48,105 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-08-07 10:54:48,106 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-08-07 10:54:48,106 INFO L87 Difference]: Start difference. First operand 72 states and 72 transitions. Second operand 23 states. [2018-08-07 10:54:48,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:48,368 INFO L93 Difference]: Finished difference Result 81 states and 81 transitions. [2018-08-07 10:54:48,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-08-07 10:54:48,371 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 71 [2018-08-07 10:54:48,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:48,372 INFO L225 Difference]: With dead ends: 81 [2018-08-07 10:54:48,373 INFO L226 Difference]: Without dead ends: 76 [2018-08-07 10:54:48,374 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 305 GetRequests, 263 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-08-07 10:54:48,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-08-07 10:54:48,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 75. [2018-08-07 10:54:48,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-08-07 10:54:48,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 75 transitions. [2018-08-07 10:54:48,377 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 75 transitions. Word has length 71 [2018-08-07 10:54:48,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:48,378 INFO L480 AbstractCegarLoop]: Abstraction has 75 states and 75 transitions. [2018-08-07 10:54:48,378 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-08-07 10:54:48,378 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 75 transitions. [2018-08-07 10:54:48,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-08-07 10:54:48,379 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:48,379 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:48,379 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:48,379 INFO L82 PathProgramCache]: Analyzing trace with hash 1332336456, now seen corresponding path program 21 times [2018-08-07 10:54:48,379 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:48,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:48,380 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:48,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:48,380 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:48,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:48,733 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,733 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:48,733 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:48,742 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:48,743 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:48,791 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-08-07 10:54:48,792 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:48,793 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:48,803 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,803 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:49,460 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:49,480 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:49,481 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:49,496 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:49,496 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:49,618 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-08-07 10:54:49,618 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:49,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:49,630 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:49,630 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:49,689 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:49,690 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:49,690 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 46 [2018-08-07 10:54:49,690 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:49,690 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-08-07 10:54:49,691 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-08-07 10:54:49,692 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-08-07 10:54:49,692 INFO L87 Difference]: Start difference. First operand 75 states and 75 transitions. Second operand 24 states. [2018-08-07 10:54:49,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:49,757 INFO L93 Difference]: Finished difference Result 84 states and 84 transitions. [2018-08-07 10:54:49,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-08-07 10:54:49,759 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-08-07 10:54:49,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:49,760 INFO L225 Difference]: With dead ends: 84 [2018-08-07 10:54:49,760 INFO L226 Difference]: Without dead ends: 79 [2018-08-07 10:54:49,762 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 318 GetRequests, 274 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-08-07 10:54:49,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-08-07 10:54:49,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 78. [2018-08-07 10:54:49,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-08-07 10:54:49,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 78 transitions. [2018-08-07 10:54:49,764 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 78 transitions. Word has length 74 [2018-08-07 10:54:49,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:49,764 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 78 transitions. [2018-08-07 10:54:49,765 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-08-07 10:54:49,765 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 78 transitions. [2018-08-07 10:54:49,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-08-07 10:54:49,765 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:49,766 INFO L376 BasicCegarLoop]: trace histogram [23, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:49,766 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:49,766 INFO L82 PathProgramCache]: Analyzing trace with hash 393498543, now seen corresponding path program 22 times [2018-08-07 10:54:49,766 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:49,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:49,767 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:49,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:49,767 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:49,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:50,085 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:50,086 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:50,086 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:50,094 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:50,094 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:50,109 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:50,109 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:50,111 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:50,119 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:50,120 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:50,701 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:50,730 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:50,730 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:50,753 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:50,753 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:50,786 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:50,787 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:50,790 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:50,800 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:50,800 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:50,847 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:50,848 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:50,848 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 48 [2018-08-07 10:54:50,848 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:50,849 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-08-07 10:54:50,849 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-08-07 10:54:50,850 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-08-07 10:54:50,850 INFO L87 Difference]: Start difference. First operand 78 states and 78 transitions. Second operand 25 states. [2018-08-07 10:54:50,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:50,922 INFO L93 Difference]: Finished difference Result 87 states and 87 transitions. [2018-08-07 10:54:50,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-08-07 10:54:50,931 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 77 [2018-08-07 10:54:50,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:50,932 INFO L225 Difference]: With dead ends: 87 [2018-08-07 10:54:50,932 INFO L226 Difference]: Without dead ends: 82 [2018-08-07 10:54:50,933 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 331 GetRequests, 285 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-08-07 10:54:50,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-08-07 10:54:50,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 81. [2018-08-07 10:54:50,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-08-07 10:54:50,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 81 transitions. [2018-08-07 10:54:50,936 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 81 transitions. Word has length 77 [2018-08-07 10:54:50,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:50,936 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 81 transitions. [2018-08-07 10:54:50,936 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-08-07 10:54:50,936 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 81 transitions. [2018-08-07 10:54:50,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-08-07 10:54:50,937 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:50,937 INFO L376 BasicCegarLoop]: trace histogram [24, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:50,938 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:50,938 INFO L82 PathProgramCache]: Analyzing trace with hash 300263912, now seen corresponding path program 23 times [2018-08-07 10:54:50,938 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:50,939 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:50,939 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:50,939 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:50,939 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:50,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:51,227 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:51,227 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:51,227 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:51,234 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:51,234 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:51,256 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-08-07 10:54:51,256 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:51,258 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:51,267 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:51,268 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:51,953 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:51,973 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:51,973 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:51,990 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:51,990 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:52,107 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-08-07 10:54:52,107 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:52,110 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:52,119 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:52,119 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:52,132 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:52,133 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:52,134 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 50 [2018-08-07 10:54:52,134 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:52,134 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-08-07 10:54:52,134 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-08-07 10:54:52,135 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-08-07 10:54:52,135 INFO L87 Difference]: Start difference. First operand 81 states and 81 transitions. Second operand 26 states. [2018-08-07 10:54:52,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:52,240 INFO L93 Difference]: Finished difference Result 90 states and 90 transitions. [2018-08-07 10:54:52,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-08-07 10:54:52,241 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 80 [2018-08-07 10:54:52,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:52,242 INFO L225 Difference]: With dead ends: 90 [2018-08-07 10:54:52,242 INFO L226 Difference]: Without dead ends: 85 [2018-08-07 10:54:52,243 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 344 GetRequests, 296 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-08-07 10:54:52,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-08-07 10:54:52,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 84. [2018-08-07 10:54:52,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-08-07 10:54:52,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 84 transitions. [2018-08-07 10:54:52,247 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 84 transitions. Word has length 80 [2018-08-07 10:54:52,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:52,247 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 84 transitions. [2018-08-07 10:54:52,247 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-08-07 10:54:52,248 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 84 transitions. [2018-08-07 10:54:52,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-08-07 10:54:52,248 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:52,249 INFO L376 BasicCegarLoop]: trace histogram [25, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:52,249 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:52,249 INFO L82 PathProgramCache]: Analyzing trace with hash 1591212303, now seen corresponding path program 24 times [2018-08-07 10:54:52,249 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:52,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:52,250 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:52,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:52,250 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:52,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:52,627 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:52,628 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:52,628 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:52,635 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:52,636 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:52,658 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 25 check-sat command(s) [2018-08-07 10:54:52,658 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:52,660 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:52,672 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:52,672 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:53,557 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:53,577 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:53,578 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:53,592 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:53,593 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:53,743 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 25 check-sat command(s) [2018-08-07 10:54:53,743 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:53,747 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:53,759 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:53,759 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:53,794 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:53,795 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:53,795 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 52 [2018-08-07 10:54:53,795 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:53,796 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-08-07 10:54:53,796 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-08-07 10:54:53,797 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-08-07 10:54:53,797 INFO L87 Difference]: Start difference. First operand 84 states and 84 transitions. Second operand 27 states. [2018-08-07 10:54:53,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:53,901 INFO L93 Difference]: Finished difference Result 93 states and 93 transitions. [2018-08-07 10:54:53,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-08-07 10:54:53,901 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 83 [2018-08-07 10:54:53,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:53,902 INFO L225 Difference]: With dead ends: 93 [2018-08-07 10:54:53,902 INFO L226 Difference]: Without dead ends: 88 [2018-08-07 10:54:53,903 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 357 GetRequests, 307 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-08-07 10:54:53,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-08-07 10:54:53,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 87. [2018-08-07 10:54:53,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-08-07 10:54:53,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 87 transitions. [2018-08-07 10:54:53,907 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 87 transitions. Word has length 83 [2018-08-07 10:54:53,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:53,907 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 87 transitions. [2018-08-07 10:54:53,907 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-08-07 10:54:53,907 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 87 transitions. [2018-08-07 10:54:53,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-08-07 10:54:53,908 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:53,908 INFO L376 BasicCegarLoop]: trace histogram [26, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:53,908 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:53,908 INFO L82 PathProgramCache]: Analyzing trace with hash -1197407096, now seen corresponding path program 25 times [2018-08-07 10:54:53,909 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:53,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:53,909 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:53,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:53,910 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:53,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:54,358 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:54,358 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:54,358 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:54,366 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:54,366 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:54,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:54,383 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:54,396 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:54,396 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:55,227 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:55,247 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:55,247 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:55,262 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:55,262 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:55,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:55,297 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:55,307 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:55,307 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:55,346 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:55,347 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:55,348 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 54 [2018-08-07 10:54:55,348 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:55,348 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-08-07 10:54:55,348 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-08-07 10:54:55,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1431, Invalid=1431, Unknown=0, NotChecked=0, Total=2862 [2018-08-07 10:54:55,349 INFO L87 Difference]: Start difference. First operand 87 states and 87 transitions. Second operand 28 states. [2018-08-07 10:54:55,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:55,443 INFO L93 Difference]: Finished difference Result 96 states and 96 transitions. [2018-08-07 10:54:55,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-08-07 10:54:55,443 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 86 [2018-08-07 10:54:55,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:55,445 INFO L225 Difference]: With dead ends: 96 [2018-08-07 10:54:55,445 INFO L226 Difference]: Without dead ends: 91 [2018-08-07 10:54:55,446 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 370 GetRequests, 318 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1431, Invalid=1431, Unknown=0, NotChecked=0, Total=2862 [2018-08-07 10:54:55,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-08-07 10:54:55,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 90. [2018-08-07 10:54:55,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-08-07 10:54:55,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 90 transitions. [2018-08-07 10:54:55,449 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 90 transitions. Word has length 86 [2018-08-07 10:54:55,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:55,450 INFO L480 AbstractCegarLoop]: Abstraction has 90 states and 90 transitions. [2018-08-07 10:54:55,450 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-08-07 10:54:55,450 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 90 transitions. [2018-08-07 10:54:55,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-08-07 10:54:55,451 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:55,451 INFO L376 BasicCegarLoop]: trace histogram [27, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:55,451 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:55,451 INFO L82 PathProgramCache]: Analyzing trace with hash 594483823, now seen corresponding path program 26 times [2018-08-07 10:54:55,451 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:55,452 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:55,452 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:55,452 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:55,452 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:55,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:56,457 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:56,457 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:56,458 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:56,467 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:56,467 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:56,483 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:56,483 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:56,485 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:56,500 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:56,500 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:57,850 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:57,870 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:57,870 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:57,885 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:57,885 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:57,920 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:57,920 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:57,924 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:57,937 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:57,938 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:57,964 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:57,966 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:57,966 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 56 [2018-08-07 10:54:57,966 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:57,966 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-08-07 10:54:57,966 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-08-07 10:54:57,967 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-08-07 10:54:57,967 INFO L87 Difference]: Start difference. First operand 90 states and 90 transitions. Second operand 29 states. [2018-08-07 10:54:58,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:58,052 INFO L93 Difference]: Finished difference Result 99 states and 99 transitions. [2018-08-07 10:54:58,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-08-07 10:54:58,054 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 89 [2018-08-07 10:54:58,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:58,055 INFO L225 Difference]: With dead ends: 99 [2018-08-07 10:54:58,055 INFO L226 Difference]: Without dead ends: 94 [2018-08-07 10:54:58,057 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 383 GetRequests, 329 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-08-07 10:54:58,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-08-07 10:54:58,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 93. [2018-08-07 10:54:58,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-08-07 10:54:58,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 93 transitions. [2018-08-07 10:54:58,060 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 93 transitions. Word has length 89 [2018-08-07 10:54:58,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:58,061 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 93 transitions. [2018-08-07 10:54:58,061 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-08-07 10:54:58,061 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 93 transitions. [2018-08-07 10:54:58,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-08-07 10:54:58,062 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:58,062 INFO L376 BasicCegarLoop]: trace histogram [28, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:58,062 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:58,062 INFO L82 PathProgramCache]: Analyzing trace with hash 668329768, now seen corresponding path program 27 times [2018-08-07 10:54:58,062 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:58,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:58,063 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:58,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:58,063 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:58,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:58,745 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:58,746 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:58,746 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:58,756 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:58,756 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:58,781 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-08-07 10:54:58,781 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:58,783 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:58,793 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:58,793 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:00,103 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:00,125 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:00,125 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:00,142 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:00,142 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:00,321 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-08-07 10:55:00,321 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:00,325 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:00,335 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:00,336 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:00,371 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:00,372 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:00,372 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 58 [2018-08-07 10:55:00,372 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:00,372 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-08-07 10:55:00,373 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-08-07 10:55:00,374 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-08-07 10:55:00,374 INFO L87 Difference]: Start difference. First operand 93 states and 93 transitions. Second operand 30 states. [2018-08-07 10:55:00,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:00,478 INFO L93 Difference]: Finished difference Result 102 states and 102 transitions. [2018-08-07 10:55:00,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-08-07 10:55:00,479 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 92 [2018-08-07 10:55:00,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:00,480 INFO L225 Difference]: With dead ends: 102 [2018-08-07 10:55:00,480 INFO L226 Difference]: Without dead ends: 97 [2018-08-07 10:55:00,481 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 396 GetRequests, 340 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-08-07 10:55:00,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-08-07 10:55:00,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 96. [2018-08-07 10:55:00,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-08-07 10:55:00,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 96 transitions. [2018-08-07 10:55:00,485 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 96 transitions. Word has length 92 [2018-08-07 10:55:00,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:00,485 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 96 transitions. [2018-08-07 10:55:00,485 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-08-07 10:55:00,485 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 96 transitions. [2018-08-07 10:55:00,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-08-07 10:55:00,486 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:00,486 INFO L376 BasicCegarLoop]: trace histogram [29, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:00,486 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:00,486 INFO L82 PathProgramCache]: Analyzing trace with hash 1589621711, now seen corresponding path program 28 times [2018-08-07 10:55:00,486 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:00,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:00,487 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:00,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:00,487 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:00,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:01,222 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:01,223 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:01,223 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:01,231 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:01,231 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:01,250 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:01,250 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:01,253 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:01,269 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:01,269 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:02,324 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:02,344 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:02,344 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:02,360 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:02,360 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:02,397 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:02,397 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:02,401 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:02,411 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:02,412 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:02,489 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:02,490 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:02,491 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 60 [2018-08-07 10:55:02,491 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:02,491 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-08-07 10:55:02,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-08-07 10:55:02,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1770, Invalid=1770, Unknown=0, NotChecked=0, Total=3540 [2018-08-07 10:55:02,493 INFO L87 Difference]: Start difference. First operand 96 states and 96 transitions. Second operand 31 states. [2018-08-07 10:55:02,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:02,627 INFO L93 Difference]: Finished difference Result 105 states and 105 transitions. [2018-08-07 10:55:02,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-08-07 10:55:02,637 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 95 [2018-08-07 10:55:02,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:02,638 INFO L225 Difference]: With dead ends: 105 [2018-08-07 10:55:02,638 INFO L226 Difference]: Without dead ends: 100 [2018-08-07 10:55:02,640 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 409 GetRequests, 351 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1770, Invalid=1770, Unknown=0, NotChecked=0, Total=3540 [2018-08-07 10:55:02,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-08-07 10:55:02,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 99. [2018-08-07 10:55:02,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-08-07 10:55:02,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 99 transitions. [2018-08-07 10:55:02,643 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 99 transitions. Word has length 95 [2018-08-07 10:55:02,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:02,644 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 99 transitions. [2018-08-07 10:55:02,644 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-08-07 10:55:02,644 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 99 transitions. [2018-08-07 10:55:02,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-08-07 10:55:02,644 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:02,645 INFO L376 BasicCegarLoop]: trace histogram [30, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:02,645 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:02,645 INFO L82 PathProgramCache]: Analyzing trace with hash -1338093112, now seen corresponding path program 29 times [2018-08-07 10:55:02,645 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:02,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:02,646 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:02,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:02,646 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:02,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:03,755 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:03,755 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:03,755 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:03,763 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:03,763 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:03,792 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-08-07 10:55:03,792 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:03,794 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:03,811 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:03,811 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:06,013 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:06,034 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:06,034 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:06,052 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:06,052 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:06,226 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-08-07 10:55:06,226 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:06,230 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:06,245 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:06,245 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:06,288 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:06,290 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:06,290 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 62 [2018-08-07 10:55:06,290 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:06,291 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-08-07 10:55:06,291 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-08-07 10:55:06,292 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-08-07 10:55:06,292 INFO L87 Difference]: Start difference. First operand 99 states and 99 transitions. Second operand 32 states. [2018-08-07 10:55:06,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:06,522 INFO L93 Difference]: Finished difference Result 108 states and 108 transitions. [2018-08-07 10:55:06,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-08-07 10:55:06,522 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 98 [2018-08-07 10:55:06,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:06,524 INFO L225 Difference]: With dead ends: 108 [2018-08-07 10:55:06,524 INFO L226 Difference]: Without dead ends: 103 [2018-08-07 10:55:06,525 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 422 GetRequests, 362 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-08-07 10:55:06,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-08-07 10:55:06,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 102. [2018-08-07 10:55:06,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-08-07 10:55:06,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 102 transitions. [2018-08-07 10:55:06,529 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 102 transitions. Word has length 98 [2018-08-07 10:55:06,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:06,529 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 102 transitions. [2018-08-07 10:55:06,529 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-08-07 10:55:06,529 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 102 transitions. [2018-08-07 10:55:06,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-08-07 10:55:06,530 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:06,530 INFO L376 BasicCegarLoop]: trace histogram [31, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:06,530 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:06,530 INFO L82 PathProgramCache]: Analyzing trace with hash 1305462063, now seen corresponding path program 30 times [2018-08-07 10:55:06,530 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:06,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:06,531 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:06,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:06,531 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:06,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:07,129 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:07,129 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:07,129 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:07,136 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:07,136 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:07,202 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 31 check-sat command(s) [2018-08-07 10:55:07,203 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:07,204 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:07,216 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:07,216 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:08,340 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:08,361 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:08,361 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:08,377 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:08,377 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:08,580 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 31 check-sat command(s) [2018-08-07 10:55:08,581 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:08,584 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:08,600 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:08,600 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:08,622 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:08,623 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:08,624 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 64 [2018-08-07 10:55:08,624 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:08,624 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-08-07 10:55:08,624 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-08-07 10:55:08,625 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2016, Invalid=2016, Unknown=0, NotChecked=0, Total=4032 [2018-08-07 10:55:08,625 INFO L87 Difference]: Start difference. First operand 102 states and 102 transitions. Second operand 33 states. [2018-08-07 10:55:08,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:08,796 INFO L93 Difference]: Finished difference Result 111 states and 111 transitions. [2018-08-07 10:55:08,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-08-07 10:55:08,796 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 101 [2018-08-07 10:55:08,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:08,798 INFO L225 Difference]: With dead ends: 111 [2018-08-07 10:55:08,798 INFO L226 Difference]: Without dead ends: 106 [2018-08-07 10:55:08,799 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 435 GetRequests, 373 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2016, Invalid=2016, Unknown=0, NotChecked=0, Total=4032 [2018-08-07 10:55:08,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-08-07 10:55:08,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 105. [2018-08-07 10:55:08,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-08-07 10:55:08,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 105 transitions. [2018-08-07 10:55:08,803 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 105 transitions. Word has length 101 [2018-08-07 10:55:08,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:08,804 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 105 transitions. [2018-08-07 10:55:08,804 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-08-07 10:55:08,804 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 105 transitions. [2018-08-07 10:55:08,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-08-07 10:55:08,804 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:08,805 INFO L376 BasicCegarLoop]: trace histogram [32, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:08,805 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:08,805 INFO L82 PathProgramCache]: Analyzing trace with hash -1357626264, now seen corresponding path program 31 times [2018-08-07 10:55:08,805 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:08,806 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:08,806 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:08,806 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:08,806 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:08,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:09,661 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:09,661 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:09,662 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:09,682 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:09,682 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:09,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:09,700 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:09,714 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:09,714 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:10,814 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:10,834 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:10,834 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:10,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:10,850 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:10,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:10,888 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:10,905 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:10,906 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:10,969 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:10,970 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:10,971 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 66 [2018-08-07 10:55:10,971 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:10,971 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-08-07 10:55:10,972 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-08-07 10:55:10,972 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2145, Invalid=2145, Unknown=0, NotChecked=0, Total=4290 [2018-08-07 10:55:10,972 INFO L87 Difference]: Start difference. First operand 105 states and 105 transitions. Second operand 34 states. [2018-08-07 10:55:11,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:11,106 INFO L93 Difference]: Finished difference Result 114 states and 114 transitions. [2018-08-07 10:55:11,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-08-07 10:55:11,113 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 104 [2018-08-07 10:55:11,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:11,114 INFO L225 Difference]: With dead ends: 114 [2018-08-07 10:55:11,114 INFO L226 Difference]: Without dead ends: 109 [2018-08-07 10:55:11,115 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 448 GetRequests, 384 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=2145, Invalid=2145, Unknown=0, NotChecked=0, Total=4290 [2018-08-07 10:55:11,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-08-07 10:55:11,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 108. [2018-08-07 10:55:11,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-08-07 10:55:11,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 108 transitions. [2018-08-07 10:55:11,119 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 108 transitions. Word has length 104 [2018-08-07 10:55:11,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:11,120 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 108 transitions. [2018-08-07 10:55:11,120 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-08-07 10:55:11,120 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 108 transitions. [2018-08-07 10:55:11,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-08-07 10:55:11,121 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:11,121 INFO L376 BasicCegarLoop]: trace histogram [33, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:11,121 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:11,121 INFO L82 PathProgramCache]: Analyzing trace with hash -786084209, now seen corresponding path program 32 times [2018-08-07 10:55:11,121 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:11,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:11,122 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:11,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:11,122 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:11,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:11,704 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:11,704 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:11,704 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:11,713 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:11,713 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:11,732 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:11,732 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:11,734 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:11,745 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:11,745 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:12,900 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:12,920 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:12,920 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:12,935 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:12,936 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:12,980 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:12,980 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:12,984 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:12,997 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:12,997 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:13,015 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:13,016 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:13,017 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 68 [2018-08-07 10:55:13,017 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:13,017 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-08-07 10:55:13,018 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-08-07 10:55:13,018 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2278, Invalid=2278, Unknown=0, NotChecked=0, Total=4556 [2018-08-07 10:55:13,018 INFO L87 Difference]: Start difference. First operand 108 states and 108 transitions. Second operand 35 states. [2018-08-07 10:55:13,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:13,211 INFO L93 Difference]: Finished difference Result 117 states and 117 transitions. [2018-08-07 10:55:13,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-08-07 10:55:13,213 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 107 [2018-08-07 10:55:13,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:13,214 INFO L225 Difference]: With dead ends: 117 [2018-08-07 10:55:13,214 INFO L226 Difference]: Without dead ends: 112 [2018-08-07 10:55:13,215 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 461 GetRequests, 395 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2278, Invalid=2278, Unknown=0, NotChecked=0, Total=4556 [2018-08-07 10:55:13,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-08-07 10:55:13,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 111. [2018-08-07 10:55:13,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-08-07 10:55:13,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 111 transitions. [2018-08-07 10:55:13,218 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 111 transitions. Word has length 107 [2018-08-07 10:55:13,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:13,218 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 111 transitions. [2018-08-07 10:55:13,218 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-08-07 10:55:13,218 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 111 transitions. [2018-08-07 10:55:13,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-08-07 10:55:13,219 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:13,219 INFO L376 BasicCegarLoop]: trace histogram [34, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:13,219 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:13,219 INFO L82 PathProgramCache]: Analyzing trace with hash 772914952, now seen corresponding path program 33 times [2018-08-07 10:55:13,220 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:13,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:13,220 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:13,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:13,221 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:13,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:14,006 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:14,006 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:14,006 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:14,013 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:14,013 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:14,046 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 34 check-sat command(s) [2018-08-07 10:55:14,046 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:14,048 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:14,062 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:14,062 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:15,617 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:15,637 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:15,637 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:15,652 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:15,652 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:15,891 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 34 check-sat command(s) [2018-08-07 10:55:15,892 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:15,895 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:15,911 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:15,911 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:15,931 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:15,932 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:15,933 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 70 [2018-08-07 10:55:15,933 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:15,933 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-08-07 10:55:15,933 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-08-07 10:55:15,934 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2415, Invalid=2415, Unknown=0, NotChecked=0, Total=4830 [2018-08-07 10:55:15,934 INFO L87 Difference]: Start difference. First operand 111 states and 111 transitions. Second operand 36 states. [2018-08-07 10:55:16,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:16,099 INFO L93 Difference]: Finished difference Result 120 states and 120 transitions. [2018-08-07 10:55:16,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-08-07 10:55:16,100 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 110 [2018-08-07 10:55:16,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:16,101 INFO L225 Difference]: With dead ends: 120 [2018-08-07 10:55:16,102 INFO L226 Difference]: Without dead ends: 115 [2018-08-07 10:55:16,102 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 474 GetRequests, 406 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=2415, Invalid=2415, Unknown=0, NotChecked=0, Total=4830 [2018-08-07 10:55:16,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-08-07 10:55:16,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 114. [2018-08-07 10:55:16,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-08-07 10:55:16,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 114 transitions. [2018-08-07 10:55:16,106 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 114 transitions. Word has length 110 [2018-08-07 10:55:16,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:16,106 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 114 transitions. [2018-08-07 10:55:16,106 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-08-07 10:55:16,107 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 114 transitions. [2018-08-07 10:55:16,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-08-07 10:55:16,107 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:16,107 INFO L376 BasicCegarLoop]: trace histogram [35, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:16,108 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:16,108 INFO L82 PathProgramCache]: Analyzing trace with hash -859418641, now seen corresponding path program 34 times [2018-08-07 10:55:16,108 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:16,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:16,109 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:16,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:16,109 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:16,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:16,700 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:16,700 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:16,700 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:16,708 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:16,709 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:16,725 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:16,725 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:16,728 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:16,742 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:16,742 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:18,325 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:18,346 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:18,347 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:18,362 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:18,362 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:18,408 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:18,408 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:18,412 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:18,426 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:18,426 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:18,448 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:18,450 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:18,450 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 72 [2018-08-07 10:55:18,450 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:18,450 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-08-07 10:55:18,451 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-08-07 10:55:18,451 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2556, Invalid=2556, Unknown=0, NotChecked=0, Total=5112 [2018-08-07 10:55:18,451 INFO L87 Difference]: Start difference. First operand 114 states and 114 transitions. Second operand 37 states. [2018-08-07 10:55:18,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:18,571 INFO L93 Difference]: Finished difference Result 123 states and 123 transitions. [2018-08-07 10:55:18,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-08-07 10:55:18,572 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 113 [2018-08-07 10:55:18,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:18,573 INFO L225 Difference]: With dead ends: 123 [2018-08-07 10:55:18,573 INFO L226 Difference]: Without dead ends: 118 [2018-08-07 10:55:18,573 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 487 GetRequests, 417 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=2556, Invalid=2556, Unknown=0, NotChecked=0, Total=5112 [2018-08-07 10:55:18,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-08-07 10:55:18,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 117. [2018-08-07 10:55:18,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-08-07 10:55:18,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 117 transitions. [2018-08-07 10:55:18,576 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 117 transitions. Word has length 113 [2018-08-07 10:55:18,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:18,576 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 117 transitions. [2018-08-07 10:55:18,576 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-08-07 10:55:18,576 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 117 transitions. [2018-08-07 10:55:18,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-08-07 10:55:18,577 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:18,577 INFO L376 BasicCegarLoop]: trace histogram [36, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:18,577 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:18,577 INFO L82 PathProgramCache]: Analyzing trace with hash -2089762392, now seen corresponding path program 35 times [2018-08-07 10:55:18,578 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:18,578 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:18,578 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:18,578 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:18,578 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:18,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:19,283 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:19,283 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:19,283 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:19,292 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:19,293 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:19,353 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 36 check-sat command(s) [2018-08-07 10:55:19,353 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:19,356 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:19,371 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:19,371 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:21,002 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:21,021 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:21,022 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:21,037 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:21,037 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:21,252 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 36 check-sat command(s) [2018-08-07 10:55:21,253 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:21,257 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:21,277 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:21,277 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:21,323 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:21,324 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:21,325 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 74 [2018-08-07 10:55:21,325 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:21,325 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-08-07 10:55:21,325 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-08-07 10:55:21,326 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2701, Invalid=2701, Unknown=0, NotChecked=0, Total=5402 [2018-08-07 10:55:21,326 INFO L87 Difference]: Start difference. First operand 117 states and 117 transitions. Second operand 38 states. [2018-08-07 10:55:21,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:21,439 INFO L93 Difference]: Finished difference Result 126 states and 126 transitions. [2018-08-07 10:55:21,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-08-07 10:55:21,441 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 116 [2018-08-07 10:55:21,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:21,442 INFO L225 Difference]: With dead ends: 126 [2018-08-07 10:55:21,442 INFO L226 Difference]: Without dead ends: 121 [2018-08-07 10:55:21,442 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 500 GetRequests, 428 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=2701, Invalid=2701, Unknown=0, NotChecked=0, Total=5402 [2018-08-07 10:55:21,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-08-07 10:55:21,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 120. [2018-08-07 10:55:21,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-08-07 10:55:21,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 120 transitions. [2018-08-07 10:55:21,445 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 120 transitions. Word has length 116 [2018-08-07 10:55:21,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:21,446 INFO L480 AbstractCegarLoop]: Abstraction has 120 states and 120 transitions. [2018-08-07 10:55:21,446 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-08-07 10:55:21,446 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 120 transitions. [2018-08-07 10:55:21,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-08-07 10:55:21,447 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:21,447 INFO L376 BasicCegarLoop]: trace histogram [37, 36, 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:21,447 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:21,447 INFO L82 PathProgramCache]: Analyzing trace with hash -2009544369, now seen corresponding path program 36 times [2018-08-07 10:55:21,447 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:21,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:21,448 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:21,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:21,448 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:21,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:22,065 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:22,065 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:22,065 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:22,072 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:22,072 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:22,104 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 37 check-sat command(s) [2018-08-07 10:55:22,104 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:22,107 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:22,123 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:22,123 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:23,620 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:23,640 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:23,640 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:23,655 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:23,655 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:23,916 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 37 check-sat command(s) [2018-08-07 10:55:23,916 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:23,920 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:23,941 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:23,942 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:24,013 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:24,015 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:24,015 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 76 [2018-08-07 10:55:24,015 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:24,015 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-08-07 10:55:24,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-08-07 10:55:24,016 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2850, Invalid=2850, Unknown=0, NotChecked=0, Total=5700 [2018-08-07 10:55:24,016 INFO L87 Difference]: Start difference. First operand 120 states and 120 transitions. Second operand 39 states. [2018-08-07 10:55:24,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:24,217 INFO L93 Difference]: Finished difference Result 129 states and 129 transitions. [2018-08-07 10:55:24,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-08-07 10:55:24,220 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 119 [2018-08-07 10:55:24,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:24,221 INFO L225 Difference]: With dead ends: 129 [2018-08-07 10:55:24,221 INFO L226 Difference]: Without dead ends: 124 [2018-08-07 10:55:24,221 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 513 GetRequests, 439 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=2850, Invalid=2850, Unknown=0, NotChecked=0, Total=5700 [2018-08-07 10:55:24,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-08-07 10:55:24,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 123. [2018-08-07 10:55:24,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-08-07 10:55:24,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 123 transitions. [2018-08-07 10:55:24,225 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 123 transitions. Word has length 119 [2018-08-07 10:55:24,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:24,225 INFO L480 AbstractCegarLoop]: Abstraction has 123 states and 123 transitions. [2018-08-07 10:55:24,225 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-08-07 10:55:24,225 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 123 transitions. [2018-08-07 10:55:24,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-08-07 10:55:24,226 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:24,226 INFO L376 BasicCegarLoop]: trace histogram [38, 37, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:24,226 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:24,226 INFO L82 PathProgramCache]: Analyzing trace with hash -236237752, now seen corresponding path program 37 times [2018-08-07 10:55:24,226 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:24,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:24,227 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:24,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:24,227 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:24,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:25,288 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:25,289 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:25,289 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:25,299 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:25,300 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:25,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:25,333 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:25,355 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:25,355 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:27,163 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:27,183 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:27,183 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:27,198 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:27,198 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:27,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:27,242 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:27,263 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:27,263 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:27,309 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:27,310 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:27,310 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 78 [2018-08-07 10:55:27,310 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:27,311 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-08-07 10:55:27,311 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-08-07 10:55:27,311 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3003, Invalid=3003, Unknown=0, NotChecked=0, Total=6006 [2018-08-07 10:55:27,312 INFO L87 Difference]: Start difference. First operand 123 states and 123 transitions. Second operand 40 states. [2018-08-07 10:55:27,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:27,447 INFO L93 Difference]: Finished difference Result 132 states and 132 transitions. [2018-08-07 10:55:27,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-08-07 10:55:27,447 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 122 [2018-08-07 10:55:27,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:27,448 INFO L225 Difference]: With dead ends: 132 [2018-08-07 10:55:27,448 INFO L226 Difference]: Without dead ends: 127 [2018-08-07 10:55:27,449 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 526 GetRequests, 450 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=3003, Invalid=3003, Unknown=0, NotChecked=0, Total=6006 [2018-08-07 10:55:27,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-08-07 10:55:27,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 126. [2018-08-07 10:55:27,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-08-07 10:55:27,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 126 transitions. [2018-08-07 10:55:27,453 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 126 transitions. Word has length 122 [2018-08-07 10:55:27,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:27,454 INFO L480 AbstractCegarLoop]: Abstraction has 126 states and 126 transitions. [2018-08-07 10:55:27,454 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-08-07 10:55:27,454 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 126 transitions. [2018-08-07 10:55:27,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-08-07 10:55:27,455 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:27,455 INFO L376 BasicCegarLoop]: trace histogram [39, 38, 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:27,455 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:27,455 INFO L82 PathProgramCache]: Analyzing trace with hash 243448495, now seen corresponding path program 38 times [2018-08-07 10:55:27,455 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:27,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:27,456 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:27,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:27,456 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:27,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:28,598 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:28,598 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:28,598 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:28,607 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:28,607 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:28,629 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:28,630 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:28,632 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:28,656 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:28,656 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:30,737 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:30,757 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:30,757 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:30,772 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:30,772 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:30,818 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:30,818 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:30,822 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:30,838 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:30,838 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:30,861 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:30,862 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:30,862 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 80 [2018-08-07 10:55:30,862 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:30,862 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-08-07 10:55:30,863 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-08-07 10:55:30,863 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3160, Invalid=3160, Unknown=0, NotChecked=0, Total=6320 [2018-08-07 10:55:30,863 INFO L87 Difference]: Start difference. First operand 126 states and 126 transitions. Second operand 41 states. [2018-08-07 10:55:31,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:31,030 INFO L93 Difference]: Finished difference Result 135 states and 135 transitions. [2018-08-07 10:55:31,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-08-07 10:55:31,032 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 125 [2018-08-07 10:55:31,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:31,033 INFO L225 Difference]: With dead ends: 135 [2018-08-07 10:55:31,033 INFO L226 Difference]: Without dead ends: 130 [2018-08-07 10:55:31,033 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 539 GetRequests, 461 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=3160, Invalid=3160, Unknown=0, NotChecked=0, Total=6320 [2018-08-07 10:55:31,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-08-07 10:55:31,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 129. [2018-08-07 10:55:31,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-08-07 10:55:31,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 129 transitions. [2018-08-07 10:55:31,037 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 129 transitions. Word has length 125 [2018-08-07 10:55:31,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:31,038 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 129 transitions. [2018-08-07 10:55:31,038 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-08-07 10:55:31,038 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 129 transitions. [2018-08-07 10:55:31,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-08-07 10:55:31,039 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:31,039 INFO L376 BasicCegarLoop]: trace histogram [40, 39, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:31,039 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:31,039 INFO L82 PathProgramCache]: Analyzing trace with hash 1220239080, now seen corresponding path program 39 times [2018-08-07 10:55:31,040 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:31,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:31,040 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:31,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:31,040 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:31,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:31,732 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:31,732 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:31,732 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:31,740 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:31,740 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:31,773 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 40 check-sat command(s) [2018-08-07 10:55:31,773 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:31,775 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:31,792 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:31,792 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:33,537 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:33,557 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:33,557 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:33,572 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:33,572 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:33,861 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 40 check-sat command(s) [2018-08-07 10:55:33,861 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:33,865 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:33,887 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:33,888 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:33,934 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:33,935 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:33,936 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 82 [2018-08-07 10:55:33,936 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:33,936 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-08-07 10:55:33,937 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-08-07 10:55:33,937 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3321, Invalid=3321, Unknown=0, NotChecked=0, Total=6642 [2018-08-07 10:55:33,937 INFO L87 Difference]: Start difference. First operand 129 states and 129 transitions. Second operand 42 states. [2018-08-07 10:55:34,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:34,380 INFO L93 Difference]: Finished difference Result 138 states and 138 transitions. [2018-08-07 10:55:34,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-08-07 10:55:34,383 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 128 [2018-08-07 10:55:34,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:34,384 INFO L225 Difference]: With dead ends: 138 [2018-08-07 10:55:34,384 INFO L226 Difference]: Without dead ends: 133 [2018-08-07 10:55:34,384 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 552 GetRequests, 472 SyntacticMatches, 0 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=3321, Invalid=3321, Unknown=0, NotChecked=0, Total=6642 [2018-08-07 10:55:34,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-08-07 10:55:34,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 132. [2018-08-07 10:55:34,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-08-07 10:55:34,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 132 transitions. [2018-08-07 10:55:34,388 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 132 transitions. Word has length 128 [2018-08-07 10:55:34,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:34,388 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 132 transitions. [2018-08-07 10:55:34,388 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-08-07 10:55:34,388 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 132 transitions. [2018-08-07 10:55:34,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-08-07 10:55:34,389 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:34,389 INFO L376 BasicCegarLoop]: trace histogram [41, 40, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:34,389 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:34,390 INFO L82 PathProgramCache]: Analyzing trace with hash -1909840881, now seen corresponding path program 40 times [2018-08-07 10:55:34,390 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:34,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:34,390 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:34,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:34,391 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:34,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:35,701 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:35,701 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:35,701 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:35,709 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:35,710 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:35,736 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:35,736 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:35,739 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:35,762 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:35,763 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:37,605 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:37,626 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:37,626 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:37,641 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:37,641 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:37,696 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:37,696 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:37,701 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:37,724 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:37,724 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:37,806 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:37,807 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:37,808 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43, 43, 43] total 84 [2018-08-07 10:55:37,808 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:37,809 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-08-07 10:55:37,809 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-08-07 10:55:37,810 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3486, Invalid=3486, Unknown=0, NotChecked=0, Total=6972 [2018-08-07 10:55:37,810 INFO L87 Difference]: Start difference. First operand 132 states and 132 transitions. Second operand 43 states. [2018-08-07 10:55:38,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:38,361 INFO L93 Difference]: Finished difference Result 141 states and 141 transitions. [2018-08-07 10:55:38,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-08-07 10:55:38,361 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 131 [2018-08-07 10:55:38,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:38,363 INFO L225 Difference]: With dead ends: 141 [2018-08-07 10:55:38,363 INFO L226 Difference]: Without dead ends: 136 [2018-08-07 10:55:38,364 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 565 GetRequests, 483 SyntacticMatches, 0 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=3486, Invalid=3486, Unknown=0, NotChecked=0, Total=6972 [2018-08-07 10:55:38,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-08-07 10:55:38,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 135. [2018-08-07 10:55:38,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-08-07 10:55:38,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 135 transitions. [2018-08-07 10:55:38,367 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 135 transitions. Word has length 131 [2018-08-07 10:55:38,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:38,368 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 135 transitions. [2018-08-07 10:55:38,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-08-07 10:55:38,368 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 135 transitions. [2018-08-07 10:55:38,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-08-07 10:55:38,369 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:38,369 INFO L376 BasicCegarLoop]: trace histogram [42, 41, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:38,369 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:38,369 INFO L82 PathProgramCache]: Analyzing trace with hash -2086995576, now seen corresponding path program 41 times [2018-08-07 10:55:38,370 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:38,370 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:38,370 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:38,370 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:38,370 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:38,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:39,150 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:39,150 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:39,150 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:39,158 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:39,158 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:39,196 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 42 check-sat command(s) [2018-08-07 10:55:39,196 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:39,198 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:39,222 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:39,222 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:41,647 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:41,667 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:41,667 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:41,682 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:41,682 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:41,965 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 42 check-sat command(s) [2018-08-07 10:55:41,965 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:41,969 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:41,986 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:41,986 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:42,017 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:42,018 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:42,018 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44, 44, 44, 44] total 86 [2018-08-07 10:55:42,018 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:42,018 INFO L459 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-08-07 10:55:42,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-08-07 10:55:42,019 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3655, Invalid=3655, Unknown=0, NotChecked=0, Total=7310 [2018-08-07 10:55:42,019 INFO L87 Difference]: Start difference. First operand 135 states and 135 transitions. Second operand 44 states. [2018-08-07 10:55:42,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:42,363 INFO L93 Difference]: Finished difference Result 144 states and 144 transitions. [2018-08-07 10:55:42,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-08-07 10:55:42,364 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 134 [2018-08-07 10:55:42,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:42,365 INFO L225 Difference]: With dead ends: 144 [2018-08-07 10:55:42,365 INFO L226 Difference]: Without dead ends: 139 [2018-08-07 10:55:42,366 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 578 GetRequests, 494 SyntacticMatches, 0 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=3655, Invalid=3655, Unknown=0, NotChecked=0, Total=7310 [2018-08-07 10:55:42,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-08-07 10:55:42,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 138. [2018-08-07 10:55:42,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-08-07 10:55:42,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 138 transitions. [2018-08-07 10:55:42,370 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 138 transitions. Word has length 134 [2018-08-07 10:55:42,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:42,370 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 138 transitions. [2018-08-07 10:55:42,370 INFO L481 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-08-07 10:55:42,371 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 138 transitions. [2018-08-07 10:55:42,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-08-07 10:55:42,371 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:42,372 INFO L376 BasicCegarLoop]: trace histogram [43, 42, 42, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:42,372 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:42,372 INFO L82 PathProgramCache]: Analyzing trace with hash -1187707537, now seen corresponding path program 42 times [2018-08-07 10:55:42,372 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:42,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:42,373 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:42,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:42,373 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:42,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:43,198 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:43,198 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:43,198 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:43,209 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:43,209 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:43,248 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2018-08-07 10:55:43,248 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:43,250 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:43,269 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:43,269 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:45,495 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:45,516 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:45,516 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:45,531 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:45,531 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:45,862 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2018-08-07 10:55:45,862 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:45,866 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:45,885 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:45,885 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:45,910 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:45,912 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:45,912 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45, 45, 45, 45] total 88 [2018-08-07 10:55:45,912 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:45,912 INFO L459 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-08-07 10:55:45,913 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-08-07 10:55:45,913 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3828, Invalid=3828, Unknown=0, NotChecked=0, Total=7656 [2018-08-07 10:55:45,913 INFO L87 Difference]: Start difference. First operand 138 states and 138 transitions. Second operand 45 states. [2018-08-07 10:55:46,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:46,078 INFO L93 Difference]: Finished difference Result 147 states and 147 transitions. [2018-08-07 10:55:46,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-08-07 10:55:46,078 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 137 [2018-08-07 10:55:46,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:46,079 INFO L225 Difference]: With dead ends: 147 [2018-08-07 10:55:46,079 INFO L226 Difference]: Without dead ends: 142 [2018-08-07 10:55:46,080 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 591 GetRequests, 505 SyntacticMatches, 0 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=3828, Invalid=3828, Unknown=0, NotChecked=0, Total=7656 [2018-08-07 10:55:46,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-08-07 10:55:46,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 141. [2018-08-07 10:55:46,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-08-07 10:55:46,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 141 transitions. [2018-08-07 10:55:46,084 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 141 transitions. Word has length 137 [2018-08-07 10:55:46,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:46,084 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 141 transitions. [2018-08-07 10:55:46,085 INFO L481 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-08-07 10:55:46,085 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 141 transitions. [2018-08-07 10:55:46,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-08-07 10:55:46,085 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:46,086 INFO L376 BasicCegarLoop]: trace histogram [44, 43, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:46,086 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:46,086 INFO L82 PathProgramCache]: Analyzing trace with hash 1791237160, now seen corresponding path program 43 times [2018-08-07 10:55:46,086 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:46,087 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:46,087 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:46,087 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:46,087 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:46,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:47,692 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:47,693 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:47,693 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:47,706 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:47,706 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:47,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:47,731 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:47,751 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:47,752 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:49,780 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:49,800 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:49,800 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:49,816 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:49,816 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:49,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:49,867 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:49,886 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:49,886 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:49,917 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:49,918 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:49,918 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46, 46, 46, 46] total 90 [2018-08-07 10:55:49,918 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:49,919 INFO L459 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-08-07 10:55:49,919 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-08-07 10:55:49,920 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4005, Invalid=4005, Unknown=0, NotChecked=0, Total=8010 [2018-08-07 10:55:49,920 INFO L87 Difference]: Start difference. First operand 141 states and 141 transitions. Second operand 46 states. [2018-08-07 10:55:50,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:50,175 INFO L93 Difference]: Finished difference Result 150 states and 150 transitions. [2018-08-07 10:55:50,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-08-07 10:55:50,175 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 140 [2018-08-07 10:55:50,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:50,177 INFO L225 Difference]: With dead ends: 150 [2018-08-07 10:55:50,177 INFO L226 Difference]: Without dead ends: 145 [2018-08-07 10:55:50,178 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 604 GetRequests, 516 SyntacticMatches, 0 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=4005, Invalid=4005, Unknown=0, NotChecked=0, Total=8010 [2018-08-07 10:55:50,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-08-07 10:55:50,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 144. [2018-08-07 10:55:50,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-08-07 10:55:50,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 144 transitions. [2018-08-07 10:55:50,182 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 144 transitions. Word has length 140 [2018-08-07 10:55:50,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:50,182 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 144 transitions. [2018-08-07 10:55:50,182 INFO L481 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-08-07 10:55:50,182 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 144 transitions. [2018-08-07 10:55:50,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-08-07 10:55:50,183 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:50,183 INFO L376 BasicCegarLoop]: trace histogram [45, 44, 44, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:50,183 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:50,184 INFO L82 PathProgramCache]: Analyzing trace with hash 623468239, now seen corresponding path program 44 times [2018-08-07 10:55:50,184 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:50,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:50,184 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:50,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:50,185 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:50,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:51,112 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:51,112 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:51,112 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:51,119 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:51,120 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:51,154 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:51,154 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:51,156 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:51,176 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:51,176 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:53,353 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:53,373 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:53,373 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:53,388 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:53,388 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:53,442 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:53,442 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:53,447 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:53,468 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:53,468 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:53,539 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:53,541 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:53,541 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47, 47, 47] total 92 [2018-08-07 10:55:53,541 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:53,542 INFO L459 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-08-07 10:55:53,542 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-08-07 10:55:53,543 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4186, Invalid=4186, Unknown=0, NotChecked=0, Total=8372 [2018-08-07 10:55:53,543 INFO L87 Difference]: Start difference. First operand 144 states and 144 transitions. Second operand 47 states. [2018-08-07 10:55:54,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:54,206 INFO L93 Difference]: Finished difference Result 153 states and 153 transitions. [2018-08-07 10:55:54,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-08-07 10:55:54,207 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 143 [2018-08-07 10:55:54,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:54,208 INFO L225 Difference]: With dead ends: 153 [2018-08-07 10:55:54,208 INFO L226 Difference]: Without dead ends: 148 [2018-08-07 10:55:54,209 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 617 GetRequests, 527 SyntacticMatches, 0 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=4186, Invalid=4186, Unknown=0, NotChecked=0, Total=8372 [2018-08-07 10:55:54,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-08-07 10:55:54,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 147. [2018-08-07 10:55:54,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-08-07 10:55:54,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 147 transitions. [2018-08-07 10:55:54,213 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 147 transitions. Word has length 143 [2018-08-07 10:55:54,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:54,213 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 147 transitions. [2018-08-07 10:55:54,213 INFO L481 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-08-07 10:55:54,213 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 147 transitions. [2018-08-07 10:55:54,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-08-07 10:55:54,214 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:54,214 INFO L376 BasicCegarLoop]: trace histogram [46, 45, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:54,215 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:54,215 INFO L82 PathProgramCache]: Analyzing trace with hash 854640328, now seen corresponding path program 45 times [2018-08-07 10:55:54,215 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:54,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:54,216 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:54,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:54,216 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:54,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:55,651 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:55,652 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:55,652 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:55,661 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:55,661 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:55,703 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 46 check-sat command(s) [2018-08-07 10:55:55,703 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:55,705 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:55,725 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:55,726 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:58,000 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:58,020 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:58,021 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:58,036 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:58,036 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:58,420 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 46 check-sat command(s) [2018-08-07 10:55:58,420 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:58,425 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:58,446 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:58,446 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:58,474 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:58,475 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:58,475 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48, 48, 48] total 94 [2018-08-07 10:55:58,475 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:58,476 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-08-07 10:55:58,476 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-08-07 10:55:58,476 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4371, Invalid=4371, Unknown=0, NotChecked=0, Total=8742 [2018-08-07 10:55:58,477 INFO L87 Difference]: Start difference. First operand 147 states and 147 transitions. Second operand 48 states. [2018-08-07 10:55:58,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:58,637 INFO L93 Difference]: Finished difference Result 156 states and 156 transitions. [2018-08-07 10:55:58,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-08-07 10:55:58,637 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 146 [2018-08-07 10:55:58,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:58,639 INFO L225 Difference]: With dead ends: 156 [2018-08-07 10:55:58,639 INFO L226 Difference]: Without dead ends: 151 [2018-08-07 10:55:58,640 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 630 GetRequests, 538 SyntacticMatches, 0 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=4371, Invalid=4371, Unknown=0, NotChecked=0, Total=8742 [2018-08-07 10:55:58,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-08-07 10:55:58,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 150. [2018-08-07 10:55:58,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-08-07 10:55:58,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 150 transitions. [2018-08-07 10:55:58,644 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 150 transitions. Word has length 146 [2018-08-07 10:55:58,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:58,645 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 150 transitions. [2018-08-07 10:55:58,645 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-08-07 10:55:58,645 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 150 transitions. [2018-08-07 10:55:58,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-08-07 10:55:58,646 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:58,646 INFO L376 BasicCegarLoop]: trace histogram [47, 46, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:58,646 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:58,646 INFO L82 PathProgramCache]: Analyzing trace with hash -1425199057, now seen corresponding path program 46 times [2018-08-07 10:55:58,646 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:58,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:58,647 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:58,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:58,647 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:58,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:00,104 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:00,105 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:00,105 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:00,114 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:56:00,114 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:56:00,137 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:56:00,137 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:00,140 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:00,161 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:00,162 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:02,876 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:02,896 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:02,896 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:02,911 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:56:02,911 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:56:02,974 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:56:02,975 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:02,980 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:03,001 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:03,001 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:03,025 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:03,026 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:03,026 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49, 49, 49] total 96 [2018-08-07 10:56:03,026 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:03,026 INFO L459 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-08-07 10:56:03,027 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-08-07 10:56:03,027 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2018-08-07 10:56:03,027 INFO L87 Difference]: Start difference. First operand 150 states and 150 transitions. Second operand 49 states. [2018-08-07 10:56:03,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:03,186 INFO L93 Difference]: Finished difference Result 159 states and 159 transitions. [2018-08-07 10:56:03,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-08-07 10:56:03,186 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 149 [2018-08-07 10:56:03,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:03,188 INFO L225 Difference]: With dead ends: 159 [2018-08-07 10:56:03,188 INFO L226 Difference]: Without dead ends: 154 [2018-08-07 10:56:03,189 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 643 GetRequests, 549 SyntacticMatches, 0 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2018-08-07 10:56:03,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-08-07 10:56:03,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 153. [2018-08-07 10:56:03,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-08-07 10:56:03,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 153 transitions. [2018-08-07 10:56:03,194 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 153 transitions. Word has length 149 [2018-08-07 10:56:03,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:03,194 INFO L480 AbstractCegarLoop]: Abstraction has 153 states and 153 transitions. [2018-08-07 10:56:03,194 INFO L481 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-08-07 10:56:03,194 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 153 transitions. [2018-08-07 10:56:03,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-08-07 10:56:03,195 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:03,195 INFO L376 BasicCegarLoop]: trace histogram [48, 47, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:03,196 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:03,196 INFO L82 PathProgramCache]: Analyzing trace with hash 492501352, now seen corresponding path program 47 times [2018-08-07 10:56:03,196 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:03,197 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:03,197 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:03,197 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:03,197 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:03,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:04,129 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:04,129 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:04,129 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:04,137 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:56:04,137 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:04,177 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 48 check-sat command(s) [2018-08-07 10:56:04,177 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:04,179 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:04,200 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:04,201 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:06,962 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:06,982 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:06,982 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:06,997 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:56:06,997 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:07,335 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 48 check-sat command(s) [2018-08-07 10:56:07,335 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:07,339 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:07,357 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:07,358 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:07,390 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:07,391 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:07,391 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 98 [2018-08-07 10:56:07,391 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:07,392 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-08-07 10:56:07,392 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-08-07 10:56:07,392 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4753, Invalid=4753, Unknown=0, NotChecked=0, Total=9506 [2018-08-07 10:56:07,393 INFO L87 Difference]: Start difference. First operand 153 states and 153 transitions. Second operand 50 states. [2018-08-07 10:56:07,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:07,535 INFO L93 Difference]: Finished difference Result 162 states and 162 transitions. [2018-08-07 10:56:07,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-08-07 10:56:07,536 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 152 [2018-08-07 10:56:07,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:07,537 INFO L225 Difference]: With dead ends: 162 [2018-08-07 10:56:07,537 INFO L226 Difference]: Without dead ends: 157 [2018-08-07 10:56:07,539 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 656 GetRequests, 560 SyntacticMatches, 0 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=4753, Invalid=4753, Unknown=0, NotChecked=0, Total=9506 [2018-08-07 10:56:07,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-08-07 10:56:07,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 156. [2018-08-07 10:56:07,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-08-07 10:56:07,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 156 transitions. [2018-08-07 10:56:07,542 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 156 transitions. Word has length 152 [2018-08-07 10:56:07,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:07,543 INFO L480 AbstractCegarLoop]: Abstraction has 156 states and 156 transitions. [2018-08-07 10:56:07,543 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-08-07 10:56:07,543 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 156 transitions. [2018-08-07 10:56:07,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-08-07 10:56:07,543 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:07,543 INFO L376 BasicCegarLoop]: trace histogram [49, 48, 48, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:07,544 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:07,544 INFO L82 PathProgramCache]: Analyzing trace with hash -949585521, now seen corresponding path program 48 times [2018-08-07 10:56:07,544 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:07,544 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:07,545 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:07,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:07,545 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:07,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:10,354 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:10,354 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:10,354 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:10,362 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:56:10,362 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:56:10,405 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 49 check-sat command(s) [2018-08-07 10:56:10,405 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:10,407 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:10,430 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:10,430 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:13,328 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:13,348 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:13,348 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:13,366 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:56:13,366 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:56:13,770 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 49 check-sat command(s) [2018-08-07 10:56:13,771 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:13,776 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:13,798 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:13,799 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:13,829 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:13,830 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:13,830 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 51, 51, 51, 51] total 100 [2018-08-07 10:56:13,830 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:13,831 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-08-07 10:56:13,831 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-08-07 10:56:13,831 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4950, Invalid=4950, Unknown=0, NotChecked=0, Total=9900 [2018-08-07 10:56:13,832 INFO L87 Difference]: Start difference. First operand 156 states and 156 transitions. Second operand 51 states. [2018-08-07 10:56:14,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:14,029 INFO L93 Difference]: Finished difference Result 165 states and 165 transitions. [2018-08-07 10:56:14,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-08-07 10:56:14,029 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 155 [2018-08-07 10:56:14,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:14,030 INFO L225 Difference]: With dead ends: 165 [2018-08-07 10:56:14,030 INFO L226 Difference]: Without dead ends: 160 [2018-08-07 10:56:14,031 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 669 GetRequests, 571 SyntacticMatches, 0 SemanticMatches, 98 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.6s TimeCoverageRelationStatistics Valid=4950, Invalid=4950, Unknown=0, NotChecked=0, Total=9900 [2018-08-07 10:56:14,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-08-07 10:56:14,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 159. [2018-08-07 10:56:14,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-08-07 10:56:14,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 159 transitions. [2018-08-07 10:56:14,034 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 159 transitions. Word has length 155 [2018-08-07 10:56:14,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:14,034 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 159 transitions. [2018-08-07 10:56:14,034 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-08-07 10:56:14,035 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 159 transitions. [2018-08-07 10:56:14,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2018-08-07 10:56:14,035 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:14,035 INFO L376 BasicCegarLoop]: trace histogram [50, 49, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:14,035 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:14,036 INFO L82 PathProgramCache]: Analyzing trace with hash 398242824, now seen corresponding path program 49 times [2018-08-07 10:56:14,036 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:14,036 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:14,036 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:14,037 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:14,037 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:14,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:15,406 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:15,407 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:15,407 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:15,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:15,415 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:56:15,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:15,446 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:15,469 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:15,469 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:18,480 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:18,501 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:18,501 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:18,516 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:18,516 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:56:18,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:18,577 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:18,600 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:18,600 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:18,674 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:18,675 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:18,675 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52, 52, 52, 52] total 102 [2018-08-07 10:56:18,676 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:18,676 INFO L459 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-08-07 10:56:18,677 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-08-07 10:56:18,677 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5151, Invalid=5151, Unknown=0, NotChecked=0, Total=10302 [2018-08-07 10:56:18,677 INFO L87 Difference]: Start difference. First operand 159 states and 159 transitions. Second operand 52 states. [2018-08-07 10:56:18,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:18,846 INFO L93 Difference]: Finished difference Result 168 states and 168 transitions. [2018-08-07 10:56:18,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-08-07 10:56:18,852 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 158 [2018-08-07 10:56:18,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:18,853 INFO L225 Difference]: With dead ends: 168 [2018-08-07 10:56:18,853 INFO L226 Difference]: Without dead ends: 163 [2018-08-07 10:56:18,854 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 682 GetRequests, 582 SyntacticMatches, 0 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=5151, Invalid=5151, Unknown=0, NotChecked=0, Total=10302 [2018-08-07 10:56:18,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-08-07 10:56:18,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 162. [2018-08-07 10:56:18,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-08-07 10:56:18,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 162 transitions. [2018-08-07 10:56:18,857 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 162 transitions. Word has length 158 [2018-08-07 10:56:18,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:18,857 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 162 transitions. [2018-08-07 10:56:18,858 INFO L481 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-08-07 10:56:18,858 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 162 transitions. [2018-08-07 10:56:18,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2018-08-07 10:56:18,859 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:18,859 INFO L376 BasicCegarLoop]: trace histogram [51, 50, 50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:18,859 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:18,859 INFO L82 PathProgramCache]: Analyzing trace with hash -96781585, now seen corresponding path program 50 times [2018-08-07 10:56:18,859 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:18,860 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:18,860 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:18,860 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:18,860 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:18,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:19,901 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 0 proven. 3775 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:19,901 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:19,901 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:19,908 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:56:19,908 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:19,956 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:56:19,957 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:19,959 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:19,992 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 0 proven. 3775 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:19,992 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:23,024 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 0 proven. 3775 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:23,046 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:23,046 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:23,061 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:56:23,061 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:23,120 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:56:23,120 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:23,125 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:23,148 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 0 proven. 3775 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:23,148 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:23,182 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 0 proven. 3775 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:23,183 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:23,183 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53, 53, 53, 53] total 104 [2018-08-07 10:56:23,183 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:23,184 INFO L459 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-08-07 10:56:23,184 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-08-07 10:56:23,185 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5356, Invalid=5356, Unknown=0, NotChecked=0, Total=10712 [2018-08-07 10:56:23,185 INFO L87 Difference]: Start difference. First operand 162 states and 162 transitions. Second operand 53 states. [2018-08-07 10:56:23,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:23,352 INFO L93 Difference]: Finished difference Result 171 states and 171 transitions. [2018-08-07 10:56:23,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-08-07 10:56:23,353 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 161 [2018-08-07 10:56:23,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:23,354 INFO L225 Difference]: With dead ends: 171 [2018-08-07 10:56:23,354 INFO L226 Difference]: Without dead ends: 166 [2018-08-07 10:56:23,355 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 695 GetRequests, 593 SyntacticMatches, 0 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=5356, Invalid=5356, Unknown=0, NotChecked=0, Total=10712 [2018-08-07 10:56:23,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-08-07 10:56:23,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 165. [2018-08-07 10:56:23,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-08-07 10:56:23,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 165 transitions. [2018-08-07 10:56:23,358 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 165 transitions. Word has length 161 [2018-08-07 10:56:23,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:23,358 INFO L480 AbstractCegarLoop]: Abstraction has 165 states and 165 transitions. [2018-08-07 10:56:23,358 INFO L481 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-08-07 10:56:23,358 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 165 transitions. [2018-08-07 10:56:23,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-08-07 10:56:23,359 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:23,359 INFO L376 BasicCegarLoop]: trace histogram [52, 51, 51, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:23,359 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:23,359 INFO L82 PathProgramCache]: Analyzing trace with hash 1548744360, now seen corresponding path program 51 times [2018-08-07 10:56:23,359 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:23,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:23,360 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:23,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:23,361 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:23,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:29,414 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 0 proven. 3927 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:29,415 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:29,415 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:29,423 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:56:29,423 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:56:29,470 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 52 check-sat command(s) [2018-08-07 10:56:29,470 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:29,472 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:29,497 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 0 proven. 3927 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:29,497 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:32,597 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 0 proven. 3927 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:32,617 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:32,618 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:32,632 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:56:32,632 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:56:33,078 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 52 check-sat command(s) [2018-08-07 10:56:33,078 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:33,082 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:33,109 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 0 proven. 3927 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:33,109 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:33,187 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 0 proven. 3927 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:33,189 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:33,190 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54, 54, 54, 54] total 106 [2018-08-07 10:56:33,190 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:33,190 INFO L459 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-08-07 10:56:33,191 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-08-07 10:56:33,192 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5565, Invalid=5565, Unknown=0, NotChecked=0, Total=11130 [2018-08-07 10:56:33,192 INFO L87 Difference]: Start difference. First operand 165 states and 165 transitions. Second operand 54 states. [2018-08-07 10:56:33,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:33,391 INFO L93 Difference]: Finished difference Result 174 states and 174 transitions. [2018-08-07 10:56:33,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-08-07 10:56:33,391 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 164 [2018-08-07 10:56:33,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:33,392 INFO L225 Difference]: With dead ends: 174 [2018-08-07 10:56:33,392 INFO L226 Difference]: Without dead ends: 169 [2018-08-07 10:56:33,393 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 708 GetRequests, 604 SyntacticMatches, 0 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=5565, Invalid=5565, Unknown=0, NotChecked=0, Total=11130 [2018-08-07 10:56:33,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-08-07 10:56:33,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 168. [2018-08-07 10:56:33,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-08-07 10:56:33,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 168 transitions. [2018-08-07 10:56:33,397 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 168 transitions. Word has length 164 [2018-08-07 10:56:33,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:33,397 INFO L480 AbstractCegarLoop]: Abstraction has 168 states and 168 transitions. [2018-08-07 10:56:33,397 INFO L481 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-08-07 10:56:33,397 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 168 transitions. [2018-08-07 10:56:33,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-08-07 10:56:33,398 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:33,398 INFO L376 BasicCegarLoop]: trace histogram [53, 52, 52, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:33,398 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:33,399 INFO L82 PathProgramCache]: Analyzing trace with hash 655455311, now seen corresponding path program 52 times [2018-08-07 10:56:33,399 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:33,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:33,399 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:33,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:33,400 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:33,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:35,302 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:35,302 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:35,302 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:35,310 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:56:35,310 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:56:35,338 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:56:35,338 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:35,341 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:35,372 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:35,372 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:38,599 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:38,620 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:38,620 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:38,635 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:56:38,635 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:56:38,704 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:56:38,704 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:38,709 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:38,737 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:38,737 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:38,773 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:38,775 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:38,775 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 55, 55, 55, 55] total 108 [2018-08-07 10:56:38,775 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:38,776 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-08-07 10:56:38,776 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-08-07 10:56:38,776 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5778, Invalid=5778, Unknown=0, NotChecked=0, Total=11556 [2018-08-07 10:56:38,776 INFO L87 Difference]: Start difference. First operand 168 states and 168 transitions. Second operand 55 states. [2018-08-07 10:56:38,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:38,984 INFO L93 Difference]: Finished difference Result 177 states and 177 transitions. [2018-08-07 10:56:38,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-08-07 10:56:38,985 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 167 [2018-08-07 10:56:38,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:38,986 INFO L225 Difference]: With dead ends: 177 [2018-08-07 10:56:38,986 INFO L226 Difference]: Without dead ends: 172 [2018-08-07 10:56:38,986 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 721 GetRequests, 615 SyntacticMatches, 0 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=5778, Invalid=5778, Unknown=0, NotChecked=0, Total=11556 [2018-08-07 10:56:38,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-08-07 10:56:38,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 171. [2018-08-07 10:56:38,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-08-07 10:56:38,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 171 transitions. [2018-08-07 10:56:38,990 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 171 transitions. Word has length 167 [2018-08-07 10:56:38,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:38,990 INFO L480 AbstractCegarLoop]: Abstraction has 171 states and 171 transitions. [2018-08-07 10:56:38,990 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-08-07 10:56:38,990 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 171 transitions. [2018-08-07 10:56:38,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-08-07 10:56:38,991 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:38,991 INFO L376 BasicCegarLoop]: trace histogram [54, 53, 53, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:38,991 INFO L423 AbstractCegarLoop]: === Iteration 55 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:38,991 INFO L82 PathProgramCache]: Analyzing trace with hash 298762568, now seen corresponding path program 53 times [2018-08-07 10:56:38,991 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:38,992 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:38,992 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:38,992 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:38,992 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:39,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:40,151 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 0 proven. 4240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:40,151 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:40,151 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:40,158 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:56:40,158 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:40,205 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 54 check-sat command(s) [2018-08-07 10:56:40,205 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:40,209 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:40,236 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 0 proven. 4240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:40,236 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:43,615 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 0 proven. 4240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:43,636 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:43,636 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:43,652 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:56:43,652 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:44,094 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 54 check-sat command(s) [2018-08-07 10:56:44,094 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:44,099 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:44,127 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 0 proven. 4240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:44,127 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:44,163 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 0 proven. 4240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:44,164 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:44,165 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56, 56, 56, 56] total 110 [2018-08-07 10:56:44,165 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:44,165 INFO L459 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-08-07 10:56:44,166 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-08-07 10:56:44,166 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5995, Invalid=5995, Unknown=0, NotChecked=0, Total=11990 [2018-08-07 10:56:44,166 INFO L87 Difference]: Start difference. First operand 171 states and 171 transitions. Second operand 56 states. [2018-08-07 10:56:44,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:44,399 INFO L93 Difference]: Finished difference Result 180 states and 180 transitions. [2018-08-07 10:56:44,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-08-07 10:56:44,400 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 170 [2018-08-07 10:56:44,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:44,401 INFO L225 Difference]: With dead ends: 180 [2018-08-07 10:56:44,401 INFO L226 Difference]: Without dead ends: 175 [2018-08-07 10:56:44,402 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 734 GetRequests, 626 SyntacticMatches, 0 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=5995, Invalid=5995, Unknown=0, NotChecked=0, Total=11990 [2018-08-07 10:56:44,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-08-07 10:56:44,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 174. [2018-08-07 10:56:44,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-08-07 10:56:44,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 174 transitions. [2018-08-07 10:56:44,406 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 174 transitions. Word has length 170 [2018-08-07 10:56:44,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:44,406 INFO L480 AbstractCegarLoop]: Abstraction has 174 states and 174 transitions. [2018-08-07 10:56:44,406 INFO L481 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-08-07 10:56:44,406 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 174 transitions. [2018-08-07 10:56:44,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-08-07 10:56:44,407 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:44,407 INFO L376 BasicCegarLoop]: trace histogram [55, 54, 54, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:44,407 INFO L423 AbstractCegarLoop]: === Iteration 56 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:44,407 INFO L82 PathProgramCache]: Analyzing trace with hash -185653841, now seen corresponding path program 54 times [2018-08-07 10:56:44,407 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:44,408 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:44,408 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:44,408 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:44,408 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:44,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:45,566 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 0 proven. 4401 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:45,566 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:45,566 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:45,574 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:56:45,574 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:56:45,629 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 55 check-sat command(s) [2018-08-07 10:56:45,629 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:45,632 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:45,658 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 0 proven. 4401 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:45,658 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:49,261 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 0 proven. 4401 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:49,283 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:49,283 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:49,298 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:56:49,299 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:56:49,792 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 55 check-sat command(s) [2018-08-07 10:56:49,792 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:49,796 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:49,823 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 0 proven. 4401 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:49,823 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:49,860 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 0 proven. 4401 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:49,862 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:49,862 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 57, 57, 57, 57] total 112 [2018-08-07 10:56:49,862 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:49,862 INFO L459 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-08-07 10:56:49,863 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-08-07 10:56:49,863 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6216, Invalid=6216, Unknown=0, NotChecked=0, Total=12432 [2018-08-07 10:56:49,863 INFO L87 Difference]: Start difference. First operand 174 states and 174 transitions. Second operand 57 states. [2018-08-07 10:56:50,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:50,062 INFO L93 Difference]: Finished difference Result 183 states and 183 transitions. [2018-08-07 10:56:50,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-08-07 10:56:50,062 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 173 [2018-08-07 10:56:50,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:50,064 INFO L225 Difference]: With dead ends: 183 [2018-08-07 10:56:50,064 INFO L226 Difference]: Without dead ends: 178 [2018-08-07 10:56:50,064 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 747 GetRequests, 637 SyntacticMatches, 0 SemanticMatches, 110 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=6216, Invalid=6216, Unknown=0, NotChecked=0, Total=12432 [2018-08-07 10:56:50,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-08-07 10:56:50,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 177. [2018-08-07 10:56:50,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-08-07 10:56:50,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 177 transitions. [2018-08-07 10:56:50,067 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 177 transitions. Word has length 173 [2018-08-07 10:56:50,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:50,068 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 177 transitions. [2018-08-07 10:56:50,068 INFO L481 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-08-07 10:56:50,068 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 177 transitions. [2018-08-07 10:56:50,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-08-07 10:56:50,068 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:50,069 INFO L376 BasicCegarLoop]: trace histogram [56, 55, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:50,069 INFO L423 AbstractCegarLoop]: === Iteration 57 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:50,069 INFO L82 PathProgramCache]: Analyzing trace with hash -344779800, now seen corresponding path program 55 times [2018-08-07 10:56:50,069 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:50,069 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:50,070 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:50,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:50,070 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:50,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:51,413 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:51,414 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:51,414 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:51,421 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:51,421 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:56:51,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:51,458 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:51,489 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:51,489 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:55,116 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:55,137 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:55,137 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:55,151 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:55,151 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:56:55,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:55,217 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:55,246 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:55,246 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:55,283 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:55,284 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:55,285 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58, 58, 58, 58] total 114 [2018-08-07 10:56:55,285 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:55,285 INFO L459 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-08-07 10:56:55,286 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-08-07 10:56:55,286 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6441, Invalid=6441, Unknown=0, NotChecked=0, Total=12882 [2018-08-07 10:56:55,286 INFO L87 Difference]: Start difference. First operand 177 states and 177 transitions. Second operand 58 states. [2018-08-07 10:56:55,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:55,504 INFO L93 Difference]: Finished difference Result 186 states and 186 transitions. [2018-08-07 10:56:55,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-08-07 10:56:55,504 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 176 [2018-08-07 10:56:55,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:55,505 INFO L225 Difference]: With dead ends: 186 [2018-08-07 10:56:55,505 INFO L226 Difference]: Without dead ends: 181 [2018-08-07 10:56:55,506 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 760 GetRequests, 648 SyntacticMatches, 0 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=6441, Invalid=6441, Unknown=0, NotChecked=0, Total=12882 [2018-08-07 10:56:55,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-08-07 10:56:55,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 180. [2018-08-07 10:56:55,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-08-07 10:56:55,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 180 transitions. [2018-08-07 10:56:55,510 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 180 transitions. Word has length 176 [2018-08-07 10:56:55,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:55,510 INFO L480 AbstractCegarLoop]: Abstraction has 180 states and 180 transitions. [2018-08-07 10:56:55,510 INFO L481 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-08-07 10:56:55,510 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 180 transitions. [2018-08-07 10:56:55,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2018-08-07 10:56:55,511 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:55,511 INFO L376 BasicCegarLoop]: trace histogram [57, 56, 56, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:55,512 INFO L423 AbstractCegarLoop]: === Iteration 58 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:55,512 INFO L82 PathProgramCache]: Analyzing trace with hash 777670415, now seen corresponding path program 56 times [2018-08-07 10:56:55,512 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:55,512 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:55,513 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:55,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:55,513 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:55,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:57,077 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 0 proven. 4732 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:57,077 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:57,078 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:57,084 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:56:57,084 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:57,115 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:56:57,116 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:57,118 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:57,147 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 0 proven. 4732 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:57,147 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:00,555 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 0 proven. 4732 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:00,574 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:00,575 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:00,589 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:57:00,589 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:00,655 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:57:00,655 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:00,659 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:00,696 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 0 proven. 4732 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:00,697 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:00,789 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 0 proven. 4732 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:00,791 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:00,792 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59, 59, 59, 59] total 116 [2018-08-07 10:57:00,792 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:00,792 INFO L459 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-08-07 10:57:00,793 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-08-07 10:57:00,793 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6670, Invalid=6670, Unknown=0, NotChecked=0, Total=13340 [2018-08-07 10:57:00,793 INFO L87 Difference]: Start difference. First operand 180 states and 180 transitions. Second operand 59 states. [2018-08-07 10:57:01,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:01,009 INFO L93 Difference]: Finished difference Result 189 states and 189 transitions. [2018-08-07 10:57:01,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-08-07 10:57:01,009 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 179 [2018-08-07 10:57:01,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:01,011 INFO L225 Difference]: With dead ends: 189 [2018-08-07 10:57:01,011 INFO L226 Difference]: Without dead ends: 184 [2018-08-07 10:57:01,012 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 773 GetRequests, 659 SyntacticMatches, 0 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=6670, Invalid=6670, Unknown=0, NotChecked=0, Total=13340 [2018-08-07 10:57:01,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-08-07 10:57:01,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 183. [2018-08-07 10:57:01,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-08-07 10:57:01,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 183 transitions. [2018-08-07 10:57:01,017 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 183 transitions. Word has length 179 [2018-08-07 10:57:01,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:01,017 INFO L480 AbstractCegarLoop]: Abstraction has 183 states and 183 transitions. [2018-08-07 10:57:01,017 INFO L481 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-08-07 10:57:01,017 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 183 transitions. [2018-08-07 10:57:01,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2018-08-07 10:57:01,018 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:01,018 INFO L376 BasicCegarLoop]: trace histogram [58, 57, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:01,018 INFO L423 AbstractCegarLoop]: === Iteration 59 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:01,019 INFO L82 PathProgramCache]: Analyzing trace with hash -923341176, now seen corresponding path program 57 times [2018-08-07 10:57:01,019 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:01,019 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:01,019 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:01,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:01,020 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:01,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:02,635 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 0 proven. 4902 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:02,635 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:02,635 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:02,642 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:57:02,642 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:57:02,697 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 58 check-sat command(s) [2018-08-07 10:57:02,698 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:02,700 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:02,729 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 0 proven. 4902 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:02,729 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:06,257 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 0 proven. 4902 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:06,278 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:06,278 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:06,294 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:57:06,294 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:57:06,852 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 58 check-sat command(s) [2018-08-07 10:57:06,853 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:06,858 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:06,888 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 0 proven. 4902 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:06,888 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:06,928 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 0 proven. 4902 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:06,930 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:06,930 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 60, 60, 60, 60] total 118 [2018-08-07 10:57:06,930 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:06,930 INFO L459 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-08-07 10:57:06,931 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-08-07 10:57:06,931 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6903, Invalid=6903, Unknown=0, NotChecked=0, Total=13806 [2018-08-07 10:57:06,931 INFO L87 Difference]: Start difference. First operand 183 states and 183 transitions. Second operand 60 states. [2018-08-07 10:57:07,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:07,214 INFO L93 Difference]: Finished difference Result 192 states and 192 transitions. [2018-08-07 10:57:07,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-08-07 10:57:07,214 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 182 [2018-08-07 10:57:07,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:07,216 INFO L225 Difference]: With dead ends: 192 [2018-08-07 10:57:07,216 INFO L226 Difference]: Without dead ends: 187 [2018-08-07 10:57:07,217 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 786 GetRequests, 670 SyntacticMatches, 0 SemanticMatches, 116 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=6903, Invalid=6903, Unknown=0, NotChecked=0, Total=13806 [2018-08-07 10:57:07,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-08-07 10:57:07,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 186. [2018-08-07 10:57:07,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-08-07 10:57:07,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 186 transitions. [2018-08-07 10:57:07,221 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 186 transitions. Word has length 182 [2018-08-07 10:57:07,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:07,221 INFO L480 AbstractCegarLoop]: Abstraction has 186 states and 186 transitions. [2018-08-07 10:57:07,221 INFO L481 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-08-07 10:57:07,221 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 186 transitions. [2018-08-07 10:57:07,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-08-07 10:57:07,222 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:07,223 INFO L376 BasicCegarLoop]: trace histogram [59, 58, 58, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:07,223 INFO L423 AbstractCegarLoop]: === Iteration 60 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:07,223 INFO L82 PathProgramCache]: Analyzing trace with hash 559476847, now seen corresponding path program 58 times [2018-08-07 10:57:07,223 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:07,224 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:07,224 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:07,224 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:07,224 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:07,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:08,629 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:08,630 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:08,630 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:08,637 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:57:08,638 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:57:08,664 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:57:08,664 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:08,666 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:08,696 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:08,697 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:12,739 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:12,760 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:12,760 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:12,775 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:57:12,775 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:57:12,848 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:57:12,848 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:12,854 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:12,884 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:12,884 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:12,932 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:12,933 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:12,934 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61, 61, 61, 61] total 120 [2018-08-07 10:57:12,934 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:12,934 INFO L459 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-08-07 10:57:12,934 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-08-07 10:57:12,935 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7140, Invalid=7140, Unknown=0, NotChecked=0, Total=14280 [2018-08-07 10:57:12,935 INFO L87 Difference]: Start difference. First operand 186 states and 186 transitions. Second operand 61 states. [2018-08-07 10:57:13,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:13,211 INFO L93 Difference]: Finished difference Result 195 states and 195 transitions. [2018-08-07 10:57:13,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-08-07 10:57:13,212 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 185 [2018-08-07 10:57:13,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:13,213 INFO L225 Difference]: With dead ends: 195 [2018-08-07 10:57:13,213 INFO L226 Difference]: Without dead ends: 190 [2018-08-07 10:57:13,214 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 799 GetRequests, 681 SyntacticMatches, 0 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=7140, Invalid=7140, Unknown=0, NotChecked=0, Total=14280 [2018-08-07 10:57:13,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-08-07 10:57:13,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 189. [2018-08-07 10:57:13,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-08-07 10:57:13,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 189 transitions. [2018-08-07 10:57:13,219 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 189 transitions. Word has length 185 [2018-08-07 10:57:13,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:13,219 INFO L480 AbstractCegarLoop]: Abstraction has 189 states and 189 transitions. [2018-08-07 10:57:13,219 INFO L481 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-08-07 10:57:13,219 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 189 transitions. [2018-08-07 10:57:13,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 189 [2018-08-07 10:57:13,220 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:13,221 INFO L376 BasicCegarLoop]: trace histogram [60, 59, 59, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:13,221 INFO L423 AbstractCegarLoop]: === Iteration 61 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:13,221 INFO L82 PathProgramCache]: Analyzing trace with hash 1452560680, now seen corresponding path program 59 times [2018-08-07 10:57:13,221 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:13,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:13,222 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:13,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:13,222 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:13,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:14,569 INFO L134 CoverageAnalysis]: Checked inductivity of 5251 backedges. 0 proven. 5251 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:14,569 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:14,570 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:14,579 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:57:14,580 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:14,634 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 60 check-sat command(s) [2018-08-07 10:57:14,634 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:14,637 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:14,668 INFO L134 CoverageAnalysis]: Checked inductivity of 5251 backedges. 0 proven. 5251 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:14,668 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:18,778 INFO L134 CoverageAnalysis]: Checked inductivity of 5251 backedges. 0 proven. 5251 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:18,798 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:18,799 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:18,814 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:57:18,815 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:19,315 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 60 check-sat command(s) [2018-08-07 10:57:19,316 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:19,321 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:19,360 INFO L134 CoverageAnalysis]: Checked inductivity of 5251 backedges. 0 proven. 5251 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:19,360 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:19,400 INFO L134 CoverageAnalysis]: Checked inductivity of 5251 backedges. 0 proven. 5251 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:19,402 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:19,402 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62, 62, 62, 62] total 122 [2018-08-07 10:57:19,402 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:19,403 INFO L459 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-08-07 10:57:19,403 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-08-07 10:57:19,403 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7381, Invalid=7381, Unknown=0, NotChecked=0, Total=14762 [2018-08-07 10:57:19,403 INFO L87 Difference]: Start difference. First operand 189 states and 189 transitions. Second operand 62 states. [2018-08-07 10:57:19,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:19,651 INFO L93 Difference]: Finished difference Result 198 states and 198 transitions. [2018-08-07 10:57:19,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-08-07 10:57:19,651 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 188 [2018-08-07 10:57:19,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:19,652 INFO L225 Difference]: With dead ends: 198 [2018-08-07 10:57:19,653 INFO L226 Difference]: Without dead ends: 193 [2018-08-07 10:57:19,653 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 812 GetRequests, 692 SyntacticMatches, 0 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=7381, Invalid=7381, Unknown=0, NotChecked=0, Total=14762 [2018-08-07 10:57:19,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-08-07 10:57:19,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 192. [2018-08-07 10:57:19,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-08-07 10:57:19,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 192 transitions. [2018-08-07 10:57:19,657 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 192 transitions. Word has length 188 [2018-08-07 10:57:19,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:19,657 INFO L480 AbstractCegarLoop]: Abstraction has 192 states and 192 transitions. [2018-08-07 10:57:19,657 INFO L481 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-08-07 10:57:19,657 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 192 transitions. [2018-08-07 10:57:19,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-08-07 10:57:19,658 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:19,658 INFO L376 BasicCegarLoop]: trace histogram [61, 60, 60, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:19,658 INFO L423 AbstractCegarLoop]: === Iteration 62 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:19,658 INFO L82 PathProgramCache]: Analyzing trace with hash -9369137, now seen corresponding path program 60 times [2018-08-07 10:57:19,659 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:19,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:19,659 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:19,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:19,660 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:19,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:21,051 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 0 proven. 5430 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:21,051 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:21,051 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:21,059 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:57:21,060 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:57:21,116 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 61 check-sat command(s) [2018-08-07 10:57:21,116 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:21,119 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:21,151 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 0 proven. 5430 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:21,151 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:25,356 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 0 proven. 5430 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:25,376 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:25,376 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:25,391 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:57:25,391 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:57:25,979 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 61 check-sat command(s) [2018-08-07 10:57:25,979 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:25,984 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:26,015 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 0 proven. 5430 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:26,015 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:26,056 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 0 proven. 5430 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:26,058 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:26,058 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [63, 63, 63, 63, 63] total 124 [2018-08-07 10:57:26,058 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:26,058 INFO L459 AbstractCegarLoop]: Interpolant automaton has 63 states [2018-08-07 10:57:26,059 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2018-08-07 10:57:26,059 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7626, Invalid=7626, Unknown=0, NotChecked=0, Total=15252 [2018-08-07 10:57:26,059 INFO L87 Difference]: Start difference. First operand 192 states and 192 transitions. Second operand 63 states. [2018-08-07 10:57:26,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:26,348 INFO L93 Difference]: Finished difference Result 201 states and 201 transitions. [2018-08-07 10:57:26,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-08-07 10:57:26,348 INFO L78 Accepts]: Start accepts. Automaton has 63 states. Word has length 191 [2018-08-07 10:57:26,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:26,350 INFO L225 Difference]: With dead ends: 201 [2018-08-07 10:57:26,350 INFO L226 Difference]: Without dead ends: 196 [2018-08-07 10:57:26,350 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 825 GetRequests, 703 SyntacticMatches, 0 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=7626, Invalid=7626, Unknown=0, NotChecked=0, Total=15252 [2018-08-07 10:57:26,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-08-07 10:57:26,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 195. [2018-08-07 10:57:26,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-08-07 10:57:26,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 195 transitions. [2018-08-07 10:57:26,353 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 195 transitions. Word has length 191 [2018-08-07 10:57:26,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:26,354 INFO L480 AbstractCegarLoop]: Abstraction has 195 states and 195 transitions. [2018-08-07 10:57:26,354 INFO L481 AbstractCegarLoop]: Interpolant automaton has 63 states. [2018-08-07 10:57:26,354 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 195 transitions. [2018-08-07 10:57:26,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2018-08-07 10:57:26,355 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:26,355 INFO L376 BasicCegarLoop]: trace histogram [62, 61, 61, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:26,355 INFO L423 AbstractCegarLoop]: === Iteration 63 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:26,355 INFO L82 PathProgramCache]: Analyzing trace with hash -1392165944, now seen corresponding path program 61 times [2018-08-07 10:57:26,355 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:26,356 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:26,356 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:26,356 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:26,356 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:26,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:28,547 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:28,548 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:28,548 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:28,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:57:28,555 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:57:28,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:28,590 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:28,622 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:28,622 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:33,077 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:33,097 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:33,097 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:33,113 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:57:33,113 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:57:33,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:33,186 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:33,219 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:33,219 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:33,261 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:33,262 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:33,262 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 64, 64, 64, 64] total 126 [2018-08-07 10:57:33,262 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:33,263 INFO L459 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-08-07 10:57:33,263 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-08-07 10:57:33,264 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7875, Invalid=7875, Unknown=0, NotChecked=0, Total=15750 [2018-08-07 10:57:33,264 INFO L87 Difference]: Start difference. First operand 195 states and 195 transitions. Second operand 64 states. [2018-08-07 10:57:33,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:33,553 INFO L93 Difference]: Finished difference Result 204 states and 204 transitions. [2018-08-07 10:57:33,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-08-07 10:57:33,554 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 194 [2018-08-07 10:57:33,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:33,555 INFO L225 Difference]: With dead ends: 204 [2018-08-07 10:57:33,555 INFO L226 Difference]: Without dead ends: 199 [2018-08-07 10:57:33,555 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 838 GetRequests, 714 SyntacticMatches, 0 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=7875, Invalid=7875, Unknown=0, NotChecked=0, Total=15750 [2018-08-07 10:57:33,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-08-07 10:57:33,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 198. [2018-08-07 10:57:33,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-08-07 10:57:33,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 198 transitions. [2018-08-07 10:57:33,560 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 198 transitions. Word has length 194 [2018-08-07 10:57:33,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:33,560 INFO L480 AbstractCegarLoop]: Abstraction has 198 states and 198 transitions. [2018-08-07 10:57:33,560 INFO L481 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-08-07 10:57:33,560 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 198 transitions. [2018-08-07 10:57:33,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-08-07 10:57:33,562 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:33,562 INFO L376 BasicCegarLoop]: trace histogram [63, 62, 62, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:33,562 INFO L423 AbstractCegarLoop]: === Iteration 64 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:33,562 INFO L82 PathProgramCache]: Analyzing trace with hash 1034459951, now seen corresponding path program 62 times [2018-08-07 10:57:33,562 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:33,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:33,563 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:57:33,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:33,563 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:33,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:35,043 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 0 proven. 5797 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:35,044 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:35,044 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:35,051 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:57:35,051 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:35,083 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:57:35,083 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:35,086 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:35,119 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 0 proven. 5797 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:35,119 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:39,602 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 0 proven. 5797 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:39,622 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:39,622 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:39,639 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:57:39,639 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:39,710 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:57:39,711 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:39,715 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:39,749 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 0 proven. 5797 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:39,749 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:39,809 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 0 proven. 5797 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:39,811 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:39,811 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65, 65, 65, 65] total 128 [2018-08-07 10:57:39,811 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:39,811 INFO L459 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-08-07 10:57:39,812 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-08-07 10:57:39,812 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8128, Invalid=8128, Unknown=0, NotChecked=0, Total=16256 [2018-08-07 10:57:39,813 INFO L87 Difference]: Start difference. First operand 198 states and 198 transitions. Second operand 65 states. [2018-08-07 10:57:40,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:40,134 INFO L93 Difference]: Finished difference Result 207 states and 207 transitions. [2018-08-07 10:57:40,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-08-07 10:57:40,134 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 197 [2018-08-07 10:57:40,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:40,135 INFO L225 Difference]: With dead ends: 207 [2018-08-07 10:57:40,136 INFO L226 Difference]: Without dead ends: 202 [2018-08-07 10:57:40,136 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 851 GetRequests, 725 SyntacticMatches, 0 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=8128, Invalid=8128, Unknown=0, NotChecked=0, Total=16256 [2018-08-07 10:57:40,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-08-07 10:57:40,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 201. [2018-08-07 10:57:40,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-08-07 10:57:40,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 201 transitions. [2018-08-07 10:57:40,140 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 201 transitions. Word has length 197 [2018-08-07 10:57:40,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:40,140 INFO L480 AbstractCegarLoop]: Abstraction has 201 states and 201 transitions. [2018-08-07 10:57:40,140 INFO L481 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-08-07 10:57:40,141 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 201 transitions. [2018-08-07 10:57:40,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-08-07 10:57:40,142 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:40,142 INFO L376 BasicCegarLoop]: trace histogram [64, 63, 63, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:40,142 INFO L423 AbstractCegarLoop]: === Iteration 65 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:40,142 INFO L82 PathProgramCache]: Analyzing trace with hash -243028376, now seen corresponding path program 63 times [2018-08-07 10:57:40,142 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:40,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:40,143 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:40,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:40,143 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:40,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:44,272 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 0 proven. 5985 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:44,272 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:44,272 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:44,282 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:57:44,282 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:57:44,490 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 64 check-sat command(s) [2018-08-07 10:57:44,491 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:44,493 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:44,525 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 0 proven. 5985 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:44,526 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:49,170 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 0 proven. 5985 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:49,190 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:49,190 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:49,205 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:57:49,205 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:57:49,834 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 64 check-sat command(s) [2018-08-07 10:57:49,834 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:49,838 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:49,867 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 0 proven. 5985 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:49,867 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:49,910 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 0 proven. 5985 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:49,912 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:49,912 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 66, 66, 66, 66] total 130 [2018-08-07 10:57:49,912 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:49,913 INFO L459 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-08-07 10:57:49,913 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-08-07 10:57:49,914 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8385, Invalid=8385, Unknown=0, NotChecked=0, Total=16770 [2018-08-07 10:57:49,914 INFO L87 Difference]: Start difference. First operand 201 states and 201 transitions. Second operand 66 states. [2018-08-07 10:57:50,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:50,220 INFO L93 Difference]: Finished difference Result 210 states and 210 transitions. [2018-08-07 10:57:50,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-08-07 10:57:50,221 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 200 [2018-08-07 10:57:50,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:50,222 INFO L225 Difference]: With dead ends: 210 [2018-08-07 10:57:50,222 INFO L226 Difference]: Without dead ends: 205 [2018-08-07 10:57:50,222 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 864 GetRequests, 736 SyntacticMatches, 0 SemanticMatches, 128 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 8.6s TimeCoverageRelationStatistics Valid=8385, Invalid=8385, Unknown=0, NotChecked=0, Total=16770 [2018-08-07 10:57:50,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-08-07 10:57:50,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 204. [2018-08-07 10:57:50,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-08-07 10:57:50,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 204 transitions. [2018-08-07 10:57:50,225 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 204 transitions. Word has length 200 [2018-08-07 10:57:50,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:50,226 INFO L480 AbstractCegarLoop]: Abstraction has 204 states and 204 transitions. [2018-08-07 10:57:50,226 INFO L481 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-08-07 10:57:50,226 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 204 transitions. [2018-08-07 10:57:50,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-08-07 10:57:50,227 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:50,227 INFO L376 BasicCegarLoop]: trace histogram [65, 64, 64, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:50,227 INFO L423 AbstractCegarLoop]: === Iteration 66 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:50,227 INFO L82 PathProgramCache]: Analyzing trace with hash -192568177, now seen corresponding path program 64 times [2018-08-07 10:57:50,228 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:50,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:50,228 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:50,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:50,229 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:50,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:51,956 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:51,957 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:51,957 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:51,968 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:57:51,968 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:57:52,003 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:57:52,003 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:52,006 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:52,041 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:52,042 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:56,811 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:56,833 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:56,833 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 129 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 129 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:56,850 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:57:56,850 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:57:56,932 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:57:56,933 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:56,938 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:56,969 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:56,970 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:57,029 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:57,030 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:57,030 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 67, 67, 67, 67] total 132 [2018-08-07 10:57:57,031 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:57,031 INFO L459 AbstractCegarLoop]: Interpolant automaton has 67 states [2018-08-07 10:57:57,032 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2018-08-07 10:57:57,032 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8646, Invalid=8646, Unknown=0, NotChecked=0, Total=17292 [2018-08-07 10:57:57,032 INFO L87 Difference]: Start difference. First operand 204 states and 204 transitions. Second operand 67 states. [2018-08-07 10:57:57,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:57,333 INFO L93 Difference]: Finished difference Result 213 states and 213 transitions. [2018-08-07 10:57:57,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-08-07 10:57:57,333 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 203 [2018-08-07 10:57:57,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:57,334 INFO L225 Difference]: With dead ends: 213 [2018-08-07 10:57:57,334 INFO L226 Difference]: Without dead ends: 208 [2018-08-07 10:57:57,335 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 877 GetRequests, 747 SyntacticMatches, 0 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=8646, Invalid=8646, Unknown=0, NotChecked=0, Total=17292 [2018-08-07 10:57:57,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-08-07 10:57:57,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 207. [2018-08-07 10:57:57,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-08-07 10:57:57,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 207 transitions. [2018-08-07 10:57:57,338 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 207 transitions. Word has length 203 [2018-08-07 10:57:57,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:57,338 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 207 transitions. [2018-08-07 10:57:57,338 INFO L481 AbstractCegarLoop]: Interpolant automaton has 67 states. [2018-08-07 10:57:57,338 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 207 transitions. [2018-08-07 10:57:57,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2018-08-07 10:57:57,339 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:57,339 INFO L376 BasicCegarLoop]: trace histogram [66, 65, 65, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:57,339 INFO L423 AbstractCegarLoop]: === Iteration 67 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:57,340 INFO L82 PathProgramCache]: Analyzing trace with hash -171333368, now seen corresponding path program 65 times [2018-08-07 10:57:57,340 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:57,340 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:57,340 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:57,340 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:57,341 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:57,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:59,251 INFO L134 CoverageAnalysis]: Checked inductivity of 6370 backedges. 0 proven. 6370 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:59,252 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:59,252 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 130 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 130 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:59,260 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:57:59,260 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:59,335 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 66 check-sat command(s) [2018-08-07 10:57:59,336 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:59,338 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:59,375 INFO L134 CoverageAnalysis]: Checked inductivity of 6370 backedges. 0 proven. 6370 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:59,375 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:04,353 INFO L134 CoverageAnalysis]: Checked inductivity of 6370 backedges. 0 proven. 6370 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:04,373 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:04,373 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 131 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 131 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:58:04,388 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:58:04,388 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:58:05,012 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 66 check-sat command(s) [2018-08-07 10:58:05,013 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:05,019 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:05,054 INFO L134 CoverageAnalysis]: Checked inductivity of 6370 backedges. 0 proven. 6370 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:05,055 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:05,098 INFO L134 CoverageAnalysis]: Checked inductivity of 6370 backedges. 0 proven. 6370 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:05,100 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:58:05,100 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 68, 68, 68, 68] total 134 [2018-08-07 10:58:05,100 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:58:05,100 INFO L459 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-08-07 10:58:05,101 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-08-07 10:58:05,102 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8911, Invalid=8911, Unknown=0, NotChecked=0, Total=17822 [2018-08-07 10:58:05,102 INFO L87 Difference]: Start difference. First operand 207 states and 207 transitions. Second operand 68 states. [2018-08-07 10:58:05,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:58:05,330 INFO L93 Difference]: Finished difference Result 216 states and 216 transitions. [2018-08-07 10:58:05,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-08-07 10:58:05,331 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 206 [2018-08-07 10:58:05,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:58:05,332 INFO L225 Difference]: With dead ends: 216 [2018-08-07 10:58:05,332 INFO L226 Difference]: Without dead ends: 211 [2018-08-07 10:58:05,333 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 890 GetRequests, 758 SyntacticMatches, 0 SemanticMatches, 132 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=8911, Invalid=8911, Unknown=0, NotChecked=0, Total=17822 [2018-08-07 10:58:05,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-08-07 10:58:05,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 210. [2018-08-07 10:58:05,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-08-07 10:58:05,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 210 transitions. [2018-08-07 10:58:05,337 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 210 transitions. Word has length 206 [2018-08-07 10:58:05,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:58:05,337 INFO L480 AbstractCegarLoop]: Abstraction has 210 states and 210 transitions. [2018-08-07 10:58:05,337 INFO L481 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-08-07 10:58:05,337 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 210 transitions. [2018-08-07 10:58:05,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2018-08-07 10:58:05,338 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:58:05,338 INFO L376 BasicCegarLoop]: trace histogram [67, 66, 66, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:58:05,338 INFO L423 AbstractCegarLoop]: === Iteration 68 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:58:05,338 INFO L82 PathProgramCache]: Analyzing trace with hash 1074669039, now seen corresponding path program 66 times [2018-08-07 10:58:05,339 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:58:05,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:05,339 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:58:05,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:05,339 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:58:05,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:06,963 INFO L134 CoverageAnalysis]: Checked inductivity of 6567 backedges. 0 proven. 6567 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:06,964 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:06,964 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 132 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 132 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:58:06,971 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:58:06,971 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:58:07,043 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 67 check-sat command(s) [2018-08-07 10:58:07,043 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:07,046 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:07,083 INFO L134 CoverageAnalysis]: Checked inductivity of 6567 backedges. 0 proven. 6567 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:07,084 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:11,979 INFO L134 CoverageAnalysis]: Checked inductivity of 6567 backedges. 0 proven. 6567 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:11,999 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:12,000 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 133 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 133 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:58:12,014 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:58:12,014 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:58:12,694 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 67 check-sat command(s) [2018-08-07 10:58:12,694 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:12,699 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:12,735 INFO L134 CoverageAnalysis]: Checked inductivity of 6567 backedges. 0 proven. 6567 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:12,736 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:12,782 INFO L134 CoverageAnalysis]: Checked inductivity of 6567 backedges. 0 proven. 6567 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:12,783 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:58:12,783 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [69, 69, 69, 69, 69] total 136 [2018-08-07 10:58:12,784 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:58:12,784 INFO L459 AbstractCegarLoop]: Interpolant automaton has 69 states [2018-08-07 10:58:12,784 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2018-08-07 10:58:12,785 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9180, Invalid=9180, Unknown=0, NotChecked=0, Total=18360 [2018-08-07 10:58:12,785 INFO L87 Difference]: Start difference. First operand 210 states and 210 transitions. Second operand 69 states. [2018-08-07 10:58:13,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:58:13,104 INFO L93 Difference]: Finished difference Result 219 states and 219 transitions. [2018-08-07 10:58:13,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2018-08-07 10:58:13,105 INFO L78 Accepts]: Start accepts. Automaton has 69 states. Word has length 209 [2018-08-07 10:58:13,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:58:13,106 INFO L225 Difference]: With dead ends: 219 [2018-08-07 10:58:13,106 INFO L226 Difference]: Without dead ends: 214 [2018-08-07 10:58:13,107 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 903 GetRequests, 769 SyntacticMatches, 0 SemanticMatches, 134 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=9180, Invalid=9180, Unknown=0, NotChecked=0, Total=18360 [2018-08-07 10:58:13,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-08-07 10:58:13,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 213. [2018-08-07 10:58:13,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-08-07 10:58:13,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 213 transitions. [2018-08-07 10:58:13,110 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 213 transitions. Word has length 209 [2018-08-07 10:58:13,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:58:13,111 INFO L480 AbstractCegarLoop]: Abstraction has 213 states and 213 transitions. [2018-08-07 10:58:13,111 INFO L481 AbstractCegarLoop]: Interpolant automaton has 69 states. [2018-08-07 10:58:13,111 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 213 transitions. [2018-08-07 10:58:13,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2018-08-07 10:58:13,112 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:58:13,112 INFO L376 BasicCegarLoop]: trace histogram [68, 67, 67, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:58:13,112 INFO L423 AbstractCegarLoop]: === Iteration 69 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:58:13,113 INFO L82 PathProgramCache]: Analyzing trace with hash -669963352, now seen corresponding path program 67 times [2018-08-07 10:58:13,113 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:58:13,113 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:13,113 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:58:13,113 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:13,114 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:58:13,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:15,247 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:15,247 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:15,247 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 134 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 134 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:58:15,256 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:58:15,256 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:58:15,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:15,291 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:15,329 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:15,330 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:20,576 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:20,597 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:20,597 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 135 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 135 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:58:20,611 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:58:20,612 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:58:20,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:20,689 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:20,727 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:20,727 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:20,777 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:20,778 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:58:20,778 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [70, 70, 70, 70, 70] total 138 [2018-08-07 10:58:20,779 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:58:20,779 INFO L459 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-08-07 10:58:20,779 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-08-07 10:58:20,780 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9453, Invalid=9453, Unknown=0, NotChecked=0, Total=18906 [2018-08-07 10:58:20,780 INFO L87 Difference]: Start difference. First operand 213 states and 213 transitions. Second operand 70 states. [2018-08-07 10:58:21,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:58:21,036 INFO L93 Difference]: Finished difference Result 222 states and 222 transitions. [2018-08-07 10:58:21,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-08-07 10:58:21,037 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 212 [2018-08-07 10:58:21,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:58:21,039 INFO L225 Difference]: With dead ends: 222 [2018-08-07 10:58:21,039 INFO L226 Difference]: Without dead ends: 217 [2018-08-07 10:58:21,040 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 916 GetRequests, 780 SyntacticMatches, 0 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.2s TimeCoverageRelationStatistics Valid=9453, Invalid=9453, Unknown=0, NotChecked=0, Total=18906 [2018-08-07 10:58:21,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-08-07 10:58:21,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 216. [2018-08-07 10:58:21,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2018-08-07 10:58:21,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 216 transitions. [2018-08-07 10:58:21,045 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 216 transitions. Word has length 212 [2018-08-07 10:58:21,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:58:21,045 INFO L480 AbstractCegarLoop]: Abstraction has 216 states and 216 transitions. [2018-08-07 10:58:21,045 INFO L481 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-08-07 10:58:21,046 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 216 transitions. [2018-08-07 10:58:21,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2018-08-07 10:58:21,047 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:58:21,047 INFO L376 BasicCegarLoop]: trace histogram [69, 68, 68, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:58:21,047 INFO L423 AbstractCegarLoop]: === Iteration 70 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:58:21,047 INFO L82 PathProgramCache]: Analyzing trace with hash -1614274737, now seen corresponding path program 68 times [2018-08-07 10:58:21,047 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:58:21,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:21,048 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:58:21,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:21,048 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:58:21,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat Received shutdown request... [2018-08-07 10:58:21,817 WARN L549 AbstractCegarLoop]: Verification canceled [2018-08-07 10:58:21,821 WARN L202 ceAbstractionStarter]: Timeout [2018-08-07 10:58:21,821 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.08 10:58:21 BoogieIcfgContainer [2018-08-07 10:58:21,821 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-08-07 10:58:21,822 INFO L168 Benchmark]: Toolchain (without parser) took 232642.54 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 660.1 MB). Free memory was 1.4 GB in the beginning and 1.6 GB in the end (delta: -225.5 MB). Peak memory consumption was 434.6 MB. Max. memory is 7.1 GB. [2018-08-07 10:58:21,823 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-08-07 10:58:21,823 INFO L168 Benchmark]: CACSL2BoogieTranslator took 287.81 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-08-07 10:58:21,823 INFO L168 Benchmark]: Boogie Procedure Inliner took 20.24 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-08-07 10:58:21,824 INFO L168 Benchmark]: Boogie Preprocessor took 17.07 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-08-07 10:58:21,824 INFO L168 Benchmark]: RCFGBuilder took 283.98 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 751.3 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -802.3 MB). Peak memory consumption was 26.8 MB. Max. memory is 7.1 GB. [2018-08-07 10:58:21,824 INFO L168 Benchmark]: TraceAbstraction took 232028.74 ms. Allocated memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: -91.2 MB). Free memory was 2.2 GB in the beginning and 1.6 GB in the end (delta: 566.3 MB). Peak memory consumption was 475.1 MB. Max. memory is 7.1 GB. [2018-08-07 10:58:21,826 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 287.81 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 20.24 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 17.07 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 283.98 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 751.3 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -802.3 MB). Peak memory consumption was 26.8 MB. Max. memory is 7.1 GB. * TraceAbstraction took 232028.74 ms. Allocated memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: -91.2 MB). Free memory was 2.2 GB in the beginning and 1.6 GB in the end (delta: 566.3 MB). Peak memory consumption was 475.1 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was analyzing trace of length 216 with TraceHistMax 69, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 39 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 20 locations, 1 error locations. TIMEOUT Result, 231.9s OverallTime, 70 OverallIterations, 69 TraceHistogramMax, 12.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 768 SDtfs, 2346 SDslu, 12146 SDs, 0 SdLazy, 6053 SolverSat, 125 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 32634 GetRequests, 27943 SyntacticMatches, 0 SemanticMatches, 4691 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 191.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=216occurred in iteration=69, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 69 MinimizatonAttempts, 68 StatesRemovedByMinimization, 68 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 13.0s SatisfiabilityAnalysisTime, 200.1s InterpolantComputationTime, 22734 NumberOfCodeBlocks, 22734 NumberOfCodeBlocksAsserted, 2535 NumberOfCheckSat, 37539 ConstructedInterpolants, 0 QuantifiedInterpolants, 15389451 SizeOfPredicates, 134 NumberOfNonLiveVariables, 21306 ConjunctsInSsa, 4824 ConjunctsInUnsatCore, 337 InterpolantComputations, 2 PerfectInterpolantSequences, 0/774520 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/count_by_2_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-08-07_10-58-21-835.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/count_by_2_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-08-07_10-58-21-835.csv Completed graceful shutdown