java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-new/count_by_nondet_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-ddc4263 [2018-08-07 10:54:42,551 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-08-07 10:54:42,553 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-08-07 10:54:42,570 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-08-07 10:54:42,570 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-08-07 10:54:42,571 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-08-07 10:54:42,572 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-08-07 10:54:42,574 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-08-07 10:54:42,576 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-08-07 10:54:42,576 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-08-07 10:54:42,577 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-08-07 10:54:42,578 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-08-07 10:54:42,578 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-08-07 10:54:42,579 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-08-07 10:54:42,580 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-08-07 10:54:42,581 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-08-07 10:54:42,582 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-08-07 10:54:42,587 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-08-07 10:54:42,589 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-08-07 10:54:42,593 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-08-07 10:54:42,595 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-08-07 10:54:42,598 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-08-07 10:54:42,603 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-08-07 10:54:42,603 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-08-07 10:54:42,603 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-08-07 10:54:42,607 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-08-07 10:54:42,607 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-08-07 10:54:42,608 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-08-07 10:54:42,612 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-08-07 10:54:42,616 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-08-07 10:54:42,617 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-08-07 10:54:42,617 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-08-07 10:54:42,620 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-08-07 10:54:42,645 INFO L110 SettingsManager]: Loading preferences was successful [2018-08-07 10:54:42,645 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-08-07 10:54:42,646 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-08-07 10:54:42,646 INFO L133 SettingsManager]: * User list type=DISABLED [2018-08-07 10:54:42,647 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-08-07 10:54:42,647 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-08-07 10:54:42,647 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-08-07 10:54:42,647 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-08-07 10:54:42,648 INFO L133 SettingsManager]: * Log string format=TERM [2018-08-07 10:54:42,648 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-08-07 10:54:42,648 INFO L133 SettingsManager]: * Interval Domain=false [2018-08-07 10:54:42,649 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-08-07 10:54:42,649 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-08-07 10:54:42,649 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-08-07 10:54:42,649 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-08-07 10:54:42,649 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-08-07 10:54:42,650 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-08-07 10:54:42,650 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-08-07 10:54:42,650 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-08-07 10:54:42,650 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-08-07 10:54:42,651 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-08-07 10:54:42,651 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-08-07 10:54:42,651 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-08-07 10:54:42,651 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-08-07 10:54:42,651 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-08-07 10:54:42,652 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-08-07 10:54:42,652 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-08-07 10:54:42,652 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-08-07 10:54:42,652 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-08-07 10:54:42,652 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-08-07 10:54:42,653 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-08-07 10:54:42,653 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-08-07 10:54:42,653 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-08-07 10:54:42,719 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-08-07 10:54:42,733 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-08-07 10:54:42,739 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-08-07 10:54:42,741 INFO L271 PluginConnector]: Initializing CDTParser... [2018-08-07 10:54:42,741 INFO L276 PluginConnector]: CDTParser initialized [2018-08-07 10:54:42,742 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-new/count_by_nondet_true-unreach-call_true-termination.i [2018-08-07 10:54:43,089 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6ec64f57e/accf67be0ec547b098c2109939c2b8c0/FLAG2fa2177a8 [2018-08-07 10:54:43,240 INFO L276 CDTParser]: Found 1 translation units. [2018-08-07 10:54:43,240 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-new/count_by_nondet_true-unreach-call_true-termination.i [2018-08-07 10:54:43,247 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6ec64f57e/accf67be0ec547b098c2109939c2b8c0/FLAG2fa2177a8 [2018-08-07 10:54:43,273 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6ec64f57e/accf67be0ec547b098c2109939c2b8c0 [2018-08-07 10:54:43,289 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-08-07 10:54:43,290 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-08-07 10:54:43,291 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-08-07 10:54:43,292 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-08-07 10:54:43,298 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-08-07 10:54:43,299 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,301 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5fb9e569 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43, skipping insertion in model container [2018-08-07 10:54:43,302 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,453 INFO L179 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-08-07 10:54:43,492 INFO L175 PostProcessor]: Settings: Checked method=main [2018-08-07 10:54:43,506 INFO L422 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-08-07 10:54:43,514 INFO L175 PostProcessor]: Settings: Checked method=main [2018-08-07 10:54:43,537 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43 WrapperNode [2018-08-07 10:54:43,537 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-08-07 10:54:43,538 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-08-07 10:54:43,538 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-08-07 10:54:43,538 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-08-07 10:54:43,549 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,556 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,562 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-08-07 10:54:43,562 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-08-07 10:54:43,562 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-08-07 10:54:43,563 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-08-07 10:54:43,571 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,571 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,572 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,572 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,573 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,577 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,578 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (1/1) ... [2018-08-07 10:54:43,579 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-08-07 10:54:43,579 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-08-07 10:54:43,579 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-08-07 10:54:43,580 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-08-07 10:54:43,580 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-08-07 10:54:43,645 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-08-07 10:54:43,646 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-08-07 10:54:43,646 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assert [2018-08-07 10:54:43,646 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assert [2018-08-07 10:54:43,646 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-08-07 10:54:43,646 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-08-07 10:54:43,647 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-08-07 10:54:43,647 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-08-07 10:54:43,889 INFO L273 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-08-07 10:54:43,890 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.08 10:54:43 BoogieIcfgContainer [2018-08-07 10:54:43,890 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-08-07 10:54:43,891 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-08-07 10:54:43,891 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-08-07 10:54:43,894 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-08-07 10:54:43,894 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.08 10:54:43" (1/3) ... [2018-08-07 10:54:43,895 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5fbdf976 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.08 10:54:43, skipping insertion in model container [2018-08-07 10:54:43,895 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.08 10:54:43" (2/3) ... [2018-08-07 10:54:43,896 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5fbdf976 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.08 10:54:43, skipping insertion in model container [2018-08-07 10:54:43,896 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.08 10:54:43" (3/3) ... [2018-08-07 10:54:43,898 INFO L112 eAbstractionObserver]: Analyzing ICFG count_by_nondet_true-unreach-call_true-termination.i [2018-08-07 10:54:43,908 INFO L133 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-08-07 10:54:43,916 INFO L145 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-08-07 10:54:44,018 INFO L129 ementStrategyFactory]: Using default assertion order modulation [2018-08-07 10:54:44,019 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-08-07 10:54:44,019 INFO L382 AbstractCegarLoop]: Hoare is true [2018-08-07 10:54:44,019 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-08-07 10:54:44,019 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-08-07 10:54:44,019 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-08-07 10:54:44,020 INFO L386 AbstractCegarLoop]: Difference is false [2018-08-07 10:54:44,020 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-08-07 10:54:44,020 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-08-07 10:54:44,040 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states. [2018-08-07 10:54:44,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-08-07 10:54:44,046 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:44,047 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:44,048 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:44,054 INFO L82 PathProgramCache]: Analyzing trace with hash -397369335, now seen corresponding path program 1 times [2018-08-07 10:54:44,063 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:44,121 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:44,122 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:44,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:44,122 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:44,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:44,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:44,179 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-08-07 10:54:44,180 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-08-07 10:54:44,180 INFO L262 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-08-07 10:54:44,185 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-08-07 10:54:44,199 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-08-07 10:54:44,199 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-08-07 10:54:44,202 INFO L87 Difference]: Start difference. First operand 20 states. Second operand 2 states. [2018-08-07 10:54:44,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:44,224 INFO L93 Difference]: Finished difference Result 32 states and 36 transitions. [2018-08-07 10:54:44,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-08-07 10:54:44,225 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-08-07 10:54:44,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:44,233 INFO L225 Difference]: With dead ends: 32 [2018-08-07 10:54:44,233 INFO L226 Difference]: Without dead ends: 13 [2018-08-07 10:54:44,237 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-08-07 10:54:44,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-08-07 10:54:44,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-08-07 10:54:44,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-08-07 10:54:44,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2018-08-07 10:54:44,274 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 10 [2018-08-07 10:54:44,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:44,275 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2018-08-07 10:54:44,275 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-08-07 10:54:44,275 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-08-07 10:54:44,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-08-07 10:54:44,276 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:44,276 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:44,277 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:44,277 INFO L82 PathProgramCache]: Analyzing trace with hash 208361744, now seen corresponding path program 1 times [2018-08-07 10:54:44,277 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:44,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:44,279 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:44,279 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:44,279 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:44,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:44,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:44,349 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-08-07 10:54:44,350 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-08-07 10:54:44,350 INFO L262 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-08-07 10:54:44,352 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-08-07 10:54:44,352 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-08-07 10:54:44,352 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-08-07 10:54:44,353 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand 3 states. [2018-08-07 10:54:44,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:44,430 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-08-07 10:54:44,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-08-07 10:54:44,430 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-08-07 10:54:44,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:44,432 INFO L225 Difference]: With dead ends: 21 [2018-08-07 10:54:44,432 INFO L226 Difference]: Without dead ends: 16 [2018-08-07 10:54:44,433 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-08-07 10:54:44,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-08-07 10:54:44,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 15. [2018-08-07 10:54:44,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-08-07 10:54:44,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2018-08-07 10:54:44,439 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 11 [2018-08-07 10:54:44,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:44,439 INFO L480 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2018-08-07 10:54:44,439 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-08-07 10:54:44,439 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2018-08-07 10:54:44,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-08-07 10:54:44,440 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:44,440 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:44,441 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:44,441 INFO L82 PathProgramCache]: Analyzing trace with hash -371094139, now seen corresponding path program 1 times [2018-08-07 10:54:44,441 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:44,442 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:44,442 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:44,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:44,443 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:44,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:44,591 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:44,592 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:44,592 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:44,607 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:44,608 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:44,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:44,659 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:44,700 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:44,701 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:44,782 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:44,808 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:44,808 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:44,830 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:44,831 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:44,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:44,849 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:44,856 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:44,856 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:44,947 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:44,950 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:44,950 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 4 [2018-08-07 10:54:44,950 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:44,951 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-08-07 10:54:44,951 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-08-07 10:54:44,951 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-08-07 10:54:44,952 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand 4 states. [2018-08-07 10:54:45,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:45,010 INFO L93 Difference]: Finished difference Result 23 states and 23 transitions. [2018-08-07 10:54:45,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-08-07 10:54:45,010 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-08-07 10:54:45,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:45,011 INFO L225 Difference]: With dead ends: 23 [2018-08-07 10:54:45,011 INFO L226 Difference]: Without dead ends: 18 [2018-08-07 10:54:45,013 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 52 SyntacticMatches, 4 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-08-07 10:54:45,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-08-07 10:54:45,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-08-07 10:54:45,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-08-07 10:54:45,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2018-08-07 10:54:45,021 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 14 [2018-08-07 10:54:45,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:45,022 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2018-08-07 10:54:45,022 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-08-07 10:54:45,022 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-08-07 10:54:45,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-08-07 10:54:45,023 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:45,023 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:45,023 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:45,024 INFO L82 PathProgramCache]: Analyzing trace with hash -1467741968, now seen corresponding path program 2 times [2018-08-07 10:54:45,024 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:45,028 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:45,028 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:45,029 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:45,029 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:45,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:45,288 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:45,288 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:45,288 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:45,307 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:45,308 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:45,356 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:45,356 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:45,359 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:45,483 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:45,483 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:45,662 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:45,683 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:45,683 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:45,699 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:45,699 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:45,722 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:45,722 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:45,727 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:45,756 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:45,756 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:45,782 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:45,784 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:45,785 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 12 [2018-08-07 10:54:45,785 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:45,785 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-08-07 10:54:45,786 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-08-07 10:54:45,786 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-08-07 10:54:45,786 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand 7 states. [2018-08-07 10:54:45,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:45,919 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-08-07 10:54:45,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-08-07 10:54:45,920 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 17 [2018-08-07 10:54:45,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:45,922 INFO L225 Difference]: With dead ends: 27 [2018-08-07 10:54:45,922 INFO L226 Difference]: Without dead ends: 22 [2018-08-07 10:54:45,924 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 61 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2018-08-07 10:54:45,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-08-07 10:54:45,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2018-08-07 10:54:45,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-08-07 10:54:45,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-08-07 10:54:45,928 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 17 [2018-08-07 10:54:45,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:45,929 INFO L480 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-08-07 10:54:45,929 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-08-07 10:54:45,929 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-08-07 10:54:45,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-08-07 10:54:45,930 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:45,930 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:45,930 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:45,931 INFO L82 PathProgramCache]: Analyzing trace with hash 113004965, now seen corresponding path program 3 times [2018-08-07 10:54:45,931 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:45,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:45,932 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:45,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:45,932 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:45,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:46,051 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,051 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:46,051 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:46,068 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:46,068 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:46,082 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-08-07 10:54:46,082 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:46,084 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:46,131 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,131 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:46,568 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,591 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:46,591 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:46,608 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:46,608 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:46,636 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-08-07 10:54:46,636 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:46,641 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:46,656 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,657 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:46,679 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (7)] Exception during sending of exit command (exit): Broken pipe [2018-08-07 10:54:46,682 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:46,682 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-08-07 10:54:46,682 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:46,683 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-08-07 10:54:46,683 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-08-07 10:54:46,684 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=127, Unknown=0, NotChecked=0, Total=182 [2018-08-07 10:54:46,684 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-08-07 10:54:46,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:46,747 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-08-07 10:54:46,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-08-07 10:54:46,747 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-08-07 10:54:46,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:46,748 INFO L225 Difference]: With dead ends: 30 [2018-08-07 10:54:46,748 INFO L226 Difference]: Without dead ends: 25 [2018-08-07 10:54:46,749 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=61, Invalid=149, Unknown=0, NotChecked=0, Total=210 [2018-08-07 10:54:46,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-08-07 10:54:46,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2018-08-07 10:54:46,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-08-07 10:54:46,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-08-07 10:54:46,754 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 20 [2018-08-07 10:54:46,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:46,755 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-08-07 10:54:46,755 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-08-07 10:54:46,755 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-08-07 10:54:46,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-08-07 10:54:46,756 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:46,756 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:46,756 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:46,757 INFO L82 PathProgramCache]: Analyzing trace with hash 2123452624, now seen corresponding path program 4 times [2018-08-07 10:54:46,757 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:46,758 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:46,758 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:46,758 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:46,758 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:46,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:46,884 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,884 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:46,884 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:46,892 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:46,892 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:46,906 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:46,906 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:46,910 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:46,937 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:46,938 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:47,101 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:47,122 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:47,123 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:47,140 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:47,140 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:47,166 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:47,166 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:47,170 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:47,202 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:47,202 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:47,222 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:47,224 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:47,224 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 16 [2018-08-07 10:54:47,225 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:47,225 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-08-07 10:54:47,225 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-08-07 10:54:47,226 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=164, Unknown=0, NotChecked=0, Total=240 [2018-08-07 10:54:47,226 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 9 states. [2018-08-07 10:54:47,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:47,285 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-08-07 10:54:47,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-08-07 10:54:47,286 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 23 [2018-08-07 10:54:47,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:47,287 INFO L225 Difference]: With dead ends: 33 [2018-08-07 10:54:47,287 INFO L226 Difference]: Without dead ends: 28 [2018-08-07 10:54:47,288 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 83 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=82, Invalid=190, Unknown=0, NotChecked=0, Total=272 [2018-08-07 10:54:47,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-08-07 10:54:47,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 27. [2018-08-07 10:54:47,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-08-07 10:54:47,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-08-07 10:54:47,294 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 23 [2018-08-07 10:54:47,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:47,294 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-08-07 10:54:47,294 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-08-07 10:54:47,294 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-08-07 10:54:47,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-08-07 10:54:47,295 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:47,296 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:47,296 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:47,296 INFO L82 PathProgramCache]: Analyzing trace with hash 2050719173, now seen corresponding path program 5 times [2018-08-07 10:54:47,296 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:47,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:47,297 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:47,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:47,298 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:47,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:47,469 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:47,469 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:47,469 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-08-07 10:54:47,486 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:47,486 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:47,510 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-08-07 10:54:47,511 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:47,513 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:47,538 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:47,538 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:47,869 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:47,891 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:47,891 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:47,908 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:47,909 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:47,952 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-08-07 10:54:47,952 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:47,956 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:47,988 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:47,988 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:48,037 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,039 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:48,039 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 18 [2018-08-07 10:54:48,039 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:48,040 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-08-07 10:54:48,041 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-08-07 10:54:48,042 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=205, Unknown=0, NotChecked=0, Total=306 [2018-08-07 10:54:48,042 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 10 states. [2018-08-07 10:54:48,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:48,113 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-08-07 10:54:48,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-08-07 10:54:48,113 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 26 [2018-08-07 10:54:48,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:48,114 INFO L225 Difference]: With dead ends: 36 [2018-08-07 10:54:48,115 INFO L226 Difference]: Without dead ends: 31 [2018-08-07 10:54:48,115 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=107, Invalid=235, Unknown=0, NotChecked=0, Total=342 [2018-08-07 10:54:48,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-08-07 10:54:48,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2018-08-07 10:54:48,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-08-07 10:54:48,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-08-07 10:54:48,120 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 26 [2018-08-07 10:54:48,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:48,120 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-08-07 10:54:48,120 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-08-07 10:54:48,121 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-08-07 10:54:48,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-08-07 10:54:48,121 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:48,122 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:48,122 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:48,122 INFO L82 PathProgramCache]: Analyzing trace with hash -88002384, now seen corresponding path program 6 times [2018-08-07 10:54:48,122 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:48,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:48,123 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:48,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:48,123 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:48,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:48,262 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,263 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:48,263 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:48,272 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:48,273 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:48,299 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-08-07 10:54:48,300 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:48,303 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:48,344 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,344 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:48,559 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,582 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:48,582 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:48,598 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:48,599 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:48,655 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-08-07 10:54:48,656 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:48,663 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:48,704 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,704 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:48,724 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:48,726 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:48,726 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-08-07 10:54:48,726 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:48,727 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-08-07 10:54:48,727 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-08-07 10:54:48,728 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=130, Invalid=250, Unknown=0, NotChecked=0, Total=380 [2018-08-07 10:54:48,728 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 11 states. [2018-08-07 10:54:48,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:48,807 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-08-07 10:54:48,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-08-07 10:54:48,814 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 29 [2018-08-07 10:54:48,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:48,815 INFO L225 Difference]: With dead ends: 39 [2018-08-07 10:54:48,815 INFO L226 Difference]: Without dead ends: 34 [2018-08-07 10:54:48,815 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=136, Invalid=284, Unknown=0, NotChecked=0, Total=420 [2018-08-07 10:54:48,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-08-07 10:54:48,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 33. [2018-08-07 10:54:48,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-08-07 10:54:48,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-08-07 10:54:48,823 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 29 [2018-08-07 10:54:48,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:48,824 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-08-07 10:54:48,824 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-08-07 10:54:48,824 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-08-07 10:54:48,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-08-07 10:54:48,825 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:48,825 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:48,825 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:48,826 INFO L82 PathProgramCache]: Analyzing trace with hash 1097929189, now seen corresponding path program 7 times [2018-08-07 10:54:48,826 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:48,827 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:48,827 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:48,827 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:48,827 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:48,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:49,060 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:49,060 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:49,060 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:49,068 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:49,068 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:49,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:49,091 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:49,138 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:49,138 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:49,355 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:49,376 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:49,377 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:49,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:49,394 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:49,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:49,429 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:49,499 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:49,499 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:49,559 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:49,562 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:49,562 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 22 [2018-08-07 10:54:49,562 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:49,563 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-08-07 10:54:49,563 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-08-07 10:54:49,564 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=299, Unknown=0, NotChecked=0, Total=462 [2018-08-07 10:54:49,564 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 12 states. [2018-08-07 10:54:49,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:49,778 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-08-07 10:54:49,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-08-07 10:54:49,782 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 32 [2018-08-07 10:54:49,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:49,783 INFO L225 Difference]: With dead ends: 42 [2018-08-07 10:54:49,783 INFO L226 Difference]: Without dead ends: 37 [2018-08-07 10:54:49,784 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 116 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=169, Invalid=337, Unknown=0, NotChecked=0, Total=506 [2018-08-07 10:54:49,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-08-07 10:54:49,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 36. [2018-08-07 10:54:49,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-08-07 10:54:49,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-08-07 10:54:49,790 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 32 [2018-08-07 10:54:49,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:49,790 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-08-07 10:54:49,790 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-08-07 10:54:49,790 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-08-07 10:54:49,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-08-07 10:54:49,791 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:49,792 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:49,792 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:49,792 INFO L82 PathProgramCache]: Analyzing trace with hash 784443536, now seen corresponding path program 8 times [2018-08-07 10:54:49,792 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:49,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:49,793 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:49,794 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:49,794 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:49,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:49,958 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:49,958 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:49,958 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:49,967 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:49,968 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:50,009 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:50,010 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:50,012 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:50,197 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:50,197 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:50,615 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:50,636 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:50,636 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:50,651 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:50,652 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:50,703 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:50,703 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:50,707 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:50,752 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:50,752 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:50,761 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:50,763 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:50,763 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 24 [2018-08-07 10:54:50,763 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:50,764 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-08-07 10:54:50,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-08-07 10:54:50,765 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=200, Invalid=352, Unknown=0, NotChecked=0, Total=552 [2018-08-07 10:54:50,765 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 13 states. [2018-08-07 10:54:50,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:50,821 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-08-07 10:54:50,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-08-07 10:54:50,821 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 35 [2018-08-07 10:54:50,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:50,823 INFO L225 Difference]: With dead ends: 45 [2018-08-07 10:54:50,823 INFO L226 Difference]: Without dead ends: 40 [2018-08-07 10:54:50,824 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 127 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=206, Invalid=394, Unknown=0, NotChecked=0, Total=600 [2018-08-07 10:54:50,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-08-07 10:54:50,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2018-08-07 10:54:50,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-08-07 10:54:50,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-08-07 10:54:50,829 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 35 [2018-08-07 10:54:50,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:50,830 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-08-07 10:54:50,830 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-08-07 10:54:50,830 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-08-07 10:54:50,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-08-07 10:54:50,831 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:50,831 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:50,831 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:50,832 INFO L82 PathProgramCache]: Analyzing trace with hash -1007743483, now seen corresponding path program 9 times [2018-08-07 10:54:50,832 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:50,833 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:50,833 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:50,833 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:50,833 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:50,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:51,125 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:51,125 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:51,125 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:51,135 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:51,135 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:51,176 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-08-07 10:54:51,177 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:51,178 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:51,251 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:51,252 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:51,655 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:51,676 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:51,677 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:51,692 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:51,692 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:51,783 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-08-07 10:54:51,783 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:51,787 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:51,810 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:51,811 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:51,873 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:51,876 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:51,877 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-08-07 10:54:51,877 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:51,877 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-08-07 10:54:51,878 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-08-07 10:54:51,878 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=241, Invalid=409, Unknown=0, NotChecked=0, Total=650 [2018-08-07 10:54:51,878 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 14 states. [2018-08-07 10:54:52,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:52,474 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-08-07 10:54:52,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-08-07 10:54:52,475 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 38 [2018-08-07 10:54:52,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:52,476 INFO L225 Difference]: With dead ends: 48 [2018-08-07 10:54:52,476 INFO L226 Difference]: Without dead ends: 43 [2018-08-07 10:54:52,479 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=247, Invalid=455, Unknown=0, NotChecked=0, Total=702 [2018-08-07 10:54:52,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-08-07 10:54:52,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 42. [2018-08-07 10:54:52,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-08-07 10:54:52,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-08-07 10:54:52,485 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 38 [2018-08-07 10:54:52,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:52,486 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-08-07 10:54:52,486 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-08-07 10:54:52,486 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-08-07 10:54:52,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-08-07 10:54:52,487 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:52,487 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:52,491 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:52,492 INFO L82 PathProgramCache]: Analyzing trace with hash -1312769936, now seen corresponding path program 10 times [2018-08-07 10:54:52,493 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:52,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:52,494 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:52,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:52,495 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:52,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:53,581 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:53,582 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:53,582 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:53,591 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:53,591 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:53,608 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:53,608 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:53,611 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:53,641 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:53,642 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:54,226 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:54,247 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:54,247 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:54,265 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:54:54,266 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:54:54,307 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:54:54,307 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:54,311 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:54,458 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:54,458 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:54,468 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:54,470 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:54,470 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-08-07 10:54:54,470 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:54,471 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-08-07 10:54:54,471 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-08-07 10:54:54,471 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=470, Unknown=0, NotChecked=0, Total=756 [2018-08-07 10:54:54,472 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 15 states. [2018-08-07 10:54:54,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:54,558 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-08-07 10:54:54,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-08-07 10:54:54,560 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 41 [2018-08-07 10:54:54,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:54,561 INFO L225 Difference]: With dead ends: 51 [2018-08-07 10:54:54,561 INFO L226 Difference]: Without dead ends: 46 [2018-08-07 10:54:54,562 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 178 GetRequests, 149 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=292, Invalid=520, Unknown=0, NotChecked=0, Total=812 [2018-08-07 10:54:54,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-08-07 10:54:54,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 45. [2018-08-07 10:54:54,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-08-07 10:54:54,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-08-07 10:54:54,567 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 41 [2018-08-07 10:54:54,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:54,568 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-08-07 10:54:54,568 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-08-07 10:54:54,568 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-08-07 10:54:54,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-08-07 10:54:54,569 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:54,569 INFO L376 BasicCegarLoop]: trace histogram [12, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:54,569 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:54,570 INFO L82 PathProgramCache]: Analyzing trace with hash -205032923, now seen corresponding path program 11 times [2018-08-07 10:54:54,570 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:54,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:54,571 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:54,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:54,571 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:54,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:54,753 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:54,754 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:54,754 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:54,762 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:54,762 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:54,791 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-08-07 10:54:54,791 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:54,794 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:54,958 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:54,958 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:55,253 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:55,273 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:55,273 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:55,288 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:54:55,289 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:55,390 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-08-07 10:54:55,390 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:55,394 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:55,456 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:55,456 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:55,476 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (23)] Exception during sending of exit command (exit): Broken pipe [2018-08-07 10:54:55,478 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:55,478 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-08-07 10:54:55,478 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:55,479 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-08-07 10:54:55,479 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-08-07 10:54:55,480 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=335, Invalid=535, Unknown=0, NotChecked=0, Total=870 [2018-08-07 10:54:55,480 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 16 states. [2018-08-07 10:54:55,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:55,555 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-08-07 10:54:55,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-08-07 10:54:55,556 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 44 [2018-08-07 10:54:55,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:55,556 INFO L225 Difference]: With dead ends: 54 [2018-08-07 10:54:55,557 INFO L226 Difference]: Without dead ends: 49 [2018-08-07 10:54:55,558 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 160 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=341, Invalid=589, Unknown=0, NotChecked=0, Total=930 [2018-08-07 10:54:55,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-08-07 10:54:55,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 48. [2018-08-07 10:54:55,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-08-07 10:54:55,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-08-07 10:54:55,563 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 44 [2018-08-07 10:54:55,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:55,564 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-08-07 10:54:55,564 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-08-07 10:54:55,564 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-08-07 10:54:55,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-08-07 10:54:55,565 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:55,565 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:55,565 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:55,565 INFO L82 PathProgramCache]: Analyzing trace with hash -2140381104, now seen corresponding path program 12 times [2018-08-07 10:54:55,565 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:55,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:55,566 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:55,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:55,566 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:55,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:56,403 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:56,404 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:56,404 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:56,411 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:56,411 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:56,483 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-08-07 10:54:56,483 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:56,486 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:56,561 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:56,562 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:56,945 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:56,973 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:56,974 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:56,988 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:54:56,989 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:54:57,106 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-08-07 10:54:57,106 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:57,110 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:57,165 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:57,165 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:57,173 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:57,174 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:57,174 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-08-07 10:54:57,174 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:57,175 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-08-07 10:54:57,175 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-08-07 10:54:57,175 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=388, Invalid=604, Unknown=0, NotChecked=0, Total=992 [2018-08-07 10:54:57,176 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 17 states. [2018-08-07 10:54:57,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:57,235 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-08-07 10:54:57,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-08-07 10:54:57,237 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 47 [2018-08-07 10:54:57,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:57,238 INFO L225 Difference]: With dead ends: 57 [2018-08-07 10:54:57,238 INFO L226 Difference]: Without dead ends: 52 [2018-08-07 10:54:57,239 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 204 GetRequests, 171 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 126 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=394, Invalid=662, Unknown=0, NotChecked=0, Total=1056 [2018-08-07 10:54:57,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-08-07 10:54:57,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 51. [2018-08-07 10:54:57,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-08-07 10:54:57,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-08-07 10:54:57,247 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 47 [2018-08-07 10:54:57,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:57,248 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-08-07 10:54:57,248 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-08-07 10:54:57,248 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-08-07 10:54:57,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-08-07 10:54:57,250 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:57,250 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:57,251 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:57,251 INFO L82 PathProgramCache]: Analyzing trace with hash 1837907525, now seen corresponding path program 13 times [2018-08-07 10:54:57,251 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:57,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:57,253 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:57,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:57,253 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:57,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:57,515 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:57,515 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:57,515 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:57,523 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:57,523 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:57,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:57,548 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:57,577 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:57,578 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:57,955 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:57,976 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:57,976 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:57,994 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:57,994 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:54:58,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:58,049 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:58,073 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:58,074 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:58,101 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:58,102 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:58,103 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 34 [2018-08-07 10:54:58,103 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:58,103 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-08-07 10:54:58,103 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-08-07 10:54:58,104 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=445, Invalid=677, Unknown=0, NotChecked=0, Total=1122 [2018-08-07 10:54:58,104 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 18 states. [2018-08-07 10:54:58,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:58,146 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-08-07 10:54:58,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-08-07 10:54:58,147 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 50 [2018-08-07 10:54:58,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:58,148 INFO L225 Difference]: With dead ends: 60 [2018-08-07 10:54:58,148 INFO L226 Difference]: Without dead ends: 55 [2018-08-07 10:54:58,149 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 182 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=451, Invalid=739, Unknown=0, NotChecked=0, Total=1190 [2018-08-07 10:54:58,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-08-07 10:54:58,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 54. [2018-08-07 10:54:58,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-08-07 10:54:58,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-08-07 10:54:58,155 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 50 [2018-08-07 10:54:58,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:58,155 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-08-07 10:54:58,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-08-07 10:54:58,156 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-08-07 10:54:58,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-08-07 10:54:58,156 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:58,157 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:58,157 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:58,157 INFO L82 PathProgramCache]: Analyzing trace with hash -588079056, now seen corresponding path program 14 times [2018-08-07 10:54:58,157 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:58,158 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:58,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:54:58,158 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:58,158 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:58,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:58,439 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:58,439 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:58,439 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:58,447 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:58,447 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:58,473 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:58,474 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:58,476 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:58,498 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:58,499 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:59,284 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:59,304 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:59,305 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:54:59,327 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:54:59,327 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:54:59,383 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:54:59,383 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:59,388 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:59,436 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:59,437 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:54:59,446 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:59,447 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:54:59,447 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 36 [2018-08-07 10:54:59,448 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:54:59,448 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-08-07 10:54:59,448 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-08-07 10:54:59,448 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=506, Invalid=754, Unknown=0, NotChecked=0, Total=1260 [2018-08-07 10:54:59,449 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 19 states. [2018-08-07 10:54:59,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:54:59,510 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-08-07 10:54:59,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-08-07 10:54:59,512 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 53 [2018-08-07 10:54:59,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:54:59,513 INFO L225 Difference]: With dead ends: 63 [2018-08-07 10:54:59,513 INFO L226 Difference]: Without dead ends: 58 [2018-08-07 10:54:59,515 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 193 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 146 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=512, Invalid=820, Unknown=0, NotChecked=0, Total=1332 [2018-08-07 10:54:59,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-08-07 10:54:59,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 57. [2018-08-07 10:54:59,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-08-07 10:54:59,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-08-07 10:54:59,530 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 53 [2018-08-07 10:54:59,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:54:59,530 INFO L480 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-08-07 10:54:59,531 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-08-07 10:54:59,531 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-08-07 10:54:59,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-08-07 10:54:59,531 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:54:59,532 INFO L376 BasicCegarLoop]: trace histogram [16, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:54:59,532 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:54:59,532 INFO L82 PathProgramCache]: Analyzing trace with hash -1739623835, now seen corresponding path program 15 times [2018-08-07 10:54:59,532 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:54:59,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:59,533 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:54:59,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:54:59,536 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:54:59,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:54:59,768 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:59,768 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:54:59,769 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:54:59,777 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:54:59,777 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:54:59,808 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-08-07 10:54:59,808 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:54:59,810 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:54:59,837 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:54:59,837 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:00,702 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:00,722 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:00,723 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:00,738 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:00,738 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:00,890 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-08-07 10:55:00,890 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:00,893 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:00,912 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:00,913 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:00,972 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:00,975 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:00,975 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 38 [2018-08-07 10:55:00,975 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:00,976 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-08-07 10:55:00,976 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-08-07 10:55:00,977 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=571, Invalid=835, Unknown=0, NotChecked=0, Total=1406 [2018-08-07 10:55:00,977 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 20 states. [2018-08-07 10:55:01,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:01,129 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-08-07 10:55:01,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-08-07 10:55:01,130 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 56 [2018-08-07 10:55:01,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:01,131 INFO L225 Difference]: With dead ends: 66 [2018-08-07 10:55:01,131 INFO L226 Difference]: Without dead ends: 61 [2018-08-07 10:55:01,132 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 243 GetRequests, 204 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 156 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=577, Invalid=905, Unknown=0, NotChecked=0, Total=1482 [2018-08-07 10:55:01,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-08-07 10:55:01,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 60. [2018-08-07 10:55:01,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-08-07 10:55:01,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 60 transitions. [2018-08-07 10:55:01,139 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 60 transitions. Word has length 56 [2018-08-07 10:55:01,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:01,140 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 60 transitions. [2018-08-07 10:55:01,140 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-08-07 10:55:01,140 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 60 transitions. [2018-08-07 10:55:01,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-08-07 10:55:01,142 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:01,142 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:01,142 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:01,142 INFO L82 PathProgramCache]: Analyzing trace with hash 788625424, now seen corresponding path program 16 times [2018-08-07 10:55:01,143 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:01,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:01,146 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:01,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:01,146 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:01,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:02,274 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:02,274 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:02,274 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:02,281 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:02,281 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:02,311 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:02,311 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:02,313 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:02,352 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:02,352 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:03,392 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:03,412 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:03,412 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:03,426 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:03,426 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:03,492 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:03,492 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:03,497 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:03,769 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:03,769 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:03,828 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:03,833 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:03,833 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 40 [2018-08-07 10:55:03,833 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:03,833 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-08-07 10:55:03,834 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-08-07 10:55:03,834 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=640, Invalid=920, Unknown=0, NotChecked=0, Total=1560 [2018-08-07 10:55:03,835 INFO L87 Difference]: Start difference. First operand 60 states and 60 transitions. Second operand 21 states. [2018-08-07 10:55:04,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:04,054 INFO L93 Difference]: Finished difference Result 69 states and 69 transitions. [2018-08-07 10:55:04,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-08-07 10:55:04,054 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 59 [2018-08-07 10:55:04,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:04,055 INFO L225 Difference]: With dead ends: 69 [2018-08-07 10:55:04,056 INFO L226 Difference]: Without dead ends: 64 [2018-08-07 10:55:04,057 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 215 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 166 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=646, Invalid=994, Unknown=0, NotChecked=0, Total=1640 [2018-08-07 10:55:04,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-08-07 10:55:04,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 63. [2018-08-07 10:55:04,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-08-07 10:55:04,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 63 transitions. [2018-08-07 10:55:04,061 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 63 transitions. Word has length 59 [2018-08-07 10:55:04,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:04,062 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 63 transitions. [2018-08-07 10:55:04,062 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-08-07 10:55:04,062 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 63 transitions. [2018-08-07 10:55:04,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-08-07 10:55:04,063 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:04,063 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:04,063 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:04,063 INFO L82 PathProgramCache]: Analyzing trace with hash -979169659, now seen corresponding path program 17 times [2018-08-07 10:55:04,063 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:04,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:04,064 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:04,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:04,064 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:04,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:04,441 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:04,441 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:04,441 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:04,448 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:04,448 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:04,484 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-08-07 10:55:04,484 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:04,487 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:04,518 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:04,518 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:04,971 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:04,992 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:04,993 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:05,007 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:05,007 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:05,182 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-08-07 10:55:05,182 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:05,186 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:05,207 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:05,207 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:05,244 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:05,245 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:05,245 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 42 [2018-08-07 10:55:05,245 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:05,246 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-08-07 10:55:05,246 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-08-07 10:55:05,247 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=713, Invalid=1009, Unknown=0, NotChecked=0, Total=1722 [2018-08-07 10:55:05,247 INFO L87 Difference]: Start difference. First operand 63 states and 63 transitions. Second operand 22 states. [2018-08-07 10:55:05,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:05,301 INFO L93 Difference]: Finished difference Result 72 states and 72 transitions. [2018-08-07 10:55:05,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-08-07 10:55:05,301 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 62 [2018-08-07 10:55:05,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:05,303 INFO L225 Difference]: With dead ends: 72 [2018-08-07 10:55:05,303 INFO L226 Difference]: Without dead ends: 67 [2018-08-07 10:55:05,304 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 269 GetRequests, 226 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 176 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=719, Invalid=1087, Unknown=0, NotChecked=0, Total=1806 [2018-08-07 10:55:05,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-08-07 10:55:05,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 66. [2018-08-07 10:55:05,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-08-07 10:55:05,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 66 transitions. [2018-08-07 10:55:05,309 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 66 transitions. Word has length 62 [2018-08-07 10:55:05,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:05,309 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 66 transitions. [2018-08-07 10:55:05,310 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-08-07 10:55:05,310 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 66 transitions. [2018-08-07 10:55:05,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-08-07 10:55:05,311 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:05,311 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:05,311 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:05,311 INFO L82 PathProgramCache]: Analyzing trace with hash -473503760, now seen corresponding path program 18 times [2018-08-07 10:55:05,311 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:05,312 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:05,312 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:05,312 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:05,313 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:05,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:05,596 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:05,596 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:05,596 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:05,603 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:05,603 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:05,665 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-08-07 10:55:05,665 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:05,667 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:05,709 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:05,709 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:06,546 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:06,566 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:06,566 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:06,581 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:06,581 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:06,788 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-08-07 10:55:06,788 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:06,793 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:06,831 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:06,831 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:06,846 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:06,848 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:06,848 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 44 [2018-08-07 10:55:06,848 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:06,848 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-08-07 10:55:06,849 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-08-07 10:55:06,849 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=790, Invalid=1102, Unknown=0, NotChecked=0, Total=1892 [2018-08-07 10:55:06,849 INFO L87 Difference]: Start difference. First operand 66 states and 66 transitions. Second operand 23 states. [2018-08-07 10:55:06,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:06,933 INFO L93 Difference]: Finished difference Result 75 states and 75 transitions. [2018-08-07 10:55:06,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-08-07 10:55:06,934 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 65 [2018-08-07 10:55:06,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:06,935 INFO L225 Difference]: With dead ends: 75 [2018-08-07 10:55:06,935 INFO L226 Difference]: Without dead ends: 70 [2018-08-07 10:55:06,936 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 282 GetRequests, 237 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 186 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=796, Invalid=1184, Unknown=0, NotChecked=0, Total=1980 [2018-08-07 10:55:06,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-08-07 10:55:06,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 69. [2018-08-07 10:55:06,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-08-07 10:55:06,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 69 transitions. [2018-08-07 10:55:06,940 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 69 transitions. Word has length 65 [2018-08-07 10:55:06,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:06,941 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 69 transitions. [2018-08-07 10:55:06,941 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-08-07 10:55:06,941 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 69 transitions. [2018-08-07 10:55:06,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-08-07 10:55:06,942 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:06,942 INFO L376 BasicCegarLoop]: trace histogram [20, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:06,942 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:06,942 INFO L82 PathProgramCache]: Analyzing trace with hash 1368986277, now seen corresponding path program 19 times [2018-08-07 10:55:06,943 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:06,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:06,943 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:06,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:06,944 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:06,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:07,364 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:07,364 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:07,364 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:07,372 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:07,372 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:07,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:07,409 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:07,438 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:07,438 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:07,953 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:07,973 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:07,973 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:07,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:07,989 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:08,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:08,058 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:08,091 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:08,091 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:08,105 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:08,106 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:08,106 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 46 [2018-08-07 10:55:08,106 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:08,107 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-08-07 10:55:08,107 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-08-07 10:55:08,107 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=871, Invalid=1199, Unknown=0, NotChecked=0, Total=2070 [2018-08-07 10:55:08,108 INFO L87 Difference]: Start difference. First operand 69 states and 69 transitions. Second operand 24 states. [2018-08-07 10:55:08,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:08,300 INFO L93 Difference]: Finished difference Result 78 states and 78 transitions. [2018-08-07 10:55:08,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-08-07 10:55:08,301 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 68 [2018-08-07 10:55:08,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:08,302 INFO L225 Difference]: With dead ends: 78 [2018-08-07 10:55:08,302 INFO L226 Difference]: Without dead ends: 73 [2018-08-07 10:55:08,303 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 295 GetRequests, 248 SyntacticMatches, 2 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=877, Invalid=1285, Unknown=0, NotChecked=0, Total=2162 [2018-08-07 10:55:08,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-08-07 10:55:08,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 72. [2018-08-07 10:55:08,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-08-07 10:55:08,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 72 transitions. [2018-08-07 10:55:08,308 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 72 transitions. Word has length 68 [2018-08-07 10:55:08,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:08,308 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 72 transitions. [2018-08-07 10:55:08,308 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-08-07 10:55:08,308 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 72 transitions. [2018-08-07 10:55:08,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-08-07 10:55:08,309 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:08,309 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:08,309 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:08,309 INFO L82 PathProgramCache]: Analyzing trace with hash 1307635664, now seen corresponding path program 20 times [2018-08-07 10:55:08,309 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:08,310 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:08,310 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:08,310 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:08,310 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:08,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:08,858 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:08,859 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:08,859 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:08,866 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:08,867 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:08,901 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:08,901 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:08,903 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:08,927 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:08,927 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:09,785 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:09,805 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:09,806 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:09,820 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:09,820 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:09,898 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:09,898 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:09,902 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:09,946 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:09,946 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:09,988 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:09,989 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:09,989 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 48 [2018-08-07 10:55:09,990 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:09,990 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-08-07 10:55:09,990 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-08-07 10:55:09,991 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=956, Invalid=1300, Unknown=0, NotChecked=0, Total=2256 [2018-08-07 10:55:09,991 INFO L87 Difference]: Start difference. First operand 72 states and 72 transitions. Second operand 25 states. [2018-08-07 10:55:10,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:10,052 INFO L93 Difference]: Finished difference Result 81 states and 81 transitions. [2018-08-07 10:55:10,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-08-07 10:55:10,055 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 71 [2018-08-07 10:55:10,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:10,056 INFO L225 Difference]: With dead ends: 81 [2018-08-07 10:55:10,056 INFO L226 Difference]: Without dead ends: 76 [2018-08-07 10:55:10,058 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 308 GetRequests, 259 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=962, Invalid=1390, Unknown=0, NotChecked=0, Total=2352 [2018-08-07 10:55:10,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-08-07 10:55:10,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 75. [2018-08-07 10:55:10,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-08-07 10:55:10,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 75 transitions. [2018-08-07 10:55:10,062 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 75 transitions. Word has length 71 [2018-08-07 10:55:10,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:10,062 INFO L480 AbstractCegarLoop]: Abstraction has 75 states and 75 transitions. [2018-08-07 10:55:10,062 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-08-07 10:55:10,062 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 75 transitions. [2018-08-07 10:55:10,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-08-07 10:55:10,063 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:10,063 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:10,063 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:10,064 INFO L82 PathProgramCache]: Analyzing trace with hash -1027375419, now seen corresponding path program 21 times [2018-08-07 10:55:10,064 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:10,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:10,064 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:10,065 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:10,065 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:10,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:10,363 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:10,364 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:10,364 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:10,371 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:10,372 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:10,416 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-08-07 10:55:10,416 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:10,418 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:10,450 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:10,450 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:11,087 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:11,107 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:11,107 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:11,122 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:11,122 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:11,375 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-08-07 10:55:11,375 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:11,380 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:11,424 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:11,424 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:11,439 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:11,440 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:11,441 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 50 [2018-08-07 10:55:11,441 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:11,441 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-08-07 10:55:11,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-08-07 10:55:11,442 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1045, Invalid=1405, Unknown=0, NotChecked=0, Total=2450 [2018-08-07 10:55:11,443 INFO L87 Difference]: Start difference. First operand 75 states and 75 transitions. Second operand 26 states. [2018-08-07 10:55:11,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:11,590 INFO L93 Difference]: Finished difference Result 84 states and 84 transitions. [2018-08-07 10:55:11,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-08-07 10:55:11,591 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 74 [2018-08-07 10:55:11,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:11,592 INFO L225 Difference]: With dead ends: 84 [2018-08-07 10:55:11,592 INFO L226 Difference]: Without dead ends: 79 [2018-08-07 10:55:11,594 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 321 GetRequests, 270 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 216 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1051, Invalid=1499, Unknown=0, NotChecked=0, Total=2550 [2018-08-07 10:55:11,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-08-07 10:55:11,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 78. [2018-08-07 10:55:11,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-08-07 10:55:11,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 78 transitions. [2018-08-07 10:55:11,596 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 78 transitions. Word has length 74 [2018-08-07 10:55:11,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:11,596 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 78 transitions. [2018-08-07 10:55:11,596 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-08-07 10:55:11,596 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 78 transitions. [2018-08-07 10:55:11,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-08-07 10:55:11,597 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:11,597 INFO L376 BasicCegarLoop]: trace histogram [23, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:11,597 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:11,597 INFO L82 PathProgramCache]: Analyzing trace with hash -2052223056, now seen corresponding path program 22 times [2018-08-07 10:55:11,598 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:11,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:11,598 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:11,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:11,599 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:11,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:12,250 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:12,250 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:12,251 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:12,263 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:12,263 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:12,301 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:12,302 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:12,304 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:12,476 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:12,476 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:13,310 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:13,331 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:13,331 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:13,345 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:13,345 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:13,428 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:13,428 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:13,434 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:13,472 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:13,472 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:13,490 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:13,491 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:13,492 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 52 [2018-08-07 10:55:13,492 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:13,492 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-08-07 10:55:13,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-08-07 10:55:13,493 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1138, Invalid=1514, Unknown=0, NotChecked=0, Total=2652 [2018-08-07 10:55:13,493 INFO L87 Difference]: Start difference. First operand 78 states and 78 transitions. Second operand 27 states. [2018-08-07 10:55:13,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:13,561 INFO L93 Difference]: Finished difference Result 87 states and 87 transitions. [2018-08-07 10:55:13,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-08-07 10:55:13,561 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 77 [2018-08-07 10:55:13,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:13,562 INFO L225 Difference]: With dead ends: 87 [2018-08-07 10:55:13,563 INFO L226 Difference]: Without dead ends: 82 [2018-08-07 10:55:13,564 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 334 GetRequests, 281 SyntacticMatches, 2 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 226 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1144, Invalid=1612, Unknown=0, NotChecked=0, Total=2756 [2018-08-07 10:55:13,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-08-07 10:55:13,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 81. [2018-08-07 10:55:13,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-08-07 10:55:13,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 81 transitions. [2018-08-07 10:55:13,566 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 81 transitions. Word has length 77 [2018-08-07 10:55:13,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:13,567 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 81 transitions. [2018-08-07 10:55:13,567 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-08-07 10:55:13,567 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 81 transitions. [2018-08-07 10:55:13,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-08-07 10:55:13,567 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:13,568 INFO L376 BasicCegarLoop]: trace histogram [24, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:13,568 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:13,568 INFO L82 PathProgramCache]: Analyzing trace with hash -365669659, now seen corresponding path program 23 times [2018-08-07 10:55:13,568 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:13,570 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:13,570 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:13,570 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:13,570 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:13,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:13,955 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:13,955 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:13,956 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:13,963 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:13,963 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:14,008 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-08-07 10:55:14,008 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:14,011 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:14,033 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:14,033 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:15,132 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:15,153 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:15,153 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:15,168 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:15,168 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:15,466 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-08-07 10:55:15,467 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:15,472 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:15,514 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:15,514 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:15,525 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:15,527 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:15,527 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 54 [2018-08-07 10:55:15,527 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:15,528 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-08-07 10:55:15,528 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-08-07 10:55:15,529 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1235, Invalid=1627, Unknown=0, NotChecked=0, Total=2862 [2018-08-07 10:55:15,529 INFO L87 Difference]: Start difference. First operand 81 states and 81 transitions. Second operand 28 states. [2018-08-07 10:55:15,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:15,607 INFO L93 Difference]: Finished difference Result 90 states and 90 transitions. [2018-08-07 10:55:15,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-08-07 10:55:15,608 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 80 [2018-08-07 10:55:15,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:15,609 INFO L225 Difference]: With dead ends: 90 [2018-08-07 10:55:15,609 INFO L226 Difference]: Without dead ends: 85 [2018-08-07 10:55:15,611 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 347 GetRequests, 292 SyntacticMatches, 2 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1241, Invalid=1729, Unknown=0, NotChecked=0, Total=2970 [2018-08-07 10:55:15,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-08-07 10:55:15,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 84. [2018-08-07 10:55:15,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-08-07 10:55:15,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 84 transitions. [2018-08-07 10:55:15,614 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 84 transitions. Word has length 80 [2018-08-07 10:55:15,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:15,615 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 84 transitions. [2018-08-07 10:55:15,615 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-08-07 10:55:15,615 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 84 transitions. [2018-08-07 10:55:15,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-08-07 10:55:15,616 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:15,616 INFO L376 BasicCegarLoop]: trace histogram [25, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:15,616 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:15,616 INFO L82 PathProgramCache]: Analyzing trace with hash 1219151760, now seen corresponding path program 24 times [2018-08-07 10:55:15,616 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:15,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:15,617 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:15,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:15,617 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:15,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:16,217 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:16,217 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:16,217 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:16,226 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:16,226 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:16,281 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 25 check-sat command(s) [2018-08-07 10:55:16,281 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:16,285 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:16,379 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:16,379 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:17,411 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:17,432 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:17,432 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:17,446 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:17,447 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:17,771 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 25 check-sat command(s) [2018-08-07 10:55:17,771 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:17,776 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:17,821 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:17,821 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:17,832 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:17,833 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:17,833 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 56 [2018-08-07 10:55:17,834 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:17,834 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-08-07 10:55:17,834 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-08-07 10:55:17,835 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1336, Invalid=1744, Unknown=0, NotChecked=0, Total=3080 [2018-08-07 10:55:17,836 INFO L87 Difference]: Start difference. First operand 84 states and 84 transitions. Second operand 29 states. [2018-08-07 10:55:17,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:17,914 INFO L93 Difference]: Finished difference Result 93 states and 93 transitions. [2018-08-07 10:55:17,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-08-07 10:55:17,915 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 83 [2018-08-07 10:55:17,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:17,916 INFO L225 Difference]: With dead ends: 93 [2018-08-07 10:55:17,916 INFO L226 Difference]: Without dead ends: 88 [2018-08-07 10:55:17,918 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 303 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 246 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1342, Invalid=1850, Unknown=0, NotChecked=0, Total=3192 [2018-08-07 10:55:17,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-08-07 10:55:17,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 87. [2018-08-07 10:55:17,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-08-07 10:55:17,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 87 transitions. [2018-08-07 10:55:17,922 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 87 transitions. Word has length 83 [2018-08-07 10:55:17,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:17,922 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 87 transitions. [2018-08-07 10:55:17,922 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-08-07 10:55:17,922 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 87 transitions. [2018-08-07 10:55:17,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-08-07 10:55:17,923 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:17,923 INFO L376 BasicCegarLoop]: trace histogram [26, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:17,923 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:17,923 INFO L82 PathProgramCache]: Analyzing trace with hash 58560261, now seen corresponding path program 25 times [2018-08-07 10:55:17,923 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:17,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:17,924 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:17,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:17,925 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:17,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:18,363 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:18,364 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:18,364 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:18,372 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:18,372 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:18,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:18,417 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:18,468 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:18,468 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:19,428 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:19,449 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:19,449 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:19,464 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:19,465 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:19,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:19,561 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:19,583 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:19,584 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:19,658 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:19,660 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:19,660 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 58 [2018-08-07 10:55:19,660 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:19,661 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-08-07 10:55:19,661 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-08-07 10:55:19,662 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1441, Invalid=1865, Unknown=0, NotChecked=0, Total=3306 [2018-08-07 10:55:19,662 INFO L87 Difference]: Start difference. First operand 87 states and 87 transitions. Second operand 30 states. [2018-08-07 10:55:19,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:19,811 INFO L93 Difference]: Finished difference Result 96 states and 96 transitions. [2018-08-07 10:55:19,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-08-07 10:55:19,812 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 86 [2018-08-07 10:55:19,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:19,813 INFO L225 Difference]: With dead ends: 96 [2018-08-07 10:55:19,814 INFO L226 Difference]: Without dead ends: 91 [2018-08-07 10:55:19,815 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 373 GetRequests, 314 SyntacticMatches, 2 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 256 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1447, Invalid=1975, Unknown=0, NotChecked=0, Total=3422 [2018-08-07 10:55:19,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-08-07 10:55:19,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 90. [2018-08-07 10:55:19,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-08-07 10:55:19,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 90 transitions. [2018-08-07 10:55:19,818 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 90 transitions. Word has length 86 [2018-08-07 10:55:19,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:19,818 INFO L480 AbstractCegarLoop]: Abstraction has 90 states and 90 transitions. [2018-08-07 10:55:19,818 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-08-07 10:55:19,819 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 90 transitions. [2018-08-07 10:55:19,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-08-07 10:55:19,819 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:19,819 INFO L376 BasicCegarLoop]: trace histogram [27, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:19,819 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:19,820 INFO L82 PathProgramCache]: Analyzing trace with hash -636053648, now seen corresponding path program 26 times [2018-08-07 10:55:19,820 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:19,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:19,820 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:19,821 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:19,821 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:19,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:20,455 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:20,456 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:20,456 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:20,465 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:20,465 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:20,508 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:20,508 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:20,511 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:20,557 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:20,557 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:21,428 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:21,449 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:21,449 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:21,464 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:21,464 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:21,563 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:21,563 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:21,568 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:21,609 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:21,610 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:21,628 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 0 proven. 1027 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:21,629 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:21,630 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 60 [2018-08-07 10:55:21,630 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:21,630 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-08-07 10:55:21,630 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-08-07 10:55:21,631 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1550, Invalid=1990, Unknown=0, NotChecked=0, Total=3540 [2018-08-07 10:55:21,631 INFO L87 Difference]: Start difference. First operand 90 states and 90 transitions. Second operand 31 states. [2018-08-07 10:55:21,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:21,705 INFO L93 Difference]: Finished difference Result 99 states and 99 transitions. [2018-08-07 10:55:21,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-08-07 10:55:21,715 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 89 [2018-08-07 10:55:21,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:21,716 INFO L225 Difference]: With dead ends: 99 [2018-08-07 10:55:21,716 INFO L226 Difference]: Without dead ends: 94 [2018-08-07 10:55:21,717 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 386 GetRequests, 325 SyntacticMatches, 2 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 266 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1556, Invalid=2104, Unknown=0, NotChecked=0, Total=3660 [2018-08-07 10:55:21,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-08-07 10:55:21,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 93. [2018-08-07 10:55:21,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-08-07 10:55:21,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 93 transitions. [2018-08-07 10:55:21,720 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 93 transitions. Word has length 89 [2018-08-07 10:55:21,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:21,721 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 93 transitions. [2018-08-07 10:55:21,721 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-08-07 10:55:21,721 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 93 transitions. [2018-08-07 10:55:21,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-08-07 10:55:21,721 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:21,722 INFO L376 BasicCegarLoop]: trace histogram [28, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:21,722 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:21,722 INFO L82 PathProgramCache]: Analyzing trace with hash -726584539, now seen corresponding path program 27 times [2018-08-07 10:55:21,722 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:21,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:21,723 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:21,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:21,723 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:21,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:22,226 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:22,227 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:22,227 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:22,234 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:22,235 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:22,291 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-08-07 10:55:22,291 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:22,295 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:22,741 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:22,741 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:24,268 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:24,294 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:24,295 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:24,310 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:24,310 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:24,704 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-08-07 10:55:24,704 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:24,710 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:24,832 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:24,832 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:24,901 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:24,902 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:24,903 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 62 [2018-08-07 10:55:24,903 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:24,903 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-08-07 10:55:24,904 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-08-07 10:55:24,904 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1663, Invalid=2119, Unknown=0, NotChecked=0, Total=3782 [2018-08-07 10:55:24,905 INFO L87 Difference]: Start difference. First operand 93 states and 93 transitions. Second operand 32 states. [2018-08-07 10:55:25,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:25,234 INFO L93 Difference]: Finished difference Result 102 states and 102 transitions. [2018-08-07 10:55:25,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-08-07 10:55:25,234 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 92 [2018-08-07 10:55:25,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:25,236 INFO L225 Difference]: With dead ends: 102 [2018-08-07 10:55:25,236 INFO L226 Difference]: Without dead ends: 97 [2018-08-07 10:55:25,237 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 399 GetRequests, 336 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 276 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1669, Invalid=2237, Unknown=0, NotChecked=0, Total=3906 [2018-08-07 10:55:25,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-08-07 10:55:25,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 96. [2018-08-07 10:55:25,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-08-07 10:55:25,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 96 transitions. [2018-08-07 10:55:25,241 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 96 transitions. Word has length 92 [2018-08-07 10:55:25,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:25,241 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 96 transitions. [2018-08-07 10:55:25,241 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-08-07 10:55:25,241 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 96 transitions. [2018-08-07 10:55:25,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-08-07 10:55:25,242 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:25,242 INFO L376 BasicCegarLoop]: trace histogram [29, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:25,242 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:25,243 INFO L82 PathProgramCache]: Analyzing trace with hash -492896432, now seen corresponding path program 28 times [2018-08-07 10:55:25,243 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:25,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:25,243 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:25,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:25,244 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:25,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:25,753 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:25,753 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:25,754 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:25,761 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:25,761 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:25,814 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:25,815 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:25,817 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:26,011 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:26,011 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:27,030 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:27,062 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:27,062 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:27,098 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:27,098 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:27,197 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:27,198 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:27,206 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:27,346 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:27,346 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:27,412 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:27,414 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:27,414 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 64 [2018-08-07 10:55:27,414 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:27,414 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-08-07 10:55:27,415 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-08-07 10:55:27,415 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1780, Invalid=2252, Unknown=0, NotChecked=0, Total=4032 [2018-08-07 10:55:27,416 INFO L87 Difference]: Start difference. First operand 96 states and 96 transitions. Second operand 33 states. [2018-08-07 10:55:27,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:27,681 INFO L93 Difference]: Finished difference Result 105 states and 105 transitions. [2018-08-07 10:55:27,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-08-07 10:55:27,685 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 95 [2018-08-07 10:55:27,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:27,686 INFO L225 Difference]: With dead ends: 105 [2018-08-07 10:55:27,686 INFO L226 Difference]: Without dead ends: 100 [2018-08-07 10:55:27,687 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 412 GetRequests, 347 SyntacticMatches, 2 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1786, Invalid=2374, Unknown=0, NotChecked=0, Total=4160 [2018-08-07 10:55:27,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-08-07 10:55:27,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 99. [2018-08-07 10:55:27,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-08-07 10:55:27,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 99 transitions. [2018-08-07 10:55:27,692 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 99 transitions. Word has length 95 [2018-08-07 10:55:27,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:27,693 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 99 transitions. [2018-08-07 10:55:27,693 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-08-07 10:55:27,693 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 99 transitions. [2018-08-07 10:55:27,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-08-07 10:55:27,694 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:27,694 INFO L376 BasicCegarLoop]: trace histogram [30, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:27,694 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:27,694 INFO L82 PathProgramCache]: Analyzing trace with hash -832487611, now seen corresponding path program 29 times [2018-08-07 10:55:27,694 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:27,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:27,695 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:27,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:27,695 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:27,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:28,268 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:28,268 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:28,269 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:28,276 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:28,276 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:28,440 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-08-07 10:55:28,440 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:28,444 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:28,550 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:28,551 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:29,998 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:30,019 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:30,019 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:30,035 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:30,035 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:30,455 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-08-07 10:55:30,455 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:30,461 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:30,509 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:30,509 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:30,578 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:30,580 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:30,581 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 66 [2018-08-07 10:55:30,581 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:30,583 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-08-07 10:55:30,583 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-08-07 10:55:30,584 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1901, Invalid=2389, Unknown=0, NotChecked=0, Total=4290 [2018-08-07 10:55:30,584 INFO L87 Difference]: Start difference. First operand 99 states and 99 transitions. Second operand 34 states. [2018-08-07 10:55:30,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:30,717 INFO L93 Difference]: Finished difference Result 108 states and 108 transitions. [2018-08-07 10:55:30,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-08-07 10:55:30,717 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 98 [2018-08-07 10:55:30,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:30,718 INFO L225 Difference]: With dead ends: 108 [2018-08-07 10:55:30,718 INFO L226 Difference]: Without dead ends: 103 [2018-08-07 10:55:30,719 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 425 GetRequests, 358 SyntacticMatches, 2 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1907, Invalid=2515, Unknown=0, NotChecked=0, Total=4422 [2018-08-07 10:55:30,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-08-07 10:55:30,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 102. [2018-08-07 10:55:30,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-08-07 10:55:30,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 102 transitions. [2018-08-07 10:55:30,723 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 102 transitions. Word has length 98 [2018-08-07 10:55:30,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:30,723 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 102 transitions. [2018-08-07 10:55:30,723 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-08-07 10:55:30,723 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 102 transitions. [2018-08-07 10:55:30,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-08-07 10:55:30,724 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:30,724 INFO L376 BasicCegarLoop]: trace histogram [31, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:30,724 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:30,725 INFO L82 PathProgramCache]: Analyzing trace with hash 1349648176, now seen corresponding path program 30 times [2018-08-07 10:55:30,725 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:30,725 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:30,725 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:30,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:30,726 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:30,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:31,446 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:31,446 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:31,446 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:31,454 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:31,454 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:31,518 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 31 check-sat command(s) [2018-08-07 10:55:31,518 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:31,523 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:31,570 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:31,570 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:32,745 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:32,765 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:32,765 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:32,780 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:32,780 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:33,230 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 31 check-sat command(s) [2018-08-07 10:55:33,231 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:33,236 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:33,283 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:33,283 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:33,303 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 0 proven. 1365 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:33,305 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:33,305 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 68 [2018-08-07 10:55:33,305 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:33,305 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-08-07 10:55:33,306 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-08-07 10:55:33,306 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2026, Invalid=2530, Unknown=0, NotChecked=0, Total=4556 [2018-08-07 10:55:33,306 INFO L87 Difference]: Start difference. First operand 102 states and 102 transitions. Second operand 35 states. [2018-08-07 10:55:33,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:33,425 INFO L93 Difference]: Finished difference Result 111 states and 111 transitions. [2018-08-07 10:55:33,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-08-07 10:55:33,426 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 101 [2018-08-07 10:55:33,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:33,427 INFO L225 Difference]: With dead ends: 111 [2018-08-07 10:55:33,427 INFO L226 Difference]: Without dead ends: 106 [2018-08-07 10:55:33,428 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 438 GetRequests, 369 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=2032, Invalid=2660, Unknown=0, NotChecked=0, Total=4692 [2018-08-07 10:55:33,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-08-07 10:55:33,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 105. [2018-08-07 10:55:33,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-08-07 10:55:33,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 105 transitions. [2018-08-07 10:55:33,432 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 105 transitions. Word has length 101 [2018-08-07 10:55:33,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:33,433 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 105 transitions. [2018-08-07 10:55:33,433 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-08-07 10:55:33,433 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 105 transitions. [2018-08-07 10:55:33,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-08-07 10:55:33,434 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:33,434 INFO L376 BasicCegarLoop]: trace histogram [32, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:33,435 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:33,435 INFO L82 PathProgramCache]: Analyzing trace with hash 731886437, now seen corresponding path program 31 times [2018-08-07 10:55:33,435 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:33,436 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:33,436 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:33,436 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:33,436 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:33,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:34,046 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:34,046 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:34,046 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:34,055 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:34,055 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:34,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:34,112 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:34,179 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:34,179 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:35,704 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:35,725 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:35,726 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:35,740 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:35,740 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:35,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:35,851 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:36,318 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:36,318 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:36,391 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:36,393 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:36,393 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 70 [2018-08-07 10:55:36,394 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:36,394 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-08-07 10:55:36,394 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-08-07 10:55:36,395 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2155, Invalid=2675, Unknown=0, NotChecked=0, Total=4830 [2018-08-07 10:55:36,396 INFO L87 Difference]: Start difference. First operand 105 states and 105 transitions. Second operand 36 states. [2018-08-07 10:55:36,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:36,705 INFO L93 Difference]: Finished difference Result 114 states and 114 transitions. [2018-08-07 10:55:36,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-08-07 10:55:36,706 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 104 [2018-08-07 10:55:36,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:36,707 INFO L225 Difference]: With dead ends: 114 [2018-08-07 10:55:36,707 INFO L226 Difference]: Without dead ends: 109 [2018-08-07 10:55:36,708 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 380 SyntacticMatches, 2 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 316 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=2161, Invalid=2809, Unknown=0, NotChecked=0, Total=4970 [2018-08-07 10:55:36,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-08-07 10:55:36,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 108. [2018-08-07 10:55:36,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-08-07 10:55:36,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 108 transitions. [2018-08-07 10:55:36,712 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 108 transitions. Word has length 104 [2018-08-07 10:55:36,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:36,713 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 108 transitions. [2018-08-07 10:55:36,713 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-08-07 10:55:36,713 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 108 transitions. [2018-08-07 10:55:36,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-08-07 10:55:36,713 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:36,714 INFO L376 BasicCegarLoop]: trace histogram [33, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:36,714 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:36,714 INFO L82 PathProgramCache]: Analyzing trace with hash 926783248, now seen corresponding path program 32 times [2018-08-07 10:55:36,714 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:36,715 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:36,715 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:36,715 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:36,715 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:36,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:37,323 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:37,324 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:37,324 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:37,332 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:37,332 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:37,384 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:37,384 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:37,386 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:37,434 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:37,434 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:38,687 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:38,707 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:38,707 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:38,722 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:38,722 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:38,839 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:38,839 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:38,844 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:39,139 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:39,139 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:39,192 INFO L134 CoverageAnalysis]: Checked inductivity of 1552 backedges. 0 proven. 1552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:39,194 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:39,194 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 72 [2018-08-07 10:55:39,194 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:39,195 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-08-07 10:55:39,195 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-08-07 10:55:39,196 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2288, Invalid=2824, Unknown=0, NotChecked=0, Total=5112 [2018-08-07 10:55:39,197 INFO L87 Difference]: Start difference. First operand 108 states and 108 transitions. Second operand 37 states. [2018-08-07 10:55:39,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:39,321 INFO L93 Difference]: Finished difference Result 117 states and 117 transitions. [2018-08-07 10:55:39,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-08-07 10:55:39,322 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 107 [2018-08-07 10:55:39,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:39,323 INFO L225 Difference]: With dead ends: 117 [2018-08-07 10:55:39,323 INFO L226 Difference]: Without dead ends: 112 [2018-08-07 10:55:39,324 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 464 GetRequests, 391 SyntacticMatches, 2 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 326 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=2294, Invalid=2962, Unknown=0, NotChecked=0, Total=5256 [2018-08-07 10:55:39,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-08-07 10:55:39,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 111. [2018-08-07 10:55:39,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-08-07 10:55:39,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 111 transitions. [2018-08-07 10:55:39,327 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 111 transitions. Word has length 107 [2018-08-07 10:55:39,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:39,327 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 111 transitions. [2018-08-07 10:55:39,327 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-08-07 10:55:39,327 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 111 transitions. [2018-08-07 10:55:39,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-08-07 10:55:39,328 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:39,328 INFO L376 BasicCegarLoop]: trace histogram [34, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:39,328 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:39,328 INFO L82 PathProgramCache]: Analyzing trace with hash 301895557, now seen corresponding path program 33 times [2018-08-07 10:55:39,328 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:39,329 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:39,329 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:39,329 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:39,329 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:39,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:40,712 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:40,713 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:40,713 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:40,720 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:40,720 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:40,912 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 34 check-sat command(s) [2018-08-07 10:55:40,913 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:40,915 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:40,961 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:40,962 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:42,324 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:42,345 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:42,345 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:42,360 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:55:42,360 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:55:42,893 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 34 check-sat command(s) [2018-08-07 10:55:42,893 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:42,899 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:42,938 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:42,939 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:42,967 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:42,968 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:42,969 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 74 [2018-08-07 10:55:42,969 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:42,969 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-08-07 10:55:42,970 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-08-07 10:55:42,970 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2425, Invalid=2977, Unknown=0, NotChecked=0, Total=5402 [2018-08-07 10:55:42,970 INFO L87 Difference]: Start difference. First operand 111 states and 111 transitions. Second operand 38 states. [2018-08-07 10:55:43,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:43,064 INFO L93 Difference]: Finished difference Result 120 states and 120 transitions. [2018-08-07 10:55:43,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-08-07 10:55:43,066 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 110 [2018-08-07 10:55:43,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:43,067 INFO L225 Difference]: With dead ends: 120 [2018-08-07 10:55:43,067 INFO L226 Difference]: Without dead ends: 115 [2018-08-07 10:55:43,067 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 477 GetRequests, 402 SyntacticMatches, 2 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 336 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=2431, Invalid=3119, Unknown=0, NotChecked=0, Total=5550 [2018-08-07 10:55:43,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-08-07 10:55:43,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 114. [2018-08-07 10:55:43,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-08-07 10:55:43,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 114 transitions. [2018-08-07 10:55:43,071 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 114 transitions. Word has length 110 [2018-08-07 10:55:43,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:43,071 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 114 transitions. [2018-08-07 10:55:43,072 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-08-07 10:55:43,072 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 114 transitions. [2018-08-07 10:55:43,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-08-07 10:55:43,072 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:43,073 INFO L376 BasicCegarLoop]: trace histogram [35, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:43,073 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:43,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1339046160, now seen corresponding path program 34 times [2018-08-07 10:55:43,073 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:43,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:43,074 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:43,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:43,074 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:43,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:44,353 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:44,354 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:44,354 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:44,361 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:44,361 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:44,415 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:44,416 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:44,418 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:44,651 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:44,651 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:46,326 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:46,346 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:46,346 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:46,362 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:55:46,362 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:55:46,485 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:55:46,485 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:46,507 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:46,544 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:46,545 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:46,567 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:46,568 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:46,569 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 76 [2018-08-07 10:55:46,569 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:46,569 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-08-07 10:55:46,569 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-08-07 10:55:46,570 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2566, Invalid=3134, Unknown=0, NotChecked=0, Total=5700 [2018-08-07 10:55:46,570 INFO L87 Difference]: Start difference. First operand 114 states and 114 transitions. Second operand 39 states. [2018-08-07 10:55:46,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:46,669 INFO L93 Difference]: Finished difference Result 123 states and 123 transitions. [2018-08-07 10:55:46,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-08-07 10:55:46,670 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 113 [2018-08-07 10:55:46,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:46,671 INFO L225 Difference]: With dead ends: 123 [2018-08-07 10:55:46,671 INFO L226 Difference]: Without dead ends: 118 [2018-08-07 10:55:46,672 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 413 SyntacticMatches, 2 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 346 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=2572, Invalid=3280, Unknown=0, NotChecked=0, Total=5852 [2018-08-07 10:55:46,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-08-07 10:55:46,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 117. [2018-08-07 10:55:46,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-08-07 10:55:46,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 117 transitions. [2018-08-07 10:55:46,675 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 117 transitions. Word has length 113 [2018-08-07 10:55:46,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:46,675 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 117 transitions. [2018-08-07 10:55:46,675 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-08-07 10:55:46,675 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 117 transitions. [2018-08-07 10:55:46,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-08-07 10:55:46,676 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:46,676 INFO L376 BasicCegarLoop]: trace histogram [36, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:46,676 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:46,676 INFO L82 PathProgramCache]: Analyzing trace with hash -1315974235, now seen corresponding path program 35 times [2018-08-07 10:55:46,677 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:46,677 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:46,677 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:46,677 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:46,677 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:46,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:47,490 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:47,490 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:47,490 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:47,497 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:47,497 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:47,702 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 36 check-sat command(s) [2018-08-07 10:55:47,703 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:47,706 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:47,972 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:47,973 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:49,475 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:49,496 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:49,496 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:49,510 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:55:49,511 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:50,075 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 36 check-sat command(s) [2018-08-07 10:55:50,076 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:50,081 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:50,132 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:50,132 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:50,152 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 0 proven. 1855 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:50,154 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:50,154 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 78 [2018-08-07 10:55:50,154 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:50,154 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-08-07 10:55:50,155 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-08-07 10:55:50,156 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2711, Invalid=3295, Unknown=0, NotChecked=0, Total=6006 [2018-08-07 10:55:50,156 INFO L87 Difference]: Start difference. First operand 117 states and 117 transitions. Second operand 40 states. [2018-08-07 10:55:50,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:50,332 INFO L93 Difference]: Finished difference Result 126 states and 126 transitions. [2018-08-07 10:55:50,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-08-07 10:55:50,332 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 116 [2018-08-07 10:55:50,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:50,334 INFO L225 Difference]: With dead ends: 126 [2018-08-07 10:55:50,334 INFO L226 Difference]: Without dead ends: 121 [2018-08-07 10:55:50,335 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 503 GetRequests, 424 SyntacticMatches, 2 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 356 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=2717, Invalid=3445, Unknown=0, NotChecked=0, Total=6162 [2018-08-07 10:55:50,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-08-07 10:55:50,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 120. [2018-08-07 10:55:50,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-08-07 10:55:50,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 120 transitions. [2018-08-07 10:55:50,339 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 120 transitions. Word has length 116 [2018-08-07 10:55:50,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:50,340 INFO L480 AbstractCegarLoop]: Abstraction has 120 states and 120 transitions. [2018-08-07 10:55:50,340 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-08-07 10:55:50,340 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 120 transitions. [2018-08-07 10:55:50,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-08-07 10:55:50,340 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:50,341 INFO L376 BasicCegarLoop]: trace histogram [37, 36, 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:50,341 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:50,341 INFO L82 PathProgramCache]: Analyzing trace with hash -1175023920, now seen corresponding path program 36 times [2018-08-07 10:55:50,341 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:50,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:50,342 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:50,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:50,342 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:50,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:51,118 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:51,119 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:51,119 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:51,126 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:51,126 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:51,202 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 37 check-sat command(s) [2018-08-07 10:55:51,203 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:51,205 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:51,259 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:51,259 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:52,896 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:52,917 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:52,917 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:52,932 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:55:52,932 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:55:53,547 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 37 check-sat command(s) [2018-08-07 10:55:53,547 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:53,553 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:53,659 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:53,659 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:53,732 INFO L134 CoverageAnalysis]: Checked inductivity of 1962 backedges. 0 proven. 1962 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:53,734 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:53,734 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 80 [2018-08-07 10:55:53,734 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:53,735 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-08-07 10:55:53,735 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-08-07 10:55:53,736 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2860, Invalid=3460, Unknown=0, NotChecked=0, Total=6320 [2018-08-07 10:55:53,736 INFO L87 Difference]: Start difference. First operand 120 states and 120 transitions. Second operand 41 states. [2018-08-07 10:55:53,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:53,948 INFO L93 Difference]: Finished difference Result 129 states and 129 transitions. [2018-08-07 10:55:53,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-08-07 10:55:53,949 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 119 [2018-08-07 10:55:53,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:53,950 INFO L225 Difference]: With dead ends: 129 [2018-08-07 10:55:53,950 INFO L226 Difference]: Without dead ends: 124 [2018-08-07 10:55:53,951 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 516 GetRequests, 435 SyntacticMatches, 2 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 366 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=2866, Invalid=3614, Unknown=0, NotChecked=0, Total=6480 [2018-08-07 10:55:53,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-08-07 10:55:53,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 123. [2018-08-07 10:55:53,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-08-07 10:55:53,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 123 transitions. [2018-08-07 10:55:53,955 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 123 transitions. Word has length 119 [2018-08-07 10:55:53,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:53,955 INFO L480 AbstractCegarLoop]: Abstraction has 123 states and 123 transitions. [2018-08-07 10:55:53,955 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-08-07 10:55:53,956 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 123 transitions. [2018-08-07 10:55:53,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-08-07 10:55:53,956 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:53,956 INFO L376 BasicCegarLoop]: trace histogram [38, 37, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:53,957 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:53,957 INFO L82 PathProgramCache]: Analyzing trace with hash 1692762053, now seen corresponding path program 37 times [2018-08-07 10:55:53,957 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:53,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:53,958 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:55:53,958 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:53,958 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:53,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:54,818 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:54,818 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:54,818 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:54,828 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:54,829 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:54,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:54,893 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:54,999 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:55,000 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:57,084 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:57,106 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:57,106 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:55:57,121 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:57,121 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:55:57,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:57,257 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:57,314 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:57,315 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:55:57,336 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:57,337 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:55:57,337 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 82 [2018-08-07 10:55:57,337 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:55:57,338 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-08-07 10:55:57,338 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-08-07 10:55:57,338 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3013, Invalid=3629, Unknown=0, NotChecked=0, Total=6642 [2018-08-07 10:55:57,339 INFO L87 Difference]: Start difference. First operand 123 states and 123 transitions. Second operand 42 states. [2018-08-07 10:55:57,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:55:57,472 INFO L93 Difference]: Finished difference Result 132 states and 132 transitions. [2018-08-07 10:55:57,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-08-07 10:55:57,475 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 122 [2018-08-07 10:55:57,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:55:57,476 INFO L225 Difference]: With dead ends: 132 [2018-08-07 10:55:57,476 INFO L226 Difference]: Without dead ends: 127 [2018-08-07 10:55:57,477 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 529 GetRequests, 446 SyntacticMatches, 2 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 376 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=3019, Invalid=3787, Unknown=0, NotChecked=0, Total=6806 [2018-08-07 10:55:57,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-08-07 10:55:57,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 126. [2018-08-07 10:55:57,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-08-07 10:55:57,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 126 transitions. [2018-08-07 10:55:57,481 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 126 transitions. Word has length 122 [2018-08-07 10:55:57,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:55:57,482 INFO L480 AbstractCegarLoop]: Abstraction has 126 states and 126 transitions. [2018-08-07 10:55:57,482 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-08-07 10:55:57,482 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 126 transitions. [2018-08-07 10:55:57,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-08-07 10:55:57,483 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:55:57,483 INFO L376 BasicCegarLoop]: trace histogram [39, 38, 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:55:57,483 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:55:57,483 INFO L82 PathProgramCache]: Analyzing trace with hash 415231664, now seen corresponding path program 38 times [2018-08-07 10:55:57,484 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:55:57,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:57,484 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:55:57,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:55:57,485 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:55:57,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:55:59,365 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:59,365 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:55:59,366 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:55:59,374 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:55:59,374 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:55:59,437 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:55:59,438 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:55:59,440 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:55:59,513 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:55:59,513 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:01,620 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:01,642 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:01,642 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:01,658 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:56:01,658 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:01,795 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:56:01,795 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:01,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:01,860 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:01,860 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:01,882 INFO L134 CoverageAnalysis]: Checked inductivity of 2185 backedges. 0 proven. 2185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:01,883 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:01,884 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43, 43, 43] total 84 [2018-08-07 10:56:01,884 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:01,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-08-07 10:56:01,884 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-08-07 10:56:01,885 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3170, Invalid=3802, Unknown=0, NotChecked=0, Total=6972 [2018-08-07 10:56:01,885 INFO L87 Difference]: Start difference. First operand 126 states and 126 transitions. Second operand 43 states. [2018-08-07 10:56:02,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:02,135 INFO L93 Difference]: Finished difference Result 135 states and 135 transitions. [2018-08-07 10:56:02,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-08-07 10:56:02,135 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 125 [2018-08-07 10:56:02,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:02,137 INFO L225 Difference]: With dead ends: 135 [2018-08-07 10:56:02,137 INFO L226 Difference]: Without dead ends: 130 [2018-08-07 10:56:02,138 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 542 GetRequests, 457 SyntacticMatches, 2 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 386 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=3176, Invalid=3964, Unknown=0, NotChecked=0, Total=7140 [2018-08-07 10:56:02,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-08-07 10:56:02,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 129. [2018-08-07 10:56:02,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-08-07 10:56:02,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 129 transitions. [2018-08-07 10:56:02,143 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 129 transitions. Word has length 125 [2018-08-07 10:56:02,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:02,143 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 129 transitions. [2018-08-07 10:56:02,143 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-08-07 10:56:02,143 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 129 transitions. [2018-08-07 10:56:02,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-08-07 10:56:02,144 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:02,144 INFO L376 BasicCegarLoop]: trace histogram [40, 39, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:02,144 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:02,145 INFO L82 PathProgramCache]: Analyzing trace with hash -787377179, now seen corresponding path program 39 times [2018-08-07 10:56:02,145 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:02,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:02,145 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:02,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:02,146 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:02,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:03,114 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:03,114 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:03,114 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:03,122 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:56:03,122 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:56:03,208 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 40 check-sat command(s) [2018-08-07 10:56:03,208 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:03,211 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:03,263 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:03,263 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:05,231 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:05,251 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:05,251 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:05,266 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:56:05,266 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:56:05,970 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 40 check-sat command(s) [2018-08-07 10:56:05,971 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:05,979 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:06,056 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:06,056 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:06,079 INFO L134 CoverageAnalysis]: Checked inductivity of 2301 backedges. 0 proven. 2301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:06,081 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:06,081 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44, 44, 44, 44] total 86 [2018-08-07 10:56:06,081 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:06,082 INFO L459 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-08-07 10:56:06,082 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-08-07 10:56:06,082 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3331, Invalid=3979, Unknown=0, NotChecked=0, Total=7310 [2018-08-07 10:56:06,083 INFO L87 Difference]: Start difference. First operand 129 states and 129 transitions. Second operand 44 states. [2018-08-07 10:56:06,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:06,266 INFO L93 Difference]: Finished difference Result 138 states and 138 transitions. [2018-08-07 10:56:06,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-08-07 10:56:06,266 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 128 [2018-08-07 10:56:06,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:06,267 INFO L225 Difference]: With dead ends: 138 [2018-08-07 10:56:06,267 INFO L226 Difference]: Without dead ends: 133 [2018-08-07 10:56:06,268 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 555 GetRequests, 468 SyntacticMatches, 2 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 396 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=3337, Invalid=4145, Unknown=0, NotChecked=0, Total=7482 [2018-08-07 10:56:06,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-08-07 10:56:06,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 132. [2018-08-07 10:56:06,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-08-07 10:56:06,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 132 transitions. [2018-08-07 10:56:06,273 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 132 transitions. Word has length 128 [2018-08-07 10:56:06,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:06,273 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 132 transitions. [2018-08-07 10:56:06,273 INFO L481 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-08-07 10:56:06,274 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 132 transitions. [2018-08-07 10:56:06,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-08-07 10:56:06,274 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:06,274 INFO L376 BasicCegarLoop]: trace histogram [41, 40, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:06,275 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:06,275 INFO L82 PathProgramCache]: Analyzing trace with hash 909764240, now seen corresponding path program 40 times [2018-08-07 10:56:06,275 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:06,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:06,276 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:06,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:06,276 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:06,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:08,599 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:08,599 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:08,599 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:08,606 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:56:08,606 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:56:08,669 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:56:08,669 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:08,672 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:08,830 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:08,831 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:11,140 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:11,160 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:11,161 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:11,175 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:56:11,175 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:56:11,314 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:56:11,314 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:11,321 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:11,377 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:11,377 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:11,405 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:11,406 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:11,407 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45, 45, 45, 45] total 88 [2018-08-07 10:56:11,407 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:11,407 INFO L459 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-08-07 10:56:11,407 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-08-07 10:56:11,408 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3496, Invalid=4160, Unknown=0, NotChecked=0, Total=7656 [2018-08-07 10:56:11,408 INFO L87 Difference]: Start difference. First operand 132 states and 132 transitions. Second operand 45 states. [2018-08-07 10:56:11,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:11,517 INFO L93 Difference]: Finished difference Result 141 states and 141 transitions. [2018-08-07 10:56:11,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-08-07 10:56:11,518 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 131 [2018-08-07 10:56:11,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:11,520 INFO L225 Difference]: With dead ends: 141 [2018-08-07 10:56:11,520 INFO L226 Difference]: Without dead ends: 136 [2018-08-07 10:56:11,520 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 568 GetRequests, 479 SyntacticMatches, 2 SemanticMatches, 87 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 406 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=3502, Invalid=4330, Unknown=0, NotChecked=0, Total=7832 [2018-08-07 10:56:11,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-08-07 10:56:11,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 135. [2018-08-07 10:56:11,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-08-07 10:56:11,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 135 transitions. [2018-08-07 10:56:11,524 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 135 transitions. Word has length 131 [2018-08-07 10:56:11,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:11,525 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 135 transitions. [2018-08-07 10:56:11,525 INFO L481 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-08-07 10:56:11,525 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 135 transitions. [2018-08-07 10:56:11,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-08-07 10:56:11,526 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:11,526 INFO L376 BasicCegarLoop]: trace histogram [42, 41, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:11,526 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:11,527 INFO L82 PathProgramCache]: Analyzing trace with hash 94769157, now seen corresponding path program 41 times [2018-08-07 10:56:11,527 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:11,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:11,528 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:11,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:11,528 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:11,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:13,572 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:13,573 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:13,573 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:13,582 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:56:13,582 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:13,673 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 42 check-sat command(s) [2018-08-07 10:56:13,674 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:13,678 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:13,734 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:13,734 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:16,139 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:16,160 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:16,161 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:16,175 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:56:16,176 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:16,934 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 42 check-sat command(s) [2018-08-07 10:56:16,935 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:16,942 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:16,977 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:16,977 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:17,007 INFO L134 CoverageAnalysis]: Checked inductivity of 2542 backedges. 0 proven. 2542 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:17,008 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:17,009 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46, 46, 46, 46] total 90 [2018-08-07 10:56:17,009 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:17,009 INFO L459 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-08-07 10:56:17,010 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-08-07 10:56:17,010 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3665, Invalid=4345, Unknown=0, NotChecked=0, Total=8010 [2018-08-07 10:56:17,011 INFO L87 Difference]: Start difference. First operand 135 states and 135 transitions. Second operand 46 states. [2018-08-07 10:56:17,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:17,519 INFO L93 Difference]: Finished difference Result 144 states and 144 transitions. [2018-08-07 10:56:17,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-08-07 10:56:17,520 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 134 [2018-08-07 10:56:17,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:17,521 INFO L225 Difference]: With dead ends: 144 [2018-08-07 10:56:17,521 INFO L226 Difference]: Without dead ends: 139 [2018-08-07 10:56:17,522 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 581 GetRequests, 490 SyntacticMatches, 2 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 416 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=3671, Invalid=4519, Unknown=0, NotChecked=0, Total=8190 [2018-08-07 10:56:17,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-08-07 10:56:17,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 138. [2018-08-07 10:56:17,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-08-07 10:56:17,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 138 transitions. [2018-08-07 10:56:17,529 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 138 transitions. Word has length 134 [2018-08-07 10:56:17,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:17,529 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 138 transitions. [2018-08-07 10:56:17,529 INFO L481 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-08-07 10:56:17,530 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 138 transitions. [2018-08-07 10:56:17,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-08-07 10:56:17,530 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:17,530 INFO L376 BasicCegarLoop]: trace histogram [43, 42, 42, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:17,531 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:17,531 INFO L82 PathProgramCache]: Analyzing trace with hash 26375792, now seen corresponding path program 42 times [2018-08-07 10:56:17,531 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:17,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:17,532 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:17,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:17,532 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:17,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:18,388 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:18,388 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:18,388 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:18,396 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:56:18,397 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:56:18,491 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2018-08-07 10:56:18,491 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:18,494 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:18,557 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:18,557 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:20,657 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:20,678 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:20,678 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:20,692 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:56:20,693 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:56:21,500 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2018-08-07 10:56:21,501 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:21,507 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:21,567 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:21,567 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:21,587 INFO L134 CoverageAnalysis]: Checked inductivity of 2667 backedges. 0 proven. 2667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:21,589 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:21,589 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47, 47, 47] total 92 [2018-08-07 10:56:21,589 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:21,590 INFO L459 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-08-07 10:56:21,590 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-08-07 10:56:21,591 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3838, Invalid=4534, Unknown=0, NotChecked=0, Total=8372 [2018-08-07 10:56:21,591 INFO L87 Difference]: Start difference. First operand 138 states and 138 transitions. Second operand 47 states. [2018-08-07 10:56:21,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:21,721 INFO L93 Difference]: Finished difference Result 147 states and 147 transitions. [2018-08-07 10:56:21,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-08-07 10:56:21,721 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 137 [2018-08-07 10:56:21,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:21,722 INFO L225 Difference]: With dead ends: 147 [2018-08-07 10:56:21,722 INFO L226 Difference]: Without dead ends: 142 [2018-08-07 10:56:21,723 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 594 GetRequests, 501 SyntacticMatches, 2 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 426 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=3844, Invalid=4712, Unknown=0, NotChecked=0, Total=8556 [2018-08-07 10:56:21,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-08-07 10:56:21,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 141. [2018-08-07 10:56:21,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-08-07 10:56:21,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 141 transitions. [2018-08-07 10:56:21,727 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 141 transitions. Word has length 137 [2018-08-07 10:56:21,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:21,728 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 141 transitions. [2018-08-07 10:56:21,728 INFO L481 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-08-07 10:56:21,728 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 141 transitions. [2018-08-07 10:56:21,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-08-07 10:56:21,728 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:21,729 INFO L376 BasicCegarLoop]: trace histogram [44, 43, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:21,729 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:21,729 INFO L82 PathProgramCache]: Analyzing trace with hash -1665862619, now seen corresponding path program 43 times [2018-08-07 10:56:21,729 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:21,730 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:21,730 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:21,730 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:21,730 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:21,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:22,679 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:22,680 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:22,680 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:22,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:22,688 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:56:22,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:22,761 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:22,816 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:22,816 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:24,974 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:24,994 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:24,994 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:25,010 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:25,010 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:56:25,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:25,158 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:25,241 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:25,241 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:25,267 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:25,269 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:25,269 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48, 48, 48] total 94 [2018-08-07 10:56:25,269 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:25,270 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-08-07 10:56:25,270 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-08-07 10:56:25,270 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4015, Invalid=4727, Unknown=0, NotChecked=0, Total=8742 [2018-08-07 10:56:25,271 INFO L87 Difference]: Start difference. First operand 141 states and 141 transitions. Second operand 48 states. [2018-08-07 10:56:25,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:25,386 INFO L93 Difference]: Finished difference Result 150 states and 150 transitions. [2018-08-07 10:56:25,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-08-07 10:56:25,386 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 140 [2018-08-07 10:56:25,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:25,388 INFO L225 Difference]: With dead ends: 150 [2018-08-07 10:56:25,388 INFO L226 Difference]: Without dead ends: 145 [2018-08-07 10:56:25,388 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 607 GetRequests, 512 SyntacticMatches, 2 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 436 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=4021, Invalid=4909, Unknown=0, NotChecked=0, Total=8930 [2018-08-07 10:56:25,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-08-07 10:56:25,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 144. [2018-08-07 10:56:25,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-08-07 10:56:25,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 144 transitions. [2018-08-07 10:56:25,392 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 144 transitions. Word has length 140 [2018-08-07 10:56:25,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:25,393 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 144 transitions. [2018-08-07 10:56:25,393 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-08-07 10:56:25,393 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 144 transitions. [2018-08-07 10:56:25,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-08-07 10:56:25,394 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:25,394 INFO L376 BasicCegarLoop]: trace histogram [45, 44, 44, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:25,394 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:25,394 INFO L82 PathProgramCache]: Analyzing trace with hash -814244272, now seen corresponding path program 44 times [2018-08-07 10:56:25,394 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:25,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:25,395 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:25,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:25,395 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:25,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:27,953 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:27,954 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:27,954 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:27,962 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:56:27,962 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:28,033 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:56:28,034 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:28,037 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:28,090 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:28,090 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:30,369 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:30,389 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:30,389 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:30,404 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:56:30,405 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:30,548 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:56:30,548 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:30,555 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:30,600 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:30,601 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:30,624 INFO L134 CoverageAnalysis]: Checked inductivity of 2926 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:30,626 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:30,626 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49, 49, 49] total 96 [2018-08-07 10:56:30,626 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:30,626 INFO L459 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-08-07 10:56:30,627 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-08-07 10:56:30,627 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4196, Invalid=4924, Unknown=0, NotChecked=0, Total=9120 [2018-08-07 10:56:30,627 INFO L87 Difference]: Start difference. First operand 144 states and 144 transitions. Second operand 49 states. [2018-08-07 10:56:30,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:30,735 INFO L93 Difference]: Finished difference Result 153 states and 153 transitions. [2018-08-07 10:56:30,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-08-07 10:56:30,736 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 143 [2018-08-07 10:56:30,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:30,738 INFO L225 Difference]: With dead ends: 153 [2018-08-07 10:56:30,738 INFO L226 Difference]: Without dead ends: 148 [2018-08-07 10:56:30,739 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 620 GetRequests, 523 SyntacticMatches, 2 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 446 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=4202, Invalid=5110, Unknown=0, NotChecked=0, Total=9312 [2018-08-07 10:56:30,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-08-07 10:56:30,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 147. [2018-08-07 10:56:30,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-08-07 10:56:30,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 147 transitions. [2018-08-07 10:56:30,743 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 147 transitions. Word has length 143 [2018-08-07 10:56:30,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:30,743 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 147 transitions. [2018-08-07 10:56:30,744 INFO L481 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-08-07 10:56:30,744 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 147 transitions. [2018-08-07 10:56:30,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-08-07 10:56:30,744 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:30,745 INFO L376 BasicCegarLoop]: trace histogram [46, 45, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:30,745 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:30,745 INFO L82 PathProgramCache]: Analyzing trace with hash -623886267, now seen corresponding path program 45 times [2018-08-07 10:56:30,745 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:30,746 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:30,746 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:30,746 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:30,746 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:30,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:32,159 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:32,159 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:32,159 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:32,171 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:56:32,172 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:56:32,275 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 46 check-sat command(s) [2018-08-07 10:56:32,275 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:32,278 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:32,338 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:32,338 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:34,723 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:34,745 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:34,745 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:34,760 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:56:34,760 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:56:35,702 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 46 check-sat command(s) [2018-08-07 10:56:35,702 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:35,710 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:35,773 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:35,773 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:35,800 INFO L134 CoverageAnalysis]: Checked inductivity of 3060 backedges. 0 proven. 3060 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:35,802 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:35,802 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 98 [2018-08-07 10:56:35,802 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:35,803 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-08-07 10:56:35,803 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-08-07 10:56:35,804 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4381, Invalid=5125, Unknown=0, NotChecked=0, Total=9506 [2018-08-07 10:56:35,804 INFO L87 Difference]: Start difference. First operand 147 states and 147 transitions. Second operand 50 states. [2018-08-07 10:56:35,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:35,918 INFO L93 Difference]: Finished difference Result 156 states and 156 transitions. [2018-08-07 10:56:35,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-08-07 10:56:35,919 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 146 [2018-08-07 10:56:35,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:35,920 INFO L225 Difference]: With dead ends: 156 [2018-08-07 10:56:35,920 INFO L226 Difference]: Without dead ends: 151 [2018-08-07 10:56:35,921 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 633 GetRequests, 534 SyntacticMatches, 2 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 456 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=4387, Invalid=5315, Unknown=0, NotChecked=0, Total=9702 [2018-08-07 10:56:35,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-08-07 10:56:35,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 150. [2018-08-07 10:56:35,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-08-07 10:56:35,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 150 transitions. [2018-08-07 10:56:35,925 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 150 transitions. Word has length 146 [2018-08-07 10:56:35,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:35,926 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 150 transitions. [2018-08-07 10:56:35,926 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-08-07 10:56:35,926 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 150 transitions. [2018-08-07 10:56:35,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-08-07 10:56:35,927 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:35,927 INFO L376 BasicCegarLoop]: trace histogram [47, 46, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:35,927 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:35,927 INFO L82 PathProgramCache]: Analyzing trace with hash 974609968, now seen corresponding path program 46 times [2018-08-07 10:56:35,928 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:35,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:35,928 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:35,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:35,929 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:35,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:37,280 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:37,281 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:37,281 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:37,290 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:56:37,290 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:56:37,367 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:56:37,367 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:37,370 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:37,437 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:37,437 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:39,964 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:39,985 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:39,985 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:40,000 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:56:40,000 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:56:40,160 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:56:40,160 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:40,168 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:40,228 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:40,228 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:40,258 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:40,260 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:40,260 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 51, 51, 51, 51] total 100 [2018-08-07 10:56:40,260 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:40,261 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-08-07 10:56:40,261 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-08-07 10:56:40,261 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4570, Invalid=5330, Unknown=0, NotChecked=0, Total=9900 [2018-08-07 10:56:40,261 INFO L87 Difference]: Start difference. First operand 150 states and 150 transitions. Second operand 51 states. [2018-08-07 10:56:40,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:40,375 INFO L93 Difference]: Finished difference Result 159 states and 159 transitions. [2018-08-07 10:56:40,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-08-07 10:56:40,375 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 149 [2018-08-07 10:56:40,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:40,377 INFO L225 Difference]: With dead ends: 159 [2018-08-07 10:56:40,377 INFO L226 Difference]: Without dead ends: 154 [2018-08-07 10:56:40,378 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 646 GetRequests, 545 SyntacticMatches, 2 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 466 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=4576, Invalid=5524, Unknown=0, NotChecked=0, Total=10100 [2018-08-07 10:56:40,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-08-07 10:56:40,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 153. [2018-08-07 10:56:40,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-08-07 10:56:40,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 153 transitions. [2018-08-07 10:56:40,382 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 153 transitions. Word has length 149 [2018-08-07 10:56:40,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:40,383 INFO L480 AbstractCegarLoop]: Abstraction has 153 states and 153 transitions. [2018-08-07 10:56:40,383 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-08-07 10:56:40,383 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 153 transitions. [2018-08-07 10:56:40,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-08-07 10:56:40,384 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:40,384 INFO L376 BasicCegarLoop]: trace histogram [48, 47, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:40,384 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:40,384 INFO L82 PathProgramCache]: Analyzing trace with hash -821431195, now seen corresponding path program 47 times [2018-08-07 10:56:40,384 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:40,385 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:40,385 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:40,385 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:40,385 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:40,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:41,847 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:41,847 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:41,848 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:41,854 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:56:41,854 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:41,965 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 48 check-sat command(s) [2018-08-07 10:56:41,966 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:41,969 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:42,033 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:42,034 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:44,625 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:44,648 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:44,648 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:44,662 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:56:44,663 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:45,606 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 48 check-sat command(s) [2018-08-07 10:56:45,606 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:45,615 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:45,671 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:45,671 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:45,700 INFO L134 CoverageAnalysis]: Checked inductivity of 3337 backedges. 0 proven. 3337 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:45,701 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:45,702 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52, 52, 52, 52] total 102 [2018-08-07 10:56:45,702 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:45,702 INFO L459 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-08-07 10:56:45,702 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-08-07 10:56:45,703 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4763, Invalid=5539, Unknown=0, NotChecked=0, Total=10302 [2018-08-07 10:56:45,703 INFO L87 Difference]: Start difference. First operand 153 states and 153 transitions. Second operand 52 states. [2018-08-07 10:56:45,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:45,816 INFO L93 Difference]: Finished difference Result 162 states and 162 transitions. [2018-08-07 10:56:45,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-08-07 10:56:45,817 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 152 [2018-08-07 10:56:45,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:45,818 INFO L225 Difference]: With dead ends: 162 [2018-08-07 10:56:45,819 INFO L226 Difference]: Without dead ends: 157 [2018-08-07 10:56:45,820 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 659 GetRequests, 556 SyntacticMatches, 2 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 476 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=4769, Invalid=5737, Unknown=0, NotChecked=0, Total=10506 [2018-08-07 10:56:45,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-08-07 10:56:45,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 156. [2018-08-07 10:56:45,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-08-07 10:56:45,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 156 transitions. [2018-08-07 10:56:45,824 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 156 transitions. Word has length 152 [2018-08-07 10:56:45,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:45,824 INFO L480 AbstractCegarLoop]: Abstraction has 156 states and 156 transitions. [2018-08-07 10:56:45,824 INFO L481 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-08-07 10:56:45,825 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 156 transitions. [2018-08-07 10:56:45,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-08-07 10:56:45,825 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:45,826 INFO L376 BasicCegarLoop]: trace histogram [49, 48, 48, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:45,826 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:45,826 INFO L82 PathProgramCache]: Analyzing trace with hash 18855440, now seen corresponding path program 48 times [2018-08-07 10:56:45,826 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:45,827 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:45,827 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:45,827 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:45,827 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:45,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:47,193 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:47,193 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:47,193 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:47,200 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:56:47,200 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:56:47,313 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 49 check-sat command(s) [2018-08-07 10:56:47,313 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:47,316 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:47,378 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:47,378 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:50,078 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:50,100 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:50,100 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:50,114 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:56:50,115 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:56:51,175 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 49 check-sat command(s) [2018-08-07 10:56:51,175 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:51,184 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:51,254 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:51,254 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:51,284 INFO L134 CoverageAnalysis]: Checked inductivity of 3480 backedges. 0 proven. 3480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:51,286 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:51,286 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53, 53, 53, 53] total 104 [2018-08-07 10:56:51,286 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:51,286 INFO L459 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-08-07 10:56:51,287 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-08-07 10:56:51,287 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4960, Invalid=5752, Unknown=0, NotChecked=0, Total=10712 [2018-08-07 10:56:51,287 INFO L87 Difference]: Start difference. First operand 156 states and 156 transitions. Second operand 53 states. [2018-08-07 10:56:51,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:51,451 INFO L93 Difference]: Finished difference Result 165 states and 165 transitions. [2018-08-07 10:56:51,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-08-07 10:56:51,451 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 155 [2018-08-07 10:56:51,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:51,452 INFO L225 Difference]: With dead ends: 165 [2018-08-07 10:56:51,452 INFO L226 Difference]: Without dead ends: 160 [2018-08-07 10:56:51,453 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 672 GetRequests, 567 SyntacticMatches, 2 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 486 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=4966, Invalid=5954, Unknown=0, NotChecked=0, Total=10920 [2018-08-07 10:56:51,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-08-07 10:56:51,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 159. [2018-08-07 10:56:51,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-08-07 10:56:51,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 159 transitions. [2018-08-07 10:56:51,457 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 159 transitions. Word has length 155 [2018-08-07 10:56:51,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:51,458 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 159 transitions. [2018-08-07 10:56:51,458 INFO L481 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-08-07 10:56:51,458 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 159 transitions. [2018-08-07 10:56:51,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2018-08-07 10:56:51,459 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:51,459 INFO L376 BasicCegarLoop]: trace histogram [50, 49, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:51,459 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:51,460 INFO L82 PathProgramCache]: Analyzing trace with hash 1928597637, now seen corresponding path program 49 times [2018-08-07 10:56:51,460 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:51,460 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:51,460 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:56:51,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:51,461 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:51,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:52,766 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:52,767 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:52,767 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:52,774 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:52,774 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:56:52,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:52,859 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:52,943 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:52,943 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:55,694 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:55,716 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:55,716 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:56:55,731 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:55,731 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:56:55,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:55,907 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:55,977 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:55,977 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:56:56,009 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:56,011 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:56:56,011 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54, 54, 54, 54] total 106 [2018-08-07 10:56:56,011 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:56:56,012 INFO L459 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-08-07 10:56:56,013 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-08-07 10:56:56,013 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5161, Invalid=5969, Unknown=0, NotChecked=0, Total=11130 [2018-08-07 10:56:56,014 INFO L87 Difference]: Start difference. First operand 159 states and 159 transitions. Second operand 54 states. [2018-08-07 10:56:56,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:56:56,163 INFO L93 Difference]: Finished difference Result 168 states and 168 transitions. [2018-08-07 10:56:56,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-08-07 10:56:56,164 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 158 [2018-08-07 10:56:56,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:56:56,165 INFO L225 Difference]: With dead ends: 168 [2018-08-07 10:56:56,165 INFO L226 Difference]: Without dead ends: 163 [2018-08-07 10:56:56,166 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 685 GetRequests, 578 SyntacticMatches, 2 SemanticMatches, 105 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 496 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=5167, Invalid=6175, Unknown=0, NotChecked=0, Total=11342 [2018-08-07 10:56:56,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-08-07 10:56:56,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 162. [2018-08-07 10:56:56,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-08-07 10:56:56,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 162 transitions. [2018-08-07 10:56:56,169 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 162 transitions. Word has length 158 [2018-08-07 10:56:56,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:56:56,170 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 162 transitions. [2018-08-07 10:56:56,170 INFO L481 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-08-07 10:56:56,170 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 162 transitions. [2018-08-07 10:56:56,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2018-08-07 10:56:56,171 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:56:56,171 INFO L376 BasicCegarLoop]: trace histogram [51, 50, 50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:56:56,171 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:56:56,171 INFO L82 PathProgramCache]: Analyzing trace with hash -373381648, now seen corresponding path program 50 times [2018-08-07 10:56:56,171 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:56:56,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:56,172 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:56:56,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:56:56,172 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:56:56,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:56:57,636 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 0 proven. 3775 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:57,637 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:56:57,637 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:56:57,644 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:56:57,645 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:56:57,727 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:56:57,728 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:56:57,731 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:56:57,807 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 0 proven. 3775 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:56:57,807 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:00,838 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 0 proven. 3775 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:00,859 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:00,859 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:00,874 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:57:00,874 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:01,052 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:57:01,052 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:01,060 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:01,125 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 0 proven. 3775 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:01,125 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:01,160 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 0 proven. 3775 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:01,162 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:01,162 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 55, 55, 55, 55] total 108 [2018-08-07 10:57:01,162 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:01,162 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-08-07 10:57:01,163 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-08-07 10:57:01,163 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5366, Invalid=6190, Unknown=0, NotChecked=0, Total=11556 [2018-08-07 10:57:01,163 INFO L87 Difference]: Start difference. First operand 162 states and 162 transitions. Second operand 55 states. [2018-08-07 10:57:01,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:01,308 INFO L93 Difference]: Finished difference Result 171 states and 171 transitions. [2018-08-07 10:57:01,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-08-07 10:57:01,308 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 161 [2018-08-07 10:57:01,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:01,309 INFO L225 Difference]: With dead ends: 171 [2018-08-07 10:57:01,309 INFO L226 Difference]: Without dead ends: 166 [2018-08-07 10:57:01,309 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 698 GetRequests, 589 SyntacticMatches, 2 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 506 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=5372, Invalid=6400, Unknown=0, NotChecked=0, Total=11772 [2018-08-07 10:57:01,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-08-07 10:57:01,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 165. [2018-08-07 10:57:01,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-08-07 10:57:01,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 165 transitions. [2018-08-07 10:57:01,313 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 165 transitions. Word has length 161 [2018-08-07 10:57:01,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:01,313 INFO L480 AbstractCegarLoop]: Abstraction has 165 states and 165 transitions. [2018-08-07 10:57:01,314 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-08-07 10:57:01,314 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 165 transitions. [2018-08-07 10:57:01,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-08-07 10:57:01,315 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:01,315 INFO L376 BasicCegarLoop]: trace histogram [52, 51, 51, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:01,315 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:01,315 INFO L82 PathProgramCache]: Analyzing trace with hash -895445851, now seen corresponding path program 51 times [2018-08-07 10:57:01,315 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:01,316 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:01,316 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:01,316 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:01,316 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:01,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:02,734 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 0 proven. 3927 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:02,734 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:02,734 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:02,741 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:57:02,742 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:57:02,870 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 52 check-sat command(s) [2018-08-07 10:57:02,871 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:02,874 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:02,968 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 0 proven. 3927 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:02,969 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:05,975 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 0 proven. 3927 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:05,996 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:05,996 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:06,011 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:57:06,011 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:57:07,143 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 52 check-sat command(s) [2018-08-07 10:57:07,143 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:07,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:07,266 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 0 proven. 3927 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:07,266 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:07,327 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 0 proven. 3927 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:07,329 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:07,329 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56, 56, 56, 56] total 110 [2018-08-07 10:57:07,329 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:07,330 INFO L459 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-08-07 10:57:07,330 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-08-07 10:57:07,331 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5575, Invalid=6415, Unknown=0, NotChecked=0, Total=11990 [2018-08-07 10:57:07,331 INFO L87 Difference]: Start difference. First operand 165 states and 165 transitions. Second operand 56 states. [2018-08-07 10:57:07,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:07,476 INFO L93 Difference]: Finished difference Result 174 states and 174 transitions. [2018-08-07 10:57:07,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-08-07 10:57:07,477 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 164 [2018-08-07 10:57:07,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:07,478 INFO L225 Difference]: With dead ends: 174 [2018-08-07 10:57:07,478 INFO L226 Difference]: Without dead ends: 169 [2018-08-07 10:57:07,479 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 711 GetRequests, 600 SyntacticMatches, 2 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 516 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=5581, Invalid=6629, Unknown=0, NotChecked=0, Total=12210 [2018-08-07 10:57:07,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-08-07 10:57:07,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 168. [2018-08-07 10:57:07,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-08-07 10:57:07,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 168 transitions. [2018-08-07 10:57:07,483 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 168 transitions. Word has length 164 [2018-08-07 10:57:07,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:07,484 INFO L480 AbstractCegarLoop]: Abstraction has 168 states and 168 transitions. [2018-08-07 10:57:07,484 INFO L481 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-08-07 10:57:07,484 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 168 transitions. [2018-08-07 10:57:07,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-08-07 10:57:07,484 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:07,484 INFO L376 BasicCegarLoop]: trace histogram [53, 52, 52, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:07,485 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:07,485 INFO L82 PathProgramCache]: Analyzing trace with hash -1633538608, now seen corresponding path program 52 times [2018-08-07 10:57:07,485 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:07,485 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:07,485 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:07,485 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:07,486 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:07,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:08,665 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:08,665 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:08,665 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:08,672 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:57:08,672 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:57:08,753 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:57:08,753 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:08,757 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:08,830 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:08,831 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:11,915 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:11,941 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:11,941 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:11,956 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:57:11,956 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:57:12,137 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:57:12,137 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:12,145 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:12,249 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:12,249 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:12,297 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:12,298 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:12,299 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 57, 57, 57, 57] total 112 [2018-08-07 10:57:12,299 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:12,299 INFO L459 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-08-07 10:57:12,299 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-08-07 10:57:12,300 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5788, Invalid=6644, Unknown=0, NotChecked=0, Total=12432 [2018-08-07 10:57:12,300 INFO L87 Difference]: Start difference. First operand 168 states and 168 transitions. Second operand 57 states. [2018-08-07 10:57:12,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:12,446 INFO L93 Difference]: Finished difference Result 177 states and 177 transitions. [2018-08-07 10:57:12,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-08-07 10:57:12,447 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 167 [2018-08-07 10:57:12,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:12,448 INFO L225 Difference]: With dead ends: 177 [2018-08-07 10:57:12,448 INFO L226 Difference]: Without dead ends: 172 [2018-08-07 10:57:12,448 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 724 GetRequests, 611 SyntacticMatches, 2 SemanticMatches, 111 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 526 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=5794, Invalid=6862, Unknown=0, NotChecked=0, Total=12656 [2018-08-07 10:57:12,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-08-07 10:57:12,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 171. [2018-08-07 10:57:12,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-08-07 10:57:12,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 171 transitions. [2018-08-07 10:57:12,451 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 171 transitions. Word has length 167 [2018-08-07 10:57:12,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:12,452 INFO L480 AbstractCegarLoop]: Abstraction has 171 states and 171 transitions. [2018-08-07 10:57:12,452 INFO L481 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-08-07 10:57:12,452 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 171 transitions. [2018-08-07 10:57:12,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-08-07 10:57:12,452 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:12,453 INFO L376 BasicCegarLoop]: trace histogram [54, 53, 53, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:12,453 INFO L423 AbstractCegarLoop]: === Iteration 55 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:12,453 INFO L82 PathProgramCache]: Analyzing trace with hash 77693125, now seen corresponding path program 53 times [2018-08-07 10:57:12,453 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:12,454 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:12,454 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:12,454 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:12,454 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:12,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:13,689 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 0 proven. 4240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:13,690 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:13,690 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:13,697 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:57:13,697 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:13,821 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 54 check-sat command(s) [2018-08-07 10:57:13,821 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:13,825 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:13,893 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 0 proven. 4240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:13,893 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:17,546 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 0 proven. 4240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:17,568 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:17,568 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:17,583 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:57:17,583 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:18,789 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 54 check-sat command(s) [2018-08-07 10:57:18,789 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:18,799 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:18,859 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 0 proven. 4240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:18,859 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:18,908 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 0 proven. 4240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:18,910 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:18,910 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58, 58, 58, 58] total 114 [2018-08-07 10:57:18,910 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:18,911 INFO L459 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-08-07 10:57:18,912 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-08-07 10:57:18,912 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6005, Invalid=6877, Unknown=0, NotChecked=0, Total=12882 [2018-08-07 10:57:18,913 INFO L87 Difference]: Start difference. First operand 171 states and 171 transitions. Second operand 58 states. [2018-08-07 10:57:19,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:19,077 INFO L93 Difference]: Finished difference Result 180 states and 180 transitions. [2018-08-07 10:57:19,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-08-07 10:57:19,078 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 170 [2018-08-07 10:57:19,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:19,079 INFO L225 Difference]: With dead ends: 180 [2018-08-07 10:57:19,079 INFO L226 Difference]: Without dead ends: 175 [2018-08-07 10:57:19,080 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 737 GetRequests, 622 SyntacticMatches, 2 SemanticMatches, 113 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 536 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=6011, Invalid=7099, Unknown=0, NotChecked=0, Total=13110 [2018-08-07 10:57:19,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-08-07 10:57:19,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 174. [2018-08-07 10:57:19,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-08-07 10:57:19,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 174 transitions. [2018-08-07 10:57:19,085 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 174 transitions. Word has length 170 [2018-08-07 10:57:19,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:19,085 INFO L480 AbstractCegarLoop]: Abstraction has 174 states and 174 transitions. [2018-08-07 10:57:19,085 INFO L481 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-08-07 10:57:19,085 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 174 transitions. [2018-08-07 10:57:19,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-08-07 10:57:19,086 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:19,087 INFO L376 BasicCegarLoop]: trace histogram [55, 54, 54, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:19,087 INFO L423 AbstractCegarLoop]: === Iteration 56 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:19,087 INFO L82 PathProgramCache]: Analyzing trace with hash -1879552592, now seen corresponding path program 54 times [2018-08-07 10:57:19,087 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:19,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:19,088 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:19,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:19,088 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:19,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:20,739 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 0 proven. 4401 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:20,739 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:20,739 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:20,746 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:57:20,746 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:57:20,870 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 55 check-sat command(s) [2018-08-07 10:57:20,870 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:20,874 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:20,939 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 0 proven. 4401 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:20,939 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:24,643 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 0 proven. 4401 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:24,664 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:24,664 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:24,679 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:57:24,679 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:57:25,939 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 55 check-sat command(s) [2018-08-07 10:57:25,939 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:25,947 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:26,017 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 0 proven. 4401 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:26,017 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:26,054 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 0 proven. 4401 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:26,055 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:26,056 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59, 59, 59, 59] total 116 [2018-08-07 10:57:26,056 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:26,056 INFO L459 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-08-07 10:57:26,056 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-08-07 10:57:26,057 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6226, Invalid=7114, Unknown=0, NotChecked=0, Total=13340 [2018-08-07 10:57:26,057 INFO L87 Difference]: Start difference. First operand 174 states and 174 transitions. Second operand 59 states. [2018-08-07 10:57:26,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:26,218 INFO L93 Difference]: Finished difference Result 183 states and 183 transitions. [2018-08-07 10:57:26,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-08-07 10:57:26,218 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 173 [2018-08-07 10:57:26,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:26,219 INFO L225 Difference]: With dead ends: 183 [2018-08-07 10:57:26,219 INFO L226 Difference]: Without dead ends: 178 [2018-08-07 10:57:26,220 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 750 GetRequests, 633 SyntacticMatches, 2 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 546 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=6232, Invalid=7340, Unknown=0, NotChecked=0, Total=13572 [2018-08-07 10:57:26,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-08-07 10:57:26,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 177. [2018-08-07 10:57:26,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-08-07 10:57:26,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 177 transitions. [2018-08-07 10:57:26,224 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 177 transitions. Word has length 173 [2018-08-07 10:57:26,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:26,224 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 177 transitions. [2018-08-07 10:57:26,224 INFO L481 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-08-07 10:57:26,225 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 177 transitions. [2018-08-07 10:57:26,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-08-07 10:57:26,225 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:26,226 INFO L376 BasicCegarLoop]: trace histogram [56, 55, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:26,226 INFO L423 AbstractCegarLoop]: === Iteration 57 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:26,226 INFO L82 PathProgramCache]: Analyzing trace with hash -1710697243, now seen corresponding path program 55 times [2018-08-07 10:57:26,226 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:26,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:26,227 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:26,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:26,227 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:26,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:28,128 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:28,129 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:28,129 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:28,138 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:57:28,138 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:57:28,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:28,230 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:28,295 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:28,295 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:31,785 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:31,806 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:31,806 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:31,820 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:57:31,821 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:57:31,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:32,009 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:32,085 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:32,085 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:32,137 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:32,139 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:32,139 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 60, 60, 60, 60] total 118 [2018-08-07 10:57:32,139 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:32,139 INFO L459 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-08-07 10:57:32,140 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-08-07 10:57:32,140 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6451, Invalid=7355, Unknown=0, NotChecked=0, Total=13806 [2018-08-07 10:57:32,140 INFO L87 Difference]: Start difference. First operand 177 states and 177 transitions. Second operand 60 states. [2018-08-07 10:57:32,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:32,292 INFO L93 Difference]: Finished difference Result 186 states and 186 transitions. [2018-08-07 10:57:32,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-08-07 10:57:32,292 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 176 [2018-08-07 10:57:32,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:32,293 INFO L225 Difference]: With dead ends: 186 [2018-08-07 10:57:32,293 INFO L226 Difference]: Without dead ends: 181 [2018-08-07 10:57:32,294 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 763 GetRequests, 644 SyntacticMatches, 2 SemanticMatches, 117 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 556 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=6457, Invalid=7585, Unknown=0, NotChecked=0, Total=14042 [2018-08-07 10:57:32,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-08-07 10:57:32,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 180. [2018-08-07 10:57:32,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-08-07 10:57:32,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 180 transitions. [2018-08-07 10:57:32,298 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 180 transitions. Word has length 176 [2018-08-07 10:57:32,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:32,299 INFO L480 AbstractCegarLoop]: Abstraction has 180 states and 180 transitions. [2018-08-07 10:57:32,299 INFO L481 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-08-07 10:57:32,299 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 180 transitions. [2018-08-07 10:57:32,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2018-08-07 10:57:32,300 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:32,300 INFO L376 BasicCegarLoop]: trace histogram [57, 56, 56, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:32,300 INFO L423 AbstractCegarLoop]: === Iteration 58 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:32,301 INFO L82 PathProgramCache]: Analyzing trace with hash -747698800, now seen corresponding path program 56 times [2018-08-07 10:57:32,301 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:32,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:32,301 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:57:32,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:32,301 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:32,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:33,988 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 0 proven. 4732 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:33,988 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:33,989 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:33,996 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:57:33,996 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:34,087 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:57:34,087 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:34,090 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:34,164 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 0 proven. 4732 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:34,164 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:38,026 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 0 proven. 4732 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:38,046 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:38,046 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:38,060 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:57:38,061 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:38,260 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:57:38,261 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:38,269 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:38,336 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 0 proven. 4732 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:38,336 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:38,367 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 0 proven. 4732 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:38,368 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:38,368 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61, 61, 61, 61] total 120 [2018-08-07 10:57:38,369 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:38,369 INFO L459 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-08-07 10:57:38,369 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-08-07 10:57:38,370 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6680, Invalid=7600, Unknown=0, NotChecked=0, Total=14280 [2018-08-07 10:57:38,370 INFO L87 Difference]: Start difference. First operand 180 states and 180 transitions. Second operand 61 states. [2018-08-07 10:57:38,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:38,551 INFO L93 Difference]: Finished difference Result 189 states and 189 transitions. [2018-08-07 10:57:38,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-08-07 10:57:38,552 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 179 [2018-08-07 10:57:38,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:38,553 INFO L225 Difference]: With dead ends: 189 [2018-08-07 10:57:38,553 INFO L226 Difference]: Without dead ends: 184 [2018-08-07 10:57:38,554 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 776 GetRequests, 655 SyntacticMatches, 2 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 566 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=6686, Invalid=7834, Unknown=0, NotChecked=0, Total=14520 [2018-08-07 10:57:38,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-08-07 10:57:38,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 183. [2018-08-07 10:57:38,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-08-07 10:57:38,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 183 transitions. [2018-08-07 10:57:38,558 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 183 transitions. Word has length 179 [2018-08-07 10:57:38,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:38,559 INFO L480 AbstractCegarLoop]: Abstraction has 183 states and 183 transitions. [2018-08-07 10:57:38,559 INFO L481 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-08-07 10:57:38,559 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 183 transitions. [2018-08-07 10:57:38,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2018-08-07 10:57:38,560 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:38,560 INFO L376 BasicCegarLoop]: trace histogram [58, 57, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:38,560 INFO L423 AbstractCegarLoop]: === Iteration 59 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:38,560 INFO L82 PathProgramCache]: Analyzing trace with hash 1852346629, now seen corresponding path program 57 times [2018-08-07 10:57:38,561 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:38,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:38,561 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:38,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:38,561 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:38,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:40,320 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 0 proven. 4902 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:40,321 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:40,321 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:40,329 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:57:40,329 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:57:40,468 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 58 check-sat command(s) [2018-08-07 10:57:40,468 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:40,472 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:40,547 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 0 proven. 4902 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:40,548 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:44,645 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 0 proven. 4902 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:44,666 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:44,667 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:44,682 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:57:44,682 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:57:46,121 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 58 check-sat command(s) [2018-08-07 10:57:46,121 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:46,131 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:46,207 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 0 proven. 4902 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:46,207 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:46,239 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 0 proven. 4902 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:46,241 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:46,241 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62, 62, 62, 62] total 122 [2018-08-07 10:57:46,241 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:46,242 INFO L459 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-08-07 10:57:46,242 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-08-07 10:57:46,243 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6913, Invalid=7849, Unknown=0, NotChecked=0, Total=14762 [2018-08-07 10:57:46,243 INFO L87 Difference]: Start difference. First operand 183 states and 183 transitions. Second operand 62 states. [2018-08-07 10:57:46,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:46,382 INFO L93 Difference]: Finished difference Result 192 states and 192 transitions. [2018-08-07 10:57:46,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-08-07 10:57:46,382 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 182 [2018-08-07 10:57:46,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:46,384 INFO L225 Difference]: With dead ends: 192 [2018-08-07 10:57:46,384 INFO L226 Difference]: Without dead ends: 187 [2018-08-07 10:57:46,385 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 789 GetRequests, 666 SyntacticMatches, 2 SemanticMatches, 121 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 576 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=6919, Invalid=8087, Unknown=0, NotChecked=0, Total=15006 [2018-08-07 10:57:46,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-08-07 10:57:46,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 186. [2018-08-07 10:57:46,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-08-07 10:57:46,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 186 transitions. [2018-08-07 10:57:46,389 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 186 transitions. Word has length 182 [2018-08-07 10:57:46,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:46,389 INFO L480 AbstractCegarLoop]: Abstraction has 186 states and 186 transitions. [2018-08-07 10:57:46,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-08-07 10:57:46,390 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 186 transitions. [2018-08-07 10:57:46,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-08-07 10:57:46,391 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:46,391 INFO L376 BasicCegarLoop]: trace histogram [59, 58, 58, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:46,391 INFO L423 AbstractCegarLoop]: === Iteration 60 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:46,391 INFO L82 PathProgramCache]: Analyzing trace with hash 70538608, now seen corresponding path program 58 times [2018-08-07 10:57:46,391 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:46,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:46,392 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:46,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:46,392 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:46,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:48,086 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:48,086 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:48,086 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:48,094 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:57:48,095 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:57:48,189 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:57:48,189 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:48,193 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:48,292 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:48,292 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:52,122 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:52,144 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:52,144 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:52,159 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:57:52,159 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:57:52,369 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:57:52,370 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:52,380 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:52,473 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:52,473 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:52,506 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:52,508 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:57:52,508 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [63, 63, 63, 63, 63] total 124 [2018-08-07 10:57:52,508 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:57:52,508 INFO L459 AbstractCegarLoop]: Interpolant automaton has 63 states [2018-08-07 10:57:52,509 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2018-08-07 10:57:52,509 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7150, Invalid=8102, Unknown=0, NotChecked=0, Total=15252 [2018-08-07 10:57:52,509 INFO L87 Difference]: Start difference. First operand 186 states and 186 transitions. Second operand 63 states. [2018-08-07 10:57:52,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:57:52,654 INFO L93 Difference]: Finished difference Result 195 states and 195 transitions. [2018-08-07 10:57:52,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-08-07 10:57:52,654 INFO L78 Accepts]: Start accepts. Automaton has 63 states. Word has length 185 [2018-08-07 10:57:52,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:57:52,656 INFO L225 Difference]: With dead ends: 195 [2018-08-07 10:57:52,656 INFO L226 Difference]: Without dead ends: 190 [2018-08-07 10:57:52,657 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 802 GetRequests, 677 SyntacticMatches, 2 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 586 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=7156, Invalid=8344, Unknown=0, NotChecked=0, Total=15500 [2018-08-07 10:57:52,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-08-07 10:57:52,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 189. [2018-08-07 10:57:52,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-08-07 10:57:52,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 189 transitions. [2018-08-07 10:57:52,660 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 189 transitions. Word has length 185 [2018-08-07 10:57:52,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:57:52,660 INFO L480 AbstractCegarLoop]: Abstraction has 189 states and 189 transitions. [2018-08-07 10:57:52,660 INFO L481 AbstractCegarLoop]: Interpolant automaton has 63 states. [2018-08-07 10:57:52,660 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 189 transitions. [2018-08-07 10:57:52,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 189 [2018-08-07 10:57:52,661 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:57:52,661 INFO L376 BasicCegarLoop]: trace histogram [60, 59, 59, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:57:52,662 INFO L423 AbstractCegarLoop]: === Iteration 61 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:57:52,662 INFO L82 PathProgramCache]: Analyzing trace with hash -271403739, now seen corresponding path program 59 times [2018-08-07 10:57:52,662 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:57:52,662 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:52,662 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:57:52,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:57:52,663 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:57:52,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:57:55,048 INFO L134 CoverageAnalysis]: Checked inductivity of 5251 backedges. 0 proven. 5251 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:55,049 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:55,049 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:57:55,058 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:57:55,058 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:57:55,200 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 60 check-sat command(s) [2018-08-07 10:57:55,201 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:57:55,204 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:57:55,276 INFO L134 CoverageAnalysis]: Checked inductivity of 5251 backedges. 0 proven. 5251 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:55,276 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:57:59,513 INFO L134 CoverageAnalysis]: Checked inductivity of 5251 backedges. 0 proven. 5251 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:57:59,533 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:57:59,534 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:57:59,549 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-08-07 10:57:59,549 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:58:00,968 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 60 check-sat command(s) [2018-08-07 10:58:00,968 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:00,978 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:01,042 INFO L134 CoverageAnalysis]: Checked inductivity of 5251 backedges. 0 proven. 5251 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:01,042 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:01,082 INFO L134 CoverageAnalysis]: Checked inductivity of 5251 backedges. 0 proven. 5251 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:01,083 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:58:01,084 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 64, 64, 64, 64] total 126 [2018-08-07 10:58:01,084 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:58:01,084 INFO L459 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-08-07 10:58:01,085 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-08-07 10:58:01,086 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7391, Invalid=8359, Unknown=0, NotChecked=0, Total=15750 [2018-08-07 10:58:01,086 INFO L87 Difference]: Start difference. First operand 189 states and 189 transitions. Second operand 64 states. [2018-08-07 10:58:01,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:58:01,282 INFO L93 Difference]: Finished difference Result 198 states and 198 transitions. [2018-08-07 10:58:01,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-08-07 10:58:01,282 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 188 [2018-08-07 10:58:01,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:58:01,283 INFO L225 Difference]: With dead ends: 198 [2018-08-07 10:58:01,283 INFO L226 Difference]: Without dead ends: 193 [2018-08-07 10:58:01,284 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 815 GetRequests, 688 SyntacticMatches, 2 SemanticMatches, 125 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 596 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=7397, Invalid=8605, Unknown=0, NotChecked=0, Total=16002 [2018-08-07 10:58:01,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-08-07 10:58:01,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 192. [2018-08-07 10:58:01,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-08-07 10:58:01,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 192 transitions. [2018-08-07 10:58:01,288 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 192 transitions. Word has length 188 [2018-08-07 10:58:01,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:58:01,288 INFO L480 AbstractCegarLoop]: Abstraction has 192 states and 192 transitions. [2018-08-07 10:58:01,288 INFO L481 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-08-07 10:58:01,288 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 192 transitions. [2018-08-07 10:58:01,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-08-07 10:58:01,289 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:58:01,289 INFO L376 BasicCegarLoop]: trace histogram [61, 60, 60, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:58:01,289 INFO L423 AbstractCegarLoop]: === Iteration 62 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:58:01,289 INFO L82 PathProgramCache]: Analyzing trace with hash 586562896, now seen corresponding path program 60 times [2018-08-07 10:58:01,290 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:58:01,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:01,290 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:58:01,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:01,290 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:58:01,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:02,890 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 0 proven. 5430 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:02,890 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:02,890 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:58:02,897 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:58:02,898 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:58:03,043 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 61 check-sat command(s) [2018-08-07 10:58:03,043 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:03,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:03,122 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 0 proven. 5430 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:03,123 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:07,548 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 0 proven. 5430 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:07,568 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:07,569 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:58:07,583 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-08-07 10:58:07,583 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-08-07 10:58:09,102 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 61 check-sat command(s) [2018-08-07 10:58:09,102 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:09,112 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:09,187 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 0 proven. 5430 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:09,187 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:09,229 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 0 proven. 5430 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:09,230 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:58:09,230 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65, 65, 65, 65] total 128 [2018-08-07 10:58:09,230 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:58:09,231 INFO L459 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-08-07 10:58:09,231 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-08-07 10:58:09,232 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7636, Invalid=8620, Unknown=0, NotChecked=0, Total=16256 [2018-08-07 10:58:09,232 INFO L87 Difference]: Start difference. First operand 192 states and 192 transitions. Second operand 65 states. [2018-08-07 10:58:09,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:58:09,372 INFO L93 Difference]: Finished difference Result 201 states and 201 transitions. [2018-08-07 10:58:09,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-08-07 10:58:09,373 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 191 [2018-08-07 10:58:09,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:58:09,373 INFO L225 Difference]: With dead ends: 201 [2018-08-07 10:58:09,374 INFO L226 Difference]: Without dead ends: 196 [2018-08-07 10:58:09,374 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 828 GetRequests, 699 SyntacticMatches, 2 SemanticMatches, 127 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 606 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=7642, Invalid=8870, Unknown=0, NotChecked=0, Total=16512 [2018-08-07 10:58:09,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-08-07 10:58:09,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 195. [2018-08-07 10:58:09,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-08-07 10:58:09,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 195 transitions. [2018-08-07 10:58:09,379 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 195 transitions. Word has length 191 [2018-08-07 10:58:09,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:58:09,379 INFO L480 AbstractCegarLoop]: Abstraction has 195 states and 195 transitions. [2018-08-07 10:58:09,379 INFO L481 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-08-07 10:58:09,380 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 195 transitions. [2018-08-07 10:58:09,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2018-08-07 10:58:09,381 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:58:09,381 INFO L376 BasicCegarLoop]: trace histogram [62, 61, 61, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:58:09,381 INFO L423 AbstractCegarLoop]: === Iteration 63 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:58:09,381 INFO L82 PathProgramCache]: Analyzing trace with hash 920207685, now seen corresponding path program 61 times [2018-08-07 10:58:09,381 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:58:09,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:09,382 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:58:09,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:09,382 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:58:09,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:10,987 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:10,987 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:10,987 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:58:10,995 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:58:10,995 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:58:11,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:11,096 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:11,251 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:11,252 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:15,886 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:15,907 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:15,908 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:58:15,924 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:58:15,924 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-08-07 10:58:16,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:16,143 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:16,218 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:16,218 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:16,257 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:16,259 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:58:16,259 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 66, 66, 66, 66] total 130 [2018-08-07 10:58:16,259 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:58:16,260 INFO L459 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-08-07 10:58:16,260 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-08-07 10:58:16,261 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7885, Invalid=8885, Unknown=0, NotChecked=0, Total=16770 [2018-08-07 10:58:16,261 INFO L87 Difference]: Start difference. First operand 195 states and 195 transitions. Second operand 66 states. [2018-08-07 10:58:16,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:58:16,428 INFO L93 Difference]: Finished difference Result 204 states and 204 transitions. [2018-08-07 10:58:16,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-08-07 10:58:16,428 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 194 [2018-08-07 10:58:16,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:58:16,430 INFO L225 Difference]: With dead ends: 204 [2018-08-07 10:58:16,430 INFO L226 Difference]: Without dead ends: 199 [2018-08-07 10:58:16,431 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 841 GetRequests, 710 SyntacticMatches, 2 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 616 ImplicationChecksByTransitivity, 6.2s TimeCoverageRelationStatistics Valid=7891, Invalid=9139, Unknown=0, NotChecked=0, Total=17030 [2018-08-07 10:58:16,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-08-07 10:58:16,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 198. [2018-08-07 10:58:16,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-08-07 10:58:16,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 198 transitions. [2018-08-07 10:58:16,436 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 198 transitions. Word has length 194 [2018-08-07 10:58:16,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:58:16,436 INFO L480 AbstractCegarLoop]: Abstraction has 198 states and 198 transitions. [2018-08-07 10:58:16,436 INFO L481 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-08-07 10:58:16,436 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 198 transitions. [2018-08-07 10:58:16,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-08-07 10:58:16,437 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:58:16,438 INFO L376 BasicCegarLoop]: trace histogram [63, 62, 62, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:58:16,438 INFO L423 AbstractCegarLoop]: === Iteration 64 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:58:16,438 INFO L82 PathProgramCache]: Analyzing trace with hash 1977793840, now seen corresponding path program 62 times [2018-08-07 10:58:16,438 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:58:16,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:16,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-08-07 10:58:16,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:16,439 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:58:16,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:18,013 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 0 proven. 5797 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:18,014 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:18,014 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:58:18,021 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:58:18,021 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:58:18,123 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:58:18,123 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:18,127 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:18,212 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 0 proven. 5797 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:18,212 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:22,985 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 0 proven. 5797 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:23,005 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:23,005 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:58:23,024 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-08-07 10:58:23,024 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-08-07 10:58:23,239 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-08-07 10:58:23,240 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:23,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:23,329 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 0 proven. 5797 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:23,329 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:23,372 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 0 proven. 5797 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:23,374 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:58:23,374 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 67, 67, 67, 67] total 132 [2018-08-07 10:58:23,374 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:58:23,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 67 states [2018-08-07 10:58:23,375 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2018-08-07 10:58:23,376 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8138, Invalid=9154, Unknown=0, NotChecked=0, Total=17292 [2018-08-07 10:58:23,376 INFO L87 Difference]: Start difference. First operand 198 states and 198 transitions. Second operand 67 states. [2018-08-07 10:58:23,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:58:23,582 INFO L93 Difference]: Finished difference Result 207 states and 207 transitions. [2018-08-07 10:58:23,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-08-07 10:58:23,583 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 197 [2018-08-07 10:58:23,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:58:23,585 INFO L225 Difference]: With dead ends: 207 [2018-08-07 10:58:23,585 INFO L226 Difference]: Without dead ends: 202 [2018-08-07 10:58:23,586 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 854 GetRequests, 721 SyntacticMatches, 2 SemanticMatches, 131 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 626 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=8144, Invalid=9412, Unknown=0, NotChecked=0, Total=17556 [2018-08-07 10:58:23,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-08-07 10:58:23,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 201. [2018-08-07 10:58:23,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-08-07 10:58:23,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 201 transitions. [2018-08-07 10:58:23,591 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 201 transitions. Word has length 197 [2018-08-07 10:58:23,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:58:23,592 INFO L480 AbstractCegarLoop]: Abstraction has 201 states and 201 transitions. [2018-08-07 10:58:23,592 INFO L481 AbstractCegarLoop]: Interpolant automaton has 67 states. [2018-08-07 10:58:23,592 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 201 transitions. [2018-08-07 10:58:23,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-08-07 10:58:23,593 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:58:23,593 INFO L376 BasicCegarLoop]: trace histogram [64, 63, 63, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:58:23,593 INFO L423 AbstractCegarLoop]: === Iteration 65 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:58:23,594 INFO L82 PathProgramCache]: Analyzing trace with hash 646853989, now seen corresponding path program 63 times [2018-08-07 10:58:23,594 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:58:23,594 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:23,595 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:58:23,595 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:23,595 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:58:23,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:25,498 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 0 proven. 5985 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:25,498 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:25,499 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:58:25,506 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:58:25,506 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:58:25,788 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 64 check-sat command(s) [2018-08-07 10:58:25,788 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:25,792 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:25,877 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 0 proven. 5985 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:25,878 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:30,706 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 0 proven. 5985 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:30,728 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:30,728 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-08-07 10:58:30,743 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-08-07 10:58:30,743 INFO L292 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-08-07 10:58:32,445 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 64 check-sat command(s) [2018-08-07 10:58:32,445 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:32,454 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:32,542 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 0 proven. 5985 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:32,542 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-08-07 10:58:32,579 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 0 proven. 5985 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:32,581 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-08-07 10:58:32,581 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 68, 68, 68, 68] total 134 [2018-08-07 10:58:32,581 INFO L255 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-08-07 10:58:32,582 INFO L459 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-08-07 10:58:32,582 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-08-07 10:58:32,583 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8395, Invalid=9427, Unknown=0, NotChecked=0, Total=17822 [2018-08-07 10:58:32,583 INFO L87 Difference]: Start difference. First operand 201 states and 201 transitions. Second operand 68 states. [2018-08-07 10:58:32,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-08-07 10:58:32,809 INFO L93 Difference]: Finished difference Result 210 states and 210 transitions. [2018-08-07 10:58:32,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-08-07 10:58:32,809 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 200 [2018-08-07 10:58:32,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-08-07 10:58:32,810 INFO L225 Difference]: With dead ends: 210 [2018-08-07 10:58:32,810 INFO L226 Difference]: Without dead ends: 205 [2018-08-07 10:58:32,810 INFO L603 BasicCegarLoop]: 0 DeclaredPredicates, 867 GetRequests, 732 SyntacticMatches, 2 SemanticMatches, 133 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 636 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=8401, Invalid=9689, Unknown=0, NotChecked=0, Total=18090 [2018-08-07 10:58:32,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-08-07 10:58:32,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 204. [2018-08-07 10:58:32,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-08-07 10:58:32,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 204 transitions. [2018-08-07 10:58:32,814 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 204 transitions. Word has length 200 [2018-08-07 10:58:32,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-08-07 10:58:32,815 INFO L480 AbstractCegarLoop]: Abstraction has 204 states and 204 transitions. [2018-08-07 10:58:32,815 INFO L481 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-08-07 10:58:32,815 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 204 transitions. [2018-08-07 10:58:32,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-08-07 10:58:32,816 INFO L368 BasicCegarLoop]: Found error trace [2018-08-07 10:58:32,816 INFO L376 BasicCegarLoop]: trace histogram [65, 64, 64, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-08-07 10:58:32,817 INFO L423 AbstractCegarLoop]: === Iteration 66 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_new_count_by_nondet_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-08-07 10:58:32,817 INFO L82 PathProgramCache]: Analyzing trace with hash 1755829520, now seen corresponding path program 64 times [2018-08-07 10:58:32,817 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-08-07 10:58:32,817 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:32,818 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-08-07 10:58:32,818 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-08-07 10:58:32,818 INFO L292 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-08-07 10:58:32,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-08-07 10:58:34,829 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:34,830 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-08-07 10:58:34,830 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:58:34,845 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-08-07 10:58:34,845 INFO L292 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-08-07 10:58:34,947 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-08-07 10:58:34,948 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-08-07 10:58:34,951 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-08-07 10:58:35,058 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-08-07 10:58:35,058 INFO L316 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-08-07 10:58:36,753 INFO L177 TraceCheckSpWp]: Timeout while computing interpolants [2018-08-07 10:58:36,954 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 128 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-08-07 10:58:36,955 WARN L549 AbstractCegarLoop]: Verification canceled [2018-08-07 10:58:36,960 WARN L202 ceAbstractionStarter]: Timeout [2018-08-07 10:58:36,960 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.08 10:58:36 BoogieIcfgContainer [2018-08-07 10:58:36,960 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-08-07 10:58:36,961 INFO L168 Benchmark]: Toolchain (without parser) took 233671.48 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 803.7 MB). Free memory was 1.4 GB in the beginning and 1.8 GB in the end (delta: -332.7 MB). Peak memory consumption was 471.0 MB. Max. memory is 7.1 GB. [2018-08-07 10:58:36,962 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-08-07 10:58:36,962 INFO L168 Benchmark]: CACSL2BoogieTranslator took 246.22 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-08-07 10:58:36,963 INFO L168 Benchmark]: Boogie Procedure Inliner took 24.09 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-08-07 10:58:36,963 INFO L168 Benchmark]: Boogie Preprocessor took 16.68 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-08-07 10:58:36,963 INFO L168 Benchmark]: RCFGBuilder took 310.76 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 739.8 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -791.0 MB). Peak memory consumption was 26.7 MB. Max. memory is 7.1 GB. [2018-08-07 10:58:36,963 INFO L168 Benchmark]: TraceAbstraction took 233069.38 ms. Allocated memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 64.0 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 447.8 MB). Peak memory consumption was 511.7 MB. Max. memory is 7.1 GB. [2018-08-07 10:58:36,965 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 246.22 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 24.09 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 16.68 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 310.76 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 739.8 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -791.0 MB). Peak memory consumption was 26.7 MB. Max. memory is 7.1 GB. * TraceAbstraction took 233069.38 ms. Allocated memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 64.0 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 447.8 MB). Peak memory consumption was 511.7 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was analyzing trace of length 204 with TraceHistMax 65, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 99 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 20 locations, 1 error locations. TIMEOUT Result, 232.9s OverallTime, 66 OverallIterations, 65 TraceHistogramMax, 9.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 725 SDtfs, 2142 SDslu, 15036 SDs, 0 SdLazy, 3786 SolverSat, 103 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 29234 GetRequests, 24639 SyntacticMatches, 128 SemanticMatches, 4467 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20524 ImplicationChecksByTransitivity, 178.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=204occurred in iteration=65, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 65 MinimizatonAttempts, 63 StatesRemovedByMinimization, 63 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.4s SsaConstructionTime, 27.9s SatisfiabilityAnalysisTime, 185.1s InterpolantComputationTime, 20244 NumberOfCodeBlocks, 20244 NumberOfCodeBlocksAsserted, 2259 NumberOfCheckSat, 33409 ConstructedInterpolants, 0 QuantifiedInterpolants, 13122931 SizeOfPredicates, 254 NumberOfNonLiveVariables, 51534 ConjunctsInSsa, 4906 ConjunctsInUnsatCore, 317 InterpolantComputations, 2 PerfectInterpolantSequences, 0/645120 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/count_by_nondet_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-08-07_10-58-36-974.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/count_by_nondet_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-08-07_10-58-36-974.csv Completed graceful shutdown