java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-acceleration/array_true-unreach-call2_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-3142e50-m [2018-09-10 10:09:09,572 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-10 10:09:09,574 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-10 10:09:09,593 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-10 10:09:09,594 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-10 10:09:09,595 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-10 10:09:09,597 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-10 10:09:09,599 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-10 10:09:09,603 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-10 10:09:09,604 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-10 10:09:09,605 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-10 10:09:09,606 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-10 10:09:09,607 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-10 10:09:09,608 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-10 10:09:09,609 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-10 10:09:09,610 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-10 10:09:09,611 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-10 10:09:09,612 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-10 10:09:09,615 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-10 10:09:09,616 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-10 10:09:09,618 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-10 10:09:09,619 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-10 10:09:09,627 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-10 10:09:09,628 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-10 10:09:09,628 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-10 10:09:09,629 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-10 10:09:09,630 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-10 10:09:09,631 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-10 10:09:09,635 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-10 10:09:09,636 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-10 10:09:09,638 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-10 10:09:09,639 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-09-10 10:09:09,640 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-09-10 10:09:09,640 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-09-10 10:09:09,642 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-09-10 10:09:09,643 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-09-10 10:09:09,643 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-10 10:09:09,671 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-10 10:09:09,672 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-10 10:09:09,673 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-10 10:09:09,676 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-10 10:09:09,676 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-10 10:09:09,676 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-10 10:09:09,676 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-10 10:09:09,677 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-10 10:09:09,677 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-10 10:09:09,677 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-10 10:09:09,677 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-10 10:09:09,678 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-10 10:09:09,678 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-10 10:09:09,679 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-10 10:09:09,679 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-10 10:09:09,680 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-10 10:09:09,680 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-10 10:09:09,680 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-10 10:09:09,680 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-10 10:09:09,681 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-10 10:09:09,681 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-10 10:09:09,681 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-10 10:09:09,681 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-10 10:09:09,682 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-10 10:09:09,683 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-10 10:09:09,683 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-10 10:09:09,683 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-10 10:09:09,684 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-10 10:09:09,684 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-10 10:09:09,684 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-10 10:09:09,684 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-10 10:09:09,684 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-10 10:09:09,685 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-10 10:09:09,753 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-10 10:09:09,768 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-10 10:09:09,772 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-10 10:09:09,777 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-10 10:09:09,777 INFO L276 PluginConnector]: CDTParser initialized [2018-09-10 10:09:09,780 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/array_true-unreach-call2_true-termination.i [2018-09-10 10:09:10,126 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8c9bb6a9b/5ef7fd8186864dce8f09ac1c259fe063/FLAGd6dfadaaa [2018-09-10 10:09:10,262 INFO L276 CDTParser]: Found 1 translation units. [2018-09-10 10:09:10,263 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/array_true-unreach-call2_true-termination.i [2018-09-10 10:09:10,268 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8c9bb6a9b/5ef7fd8186864dce8f09ac1c259fe063/FLAGd6dfadaaa [2018-09-10 10:09:10,285 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8c9bb6a9b/5ef7fd8186864dce8f09ac1c259fe063 [2018-09-10 10:09:10,298 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-10 10:09:10,302 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-10 10:09:10,303 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-10 10:09:10,303 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-10 10:09:10,310 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-10 10:09:10,312 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,315 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@9b4ff69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10, skipping insertion in model container [2018-09-10 10:09:10,315 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,480 INFO L180 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-09-10 10:09:10,515 INFO L175 PostProcessor]: Settings: Checked method=main [2018-09-10 10:09:10,531 INFO L431 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-10 10:09:10,536 INFO L175 PostProcessor]: Settings: Checked method=main [2018-09-10 10:09:10,549 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10 WrapperNode [2018-09-10 10:09:10,551 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-10 10:09:10,552 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-10 10:09:10,553 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-10 10:09:10,553 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-10 10:09:10,563 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,573 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,579 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-10 10:09:10,580 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-10 10:09:10,580 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-10 10:09:10,580 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-10 10:09:10,591 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,591 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,592 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,592 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,598 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,604 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,605 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (1/1) ... [2018-09-10 10:09:10,607 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-10 10:09:10,608 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-10 10:09:10,608 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-10 10:09:10,608 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-10 10:09:10,609 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-10 10:09:10,686 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assert [2018-09-10 10:09:10,686 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assert [2018-09-10 10:09:10,686 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-10 10:09:10,687 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-10 10:09:10,687 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-10 10:09:10,687 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-10 10:09:10,687 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-10 10:09:10,687 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-10 10:09:10,986 INFO L353 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-10 10:09:10,987 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 10:09:10 BoogieIcfgContainer [2018-09-10 10:09:10,987 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-10 10:09:10,988 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-10 10:09:10,988 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-10 10:09:10,991 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-10 10:09:10,992 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.09 10:09:10" (1/3) ... [2018-09-10 10:09:10,993 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3434e19 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 10:09:10, skipping insertion in model container [2018-09-10 10:09:10,993 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:10" (2/3) ... [2018-09-10 10:09:10,993 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3434e19 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 10:09:10, skipping insertion in model container [2018-09-10 10:09:10,993 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 10:09:10" (3/3) ... [2018-09-10 10:09:10,995 INFO L112 eAbstractionObserver]: Analyzing ICFG array_true-unreach-call2_true-termination.i [2018-09-10 10:09:11,005 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-10 10:09:11,012 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-10 10:09:11,052 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-10 10:09:11,053 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-10 10:09:11,053 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-10 10:09:11,053 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-10 10:09:11,053 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-10 10:09:11,053 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-10 10:09:11,053 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-10 10:09:11,053 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-10 10:09:11,054 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-10 10:09:11,072 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states. [2018-09-10 10:09:11,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-09-10 10:09:11,079 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:11,080 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:11,081 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:11,086 INFO L82 PathProgramCache]: Analyzing trace with hash 47309880, now seen corresponding path program 1 times [2018-09-10 10:09:11,088 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:11,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:11,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:11,136 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:11,136 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:11,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:11,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:11,198 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:09:11,199 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-10 10:09:11,199 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:09:11,204 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-10 10:09:11,217 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-10 10:09:11,218 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-10 10:09:11,220 INFO L87 Difference]: Start difference. First operand 19 states. Second operand 2 states. [2018-09-10 10:09:11,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:11,244 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2018-09-10 10:09:11,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-10 10:09:11,245 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-09-10 10:09:11,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:11,254 INFO L225 Difference]: With dead ends: 30 [2018-09-10 10:09:11,255 INFO L226 Difference]: Without dead ends: 13 [2018-09-10 10:09:11,258 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-10 10:09:11,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-09-10 10:09:11,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-09-10 10:09:11,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-09-10 10:09:11,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2018-09-10 10:09:11,301 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 10 [2018-09-10 10:09:11,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:11,302 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2018-09-10 10:09:11,302 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-10 10:09:11,303 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2018-09-10 10:09:11,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-09-10 10:09:11,303 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:11,304 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:11,304 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:11,304 INFO L82 PathProgramCache]: Analyzing trace with hash 1197084163, now seen corresponding path program 1 times [2018-09-10 10:09:11,305 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:11,306 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:11,306 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:11,306 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:11,307 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:11,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:11,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:11,388 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:09:11,389 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-09-10 10:09:11,389 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:09:11,391 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-10 10:09:11,392 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-10 10:09:11,392 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-10 10:09:11,393 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand 3 states. [2018-09-10 10:09:11,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:11,495 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-09-10 10:09:11,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-10 10:09:11,496 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-09-10 10:09:11,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:11,497 INFO L225 Difference]: With dead ends: 21 [2018-09-10 10:09:11,497 INFO L226 Difference]: Without dead ends: 16 [2018-09-10 10:09:11,498 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-10 10:09:11,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-09-10 10:09:11,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 15. [2018-09-10 10:09:11,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-09-10 10:09:11,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2018-09-10 10:09:11,503 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 11 [2018-09-10 10:09:11,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:11,503 INFO L480 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2018-09-10 10:09:11,503 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-10 10:09:11,503 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2018-09-10 10:09:11,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-09-10 10:09:11,504 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:11,504 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:11,504 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:11,505 INFO L82 PathProgramCache]: Analyzing trace with hash 688816788, now seen corresponding path program 1 times [2018-09-10 10:09:11,505 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:11,506 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:11,506 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:11,506 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:11,506 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:11,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:11,583 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:11,583 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:11,584 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:11,595 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:11,596 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:09:11,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:11,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:11,640 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:11,641 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:11,718 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:11,744 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:11,745 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:11,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:11,761 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:09:11,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:11,779 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:11,784 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:11,784 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:11,811 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:11,813 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:11,814 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-09-10 10:09:11,814 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:11,814 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-10 10:09:11,815 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-10 10:09:11,815 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-09-10 10:09:11,815 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand 4 states. [2018-09-10 10:09:11,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:11,881 INFO L93 Difference]: Finished difference Result 24 states and 24 transitions. [2018-09-10 10:09:11,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-10 10:09:11,882 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-09-10 10:09:11,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:11,883 INFO L225 Difference]: With dead ends: 24 [2018-09-10 10:09:11,883 INFO L226 Difference]: Without dead ends: 19 [2018-09-10 10:09:11,883 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-09-10 10:09:11,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-09-10 10:09:11,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 18. [2018-09-10 10:09:11,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-09-10 10:09:11,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2018-09-10 10:09:11,888 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 14 [2018-09-10 10:09:11,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:11,888 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2018-09-10 10:09:11,889 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-10 10:09:11,889 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-09-10 10:09:11,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-09-10 10:09:11,889 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:11,890 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:11,890 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:11,890 INFO L82 PathProgramCache]: Analyzing trace with hash -1344833437, now seen corresponding path program 2 times [2018-09-10 10:09:11,890 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:11,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:11,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:11,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:11,892 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:11,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:11,962 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:11,962 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:11,963 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:11,974 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:09:11,974 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:12,009 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:09:12,010 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:12,012 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:12,018 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:12,018 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:12,331 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:12,358 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:12,359 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:12,377 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:09:12,377 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:12,406 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:09:12,407 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:12,410 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:12,416 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:12,417 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:12,435 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:12,439 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:12,439 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-09-10 10:09:12,439 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:12,440 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-10 10:09:12,440 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-10 10:09:12,441 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-09-10 10:09:12,441 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand 5 states. [2018-09-10 10:09:12,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:12,485 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-09-10 10:09:12,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-10 10:09:12,485 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-09-10 10:09:12,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:12,486 INFO L225 Difference]: With dead ends: 27 [2018-09-10 10:09:12,486 INFO L226 Difference]: Without dead ends: 22 [2018-09-10 10:09:12,487 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-09-10 10:09:12,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-09-10 10:09:12,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2018-09-10 10:09:12,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-09-10 10:09:12,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-09-10 10:09:12,492 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 17 [2018-09-10 10:09:12,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:12,492 INFO L480 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-09-10 10:09:12,493 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-10 10:09:12,493 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-09-10 10:09:12,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-09-10 10:09:12,494 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:12,494 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:12,494 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:12,495 INFO L82 PathProgramCache]: Analyzing trace with hash -1010009036, now seen corresponding path program 3 times [2018-09-10 10:09:12,495 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:12,496 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:12,496 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:12,496 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:12,496 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:12,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:12,611 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:12,611 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:12,611 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:12,624 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:09:12,624 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:09:12,675 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-10 10:09:12,676 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:12,678 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:12,685 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:12,686 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:12,890 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:12,911 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:12,911 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:12,926 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:09:12,927 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:09:12,966 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-10 10:09:12,966 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:12,969 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:12,975 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:12,975 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:12,997 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (7)] Exception during sending of exit command (exit): Broken pipe [2018-09-10 10:09:13,004 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:13,005 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 10 [2018-09-10 10:09:13,005 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:13,005 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-09-10 10:09:13,006 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-09-10 10:09:13,006 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-09-10 10:09:13,006 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 6 states. [2018-09-10 10:09:13,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:13,049 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-09-10 10:09:13,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-09-10 10:09:13,050 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-09-10 10:09:13,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:13,051 INFO L225 Difference]: With dead ends: 30 [2018-09-10 10:09:13,051 INFO L226 Difference]: Without dead ends: 25 [2018-09-10 10:09:13,052 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 76 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-09-10 10:09:13,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-09-10 10:09:13,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2018-09-10 10:09:13,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-09-10 10:09:13,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-09-10 10:09:13,057 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 20 [2018-09-10 10:09:13,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:13,057 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-09-10 10:09:13,057 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-09-10 10:09:13,058 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-09-10 10:09:13,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-09-10 10:09:13,059 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:13,059 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:13,060 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:13,060 INFO L82 PathProgramCache]: Analyzing trace with hash 829659843, now seen corresponding path program 4 times [2018-09-10 10:09:13,060 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:13,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:13,061 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:13,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:13,061 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:13,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:13,173 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:13,173 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:13,173 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:13,184 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:09:13,184 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:09:13,196 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:09:13,196 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:13,198 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:13,204 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:13,204 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:13,659 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:13,690 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:13,690 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:13,707 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:09:13,707 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:09:13,729 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:09:13,729 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:13,733 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:13,740 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:13,741 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:13,762 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:13,764 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:13,765 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 12 [2018-09-10 10:09:13,765 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:13,765 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-09-10 10:09:13,766 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-09-10 10:09:13,766 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-09-10 10:09:13,767 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 7 states. [2018-09-10 10:09:13,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:13,823 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-09-10 10:09:13,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-10 10:09:13,825 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-09-10 10:09:13,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:13,826 INFO L225 Difference]: With dead ends: 33 [2018-09-10 10:09:13,826 INFO L226 Difference]: Without dead ends: 28 [2018-09-10 10:09:13,827 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-09-10 10:09:13,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-09-10 10:09:13,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 27. [2018-09-10 10:09:13,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-09-10 10:09:13,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-09-10 10:09:13,832 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 23 [2018-09-10 10:09:13,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:13,832 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-09-10 10:09:13,832 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-09-10 10:09:13,832 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-09-10 10:09:13,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-09-10 10:09:13,833 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:13,833 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:13,834 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:13,834 INFO L82 PathProgramCache]: Analyzing trace with hash -1672430124, now seen corresponding path program 5 times [2018-09-10 10:09:13,834 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:13,835 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:13,835 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:13,835 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:13,835 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:13,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:13,946 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:13,947 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:13,947 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:13,962 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:09:13,963 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:13,998 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-09-10 10:09:13,999 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:14,002 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:14,016 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:14,016 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:14,224 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:14,245 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:14,245 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:14,261 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:09:14,261 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:14,303 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-09-10 10:09:14,303 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:14,307 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:14,314 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:14,314 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:14,330 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:14,332 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:14,332 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-09-10 10:09:14,332 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:14,333 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-09-10 10:09:14,333 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-09-10 10:09:14,334 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-09-10 10:09:14,334 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 8 states. [2018-09-10 10:09:14,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:14,401 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-09-10 10:09:14,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-09-10 10:09:14,404 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-09-10 10:09:14,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:14,405 INFO L225 Difference]: With dead ends: 36 [2018-09-10 10:09:14,405 INFO L226 Difference]: Without dead ends: 31 [2018-09-10 10:09:14,406 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-09-10 10:09:14,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-09-10 10:09:14,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2018-09-10 10:09:14,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-09-10 10:09:14,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-09-10 10:09:14,412 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 26 [2018-09-10 10:09:14,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:14,412 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-09-10 10:09:14,413 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-09-10 10:09:14,413 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-09-10 10:09:14,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-09-10 10:09:14,413 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:14,414 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:14,414 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:14,414 INFO L82 PathProgramCache]: Analyzing trace with hash 2017752355, now seen corresponding path program 6 times [2018-09-10 10:09:14,414 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:14,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:14,415 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:14,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:14,415 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:14,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:14,556 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:14,556 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:14,556 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:14,564 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:09:14,564 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:09:14,605 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-09-10 10:09:14,606 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:14,609 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:14,616 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:14,617 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:14,993 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:15,015 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:15,015 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:15,030 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:09:15,030 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:09:15,093 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-09-10 10:09:15,093 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:15,097 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:15,111 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:15,111 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:15,126 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:15,127 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:15,128 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 16 [2018-09-10 10:09:15,128 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:15,128 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-09-10 10:09:15,128 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-09-10 10:09:15,129 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-09-10 10:09:15,129 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 9 states. [2018-09-10 10:09:15,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:15,185 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-09-10 10:09:15,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-10 10:09:15,189 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-09-10 10:09:15,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:15,190 INFO L225 Difference]: With dead ends: 39 [2018-09-10 10:09:15,190 INFO L226 Difference]: Without dead ends: 34 [2018-09-10 10:09:15,190 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-09-10 10:09:15,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-09-10 10:09:15,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 33. [2018-09-10 10:09:15,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-09-10 10:09:15,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-09-10 10:09:15,196 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 29 [2018-09-10 10:09:15,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:15,197 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-09-10 10:09:15,197 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-09-10 10:09:15,197 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-09-10 10:09:15,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-09-10 10:09:15,198 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:15,198 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:15,198 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:15,199 INFO L82 PathProgramCache]: Analyzing trace with hash -2033891468, now seen corresponding path program 7 times [2018-09-10 10:09:15,199 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:15,200 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:15,200 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:15,200 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:15,200 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:15,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:15,328 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:15,328 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:15,329 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:15,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:15,337 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:09:15,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:15,366 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:15,374 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:15,374 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:15,603 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:15,624 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:15,624 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:15,640 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:15,640 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:09:15,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:15,667 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:15,675 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:15,675 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:15,693 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:15,695 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:15,695 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 18 [2018-09-10 10:09:15,695 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:15,696 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-09-10 10:09:15,696 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-09-10 10:09:15,696 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-09-10 10:09:15,697 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 10 states. [2018-09-10 10:09:15,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:15,760 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-09-10 10:09:15,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-10 10:09:15,761 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 32 [2018-09-10 10:09:15,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:15,762 INFO L225 Difference]: With dead ends: 42 [2018-09-10 10:09:15,762 INFO L226 Difference]: Without dead ends: 37 [2018-09-10 10:09:15,763 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-09-10 10:09:15,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-09-10 10:09:15,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 36. [2018-09-10 10:09:15,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-09-10 10:09:15,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-09-10 10:09:15,768 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 32 [2018-09-10 10:09:15,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:15,768 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-09-10 10:09:15,769 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-09-10 10:09:15,769 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-09-10 10:09:15,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-09-10 10:09:15,770 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:15,770 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:15,770 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:15,771 INFO L82 PathProgramCache]: Analyzing trace with hash 1205864323, now seen corresponding path program 8 times [2018-09-10 10:09:15,771 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:15,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:15,772 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:15,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:15,772 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:15,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:15,937 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:15,938 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:15,938 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:15,948 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:09:15,948 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:15,964 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:09:15,964 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:15,968 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:15,976 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:15,977 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:16,272 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:16,294 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:16,294 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:16,309 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:09:16,309 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:16,339 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:09:16,339 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:16,343 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:16,351 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:16,352 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:16,372 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:16,373 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:16,374 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-09-10 10:09:16,374 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:16,374 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-10 10:09:16,375 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-10 10:09:16,375 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-09-10 10:09:16,375 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 11 states. [2018-09-10 10:09:16,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:16,541 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-09-10 10:09:16,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-10 10:09:16,547 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-09-10 10:09:16,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:16,548 INFO L225 Difference]: With dead ends: 45 [2018-09-10 10:09:16,548 INFO L226 Difference]: Without dead ends: 40 [2018-09-10 10:09:16,549 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-09-10 10:09:16,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-09-10 10:09:16,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2018-09-10 10:09:16,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-09-10 10:09:16,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-09-10 10:09:16,555 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 35 [2018-09-10 10:09:16,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:16,555 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-09-10 10:09:16,555 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-10 10:09:16,556 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-09-10 10:09:16,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-09-10 10:09:16,557 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:16,557 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:16,557 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:16,560 INFO L82 PathProgramCache]: Analyzing trace with hash 265558292, now seen corresponding path program 9 times [2018-09-10 10:09:16,560 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:16,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:16,561 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:16,562 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:16,562 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:16,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:16,692 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:16,692 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:16,693 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:16,702 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:09:16,702 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:09:16,853 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-09-10 10:09:16,854 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:16,856 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:16,866 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:16,867 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:17,393 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:17,416 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:17,416 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:17,432 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:09:17,432 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:09:17,713 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-09-10 10:09:17,713 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:17,717 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:17,726 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:17,727 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:17,780 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:17,783 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:17,783 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 22 [2018-09-10 10:09:17,783 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:17,784 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-09-10 10:09:17,784 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-09-10 10:09:17,785 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-09-10 10:09:17,785 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 12 states. [2018-09-10 10:09:17,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:17,922 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-09-10 10:09:17,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-10 10:09:17,923 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-09-10 10:09:17,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:17,925 INFO L225 Difference]: With dead ends: 48 [2018-09-10 10:09:17,925 INFO L226 Difference]: Without dead ends: 43 [2018-09-10 10:09:17,926 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-09-10 10:09:17,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-09-10 10:09:17,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 42. [2018-09-10 10:09:17,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-09-10 10:09:17,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-09-10 10:09:17,931 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 38 [2018-09-10 10:09:17,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:17,932 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-09-10 10:09:17,932 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-09-10 10:09:17,932 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-09-10 10:09:17,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-09-10 10:09:17,933 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:17,933 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:17,933 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:17,933 INFO L82 PathProgramCache]: Analyzing trace with hash -614706717, now seen corresponding path program 10 times [2018-09-10 10:09:17,934 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:17,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:17,935 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:17,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:17,935 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:17,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:18,145 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:18,146 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:18,146 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:18,153 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:09:18,153 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:09:18,168 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:09:18,168 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:18,171 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:18,180 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:18,180 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:18,611 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:18,633 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:18,633 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:18,651 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:09:18,651 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:09:18,683 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:09:18,683 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:18,686 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:18,694 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:18,694 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:18,758 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:18,761 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:18,761 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 24 [2018-09-10 10:09:18,761 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:18,761 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-10 10:09:18,762 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-10 10:09:18,762 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-09-10 10:09:18,762 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 13 states. [2018-09-10 10:09:18,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:18,970 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-09-10 10:09:18,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-10 10:09:18,970 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 41 [2018-09-10 10:09:18,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:18,972 INFO L225 Difference]: With dead ends: 51 [2018-09-10 10:09:18,972 INFO L226 Difference]: Without dead ends: 46 [2018-09-10 10:09:18,973 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 153 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-09-10 10:09:18,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-09-10 10:09:18,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 45. [2018-09-10 10:09:18,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-09-10 10:09:18,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-09-10 10:09:18,979 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 41 [2018-09-10 10:09:18,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:18,979 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-09-10 10:09:18,979 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-10 10:09:18,979 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-09-10 10:09:18,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-09-10 10:09:18,980 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:18,980 INFO L376 BasicCegarLoop]: trace histogram [12, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:18,980 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:18,980 INFO L82 PathProgramCache]: Analyzing trace with hash 480719540, now seen corresponding path program 11 times [2018-09-10 10:09:18,981 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:18,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:18,982 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:18,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:18,982 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:18,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:19,196 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:19,197 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:19,197 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:19,204 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:09:19,204 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:19,254 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-09-10 10:09:19,255 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:19,257 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:19,265 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:19,265 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:19,746 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:19,766 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:19,767 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:19,781 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:09:19,782 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:19,918 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-09-10 10:09:19,918 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:19,922 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:19,928 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:19,928 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:19,944 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:19,945 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:19,945 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-09-10 10:09:19,945 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:19,946 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-10 10:09:19,946 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-10 10:09:19,947 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-09-10 10:09:19,947 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 14 states. [2018-09-10 10:09:20,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:20,036 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-09-10 10:09:20,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-10 10:09:20,036 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-09-10 10:09:20,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:20,038 INFO L225 Difference]: With dead ends: 54 [2018-09-10 10:09:20,038 INFO L226 Difference]: Without dead ends: 49 [2018-09-10 10:09:20,039 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-09-10 10:09:20,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-09-10 10:09:20,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 48. [2018-09-10 10:09:20,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-09-10 10:09:20,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-09-10 10:09:20,044 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 44 [2018-09-10 10:09:20,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:20,044 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-09-10 10:09:20,044 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-10 10:09:20,044 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-09-10 10:09:20,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-09-10 10:09:20,045 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:20,045 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:20,046 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:20,046 INFO L82 PathProgramCache]: Analyzing trace with hash 1162826819, now seen corresponding path program 12 times [2018-09-10 10:09:20,046 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:20,047 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:20,047 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:20,047 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:20,047 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:20,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:20,254 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:20,254 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:20,255 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:20,262 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:09:20,262 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:09:20,291 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-09-10 10:09:20,292 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:20,298 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:20,307 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:20,307 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:20,736 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:20,757 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:20,757 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:20,772 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:09:20,772 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:09:21,367 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-09-10 10:09:21,367 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:21,372 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:21,380 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:21,380 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:21,429 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:21,431 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:21,431 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-09-10 10:09:21,431 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:21,432 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-10 10:09:21,432 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-10 10:09:21,432 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-09-10 10:09:21,433 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 15 states. [2018-09-10 10:09:21,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:21,522 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-09-10 10:09:21,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-10 10:09:21,522 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2018-09-10 10:09:21,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:21,523 INFO L225 Difference]: With dead ends: 57 [2018-09-10 10:09:21,523 INFO L226 Difference]: Without dead ends: 52 [2018-09-10 10:09:21,523 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 175 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-09-10 10:09:21,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-09-10 10:09:21,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 51. [2018-09-10 10:09:21,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-09-10 10:09:21,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-09-10 10:09:21,529 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 47 [2018-09-10 10:09:21,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:21,529 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-09-10 10:09:21,529 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-10 10:09:21,529 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-09-10 10:09:21,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-09-10 10:09:21,530 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:21,530 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:21,530 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:21,531 INFO L82 PathProgramCache]: Analyzing trace with hash -1964469164, now seen corresponding path program 13 times [2018-09-10 10:09:21,531 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:21,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:21,532 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:21,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:21,532 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:21,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:21,723 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:21,723 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:21,723 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:21,731 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:21,731 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:09:21,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:21,750 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:21,759 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:21,760 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:22,121 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:22,145 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:22,145 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:22,160 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:22,160 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:09:22,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:22,199 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:22,208 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:22,209 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:22,256 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:22,257 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:22,257 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-09-10 10:09:22,257 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:22,258 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-10 10:09:22,258 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-10 10:09:22,258 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-09-10 10:09:22,259 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 16 states. [2018-09-10 10:09:22,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:22,330 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-09-10 10:09:22,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-10 10:09:22,330 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-09-10 10:09:22,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:22,331 INFO L225 Difference]: With dead ends: 60 [2018-09-10 10:09:22,331 INFO L226 Difference]: Without dead ends: 55 [2018-09-10 10:09:22,332 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 186 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-09-10 10:09:22,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-09-10 10:09:22,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 54. [2018-09-10 10:09:22,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-09-10 10:09:22,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-09-10 10:09:22,336 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 50 [2018-09-10 10:09:22,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:22,336 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-09-10 10:09:22,336 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-10 10:09:22,337 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-09-10 10:09:22,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-09-10 10:09:22,338 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:22,338 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:22,338 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:22,338 INFO L82 PathProgramCache]: Analyzing trace with hash -808513885, now seen corresponding path program 14 times [2018-09-10 10:09:22,338 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:22,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:22,339 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:22,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:22,339 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:22,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:22,669 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:22,669 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:22,669 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:22,677 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:09:22,678 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:22,697 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:09:22,697 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:22,699 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:22,706 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:22,707 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:23,034 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:23,055 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:23,056 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:23,070 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:09:23,070 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:23,110 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:09:23,110 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:23,113 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:23,119 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:23,119 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:23,146 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:23,148 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:23,148 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-09-10 10:09:23,148 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:23,148 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-10 10:09:23,148 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-10 10:09:23,149 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-09-10 10:09:23,149 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 17 states. [2018-09-10 10:09:23,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:23,262 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-09-10 10:09:23,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-10 10:09:23,262 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 53 [2018-09-10 10:09:23,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:23,263 INFO L225 Difference]: With dead ends: 63 [2018-09-10 10:09:23,263 INFO L226 Difference]: Without dead ends: 58 [2018-09-10 10:09:23,264 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 197 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-09-10 10:09:23,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-09-10 10:09:23,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 57. [2018-09-10 10:09:23,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-09-10 10:09:23,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-09-10 10:09:23,270 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 53 [2018-09-10 10:09:23,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:23,270 INFO L480 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-09-10 10:09:23,270 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-10 10:09:23,270 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-09-10 10:09:23,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-09-10 10:09:23,271 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:23,271 INFO L376 BasicCegarLoop]: trace histogram [16, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:23,272 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:23,272 INFO L82 PathProgramCache]: Analyzing trace with hash -792576524, now seen corresponding path program 15 times [2018-09-10 10:09:23,272 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:23,272 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:23,273 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:23,273 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:23,273 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:23,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:23,524 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:23,524 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:23,524 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:23,532 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:09:23,532 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:09:23,576 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-09-10 10:09:23,576 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:23,577 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:23,585 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:23,585 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:23,986 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:24,006 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:24,006 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:24,021 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:09:24,021 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:10:08,204 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-09-10 10:10:08,204 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:08,209 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:08,220 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:08,220 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:08,236 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:08,239 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:08,239 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 34 [2018-09-10 10:10:08,239 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:08,239 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-10 10:10:08,240 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-10 10:10:08,240 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-09-10 10:10:08,240 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 18 states. [2018-09-10 10:10:08,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:08,332 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-09-10 10:10:08,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-10 10:10:08,332 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2018-09-10 10:10:08,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:08,333 INFO L225 Difference]: With dead ends: 66 [2018-09-10 10:10:08,333 INFO L226 Difference]: Without dead ends: 61 [2018-09-10 10:10:08,334 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 208 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-09-10 10:10:08,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-09-10 10:10:08,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 60. [2018-09-10 10:10:08,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-09-10 10:10:08,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 60 transitions. [2018-09-10 10:10:08,339 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 60 transitions. Word has length 56 [2018-09-10 10:10:08,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:08,339 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 60 transitions. [2018-09-10 10:10:08,339 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-10 10:10:08,339 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 60 transitions. [2018-09-10 10:10:08,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-10 10:10:08,340 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:08,341 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:08,341 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:08,341 INFO L82 PathProgramCache]: Analyzing trace with hash 1550942467, now seen corresponding path program 16 times [2018-09-10 10:10:08,341 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:08,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:08,342 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:10:08,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:08,342 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:08,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:09,084 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:09,084 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:09,084 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:09,102 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:10:09,102 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:10:09,122 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:10:09,122 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:09,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:09,130 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:09,131 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:09,696 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:09,715 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:09,716 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:09,730 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:10:09,730 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:10:09,773 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:10:09,774 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:09,777 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:09,782 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:09,782 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:09,842 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:09,843 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:09,843 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 36 [2018-09-10 10:10:09,844 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:09,844 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-10 10:10:09,844 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-10 10:10:09,845 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-09-10 10:10:09,845 INFO L87 Difference]: Start difference. First operand 60 states and 60 transitions. Second operand 19 states. [2018-09-10 10:10:09,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:09,910 INFO L93 Difference]: Finished difference Result 69 states and 69 transitions. [2018-09-10 10:10:09,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-10 10:10:09,917 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2018-09-10 10:10:09,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:09,917 INFO L225 Difference]: With dead ends: 69 [2018-09-10 10:10:09,918 INFO L226 Difference]: Without dead ends: 64 [2018-09-10 10:10:09,918 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 253 GetRequests, 219 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-09-10 10:10:09,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-09-10 10:10:09,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 63. [2018-09-10 10:10:09,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-09-10 10:10:09,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 63 transitions. [2018-09-10 10:10:09,931 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 63 transitions. Word has length 59 [2018-09-10 10:10:09,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:09,932 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 63 transitions. [2018-09-10 10:10:09,932 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-10 10:10:09,932 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 63 transitions. [2018-09-10 10:10:09,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-09-10 10:10:09,933 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:09,933 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:09,933 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:09,934 INFO L82 PathProgramCache]: Analyzing trace with hash -1663160428, now seen corresponding path program 17 times [2018-09-10 10:10:09,934 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:09,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:09,937 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:10:09,938 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:09,938 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:09,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:10,277 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:10,277 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:10,277 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:10,284 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:10:10,284 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:10:10,336 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-10 10:10:10,336 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:10,338 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:10,347 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:10,348 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:11,018 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:11,037 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:11,038 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:11,052 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:10:11,052 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:10:11,398 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-10 10:10:11,399 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:11,402 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:11,409 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:11,409 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:11,470 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:11,473 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:11,473 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 38 [2018-09-10 10:10:11,474 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:11,474 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-10 10:10:11,474 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-10 10:10:11,475 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-09-10 10:10:11,475 INFO L87 Difference]: Start difference. First operand 63 states and 63 transitions. Second operand 20 states. [2018-09-10 10:10:11,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:11,999 INFO L93 Difference]: Finished difference Result 72 states and 72 transitions. [2018-09-10 10:10:11,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-10 10:10:12,000 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 62 [2018-09-10 10:10:12,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:12,000 INFO L225 Difference]: With dead ends: 72 [2018-09-10 10:10:12,000 INFO L226 Difference]: Without dead ends: 67 [2018-09-10 10:10:12,001 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 230 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-09-10 10:10:12,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-09-10 10:10:12,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 66. [2018-09-10 10:10:12,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-09-10 10:10:12,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 66 transitions. [2018-09-10 10:10:12,004 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 66 transitions. Word has length 62 [2018-09-10 10:10:12,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:12,004 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 66 transitions. [2018-09-10 10:10:12,004 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-10 10:10:12,005 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 66 transitions. [2018-09-10 10:10:12,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-09-10 10:10:12,005 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:12,005 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:12,005 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:12,006 INFO L82 PathProgramCache]: Analyzing trace with hash -1001608349, now seen corresponding path program 18 times [2018-09-10 10:10:12,006 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:12,006 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:12,006 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:10:12,007 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:12,007 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:12,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:12,692 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:12,692 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:12,692 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:12,705 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:10:12,705 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:10:12,756 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-09-10 10:10:12,756 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:12,758 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:12,766 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:12,766 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:13,251 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:13,271 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:13,271 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:13,286 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:10:13,287 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:10:50,744 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-09-10 10:10:50,744 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:50,749 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:50,758 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:50,758 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:50,787 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:50,789 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:50,789 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 40 [2018-09-10 10:10:50,789 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:50,790 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-10 10:10:50,790 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-10 10:10:50,791 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-09-10 10:10:50,791 INFO L87 Difference]: Start difference. First operand 66 states and 66 transitions. Second operand 21 states. [2018-09-10 10:10:50,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:50,914 INFO L93 Difference]: Finished difference Result 75 states and 75 transitions. [2018-09-10 10:10:50,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-10 10:10:50,914 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-09-10 10:10:50,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:50,915 INFO L225 Difference]: With dead ends: 75 [2018-09-10 10:10:50,916 INFO L226 Difference]: Without dead ends: 70 [2018-09-10 10:10:50,917 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 279 GetRequests, 241 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-09-10 10:10:50,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-09-10 10:10:50,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 69. [2018-09-10 10:10:50,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-09-10 10:10:50,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 69 transitions. [2018-09-10 10:10:50,921 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 69 transitions. Word has length 65 [2018-09-10 10:10:50,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:50,921 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 69 transitions. [2018-09-10 10:10:50,921 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-10 10:10:50,922 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 69 transitions. [2018-09-10 10:10:50,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-09-10 10:10:50,922 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:50,922 INFO L376 BasicCegarLoop]: trace histogram [20, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:50,923 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:50,923 INFO L82 PathProgramCache]: Analyzing trace with hash 1986423092, now seen corresponding path program 19 times [2018-09-10 10:10:50,923 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:50,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:50,924 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:10:50,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:50,924 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:50,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:51,179 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:51,180 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:51,180 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:51,189 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:10:51,189 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:10:51,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:51,212 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:51,223 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:51,223 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:51,812 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:51,832 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:51,832 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:51,847 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:10:51,847 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:10:51,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:51,897 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:51,909 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:51,909 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:51,929 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:51,930 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:51,930 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 42 [2018-09-10 10:10:51,930 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:51,931 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-10 10:10:51,931 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-10 10:10:51,931 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-09-10 10:10:51,932 INFO L87 Difference]: Start difference. First operand 69 states and 69 transitions. Second operand 22 states. [2018-09-10 10:10:52,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:52,038 INFO L93 Difference]: Finished difference Result 78 states and 78 transitions. [2018-09-10 10:10:52,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-10 10:10:52,039 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 68 [2018-09-10 10:10:52,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:52,040 INFO L225 Difference]: With dead ends: 78 [2018-09-10 10:10:52,040 INFO L226 Difference]: Without dead ends: 73 [2018-09-10 10:10:52,041 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 292 GetRequests, 252 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-09-10 10:10:52,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-09-10 10:10:52,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 72. [2018-09-10 10:10:52,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-09-10 10:10:52,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 72 transitions. [2018-09-10 10:10:52,046 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 72 transitions. Word has length 68 [2018-09-10 10:10:52,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:52,046 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 72 transitions. [2018-09-10 10:10:52,046 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-10 10:10:52,046 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 72 transitions. [2018-09-10 10:10:52,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-09-10 10:10:52,047 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:52,047 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:52,047 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:52,047 INFO L82 PathProgramCache]: Analyzing trace with hash 938905027, now seen corresponding path program 20 times [2018-09-10 10:10:52,047 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:52,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:52,048 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:10:52,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:52,048 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:52,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:52,455 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:52,455 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:52,455 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:52,463 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:10:52,463 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:10:52,492 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:10:52,493 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:52,496 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:52,509 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:52,509 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:53,166 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:53,187 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:53,187 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:53,202 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:10:53,202 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:10:53,253 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:10:53,253 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:53,256 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:53,264 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:53,264 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:53,288 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:53,290 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:53,290 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 44 [2018-09-10 10:10:53,290 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:53,291 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-09-10 10:10:53,291 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-09-10 10:10:53,292 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-09-10 10:10:53,292 INFO L87 Difference]: Start difference. First operand 72 states and 72 transitions. Second operand 23 states. [2018-09-10 10:10:53,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:53,397 INFO L93 Difference]: Finished difference Result 81 states and 81 transitions. [2018-09-10 10:10:53,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-10 10:10:53,400 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 71 [2018-09-10 10:10:53,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:53,401 INFO L225 Difference]: With dead ends: 81 [2018-09-10 10:10:53,401 INFO L226 Difference]: Without dead ends: 76 [2018-09-10 10:10:53,403 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 305 GetRequests, 263 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-09-10 10:10:53,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-09-10 10:10:53,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 75. [2018-09-10 10:10:53,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-09-10 10:10:53,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 75 transitions. [2018-09-10 10:10:53,406 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 75 transitions. Word has length 71 [2018-09-10 10:10:53,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:53,406 INFO L480 AbstractCegarLoop]: Abstraction has 75 states and 75 transitions. [2018-09-10 10:10:53,406 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-09-10 10:10:53,406 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 75 transitions. [2018-09-10 10:10:53,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-09-10 10:10:53,407 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:53,407 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:53,407 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:53,407 INFO L82 PathProgramCache]: Analyzing trace with hash 1560603348, now seen corresponding path program 21 times [2018-09-10 10:10:53,407 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:53,408 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:53,408 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:10:53,408 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:53,408 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:53,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:53,700 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:53,700 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:53,700 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:53,708 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:10:53,708 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:10:53,771 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-09-10 10:10:53,771 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:53,773 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:53,784 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:53,784 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:54,626 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:54,646 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:54,646 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:54,661 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:10:54,661 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:12:51,133 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-09-10 10:12:51,133 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:12:51,138 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:51,148 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:51,148 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:51,163 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:51,165 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:12:51,166 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 46 [2018-09-10 10:12:51,166 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:12:51,166 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-10 10:12:51,167 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-10 10:12:51,167 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-09-10 10:12:51,168 INFO L87 Difference]: Start difference. First operand 75 states and 75 transitions. Second operand 24 states. [2018-09-10 10:12:51,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:12:51,251 INFO L93 Difference]: Finished difference Result 84 states and 84 transitions. [2018-09-10 10:12:51,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-10 10:12:51,253 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-09-10 10:12:51,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:12:51,254 INFO L225 Difference]: With dead ends: 84 [2018-09-10 10:12:51,254 INFO L226 Difference]: Without dead ends: 79 [2018-09-10 10:12:51,255 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 318 GetRequests, 274 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-09-10 10:12:51,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-09-10 10:12:51,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 78. [2018-09-10 10:12:51,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-09-10 10:12:51,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 78 transitions. [2018-09-10 10:12:51,258 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 78 transitions. Word has length 74 [2018-09-10 10:12:51,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:12:51,258 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 78 transitions. [2018-09-10 10:12:51,258 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-10 10:12:51,258 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 78 transitions. [2018-09-10 10:12:51,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-09-10 10:12:51,259 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:12:51,259 INFO L376 BasicCegarLoop]: trace histogram [23, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:12:51,259 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:12:51,259 INFO L82 PathProgramCache]: Analyzing trace with hash -1618663389, now seen corresponding path program 22 times [2018-09-10 10:12:51,259 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:12:51,260 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:12:51,260 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:12:51,260 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:12:51,260 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:12:51,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:12:52,397 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:52,398 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:52,398 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:12:52,404 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:12:52,405 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:12:52,431 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:12:52,431 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:12:52,433 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:52,444 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:52,444 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:53,025 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:53,054 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:53,054 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:12:53,075 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:12:53,075 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:12:53,135 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:12:53,135 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:12:53,138 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:53,148 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:53,148 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:53,179 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:53,180 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:12:53,181 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 48 [2018-09-10 10:12:53,181 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:12:53,181 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-10 10:12:53,181 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-10 10:12:53,182 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-09-10 10:12:53,182 INFO L87 Difference]: Start difference. First operand 78 states and 78 transitions. Second operand 25 states. [2018-09-10 10:12:53,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:12:53,270 INFO L93 Difference]: Finished difference Result 87 states and 87 transitions. [2018-09-10 10:12:53,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-10 10:12:53,279 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 77 [2018-09-10 10:12:53,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:12:53,279 INFO L225 Difference]: With dead ends: 87 [2018-09-10 10:12:53,279 INFO L226 Difference]: Without dead ends: 82 [2018-09-10 10:12:53,281 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 331 GetRequests, 285 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-09-10 10:12:53,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-09-10 10:12:53,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 81. [2018-09-10 10:12:53,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-09-10 10:12:53,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 81 transitions. [2018-09-10 10:12:53,284 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 81 transitions. Word has length 77 [2018-09-10 10:12:53,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:12:53,284 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 81 transitions. [2018-09-10 10:12:53,284 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-10 10:12:53,284 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 81 transitions. [2018-09-10 10:12:53,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-09-10 10:12:53,285 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:12:53,285 INFO L376 BasicCegarLoop]: trace histogram [24, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:12:53,285 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:12:53,286 INFO L82 PathProgramCache]: Analyzing trace with hash 1759753332, now seen corresponding path program 23 times [2018-09-10 10:12:53,286 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:12:53,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:12:53,286 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:12:53,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:12:53,287 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:12:53,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:12:53,686 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:53,686 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:53,686 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:12:53,693 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:12:53,694 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:12:53,788 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-09-10 10:12:53,788 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:12:53,790 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:53,800 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:53,800 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:54,477 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:54,498 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:54,498 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:12:54,512 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:12:54,512 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:12:55,327 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-09-10 10:12:55,327 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:12:55,331 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:55,340 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:55,340 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:55,392 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 0 proven. 805 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:55,393 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:12:55,393 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 50 [2018-09-10 10:12:55,393 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:12:55,394 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-10 10:12:55,394 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-10 10:12:55,394 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-09-10 10:12:55,395 INFO L87 Difference]: Start difference. First operand 81 states and 81 transitions. Second operand 26 states. [2018-09-10 10:12:55,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:12:55,478 INFO L93 Difference]: Finished difference Result 90 states and 90 transitions. [2018-09-10 10:12:55,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-09-10 10:12:55,479 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 80 [2018-09-10 10:12:55,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:12:55,480 INFO L225 Difference]: With dead ends: 90 [2018-09-10 10:12:55,480 INFO L226 Difference]: Without dead ends: 85 [2018-09-10 10:12:55,481 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 344 GetRequests, 296 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-09-10 10:12:55,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-09-10 10:12:55,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 84. [2018-09-10 10:12:55,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-09-10 10:12:55,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 84 transitions. [2018-09-10 10:12:55,485 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 84 transitions. Word has length 80 [2018-09-10 10:12:55,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:12:55,485 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 84 transitions. [2018-09-10 10:12:55,485 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-10 10:12:55,486 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 84 transitions. [2018-09-10 10:12:55,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-09-10 10:12:55,486 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:12:55,486 INFO L376 BasicCegarLoop]: trace histogram [25, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:12:55,487 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_array_true_unreach_call__true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:12:55,487 INFO L82 PathProgramCache]: Analyzing trace with hash -91325821, now seen corresponding path program 24 times [2018-09-10 10:12:55,487 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:12:55,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:12:55,488 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:12:55,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:12:55,488 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:12:55,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:12:55,832 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:55,833 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:55,833 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:12:55,841 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:12:55,842 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:12:55,915 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 25 check-sat command(s) [2018-09-10 10:12:55,916 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:12:55,918 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:55,931 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:55,931 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:56,752 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 0 proven. 876 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:56,772 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:56,772 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:12:56,787 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:12:56,787 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown