java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-invgen/fragtest_simple_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-3142e50-m [2018-09-10 10:13:58,008 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-10 10:13:58,011 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-10 10:13:58,026 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-10 10:13:58,026 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-10 10:13:58,027 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-10 10:13:58,028 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-10 10:13:58,030 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-10 10:13:58,032 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-10 10:13:58,033 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-10 10:13:58,035 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-10 10:13:58,036 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-10 10:13:58,037 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-10 10:13:58,038 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-10 10:13:58,041 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-10 10:13:58,041 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-10 10:13:58,042 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-10 10:13:58,050 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-10 10:13:58,055 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-10 10:13:58,057 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-10 10:13:58,060 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-10 10:13:58,061 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-10 10:13:58,064 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-10 10:13:58,065 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-10 10:13:58,065 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-10 10:13:58,066 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-10 10:13:58,066 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-10 10:13:58,067 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-10 10:13:58,068 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-10 10:13:58,069 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-10 10:13:58,069 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-10 10:13:58,070 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-09-10 10:13:58,070 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-09-10 10:13:58,070 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-09-10 10:13:58,071 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-09-10 10:13:58,072 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-09-10 10:13:58,072 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-10 10:13:58,090 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-10 10:13:58,090 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-10 10:13:58,091 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-10 10:13:58,091 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-10 10:13:58,091 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-10 10:13:58,091 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-10 10:13:58,091 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-10 10:13:58,092 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-10 10:13:58,092 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-10 10:13:58,092 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-10 10:13:58,092 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-10 10:13:58,093 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-10 10:13:58,093 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-10 10:13:58,093 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-10 10:13:58,094 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-10 10:13:58,094 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-10 10:13:58,094 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-10 10:13:58,094 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-10 10:13:58,094 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-10 10:13:58,094 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-10 10:13:58,095 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-10 10:13:58,095 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-10 10:13:58,095 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-10 10:13:58,095 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-10 10:13:58,095 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-10 10:13:58,096 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-10 10:13:58,096 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-10 10:13:58,096 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-10 10:13:58,098 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-10 10:13:58,099 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-10 10:13:58,099 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-10 10:13:58,099 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-10 10:13:58,099 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-10 10:13:58,145 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-10 10:13:58,157 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-10 10:13:58,164 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-10 10:13:58,167 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-10 10:13:58,168 INFO L276 PluginConnector]: CDTParser initialized [2018-09-10 10:13:58,169 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-invgen/fragtest_simple_true-unreach-call_true-termination.i [2018-09-10 10:13:58,513 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/54c93b5df/d0a1e7cc83464588aa4835b2877cebb8/FLAG2b29cb9f4 [2018-09-10 10:13:58,669 INFO L276 CDTParser]: Found 1 translation units. [2018-09-10 10:13:58,670 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-invgen/fragtest_simple_true-unreach-call_true-termination.i [2018-09-10 10:13:58,676 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/54c93b5df/d0a1e7cc83464588aa4835b2877cebb8/FLAG2b29cb9f4 [2018-09-10 10:13:58,692 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/54c93b5df/d0a1e7cc83464588aa4835b2877cebb8 [2018-09-10 10:13:58,703 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-10 10:13:58,707 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-10 10:13:58,708 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-10 10:13:58,708 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-10 10:13:58,714 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-10 10:13:58,715 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:58,718 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@74d8f95c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58, skipping insertion in model container [2018-09-10 10:13:58,719 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:58,890 INFO L180 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-09-10 10:13:58,929 INFO L175 PostProcessor]: Settings: Checked method=main [2018-09-10 10:13:58,946 INFO L431 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-10 10:13:58,954 INFO L175 PostProcessor]: Settings: Checked method=main [2018-09-10 10:13:58,967 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58 WrapperNode [2018-09-10 10:13:58,967 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-10 10:13:58,968 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-10 10:13:58,968 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-10 10:13:58,969 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-10 10:13:58,978 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:58,984 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:58,990 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-10 10:13:58,990 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-10 10:13:58,990 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-10 10:13:58,991 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-10 10:13:59,000 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:59,000 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:59,001 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:59,001 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:59,003 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:59,009 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:59,010 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (1/1) ... [2018-09-10 10:13:59,012 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-10 10:13:59,012 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-10 10:13:59,012 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-10 10:13:59,013 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-10 10:13:59,014 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-10 10:13:59,071 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-10 10:13:59,071 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-10 10:13:59,072 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-10 10:13:59,072 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-10 10:13:59,072 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-10 10:13:59,072 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-10 10:13:59,072 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assert [2018-09-10 10:13:59,072 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assert [2018-09-10 10:13:59,473 INFO L353 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-10 10:13:59,473 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 10:13:59 BoogieIcfgContainer [2018-09-10 10:13:59,474 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-10 10:13:59,475 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-10 10:13:59,475 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-10 10:13:59,485 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-10 10:13:59,486 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.09 10:13:58" (1/3) ... [2018-09-10 10:13:59,486 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@dd98b1b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 10:13:59, skipping insertion in model container [2018-09-10 10:13:59,487 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:58" (2/3) ... [2018-09-10 10:13:59,487 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@dd98b1b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 10:13:59, skipping insertion in model container [2018-09-10 10:13:59,487 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 10:13:59" (3/3) ... [2018-09-10 10:13:59,490 INFO L112 eAbstractionObserver]: Analyzing ICFG fragtest_simple_true-unreach-call_true-termination.i [2018-09-10 10:13:59,498 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-10 10:13:59,505 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-10 10:13:59,554 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-10 10:13:59,555 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-10 10:13:59,555 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-10 10:13:59,555 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-10 10:13:59,555 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-10 10:13:59,556 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-10 10:13:59,556 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-10 10:13:59,556 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-10 10:13:59,556 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-10 10:13:59,573 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states. [2018-09-10 10:13:59,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-09-10 10:13:59,579 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:13:59,580 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:13:59,581 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:13:59,587 INFO L82 PathProgramCache]: Analyzing trace with hash 62896836, now seen corresponding path program 1 times [2018-09-10 10:13:59,589 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:13:59,640 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:59,640 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:13:59,640 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:59,640 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:13:59,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:13:59,701 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:13:59,704 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:13:59,705 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-10 10:13:59,705 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:13:59,709 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-10 10:13:59,725 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-10 10:13:59,725 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-10 10:13:59,729 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 2 states. [2018-09-10 10:13:59,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:13:59,751 INFO L93 Difference]: Finished difference Result 52 states and 67 transitions. [2018-09-10 10:13:59,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-10 10:13:59,752 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 16 [2018-09-10 10:13:59,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:13:59,762 INFO L225 Difference]: With dead ends: 52 [2018-09-10 10:13:59,762 INFO L226 Difference]: Without dead ends: 25 [2018-09-10 10:13:59,765 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-10 10:13:59,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-09-10 10:13:59,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-09-10 10:13:59,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-09-10 10:13:59,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 28 transitions. [2018-09-10 10:13:59,803 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 28 transitions. Word has length 16 [2018-09-10 10:13:59,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:13:59,803 INFO L480 AbstractCegarLoop]: Abstraction has 25 states and 28 transitions. [2018-09-10 10:13:59,803 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-10 10:13:59,803 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2018-09-10 10:13:59,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-09-10 10:13:59,804 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:13:59,804 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:13:59,805 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:13:59,805 INFO L82 PathProgramCache]: Analyzing trace with hash -111227420, now seen corresponding path program 1 times [2018-09-10 10:13:59,805 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:13:59,806 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:59,807 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:13:59,807 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:59,807 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:13:59,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:13:59,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:13:59,935 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:13:59,935 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-09-10 10:13:59,936 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:13:59,937 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-10 10:13:59,938 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-10 10:13:59,938 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-09-10 10:13:59,938 INFO L87 Difference]: Start difference. First operand 25 states and 28 transitions. Second operand 5 states. [2018-09-10 10:14:00,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:00,322 INFO L93 Difference]: Finished difference Result 35 states and 38 transitions. [2018-09-10 10:14:00,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-10 10:14:00,323 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-09-10 10:14:00,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:00,325 INFO L225 Difference]: With dead ends: 35 [2018-09-10 10:14:00,325 INFO L226 Difference]: Without dead ends: 33 [2018-09-10 10:14:00,326 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-09-10 10:14:00,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-09-10 10:14:00,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2018-09-10 10:14:00,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-09-10 10:14:00,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 35 transitions. [2018-09-10 10:14:00,336 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 35 transitions. Word has length 20 [2018-09-10 10:14:00,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:00,336 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 35 transitions. [2018-09-10 10:14:00,336 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-10 10:14:00,336 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 35 transitions. [2018-09-10 10:14:00,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-09-10 10:14:00,337 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:00,338 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:00,338 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:00,338 INFO L82 PathProgramCache]: Analyzing trace with hash -1352658359, now seen corresponding path program 1 times [2018-09-10 10:14:00,339 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:00,340 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:00,340 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:00,340 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:00,340 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:00,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:00,432 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:00,432 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:14:00,432 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-09-10 10:14:00,432 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:14:00,433 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-10 10:14:00,433 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-10 10:14:00,434 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-09-10 10:14:00,434 INFO L87 Difference]: Start difference. First operand 32 states and 35 transitions. Second operand 5 states. [2018-09-10 10:14:00,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:00,827 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2018-09-10 10:14:00,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-10 10:14:00,828 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-09-10 10:14:00,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:00,831 INFO L225 Difference]: With dead ends: 57 [2018-09-10 10:14:00,831 INFO L226 Difference]: Without dead ends: 40 [2018-09-10 10:14:00,832 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-09-10 10:14:00,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-09-10 10:14:00,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 35. [2018-09-10 10:14:00,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-09-10 10:14:00,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 38 transitions. [2018-09-10 10:14:00,844 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 38 transitions. Word has length 29 [2018-09-10 10:14:00,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:00,844 INFO L480 AbstractCegarLoop]: Abstraction has 35 states and 38 transitions. [2018-09-10 10:14:00,844 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-10 10:14:00,844 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 38 transitions. [2018-09-10 10:14:00,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-09-10 10:14:00,846 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:00,846 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:00,846 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:00,846 INFO L82 PathProgramCache]: Analyzing trace with hash -38707475, now seen corresponding path program 1 times [2018-09-10 10:14:00,847 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:00,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:00,848 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:00,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:00,848 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:00,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:00,967 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:00,967 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:00,967 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:00,984 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:00,984 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:01,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:01,020 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:01,247 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:01,248 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:01,435 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:01,459 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:01,459 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:01,475 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:01,475 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:01,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:01,504 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:01,512 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:01,513 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:01,581 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:01,588 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:01,589 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6, 6, 6] total 13 [2018-09-10 10:14:01,589 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:01,590 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-10 10:14:01,590 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-10 10:14:01,590 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2018-09-10 10:14:01,591 INFO L87 Difference]: Start difference. First operand 35 states and 38 transitions. Second operand 11 states. [2018-09-10 10:14:02,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:02,281 INFO L93 Difference]: Finished difference Result 72 states and 83 transitions. [2018-09-10 10:14:02,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-10 10:14:02,283 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-09-10 10:14:02,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:02,284 INFO L225 Difference]: With dead ends: 72 [2018-09-10 10:14:02,284 INFO L226 Difference]: Without dead ends: 55 [2018-09-10 10:14:02,286 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 123 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=71, Invalid=271, Unknown=0, NotChecked=0, Total=342 [2018-09-10 10:14:02,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-09-10 10:14:02,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 45. [2018-09-10 10:14:02,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-09-10 10:14:02,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 49 transitions. [2018-09-10 10:14:02,295 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 49 transitions. Word has length 32 [2018-09-10 10:14:02,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:02,295 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 49 transitions. [2018-09-10 10:14:02,295 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-10 10:14:02,295 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 49 transitions. [2018-09-10 10:14:02,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-09-10 10:14:02,298 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:02,298 INFO L376 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:02,298 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:02,299 INFO L82 PathProgramCache]: Analyzing trace with hash -1515908604, now seen corresponding path program 2 times [2018-09-10 10:14:02,299 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:02,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:02,300 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:02,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:02,300 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:02,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:02,443 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 12 proven. 15 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-10 10:14:02,444 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:02,444 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:02,454 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:02,454 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:02,474 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:02,475 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:02,480 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:02,730 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:02,730 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:02,901 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:02,921 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:02,922 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:02,937 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:02,938 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:02,978 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:02,978 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:02,986 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:03,005 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:03,006 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:03,158 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:03,159 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:03,159 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 17 [2018-09-10 10:14:03,160 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:03,160 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-10 10:14:03,160 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-10 10:14:03,161 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2018-09-10 10:14:03,161 INFO L87 Difference]: Start difference. First operand 45 states and 49 transitions. Second operand 14 states. [2018-09-10 10:14:03,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:03,595 INFO L93 Difference]: Finished difference Result 92 states and 107 transitions. [2018-09-10 10:14:03,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-10 10:14:03,595 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-09-10 10:14:03,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:03,598 INFO L225 Difference]: With dead ends: 92 [2018-09-10 10:14:03,598 INFO L226 Difference]: Without dead ends: 70 [2018-09-10 10:14:03,599 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 168 SyntacticMatches, 6 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=125, Invalid=525, Unknown=0, NotChecked=0, Total=650 [2018-09-10 10:14:03,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-09-10 10:14:03,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 53. [2018-09-10 10:14:03,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-09-10 10:14:03,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2018-09-10 10:14:03,609 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 44 [2018-09-10 10:14:03,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:03,610 INFO L480 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2018-09-10 10:14:03,610 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-10 10:14:03,610 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2018-09-10 10:14:03,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-09-10 10:14:03,612 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:03,612 INFO L376 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:03,612 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:03,613 INFO L82 PathProgramCache]: Analyzing trace with hash 775099085, now seen corresponding path program 3 times [2018-09-10 10:14:03,613 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:03,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:03,614 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:03,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:03,614 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:03,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:03,784 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:03,784 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:03,785 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:03,793 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:03,794 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:03,835 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-10 10:14:03,836 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:03,839 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:03,984 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:03,984 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:04,095 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:04,115 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:04,116 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:04,132 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:04,132 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:04,191 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-10 10:14:04,191 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:04,196 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:04,213 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:04,213 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:04,327 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:04,329 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:04,329 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 14 [2018-09-10 10:14:04,329 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:04,330 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-10 10:14:04,330 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-10 10:14:04,330 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2018-09-10 10:14:04,331 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand 14 states. [2018-09-10 10:14:04,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:04,666 INFO L93 Difference]: Finished difference Result 103 states and 120 transitions. [2018-09-10 10:14:04,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-10 10:14:04,666 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 56 [2018-09-10 10:14:04,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:04,668 INFO L225 Difference]: With dead ends: 103 [2018-09-10 10:14:04,669 INFO L226 Difference]: Without dead ends: 76 [2018-09-10 10:14:04,669 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 206 SyntacticMatches, 14 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-09-10 10:14:04,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-09-10 10:14:04,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 56. [2018-09-10 10:14:04,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-09-10 10:14:04,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 61 transitions. [2018-09-10 10:14:04,680 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 61 transitions. Word has length 56 [2018-09-10 10:14:04,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:04,681 INFO L480 AbstractCegarLoop]: Abstraction has 56 states and 61 transitions. [2018-09-10 10:14:04,681 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-10 10:14:04,681 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 61 transitions. [2018-09-10 10:14:04,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-10 10:14:04,682 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:04,682 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:04,683 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:04,683 INFO L82 PathProgramCache]: Analyzing trace with hash -916783191, now seen corresponding path program 4 times [2018-09-10 10:14:04,683 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:04,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:04,684 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:04,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:04,685 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:04,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:04,838 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 35 proven. 31 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-09-10 10:14:04,839 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:04,839 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:04,847 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:04,847 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:04,873 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:04,873 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:04,876 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:04,968 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:04,968 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:05,072 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:05,092 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:05,092 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:05,108 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:05,108 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:05,163 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:05,163 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:05,169 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:05,182 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:05,182 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:05,296 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:05,298 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:05,298 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 9, 9, 9] total 14 [2018-09-10 10:14:05,298 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:05,299 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-10 10:14:05,299 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-10 10:14:05,299 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2018-09-10 10:14:05,300 INFO L87 Difference]: Start difference. First operand 56 states and 61 transitions. Second operand 13 states. [2018-09-10 10:14:05,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:05,548 INFO L93 Difference]: Finished difference Result 77 states and 85 transitions. [2018-09-10 10:14:05,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-10 10:14:05,549 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 59 [2018-09-10 10:14:05,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:05,551 INFO L225 Difference]: With dead ends: 77 [2018-09-10 10:14:05,551 INFO L226 Difference]: Without dead ends: 75 [2018-09-10 10:14:05,553 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 223 SyntacticMatches, 14 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2018-09-10 10:14:05,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-09-10 10:14:05,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 68. [2018-09-10 10:14:05,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-09-10 10:14:05,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 74 transitions. [2018-09-10 10:14:05,563 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 74 transitions. Word has length 59 [2018-09-10 10:14:05,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:05,564 INFO L480 AbstractCegarLoop]: Abstraction has 68 states and 74 transitions. [2018-09-10 10:14:05,564 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-10 10:14:05,564 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 74 transitions. [2018-09-10 10:14:05,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-09-10 10:14:05,565 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:05,565 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:05,566 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:05,566 INFO L82 PathProgramCache]: Analyzing trace with hash 928258569, now seen corresponding path program 5 times [2018-09-10 10:14:05,566 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:05,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:05,567 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:05,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:05,567 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:05,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:05,917 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 75 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:05,917 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:05,917 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:05,925 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:05,926 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:06,004 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-09-10 10:14:06,005 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:06,008 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:06,651 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 75 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:06,651 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:06,849 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 75 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:06,870 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:06,870 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:06,889 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:06,889 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:06,976 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-09-10 10:14:06,976 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:06,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:06,999 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 86 proven. 30 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-09-10 10:14:06,999 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:07,139 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 72 proven. 30 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-09-10 10:14:07,142 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:07,142 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 12, 12] total 21 [2018-09-10 10:14:07,142 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:07,143 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-10 10:14:07,143 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-10 10:14:07,144 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2018-09-10 10:14:07,144 INFO L87 Difference]: Start difference. First operand 68 states and 74 transitions. Second operand 19 states. [2018-09-10 10:14:07,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:07,676 INFO L93 Difference]: Finished difference Result 135 states and 156 transitions. [2018-09-10 10:14:07,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-10 10:14:07,680 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 77 [2018-09-10 10:14:07,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:07,681 INFO L225 Difference]: With dead ends: 135 [2018-09-10 10:14:07,681 INFO L226 Difference]: Without dead ends: 96 [2018-09-10 10:14:07,682 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 324 GetRequests, 283 SyntacticMatches, 17 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 253 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=192, Invalid=458, Unknown=0, NotChecked=0, Total=650 [2018-09-10 10:14:07,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-09-10 10:14:07,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 71. [2018-09-10 10:14:07,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-09-10 10:14:07,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 77 transitions. [2018-09-10 10:14:07,692 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 77 transitions. Word has length 77 [2018-09-10 10:14:07,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:07,692 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 77 transitions. [2018-09-10 10:14:07,692 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-10 10:14:07,692 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 77 transitions. [2018-09-10 10:14:07,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-09-10 10:14:07,694 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:07,694 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:07,694 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:07,694 INFO L82 PathProgramCache]: Analyzing trace with hash -846983507, now seen corresponding path program 6 times [2018-09-10 10:14:07,695 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:07,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:07,695 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:07,696 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:07,696 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:07,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:07,966 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:07,967 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:07,967 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:07,974 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:07,974 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:08,001 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2018-09-10 10:14:08,001 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:08,004 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:08,264 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:08,265 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:08,356 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:08,381 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:08,381 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:08,396 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:08,397 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:08,486 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2018-09-10 10:14:08,486 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:08,491 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:08,507 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:08,507 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:08,689 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:08,691 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:08,691 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 20 [2018-09-10 10:14:08,692 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:08,692 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-10 10:14:08,693 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-10 10:14:08,693 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2018-09-10 10:14:08,693 INFO L87 Difference]: Start difference. First operand 71 states and 77 transitions. Second operand 20 states. [2018-09-10 10:14:09,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:09,188 INFO L93 Difference]: Finished difference Result 141 states and 165 transitions. [2018-09-10 10:14:09,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-10 10:14:09,189 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 80 [2018-09-10 10:14:09,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:09,190 INFO L225 Difference]: With dead ends: 141 [2018-09-10 10:14:09,190 INFO L226 Difference]: Without dead ends: 104 [2018-09-10 10:14:09,191 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 338 GetRequests, 292 SyntacticMatches, 22 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 245 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-09-10 10:14:09,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-09-10 10:14:09,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 74. [2018-09-10 10:14:09,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-09-10 10:14:09,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 80 transitions. [2018-09-10 10:14:09,201 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 80 transitions. Word has length 80 [2018-09-10 10:14:09,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:09,201 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 80 transitions. [2018-09-10 10:14:09,202 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-10 10:14:09,202 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 80 transitions. [2018-09-10 10:14:09,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-09-10 10:14:09,203 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:09,203 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:09,204 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:09,204 INFO L82 PathProgramCache]: Analyzing trace with hash 1143613321, now seen corresponding path program 7 times [2018-09-10 10:14:09,204 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:09,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:09,205 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:09,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:09,205 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:09,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:09,375 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 72 proven. 78 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-10 10:14:09,375 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:09,376 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:09,383 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:09,383 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:09,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:09,414 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:09,475 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:09,476 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:09,593 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:09,613 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:09,613 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:09,628 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:09,628 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:09,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:09,691 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:09,705 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:09,706 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:09,808 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:09,810 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:09,810 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11, 11, 11] total 15 [2018-09-10 10:14:09,810 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:09,810 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-10 10:14:09,811 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-10 10:14:09,811 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-09-10 10:14:09,812 INFO L87 Difference]: Start difference. First operand 74 states and 80 transitions. Second operand 14 states. [2018-09-10 10:14:10,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:10,120 INFO L93 Difference]: Finished difference Result 90 states and 97 transitions. [2018-09-10 10:14:10,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-10 10:14:10,120 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 83 [2018-09-10 10:14:10,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:10,122 INFO L225 Difference]: With dead ends: 90 [2018-09-10 10:14:10,122 INFO L226 Difference]: Without dead ends: 88 [2018-09-10 10:14:10,123 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 351 GetRequests, 314 SyntacticMatches, 22 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 162 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2018-09-10 10:14:10,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-09-10 10:14:10,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-09-10 10:14:10,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-09-10 10:14:10,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 95 transitions. [2018-09-10 10:14:10,131 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 95 transitions. Word has length 83 [2018-09-10 10:14:10,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:10,132 INFO L480 AbstractCegarLoop]: Abstraction has 88 states and 95 transitions. [2018-09-10 10:14:10,132 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-10 10:14:10,132 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 95 transitions. [2018-09-10 10:14:10,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-09-10 10:14:10,134 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:10,134 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:10,134 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:10,134 INFO L82 PathProgramCache]: Analyzing trace with hash 643631593, now seen corresponding path program 8 times [2018-09-10 10:14:10,135 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:10,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:10,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:10,136 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:10,136 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:10,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:10,355 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 140 proven. 63 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:10,356 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:10,356 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:10,364 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:10,364 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:10,403 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:10,404 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:10,406 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:10,593 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 159 proven. 63 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2018-09-10 10:14:10,593 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:10,692 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 137 proven. 63 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-09-10 10:14:10,712 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:10,713 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:10,727 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:10,727 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:10,800 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:10,801 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:10,805 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:10,824 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 159 proven. 63 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2018-09-10 10:14:10,824 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:10,937 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 137 proven. 63 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-09-10 10:14:10,948 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:10,948 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16, 16, 16] total 24 [2018-09-10 10:14:10,948 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:10,949 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-10 10:14:10,949 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-10 10:14:10,950 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2018-09-10 10:14:10,950 INFO L87 Difference]: Start difference. First operand 88 states and 95 transitions. Second operand 24 states. [2018-09-10 10:14:11,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:11,276 INFO L93 Difference]: Finished difference Result 175 states and 203 transitions. [2018-09-10 10:14:11,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-10 10:14:11,276 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 101 [2018-09-10 10:14:11,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:11,278 INFO L225 Difference]: With dead ends: 175 [2018-09-10 10:14:11,278 INFO L226 Difference]: Without dead ends: 126 [2018-09-10 10:14:11,279 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 426 GetRequests, 371 SyntacticMatches, 26 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 375 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=262, Invalid=668, Unknown=0, NotChecked=0, Total=930 [2018-09-10 10:14:11,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-09-10 10:14:11,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 91. [2018-09-10 10:14:11,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-09-10 10:14:11,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 98 transitions. [2018-09-10 10:14:11,288 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 98 transitions. Word has length 101 [2018-09-10 10:14:11,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:11,289 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 98 transitions. [2018-09-10 10:14:11,289 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-10 10:14:11,289 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 98 transitions. [2018-09-10 10:14:11,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-09-10 10:14:11,292 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:11,292 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:11,292 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:11,292 INFO L82 PathProgramCache]: Analyzing trace with hash -1746775411, now seen corresponding path program 9 times [2018-09-10 10:14:11,293 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:11,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:11,293 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:11,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:11,294 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:11,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:11,536 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:11,537 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:11,537 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:11,546 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:11,546 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:11,586 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-09-10 10:14:11,586 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:11,590 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:11,796 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:11,796 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:12,099 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:12,120 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:12,120 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:12,136 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:12,136 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:12,270 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-09-10 10:14:12,270 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:12,275 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:12,308 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:12,309 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:12,433 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:12,434 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:12,435 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 26 [2018-09-10 10:14:12,435 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:12,435 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-10 10:14:12,435 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-10 10:14:12,436 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=481, Unknown=0, NotChecked=0, Total=650 [2018-09-10 10:14:12,436 INFO L87 Difference]: Start difference. First operand 91 states and 98 transitions. Second operand 26 states. [2018-09-10 10:14:12,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:12,739 INFO L93 Difference]: Finished difference Result 181 states and 212 transitions. [2018-09-10 10:14:12,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-10 10:14:12,739 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 104 [2018-09-10 10:14:12,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:12,741 INFO L225 Difference]: With dead ends: 181 [2018-09-10 10:14:12,741 INFO L226 Difference]: Without dead ends: 134 [2018-09-10 10:14:12,742 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 440 GetRequests, 378 SyntacticMatches, 30 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 462 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-09-10 10:14:12,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-09-10 10:14:12,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 94. [2018-09-10 10:14:12,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-09-10 10:14:12,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 101 transitions. [2018-09-10 10:14:12,751 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 101 transitions. Word has length 104 [2018-09-10 10:14:12,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:12,751 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 101 transitions. [2018-09-10 10:14:12,752 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-10 10:14:12,752 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 101 transitions. [2018-09-10 10:14:12,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-09-10 10:14:12,753 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:12,753 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:12,754 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:12,754 INFO L82 PathProgramCache]: Analyzing trace with hash 490903401, now seen corresponding path program 10 times [2018-09-10 10:14:12,754 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:12,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:12,755 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:12,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:12,755 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:12,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:13,037 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 121 proven. 145 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-09-10 10:14:13,038 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:13,038 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:13,047 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:13,047 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:13,082 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:13,082 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:13,084 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:13,148 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:13,148 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:13,380 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:13,400 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:13,401 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:13,418 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:13,418 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:13,505 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:13,506 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:13,510 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:13,527 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:13,527 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:13,821 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:13,822 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:13,823 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 13, 13, 13] total 18 [2018-09-10 10:14:13,823 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:13,823 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-10 10:14:13,823 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-10 10:14:13,823 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=224, Unknown=0, NotChecked=0, Total=306 [2018-09-10 10:14:13,824 INFO L87 Difference]: Start difference. First operand 94 states and 101 transitions. Second operand 17 states. [2018-09-10 10:14:14,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:14,083 INFO L93 Difference]: Finished difference Result 115 states and 125 transitions. [2018-09-10 10:14:14,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-10 10:14:14,084 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 107 [2018-09-10 10:14:14,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:14,086 INFO L225 Difference]: With dead ends: 115 [2018-09-10 10:14:14,086 INFO L226 Difference]: Without dead ends: 113 [2018-09-10 10:14:14,087 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 403 SyntacticMatches, 30 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2018-09-10 10:14:14,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-09-10 10:14:14,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 108. [2018-09-10 10:14:14,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-09-10 10:14:14,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 116 transitions. [2018-09-10 10:14:14,095 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 116 transitions. Word has length 107 [2018-09-10 10:14:14,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:14,096 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 116 transitions. [2018-09-10 10:14:14,096 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-10 10:14:14,096 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 116 transitions. [2018-09-10 10:14:14,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-09-10 10:14:14,097 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:14,098 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:14,098 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:14,098 INFO L82 PathProgramCache]: Analyzing trace with hash -1091747383, now seen corresponding path program 11 times [2018-09-10 10:14:14,098 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:14,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:14,099 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:14,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:14,099 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:14,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:15,044 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 225 proven. 108 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:15,044 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:15,044 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:15,051 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:15,051 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:15,098 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-10 10:14:15,098 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:15,101 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:15,380 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 225 proven. 108 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:15,381 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:15,575 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 225 proven. 108 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:15,596 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:15,596 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:15,611 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:15,611 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:15,792 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-10 10:14:15,792 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:15,797 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:15,823 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 252 proven. 108 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2018-09-10 10:14:15,824 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:16,070 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 222 proven. 108 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-09-10 10:14:16,072 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:16,072 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 20, 20] total 33 [2018-09-10 10:14:16,072 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:16,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-10 10:14:16,073 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-10 10:14:16,074 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=273, Invalid=783, Unknown=0, NotChecked=0, Total=1056 [2018-09-10 10:14:16,074 INFO L87 Difference]: Start difference. First operand 108 states and 116 transitions. Second operand 31 states. [2018-09-10 10:14:16,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:16,581 INFO L93 Difference]: Finished difference Result 215 states and 250 transitions. [2018-09-10 10:14:16,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-10 10:14:16,582 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 125 [2018-09-10 10:14:16,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:16,583 INFO L225 Difference]: With dead ends: 215 [2018-09-10 10:14:16,583 INFO L226 Difference]: Without dead ends: 156 [2018-09-10 10:14:16,585 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 528 GetRequests, 455 SyntacticMatches, 33 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 767 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=480, Invalid=1242, Unknown=0, NotChecked=0, Total=1722 [2018-09-10 10:14:16,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-09-10 10:14:16,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 111. [2018-09-10 10:14:16,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-09-10 10:14:16,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 119 transitions. [2018-09-10 10:14:16,594 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 119 transitions. Word has length 125 [2018-09-10 10:14:16,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:16,595 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 119 transitions. [2018-09-10 10:14:16,595 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-10 10:14:16,595 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 119 transitions. [2018-09-10 10:14:16,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-09-10 10:14:16,596 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:16,596 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:16,597 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:16,597 INFO L82 PathProgramCache]: Analyzing trace with hash 1980489325, now seen corresponding path program 12 times [2018-09-10 10:14:16,597 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:16,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:16,598 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:16,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:16,598 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:16,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:17,040 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:17,040 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:17,040 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:17,047 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:17,047 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:17,097 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-09-10 10:14:17,097 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:17,101 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:17,407 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:17,408 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:17,651 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:17,671 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:17,671 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:17,700 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:17,700 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:17,885 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-09-10 10:14:17,885 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:17,890 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:17,917 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:17,918 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:19,093 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:19,094 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:19,094 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 32 [2018-09-10 10:14:19,094 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:19,095 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-09-10 10:14:19,095 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-09-10 10:14:19,096 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=251, Invalid=741, Unknown=0, NotChecked=0, Total=992 [2018-09-10 10:14:19,096 INFO L87 Difference]: Start difference. First operand 111 states and 119 transitions. Second operand 32 states. [2018-09-10 10:14:19,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:19,713 INFO L93 Difference]: Finished difference Result 221 states and 259 transitions. [2018-09-10 10:14:19,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-10 10:14:19,713 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 128 [2018-09-10 10:14:19,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:19,715 INFO L225 Difference]: With dead ends: 221 [2018-09-10 10:14:19,715 INFO L226 Difference]: Without dead ends: 164 [2018-09-10 10:14:19,716 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 542 GetRequests, 464 SyntacticMatches, 38 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 747 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-09-10 10:14:19,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-09-10 10:14:19,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 114. [2018-09-10 10:14:19,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-09-10 10:14:19,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 122 transitions. [2018-09-10 10:14:19,724 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 122 transitions. Word has length 128 [2018-09-10 10:14:19,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:19,725 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 122 transitions. [2018-09-10 10:14:19,725 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-09-10 10:14:19,725 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 122 transitions. [2018-09-10 10:14:19,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-09-10 10:14:19,726 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:19,726 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:19,726 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:19,727 INFO L82 PathProgramCache]: Analyzing trace with hash 1231179593, now seen corresponding path program 13 times [2018-09-10 10:14:19,727 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:19,727 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:19,727 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:19,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:19,728 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:19,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:20,012 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 182 proven. 232 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-09-10 10:14:20,012 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:20,012 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:20,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:20,025 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:20,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:20,066 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:20,120 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:20,120 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:20,236 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:20,258 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:20,258 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:20,273 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:20,273 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:20,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:20,370 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:20,387 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:20,387 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:20,513 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:20,514 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:20,514 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15, 15, 15] total 19 [2018-09-10 10:14:20,514 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:20,515 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-10 10:14:20,515 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-10 10:14:20,515 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=239, Unknown=0, NotChecked=0, Total=342 [2018-09-10 10:14:20,515 INFO L87 Difference]: Start difference. First operand 114 states and 122 transitions. Second operand 18 states. [2018-09-10 10:14:20,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:20,693 INFO L93 Difference]: Finished difference Result 130 states and 139 transitions. [2018-09-10 10:14:20,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-10 10:14:20,694 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 131 [2018-09-10 10:14:20,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:20,696 INFO L225 Difference]: With dead ends: 130 [2018-09-10 10:14:20,696 INFO L226 Difference]: Without dead ends: 128 [2018-09-10 10:14:20,697 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 551 GetRequests, 494 SyntacticMatches, 38 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 350 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=116, Invalid=304, Unknown=0, NotChecked=0, Total=420 [2018-09-10 10:14:20,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-09-10 10:14:20,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-09-10 10:14:20,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-09-10 10:14:20,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-09-10 10:14:20,704 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 131 [2018-09-10 10:14:20,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:20,705 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-09-10 10:14:20,705 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-10 10:14:20,705 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-09-10 10:14:20,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-09-10 10:14:20,706 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:20,706 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:20,707 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:20,707 INFO L82 PathProgramCache]: Analyzing trace with hash -2109554263, now seen corresponding path program 14 times [2018-09-10 10:14:20,707 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:20,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:20,708 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:20,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:20,708 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:20,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:21,543 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 330 proven. 165 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:21,544 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:21,544 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:21,551 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:21,551 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:21,599 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:21,599 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:21,602 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:21,907 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 365 proven. 165 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2018-09-10 10:14:21,908 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:22,487 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 327 proven. 165 refuted. 0 times theorem prover too weak. 223 trivial. 0 not checked. [2018-09-10 10:14:22,509 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:22,509 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:22,524 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:22,524 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:22,629 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:22,629 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:22,635 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:22,669 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 365 proven. 165 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2018-09-10 10:14:22,670 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:23,092 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 327 proven. 165 refuted. 0 times theorem prover too weak. 223 trivial. 0 not checked. [2018-09-10 10:14:23,094 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:23,094 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 24, 24, 24, 24] total 36 [2018-09-10 10:14:23,094 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:23,095 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-09-10 10:14:23,095 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-09-10 10:14:23,097 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=311, Invalid=949, Unknown=0, NotChecked=0, Total=1260 [2018-09-10 10:14:23,097 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 36 states. [2018-09-10 10:14:23,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:23,857 INFO L93 Difference]: Finished difference Result 255 states and 297 transitions. [2018-09-10 10:14:23,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-10 10:14:23,858 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 149 [2018-09-10 10:14:23,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:23,860 INFO L225 Difference]: With dead ends: 255 [2018-09-10 10:14:23,860 INFO L226 Difference]: Without dead ends: 186 [2018-09-10 10:14:23,861 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 630 GetRequests, 543 SyntacticMatches, 42 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 965 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=586, Invalid=1576, Unknown=0, NotChecked=0, Total=2162 [2018-09-10 10:14:23,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-09-10 10:14:23,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 131. [2018-09-10 10:14:23,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-09-10 10:14:23,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 140 transitions. [2018-09-10 10:14:23,886 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 140 transitions. Word has length 149 [2018-09-10 10:14:23,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:23,887 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 140 transitions. [2018-09-10 10:14:23,887 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-09-10 10:14:23,887 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 140 transitions. [2018-09-10 10:14:23,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-09-10 10:14:23,888 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:23,888 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:23,889 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:23,889 INFO L82 PathProgramCache]: Analyzing trace with hash 1564389965, now seen corresponding path program 15 times [2018-09-10 10:14:23,889 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:23,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:23,890 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:23,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:23,890 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:23,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:25,434 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:25,435 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:25,435 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:25,442 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:25,443 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:25,510 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-09-10 10:14:25,511 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:25,514 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:25,972 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:25,972 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:26,209 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:26,231 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:26,231 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:26,247 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:26,247 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:26,502 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-09-10 10:14:26,503 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:26,510 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:26,543 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:26,543 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:26,786 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:26,788 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:26,788 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 38 [2018-09-10 10:14:26,788 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:26,789 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-10 10:14:26,789 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-10 10:14:26,789 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=349, Invalid=1057, Unknown=0, NotChecked=0, Total=1406 [2018-09-10 10:14:26,790 INFO L87 Difference]: Start difference. First operand 131 states and 140 transitions. Second operand 38 states. [2018-09-10 10:14:27,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:27,364 INFO L93 Difference]: Finished difference Result 261 states and 306 transitions. [2018-09-10 10:14:27,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-09-10 10:14:27,364 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 152 [2018-09-10 10:14:27,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:27,366 INFO L225 Difference]: With dead ends: 261 [2018-09-10 10:14:27,366 INFO L226 Difference]: Without dead ends: 194 [2018-09-10 10:14:27,367 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 644 GetRequests, 550 SyntacticMatches, 46 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1100 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-09-10 10:14:27,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-09-10 10:14:27,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 134. [2018-09-10 10:14:27,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-09-10 10:14:27,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 143 transitions. [2018-09-10 10:14:27,377 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 143 transitions. Word has length 152 [2018-09-10 10:14:27,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:27,377 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 143 transitions. [2018-09-10 10:14:27,377 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-10 10:14:27,377 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 143 transitions. [2018-09-10 10:14:27,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-09-10 10:14:27,379 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:27,379 INFO L376 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:27,379 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:27,379 INFO L82 PathProgramCache]: Analyzing trace with hash -909684951, now seen corresponding path program 16 times [2018-09-10 10:14:27,379 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:27,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:27,380 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:27,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:27,380 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:27,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:27,630 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 255 proven. 339 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-09-10 10:14:27,631 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:27,631 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:27,641 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:27,642 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:27,691 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:27,691 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:27,695 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:28,441 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:28,441 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:28,608 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:28,630 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:28,630 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:28,650 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:28,650 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:28,791 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:28,792 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:28,800 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:28,833 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:28,833 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:29,811 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:29,812 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:29,812 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 17, 17, 17] total 22 [2018-09-10 10:14:29,813 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:29,813 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-10 10:14:29,813 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-10 10:14:29,814 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=326, Unknown=0, NotChecked=0, Total=462 [2018-09-10 10:14:29,814 INFO L87 Difference]: Start difference. First operand 134 states and 143 transitions. Second operand 21 states. [2018-09-10 10:14:30,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:30,371 INFO L93 Difference]: Finished difference Result 155 states and 167 transitions. [2018-09-10 10:14:30,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-10 10:14:30,371 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 155 [2018-09-10 10:14:30,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:30,374 INFO L225 Difference]: With dead ends: 155 [2018-09-10 10:14:30,374 INFO L226 Difference]: Without dead ends: 153 [2018-09-10 10:14:30,374 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 651 GetRequests, 583 SyntacticMatches, 46 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 489 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=149, Invalid=403, Unknown=0, NotChecked=0, Total=552 [2018-09-10 10:14:30,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-09-10 10:14:30,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 148. [2018-09-10 10:14:30,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-09-10 10:14:30,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 158 transitions. [2018-09-10 10:14:30,384 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 158 transitions. Word has length 155 [2018-09-10 10:14:30,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:30,385 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 158 transitions. [2018-09-10 10:14:30,385 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-10 10:14:30,385 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 158 transitions. [2018-09-10 10:14:30,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-09-10 10:14:30,386 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:30,386 INFO L376 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 13, 13, 13, 13, 13, 13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:30,386 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:30,387 INFO L82 PathProgramCache]: Analyzing trace with hash -568620663, now seen corresponding path program 17 times [2018-09-10 10:14:30,387 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:30,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:30,388 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:30,388 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:30,388 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:30,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:31,081 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:31,081 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:31,081 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:31,107 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:31,107 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:31,170 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-09-10 10:14:31,170 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:31,175 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:31,755 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:31,755 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:32,054 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:32,075 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:32,075 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:32,090 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:32,091 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:32,399 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-09-10 10:14:32,399 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:32,406 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:32,450 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:32,450 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:32,793 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:32,795 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:32,795 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 45 [2018-09-10 10:14:32,795 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:32,796 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-09-10 10:14:32,796 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-09-10 10:14:32,797 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=493, Invalid=1487, Unknown=0, NotChecked=0, Total=1980 [2018-09-10 10:14:32,797 INFO L87 Difference]: Start difference. First operand 148 states and 158 transitions. Second operand 43 states. [2018-09-10 10:14:33,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:33,373 INFO L93 Difference]: Finished difference Result 295 states and 344 transitions. [2018-09-10 10:14:33,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-10 10:14:33,374 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 173 [2018-09-10 10:14:33,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:33,376 INFO L225 Difference]: With dead ends: 295 [2018-09-10 10:14:33,376 INFO L226 Difference]: Without dead ends: 216 [2018-09-10 10:14:33,377 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 732 GetRequests, 628 SyntacticMatches, 48 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1540 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=896, Invalid=2410, Unknown=0, NotChecked=0, Total=3306 [2018-09-10 10:14:33,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-09-10 10:14:33,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 151. [2018-09-10 10:14:33,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-09-10 10:14:33,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 161 transitions. [2018-09-10 10:14:33,388 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 161 transitions. Word has length 173 [2018-09-10 10:14:33,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:33,388 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 161 transitions. [2018-09-10 10:14:33,388 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-09-10 10:14:33,388 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 161 transitions. [2018-09-10 10:14:33,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-09-10 10:14:33,389 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:33,390 INFO L376 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 14, 14, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:33,390 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:33,390 INFO L82 PathProgramCache]: Analyzing trace with hash 792251949, now seen corresponding path program 18 times [2018-09-10 10:14:33,390 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:33,391 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:33,391 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:33,391 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:33,391 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:33,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:33,883 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:33,884 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:33,884 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:33,891 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:33,891 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:33,956 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-09-10 10:14:33,956 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:33,960 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:34,818 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:34,818 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:35,179 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:35,199 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:35,199 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:35,214 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:35,215 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:35,523 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-09-10 10:14:35,524 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:35,531 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:35,570 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:35,570 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:36,051 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:36,052 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:36,053 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 44 [2018-09-10 10:14:36,053 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:36,054 INFO L459 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-09-10 10:14:36,054 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-09-10 10:14:36,054 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=463, Invalid=1429, Unknown=0, NotChecked=0, Total=1892 [2018-09-10 10:14:36,055 INFO L87 Difference]: Start difference. First operand 151 states and 161 transitions. Second operand 44 states. [2018-09-10 10:14:37,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:37,092 INFO L93 Difference]: Finished difference Result 301 states and 353 transitions. [2018-09-10 10:14:37,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-09-10 10:14:37,092 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 176 [2018-09-10 10:14:37,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:37,094 INFO L225 Difference]: With dead ends: 301 [2018-09-10 10:14:37,095 INFO L226 Difference]: Without dead ends: 224 [2018-09-10 10:14:37,096 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 746 GetRequests, 636 SyntacticMatches, 54 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1521 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=897, Invalid=2409, Unknown=0, NotChecked=0, Total=3306 [2018-09-10 10:14:37,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-09-10 10:14:37,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 154. [2018-09-10 10:14:37,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-10 10:14:37,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 164 transitions. [2018-09-10 10:14:37,107 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 164 transitions. Word has length 176 [2018-09-10 10:14:37,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:37,107 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 164 transitions. [2018-09-10 10:14:37,107 INFO L481 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-09-10 10:14:37,107 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 164 transitions. [2018-09-10 10:14:37,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2018-09-10 10:14:37,108 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:37,108 INFO L376 BasicCegarLoop]: trace histogram [15, 15, 14, 14, 14, 14, 14, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:37,109 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:37,109 INFO L82 PathProgramCache]: Analyzing trace with hash -1943038199, now seen corresponding path program 19 times [2018-09-10 10:14:37,109 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:37,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:37,110 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:37,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:37,110 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:37,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:37,394 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 340 proven. 466 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-09-10 10:14:37,394 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:37,394 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:37,401 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:37,402 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:37,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:37,463 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:37,583 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:37,583 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:37,785 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:37,807 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:37,807 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:37,822 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:37,823 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:37,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:37,950 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:37,984 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:37,984 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:38,418 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:14:38,420 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:38,420 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19, 19, 19] total 23 [2018-09-10 10:14:38,420 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:38,421 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-10 10:14:38,421 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-10 10:14:38,421 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=341, Unknown=0, NotChecked=0, Total=506 [2018-09-10 10:14:38,421 INFO L87 Difference]: Start difference. First operand 154 states and 164 transitions. Second operand 22 states. [2018-09-10 10:14:38,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:38,637 INFO L93 Difference]: Finished difference Result 170 states and 181 transitions. [2018-09-10 10:14:38,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-10 10:14:38,640 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 179 [2018-09-10 10:14:38,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:38,642 INFO L225 Difference]: With dead ends: 170 [2018-09-10 10:14:38,642 INFO L226 Difference]: Without dead ends: 168 [2018-09-10 10:14:38,643 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 751 GetRequests, 674 SyntacticMatches, 54 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 602 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=178, Invalid=422, Unknown=0, NotChecked=0, Total=600 [2018-09-10 10:14:38,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-09-10 10:14:38,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2018-09-10 10:14:38,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-09-10 10:14:38,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 179 transitions. [2018-09-10 10:14:38,653 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 179 transitions. Word has length 179 [2018-09-10 10:14:38,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:38,654 INFO L480 AbstractCegarLoop]: Abstraction has 168 states and 179 transitions. [2018-09-10 10:14:38,654 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-10 10:14:38,654 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 179 transitions. [2018-09-10 10:14:38,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-09-10 10:14:38,655 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:38,656 INFO L376 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:38,656 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:38,656 INFO L82 PathProgramCache]: Analyzing trace with hash 213227881, now seen corresponding path program 20 times [2018-09-10 10:14:38,656 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:38,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:38,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:38,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:38,657 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:38,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:39,211 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 600 proven. 315 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:14:39,212 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:39,212 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:39,219 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:39,219 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:39,295 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:39,296 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:39,300 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:40,001 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 651 proven. 315 refuted. 0 times theorem prover too weak. 369 trivial. 0 not checked. [2018-09-10 10:14:40,001 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:40,413 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 597 proven. 315 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2018-09-10 10:14:40,434 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:40,434 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:40,450 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:40,450 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:40,607 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:40,607 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:40,618 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:40,729 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 651 proven. 315 refuted. 0 times theorem prover too weak. 369 trivial. 0 not checked. [2018-09-10 10:14:40,730 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:41,251 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 597 proven. 315 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2018-09-10 10:14:41,252 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:41,252 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 32, 32, 32, 32] total 48 [2018-09-10 10:14:41,253 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:41,253 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-09-10 10:14:41,253 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-09-10 10:14:41,254 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=543, Invalid=1713, Unknown=0, NotChecked=0, Total=2256 [2018-09-10 10:14:41,254 INFO L87 Difference]: Start difference. First operand 168 states and 179 transitions. Second operand 48 states. [2018-09-10 10:14:42,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:42,639 INFO L93 Difference]: Finished difference Result 335 states and 391 transitions. [2018-09-10 10:14:42,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-09-10 10:14:42,640 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 197 [2018-09-10 10:14:42,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:42,641 INFO L225 Difference]: With dead ends: 335 [2018-09-10 10:14:42,642 INFO L226 Difference]: Without dead ends: 246 [2018-09-10 10:14:42,643 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 834 GetRequests, 715 SyntacticMatches, 58 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1827 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1038, Invalid=2868, Unknown=0, NotChecked=0, Total=3906 [2018-09-10 10:14:42,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-09-10 10:14:42,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 171. [2018-09-10 10:14:42,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-09-10 10:14:42,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 182 transitions. [2018-09-10 10:14:42,655 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 182 transitions. Word has length 197 [2018-09-10 10:14:42,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:42,656 INFO L480 AbstractCegarLoop]: Abstraction has 171 states and 182 transitions. [2018-09-10 10:14:42,656 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-09-10 10:14:42,656 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 182 transitions. [2018-09-10 10:14:42,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-09-10 10:14:42,657 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:42,657 INFO L376 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:42,658 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:42,658 INFO L82 PathProgramCache]: Analyzing trace with hash -1707593203, now seen corresponding path program 21 times [2018-09-10 10:14:42,658 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:42,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:42,659 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:42,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:42,659 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:42,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:43,209 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:14:43,210 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:43,210 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:43,217 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:43,217 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:43,293 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-09-10 10:14:43,293 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:43,297 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:43,776 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:14:43,776 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:44,167 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:14:44,187 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:44,187 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:44,202 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:44,203 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:44,595 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-09-10 10:14:44,595 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:44,601 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:44,649 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:14:44,650 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:45,375 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:14:45,377 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:45,377 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 50 [2018-09-10 10:14:45,377 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:45,378 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-09-10 10:14:45,378 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-09-10 10:14:45,379 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=593, Invalid=1857, Unknown=0, NotChecked=0, Total=2450 [2018-09-10 10:14:45,380 INFO L87 Difference]: Start difference. First operand 171 states and 182 transitions. Second operand 50 states. [2018-09-10 10:14:47,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:47,578 INFO L93 Difference]: Finished difference Result 341 states and 400 transitions. [2018-09-10 10:14:47,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-09-10 10:14:47,578 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 200 [2018-09-10 10:14:47,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:47,580 INFO L225 Difference]: With dead ends: 341 [2018-09-10 10:14:47,580 INFO L226 Difference]: Without dead ends: 254 [2018-09-10 10:14:47,582 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 848 GetRequests, 722 SyntacticMatches, 62 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2010 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1153, Invalid=3137, Unknown=0, NotChecked=0, Total=4290 [2018-09-10 10:14:47,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-09-10 10:14:47,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 174. [2018-09-10 10:14:47,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-09-10 10:14:47,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 185 transitions. [2018-09-10 10:14:47,594 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 185 transitions. Word has length 200 [2018-09-10 10:14:47,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:47,595 INFO L480 AbstractCegarLoop]: Abstraction has 174 states and 185 transitions. [2018-09-10 10:14:47,595 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-09-10 10:14:47,595 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 185 transitions. [2018-09-10 10:14:47,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-09-10 10:14:47,596 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:47,596 INFO L376 BasicCegarLoop]: trace histogram [17, 17, 16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:47,597 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:47,597 INFO L82 PathProgramCache]: Analyzing trace with hash 1255745257, now seen corresponding path program 22 times [2018-09-10 10:14:47,597 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:47,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:47,598 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:47,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:47,598 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:47,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:48,606 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 437 proven. 613 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-09-10 10:14:48,606 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:48,606 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:48,615 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:48,615 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:48,675 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:48,675 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:48,679 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:48,776 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:14:48,776 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:49,023 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:14:49,044 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:49,044 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:49,059 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:49,059 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:49,225 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:49,225 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:49,233 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:49,273 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:14:49,273 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:49,628 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:14:49,629 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:49,630 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 21, 21, 21] total 26 [2018-09-10 10:14:49,630 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:49,630 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-10 10:14:49,630 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-10 10:14:49,631 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=444, Unknown=0, NotChecked=0, Total=650 [2018-09-10 10:14:49,631 INFO L87 Difference]: Start difference. First operand 174 states and 185 transitions. Second operand 25 states. [2018-09-10 10:14:50,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:50,339 INFO L93 Difference]: Finished difference Result 195 states and 209 transitions. [2018-09-10 10:14:50,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-10 10:14:50,339 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 203 [2018-09-10 10:14:50,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:50,342 INFO L225 Difference]: With dead ends: 195 [2018-09-10 10:14:50,342 INFO L226 Difference]: Without dead ends: 193 [2018-09-10 10:14:50,342 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 851 GetRequests, 763 SyntacticMatches, 62 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 777 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=219, Invalid=537, Unknown=0, NotChecked=0, Total=756 [2018-09-10 10:14:50,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-09-10 10:14:50,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 188. [2018-09-10 10:14:50,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-09-10 10:14:50,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 200 transitions. [2018-09-10 10:14:50,355 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 200 transitions. Word has length 203 [2018-09-10 10:14:50,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:50,355 INFO L480 AbstractCegarLoop]: Abstraction has 188 states and 200 transitions. [2018-09-10 10:14:50,355 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-10 10:14:50,356 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 200 transitions. [2018-09-10 10:14:50,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2018-09-10 10:14:50,357 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:50,357 INFO L376 BasicCegarLoop]: trace histogram [18, 18, 18, 18, 17, 17, 17, 17, 17, 17, 17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:50,357 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:50,358 INFO L82 PathProgramCache]: Analyzing trace with hash -187764407, now seen corresponding path program 23 times [2018-09-10 10:14:50,358 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:50,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:50,358 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:50,359 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:50,359 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:50,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:51,090 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:14:51,090 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:51,090 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:51,097 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:51,097 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:51,181 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-10 10:14:51,182 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:51,186 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:51,826 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:14:51,826 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:52,279 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:14:52,299 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:52,299 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:52,315 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:52,315 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:52,783 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-10 10:14:52,783 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:52,792 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:52,867 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:14:52,868 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:53,293 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:14:53,295 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:53,295 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 57 [2018-09-10 10:14:53,295 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:53,296 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-09-10 10:14:53,296 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-09-10 10:14:53,298 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=777, Invalid=2415, Unknown=0, NotChecked=0, Total=3192 [2018-09-10 10:14:53,298 INFO L87 Difference]: Start difference. First operand 188 states and 200 transitions. Second operand 55 states. [2018-09-10 10:14:54,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:54,263 INFO L93 Difference]: Finished difference Result 375 states and 438 transitions. [2018-09-10 10:14:54,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-09-10 10:14:54,264 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 221 [2018-09-10 10:14:54,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:54,266 INFO L225 Difference]: With dead ends: 375 [2018-09-10 10:14:54,266 INFO L226 Difference]: Without dead ends: 276 [2018-09-10 10:14:54,268 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 936 GetRequests, 800 SyntacticMatches, 64 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2594 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1440, Invalid=3962, Unknown=0, NotChecked=0, Total=5402 [2018-09-10 10:14:54,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2018-09-10 10:14:54,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 191. [2018-09-10 10:14:54,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-09-10 10:14:54,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 203 transitions. [2018-09-10 10:14:54,280 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 203 transitions. Word has length 221 [2018-09-10 10:14:54,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:54,281 INFO L480 AbstractCegarLoop]: Abstraction has 191 states and 203 transitions. [2018-09-10 10:14:54,281 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-09-10 10:14:54,281 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 203 transitions. [2018-09-10 10:14:54,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2018-09-10 10:14:54,282 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:54,283 INFO L376 BasicCegarLoop]: trace histogram [18, 18, 18, 18, 18, 18, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:54,283 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:54,283 INFO L82 PathProgramCache]: Analyzing trace with hash -117776915, now seen corresponding path program 24 times [2018-09-10 10:14:54,283 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:54,284 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:54,284 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:54,284 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:54,284 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:54,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:54,889 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:14:54,890 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:54,890 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:54,899 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:54,899 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:54,998 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 18 check-sat command(s) [2018-09-10 10:14:54,998 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:55,004 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:55,813 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:14:55,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:56,303 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:14:56,325 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:56,325 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:56,342 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:56,342 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:56,817 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 18 check-sat command(s) [2018-09-10 10:14:56,817 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:56,825 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:56,892 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:14:56,892 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:57,470 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:14:57,471 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:57,471 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 56 [2018-09-10 10:14:57,471 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:57,472 INFO L459 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-09-10 10:14:57,472 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-09-10 10:14:57,473 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=739, Invalid=2341, Unknown=0, NotChecked=0, Total=3080 [2018-09-10 10:14:57,473 INFO L87 Difference]: Start difference. First operand 191 states and 203 transitions. Second operand 56 states. [2018-09-10 10:14:59,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:59,176 INFO L93 Difference]: Finished difference Result 381 states and 447 transitions. [2018-09-10 10:14:59,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-09-10 10:14:59,176 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 224 [2018-09-10 10:14:59,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:59,178 INFO L225 Difference]: With dead ends: 381 [2018-09-10 10:14:59,178 INFO L226 Difference]: Without dead ends: 284 [2018-09-10 10:14:59,179 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 950 GetRequests, 808 SyntacticMatches, 70 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2567 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1441, Invalid=3961, Unknown=0, NotChecked=0, Total=5402 [2018-09-10 10:14:59,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284 states. [2018-09-10 10:14:59,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284 to 194. [2018-09-10 10:14:59,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-09-10 10:14:59,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 206 transitions. [2018-09-10 10:14:59,194 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 206 transitions. Word has length 224 [2018-09-10 10:14:59,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:59,195 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 206 transitions. [2018-09-10 10:14:59,195 INFO L481 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-09-10 10:14:59,195 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 206 transitions. [2018-09-10 10:14:59,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2018-09-10 10:14:59,196 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:59,197 INFO L376 BasicCegarLoop]: trace histogram [19, 19, 18, 18, 18, 18, 18, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:59,197 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:59,197 INFO L82 PathProgramCache]: Analyzing trace with hash 1820458697, now seen corresponding path program 25 times [2018-09-10 10:14:59,197 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:59,198 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:59,198 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:59,198 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:59,198 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:59,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:59,904 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 546 proven. 780 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-09-10 10:14:59,904 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:59,905 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:59,913 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:59,913 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:59,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:59,987 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:00,082 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:00,082 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:00,815 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:00,849 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:00,849 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:00,873 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:00,873 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:01,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:01,037 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:01,085 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:01,086 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:01,604 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:01,605 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:01,606 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 23, 23, 23] total 27 [2018-09-10 10:15:01,606 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:01,606 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-10 10:15:01,606 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-10 10:15:01,606 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=243, Invalid=459, Unknown=0, NotChecked=0, Total=702 [2018-09-10 10:15:01,607 INFO L87 Difference]: Start difference. First operand 194 states and 206 transitions. Second operand 26 states. [2018-09-10 10:15:01,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:01,904 INFO L93 Difference]: Finished difference Result 210 states and 223 transitions. [2018-09-10 10:15:01,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-10 10:15:01,904 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 227 [2018-09-10 10:15:01,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:01,906 INFO L225 Difference]: With dead ends: 210 [2018-09-10 10:15:01,906 INFO L226 Difference]: Without dead ends: 208 [2018-09-10 10:15:01,907 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 951 GetRequests, 854 SyntacticMatches, 70 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 918 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=256, Invalid=556, Unknown=0, NotChecked=0, Total=812 [2018-09-10 10:15:01,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-09-10 10:15:01,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 208. [2018-09-10 10:15:01,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-09-10 10:15:01,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 221 transitions. [2018-09-10 10:15:01,918 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 221 transitions. Word has length 227 [2018-09-10 10:15:01,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:01,918 INFO L480 AbstractCegarLoop]: Abstraction has 208 states and 221 transitions. [2018-09-10 10:15:01,919 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-10 10:15:01,919 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 221 transitions. [2018-09-10 10:15:01,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2018-09-10 10:15:01,920 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:01,920 INFO L376 BasicCegarLoop]: trace histogram [20, 20, 20, 20, 19, 19, 19, 19, 19, 19, 19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:01,920 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:01,920 INFO L82 PathProgramCache]: Analyzing trace with hash 161845545, now seen corresponding path program 26 times [2018-09-10 10:15:01,920 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:01,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:01,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:01,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:01,921 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:01,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:02,679 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 950 proven. 513 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:02,680 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:02,680 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:02,689 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:02,689 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:02,771 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:02,771 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:02,775 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:03,527 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 1017 proven. 513 refuted. 0 times theorem prover too weak. 617 trivial. 0 not checked. [2018-09-10 10:15:03,528 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:04,566 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 947 proven. 513 refuted. 0 times theorem prover too weak. 687 trivial. 0 not checked. [2018-09-10 10:15:04,586 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:04,587 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:04,602 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:04,602 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:04,770 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:04,771 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:04,778 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:04,855 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 1017 proven. 513 refuted. 0 times theorem prover too weak. 617 trivial. 0 not checked. [2018-09-10 10:15:04,855 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:06,069 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 947 proven. 513 refuted. 0 times theorem prover too weak. 687 trivial. 0 not checked. [2018-09-10 10:15:06,071 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:06,071 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 40, 40, 40, 40] total 60 [2018-09-10 10:15:06,072 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:06,072 INFO L459 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-09-10 10:15:06,073 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-09-10 10:15:06,073 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=839, Invalid=2701, Unknown=0, NotChecked=0, Total=3540 [2018-09-10 10:15:06,073 INFO L87 Difference]: Start difference. First operand 208 states and 221 transitions. Second operand 60 states. [2018-09-10 10:15:07,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:07,147 INFO L93 Difference]: Finished difference Result 415 states and 485 transitions. [2018-09-10 10:15:07,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-09-10 10:15:07,148 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 245 [2018-09-10 10:15:07,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:07,149 INFO L225 Difference]: With dead ends: 415 [2018-09-10 10:15:07,149 INFO L226 Difference]: Without dead ends: 306 [2018-09-10 10:15:07,151 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1038 GetRequests, 887 SyntacticMatches, 74 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2961 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=1618, Invalid=4544, Unknown=0, NotChecked=0, Total=6162 [2018-09-10 10:15:07,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-09-10 10:15:07,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 211. [2018-09-10 10:15:07,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-09-10 10:15:07,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 224 transitions. [2018-09-10 10:15:07,165 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 224 transitions. Word has length 245 [2018-09-10 10:15:07,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:07,165 INFO L480 AbstractCegarLoop]: Abstraction has 211 states and 224 transitions. [2018-09-10 10:15:07,165 INFO L481 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-09-10 10:15:07,165 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 224 transitions. [2018-09-10 10:15:07,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2018-09-10 10:15:07,167 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:07,167 INFO L376 BasicCegarLoop]: trace histogram [20, 20, 20, 20, 20, 20, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:07,167 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:07,167 INFO L82 PathProgramCache]: Analyzing trace with hash 851366349, now seen corresponding path program 27 times [2018-09-10 10:15:07,168 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:07,168 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:07,168 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:07,168 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:07,168 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:07,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:08,119 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:08,119 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:08,120 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:08,133 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:08,133 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:08,231 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2018-09-10 10:15:08,231 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:08,236 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:08,977 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:08,978 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:09,529 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:09,549 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:09,549 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:09,565 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:09,565 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:10,148 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2018-09-10 10:15:10,149 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:10,157 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:10,217 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:10,217 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:11,121 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:11,123 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:11,123 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 62 [2018-09-10 10:15:11,123 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:11,124 INFO L459 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-09-10 10:15:11,124 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-09-10 10:15:11,125 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=901, Invalid=2881, Unknown=0, NotChecked=0, Total=3782 [2018-09-10 10:15:11,125 INFO L87 Difference]: Start difference. First operand 211 states and 224 transitions. Second operand 62 states. [2018-09-10 10:15:12,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:12,231 INFO L93 Difference]: Finished difference Result 421 states and 494 transitions. [2018-09-10 10:15:12,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-09-10 10:15:12,232 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 248 [2018-09-10 10:15:12,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:12,234 INFO L225 Difference]: With dead ends: 421 [2018-09-10 10:15:12,234 INFO L226 Difference]: Without dead ends: 314 [2018-09-10 10:15:12,235 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1052 GetRequests, 894 SyntacticMatches, 78 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3192 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=1761, Invalid=4881, Unknown=0, NotChecked=0, Total=6642 [2018-09-10 10:15:12,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-09-10 10:15:12,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 214. [2018-09-10 10:15:12,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-09-10 10:15:12,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 227 transitions. [2018-09-10 10:15:12,250 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 227 transitions. Word has length 248 [2018-09-10 10:15:12,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:12,250 INFO L480 AbstractCegarLoop]: Abstraction has 214 states and 227 transitions. [2018-09-10 10:15:12,250 INFO L481 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-09-10 10:15:12,250 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 227 transitions. [2018-09-10 10:15:12,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2018-09-10 10:15:12,252 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:12,252 INFO L376 BasicCegarLoop]: trace histogram [21, 21, 20, 20, 20, 20, 20, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:12,252 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:12,253 INFO L82 PathProgramCache]: Analyzing trace with hash -462938455, now seen corresponding path program 28 times [2018-09-10 10:15:12,253 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:12,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:12,253 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:12,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:12,254 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:12,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:12,704 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 667 proven. 967 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-10 10:15:12,704 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:12,704 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:12,714 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:12,714 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:12,798 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:12,798 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:12,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:12,936 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:12,936 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:13,316 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:13,336 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:13,336 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:13,351 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:13,351 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:13,550 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:13,550 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:13,560 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:13,620 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:13,620 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:14,040 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:14,041 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:14,041 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 25, 25, 25] total 30 [2018-09-10 10:15:14,041 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:14,042 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-09-10 10:15:14,042 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-09-10 10:15:14,042 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=292, Invalid=578, Unknown=0, NotChecked=0, Total=870 [2018-09-10 10:15:14,042 INFO L87 Difference]: Start difference. First operand 214 states and 227 transitions. Second operand 29 states. [2018-09-10 10:15:14,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:14,425 INFO L93 Difference]: Finished difference Result 235 states and 251 transitions. [2018-09-10 10:15:14,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-10 10:15:14,426 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 251 [2018-09-10 10:15:14,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:14,428 INFO L225 Difference]: With dead ends: 235 [2018-09-10 10:15:14,428 INFO L226 Difference]: Without dead ends: 233 [2018-09-10 10:15:14,429 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1051 GetRequests, 943 SyntacticMatches, 78 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1129 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=305, Invalid=687, Unknown=0, NotChecked=0, Total=992 [2018-09-10 10:15:14,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-09-10 10:15:14,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 228. [2018-09-10 10:15:14,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-09-10 10:15:14,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 242 transitions. [2018-09-10 10:15:14,444 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 242 transitions. Word has length 251 [2018-09-10 10:15:14,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:14,445 INFO L480 AbstractCegarLoop]: Abstraction has 228 states and 242 transitions. [2018-09-10 10:15:14,445 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-09-10 10:15:14,445 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 242 transitions. [2018-09-10 10:15:14,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2018-09-10 10:15:14,446 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:14,447 INFO L376 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 21, 21, 21, 21, 21, 21, 21, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:14,447 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:14,447 INFO L82 PathProgramCache]: Analyzing trace with hash 720861449, now seen corresponding path program 29 times [2018-09-10 10:15:14,447 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:14,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:14,448 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:14,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:14,448 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:14,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:15,784 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1155 proven. 630 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:15,784 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:15,784 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:15,791 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:15,791 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:15,904 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-09-10 10:15:15,904 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:15,908 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:16,753 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1155 proven. 630 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:16,753 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:17,484 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1155 proven. 630 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:17,505 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:17,505 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:17,526 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:17,526 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:18,176 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-09-10 10:15:18,176 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:18,186 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:18,253 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1230 proven. 630 refuted. 0 times theorem prover too weak. 765 trivial. 0 not checked. [2018-09-10 10:15:18,253 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:19,025 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1152 proven. 630 refuted. 0 times theorem prover too weak. 843 trivial. 0 not checked. [2018-09-10 10:15:19,027 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:19,027 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45, 45, 44, 44] total 69 [2018-09-10 10:15:19,027 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:19,027 INFO L459 AbstractCegarLoop]: Interpolant automaton has 67 states [2018-09-10 10:15:19,028 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2018-09-10 10:15:19,028 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1125, Invalid=3567, Unknown=0, NotChecked=0, Total=4692 [2018-09-10 10:15:19,028 INFO L87 Difference]: Start difference. First operand 228 states and 242 transitions. Second operand 67 states. [2018-09-10 10:15:20,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:20,261 INFO L93 Difference]: Finished difference Result 455 states and 532 transitions. [2018-09-10 10:15:20,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-09-10 10:15:20,261 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 269 [2018-09-10 10:15:20,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:20,263 INFO L225 Difference]: With dead ends: 455 [2018-09-10 10:15:20,263 INFO L226 Difference]: Without dead ends: 336 [2018-09-10 10:15:20,264 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1140 GetRequests, 971 SyntacticMatches, 81 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3941 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=2112, Invalid=5898, Unknown=0, NotChecked=0, Total=8010 [2018-09-10 10:15:20,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states. [2018-09-10 10:15:20,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 231. [2018-09-10 10:15:20,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states. [2018-09-10 10:15:20,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 245 transitions. [2018-09-10 10:15:20,286 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 245 transitions. Word has length 269 [2018-09-10 10:15:20,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:20,286 INFO L480 AbstractCegarLoop]: Abstraction has 231 states and 245 transitions. [2018-09-10 10:15:20,286 INFO L481 AbstractCegarLoop]: Interpolant automaton has 67 states. [2018-09-10 10:15:20,287 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 245 transitions. [2018-09-10 10:15:20,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2018-09-10 10:15:20,289 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:20,289 INFO L376 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:20,290 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:20,290 INFO L82 PathProgramCache]: Analyzing trace with hash -1690169939, now seen corresponding path program 30 times [2018-09-10 10:15:20,290 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:20,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:20,291 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:20,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:20,291 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:20,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:21,516 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:21,516 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:21,516 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:21,524 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:21,525 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:21,632 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 22 check-sat command(s) [2018-09-10 10:15:21,633 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:21,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:22,610 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:22,610 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:23,257 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:23,277 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:23,277 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:23,293 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:23,293 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:23,967 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 22 check-sat command(s) [2018-09-10 10:15:23,968 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:23,977 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:24,047 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:24,047 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:24,806 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:24,807 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:24,808 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46, 46, 46, 46] total 68 [2018-09-10 10:15:24,808 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:24,808 INFO L459 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-09-10 10:15:24,809 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-09-10 10:15:24,809 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1079, Invalid=3477, Unknown=0, NotChecked=0, Total=4556 [2018-09-10 10:15:24,809 INFO L87 Difference]: Start difference. First operand 231 states and 245 transitions. Second operand 68 states. [2018-09-10 10:15:26,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:26,201 INFO L93 Difference]: Finished difference Result 461 states and 541 transitions. [2018-09-10 10:15:26,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-09-10 10:15:26,201 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 272 [2018-09-10 10:15:26,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:26,203 INFO L225 Difference]: With dead ends: 461 [2018-09-10 10:15:26,203 INFO L226 Difference]: Without dead ends: 344 [2018-09-10 10:15:26,204 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1154 GetRequests, 980 SyntacticMatches, 86 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3885 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=2113, Invalid=5897, Unknown=0, NotChecked=0, Total=8010 [2018-09-10 10:15:26,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-09-10 10:15:26,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 234. [2018-09-10 10:15:26,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-09-10 10:15:26,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 248 transitions. [2018-09-10 10:15:26,221 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 248 transitions. Word has length 272 [2018-09-10 10:15:26,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:26,221 INFO L480 AbstractCegarLoop]: Abstraction has 234 states and 248 transitions. [2018-09-10 10:15:26,221 INFO L481 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-09-10 10:15:26,222 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 248 transitions. [2018-09-10 10:15:26,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-09-10 10:15:26,223 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:26,224 INFO L376 BasicCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:26,224 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:26,224 INFO L82 PathProgramCache]: Analyzing trace with hash 306808457, now seen corresponding path program 31 times [2018-09-10 10:15:26,224 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:26,225 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:26,225 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:26,225 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:26,225 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:26,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:26,686 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 800 proven. 1174 refuted. 0 times theorem prover too weak. 780 trivial. 0 not checked. [2018-09-10 10:15:26,687 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:26,687 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:26,694 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:26,694 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:26,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:26,784 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:26,882 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:26,883 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:27,331 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:27,351 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:27,351 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:27,366 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:27,366 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:27,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:27,564 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:27,605 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:27,606 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:28,079 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:28,081 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:28,081 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 27, 27, 27, 27] total 31 [2018-09-10 10:15:28,081 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:28,081 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-09-10 10:15:28,082 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-09-10 10:15:28,082 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=337, Invalid=593, Unknown=0, NotChecked=0, Total=930 [2018-09-10 10:15:28,082 INFO L87 Difference]: Start difference. First operand 234 states and 248 transitions. Second operand 30 states. [2018-09-10 10:15:28,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:28,451 INFO L93 Difference]: Finished difference Result 250 states and 265 transitions. [2018-09-10 10:15:28,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-10 10:15:28,452 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 275 [2018-09-10 10:15:28,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:28,454 INFO L225 Difference]: With dead ends: 250 [2018-09-10 10:15:28,454 INFO L226 Difference]: Without dead ends: 248 [2018-09-10 10:15:28,454 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1151 GetRequests, 1034 SyntacticMatches, 86 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1298 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=350, Invalid=706, Unknown=0, NotChecked=0, Total=1056 [2018-09-10 10:15:28,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-09-10 10:15:28,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248. [2018-09-10 10:15:28,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-09-10 10:15:28,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 263 transitions. [2018-09-10 10:15:28,467 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 263 transitions. Word has length 275 [2018-09-10 10:15:28,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:28,467 INFO L480 AbstractCegarLoop]: Abstraction has 248 states and 263 transitions. [2018-09-10 10:15:28,467 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-09-10 10:15:28,467 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 263 transitions. [2018-09-10 10:15:28,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2018-09-10 10:15:28,469 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:28,469 INFO L376 BasicCegarLoop]: trace histogram [24, 24, 24, 24, 23, 23, 23, 23, 23, 23, 23, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:28,469 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:28,470 INFO L82 PathProgramCache]: Analyzing trace with hash -2063423255, now seen corresponding path program 32 times [2018-09-10 10:15:28,470 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:28,470 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:28,470 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:28,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:28,471 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:28,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:29,406 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1380 proven. 759 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:15:29,406 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:29,406 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:29,415 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:29,415 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:29,501 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:29,501 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:29,506 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:30,437 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1463 proven. 759 refuted. 0 times theorem prover too weak. 929 trivial. 0 not checked. [2018-09-10 10:15:30,438 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:31,443 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1377 proven. 759 refuted. 0 times theorem prover too weak. 1015 trivial. 0 not checked. [2018-09-10 10:15:31,463 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:31,463 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:31,478 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:31,478 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:31,682 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:31,682 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:31,692 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:31,764 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1463 proven. 759 refuted. 0 times theorem prover too weak. 929 trivial. 0 not checked. [2018-09-10 10:15:31,764 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:32,494 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1377 proven. 759 refuted. 0 times theorem prover too weak. 1015 trivial. 0 not checked. [2018-09-10 10:15:32,496 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:32,496 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 48, 48, 48, 48] total 72 [2018-09-10 10:15:32,496 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:32,497 INFO L459 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-09-10 10:15:32,497 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-09-10 10:15:32,498 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1199, Invalid=3913, Unknown=0, NotChecked=0, Total=5112 [2018-09-10 10:15:32,498 INFO L87 Difference]: Start difference. First operand 248 states and 263 transitions. Second operand 72 states. [2018-09-10 10:15:33,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:33,770 INFO L93 Difference]: Finished difference Result 495 states and 579 transitions. [2018-09-10 10:15:33,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-09-10 10:15:33,771 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 293 [2018-09-10 10:15:33,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:33,773 INFO L225 Difference]: With dead ends: 495 [2018-09-10 10:15:33,773 INFO L226 Difference]: Without dead ends: 366 [2018-09-10 10:15:33,774 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1242 GetRequests, 1059 SyntacticMatches, 90 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4367 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=2326, Invalid=6604, Unknown=0, NotChecked=0, Total=8930 [2018-09-10 10:15:33,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2018-09-10 10:15:33,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 251. [2018-09-10 10:15:33,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 251 states. [2018-09-10 10:15:33,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 266 transitions. [2018-09-10 10:15:33,790 INFO L78 Accepts]: Start accepts. Automaton has 251 states and 266 transitions. Word has length 293 [2018-09-10 10:15:33,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:33,791 INFO L480 AbstractCegarLoop]: Abstraction has 251 states and 266 transitions. [2018-09-10 10:15:33,791 INFO L481 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-09-10 10:15:33,791 INFO L276 IsEmpty]: Start isEmpty. Operand 251 states and 266 transitions. [2018-09-10 10:15:33,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 297 [2018-09-10 10:15:33,793 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:33,793 INFO L376 BasicCegarLoop]: trace histogram [24, 24, 24, 24, 24, 24, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:33,793 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:33,793 INFO L82 PathProgramCache]: Analyzing trace with hash -759000691, now seen corresponding path program 33 times [2018-09-10 10:15:33,794 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:33,794 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:33,794 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:33,794 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:33,795 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:33,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:35,508 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:15:35,508 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:35,509 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:35,516 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:35,517 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:35,635 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-09-10 10:15:35,635 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:35,640 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:36,884 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:15:36,885 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:37,761 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:15:37,781 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:37,782 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:37,796 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:37,796 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:38,583 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-09-10 10:15:38,583 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:38,593 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:38,673 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:15:38,674 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:39,464 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:15:39,466 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:39,466 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 74 [2018-09-10 10:15:39,466 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:39,467 INFO L459 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-09-10 10:15:39,467 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-09-10 10:15:39,468 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1273, Invalid=4129, Unknown=0, NotChecked=0, Total=5402 [2018-09-10 10:15:39,468 INFO L87 Difference]: Start difference. First operand 251 states and 266 transitions. Second operand 74 states. [2018-09-10 10:15:40,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:40,773 INFO L93 Difference]: Finished difference Result 501 states and 588 transitions. [2018-09-10 10:15:40,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-09-10 10:15:40,774 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 296 [2018-09-10 10:15:40,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:40,776 INFO L225 Difference]: With dead ends: 501 [2018-09-10 10:15:40,776 INFO L226 Difference]: Without dead ends: 374 [2018-09-10 10:15:40,777 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1256 GetRequests, 1066 SyntacticMatches, 94 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4646 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=2497, Invalid=7009, Unknown=0, NotChecked=0, Total=9506 [2018-09-10 10:15:40,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states. [2018-09-10 10:15:40,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 254. [2018-09-10 10:15:40,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-09-10 10:15:40,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 269 transitions. [2018-09-10 10:15:40,795 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 269 transitions. Word has length 296 [2018-09-10 10:15:40,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:40,795 INFO L480 AbstractCegarLoop]: Abstraction has 254 states and 269 transitions. [2018-09-10 10:15:40,795 INFO L481 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-09-10 10:15:40,795 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 269 transitions. [2018-09-10 10:15:40,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 300 [2018-09-10 10:15:40,797 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:40,797 INFO L376 BasicCegarLoop]: trace histogram [25, 25, 24, 24, 24, 24, 24, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:40,798 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:40,798 INFO L82 PathProgramCache]: Analyzing trace with hash -1570490775, now seen corresponding path program 34 times [2018-09-10 10:15:40,798 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:40,799 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:40,799 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:40,799 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:40,799 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:40,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:41,656 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 945 proven. 1401 refuted. 0 times theorem prover too weak. 946 trivial. 0 not checked. [2018-09-10 10:15:41,656 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:41,656 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:41,665 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:41,666 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:41,755 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:41,756 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:41,761 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:41,894 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:15:41,894 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:42,436 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:15:42,456 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:42,456 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:42,473 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:42,473 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:42,714 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:42,714 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:42,731 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:42,786 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:15:42,786 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:43,339 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:15:43,341 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:43,341 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 29, 29, 29] total 34 [2018-09-10 10:15:43,341 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:43,342 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-09-10 10:15:43,342 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-09-10 10:15:43,342 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=394, Invalid=728, Unknown=0, NotChecked=0, Total=1122 [2018-09-10 10:15:43,343 INFO L87 Difference]: Start difference. First operand 254 states and 269 transitions. Second operand 33 states. [2018-09-10 10:15:43,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:43,780 INFO L93 Difference]: Finished difference Result 275 states and 293 transitions. [2018-09-10 10:15:43,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-09-10 10:15:43,781 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 299 [2018-09-10 10:15:43,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:43,783 INFO L225 Difference]: With dead ends: 275 [2018-09-10 10:15:43,784 INFO L226 Difference]: Without dead ends: 273 [2018-09-10 10:15:43,784 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1251 GetRequests, 1123 SyntacticMatches, 94 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1545 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=407, Invalid=853, Unknown=0, NotChecked=0, Total=1260 [2018-09-10 10:15:43,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states. [2018-09-10 10:15:43,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 268. [2018-09-10 10:15:43,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 268 states. [2018-09-10 10:15:43,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 284 transitions. [2018-09-10 10:15:43,803 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 284 transitions. Word has length 299 [2018-09-10 10:15:43,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:43,803 INFO L480 AbstractCegarLoop]: Abstraction has 268 states and 284 transitions. [2018-09-10 10:15:43,803 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-09-10 10:15:43,804 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 284 transitions. [2018-09-10 10:15:43,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 318 [2018-09-10 10:15:43,805 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:43,806 INFO L376 BasicCegarLoop]: trace histogram [26, 26, 26, 26, 25, 25, 25, 25, 25, 25, 25, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:43,806 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:43,806 INFO L82 PathProgramCache]: Analyzing trace with hash 1887772873, now seen corresponding path program 35 times [2018-09-10 10:15:43,806 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:43,807 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:43,807 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:43,807 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:43,807 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:43,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:44,850 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1625 proven. 900 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:15:44,851 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:44,851 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:44,858 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:44,858 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:44,986 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2018-09-10 10:15:44,986 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:44,991 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:46,175 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1625 proven. 900 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:15:46,175 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:47,683 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1625 proven. 900 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:15:47,705 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:47,705 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:47,720 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:47,721 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:48,612 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2018-09-10 10:15:48,612 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:48,623 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:48,746 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1716 proven. 900 refuted. 0 times theorem prover too weak. 1109 trivial. 0 not checked. [2018-09-10 10:15:48,746 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:49,739 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1622 proven. 900 refuted. 0 times theorem prover too weak. 1203 trivial. 0 not checked. [2018-09-10 10:15:49,741 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:49,741 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53, 53, 52, 52] total 81 [2018-09-10 10:15:49,741 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:49,742 INFO L459 AbstractCegarLoop]: Interpolant automaton has 79 states [2018-09-10 10:15:49,743 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2018-09-10 10:15:49,743 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1537, Invalid=4943, Unknown=0, NotChecked=0, Total=6480 [2018-09-10 10:15:49,743 INFO L87 Difference]: Start difference. First operand 268 states and 284 transitions. Second operand 79 states. [2018-09-10 10:15:51,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:51,265 INFO L93 Difference]: Finished difference Result 535 states and 626 transitions. [2018-09-10 10:15:51,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-09-10 10:15:51,266 INFO L78 Accepts]: Start accepts. Automaton has 79 states. Word has length 317 [2018-09-10 10:15:51,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:51,268 INFO L225 Difference]: With dead ends: 535 [2018-09-10 10:15:51,268 INFO L226 Difference]: Without dead ends: 396 [2018-09-10 10:15:51,269 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1344 GetRequests, 1143 SyntacticMatches, 97 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5543 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=2912, Invalid=8218, Unknown=0, NotChecked=0, Total=11130 [2018-09-10 10:15:51,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2018-09-10 10:15:51,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 271. [2018-09-10 10:15:51,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 271 states. [2018-09-10 10:15:51,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 287 transitions. [2018-09-10 10:15:51,289 INFO L78 Accepts]: Start accepts. Automaton has 271 states and 287 transitions. Word has length 317 [2018-09-10 10:15:51,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:51,290 INFO L480 AbstractCegarLoop]: Abstraction has 271 states and 287 transitions. [2018-09-10 10:15:51,290 INFO L481 AbstractCegarLoop]: Interpolant automaton has 79 states. [2018-09-10 10:15:51,290 INFO L276 IsEmpty]: Start isEmpty. Operand 271 states and 287 transitions. [2018-09-10 10:15:51,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 321 [2018-09-10 10:15:51,292 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:51,293 INFO L376 BasicCegarLoop]: trace histogram [26, 26, 26, 26, 26, 26, 25, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:51,293 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:51,293 INFO L82 PathProgramCache]: Analyzing trace with hash -1510056595, now seen corresponding path program 36 times [2018-09-10 10:15:51,293 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:51,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:51,294 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:51,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:51,294 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:51,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:52,744 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:15:52,744 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:52,744 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:52,751 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:52,752 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:52,882 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2018-09-10 10:15:52,882 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:52,887 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:54,091 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:15:54,091 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:55,022 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:15:55,042 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:55,042 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:55,057 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:55,057 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:55,985 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2018-09-10 10:15:55,985 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:55,996 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:56,093 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:15:56,093 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:57,290 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:15:57,292 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:57,292 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54, 54, 54, 54] total 80 [2018-09-10 10:15:57,292 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:57,293 INFO L459 AbstractCegarLoop]: Interpolant automaton has 80 states [2018-09-10 10:15:57,294 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 80 interpolants. [2018-09-10 10:15:57,294 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1483, Invalid=4837, Unknown=0, NotChecked=0, Total=6320 [2018-09-10 10:15:57,294 INFO L87 Difference]: Start difference. First operand 271 states and 287 transitions. Second operand 80 states. [2018-09-10 10:15:59,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:59,099 INFO L93 Difference]: Finished difference Result 541 states and 635 transitions. [2018-09-10 10:15:59,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-09-10 10:15:59,100 INFO L78 Accepts]: Start accepts. Automaton has 80 states. Word has length 320 [2018-09-10 10:15:59,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:59,101 INFO L225 Difference]: With dead ends: 541 [2018-09-10 10:15:59,101 INFO L226 Difference]: Without dead ends: 404 [2018-09-10 10:15:59,103 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1358 GetRequests, 1152 SyntacticMatches, 102 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5475 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=2913, Invalid=8217, Unknown=0, NotChecked=0, Total=11130 [2018-09-10 10:15:59,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states. [2018-09-10 10:15:59,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 274. [2018-09-10 10:15:59,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 274 states. [2018-09-10 10:15:59,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 274 states to 274 states and 290 transitions. [2018-09-10 10:15:59,121 INFO L78 Accepts]: Start accepts. Automaton has 274 states and 290 transitions. Word has length 320 [2018-09-10 10:15:59,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:59,122 INFO L480 AbstractCegarLoop]: Abstraction has 274 states and 290 transitions. [2018-09-10 10:15:59,122 INFO L481 AbstractCegarLoop]: Interpolant automaton has 80 states. [2018-09-10 10:15:59,122 INFO L276 IsEmpty]: Start isEmpty. Operand 274 states and 290 transitions. [2018-09-10 10:15:59,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324 [2018-09-10 10:15:59,126 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:59,126 INFO L376 BasicCegarLoop]: trace histogram [27, 27, 26, 26, 26, 26, 26, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:59,126 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:59,127 INFO L82 PathProgramCache]: Analyzing trace with hash 1836461641, now seen corresponding path program 37 times [2018-09-10 10:15:59,127 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:59,127 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:59,127 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:59,127 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:59,128 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:59,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:59,702 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1102 proven. 1648 refuted. 0 times theorem prover too weak. 1128 trivial. 0 not checked. [2018-09-10 10:15:59,702 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:59,703 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:59,712 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:59,712 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:59,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:59,818 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:59,940 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:15:59,940 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:00,538 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:00,558 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:00,558 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:00,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:00,575 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:16:00,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:00,806 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:00,869 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:00,869 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:01,468 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:01,469 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:01,470 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 31, 31, 31, 31] total 35 [2018-09-10 10:16:01,470 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:01,470 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-09-10 10:16:01,470 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-09-10 10:16:01,471 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=447, Invalid=743, Unknown=0, NotChecked=0, Total=1190 [2018-09-10 10:16:01,471 INFO L87 Difference]: Start difference. First operand 274 states and 290 transitions. Second operand 34 states. [2018-09-10 10:16:01,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:01,981 INFO L93 Difference]: Finished difference Result 290 states and 307 transitions. [2018-09-10 10:16:01,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-09-10 10:16:01,982 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 323 [2018-09-10 10:16:01,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:01,984 INFO L225 Difference]: With dead ends: 290 [2018-09-10 10:16:01,984 INFO L226 Difference]: Without dead ends: 288 [2018-09-10 10:16:01,985 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1351 GetRequests, 1214 SyntacticMatches, 102 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1742 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=460, Invalid=872, Unknown=0, NotChecked=0, Total=1332 [2018-09-10 10:16:01,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-09-10 10:16:02,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 288. [2018-09-10 10:16:02,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-09-10 10:16:02,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 305 transitions. [2018-09-10 10:16:02,002 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 305 transitions. Word has length 323 [2018-09-10 10:16:02,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:02,003 INFO L480 AbstractCegarLoop]: Abstraction has 288 states and 305 transitions. [2018-09-10 10:16:02,003 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-09-10 10:16:02,003 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 305 transitions. [2018-09-10 10:16:02,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2018-09-10 10:16:02,005 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:02,006 INFO L376 BasicCegarLoop]: trace histogram [28, 28, 28, 28, 27, 27, 27, 27, 27, 27, 27, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:02,006 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:02,006 INFO L82 PathProgramCache]: Analyzing trace with hash 1388109993, now seen corresponding path program 38 times [2018-09-10 10:16:02,006 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:02,007 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:02,007 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:02,007 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:02,008 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:02,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:03,329 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1890 proven. 1053 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:03,330 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:03,330 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:03,336 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:16:03,337 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:03,442 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:16:03,442 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:03,447 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:04,695 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1989 proven. 1053 refuted. 0 times theorem prover too weak. 1305 trivial. 0 not checked. [2018-09-10 10:16:04,696 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:05,652 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1887 proven. 1053 refuted. 0 times theorem prover too weak. 1407 trivial. 0 not checked. [2018-09-10 10:16:05,672 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:05,673 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:05,692 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:16:05,692 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:05,928 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:16:05,928 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:05,944 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:06,036 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1989 proven. 1053 refuted. 0 times theorem prover too weak. 1305 trivial. 0 not checked. [2018-09-10 10:16:06,036 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:07,346 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1887 proven. 1053 refuted. 0 times theorem prover too weak. 1407 trivial. 0 not checked. [2018-09-10 10:16:07,348 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:07,348 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 56, 56, 56, 56] total 84 [2018-09-10 10:16:07,348 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:07,349 INFO L459 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-09-10 10:16:07,349 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-09-10 10:16:07,350 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1623, Invalid=5349, Unknown=0, NotChecked=0, Total=6972 [2018-09-10 10:16:07,350 INFO L87 Difference]: Start difference. First operand 288 states and 305 transitions. Second operand 84 states. [2018-09-10 10:16:08,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:08,937 INFO L93 Difference]: Finished difference Result 575 states and 673 transitions. [2018-09-10 10:16:08,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-09-10 10:16:08,937 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 341 [2018-09-10 10:16:08,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:08,939 INFO L225 Difference]: With dead ends: 575 [2018-09-10 10:16:08,939 INFO L226 Difference]: Without dead ends: 426 [2018-09-10 10:16:08,940 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1446 GetRequests, 1231 SyntacticMatches, 106 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6045 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=3162, Invalid=9048, Unknown=0, NotChecked=0, Total=12210 [2018-09-10 10:16:08,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2018-09-10 10:16:08,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 291. [2018-09-10 10:16:08,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2018-09-10 10:16:08,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 308 transitions. [2018-09-10 10:16:08,963 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 308 transitions. Word has length 341 [2018-09-10 10:16:08,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:08,964 INFO L480 AbstractCegarLoop]: Abstraction has 291 states and 308 transitions. [2018-09-10 10:16:08,964 INFO L481 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-09-10 10:16:08,964 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 308 transitions. [2018-09-10 10:16:08,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 345 [2018-09-10 10:16:08,966 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:08,966 INFO L376 BasicCegarLoop]: trace histogram [28, 28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:08,967 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:08,967 INFO L82 PathProgramCache]: Analyzing trace with hash -298618547, now seen corresponding path program 39 times [2018-09-10 10:16:08,967 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:08,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:08,968 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:08,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:08,968 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:08,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:10,718 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:10,719 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:10,719 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:10,725 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:16:10,726 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:16:10,863 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-09-10 10:16:10,864 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:10,869 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:12,532 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:12,532 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:13,545 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:13,566 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:13,566 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:13,581 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:16:13,581 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:16:14,649 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-09-10 10:16:14,650 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:14,668 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:14,776 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:14,776 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:15,834 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:15,836 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:15,837 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58, 58, 58, 58] total 86 [2018-09-10 10:16:15,837 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:15,837 INFO L459 AbstractCegarLoop]: Interpolant automaton has 86 states [2018-09-10 10:16:15,838 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2018-09-10 10:16:15,838 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1709, Invalid=5601, Unknown=0, NotChecked=0, Total=7310 [2018-09-10 10:16:15,838 INFO L87 Difference]: Start difference. First operand 291 states and 308 transitions. Second operand 86 states. [2018-09-10 10:16:17,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:17,991 INFO L93 Difference]: Finished difference Result 581 states and 682 transitions. [2018-09-10 10:16:17,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-09-10 10:16:17,992 INFO L78 Accepts]: Start accepts. Automaton has 86 states. Word has length 344 [2018-09-10 10:16:17,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:17,993 INFO L225 Difference]: With dead ends: 581 [2018-09-10 10:16:17,993 INFO L226 Difference]: Without dead ends: 434 [2018-09-10 10:16:17,995 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1460 GetRequests, 1238 SyntacticMatches, 110 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6372 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=3361, Invalid=9521, Unknown=0, NotChecked=0, Total=12882 [2018-09-10 10:16:17,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2018-09-10 10:16:18,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 294. [2018-09-10 10:16:18,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-09-10 10:16:18,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 311 transitions. [2018-09-10 10:16:18,015 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 311 transitions. Word has length 344 [2018-09-10 10:16:18,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:18,016 INFO L480 AbstractCegarLoop]: Abstraction has 294 states and 311 transitions. [2018-09-10 10:16:18,016 INFO L481 AbstractCegarLoop]: Interpolant automaton has 86 states. [2018-09-10 10:16:18,016 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 311 transitions. [2018-09-10 10:16:18,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 348 [2018-09-10 10:16:18,018 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:18,018 INFO L376 BasicCegarLoop]: trace histogram [29, 29, 28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:18,019 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:18,019 INFO L82 PathProgramCache]: Analyzing trace with hash 1488809513, now seen corresponding path program 40 times [2018-09-10 10:16:18,019 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:18,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:18,020 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:18,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:18,020 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:18,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:18,730 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1271 proven. 1915 refuted. 0 times theorem prover too weak. 1326 trivial. 0 not checked. [2018-09-10 10:16:18,730 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:18,730 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:18,737 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:16:18,737 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:16:18,842 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:16:18,842 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:18,847 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:19,026 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:19,026 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:19,829 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:19,851 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:19,851 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:19,866 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:16:19,866 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:16:20,151 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:16:20,151 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:20,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:20,234 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:20,235 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:20,945 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:20,946 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:20,947 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 33, 33, 33] total 38 [2018-09-10 10:16:20,947 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:20,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-09-10 10:16:20,948 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-09-10 10:16:20,948 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=512, Invalid=894, Unknown=0, NotChecked=0, Total=1406 [2018-09-10 10:16:20,949 INFO L87 Difference]: Start difference. First operand 294 states and 311 transitions. Second operand 37 states. [2018-09-10 10:16:21,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:21,442 INFO L93 Difference]: Finished difference Result 315 states and 335 transitions. [2018-09-10 10:16:21,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-09-10 10:16:21,443 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 347 [2018-09-10 10:16:21,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:21,445 INFO L225 Difference]: With dead ends: 315 [2018-09-10 10:16:21,445 INFO L226 Difference]: Without dead ends: 313 [2018-09-10 10:16:21,446 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1451 GetRequests, 1303 SyntacticMatches, 110 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2025 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=525, Invalid=1035, Unknown=0, NotChecked=0, Total=1560 [2018-09-10 10:16:21,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2018-09-10 10:16:21,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 308. [2018-09-10 10:16:21,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2018-09-10 10:16:21,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 326 transitions. [2018-09-10 10:16:21,463 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 326 transitions. Word has length 347 [2018-09-10 10:16:21,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:21,463 INFO L480 AbstractCegarLoop]: Abstraction has 308 states and 326 transitions. [2018-09-10 10:16:21,463 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-09-10 10:16:21,463 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 326 transitions. [2018-09-10 10:16:21,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 366 [2018-09-10 10:16:21,466 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:21,466 INFO L376 BasicCegarLoop]: trace histogram [30, 30, 30, 30, 29, 29, 29, 29, 29, 29, 29, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:21,466 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:21,466 INFO L82 PathProgramCache]: Analyzing trace with hash 2103961737, now seen corresponding path program 41 times [2018-09-10 10:16:21,467 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:21,467 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:21,467 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:21,467 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:21,467 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:21,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:23,308 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:23,308 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:23,308 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:23,316 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:16:23,316 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:23,486 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-09-10 10:16:23,486 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:23,492 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:24,982 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:24,982 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:26,154 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:26,175 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:26,175 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:26,191 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:16:26,191 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:27,362 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-09-10 10:16:27,363 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:27,381 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:27,503 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:27,503 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:28,674 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:28,676 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:28,676 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61, 61, 61, 61] total 93 [2018-09-10 10:16:28,676 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:28,677 INFO L459 AbstractCegarLoop]: Interpolant automaton has 91 states [2018-09-10 10:16:28,677 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 91 interpolants. [2018-09-10 10:16:28,677 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2013, Invalid=6543, Unknown=0, NotChecked=0, Total=8556 [2018-09-10 10:16:28,678 INFO L87 Difference]: Start difference. First operand 308 states and 326 transitions. Second operand 91 states. [2018-09-10 10:16:30,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:30,661 INFO L93 Difference]: Finished difference Result 615 states and 720 transitions. [2018-09-10 10:16:30,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-09-10 10:16:30,662 INFO L78 Accepts]: Start accepts. Automaton has 91 states. Word has length 365 [2018-09-10 10:16:30,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:30,664 INFO L225 Difference]: With dead ends: 615 [2018-09-10 10:16:30,664 INFO L226 Difference]: Without dead ends: 456 [2018-09-10 10:16:30,665 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1548 GetRequests, 1316 SyntacticMatches, 112 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7388 ImplicationChecksByTransitivity, 5.6s TimeCoverageRelationStatistics Valid=3840, Invalid=10922, Unknown=0, NotChecked=0, Total=14762 [2018-09-10 10:16:30,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 456 states. [2018-09-10 10:16:30,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 456 to 311. [2018-09-10 10:16:30,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 311 states. [2018-09-10 10:16:30,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311 states to 311 states and 329 transitions. [2018-09-10 10:16:30,684 INFO L78 Accepts]: Start accepts. Automaton has 311 states and 329 transitions. Word has length 365 [2018-09-10 10:16:30,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:30,684 INFO L480 AbstractCegarLoop]: Abstraction has 311 states and 329 transitions. [2018-09-10 10:16:30,684 INFO L481 AbstractCegarLoop]: Interpolant automaton has 91 states. [2018-09-10 10:16:30,684 INFO L276 IsEmpty]: Start isEmpty. Operand 311 states and 329 transitions. [2018-09-10 10:16:30,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 369 [2018-09-10 10:16:30,687 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:30,687 INFO L376 BasicCegarLoop]: trace histogram [30, 30, 30, 30, 30, 30, 29, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:30,687 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:30,687 INFO L82 PathProgramCache]: Analyzing trace with hash 1897909549, now seen corresponding path program 42 times [2018-09-10 10:16:30,688 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:30,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:30,688 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:30,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:30,689 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:30,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:32,162 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:32,162 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:32,162 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:32,170 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:16:32,171 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:16:32,329 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 30 check-sat command(s) [2018-09-10 10:16:32,330 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:32,336 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:34,061 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:34,061 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:35,242 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:35,263 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:35,263 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:35,278 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:16:35,278 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:16:36,483 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 30 check-sat command(s) [2018-09-10 10:16:36,484 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:36,497 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:36,625 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:36,625 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:38,129 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:38,131 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:38,131 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62, 62, 62, 62] total 92 [2018-09-10 10:16:38,131 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:38,132 INFO L459 AbstractCegarLoop]: Interpolant automaton has 92 states [2018-09-10 10:16:38,133 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2018-09-10 10:16:38,133 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1951, Invalid=6421, Unknown=0, NotChecked=0, Total=8372 [2018-09-10 10:16:38,134 INFO L87 Difference]: Start difference. First operand 311 states and 329 transitions. Second operand 92 states. [2018-09-10 10:16:40,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:40,197 INFO L93 Difference]: Finished difference Result 621 states and 729 transitions. [2018-09-10 10:16:40,197 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-09-10 10:16:40,197 INFO L78 Accepts]: Start accepts. Automaton has 92 states. Word has length 368 [2018-09-10 10:16:40,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:40,199 INFO L225 Difference]: With dead ends: 621 [2018-09-10 10:16:40,199 INFO L226 Difference]: Without dead ends: 464 [2018-09-10 10:16:40,200 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1562 GetRequests, 1324 SyntacticMatches, 118 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7337 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=3841, Invalid=10921, Unknown=0, NotChecked=0, Total=14762 [2018-09-10 10:16:40,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2018-09-10 10:16:40,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 314. [2018-09-10 10:16:40,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314 states. [2018-09-10 10:16:40,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 332 transitions. [2018-09-10 10:16:40,221 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 332 transitions. Word has length 368 [2018-09-10 10:16:40,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:40,222 INFO L480 AbstractCegarLoop]: Abstraction has 314 states and 332 transitions. [2018-09-10 10:16:40,222 INFO L481 AbstractCegarLoop]: Interpolant automaton has 92 states. [2018-09-10 10:16:40,222 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 332 transitions. [2018-09-10 10:16:40,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 372 [2018-09-10 10:16:40,224 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:40,224 INFO L376 BasicCegarLoop]: trace histogram [31, 31, 30, 30, 30, 30, 30, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:40,224 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:40,225 INFO L82 PathProgramCache]: Analyzing trace with hash 905442825, now seen corresponding path program 43 times [2018-09-10 10:16:40,225 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:40,225 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:40,225 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:40,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:40,226 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:40,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:40,913 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1452 proven. 2202 refuted. 0 times theorem prover too weak. 1540 trivial. 0 not checked. [2018-09-10 10:16:40,914 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:40,914 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:40,922 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:40,922 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:16:41,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:41,042 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:41,183 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:41,183 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:41,988 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:42,009 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:42,009 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:42,027 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:42,027 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:16:42,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:42,310 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:42,390 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:42,391 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:43,412 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:16:43,414 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:43,415 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 35, 35, 35, 35] total 39 [2018-09-10 10:16:43,415 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:43,416 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-10 10:16:43,416 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-10 10:16:43,416 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=909, Unknown=0, NotChecked=0, Total=1482 [2018-09-10 10:16:43,416 INFO L87 Difference]: Start difference. First operand 314 states and 332 transitions. Second operand 38 states. [2018-09-10 10:16:43,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:43,875 INFO L93 Difference]: Finished difference Result 330 states and 349 transitions. [2018-09-10 10:16:43,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-09-10 10:16:43,875 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 371 [2018-09-10 10:16:43,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:43,878 INFO L225 Difference]: With dead ends: 330 [2018-09-10 10:16:43,878 INFO L226 Difference]: Without dead ends: 328 [2018-09-10 10:16:43,878 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1551 GetRequests, 1394 SyntacticMatches, 118 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2250 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=586, Invalid=1054, Unknown=0, NotChecked=0, Total=1640 [2018-09-10 10:16:43,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2018-09-10 10:16:43,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 328. [2018-09-10 10:16:43,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2018-09-10 10:16:43,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 347 transitions. [2018-09-10 10:16:43,899 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 347 transitions. Word has length 371 [2018-09-10 10:16:43,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:43,899 INFO L480 AbstractCegarLoop]: Abstraction has 328 states and 347 transitions. [2018-09-10 10:16:43,899 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-10 10:16:43,900 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 347 transitions. [2018-09-10 10:16:43,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 390 [2018-09-10 10:16:43,902 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:43,902 INFO L376 BasicCegarLoop]: trace histogram [32, 32, 32, 32, 31, 31, 31, 31, 31, 31, 31, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:43,902 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:43,903 INFO L82 PathProgramCache]: Analyzing trace with hash 247740521, now seen corresponding path program 44 times [2018-09-10 10:16:43,903 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:43,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:43,903 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:43,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:43,904 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:43,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:45,405 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2480 proven. 1395 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:16:45,405 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:45,405 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:45,413 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:16:45,413 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:45,535 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:16:45,536 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:45,543 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:47,194 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2595 proven. 1395 refuted. 0 times theorem prover too weak. 1745 trivial. 0 not checked. [2018-09-10 10:16:47,194 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:48,747 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2477 proven. 1395 refuted. 0 times theorem prover too weak. 1863 trivial. 0 not checked. [2018-09-10 10:16:48,768 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:48,768 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:48,783 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:16:48,783 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:49,045 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:16:49,046 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:49,064 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:49,184 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2595 proven. 1395 refuted. 0 times theorem prover too weak. 1745 trivial. 0 not checked. [2018-09-10 10:16:49,184 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:50,455 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2477 proven. 1395 refuted. 0 times theorem prover too weak. 1863 trivial. 0 not checked. [2018-09-10 10:16:50,457 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:50,457 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 64, 64, 64, 64] total 96 [2018-09-10 10:16:50,457 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:50,458 INFO L459 AbstractCegarLoop]: Interpolant automaton has 96 states [2018-09-10 10:16:50,458 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2018-09-10 10:16:50,459 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2111, Invalid=7009, Unknown=0, NotChecked=0, Total=9120 [2018-09-10 10:16:50,459 INFO L87 Difference]: Start difference. First operand 328 states and 347 transitions. Second operand 96 states. [2018-09-10 10:16:55,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:55,534 INFO L93 Difference]: Finished difference Result 655 states and 767 transitions. [2018-09-10 10:16:55,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-09-10 10:16:55,534 INFO L78 Accepts]: Start accepts. Automaton has 96 states. Word has length 389 [2018-09-10 10:16:55,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:55,536 INFO L225 Difference]: With dead ends: 655 [2018-09-10 10:16:55,536 INFO L226 Difference]: Without dead ends: 486 [2018-09-10 10:16:55,538 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1650 GetRequests, 1403 SyntacticMatches, 122 SemanticMatches, 125 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7995 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=4126, Invalid=11876, Unknown=0, NotChecked=0, Total=16002 [2018-09-10 10:16:55,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 486 states. [2018-09-10 10:16:55,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 486 to 331. [2018-09-10 10:16:55,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2018-09-10 10:16:55,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 350 transitions. [2018-09-10 10:16:55,559 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 350 transitions. Word has length 389 [2018-09-10 10:16:55,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:55,559 INFO L480 AbstractCegarLoop]: Abstraction has 331 states and 350 transitions. [2018-09-10 10:16:55,559 INFO L481 AbstractCegarLoop]: Interpolant automaton has 96 states. [2018-09-10 10:16:55,559 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 350 transitions. [2018-09-10 10:16:55,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 393 [2018-09-10 10:16:55,562 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:55,562 INFO L376 BasicCegarLoop]: trace histogram [32, 32, 32, 32, 32, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:55,562 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:55,562 INFO L82 PathProgramCache]: Analyzing trace with hash -1056870131, now seen corresponding path program 45 times [2018-09-10 10:16:55,563 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:55,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:55,563 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:55,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:55,564 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:55,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:56,997 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:16:56,997 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:56,997 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:57,006 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:16:57,006 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:16:57,197 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 32 check-sat command(s) [2018-09-10 10:16:57,197 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:57,203 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:59,224 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:16:59,224 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:00,584 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:00,605 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:00,605 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:00,620 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:17:00,620 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:17:01,982 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 32 check-sat command(s) [2018-09-10 10:17:01,983 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:01,997 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:02,123 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:02,123 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:03,811 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:03,813 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:03,813 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 66, 66, 66, 66] total 98 [2018-09-10 10:17:03,813 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:03,815 INFO L459 AbstractCegarLoop]: Interpolant automaton has 98 states [2018-09-10 10:17:03,815 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2018-09-10 10:17:03,816 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2209, Invalid=7297, Unknown=0, NotChecked=0, Total=9506 [2018-09-10 10:17:03,816 INFO L87 Difference]: Start difference. First operand 331 states and 350 transitions. Second operand 98 states. [2018-09-10 10:17:05,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:05,947 INFO L93 Difference]: Finished difference Result 661 states and 776 transitions. [2018-09-10 10:17:05,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-09-10 10:17:05,948 INFO L78 Accepts]: Start accepts. Automaton has 98 states. Word has length 392 [2018-09-10 10:17:05,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:05,950 INFO L225 Difference]: With dead ends: 661 [2018-09-10 10:17:05,950 INFO L226 Difference]: Without dead ends: 494 [2018-09-10 10:17:05,952 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1664 GetRequests, 1410 SyntacticMatches, 126 SemanticMatches, 128 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8370 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=4353, Invalid=12417, Unknown=0, NotChecked=0, Total=16770 [2018-09-10 10:17:05,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states. [2018-09-10 10:17:05,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 334. [2018-09-10 10:17:05,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 334 states. [2018-09-10 10:17:05,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 334 states to 334 states and 353 transitions. [2018-09-10 10:17:05,972 INFO L78 Accepts]: Start accepts. Automaton has 334 states and 353 transitions. Word has length 392 [2018-09-10 10:17:05,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:05,972 INFO L480 AbstractCegarLoop]: Abstraction has 334 states and 353 transitions. [2018-09-10 10:17:05,972 INFO L481 AbstractCegarLoop]: Interpolant automaton has 98 states. [2018-09-10 10:17:05,973 INFO L276 IsEmpty]: Start isEmpty. Operand 334 states and 353 transitions. [2018-09-10 10:17:05,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 396 [2018-09-10 10:17:05,975 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:05,975 INFO L376 BasicCegarLoop]: trace histogram [33, 33, 32, 32, 32, 32, 32, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:05,976 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:05,976 INFO L82 PathProgramCache]: Analyzing trace with hash -1553742359, now seen corresponding path program 46 times [2018-09-10 10:17:05,976 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:05,976 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:05,977 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:05,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:05,977 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:06,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:06,692 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1645 proven. 2509 refuted. 0 times theorem prover too weak. 1770 trivial. 0 not checked. [2018-09-10 10:17:06,692 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:06,692 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:06,700 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:17:06,700 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:17:06,824 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:17:06,824 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:06,831 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:07,037 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:07,037 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:07,913 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:07,933 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:07,934 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:07,948 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:17:07,948 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:17:08,306 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:17:08,306 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:08,324 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:08,427 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:08,427 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:09,340 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:09,341 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:09,342 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 37, 37, 37] total 42 [2018-09-10 10:17:09,342 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:09,342 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-09-10 10:17:09,343 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-09-10 10:17:09,343 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=646, Invalid=1076, Unknown=0, NotChecked=0, Total=1722 [2018-09-10 10:17:09,343 INFO L87 Difference]: Start difference. First operand 334 states and 353 transitions. Second operand 41 states. [2018-09-10 10:17:09,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:09,943 INFO L93 Difference]: Finished difference Result 355 states and 377 transitions. [2018-09-10 10:17:09,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-09-10 10:17:09,944 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 395 [2018-09-10 10:17:09,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:09,947 INFO L225 Difference]: With dead ends: 355 [2018-09-10 10:17:09,947 INFO L226 Difference]: Without dead ends: 353 [2018-09-10 10:17:09,947 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1651 GetRequests, 1483 SyntacticMatches, 126 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2569 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=659, Invalid=1233, Unknown=0, NotChecked=0, Total=1892 [2018-09-10 10:17:09,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 353 states. [2018-09-10 10:17:09,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 353 to 348. [2018-09-10 10:17:09,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2018-09-10 10:17:09,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 368 transitions. [2018-09-10 10:17:09,967 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 368 transitions. Word has length 395 [2018-09-10 10:17:09,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:09,968 INFO L480 AbstractCegarLoop]: Abstraction has 348 states and 368 transitions. [2018-09-10 10:17:09,968 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-09-10 10:17:09,968 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 368 transitions. [2018-09-10 10:17:09,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 414 [2018-09-10 10:17:09,970 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:09,970 INFO L376 BasicCegarLoop]: trace histogram [34, 34, 34, 34, 33, 33, 33, 33, 33, 33, 33, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:09,970 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:09,970 INFO L82 PathProgramCache]: Analyzing trace with hash -779104183, now seen corresponding path program 47 times [2018-09-10 10:17:09,971 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:09,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:09,971 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:09,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:09,971 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:10,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:11,769 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:11,770 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:11,770 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:11,778 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:17:11,778 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:11,958 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2018-09-10 10:17:11,959 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:11,966 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:14,191 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:14,191 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:15,700 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:15,721 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:15,721 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:15,737 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:17:15,737 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:17,248 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2018-09-10 10:17:17,248 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:17,261 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:17,403 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:17,403 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:19,138 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:19,140 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:19,140 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [69, 69, 69, 69, 69] total 105 [2018-09-10 10:17:19,140 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:19,141 INFO L459 AbstractCegarLoop]: Interpolant automaton has 103 states [2018-09-10 10:17:19,141 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2018-09-10 10:17:19,142 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2553, Invalid=8367, Unknown=0, NotChecked=0, Total=10920 [2018-09-10 10:17:19,142 INFO L87 Difference]: Start difference. First operand 348 states and 368 transitions. Second operand 103 states. [2018-09-10 10:17:21,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:21,374 INFO L93 Difference]: Finished difference Result 695 states and 814 transitions. [2018-09-10 10:17:21,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-09-10 10:17:21,375 INFO L78 Accepts]: Start accepts. Automaton has 103 states. Word has length 413 [2018-09-10 10:17:21,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:21,377 INFO L225 Difference]: With dead ends: 695 [2018-09-10 10:17:21,377 INFO L226 Difference]: Without dead ends: 516 [2018-09-10 10:17:21,379 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1752 GetRequests, 1488 SyntacticMatches, 128 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9530 ImplicationChecksByTransitivity, 7.2s TimeCoverageRelationStatistics Valid=4896, Invalid=14010, Unknown=0, NotChecked=0, Total=18906 [2018-09-10 10:17:21,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 516 states. [2018-09-10 10:17:21,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 516 to 351. [2018-09-10 10:17:21,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 351 states. [2018-09-10 10:17:21,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 351 states to 351 states and 371 transitions. [2018-09-10 10:17:21,406 INFO L78 Accepts]: Start accepts. Automaton has 351 states and 371 transitions. Word has length 413 [2018-09-10 10:17:21,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:21,406 INFO L480 AbstractCegarLoop]: Abstraction has 351 states and 371 transitions. [2018-09-10 10:17:21,406 INFO L481 AbstractCegarLoop]: Interpolant automaton has 103 states. [2018-09-10 10:17:21,406 INFO L276 IsEmpty]: Start isEmpty. Operand 351 states and 371 transitions. [2018-09-10 10:17:21,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 417 [2018-09-10 10:17:21,408 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:21,409 INFO L376 BasicCegarLoop]: trace histogram [34, 34, 34, 34, 34, 34, 33, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:21,409 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:21,409 INFO L82 PathProgramCache]: Analyzing trace with hash 479616237, now seen corresponding path program 48 times [2018-09-10 10:17:21,409 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:21,410 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:21,410 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:21,410 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:21,410 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:21,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:23,214 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:23,214 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:23,214 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:23,221 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:17:23,221 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:17:23,399 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 34 check-sat command(s) [2018-09-10 10:17:23,399 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:23,405 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:25,562 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:25,562 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:27,048 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:27,068 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:27,069 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:27,083 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:17:27,083 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:17:28,627 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 34 check-sat command(s) [2018-09-10 10:17:28,627 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:28,640 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:28,786 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:28,786 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:30,419 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:30,422 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:30,422 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [70, 70, 70, 70, 70] total 104 [2018-09-10 10:17:30,423 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:30,424 INFO L459 AbstractCegarLoop]: Interpolant automaton has 104 states [2018-09-10 10:17:30,424 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2018-09-10 10:17:30,425 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2483, Invalid=8229, Unknown=0, NotChecked=0, Total=10712 [2018-09-10 10:17:30,425 INFO L87 Difference]: Start difference. First operand 351 states and 371 transitions. Second operand 104 states. [2018-09-10 10:17:32,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:32,886 INFO L93 Difference]: Finished difference Result 701 states and 823 transitions. [2018-09-10 10:17:32,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-09-10 10:17:32,886 INFO L78 Accepts]: Start accepts. Automaton has 104 states. Word has length 416 [2018-09-10 10:17:32,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:32,889 INFO L225 Difference]: With dead ends: 701 [2018-09-10 10:17:32,889 INFO L226 Difference]: Without dead ends: 524 [2018-09-10 10:17:32,891 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1766 GetRequests, 1496 SyntacticMatches, 134 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9471 ImplicationChecksByTransitivity, 7.0s TimeCoverageRelationStatistics Valid=4897, Invalid=14009, Unknown=0, NotChecked=0, Total=18906 [2018-09-10 10:17:32,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 524 states. [2018-09-10 10:17:32,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 524 to 354. [2018-09-10 10:17:32,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 354 states. [2018-09-10 10:17:32,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 374 transitions. [2018-09-10 10:17:32,916 INFO L78 Accepts]: Start accepts. Automaton has 354 states and 374 transitions. Word has length 416 [2018-09-10 10:17:32,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:32,917 INFO L480 AbstractCegarLoop]: Abstraction has 354 states and 374 transitions. [2018-09-10 10:17:32,917 INFO L481 AbstractCegarLoop]: Interpolant automaton has 104 states. [2018-09-10 10:17:32,917 INFO L276 IsEmpty]: Start isEmpty. Operand 354 states and 374 transitions. [2018-09-10 10:17:32,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 420 [2018-09-10 10:17:32,920 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:32,920 INFO L376 BasicCegarLoop]: trace histogram [35, 35, 34, 34, 34, 34, 34, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:32,920 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:32,920 INFO L82 PathProgramCache]: Analyzing trace with hash -339812919, now seen corresponding path program 49 times [2018-09-10 10:17:32,921 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:32,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:32,921 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:32,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:32,921 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:32,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:34,244 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1850 proven. 2836 refuted. 0 times theorem prover too weak. 2016 trivial. 0 not checked. [2018-09-10 10:17:34,245 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:34,245 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:34,252 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:34,252 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:17:34,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:34,388 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:34,576 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:34,576 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:35,567 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:35,588 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:35,588 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:35,602 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:35,603 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:17:35,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:35,902 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:36,100 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:36,101 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:37,141 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:17:37,143 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:37,144 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 39, 39, 39, 39] total 43 [2018-09-10 10:17:37,144 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:37,144 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-09-10 10:17:37,145 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-09-10 10:17:37,145 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=715, Invalid=1091, Unknown=0, NotChecked=0, Total=1806 [2018-09-10 10:17:37,145 INFO L87 Difference]: Start difference. First operand 354 states and 374 transitions. Second operand 42 states. [2018-09-10 10:17:37,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:37,702 INFO L93 Difference]: Finished difference Result 370 states and 391 transitions. [2018-09-10 10:17:37,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-09-10 10:17:37,703 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 419 [2018-09-10 10:17:37,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:37,706 INFO L225 Difference]: With dead ends: 370 [2018-09-10 10:17:37,706 INFO L226 Difference]: Without dead ends: 368 [2018-09-10 10:17:37,706 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1751 GetRequests, 1574 SyntacticMatches, 134 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2822 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=728, Invalid=1252, Unknown=0, NotChecked=0, Total=1980 [2018-09-10 10:17:37,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states. [2018-09-10 10:17:37,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 368. [2018-09-10 10:17:37,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 368 states. [2018-09-10 10:17:37,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 389 transitions. [2018-09-10 10:17:37,724 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 389 transitions. Word has length 419 [2018-09-10 10:17:37,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:37,724 INFO L480 AbstractCegarLoop]: Abstraction has 368 states and 389 transitions. [2018-09-10 10:17:37,724 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-09-10 10:17:37,725 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 389 transitions. [2018-09-10 10:17:37,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 438 [2018-09-10 10:17:37,727 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:37,727 INFO L376 BasicCegarLoop]: trace histogram [36, 36, 36, 36, 35, 35, 35, 35, 35, 35, 35, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:37,727 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:37,728 INFO L82 PathProgramCache]: Analyzing trace with hash 487108649, now seen corresponding path program 50 times [2018-09-10 10:17:37,728 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:37,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:37,728 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:37,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:37,729 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:37,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:39,747 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3150 proven. 1785 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-10 10:17:39,747 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:39,747 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:39,755 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:17:39,755 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:39,887 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:17:39,888 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:39,894 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:41,943 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3281 proven. 1785 refuted. 0 times theorem prover too weak. 2249 trivial. 0 not checked. [2018-09-10 10:17:41,944 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:43,548 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3147 proven. 1785 refuted. 0 times theorem prover too weak. 2383 trivial. 0 not checked. [2018-09-10 10:17:43,568 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:43,568 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:43,584 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:17:43,584 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:43,893 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:17:43,893 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:43,915 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:44,082 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3281 proven. 1785 refuted. 0 times theorem prover too weak. 2249 trivial. 0 not checked. [2018-09-10 10:17:44,082 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:45,810 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3147 proven. 1785 refuted. 0 times theorem prover too weak. 2383 trivial. 0 not checked. [2018-09-10 10:17:45,812 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:45,812 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [73, 72, 72, 72, 72] total 108 [2018-09-10 10:17:45,812 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:45,813 INFO L459 AbstractCegarLoop]: Interpolant automaton has 108 states [2018-09-10 10:17:45,813 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 108 interpolants. [2018-09-10 10:17:45,814 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2663, Invalid=8893, Unknown=0, NotChecked=0, Total=11556 [2018-09-10 10:17:45,814 INFO L87 Difference]: Start difference. First operand 368 states and 389 transitions. Second operand 108 states. [2018-09-10 10:17:48,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:48,581 INFO L93 Difference]: Finished difference Result 735 states and 861 transitions. [2018-09-10 10:17:48,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2018-09-10 10:17:48,581 INFO L78 Accepts]: Start accepts. Automaton has 108 states. Word has length 437 [2018-09-10 10:17:48,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:48,583 INFO L225 Difference]: With dead ends: 735 [2018-09-10 10:17:48,583 INFO L226 Difference]: Without dead ends: 546 [2018-09-10 10:17:48,585 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1854 GetRequests, 1575 SyntacticMatches, 138 SemanticMatches, 141 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10217 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=5218, Invalid=15088, Unknown=0, NotChecked=0, Total=20306 [2018-09-10 10:17:48,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2018-09-10 10:17:48,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 371. [2018-09-10 10:17:48,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 371 states. [2018-09-10 10:17:48,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371 states to 371 states and 392 transitions. [2018-09-10 10:17:48,606 INFO L78 Accepts]: Start accepts. Automaton has 371 states and 392 transitions. Word has length 437 [2018-09-10 10:17:48,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:48,607 INFO L480 AbstractCegarLoop]: Abstraction has 371 states and 392 transitions. [2018-09-10 10:17:48,607 INFO L481 AbstractCegarLoop]: Interpolant automaton has 108 states. [2018-09-10 10:17:48,607 INFO L276 IsEmpty]: Start isEmpty. Operand 371 states and 392 transitions. [2018-09-10 10:17:48,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 441 [2018-09-10 10:17:48,609 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:48,609 INFO L376 BasicCegarLoop]: trace histogram [36, 36, 36, 36, 36, 36, 35, 35, 35, 35, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:48,609 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_fragtest_simple_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:48,609 INFO L82 PathProgramCache]: Analyzing trace with hash 1327272141, now seen corresponding path program 51 times [2018-09-10 10:17:48,609 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:48,610 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:48,610 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:48,610 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:48,610 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:48,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat Received shutdown request... [2018-09-10 10:17:50,041 WARN L549 AbstractCegarLoop]: Verification canceled [2018-09-10 10:17:50,045 WARN L206 ceAbstractionStarter]: Timeout [2018-09-10 10:17:50,046 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.09 10:17:50 BoogieIcfgContainer [2018-09-10 10:17:50,046 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-10 10:17:50,046 INFO L168 Benchmark]: Toolchain (without parser) took 231342.27 ms. Allocated memory was 1.5 GB in the beginning and 2.6 GB in the end (delta: 1.1 GB). Free memory was 1.4 GB in the beginning and 2.5 GB in the end (delta: -1.1 GB). Peak memory consumption was 946.4 MB. Max. memory is 7.1 GB. [2018-09-10 10:17:50,048 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-10 10:17:50,048 INFO L168 Benchmark]: CACSL2BoogieTranslator took 260.35 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-09-10 10:17:50,048 INFO L168 Benchmark]: Boogie Procedure Inliner took 21.75 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-10 10:17:50,049 INFO L168 Benchmark]: Boogie Preprocessor took 21.66 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-10 10:17:50,049 INFO L168 Benchmark]: RCFGBuilder took 461.47 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 751.8 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -801.6 MB). Peak memory consumption was 26.9 MB. Max. memory is 7.1 GB. [2018-09-10 10:17:50,049 INFO L168 Benchmark]: TraceAbstraction took 230571.03 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 334.0 MB). Free memory was 2.2 GB in the beginning and 2.5 GB in the end (delta: -293.7 MB). Peak memory consumption was 985.6 MB. Max. memory is 7.1 GB. [2018-09-10 10:17:50,052 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 260.35 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 21.75 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 21.66 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 461.47 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 751.8 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -801.6 MB). Peak memory consumption was 26.9 MB. Max. memory is 7.1 GB. * TraceAbstraction took 230571.03 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 334.0 MB). Free memory was 2.2 GB in the beginning and 2.5 GB in the end (delta: -293.7 MB). Peak memory consumption was 985.6 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was analyzing trace of length 441 with TraceHistMax 36, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 53 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 30 locations, 1 error locations. TIMEOUT Result, 230.5s OverallTime, 54 OverallIterations, 36 TraceHistogramMax, 54.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3926 SDtfs, 8247 SDslu, 37495 SDs, 0 SdLazy, 30265 SolverSat, 4656 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 29.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 49813 GetRequests, 43157 SyntacticMatches, 3614 SemanticMatches, 3042 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143001 ImplicationChecksByTransitivity, 136.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=371occurred in iteration=53, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.7s AutomataMinimizationTime, 53 MinimizatonAttempts, 3195 StatesRemovedByMinimization, 44 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.3s SsaConstructionTime, 23.9s SatisfiabilityAnalysisTime, 143.7s InterpolantComputationTime, 35429 NumberOfCodeBlocks, 35429 NumberOfCodeBlocksAsserted, 1067 NumberOfCheckSat, 58752 ConstructedInterpolants, 0 QuantifiedInterpolants, 52002208 SizeOfPredicates, 284 NumberOfNonLiveVariables, 56742 ConjunctsInSsa, 4104 ConjunctsInUnsatCore, 253 InterpolantComputations, 3 PerfectInterpolantSequences, 443886/634345 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/fragtest_simple_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-09-10_10-17-50-061.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/fragtest_simple_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-10_10-17-50-061.csv Completed graceful shutdown