java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-invgen/half_2_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-3142e50-m [2018-09-10 10:13:59,122 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-10 10:13:59,124 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-10 10:13:59,136 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-10 10:13:59,136 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-10 10:13:59,137 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-10 10:13:59,138 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-10 10:13:59,140 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-10 10:13:59,142 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-10 10:13:59,143 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-10 10:13:59,144 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-10 10:13:59,144 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-10 10:13:59,145 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-10 10:13:59,146 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-10 10:13:59,147 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-10 10:13:59,149 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-10 10:13:59,150 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-10 10:13:59,154 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-10 10:13:59,157 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-10 10:13:59,158 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-10 10:13:59,168 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-10 10:13:59,169 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-10 10:13:59,177 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-10 10:13:59,177 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-10 10:13:59,177 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-10 10:13:59,178 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-10 10:13:59,179 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-10 10:13:59,182 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-10 10:13:59,183 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-10 10:13:59,184 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-10 10:13:59,186 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-10 10:13:59,187 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-09-10 10:13:59,187 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-09-10 10:13:59,188 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-09-10 10:13:59,191 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-09-10 10:13:59,192 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-09-10 10:13:59,192 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-10 10:13:59,217 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-10 10:13:59,218 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-10 10:13:59,218 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-10 10:13:59,219 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-10 10:13:59,219 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-10 10:13:59,219 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-10 10:13:59,219 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-10 10:13:59,219 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-10 10:13:59,220 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-10 10:13:59,220 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-10 10:13:59,220 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-10 10:13:59,221 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-10 10:13:59,221 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-10 10:13:59,221 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-10 10:13:59,221 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-10 10:13:59,222 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-10 10:13:59,222 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-10 10:13:59,222 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-10 10:13:59,222 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-10 10:13:59,222 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-10 10:13:59,223 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-10 10:13:59,223 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-10 10:13:59,223 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-10 10:13:59,223 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-10 10:13:59,223 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-10 10:13:59,224 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-10 10:13:59,224 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-10 10:13:59,224 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-10 10:13:59,224 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-10 10:13:59,224 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-10 10:13:59,225 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-10 10:13:59,225 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-10 10:13:59,225 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-10 10:13:59,292 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-10 10:13:59,305 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-10 10:13:59,310 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-10 10:13:59,312 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-10 10:13:59,312 INFO L276 PluginConnector]: CDTParser initialized [2018-09-10 10:13:59,313 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-invgen/half_2_true-unreach-call_true-termination.i [2018-09-10 10:13:59,683 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b843b809/a540f173d763491290e9f866b8606be3/FLAG456b4e1e4 [2018-09-10 10:13:59,869 INFO L276 CDTParser]: Found 1 translation units. [2018-09-10 10:13:59,870 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-invgen/half_2_true-unreach-call_true-termination.i [2018-09-10 10:13:59,878 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b843b809/a540f173d763491290e9f866b8606be3/FLAG456b4e1e4 [2018-09-10 10:13:59,899 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b843b809/a540f173d763491290e9f866b8606be3 [2018-09-10 10:13:59,913 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-10 10:13:59,917 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-10 10:13:59,918 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-10 10:13:59,918 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-10 10:13:59,927 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-10 10:13:59,928 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 10:13:59" (1/1) ... [2018-09-10 10:13:59,932 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@606d6bb8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:13:59, skipping insertion in model container [2018-09-10 10:13:59,932 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 10:13:59" (1/1) ... [2018-09-10 10:14:00,149 INFO L180 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-09-10 10:14:00,200 INFO L175 PostProcessor]: Settings: Checked method=main [2018-09-10 10:14:00,222 INFO L431 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-10 10:14:00,229 INFO L175 PostProcessor]: Settings: Checked method=main [2018-09-10 10:14:00,248 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00 WrapperNode [2018-09-10 10:14:00,248 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-10 10:14:00,249 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-10 10:14:00,250 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-10 10:14:00,250 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-10 10:14:00,261 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (1/1) ... [2018-09-10 10:14:00,267 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (1/1) ... [2018-09-10 10:14:00,275 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-10 10:14:00,275 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-10 10:14:00,276 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-10 10:14:00,276 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-10 10:14:00,288 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (1/1) ... [2018-09-10 10:14:00,288 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (1/1) ... [2018-09-10 10:14:00,294 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (1/1) ... [2018-09-10 10:14:00,294 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (1/1) ... [2018-09-10 10:14:00,297 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (1/1) ... [2018-09-10 10:14:00,304 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (1/1) ... [2018-09-10 10:14:00,307 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (1/1) ... [2018-09-10 10:14:00,309 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-10 10:14:00,309 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-10 10:14:00,310 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-10 10:14:00,310 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-10 10:14:00,318 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-10 10:14:00,391 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-10 10:14:00,391 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-10 10:14:00,391 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assert [2018-09-10 10:14:00,392 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assert [2018-09-10 10:14:00,392 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-10 10:14:00,392 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-10 10:14:00,392 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-10 10:14:00,392 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-10 10:14:00,817 INFO L353 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-10 10:14:00,818 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 10:14:00 BoogieIcfgContainer [2018-09-10 10:14:00,818 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-10 10:14:00,819 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-10 10:14:00,819 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-10 10:14:00,822 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-10 10:14:00,823 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.09 10:13:59" (1/3) ... [2018-09-10 10:14:00,823 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@746edd61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 10:14:00, skipping insertion in model container [2018-09-10 10:14:00,824 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:00" (2/3) ... [2018-09-10 10:14:00,824 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@746edd61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 10:14:00, skipping insertion in model container [2018-09-10 10:14:00,824 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 10:14:00" (3/3) ... [2018-09-10 10:14:00,826 INFO L112 eAbstractionObserver]: Analyzing ICFG half_2_true-unreach-call_true-termination.i [2018-09-10 10:14:00,837 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-10 10:14:00,846 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-10 10:14:00,920 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-10 10:14:00,921 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-10 10:14:00,921 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-10 10:14:00,921 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-10 10:14:00,921 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-10 10:14:00,922 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-10 10:14:00,922 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-10 10:14:00,922 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-10 10:14:00,922 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-10 10:14:00,942 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2018-09-10 10:14:00,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-09-10 10:14:00,949 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:00,950 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:00,951 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:00,956 INFO L82 PathProgramCache]: Analyzing trace with hash -1251515193, now seen corresponding path program 1 times [2018-09-10 10:14:00,959 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:01,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:01,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:01,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:01,013 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:01,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:01,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:01,077 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:14:01,078 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-10 10:14:01,078 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:14:01,083 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-10 10:14:01,099 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-10 10:14:01,100 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-10 10:14:01,103 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 2 states. [2018-09-10 10:14:01,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:01,130 INFO L93 Difference]: Finished difference Result 40 states and 48 transitions. [2018-09-10 10:14:01,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-10 10:14:01,132 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-09-10 10:14:01,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:01,142 INFO L225 Difference]: With dead ends: 40 [2018-09-10 10:14:01,143 INFO L226 Difference]: Without dead ends: 19 [2018-09-10 10:14:01,147 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-10 10:14:01,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-09-10 10:14:01,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-09-10 10:14:01,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-09-10 10:14:01,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2018-09-10 10:14:01,189 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 14 [2018-09-10 10:14:01,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:01,190 INFO L480 AbstractCegarLoop]: Abstraction has 19 states and 20 transitions. [2018-09-10 10:14:01,190 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-10 10:14:01,190 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 20 transitions. [2018-09-10 10:14:01,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-09-10 10:14:01,191 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:01,191 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:01,192 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:01,192 INFO L82 PathProgramCache]: Analyzing trace with hash 129242268, now seen corresponding path program 1 times [2018-09-10 10:14:01,192 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:01,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:01,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:01,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:01,194 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:01,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:01,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:01,353 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:14:01,354 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-09-10 10:14:01,354 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:14:01,355 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-10 10:14:01,356 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-10 10:14:01,356 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-09-10 10:14:01,357 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. Second operand 5 states. [2018-09-10 10:14:01,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:01,570 INFO L93 Difference]: Finished difference Result 34 states and 36 transitions. [2018-09-10 10:14:01,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-10 10:14:01,570 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-09-10 10:14:01,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:01,571 INFO L225 Difference]: With dead ends: 34 [2018-09-10 10:14:01,572 INFO L226 Difference]: Without dead ends: 21 [2018-09-10 10:14:01,573 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-09-10 10:14:01,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-09-10 10:14:01,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-09-10 10:14:01,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-09-10 10:14:01,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 22 transitions. [2018-09-10 10:14:01,580 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 22 transitions. Word has length 15 [2018-09-10 10:14:01,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:01,581 INFO L480 AbstractCegarLoop]: Abstraction has 21 states and 22 transitions. [2018-09-10 10:14:01,581 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-10 10:14:01,581 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 22 transitions. [2018-09-10 10:14:01,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-09-10 10:14:01,582 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:01,582 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:01,582 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:01,583 INFO L82 PathProgramCache]: Analyzing trace with hash -858942154, now seen corresponding path program 1 times [2018-09-10 10:14:01,583 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:01,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:01,584 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:01,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:01,585 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:01,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:02,005 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:02,005 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:02,006 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:02,024 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:02,025 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:02,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:02,063 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:02,222 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:02,222 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:02,595 WARN L175 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 17 [2018-09-10 10:14:02,714 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:02,737 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:02,737 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:02,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:02,756 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:02,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:02,776 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:02,877 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:02,877 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:02,928 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:02,939 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:02,939 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-09-10 10:14:02,939 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:02,940 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-09-10 10:14:02,940 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-09-10 10:14:02,941 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2018-09-10 10:14:02,941 INFO L87 Difference]: Start difference. First operand 21 states and 22 transitions. Second operand 9 states. [2018-09-10 10:14:03,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:03,543 INFO L93 Difference]: Finished difference Result 38 states and 41 transitions. [2018-09-10 10:14:03,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-10 10:14:03,544 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 17 [2018-09-10 10:14:03,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:03,546 INFO L225 Difference]: With dead ends: 38 [2018-09-10 10:14:03,546 INFO L226 Difference]: Without dead ends: 23 [2018-09-10 10:14:03,548 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 56 SyntacticMatches, 6 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=58, Invalid=214, Unknown=0, NotChecked=0, Total=272 [2018-09-10 10:14:03,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-09-10 10:14:03,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-09-10 10:14:03,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-09-10 10:14:03,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 24 transitions. [2018-09-10 10:14:03,554 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 24 transitions. Word has length 17 [2018-09-10 10:14:03,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:03,555 INFO L480 AbstractCegarLoop]: Abstraction has 23 states and 24 transitions. [2018-09-10 10:14:03,555 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-09-10 10:14:03,555 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 24 transitions. [2018-09-10 10:14:03,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-09-10 10:14:03,556 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:03,556 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:03,556 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:03,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1316399280, now seen corresponding path program 2 times [2018-09-10 10:14:03,557 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:03,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:03,558 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:03,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:03,558 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:03,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:03,652 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:03,652 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:03,652 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:03,663 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:03,663 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:03,680 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:03,680 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:03,683 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:03,767 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:03,767 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:03,915 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:03,936 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:03,937 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:03,953 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:03,953 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:03,975 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:03,975 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:03,979 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:04,014 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:04,014 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:04,045 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:04,047 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:04,047 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-09-10 10:14:04,048 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:04,049 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-09-10 10:14:04,049 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-09-10 10:14:04,050 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2018-09-10 10:14:04,050 INFO L87 Difference]: Start difference. First operand 23 states and 24 transitions. Second operand 9 states. [2018-09-10 10:14:04,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:04,287 INFO L93 Difference]: Finished difference Result 37 states and 39 transitions. [2018-09-10 10:14:04,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-09-10 10:14:04,287 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 19 [2018-09-10 10:14:04,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:04,291 INFO L225 Difference]: With dead ends: 37 [2018-09-10 10:14:04,292 INFO L226 Difference]: Without dead ends: 35 [2018-09-10 10:14:04,292 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 66 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=48, Invalid=162, Unknown=0, NotChecked=0, Total=210 [2018-09-10 10:14:04,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-09-10 10:14:04,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 30. [2018-09-10 10:14:04,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-09-10 10:14:04,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 31 transitions. [2018-09-10 10:14:04,303 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 31 transitions. Word has length 19 [2018-09-10 10:14:04,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:04,304 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 31 transitions. [2018-09-10 10:14:04,304 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-09-10 10:14:04,304 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2018-09-10 10:14:04,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-09-10 10:14:04,305 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:04,305 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:04,305 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:04,306 INFO L82 PathProgramCache]: Analyzing trace with hash -1581323913, now seen corresponding path program 1 times [2018-09-10 10:14:04,306 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:04,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:04,307 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:04,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:04,307 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:04,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:04,727 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:04,727 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:04,728 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:04,737 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:04,737 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:04,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:04,751 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:05,011 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:05,011 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:05,559 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:05,579 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:05,579 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:05,596 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:05,596 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:05,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:05,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:05,781 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:05,781 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:06,199 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:06,201 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:06,202 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 11, 10] total 27 [2018-09-10 10:14:06,202 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:06,203 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-10 10:14:06,203 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-10 10:14:06,204 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=588, Unknown=0, NotChecked=0, Total=702 [2018-09-10 10:14:06,204 INFO L87 Difference]: Start difference. First operand 30 states and 31 transitions. Second operand 18 states. [2018-09-10 10:14:06,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:06,636 INFO L93 Difference]: Finished difference Result 55 states and 58 transitions. [2018-09-10 10:14:06,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-10 10:14:06,636 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 27 [2018-09-10 10:14:06,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:06,640 INFO L225 Difference]: With dead ends: 55 [2018-09-10 10:14:06,640 INFO L226 Difference]: Without dead ends: 32 [2018-09-10 10:14:06,642 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 81 SyntacticMatches, 14 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 345 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=169, Invalid=887, Unknown=0, NotChecked=0, Total=1056 [2018-09-10 10:14:06,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-09-10 10:14:06,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-09-10 10:14:06,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-09-10 10:14:06,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 33 transitions. [2018-09-10 10:14:06,648 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 33 transitions. Word has length 27 [2018-09-10 10:14:06,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:06,648 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 33 transitions. [2018-09-10 10:14:06,649 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-10 10:14:06,649 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 33 transitions. [2018-09-10 10:14:06,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-09-10 10:14:06,650 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:06,650 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:06,650 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:06,651 INFO L82 PathProgramCache]: Analyzing trace with hash -2023075055, now seen corresponding path program 2 times [2018-09-10 10:14:06,651 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:06,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:06,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:06,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:06,652 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:06,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:06,786 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 7 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:06,787 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:06,787 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:06,795 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:06,795 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:06,807 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:06,808 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:06,811 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:06,913 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:06,913 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:07,094 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:07,115 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:07,115 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:07,131 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:07,131 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:07,163 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:07,164 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:07,168 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:07,177 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:07,178 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:07,287 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:07,289 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:07,289 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9, 9, 9] total 18 [2018-09-10 10:14:07,289 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:07,290 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-10 10:14:07,291 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-10 10:14:07,291 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=249, Unknown=0, NotChecked=0, Total=306 [2018-09-10 10:14:07,291 INFO L87 Difference]: Start difference. First operand 32 states and 33 transitions. Second operand 15 states. [2018-09-10 10:14:07,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:07,746 INFO L93 Difference]: Finished difference Result 47 states and 49 transitions. [2018-09-10 10:14:07,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-10 10:14:07,747 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 29 [2018-09-10 10:14:07,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:07,749 INFO L225 Difference]: With dead ends: 47 [2018-09-10 10:14:07,749 INFO L226 Difference]: Without dead ends: 45 [2018-09-10 10:14:07,750 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 104 SyntacticMatches, 6 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 145 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=107, Invalid=445, Unknown=0, NotChecked=0, Total=552 [2018-09-10 10:14:07,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-09-10 10:14:07,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 40. [2018-09-10 10:14:07,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-09-10 10:14:07,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 41 transitions. [2018-09-10 10:14:07,758 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 41 transitions. Word has length 29 [2018-09-10 10:14:07,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:07,758 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 41 transitions. [2018-09-10 10:14:07,758 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-10 10:14:07,759 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2018-09-10 10:14:07,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-09-10 10:14:07,760 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:07,760 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:07,760 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:07,761 INFO L82 PathProgramCache]: Analyzing trace with hash 2014090296, now seen corresponding path program 3 times [2018-09-10 10:14:07,761 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:07,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:07,762 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:07,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:07,762 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:07,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:08,122 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 7 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-10 10:14:08,123 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:08,123 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:08,131 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:08,131 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:08,154 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-10 10:14:08,154 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:08,157 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:08,405 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 23 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-10 10:14:08,405 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:09,155 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 23 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-10 10:14:09,176 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:09,176 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:09,193 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:09,193 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:09,240 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-10 10:14:09,241 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:09,245 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:09,603 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 22 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:09,603 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:09,836 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 22 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:09,838 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:09,838 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 14, 12, 12] total 38 [2018-09-10 10:14:09,838 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:09,839 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-10 10:14:09,839 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-10 10:14:09,839 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=196, Invalid=1210, Unknown=0, NotChecked=0, Total=1406 [2018-09-10 10:14:09,840 INFO L87 Difference]: Start difference. First operand 40 states and 41 transitions. Second operand 20 states. [2018-09-10 10:14:11,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:11,022 INFO L93 Difference]: Finished difference Result 65 states and 70 transitions. [2018-09-10 10:14:11,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-10 10:14:11,023 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 37 [2018-09-10 10:14:11,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:11,025 INFO L225 Difference]: With dead ends: 65 [2018-09-10 10:14:11,025 INFO L226 Difference]: Without dead ends: 42 [2018-09-10 10:14:11,027 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 114 SyntacticMatches, 12 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 698 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=260, Invalid=1632, Unknown=0, NotChecked=0, Total=1892 [2018-09-10 10:14:11,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-09-10 10:14:11,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-09-10 10:14:11,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-09-10 10:14:11,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 43 transitions. [2018-09-10 10:14:11,034 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 43 transitions. Word has length 37 [2018-09-10 10:14:11,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:11,034 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 43 transitions. [2018-09-10 10:14:11,034 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-10 10:14:11,034 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2018-09-10 10:14:11,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-09-10 10:14:11,035 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:11,036 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:11,036 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:11,036 INFO L82 PathProgramCache]: Analyzing trace with hash -488880814, now seen corresponding path program 4 times [2018-09-10 10:14:11,036 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:11,037 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:11,037 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:11,037 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:11,038 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:11,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:11,175 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 15 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-10 10:14:11,175 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:11,175 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:11,183 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:11,183 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:11,198 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:11,199 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:11,202 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:11,336 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 3 proven. 34 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-10 10:14:11,336 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:11,496 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 3 proven. 34 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-10 10:14:11,517 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:11,517 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:11,534 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:11,534 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:11,570 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:11,570 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:11,574 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:11,582 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 30 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:11,582 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:11,694 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 30 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:11,696 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:11,696 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13, 11, 11] total 24 [2018-09-10 10:14:11,696 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:11,696 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-10 10:14:11,697 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-10 10:14:11,697 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=462, Unknown=0, NotChecked=0, Total=552 [2018-09-10 10:14:11,698 INFO L87 Difference]: Start difference. First operand 42 states and 43 transitions. Second operand 18 states. [2018-09-10 10:14:12,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:12,017 INFO L93 Difference]: Finished difference Result 57 states and 59 transitions. [2018-09-10 10:14:12,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-10 10:14:12,017 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 39 [2018-09-10 10:14:12,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:12,019 INFO L225 Difference]: With dead ends: 57 [2018-09-10 10:14:12,019 INFO L226 Difference]: Without dead ends: 55 [2018-09-10 10:14:12,020 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 133 SyntacticMatches, 13 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 337 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=175, Invalid=817, Unknown=0, NotChecked=0, Total=992 [2018-09-10 10:14:12,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-09-10 10:14:12,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 50. [2018-09-10 10:14:12,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-09-10 10:14:12,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 51 transitions. [2018-09-10 10:14:12,029 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 51 transitions. Word has length 39 [2018-09-10 10:14:12,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:12,029 INFO L480 AbstractCegarLoop]: Abstraction has 50 states and 51 transitions. [2018-09-10 10:14:12,029 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-10 10:14:12,030 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 51 transitions. [2018-09-10 10:14:12,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-09-10 10:14:12,032 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:12,032 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:12,032 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:12,033 INFO L82 PathProgramCache]: Analyzing trace with hash 684504441, now seen corresponding path program 5 times [2018-09-10 10:14:12,033 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:12,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:12,034 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:12,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:12,034 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:12,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:12,382 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 17 proven. 36 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-09-10 10:14:12,382 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:12,382 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:12,396 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:12,396 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:12,482 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2018-09-10 10:14:12,483 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:12,486 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:13,104 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-09-10 10:14:13,104 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:13,619 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-09-10 10:14:13,639 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:13,640 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:13,655 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:13,655 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:13,714 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2018-09-10 10:14:13,714 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:13,719 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:13,919 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 6 proven. 41 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:13,919 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:14,079 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 6 proven. 41 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:14,080 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:14,080 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 15, 14] total 38 [2018-09-10 10:14:14,080 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:14,081 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-10 10:14:14,081 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-10 10:14:14,082 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=1213, Unknown=0, NotChecked=0, Total=1406 [2018-09-10 10:14:14,082 INFO L87 Difference]: Start difference. First operand 50 states and 51 transitions. Second operand 26 states. [2018-09-10 10:14:14,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:14,925 INFO L93 Difference]: Finished difference Result 97 states and 102 transitions. [2018-09-10 10:14:14,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-10 10:14:14,926 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 47 [2018-09-10 10:14:14,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:14,927 INFO L225 Difference]: With dead ends: 97 [2018-09-10 10:14:14,928 INFO L226 Difference]: Without dead ends: 62 [2018-09-10 10:14:14,930 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 212 GetRequests, 153 SyntacticMatches, 15 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 736 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=288, Invalid=1782, Unknown=0, NotChecked=0, Total=2070 [2018-09-10 10:14:14,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-09-10 10:14:14,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 52. [2018-09-10 10:14:14,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-09-10 10:14:14,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2018-09-10 10:14:14,936 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 53 transitions. Word has length 47 [2018-09-10 10:14:14,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:14,937 INFO L480 AbstractCegarLoop]: Abstraction has 52 states and 53 transitions. [2018-09-10 10:14:14,937 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-10 10:14:14,937 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 53 transitions. [2018-09-10 10:14:14,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-09-10 10:14:14,938 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:14,938 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:14,938 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:14,939 INFO L82 PathProgramCache]: Analyzing trace with hash -609399277, now seen corresponding path program 6 times [2018-09-10 10:14:14,939 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:14,940 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:14,940 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:14,940 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:14,940 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:14,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:15,134 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 25 proven. 38 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-09-10 10:14:15,134 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:15,134 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:15,142 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:15,142 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:15,178 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2018-09-10 10:14:15,179 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:15,181 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:15,322 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:15,322 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:15,923 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:15,947 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:15,947 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:15,962 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:15,963 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:16,041 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2018-09-10 10:14:16,041 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:16,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:16,057 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:16,057 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:16,224 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:16,226 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:16,226 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13, 13, 13] total 26 [2018-09-10 10:14:16,226 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:16,228 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-10 10:14:16,228 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-10 10:14:16,228 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=538, Unknown=0, NotChecked=0, Total=650 [2018-09-10 10:14:16,229 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. Second operand 21 states. [2018-09-10 10:14:16,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:16,761 INFO L93 Difference]: Finished difference Result 67 states and 69 transitions. [2018-09-10 10:14:16,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-10 10:14:16,762 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 49 [2018-09-10 10:14:16,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:16,764 INFO L225 Difference]: With dead ends: 67 [2018-09-10 10:14:16,764 INFO L226 Difference]: Without dead ends: 65 [2018-09-10 10:14:16,765 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 176 SyntacticMatches, 10 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 412 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=234, Invalid=1026, Unknown=0, NotChecked=0, Total=1260 [2018-09-10 10:14:16,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-09-10 10:14:16,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 60. [2018-09-10 10:14:16,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-09-10 10:14:16,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 61 transitions. [2018-09-10 10:14:16,773 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 61 transitions. Word has length 49 [2018-09-10 10:14:16,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:16,773 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 61 transitions. [2018-09-10 10:14:16,774 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-10 10:14:16,774 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 61 transitions. [2018-09-10 10:14:16,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-09-10 10:14:16,775 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:16,775 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:16,775 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:16,776 INFO L82 PathProgramCache]: Analyzing trace with hash -1414697670, now seen corresponding path program 7 times [2018-09-10 10:14:16,776 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:16,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:16,777 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:16,777 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:16,777 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:16,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:17,266 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 31 proven. 52 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:14:17,266 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:17,266 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:17,274 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:17,274 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:17,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:17,294 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:17,646 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 7 proven. 76 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:14:17,647 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:18,295 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 7 proven. 76 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:14:18,317 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:18,317 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:18,332 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:18,332 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:18,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:18,374 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:18,541 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 8 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:18,541 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:18,671 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 8 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:18,673 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:18,673 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 17, 16] total 45 [2018-09-10 10:14:18,673 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:18,674 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-09-10 10:14:18,674 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-09-10 10:14:18,675 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=273, Invalid=1707, Unknown=0, NotChecked=0, Total=1980 [2018-09-10 10:14:18,675 INFO L87 Difference]: Start difference. First operand 60 states and 61 transitions. Second operand 30 states. [2018-09-10 10:14:19,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:19,842 INFO L93 Difference]: Finished difference Result 115 states and 120 transitions. [2018-09-10 10:14:19,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-10 10:14:19,843 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 57 [2018-09-10 10:14:19,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:19,844 INFO L225 Difference]: With dead ends: 115 [2018-09-10 10:14:19,844 INFO L226 Difference]: Without dead ends: 72 [2018-09-10 10:14:19,847 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 189 SyntacticMatches, 14 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 977 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=397, Invalid=2465, Unknown=0, NotChecked=0, Total=2862 [2018-09-10 10:14:19,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-09-10 10:14:19,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 62. [2018-09-10 10:14:19,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-09-10 10:14:19,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 63 transitions. [2018-09-10 10:14:19,854 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 63 transitions. Word has length 57 [2018-09-10 10:14:19,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:19,854 INFO L480 AbstractCegarLoop]: Abstraction has 62 states and 63 transitions. [2018-09-10 10:14:19,854 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-09-10 10:14:19,854 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 63 transitions. [2018-09-10 10:14:19,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-10 10:14:19,855 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:19,855 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 5, 5, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:19,856 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:19,856 INFO L82 PathProgramCache]: Analyzing trace with hash -1572631212, now seen corresponding path program 8 times [2018-09-10 10:14:19,856 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:19,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:19,857 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:19,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:19,857 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:19,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:20,040 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 37 proven. 58 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:14:20,040 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:20,040 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:20,048 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:20,048 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:20,080 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:20,081 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:20,082 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:20,264 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 8 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:20,264 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:20,456 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 8 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:20,477 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:20,477 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:20,493 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:20,494 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:20,542 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:20,542 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:20,547 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:20,558 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 8 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:20,558 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:20,735 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 8 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:20,737 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:20,737 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15, 15, 15] total 30 [2018-09-10 10:14:20,737 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:20,738 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-10 10:14:20,738 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-10 10:14:20,738 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=147, Invalid=723, Unknown=0, NotChecked=0, Total=870 [2018-09-10 10:14:20,739 INFO L87 Difference]: Start difference. First operand 62 states and 63 transitions. Second operand 24 states. [2018-09-10 10:14:21,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:21,573 INFO L93 Difference]: Finished difference Result 77 states and 79 transitions. [2018-09-10 10:14:21,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-10 10:14:21,573 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 59 [2018-09-10 10:14:21,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:21,574 INFO L225 Difference]: With dead ends: 77 [2018-09-10 10:14:21,574 INFO L226 Difference]: Without dead ends: 75 [2018-09-10 10:14:21,575 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 264 GetRequests, 212 SyntacticMatches, 12 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 595 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=317, Invalid=1405, Unknown=0, NotChecked=0, Total=1722 [2018-09-10 10:14:21,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-09-10 10:14:21,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 70. [2018-09-10 10:14:21,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-09-10 10:14:21,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 71 transitions. [2018-09-10 10:14:21,587 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 71 transitions. Word has length 59 [2018-09-10 10:14:21,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:21,588 INFO L480 AbstractCegarLoop]: Abstraction has 70 states and 71 transitions. [2018-09-10 10:14:21,588 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-10 10:14:21,588 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 71 transitions. [2018-09-10 10:14:21,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-09-10 10:14:21,589 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:21,589 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:21,590 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:21,590 INFO L82 PathProgramCache]: Analyzing trace with hash -118170757, now seen corresponding path program 9 times [2018-09-10 10:14:21,590 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:21,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:21,591 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:21,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:21,591 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:21,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:23,397 WARN L175 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 19 [2018-09-10 10:14:23,526 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 49 proven. 70 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-10 10:14:23,526 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:23,526 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:23,533 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:23,534 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:23,558 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-09-10 10:14:23,558 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:23,561 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:23,846 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 21 proven. 98 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-10 10:14:23,846 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:25,107 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 21 proven. 98 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-10 10:14:25,128 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:25,128 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:25,143 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:25,144 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:25,251 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-09-10 10:14:25,251 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:25,256 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:25,807 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 10 proven. 97 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:25,807 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:26,722 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 10 proven. 97 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:26,723 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:26,724 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21, 20, 18, 18] total 62 [2018-09-10 10:14:26,724 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:26,724 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-09-10 10:14:26,724 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-09-10 10:14:26,725 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=478, Invalid=3304, Unknown=0, NotChecked=0, Total=3782 [2018-09-10 10:14:26,726 INFO L87 Difference]: Start difference. First operand 70 states and 71 transitions. Second operand 29 states. [2018-09-10 10:14:27,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:27,439 INFO L93 Difference]: Finished difference Result 107 states and 115 transitions. [2018-09-10 10:14:27,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-10 10:14:27,440 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 67 [2018-09-10 10:14:27,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:27,441 INFO L225 Difference]: With dead ends: 107 [2018-09-10 10:14:27,441 INFO L226 Difference]: Without dead ends: 72 [2018-09-10 10:14:27,444 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 297 GetRequests, 215 SyntacticMatches, 13 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2054 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=599, Invalid=4371, Unknown=0, NotChecked=0, Total=4970 [2018-09-10 10:14:27,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-09-10 10:14:27,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2018-09-10 10:14:27,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-09-10 10:14:27,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 73 transitions. [2018-09-10 10:14:27,452 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 73 transitions. Word has length 67 [2018-09-10 10:14:27,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:27,452 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 73 transitions. [2018-09-10 10:14:27,452 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-09-10 10:14:27,452 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 73 transitions. [2018-09-10 10:14:27,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-09-10 10:14:27,454 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:27,454 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 6, 6, 6, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:27,454 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:27,454 INFO L82 PathProgramCache]: Analyzing trace with hash -509795563, now seen corresponding path program 10 times [2018-09-10 10:14:27,454 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:27,455 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:27,455 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:27,455 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:27,456 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:27,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:27,653 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 51 proven. 82 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-10 10:14:27,653 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:27,654 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:27,661 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:27,661 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:27,685 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:27,685 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:27,687 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:27,883 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 9 proven. 124 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-10 10:14:27,883 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:28,194 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 9 proven. 124 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-10 10:14:28,215 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:28,215 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:28,230 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:28,230 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:28,293 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:28,293 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:28,298 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:28,310 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 10 proven. 111 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:28,310 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:28,401 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 10 proven. 111 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:28,402 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:28,402 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19, 19, 17, 17] total 36 [2018-09-10 10:14:28,402 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:28,403 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-10 10:14:28,403 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-10 10:14:28,403 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=1065, Unknown=0, NotChecked=0, Total=1260 [2018-09-10 10:14:28,404 INFO L87 Difference]: Start difference. First operand 72 states and 73 transitions. Second operand 27 states. [2018-09-10 10:14:28,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:28,884 INFO L93 Difference]: Finished difference Result 87 states and 89 transitions. [2018-09-10 10:14:28,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-10 10:14:28,885 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 69 [2018-09-10 10:14:28,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:28,886 INFO L225 Difference]: With dead ends: 87 [2018-09-10 10:14:28,886 INFO L226 Difference]: Without dead ends: 85 [2018-09-10 10:14:28,888 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 308 GetRequests, 241 SyntacticMatches, 19 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 949 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=424, Invalid=2026, Unknown=0, NotChecked=0, Total=2450 [2018-09-10 10:14:28,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-09-10 10:14:28,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 80. [2018-09-10 10:14:28,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-09-10 10:14:28,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 81 transitions. [2018-09-10 10:14:28,895 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 81 transitions. Word has length 69 [2018-09-10 10:14:28,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:28,895 INFO L480 AbstractCegarLoop]: Abstraction has 80 states and 81 transitions. [2018-09-10 10:14:28,895 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-10 10:14:28,896 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 81 transitions. [2018-09-10 10:14:28,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-09-10 10:14:28,897 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:28,897 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:28,897 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:28,897 INFO L82 PathProgramCache]: Analyzing trace with hash 1803624508, now seen corresponding path program 11 times [2018-09-10 10:14:28,898 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:28,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:28,898 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:28,899 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:28,899 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:28,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:29,394 WARN L175 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 18 [2018-09-10 10:14:29,650 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 71 proven. 90 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-09-10 10:14:29,650 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:29,651 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:29,658 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:29,659 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:29,692 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-09-10 10:14:29,692 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:29,695 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:30,813 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 26 proven. 135 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-09-10 10:14:30,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:31,668 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 26 proven. 135 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-09-10 10:14:31,689 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:31,690 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:31,704 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:31,705 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:31,816 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-09-10 10:14:31,817 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:31,821 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:32,009 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 12 proven. 134 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:32,009 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:32,219 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 12 proven. 134 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:32,221 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:32,221 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 21, 20] total 56 [2018-09-10 10:14:32,221 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:32,221 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-10 10:14:32,222 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-10 10:14:32,223 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=2683, Unknown=0, NotChecked=0, Total=3080 [2018-09-10 10:14:32,223 INFO L87 Difference]: Start difference. First operand 80 states and 81 transitions. Second operand 38 states. [2018-09-10 10:14:33,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:33,660 INFO L93 Difference]: Finished difference Result 151 states and 156 transitions. [2018-09-10 10:14:33,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-10 10:14:33,661 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 77 [2018-09-10 10:14:33,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:33,663 INFO L225 Difference]: With dead ends: 151 [2018-09-10 10:14:33,663 INFO L226 Difference]: Without dead ends: 92 [2018-09-10 10:14:33,666 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 341 GetRequests, 260 SyntacticMatches, 16 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1578 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=576, Invalid=3846, Unknown=0, NotChecked=0, Total=4422 [2018-09-10 10:14:33,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-09-10 10:14:33,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 82. [2018-09-10 10:14:33,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-09-10 10:14:33,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 83 transitions. [2018-09-10 10:14:33,673 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 83 transitions. Word has length 77 [2018-09-10 10:14:33,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:33,673 INFO L480 AbstractCegarLoop]: Abstraction has 82 states and 83 transitions. [2018-09-10 10:14:33,673 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-10 10:14:33,673 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 83 transitions. [2018-09-10 10:14:33,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-09-10 10:14:33,674 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:33,674 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 7, 7, 7, 7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:33,675 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:33,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1588580522, now seen corresponding path program 12 times [2018-09-10 10:14:33,675 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:33,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:33,676 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:33,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:33,676 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:33,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:33,978 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 67 proven. 110 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-09-10 10:14:33,978 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:33,979 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:33,988 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:33,988 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:34,021 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-10 10:14:34,021 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:34,024 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:34,252 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 12 proven. 150 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:34,253 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:34,524 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 12 proven. 150 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:34,552 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:34,552 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:34,567 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:34,567 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:34,685 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-10 10:14:34,685 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:34,690 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:34,703 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 12 proven. 150 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:34,703 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:34,952 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 12 proven. 150 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:34,953 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:34,953 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19, 19, 19] total 38 [2018-09-10 10:14:34,953 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:34,954 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-09-10 10:14:34,954 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-09-10 10:14:34,955 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=232, Invalid=1174, Unknown=0, NotChecked=0, Total=1406 [2018-09-10 10:14:34,955 INFO L87 Difference]: Start difference. First operand 82 states and 83 transitions. Second operand 30 states. [2018-09-10 10:14:35,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:35,567 INFO L93 Difference]: Finished difference Result 97 states and 99 transitions. [2018-09-10 10:14:35,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-10 10:14:35,567 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 79 [2018-09-10 10:14:35,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:35,569 INFO L225 Difference]: With dead ends: 97 [2018-09-10 10:14:35,569 INFO L226 Difference]: Without dead ends: 95 [2018-09-10 10:14:35,571 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 352 GetRequests, 284 SyntacticMatches, 16 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1060 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=522, Invalid=2340, Unknown=0, NotChecked=0, Total=2862 [2018-09-10 10:14:35,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-09-10 10:14:35,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 90. [2018-09-10 10:14:35,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-09-10 10:14:35,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 91 transitions. [2018-09-10 10:14:35,578 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 91 transitions. Word has length 79 [2018-09-10 10:14:35,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:35,578 INFO L480 AbstractCegarLoop]: Abstraction has 90 states and 91 transitions. [2018-09-10 10:14:35,578 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-09-10 10:14:35,579 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 91 transitions. [2018-09-10 10:14:35,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-09-10 10:14:35,580 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:35,580 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:35,580 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:35,580 INFO L82 PathProgramCache]: Analyzing trace with hash -1563927683, now seen corresponding path program 13 times [2018-09-10 10:14:35,580 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:35,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:35,581 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:35,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:35,582 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:35,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:36,623 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 97 proven. 112 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-09-10 10:14:36,623 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:36,623 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:36,630 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:36,631 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:36,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:36,659 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:37,285 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 13 proven. 196 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-09-10 10:14:37,285 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:38,305 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 13 proven. 196 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-09-10 10:14:38,324 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:38,325 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:38,343 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:38,343 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:38,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:38,408 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:38,631 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 14 proven. 177 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:38,631 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:39,006 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 14 proven. 177 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:39,008 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:39,008 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 23, 22] total 63 [2018-09-10 10:14:39,008 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:39,008 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-09-10 10:14:39,009 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-09-10 10:14:39,010 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=513, Invalid=3393, Unknown=0, NotChecked=0, Total=3906 [2018-09-10 10:14:39,010 INFO L87 Difference]: Start difference. First operand 90 states and 91 transitions. Second operand 42 states. [2018-09-10 10:14:40,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:40,282 INFO L93 Difference]: Finished difference Result 169 states and 174 transitions. [2018-09-10 10:14:40,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-10 10:14:40,283 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 87 [2018-09-10 10:14:40,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:40,285 INFO L225 Difference]: With dead ends: 169 [2018-09-10 10:14:40,285 INFO L226 Difference]: Without dead ends: 102 [2018-09-10 10:14:40,288 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 384 GetRequests, 297 SyntacticMatches, 14 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1880 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=733, Invalid=4817, Unknown=0, NotChecked=0, Total=5550 [2018-09-10 10:14:40,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-09-10 10:14:40,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 92. [2018-09-10 10:14:40,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-09-10 10:14:40,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 93 transitions. [2018-09-10 10:14:40,295 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 93 transitions. Word has length 87 [2018-09-10 10:14:40,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:40,296 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 93 transitions. [2018-09-10 10:14:40,296 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-09-10 10:14:40,296 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 93 transitions. [2018-09-10 10:14:40,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-10 10:14:40,297 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:40,297 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 8, 8, 8, 8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:40,297 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:40,298 INFO L82 PathProgramCache]: Analyzing trace with hash -1484074473, now seen corresponding path program 14 times [2018-09-10 10:14:40,298 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:40,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:40,299 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:40,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:40,299 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:40,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:40,886 INFO L134 CoverageAnalysis]: Checked inductivity of 293 backedges. 85 proven. 142 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-09-10 10:14:40,886 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:40,886 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:40,893 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:40,893 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:40,921 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:40,921 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:40,923 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:41,164 INFO L134 CoverageAnalysis]: Checked inductivity of 293 backedges. 14 proven. 195 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:41,164 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:41,521 INFO L134 CoverageAnalysis]: Checked inductivity of 293 backedges. 14 proven. 195 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:41,541 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:41,542 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:41,557 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:41,558 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:41,623 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:41,623 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:41,628 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:41,643 INFO L134 CoverageAnalysis]: Checked inductivity of 293 backedges. 14 proven. 195 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:41,643 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:42,113 INFO L134 CoverageAnalysis]: Checked inductivity of 293 backedges. 14 proven. 195 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:42,115 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:42,115 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21, 21, 21] total 42 [2018-09-10 10:14:42,115 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:42,115 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-09-10 10:14:42,116 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-09-10 10:14:42,116 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=282, Invalid=1440, Unknown=0, NotChecked=0, Total=1722 [2018-09-10 10:14:42,116 INFO L87 Difference]: Start difference. First operand 92 states and 93 transitions. Second operand 33 states. [2018-09-10 10:14:42,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:42,850 INFO L93 Difference]: Finished difference Result 107 states and 109 transitions. [2018-09-10 10:14:42,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-09-10 10:14:42,850 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 89 [2018-09-10 10:14:42,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:42,852 INFO L225 Difference]: With dead ends: 107 [2018-09-10 10:14:42,852 INFO L226 Difference]: Without dead ends: 105 [2018-09-10 10:14:42,853 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 396 GetRequests, 320 SyntacticMatches, 18 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1342 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=644, Invalid=2896, Unknown=0, NotChecked=0, Total=3540 [2018-09-10 10:14:42,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-09-10 10:14:42,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 100. [2018-09-10 10:14:42,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-09-10 10:14:42,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2018-09-10 10:14:42,860 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 101 transitions. Word has length 89 [2018-09-10 10:14:42,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:42,860 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 101 transitions. [2018-09-10 10:14:42,860 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-09-10 10:14:42,860 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 101 transitions. [2018-09-10 10:14:42,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-09-10 10:14:42,862 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:42,862 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:42,862 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:42,862 INFO L82 PathProgramCache]: Analyzing trace with hash -455561922, now seen corresponding path program 15 times [2018-09-10 10:14:42,862 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:42,863 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:42,863 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:42,863 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:42,863 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:42,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:43,654 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 127 proven. 136 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-09-10 10:14:43,654 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:43,654 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:43,661 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:43,662 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:43,699 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-09-10 10:14:43,700 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:43,702 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:44,412 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 36 proven. 227 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-09-10 10:14:44,412 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:45,648 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 36 proven. 227 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-09-10 10:14:45,667 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:45,668 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:45,682 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:45,682 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:45,856 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-09-10 10:14:45,856 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:45,861 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:46,752 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 16 proven. 226 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:46,752 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:47,334 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 16 proven. 226 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:47,335 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:47,336 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 27, 26, 24, 24] total 86 [2018-09-10 10:14:47,336 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:47,336 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-10 10:14:47,337 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-10 10:14:47,339 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=895, Invalid=6415, Unknown=0, NotChecked=0, Total=7310 [2018-09-10 10:14:47,339 INFO L87 Difference]: Start difference. First operand 100 states and 101 transitions. Second operand 38 states. [2018-09-10 10:14:48,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:48,145 INFO L93 Difference]: Finished difference Result 149 states and 160 transitions. [2018-09-10 10:14:48,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-09-10 10:14:48,146 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 97 [2018-09-10 10:14:48,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:48,147 INFO L225 Difference]: With dead ends: 149 [2018-09-10 10:14:48,148 INFO L226 Difference]: Without dead ends: 102 [2018-09-10 10:14:48,149 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 426 GetRequests, 318 SyntacticMatches, 12 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3979 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=1091, Invalid=8415, Unknown=0, NotChecked=0, Total=9506 [2018-09-10 10:14:48,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-09-10 10:14:48,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2018-09-10 10:14:48,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-09-10 10:14:48,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 103 transitions. [2018-09-10 10:14:48,156 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 103 transitions. Word has length 97 [2018-09-10 10:14:48,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:48,156 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 103 transitions. [2018-09-10 10:14:48,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-10 10:14:48,156 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 103 transitions. [2018-09-10 10:14:48,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-10 10:14:48,157 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:48,158 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 9, 9, 9, 9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:48,158 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:48,158 INFO L82 PathProgramCache]: Analyzing trace with hash 1527982936, now seen corresponding path program 16 times [2018-09-10 10:14:48,158 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:48,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:48,159 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:48,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:48,159 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:48,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:48,654 INFO L134 CoverageAnalysis]: Checked inductivity of 374 backedges. 105 proven. 178 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-09-10 10:14:48,654 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:48,655 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:48,664 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:48,664 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:48,696 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:48,696 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:48,699 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:48,989 INFO L134 CoverageAnalysis]: Checked inductivity of 374 backedges. 15 proven. 268 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-09-10 10:14:48,989 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:49,429 INFO L134 CoverageAnalysis]: Checked inductivity of 374 backedges. 15 proven. 268 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-09-10 10:14:49,450 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:49,450 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:49,466 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:49,466 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:49,552 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:49,553 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:49,558 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:49,576 INFO L134 CoverageAnalysis]: Checked inductivity of 374 backedges. 16 proven. 246 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:49,576 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:49,755 INFO L134 CoverageAnalysis]: Checked inductivity of 374 backedges. 16 proven. 246 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:49,757 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:49,757 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 25, 25, 23, 23] total 48 [2018-09-10 10:14:49,757 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:49,758 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-09-10 10:14:49,758 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-09-10 10:14:49,758 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=345, Invalid=1911, Unknown=0, NotChecked=0, Total=2256 [2018-09-10 10:14:49,758 INFO L87 Difference]: Start difference. First operand 102 states and 103 transitions. Second operand 36 states. [2018-09-10 10:14:50,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:50,822 INFO L93 Difference]: Finished difference Result 117 states and 119 transitions. [2018-09-10 10:14:50,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-10 10:14:50,823 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 99 [2018-09-10 10:14:50,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:50,824 INFO L225 Difference]: With dead ends: 117 [2018-09-10 10:14:50,825 INFO L226 Difference]: Without dead ends: 115 [2018-09-10 10:14:50,826 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 440 GetRequests, 349 SyntacticMatches, 25 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1858 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=790, Invalid=3766, Unknown=0, NotChecked=0, Total=4556 [2018-09-10 10:14:50,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-09-10 10:14:50,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 110. [2018-09-10 10:14:50,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-09-10 10:14:50,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 111 transitions. [2018-09-10 10:14:50,833 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 111 transitions. Word has length 99 [2018-09-10 10:14:50,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:50,834 INFO L480 AbstractCegarLoop]: Abstraction has 110 states and 111 transitions. [2018-09-10 10:14:50,834 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-09-10 10:14:50,834 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 111 transitions. [2018-09-10 10:14:50,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-09-10 10:14:50,835 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:50,835 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:50,835 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:50,835 INFO L82 PathProgramCache]: Analyzing trace with hash 5780863, now seen corresponding path program 17 times [2018-09-10 10:14:50,835 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:50,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:50,836 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:50,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:50,837 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:50,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:51,775 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 161 proven. 162 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-09-10 10:14:51,775 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:51,775 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:51,798 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:51,798 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:51,842 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-09-10 10:14:51,842 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:51,846 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:52,754 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 41 proven. 282 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-09-10 10:14:52,754 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:54,146 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 41 proven. 282 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-09-10 10:14:54,166 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:54,166 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:54,182 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:54,182 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:54,377 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-09-10 10:14:54,377 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:54,385 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:54,646 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 18 proven. 281 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:54,646 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:54,898 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 18 proven. 281 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:54,900 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:54,900 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 27, 26] total 74 [2018-09-10 10:14:54,901 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:54,901 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-09-10 10:14:54,902 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-09-10 10:14:54,902 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=682, Invalid=4720, Unknown=0, NotChecked=0, Total=5402 [2018-09-10 10:14:54,903 INFO L87 Difference]: Start difference. First operand 110 states and 111 transitions. Second operand 50 states. [2018-09-10 10:14:56,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:56,786 INFO L93 Difference]: Finished difference Result 205 states and 210 transitions. [2018-09-10 10:14:56,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-09-10 10:14:56,787 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 107 [2018-09-10 10:14:56,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:56,788 INFO L225 Difference]: With dead ends: 205 [2018-09-10 10:14:56,788 INFO L226 Difference]: Without dead ends: 122 [2018-09-10 10:14:56,791 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 470 GetRequests, 369 SyntacticMatches, 15 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2632 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=972, Invalid=6684, Unknown=0, NotChecked=0, Total=7656 [2018-09-10 10:14:56,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-09-10 10:14:56,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 112. [2018-09-10 10:14:56,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-09-10 10:14:56,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 113 transitions. [2018-09-10 10:14:56,798 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 113 transitions. Word has length 107 [2018-09-10 10:14:56,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:56,799 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 113 transitions. [2018-09-10 10:14:56,799 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-09-10 10:14:56,799 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 113 transitions. [2018-09-10 10:14:56,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-10 10:14:56,800 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:56,800 INFO L376 BasicCegarLoop]: trace histogram [12, 11, 10, 10, 10, 10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:56,800 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:56,800 INFO L82 PathProgramCache]: Analyzing trace with hash 625433369, now seen corresponding path program 18 times [2018-09-10 10:14:56,800 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:56,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:56,801 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:56,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:56,802 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:56,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:57,838 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 127 proven. 218 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-09-10 10:14:57,838 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:57,838 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:57,845 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:57,846 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:57,888 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-09-10 10:14:57,888 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:57,892 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:58,215 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 18 proven. 303 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:58,216 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:58,684 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 18 proven. 303 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:58,718 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:58,718 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:58,745 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:58,745 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:58,944 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-09-10 10:14:58,944 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:58,949 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:58,969 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 18 proven. 303 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:58,969 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:59,207 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 18 proven. 303 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:59,208 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:59,208 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 25, 25, 25] total 50 [2018-09-10 10:14:59,209 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:59,209 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-09-10 10:14:59,209 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-09-10 10:14:59,210 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=2053, Unknown=0, NotChecked=0, Total=2450 [2018-09-10 10:14:59,210 INFO L87 Difference]: Start difference. First operand 112 states and 113 transitions. Second operand 39 states. [2018-09-10 10:15:00,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:00,379 INFO L93 Difference]: Finished difference Result 127 states and 129 transitions. [2018-09-10 10:15:00,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-09-10 10:15:00,381 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 109 [2018-09-10 10:15:00,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:00,382 INFO L225 Difference]: With dead ends: 127 [2018-09-10 10:15:00,383 INFO L226 Difference]: Without dead ends: 125 [2018-09-10 10:15:00,383 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 484 GetRequests, 392 SyntacticMatches, 22 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2005 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=927, Invalid=4185, Unknown=0, NotChecked=0, Total=5112 [2018-09-10 10:15:00,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-09-10 10:15:00,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 120. [2018-09-10 10:15:00,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-09-10 10:15:00,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 121 transitions. [2018-09-10 10:15:00,390 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 121 transitions. Word has length 109 [2018-09-10 10:15:00,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:00,391 INFO L480 AbstractCegarLoop]: Abstraction has 120 states and 121 transitions. [2018-09-10 10:15:00,391 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-09-10 10:15:00,391 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 121 transitions. [2018-09-10 10:15:00,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-09-10 10:15:00,392 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:00,392 INFO L376 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:00,392 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:00,392 INFO L82 PathProgramCache]: Analyzing trace with hash -1367010240, now seen corresponding path program 19 times [2018-09-10 10:15:00,392 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:00,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:00,393 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:00,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:00,393 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:00,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:01,623 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 199 proven. 190 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-09-10 10:15:01,623 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:01,623 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:01,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:01,632 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:01,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:01,675 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:02,647 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 19 proven. 370 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-09-10 10:15:02,647 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:04,208 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 19 proven. 370 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-09-10 10:15:04,227 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:04,228 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:04,243 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:04,243 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:04,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:04,326 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:04,540 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 20 proven. 342 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:15:04,540 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:04,789 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 20 proven. 342 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:15:04,790 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:04,790 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 29, 28] total 81 [2018-09-10 10:15:04,790 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:04,791 INFO L459 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-09-10 10:15:04,791 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-09-10 10:15:04,792 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=834, Invalid=5646, Unknown=0, NotChecked=0, Total=6480 [2018-09-10 10:15:04,793 INFO L87 Difference]: Start difference. First operand 120 states and 121 transitions. Second operand 54 states. [2018-09-10 10:15:06,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:06,706 INFO L93 Difference]: Finished difference Result 223 states and 228 transitions. [2018-09-10 10:15:06,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-09-10 10:15:06,707 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 117 [2018-09-10 10:15:06,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:06,709 INFO L225 Difference]: With dead ends: 223 [2018-09-10 10:15:06,709 INFO L226 Difference]: Without dead ends: 132 [2018-09-10 10:15:06,711 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 513 GetRequests, 405 SyntacticMatches, 14 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3053 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=1177, Invalid=7943, Unknown=0, NotChecked=0, Total=9120 [2018-09-10 10:15:06,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-09-10 10:15:06,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 122. [2018-09-10 10:15:06,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-09-10 10:15:06,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 123 transitions. [2018-09-10 10:15:06,720 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 123 transitions. Word has length 117 [2018-09-10 10:15:06,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:06,720 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 123 transitions. [2018-09-10 10:15:06,720 INFO L481 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-09-10 10:15:06,720 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 123 transitions. [2018-09-10 10:15:06,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-10 10:15:06,721 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:06,721 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 11, 11, 11, 11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:06,721 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:06,722 INFO L82 PathProgramCache]: Analyzing trace with hash 1411219802, now seen corresponding path program 20 times [2018-09-10 10:15:06,722 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:06,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:06,723 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:06,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:06,723 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:06,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:07,087 INFO L134 CoverageAnalysis]: Checked inductivity of 566 backedges. 151 proven. 262 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-09-10 10:15:07,088 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:07,088 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:07,097 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:07,098 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:07,149 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:07,150 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:07,153 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:07,594 INFO L134 CoverageAnalysis]: Checked inductivity of 566 backedges. 20 proven. 366 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:15:07,594 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:08,028 INFO L134 CoverageAnalysis]: Checked inductivity of 566 backedges. 20 proven. 366 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:15:08,048 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:08,049 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:08,066 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:08,066 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:08,159 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:08,160 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:08,167 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:08,195 INFO L134 CoverageAnalysis]: Checked inductivity of 566 backedges. 20 proven. 366 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:15:08,195 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:08,716 INFO L134 CoverageAnalysis]: Checked inductivity of 566 backedges. 20 proven. 366 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:15:08,718 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:08,718 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 27, 27, 27, 27] total 54 [2018-09-10 10:15:08,719 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:08,719 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-09-10 10:15:08,719 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-09-10 10:15:08,720 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=462, Invalid=2400, Unknown=0, NotChecked=0, Total=2862 [2018-09-10 10:15:08,720 INFO L87 Difference]: Start difference. First operand 122 states and 123 transitions. Second operand 42 states. [2018-09-10 10:15:09,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:09,815 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-09-10 10:15:09,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-09-10 10:15:09,815 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 119 [2018-09-10 10:15:09,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:09,817 INFO L225 Difference]: With dead ends: 137 [2018-09-10 10:15:09,817 INFO L226 Difference]: Without dead ends: 135 [2018-09-10 10:15:09,818 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 528 GetRequests, 428 SyntacticMatches, 24 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2386 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1088, Invalid=4918, Unknown=0, NotChecked=0, Total=6006 [2018-09-10 10:15:09,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-09-10 10:15:09,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 130. [2018-09-10 10:15:09,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-09-10 10:15:09,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 131 transitions. [2018-09-10 10:15:09,829 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 131 transitions. Word has length 119 [2018-09-10 10:15:09,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:09,830 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 131 transitions. [2018-09-10 10:15:09,830 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-09-10 10:15:09,830 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 131 transitions. [2018-09-10 10:15:09,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-09-10 10:15:09,831 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:09,831 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:09,833 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:09,834 INFO L82 PathProgramCache]: Analyzing trace with hash 1966434689, now seen corresponding path program 21 times [2018-09-10 10:15:09,834 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:09,834 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:09,835 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:09,835 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:09,835 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:09,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:11,707 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 241 proven. 220 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-09-10 10:15:11,707 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:11,708 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:11,716 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:11,717 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:11,766 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2018-09-10 10:15:11,766 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:11,770 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:13,083 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 51 proven. 410 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-09-10 10:15:13,084 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:14,534 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 51 proven. 410 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-09-10 10:15:14,554 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:14,554 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:14,569 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:14,569 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:14,840 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2018-09-10 10:15:14,840 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:14,847 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:16,566 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 22 proven. 409 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:15:16,566 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:17,525 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 22 proven. 409 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:15:17,526 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:17,526 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 33, 32, 30, 30] total 110 [2018-09-10 10:15:17,527 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:17,527 INFO L459 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-09-10 10:15:17,528 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-09-10 10:15:17,529 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1447, Invalid=10543, Unknown=0, NotChecked=0, Total=11990 [2018-09-10 10:15:17,530 INFO L87 Difference]: Start difference. First operand 130 states and 131 transitions. Second operand 47 states. [2018-09-10 10:15:19,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:19,320 INFO L93 Difference]: Finished difference Result 191 states and 205 transitions. [2018-09-10 10:15:19,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-09-10 10:15:19,327 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 127 [2018-09-10 10:15:19,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:19,328 INFO L225 Difference]: With dead ends: 191 [2018-09-10 10:15:19,328 INFO L226 Difference]: Without dead ends: 132 [2018-09-10 10:15:19,330 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 555 GetRequests, 420 SyntacticMatches, 12 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6604 ImplicationChecksByTransitivity, 7.4s TimeCoverageRelationStatistics Valid=1736, Invalid=13764, Unknown=0, NotChecked=0, Total=15500 [2018-09-10 10:15:19,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-09-10 10:15:19,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-09-10 10:15:19,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-09-10 10:15:19,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 133 transitions. [2018-09-10 10:15:19,339 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 133 transitions. Word has length 127 [2018-09-10 10:15:19,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:19,339 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 133 transitions. [2018-09-10 10:15:19,339 INFO L481 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-09-10 10:15:19,339 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 133 transitions. [2018-09-10 10:15:19,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-09-10 10:15:19,340 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:19,340 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 12, 12, 12, 12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:19,340 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:19,341 INFO L82 PathProgramCache]: Analyzing trace with hash 2082717211, now seen corresponding path program 22 times [2018-09-10 10:15:19,341 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:19,341 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:19,341 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:19,341 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:19,341 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:19,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:19,713 INFO L134 CoverageAnalysis]: Checked inductivity of 677 backedges. 177 proven. 310 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-09-10 10:15:19,714 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:19,714 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:19,721 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:19,721 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:19,765 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:19,766 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:19,770 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:20,256 INFO L134 CoverageAnalysis]: Checked inductivity of 677 backedges. 21 proven. 466 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-09-10 10:15:20,256 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:21,139 INFO L134 CoverageAnalysis]: Checked inductivity of 677 backedges. 21 proven. 466 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-09-10 10:15:21,159 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:21,160 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:21,174 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:21,174 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:21,285 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:21,285 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:21,291 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:21,311 INFO L134 CoverageAnalysis]: Checked inductivity of 677 backedges. 22 proven. 435 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:15:21,312 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:21,520 INFO L134 CoverageAnalysis]: Checked inductivity of 677 backedges. 22 proven. 435 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:15:21,521 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:21,521 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 31, 31, 29, 29] total 60 [2018-09-10 10:15:21,521 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:21,522 INFO L459 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-09-10 10:15:21,522 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-09-10 10:15:21,522 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=540, Invalid=3000, Unknown=0, NotChecked=0, Total=3540 [2018-09-10 10:15:21,523 INFO L87 Difference]: Start difference. First operand 132 states and 133 transitions. Second operand 45 states. [2018-09-10 10:15:22,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:22,811 INFO L93 Difference]: Finished difference Result 147 states and 149 transitions. [2018-09-10 10:15:22,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-09-10 10:15:22,811 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 129 [2018-09-10 10:15:22,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:22,813 INFO L225 Difference]: With dead ends: 147 [2018-09-10 10:15:22,813 INFO L226 Difference]: Without dead ends: 145 [2018-09-10 10:15:22,814 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 572 GetRequests, 457 SyntacticMatches, 31 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3064 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1273, Invalid=6037, Unknown=0, NotChecked=0, Total=7310 [2018-09-10 10:15:22,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-09-10 10:15:22,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 140. [2018-09-10 10:15:22,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-09-10 10:15:22,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 141 transitions. [2018-09-10 10:15:22,824 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 141 transitions. Word has length 129 [2018-09-10 10:15:22,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:22,824 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 141 transitions. [2018-09-10 10:15:22,824 INFO L481 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-09-10 10:15:22,824 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 141 transitions. [2018-09-10 10:15:22,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-09-10 10:15:22,825 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:22,826 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:22,826 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:22,826 INFO L82 PathProgramCache]: Analyzing trace with hash 148329794, now seen corresponding path program 23 times [2018-09-10 10:15:22,826 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:22,827 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:22,827 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:22,827 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:22,827 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:22,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:23,987 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 287 proven. 252 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2018-09-10 10:15:23,987 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:23,987 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:23,996 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:23,996 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:24,048 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-09-10 10:15:24,048 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:24,052 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:25,418 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 56 proven. 483 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2018-09-10 10:15:25,419 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:27,735 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 56 proven. 483 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2018-09-10 10:15:27,755 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:27,755 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:27,770 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:27,770 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:28,059 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-09-10 10:15:28,059 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:28,067 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:28,517 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 24 proven. 482 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:28,518 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:28,746 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 24 proven. 482 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:28,747 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:28,747 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 33, 32] total 92 [2018-09-10 10:15:28,747 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:28,748 INFO L459 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-09-10 10:15:28,748 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-09-10 10:15:28,749 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1049, Invalid=7323, Unknown=0, NotChecked=0, Total=8372 [2018-09-10 10:15:28,749 INFO L87 Difference]: Start difference. First operand 140 states and 141 transitions. Second operand 62 states. [2018-09-10 10:15:31,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:31,070 INFO L93 Difference]: Finished difference Result 259 states and 264 transitions. [2018-09-10 10:15:31,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-09-10 10:15:31,071 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 137 [2018-09-10 10:15:31,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:31,073 INFO L225 Difference]: With dead ends: 259 [2018-09-10 10:15:31,073 INFO L226 Difference]: Without dead ends: 152 [2018-09-10 10:15:31,075 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 599 GetRequests, 477 SyntacticMatches, 15 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3980 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=1477, Invalid=10295, Unknown=0, NotChecked=0, Total=11772 [2018-09-10 10:15:31,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-09-10 10:15:31,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 142. [2018-09-10 10:15:31,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-09-10 10:15:31,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 143 transitions. [2018-09-10 10:15:31,085 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 143 transitions. Word has length 137 [2018-09-10 10:15:31,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:31,085 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 143 transitions. [2018-09-10 10:15:31,085 INFO L481 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-09-10 10:15:31,085 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 143 transitions. [2018-09-10 10:15:31,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-09-10 10:15:31,086 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:31,087 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 13, 13, 13, 13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:31,087 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:31,087 INFO L82 PathProgramCache]: Analyzing trace with hash 1518350684, now seen corresponding path program 24 times [2018-09-10 10:15:31,087 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:31,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:31,088 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:31,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:31,088 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:31,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:31,659 INFO L134 CoverageAnalysis]: Checked inductivity of 798 backedges. 205 proven. 362 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2018-09-10 10:15:31,659 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:31,659 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:31,669 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:31,669 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:31,723 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-09-10 10:15:31,724 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:31,727 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:32,322 INFO L134 CoverageAnalysis]: Checked inductivity of 798 backedges. 24 proven. 510 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:32,323 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:32,923 INFO L134 CoverageAnalysis]: Checked inductivity of 798 backedges. 24 proven. 510 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:32,945 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:32,945 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:32,960 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:32,960 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:33,274 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-09-10 10:15:33,275 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:33,282 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:33,327 INFO L134 CoverageAnalysis]: Checked inductivity of 798 backedges. 24 proven. 510 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:33,327 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:33,557 INFO L134 CoverageAnalysis]: Checked inductivity of 798 backedges. 24 proven. 510 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:33,558 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:33,558 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 31, 31, 31, 31] total 62 [2018-09-10 10:15:33,558 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:33,559 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-09-10 10:15:33,559 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-09-10 10:15:33,560 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=607, Invalid=3175, Unknown=0, NotChecked=0, Total=3782 [2018-09-10 10:15:33,560 INFO L87 Difference]: Start difference. First operand 142 states and 143 transitions. Second operand 48 states. [2018-09-10 10:15:35,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:35,391 INFO L93 Difference]: Finished difference Result 157 states and 159 transitions. [2018-09-10 10:15:35,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-09-10 10:15:35,391 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 139 [2018-09-10 10:15:35,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:35,393 INFO L225 Difference]: With dead ends: 157 [2018-09-10 10:15:35,394 INFO L226 Difference]: Without dead ends: 155 [2018-09-10 10:15:35,395 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 616 GetRequests, 500 SyntacticMatches, 28 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3247 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=1449, Invalid=6561, Unknown=0, NotChecked=0, Total=8010 [2018-09-10 10:15:35,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2018-09-10 10:15:35,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 150. [2018-09-10 10:15:35,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-09-10 10:15:35,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 151 transitions. [2018-09-10 10:15:35,403 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 151 transitions. Word has length 139 [2018-09-10 10:15:35,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:35,403 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 151 transitions. [2018-09-10 10:15:35,404 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-09-10 10:15:35,404 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 151 transitions. [2018-09-10 10:15:35,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-09-10 10:15:35,404 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:35,405 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 14, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:35,405 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:35,405 INFO L82 PathProgramCache]: Analyzing trace with hash 779155331, now seen corresponding path program 25 times [2018-09-10 10:15:35,405 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:35,406 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:35,406 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:35,406 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:35,406 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:35,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:36,932 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 337 proven. 286 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-09-10 10:15:36,932 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:36,932 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:36,940 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:36,940 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:36,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:36,986 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:38,414 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 25 proven. 598 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-09-10 10:15:38,415 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:40,686 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 25 proven. 598 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-09-10 10:15:40,706 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:40,706 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:40,721 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:40,721 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:40,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:40,839 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:41,514 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 26 proven. 561 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:41,514 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:41,799 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 26 proven. 561 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:41,800 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:41,800 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 35, 34] total 99 [2018-09-10 10:15:41,800 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:41,801 INFO L459 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-09-10 10:15:41,801 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-09-10 10:15:41,801 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1236, Invalid=8466, Unknown=0, NotChecked=0, Total=9702 [2018-09-10 10:15:41,802 INFO L87 Difference]: Start difference. First operand 150 states and 151 transitions. Second operand 66 states. [2018-09-10 10:15:44,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:44,574 INFO L93 Difference]: Finished difference Result 277 states and 282 transitions. [2018-09-10 10:15:44,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-10 10:15:44,574 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 147 [2018-09-10 10:15:44,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:44,576 INFO L225 Difference]: With dead ends: 277 [2018-09-10 10:15:44,577 INFO L226 Difference]: Without dead ends: 162 [2018-09-10 10:15:44,579 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 642 GetRequests, 513 SyntacticMatches, 14 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4496 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=1729, Invalid=11843, Unknown=0, NotChecked=0, Total=13572 [2018-09-10 10:15:44,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-09-10 10:15:44,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 152. [2018-09-10 10:15:44,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-09-10 10:15:44,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 153 transitions. [2018-09-10 10:15:44,589 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 153 transitions. Word has length 147 [2018-09-10 10:15:44,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:44,589 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 153 transitions. [2018-09-10 10:15:44,589 INFO L481 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-09-10 10:15:44,590 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 153 transitions. [2018-09-10 10:15:44,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-09-10 10:15:44,590 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:44,591 INFO L376 BasicCegarLoop]: trace histogram [16, 15, 14, 14, 14, 14, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:44,591 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:44,591 INFO L82 PathProgramCache]: Analyzing trace with hash 921762589, now seen corresponding path program 26 times [2018-09-10 10:15:44,591 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:44,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:44,592 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:44,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:44,592 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:44,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:46,175 INFO L134 CoverageAnalysis]: Checked inductivity of 929 backedges. 235 proven. 418 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-09-10 10:15:46,175 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:46,175 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:46,182 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:46,183 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:46,225 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:46,226 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:46,228 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:46,910 INFO L134 CoverageAnalysis]: Checked inductivity of 929 backedges. 26 proven. 591 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:46,911 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:47,586 INFO L134 CoverageAnalysis]: Checked inductivity of 929 backedges. 26 proven. 591 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:47,605 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:47,606 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:47,620 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:47,621 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:47,727 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:47,727 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:47,733 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:47,785 INFO L134 CoverageAnalysis]: Checked inductivity of 929 backedges. 26 proven. 591 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:47,785 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:48,046 INFO L134 CoverageAnalysis]: Checked inductivity of 929 backedges. 26 proven. 591 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:48,047 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:48,047 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 33, 33, 33, 33] total 66 [2018-09-10 10:15:48,048 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:48,048 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-09-10 10:15:48,048 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-09-10 10:15:48,048 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=687, Invalid=3603, Unknown=0, NotChecked=0, Total=4290 [2018-09-10 10:15:48,049 INFO L87 Difference]: Start difference. First operand 152 states and 153 transitions. Second operand 51 states. [2018-09-10 10:15:49,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:49,670 INFO L93 Difference]: Finished difference Result 167 states and 169 transitions. [2018-09-10 10:15:49,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-09-10 10:15:49,670 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 149 [2018-09-10 10:15:49,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:49,672 INFO L225 Difference]: With dead ends: 167 [2018-09-10 10:15:49,672 INFO L226 Difference]: Without dead ends: 165 [2018-09-10 10:15:49,673 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 660 GetRequests, 536 SyntacticMatches, 30 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3727 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=1649, Invalid=7471, Unknown=0, NotChecked=0, Total=9120 [2018-09-10 10:15:49,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-09-10 10:15:49,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 160. [2018-09-10 10:15:49,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-09-10 10:15:49,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 161 transitions. [2018-09-10 10:15:49,689 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 161 transitions. Word has length 149 [2018-09-10 10:15:49,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:49,690 INFO L480 AbstractCegarLoop]: Abstraction has 160 states and 161 transitions. [2018-09-10 10:15:49,690 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-09-10 10:15:49,690 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 161 transitions. [2018-09-10 10:15:49,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-09-10 10:15:49,691 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:49,691 INFO L376 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 15, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:49,691 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:49,692 INFO L82 PathProgramCache]: Analyzing trace with hash 497053764, now seen corresponding path program 27 times [2018-09-10 10:15:49,693 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:49,693 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:49,693 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:49,693 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:49,693 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:49,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:51,024 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 391 proven. 322 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2018-09-10 10:15:51,025 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:51,025 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:51,040 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:51,040 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:51,169 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-09-10 10:15:51,169 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:51,172 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:52,546 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 66 proven. 647 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2018-09-10 10:15:52,546 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:54,568 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 66 proven. 647 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2018-09-10 10:15:54,588 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:54,588 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:54,605 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:54,605 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:55,014 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-09-10 10:15:55,014 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:55,021 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:57,079 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 28 proven. 646 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:57,079 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:58,428 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 28 proven. 646 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:58,430 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:58,430 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 39, 38, 36, 36] total 134 [2018-09-10 10:15:58,430 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:58,431 INFO L459 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-09-10 10:15:58,431 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-09-10 10:15:58,433 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2134, Invalid=15688, Unknown=0, NotChecked=0, Total=17822 [2018-09-10 10:15:58,433 INFO L87 Difference]: Start difference. First operand 160 states and 161 transitions. Second operand 56 states. [2018-09-10 10:16:00,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:00,885 INFO L93 Difference]: Finished difference Result 233 states and 250 transitions. [2018-09-10 10:16:00,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-09-10 10:16:00,886 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 157 [2018-09-10 10:16:00,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:00,888 INFO L225 Difference]: With dead ends: 233 [2018-09-10 10:16:00,888 INFO L226 Difference]: Without dead ends: 162 [2018-09-10 10:16:00,891 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 684 GetRequests, 522 SyntacticMatches, 12 SemanticMatches, 150 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9886 ImplicationChecksByTransitivity, 8.3s TimeCoverageRelationStatistics Valid=2534, Invalid=20418, Unknown=0, NotChecked=0, Total=22952 [2018-09-10 10:16:00,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-09-10 10:16:00,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2018-09-10 10:16:00,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-09-10 10:16:00,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 163 transitions. [2018-09-10 10:16:00,905 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 163 transitions. Word has length 157 [2018-09-10 10:16:00,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:00,905 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 163 transitions. [2018-09-10 10:16:00,905 INFO L481 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-09-10 10:16:00,905 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 163 transitions. [2018-09-10 10:16:00,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-09-10 10:16:00,906 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:00,907 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 15, 15, 15, 15, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:00,907 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:00,907 INFO L82 PathProgramCache]: Analyzing trace with hash -976471202, now seen corresponding path program 28 times [2018-09-10 10:16:00,907 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:00,908 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:00,908 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:00,908 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:00,908 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:00,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:02,176 INFO L134 CoverageAnalysis]: Checked inductivity of 1070 backedges. 267 proven. 478 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2018-09-10 10:16:02,176 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:02,176 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:02,183 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:16:02,184 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:16:02,232 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:16:02,233 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:02,236 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:02,877 INFO L134 CoverageAnalysis]: Checked inductivity of 1070 backedges. 27 proven. 718 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2018-09-10 10:16:02,877 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:03,893 INFO L134 CoverageAnalysis]: Checked inductivity of 1070 backedges. 27 proven. 718 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2018-09-10 10:16:03,913 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:03,913 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:03,929 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:16:03,929 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:16:04,058 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:16:04,059 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:04,065 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:04,092 INFO L134 CoverageAnalysis]: Checked inductivity of 1070 backedges. 28 proven. 678 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:16:04,092 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:04,414 INFO L134 CoverageAnalysis]: Checked inductivity of 1070 backedges. 28 proven. 678 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:16:04,416 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:04,416 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 37, 37, 35, 35] total 72 [2018-09-10 10:16:04,416 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:04,416 INFO L459 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-09-10 10:16:04,417 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-09-10 10:16:04,417 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=4332, Unknown=0, NotChecked=0, Total=5112 [2018-09-10 10:16:04,418 INFO L87 Difference]: Start difference. First operand 162 states and 163 transitions. Second operand 54 states. [2018-09-10 10:16:06,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:06,140 INFO L93 Difference]: Finished difference Result 177 states and 179 transitions. [2018-09-10 10:16:06,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-09-10 10:16:06,141 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 159 [2018-09-10 10:16:06,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:06,143 INFO L225 Difference]: With dead ends: 177 [2018-09-10 10:16:06,143 INFO L226 Difference]: Without dead ends: 175 [2018-09-10 10:16:06,144 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 704 GetRequests, 565 SyntacticMatches, 37 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4567 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=1873, Invalid=8839, Unknown=0, NotChecked=0, Total=10712 [2018-09-10 10:16:06,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-09-10 10:16:06,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 170. [2018-09-10 10:16:06,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-09-10 10:16:06,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 171 transitions. [2018-09-10 10:16:06,156 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 171 transitions. Word has length 159 [2018-09-10 10:16:06,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:06,157 INFO L480 AbstractCegarLoop]: Abstraction has 170 states and 171 transitions. [2018-09-10 10:16:06,157 INFO L481 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-09-10 10:16:06,157 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 171 transitions. [2018-09-10 10:16:06,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-09-10 10:16:06,158 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:06,158 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 16, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:06,158 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:06,158 INFO L82 PathProgramCache]: Analyzing trace with hash 1654382469, now seen corresponding path program 29 times [2018-09-10 10:16:06,159 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:06,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:06,159 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:06,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:06,160 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:06,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:07,808 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 449 proven. 360 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-09-10 10:16:07,808 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:07,808 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:07,816 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:16:07,817 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:07,878 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 17 check-sat command(s) [2018-09-10 10:16:07,878 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:07,882 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:09,620 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 71 proven. 738 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-09-10 10:16:09,620 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:12,824 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 71 proven. 738 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-09-10 10:16:12,845 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:12,846 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:12,860 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:16:12,860 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:13,294 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 17 check-sat command(s) [2018-09-10 10:16:13,294 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:13,301 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:13,732 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 30 proven. 737 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:16:13,732 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:14,020 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 30 proven. 737 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:16:14,021 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:14,022 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 39, 38] total 110 [2018-09-10 10:16:14,022 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:14,023 INFO L459 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-09-10 10:16:14,023 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-09-10 10:16:14,024 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1496, Invalid=10494, Unknown=0, NotChecked=0, Total=11990 [2018-09-10 10:16:14,024 INFO L87 Difference]: Start difference. First operand 170 states and 171 transitions. Second operand 74 states. [2018-09-10 10:16:17,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:17,900 INFO L93 Difference]: Finished difference Result 313 states and 318 transitions. [2018-09-10 10:16:17,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-09-10 10:16:17,900 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 167 [2018-09-10 10:16:17,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:17,902 INFO L225 Difference]: With dead ends: 313 [2018-09-10 10:16:17,902 INFO L226 Difference]: Without dead ends: 182 [2018-09-10 10:16:17,905 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 728 GetRequests, 585 SyntacticMatches, 15 SemanticMatches, 128 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5603 ImplicationChecksByTransitivity, 7.5s TimeCoverageRelationStatistics Valid=2089, Invalid=14681, Unknown=0, NotChecked=0, Total=16770 [2018-09-10 10:16:17,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-09-10 10:16:17,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 172. [2018-09-10 10:16:17,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-09-10 10:16:17,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 173 transitions. [2018-09-10 10:16:17,917 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 173 transitions. Word has length 167 [2018-09-10 10:16:17,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:17,918 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 173 transitions. [2018-09-10 10:16:17,918 INFO L481 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-09-10 10:16:17,918 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 173 transitions. [2018-09-10 10:16:17,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-09-10 10:16:17,919 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:17,919 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 16, 16, 16, 16, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:17,919 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:17,920 INFO L82 PathProgramCache]: Analyzing trace with hash -1979706849, now seen corresponding path program 30 times [2018-09-10 10:16:17,920 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:17,920 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:17,920 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:17,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:17,921 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:17,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:18,817 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 301 proven. 542 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-09-10 10:16:18,817 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:18,818 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:18,826 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:16:18,826 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:16:18,891 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 18 check-sat command(s) [2018-09-10 10:16:18,892 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:18,896 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:20,205 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 30 proven. 771 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:16:20,205 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:21,776 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 30 proven. 771 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:16:21,796 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:21,796 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:21,811 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:16:21,811 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:16:22,260 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 18 check-sat command(s) [2018-09-10 10:16:22,260 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:22,274 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:22,304 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 30 proven. 771 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:16:22,304 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:22,685 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 30 proven. 771 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:16:22,686 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:22,687 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 37, 37, 37, 37] total 74 [2018-09-10 10:16:22,687 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:22,687 INFO L459 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-09-10 10:16:22,688 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-09-10 10:16:22,688 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=862, Invalid=4540, Unknown=0, NotChecked=0, Total=5402 [2018-09-10 10:16:22,688 INFO L87 Difference]: Start difference. First operand 172 states and 173 transitions. Second operand 57 states. [2018-09-10 10:16:25,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:25,226 INFO L93 Difference]: Finished difference Result 187 states and 189 transitions. [2018-09-10 10:16:25,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-09-10 10:16:25,226 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 169 [2018-09-10 10:16:25,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:25,228 INFO L225 Difference]: With dead ends: 187 [2018-09-10 10:16:25,228 INFO L226 Difference]: Without dead ends: 185 [2018-09-10 10:16:25,229 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 748 GetRequests, 608 SyntacticMatches, 34 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4786 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=2088, Invalid=9468, Unknown=0, NotChecked=0, Total=11556 [2018-09-10 10:16:25,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-09-10 10:16:25,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 180. [2018-09-10 10:16:25,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-09-10 10:16:25,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 181 transitions. [2018-09-10 10:16:25,241 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 181 transitions. Word has length 169 [2018-09-10 10:16:25,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:25,242 INFO L480 AbstractCegarLoop]: Abstraction has 180 states and 181 transitions. [2018-09-10 10:16:25,242 INFO L481 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-09-10 10:16:25,242 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 181 transitions. [2018-09-10 10:16:25,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2018-09-10 10:16:25,243 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:25,243 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 17, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:25,244 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:25,244 INFO L82 PathProgramCache]: Analyzing trace with hash 1076979014, now seen corresponding path program 31 times [2018-09-10 10:16:25,244 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:25,244 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:25,245 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:25,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:25,245 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:25,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:26,787 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 511 proven. 400 refuted. 0 times theorem prover too weak. 435 trivial. 0 not checked. [2018-09-10 10:16:26,787 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:26,787 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:26,795 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:26,795 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:16:26,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:26,853 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:29,052 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 31 proven. 880 refuted. 0 times theorem prover too weak. 435 trivial. 0 not checked. [2018-09-10 10:16:29,052 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:32,828 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 31 proven. 880 refuted. 0 times theorem prover too weak. 435 trivial. 0 not checked. [2018-09-10 10:16:32,848 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:32,848 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:32,863 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:32,863 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:16:32,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:32,985 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:33,290 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 32 proven. 834 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:16:33,290 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:33,701 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 32 proven. 834 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:16:33,703 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:33,703 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 41, 40] total 117 [2018-09-10 10:16:33,703 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:33,704 INFO L459 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-09-10 10:16:33,705 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-09-10 10:16:33,705 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1719, Invalid=11853, Unknown=0, NotChecked=0, Total=13572 [2018-09-10 10:16:33,706 INFO L87 Difference]: Start difference. First operand 180 states and 181 transitions. Second operand 78 states. [2018-09-10 10:16:37,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:37,550 INFO L93 Difference]: Finished difference Result 331 states and 336 transitions. [2018-09-10 10:16:37,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-09-10 10:16:37,550 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 177 [2018-09-10 10:16:37,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:37,551 INFO L225 Difference]: With dead ends: 331 [2018-09-10 10:16:37,551 INFO L226 Difference]: Without dead ends: 192 [2018-09-10 10:16:37,552 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 771 GetRequests, 621 SyntacticMatches, 14 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6209 ImplicationChecksByTransitivity, 8.4s TimeCoverageRelationStatistics Valid=2389, Invalid=16517, Unknown=0, NotChecked=0, Total=18906 [2018-09-10 10:16:37,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-09-10 10:16:37,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 182. [2018-09-10 10:16:37,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-09-10 10:16:37,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 183 transitions. [2018-09-10 10:16:37,565 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 183 transitions. Word has length 177 [2018-09-10 10:16:37,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:37,566 INFO L480 AbstractCegarLoop]: Abstraction has 182 states and 183 transitions. [2018-09-10 10:16:37,566 INFO L481 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-09-10 10:16:37,566 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 183 transitions. [2018-09-10 10:16:37,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2018-09-10 10:16:37,567 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:37,567 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 17, 17, 17, 17, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:37,567 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:37,568 INFO L82 PathProgramCache]: Analyzing trace with hash -1223516320, now seen corresponding path program 32 times [2018-09-10 10:16:37,568 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:37,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:37,568 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:37,569 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:37,569 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:37,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:38,256 INFO L134 CoverageAnalysis]: Checked inductivity of 1382 backedges. 337 proven. 610 refuted. 0 times theorem prover too weak. 435 trivial. 0 not checked. [2018-09-10 10:16:38,256 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:38,256 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:38,264 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:16:38,264 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:38,320 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:16:38,321 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:38,324 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:39,072 INFO L134 CoverageAnalysis]: Checked inductivity of 1382 backedges. 32 proven. 870 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:16:39,072 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:39,968 INFO L134 CoverageAnalysis]: Checked inductivity of 1382 backedges. 32 proven. 870 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:16:39,988 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:39,988 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:40,003 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:16:40,003 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:40,128 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:16:40,128 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:40,135 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:40,181 INFO L134 CoverageAnalysis]: Checked inductivity of 1382 backedges. 32 proven. 870 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:16:40,182 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:40,608 INFO L134 CoverageAnalysis]: Checked inductivity of 1382 backedges. 32 proven. 870 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:16:40,610 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:40,610 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 39, 39, 39, 39] total 78 [2018-09-10 10:16:40,610 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:40,611 INFO L459 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-09-10 10:16:40,611 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-09-10 10:16:40,612 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=957, Invalid=5049, Unknown=0, NotChecked=0, Total=6006 [2018-09-10 10:16:40,612 INFO L87 Difference]: Start difference. First operand 182 states and 183 transitions. Second operand 60 states. [2018-09-10 10:16:42,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:42,725 INFO L93 Difference]: Finished difference Result 197 states and 199 transitions. [2018-09-10 10:16:42,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-09-10 10:16:42,726 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 179 [2018-09-10 10:16:42,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:42,728 INFO L225 Difference]: With dead ends: 197 [2018-09-10 10:16:42,728 INFO L226 Difference]: Without dead ends: 195 [2018-09-10 10:16:42,730 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 792 GetRequests, 644 SyntacticMatches, 36 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5365 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=2327, Invalid=10555, Unknown=0, NotChecked=0, Total=12882 [2018-09-10 10:16:42,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-09-10 10:16:42,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 190. [2018-09-10 10:16:42,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-09-10 10:16:42,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 191 transitions. [2018-09-10 10:16:42,742 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 191 transitions. Word has length 179 [2018-09-10 10:16:42,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:42,743 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 191 transitions. [2018-09-10 10:16:42,743 INFO L481 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-09-10 10:16:42,743 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 191 transitions. [2018-09-10 10:16:42,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2018-09-10 10:16:42,744 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:42,744 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 18, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:42,745 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:42,745 INFO L82 PathProgramCache]: Analyzing trace with hash -1849220729, now seen corresponding path program 33 times [2018-09-10 10:16:42,745 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:42,745 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:42,746 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:42,746 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:42,746 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:42,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:44,436 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 577 proven. 442 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-09-10 10:16:44,436 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:44,436 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:44,443 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:16:44,443 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:16:44,554 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 19 check-sat command(s) [2018-09-10 10:16:44,554 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:44,559 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:45,638 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 81 proven. 938 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-09-10 10:16:45,639 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:48,569 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 81 proven. 938 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-09-10 10:16:48,589 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:48,589 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:48,605 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:16:48,605 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:16:49,162 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 19 check-sat command(s) [2018-09-10 10:16:49,162 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:49,170 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:51,747 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 34 proven. 937 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:16:51,748 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:53,938 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 34 proven. 937 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:16:53,939 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:53,940 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 45, 44, 42, 42] total 158 [2018-09-10 10:16:53,940 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:53,940 INFO L459 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-09-10 10:16:53,940 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-09-10 10:16:53,941 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2956, Invalid=21850, Unknown=0, NotChecked=0, Total=24806 [2018-09-10 10:16:53,942 INFO L87 Difference]: Start difference. First operand 190 states and 191 transitions. Second operand 65 states. [2018-09-10 10:16:56,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:56,376 INFO L93 Difference]: Finished difference Result 275 states and 295 transitions. [2018-09-10 10:16:56,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-09-10 10:16:56,379 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 187 [2018-09-10 10:16:56,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:56,380 INFO L225 Difference]: With dead ends: 275 [2018-09-10 10:16:56,380 INFO L226 Difference]: Without dead ends: 192 [2018-09-10 10:16:56,383 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 813 GetRequests, 624 SyntacticMatches, 12 SemanticMatches, 177 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13825 ImplicationChecksByTransitivity, 10.6s TimeCoverageRelationStatistics Valid=3485, Invalid=28377, Unknown=0, NotChecked=0, Total=31862 [2018-09-10 10:16:56,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-09-10 10:16:56,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 192. [2018-09-10 10:16:56,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-09-10 10:16:56,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 193 transitions. [2018-09-10 10:16:56,397 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 193 transitions. Word has length 187 [2018-09-10 10:16:56,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:56,397 INFO L480 AbstractCegarLoop]: Abstraction has 192 states and 193 transitions. [2018-09-10 10:16:56,397 INFO L481 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-09-10 10:16:56,397 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 193 transitions. [2018-09-10 10:16:56,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2018-09-10 10:16:56,399 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:56,399 INFO L376 BasicCegarLoop]: trace histogram [20, 19, 18, 18, 18, 18, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:56,399 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:56,399 INFO L82 PathProgramCache]: Analyzing trace with hash -1826487519, now seen corresponding path program 34 times [2018-09-10 10:16:56,399 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:56,400 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:56,400 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:56,400 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:56,400 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:56,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:57,940 INFO L134 CoverageAnalysis]: Checked inductivity of 1553 backedges. 375 proven. 682 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-09-10 10:16:57,940 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:57,940 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:57,947 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:16:57,947 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:16:58,005 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:16:58,005 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:58,009 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:59,060 INFO L134 CoverageAnalysis]: Checked inductivity of 1553 backedges. 33 proven. 1024 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-09-10 10:16:59,061 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:00,218 INFO L134 CoverageAnalysis]: Checked inductivity of 1553 backedges. 33 proven. 1024 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-09-10 10:17:00,238 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:00,238 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:00,253 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:17:00,253 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:17:00,421 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:17:00,421 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:00,428 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:00,470 INFO L134 CoverageAnalysis]: Checked inductivity of 1553 backedges. 34 proven. 975 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:17:00,471 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:00,847 INFO L134 CoverageAnalysis]: Checked inductivity of 1553 backedges. 34 proven. 975 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:17:00,849 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:00,849 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 43, 43, 41, 41] total 84 [2018-09-10 10:17:00,849 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:00,849 INFO L459 AbstractCegarLoop]: Interpolant automaton has 63 states [2018-09-10 10:17:00,850 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2018-09-10 10:17:00,850 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1065, Invalid=5907, Unknown=0, NotChecked=0, Total=6972 [2018-09-10 10:17:00,850 INFO L87 Difference]: Start difference. First operand 192 states and 193 transitions. Second operand 63 states. [2018-09-10 10:17:03,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:03,047 INFO L93 Difference]: Finished difference Result 207 states and 209 transitions. [2018-09-10 10:17:03,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-09-10 10:17:03,048 INFO L78 Accepts]: Start accepts. Automaton has 63 states. Word has length 189 [2018-09-10 10:17:03,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:03,049 INFO L225 Difference]: With dead ends: 207 [2018-09-10 10:17:03,049 INFO L226 Difference]: Without dead ends: 205 [2018-09-10 10:17:03,050 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 836 GetRequests, 673 SyntacticMatches, 43 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6367 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=2590, Invalid=12172, Unknown=0, NotChecked=0, Total=14762 [2018-09-10 10:17:03,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-09-10 10:17:03,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 200. [2018-09-10 10:17:03,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-09-10 10:17:03,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 201 transitions. [2018-09-10 10:17:03,061 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 201 transitions. Word has length 189 [2018-09-10 10:17:03,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:03,062 INFO L480 AbstractCegarLoop]: Abstraction has 200 states and 201 transitions. [2018-09-10 10:17:03,062 INFO L481 AbstractCegarLoop]: Interpolant automaton has 63 states. [2018-09-10 10:17:03,062 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 201 transitions. [2018-09-10 10:17:03,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-09-10 10:17:03,063 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:03,063 INFO L376 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 19, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:03,063 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:03,063 INFO L82 PathProgramCache]: Analyzing trace with hash 760951880, now seen corresponding path program 35 times [2018-09-10 10:17:03,063 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:03,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:03,064 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:03,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:03,064 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:03,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:05,051 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 647 proven. 486 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2018-09-10 10:17:05,052 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:05,052 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:05,059 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:17:05,059 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:05,136 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 20 check-sat command(s) [2018-09-10 10:17:05,136 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:05,140 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:07,476 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 86 proven. 1047 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2018-09-10 10:17:07,476 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:11,557 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 86 proven. 1047 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2018-09-10 10:17:11,577 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:11,577 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:11,591 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:17:11,591 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:12,159 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 20 check-sat command(s) [2018-09-10 10:17:12,159 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:12,167 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:12,536 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 36 proven. 1046 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:17:12,537 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:12,918 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 36 proven. 1046 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:17:12,920 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:12,920 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46, 46, 45, 44] total 128 [2018-09-10 10:17:12,920 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:12,921 INFO L459 AbstractCegarLoop]: Interpolant automaton has 86 states [2018-09-10 10:17:12,921 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2018-09-10 10:17:12,922 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2024, Invalid=14232, Unknown=0, NotChecked=0, Total=16256 [2018-09-10 10:17:12,922 INFO L87 Difference]: Start difference. First operand 200 states and 201 transitions. Second operand 86 states. [2018-09-10 10:17:17,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:17,713 INFO L93 Difference]: Finished difference Result 367 states and 372 transitions. [2018-09-10 10:17:17,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-09-10 10:17:17,714 INFO L78 Accepts]: Start accepts. Automaton has 86 states. Word has length 197 [2018-09-10 10:17:17,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:17,715 INFO L225 Difference]: With dead ends: 367 [2018-09-10 10:17:17,715 INFO L226 Difference]: Without dead ends: 212 [2018-09-10 10:17:17,718 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 857 GetRequests, 693 SyntacticMatches, 15 SemanticMatches, 149 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7496 ImplicationChecksByTransitivity, 9.5s TimeCoverageRelationStatistics Valid=2809, Invalid=19841, Unknown=0, NotChecked=0, Total=22650 [2018-09-10 10:17:17,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-09-10 10:17:17,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 202. [2018-09-10 10:17:17,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-09-10 10:17:17,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 203 transitions. [2018-09-10 10:17:17,732 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 203 transitions. Word has length 197 [2018-09-10 10:17:17,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:17,732 INFO L480 AbstractCegarLoop]: Abstraction has 202 states and 203 transitions. [2018-09-10 10:17:17,732 INFO L481 AbstractCegarLoop]: Interpolant automaton has 86 states. [2018-09-10 10:17:17,732 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 203 transitions. [2018-09-10 10:17:17,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-09-10 10:17:17,733 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:17,733 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 19, 19, 19, 19, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:17,733 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:17,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1491361122, now seen corresponding path program 36 times [2018-09-10 10:17:17,733 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:17,734 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:17,734 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:17,734 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:17,734 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:17,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:18,872 INFO L134 CoverageAnalysis]: Checked inductivity of 1734 backedges. 415 proven. 758 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2018-09-10 10:17:18,872 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:18,873 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:18,880 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:17:18,880 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:17:18,959 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 21 check-sat command(s) [2018-09-10 10:17:18,959 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:18,962 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:19,839 INFO L134 CoverageAnalysis]: Checked inductivity of 1734 backedges. 36 proven. 1086 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:17:19,840 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:20,931 INFO L134 CoverageAnalysis]: Checked inductivity of 1734 backedges. 36 proven. 1086 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:17:20,951 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:20,951 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:20,965 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:17:20,965 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:17:21,510 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 21 check-sat command(s) [2018-09-10 10:17:21,510 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:21,518 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:21,556 INFO L134 CoverageAnalysis]: Checked inductivity of 1734 backedges. 36 proven. 1086 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:17:21,556 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:22,020 INFO L134 CoverageAnalysis]: Checked inductivity of 1734 backedges. 36 proven. 1086 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:17:22,021 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:22,022 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 43, 43, 43, 43] total 86 [2018-09-10 10:17:22,022 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:22,022 INFO L459 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-09-10 10:17:22,022 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-09-10 10:17:22,023 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1162, Invalid=6148, Unknown=0, NotChecked=0, Total=7310 [2018-09-10 10:17:22,023 INFO L87 Difference]: Start difference. First operand 202 states and 203 transitions. Second operand 66 states. [2018-09-10 10:17:24,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:24,638 INFO L93 Difference]: Finished difference Result 217 states and 219 transitions. [2018-09-10 10:17:24,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-09-10 10:17:24,639 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 199 [2018-09-10 10:17:24,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:24,640 INFO L225 Difference]: With dead ends: 217 [2018-09-10 10:17:24,640 INFO L226 Difference]: Without dead ends: 215 [2018-09-10 10:17:24,642 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 880 GetRequests, 716 SyntacticMatches, 40 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6622 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=2844, Invalid=12906, Unknown=0, NotChecked=0, Total=15750 [2018-09-10 10:17:24,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-09-10 10:17:24,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 210. [2018-09-10 10:17:24,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-09-10 10:17:24,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 211 transitions. [2018-09-10 10:17:24,653 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 211 transitions. Word has length 199 [2018-09-10 10:17:24,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:24,653 INFO L480 AbstractCegarLoop]: Abstraction has 210 states and 211 transitions. [2018-09-10 10:17:24,653 INFO L481 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-09-10 10:17:24,653 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 211 transitions. [2018-09-10 10:17:24,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2018-09-10 10:17:24,654 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:24,654 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 20, 20, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:24,655 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:24,655 INFO L82 PathProgramCache]: Analyzing trace with hash -981222007, now seen corresponding path program 37 times [2018-09-10 10:17:24,655 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:24,655 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:24,655 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:24,656 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:24,656 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:24,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:26,516 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 721 proven. 532 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-10 10:17:26,516 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:26,517 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:26,539 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:26,540 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:17:26,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:26,606 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:29,407 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 37 proven. 1216 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-10 10:17:29,407 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:33,512 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 37 proven. 1216 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-10 10:17:33,531 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:33,532 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:33,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:33,547 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:17:33,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:33,689 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:34,153 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 38 proven. 1161 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:17:34,153 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:34,602 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 38 proven. 1161 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:17:34,603 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:34,604 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48, 47, 46] total 135 [2018-09-10 10:17:34,604 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:34,604 INFO L459 AbstractCegarLoop]: Interpolant automaton has 90 states [2018-09-10 10:17:34,605 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 90 interpolants. [2018-09-10 10:17:34,605 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2283, Invalid=15807, Unknown=0, NotChecked=0, Total=18090 [2018-09-10 10:17:34,605 INFO L87 Difference]: Start difference. First operand 210 states and 211 transitions. Second operand 90 states. [2018-09-10 10:17:38,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:38,672 INFO L93 Difference]: Finished difference Result 385 states and 390 transitions. [2018-09-10 10:17:38,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-09-10 10:17:38,673 INFO L78 Accepts]: Start accepts. Automaton has 90 states. Word has length 207 [2018-09-10 10:17:38,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:38,674 INFO L225 Difference]: With dead ends: 385 [2018-09-10 10:17:38,674 INFO L226 Difference]: Without dead ends: 222 [2018-09-10 10:17:38,677 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 900 GetRequests, 729 SyntacticMatches, 14 SemanticMatches, 157 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8192 ImplicationChecksByTransitivity, 9.9s TimeCoverageRelationStatistics Valid=3157, Invalid=21965, Unknown=0, NotChecked=0, Total=25122 [2018-09-10 10:17:38,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-09-10 10:17:38,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 212. [2018-09-10 10:17:38,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-09-10 10:17:38,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 213 transitions. [2018-09-10 10:17:38,692 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 213 transitions. Word has length 207 [2018-09-10 10:17:38,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:38,692 INFO L480 AbstractCegarLoop]: Abstraction has 212 states and 213 transitions. [2018-09-10 10:17:38,692 INFO L481 AbstractCegarLoop]: Interpolant automaton has 90 states. [2018-09-10 10:17:38,693 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 213 transitions. [2018-09-10 10:17:38,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2018-09-10 10:17:38,694 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:38,694 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 20, 20, 20, 20, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:38,694 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:38,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1717055965, now seen corresponding path program 38 times [2018-09-10 10:17:38,695 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:38,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:38,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:38,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:38,696 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:38,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:39,843 INFO L134 CoverageAnalysis]: Checked inductivity of 1925 backedges. 457 proven. 838 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-10 10:17:39,844 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:39,844 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:39,856 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:17:39,857 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:39,919 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:17:39,919 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:39,923 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:40,889 INFO L134 CoverageAnalysis]: Checked inductivity of 1925 backedges. 38 proven. 1203 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:17:40,890 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:42,080 INFO L134 CoverageAnalysis]: Checked inductivity of 1925 backedges. 38 proven. 1203 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:17:42,100 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:42,100 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:42,115 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:17:42,115 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:42,254 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:17:42,254 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:42,262 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:42,321 INFO L134 CoverageAnalysis]: Checked inductivity of 1925 backedges. 38 proven. 1203 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:17:42,321 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:42,809 INFO L134 CoverageAnalysis]: Checked inductivity of 1925 backedges. 38 proven. 1203 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:17:42,810 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:42,810 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 45, 45, 45, 45] total 90 [2018-09-10 10:17:42,810 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:42,811 INFO L459 AbstractCegarLoop]: Interpolant automaton has 69 states [2018-09-10 10:17:42,811 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2018-09-10 10:17:42,811 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1272, Invalid=6738, Unknown=0, NotChecked=0, Total=8010 [2018-09-10 10:17:42,812 INFO L87 Difference]: Start difference. First operand 212 states and 213 transitions. Second operand 69 states. [2018-09-10 10:17:45,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:45,291 INFO L93 Difference]: Finished difference Result 227 states and 229 transitions. [2018-09-10 10:17:45,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-09-10 10:17:45,292 INFO L78 Accepts]: Start accepts. Automaton has 69 states. Word has length 209 [2018-09-10 10:17:45,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:45,294 INFO L225 Difference]: With dead ends: 227 [2018-09-10 10:17:45,294 INFO L226 Difference]: Without dead ends: 225 [2018-09-10 10:17:45,295 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 924 GetRequests, 752 SyntacticMatches, 42 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7300 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=3122, Invalid=14170, Unknown=0, NotChecked=0, Total=17292 [2018-09-10 10:17:45,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-09-10 10:17:45,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 220. [2018-09-10 10:17:45,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-09-10 10:17:45,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 221 transitions. [2018-09-10 10:17:45,312 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 221 transitions. Word has length 209 [2018-09-10 10:17:45,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:45,312 INFO L480 AbstractCegarLoop]: Abstraction has 220 states and 221 transitions. [2018-09-10 10:17:45,312 INFO L481 AbstractCegarLoop]: Interpolant automaton has 69 states. [2018-09-10 10:17:45,313 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 221 transitions. [2018-09-10 10:17:45,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2018-09-10 10:17:45,314 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:45,314 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 21, 21, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:45,314 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_half___true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:45,315 INFO L82 PathProgramCache]: Analyzing trace with hash 1265556810, now seen corresponding path program 39 times [2018-09-10 10:17:45,315 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:45,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:45,317 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:45,317 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:45,317 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:45,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:47,435 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 799 proven. 580 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2018-09-10 10:17:47,435 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:47,435 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:47,443 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:17:47,443 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:17:47,536 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-09-10 10:17:47,536 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:47,540 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:48,926 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 96 proven. 1283 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2018-09-10 10:17:48,926 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:52,556 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 96 proven. 1283 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2018-09-10 10:17:52,576 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:52,576 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:52,593 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:17:52,593 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:17:53,342 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-09-10 10:17:53,342 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:53,351 INFO L273 TraceCheckSpWp]: Computing forward predicates... Received shutdown request... [2018-09-10 10:17:56,708 INFO L177 TraceCheckSpWp]: Timeout while computing interpolants [2018-09-10 10:17:56,909 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 83 cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:56,909 WARN L549 AbstractCegarLoop]: Verification canceled [2018-09-10 10:17:56,914 WARN L206 ceAbstractionStarter]: Timeout [2018-09-10 10:17:56,914 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.09 10:17:56 BoogieIcfgContainer [2018-09-10 10:17:56,914 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-10 10:17:56,915 INFO L168 Benchmark]: Toolchain (without parser) took 237000.94 ms. Allocated memory was 1.5 GB in the beginning and 2.4 GB in the end (delta: 827.9 MB). Free memory was 1.4 GB in the beginning and 1.8 GB in the end (delta: -373.9 MB). Peak memory consumption was 454.0 MB. Max. memory is 7.1 GB. [2018-09-10 10:17:56,916 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-10 10:17:56,916 INFO L168 Benchmark]: CACSL2BoogieTranslator took 330.64 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-09-10 10:17:56,917 INFO L168 Benchmark]: Boogie Procedure Inliner took 25.66 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-10 10:17:56,917 INFO L168 Benchmark]: Boogie Preprocessor took 33.50 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-10 10:17:56,917 INFO L168 Benchmark]: RCFGBuilder took 508.59 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 765.5 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -823.1 MB). Peak memory consumption was 26.4 MB. Max. memory is 7.1 GB. [2018-09-10 10:17:56,918 INFO L168 Benchmark]: TraceAbstraction took 236095.54 ms. Allocated memory was 2.3 GB in the beginning and 2.4 GB in the end (delta: 62.4 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 438.7 MB). Peak memory consumption was 501.1 MB. Max. memory is 7.1 GB. [2018-09-10 10:17:56,921 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 330.64 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 25.66 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 33.50 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 508.59 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 765.5 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -823.1 MB). Peak memory consumption was 26.4 MB. Max. memory is 7.1 GB. * TraceAbstraction took 236095.54 ms. Allocated memory was 2.3 GB in the beginning and 2.4 GB in the end (delta: 62.4 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 438.7 MB). Peak memory consumption was 501.1 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was analyzing trace of length 218 with TraceHistMax 22, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 160 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 24 locations, 1 error locations. TIMEOUT Result, 236.0s OverallTime, 43 OverallIterations, 22 TraceHistogramMax, 66.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1304 SDtfs, 5325 SDslu, 32381 SDs, 0 SdLazy, 48148 SolverSat, 4919 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 35.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 19942 GetRequests, 15801 SyntacticMatches, 758 SemanticMatches, 3383 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140446 ImplicationChecksByTransitivity, 155.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=220occurred in iteration=42, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 42 MinimizatonAttempts, 220 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.5s SsaConstructionTime, 8.5s SatisfiabilityAnalysisTime, 144.6s InterpolantComputationTime, 13589 NumberOfCodeBlocks, 13589 NumberOfCodeBlocksAsserted, 564 NumberOfCheckSat, 22427 ConstructedInterpolants, 0 QuantifiedInterpolants, 23517333 SizeOfPredicates, 385 NumberOfNonLiveVariables, 19400 ConjunctsInSsa, 3701 ConjunctsInUnsatCore, 202 InterpolantComputations, 2 PerfectInterpolantSequences, 55242/133800 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/half_2_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-09-10_10-17-56-932.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/half_2_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-10_10-17-56-932.csv Completed graceful shutdown