java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-3142e50-m [2018-09-10 10:09:39,590 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-10 10:09:39,592 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-10 10:09:39,612 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-10 10:09:39,612 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-10 10:09:39,613 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-10 10:09:39,614 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-10 10:09:39,616 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-10 10:09:39,618 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-10 10:09:39,619 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-10 10:09:39,620 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-10 10:09:39,620 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-10 10:09:39,621 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-10 10:09:39,622 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-10 10:09:39,623 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-10 10:09:39,624 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-10 10:09:39,625 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-10 10:09:39,627 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-10 10:09:39,629 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-10 10:09:39,630 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-10 10:09:39,632 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-10 10:09:39,633 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-10 10:09:39,635 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-10 10:09:39,635 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-10 10:09:39,636 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-10 10:09:39,637 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-10 10:09:39,638 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-10 10:09:39,638 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-10 10:09:39,639 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-10 10:09:39,641 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-10 10:09:39,642 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-10 10:09:39,645 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-09-10 10:09:39,646 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-09-10 10:09:39,646 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-09-10 10:09:39,647 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-09-10 10:09:39,648 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-09-10 10:09:39,648 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-10 10:09:39,669 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-10 10:09:39,670 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-10 10:09:39,671 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-10 10:09:39,671 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-10 10:09:39,671 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-10 10:09:39,672 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-10 10:09:39,672 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-10 10:09:39,672 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-10 10:09:39,672 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-10 10:09:39,673 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-10 10:09:39,673 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-10 10:09:39,674 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-10 10:09:39,675 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-10 10:09:39,676 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-10 10:09:39,676 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-10 10:09:39,676 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-10 10:09:39,676 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-10 10:09:39,676 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-10 10:09:39,677 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-10 10:09:39,677 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-10 10:09:39,677 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-10 10:09:39,677 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-10 10:09:39,677 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-10 10:09:39,677 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-10 10:09:39,678 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-10 10:09:39,678 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-10 10:09:39,678 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-10 10:09:39,678 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-10 10:09:39,679 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-10 10:09:39,679 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-10 10:09:39,679 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-10 10:09:39,679 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-10 10:09:39,679 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-10 10:09:39,731 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-10 10:09:39,746 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-10 10:09:39,753 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-10 10:09:39,755 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-10 10:09:39,755 INFO L276 PluginConnector]: CDTParser initialized [2018-09-10 10:09:39,757 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i [2018-09-10 10:09:40,099 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6a12ff4d4/0918e97e82c3431ebff19212a1692cf6/FLAG7d5975913 [2018-09-10 10:09:40,265 INFO L276 CDTParser]: Found 1 translation units. [2018-09-10 10:09:40,266 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i [2018-09-10 10:09:40,274 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6a12ff4d4/0918e97e82c3431ebff19212a1692cf6/FLAG7d5975913 [2018-09-10 10:09:40,292 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6a12ff4d4/0918e97e82c3431ebff19212a1692cf6 [2018-09-10 10:09:40,306 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-10 10:09:40,309 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-10 10:09:40,310 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-10 10:09:40,313 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-10 10:09:40,320 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-10 10:09:40,321 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,325 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@11e80f5d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40, skipping insertion in model container [2018-09-10 10:09:40,325 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,502 INFO L180 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-09-10 10:09:40,550 INFO L175 PostProcessor]: Settings: Checked method=main [2018-09-10 10:09:40,567 INFO L431 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-10 10:09:40,571 INFO L175 PostProcessor]: Settings: Checked method=main [2018-09-10 10:09:40,583 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40 WrapperNode [2018-09-10 10:09:40,583 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-10 10:09:40,584 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-10 10:09:40,584 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-10 10:09:40,584 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-10 10:09:40,594 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,600 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,606 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-10 10:09:40,606 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-10 10:09:40,607 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-10 10:09:40,607 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-10 10:09:40,616 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,617 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,618 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,618 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,619 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,627 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,628 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (1/1) ... [2018-09-10 10:09:40,635 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-10 10:09:40,636 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-10 10:09:40,636 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-10 10:09:40,636 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-10 10:09:40,637 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-10 10:09:40,700 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-10 10:09:40,700 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-10 10:09:40,700 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-10 10:09:40,701 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-10 10:09:40,701 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-10 10:09:40,701 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-10 10:09:40,701 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assert [2018-09-10 10:09:40,701 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assert [2018-09-10 10:09:40,938 INFO L353 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-10 10:09:40,938 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 10:09:40 BoogieIcfgContainer [2018-09-10 10:09:40,939 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-10 10:09:40,940 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-10 10:09:40,940 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-10 10:09:40,943 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-10 10:09:40,943 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.09 10:09:40" (1/3) ... [2018-09-10 10:09:40,944 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a67b237 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 10:09:40, skipping insertion in model container [2018-09-10 10:09:40,944 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:09:40" (2/3) ... [2018-09-10 10:09:40,945 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a67b237 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 10:09:40, skipping insertion in model container [2018-09-10 10:09:40,945 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 10:09:40" (3/3) ... [2018-09-10 10:09:40,947 INFO L112 eAbstractionObserver]: Analyzing ICFG phases_true-unreach-call1.i [2018-09-10 10:09:40,956 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-10 10:09:40,963 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-10 10:09:41,006 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-10 10:09:41,006 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-10 10:09:41,007 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-10 10:09:41,007 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-10 10:09:41,007 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-10 10:09:41,007 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-10 10:09:41,007 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-10 10:09:41,007 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-10 10:09:41,007 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-10 10:09:41,024 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states. [2018-09-10 10:09:41,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-09-10 10:09:41,030 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:41,031 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:41,032 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:41,038 INFO L82 PathProgramCache]: Analyzing trace with hash 1713253442, now seen corresponding path program 1 times [2018-09-10 10:09:41,041 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:41,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:41,098 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:41,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:41,098 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:41,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:41,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:41,156 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:09:41,157 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-10 10:09:41,157 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:09:41,161 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-10 10:09:41,173 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-10 10:09:41,174 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-10 10:09:41,177 INFO L87 Difference]: Start difference. First operand 19 states. Second operand 2 states. [2018-09-10 10:09:41,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:41,200 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-09-10 10:09:41,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-10 10:09:41,202 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-09-10 10:09:41,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:41,211 INFO L225 Difference]: With dead ends: 30 [2018-09-10 10:09:41,211 INFO L226 Difference]: Without dead ends: 13 [2018-09-10 10:09:41,215 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-10 10:09:41,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-09-10 10:09:41,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-09-10 10:09:41,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-09-10 10:09:41,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2018-09-10 10:09:41,255 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 10 [2018-09-10 10:09:41,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:41,255 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2018-09-10 10:09:41,256 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-10 10:09:41,256 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2018-09-10 10:09:41,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-09-10 10:09:41,256 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:41,257 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:41,257 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:41,257 INFO L82 PathProgramCache]: Analyzing trace with hash 1144102878, now seen corresponding path program 1 times [2018-09-10 10:09:41,258 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:41,259 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:41,259 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:41,259 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:41,259 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:41,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:41,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:41,395 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:09:41,395 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-09-10 10:09:41,396 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:09:41,397 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-10 10:09:41,397 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-10 10:09:41,397 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-10 10:09:41,398 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand 3 states. [2018-09-10 10:09:41,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:41,490 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2018-09-10 10:09:41,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-10 10:09:41,491 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-09-10 10:09:41,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:41,492 INFO L225 Difference]: With dead ends: 24 [2018-09-10 10:09:41,493 INFO L226 Difference]: Without dead ends: 16 [2018-09-10 10:09:41,494 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-10 10:09:41,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-09-10 10:09:41,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-09-10 10:09:41,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-09-10 10:09:41,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2018-09-10 10:09:41,504 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 17 transitions. Word has length 11 [2018-09-10 10:09:41,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:41,505 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 17 transitions. [2018-09-10 10:09:41,505 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-10 10:09:41,505 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 17 transitions. [2018-09-10 10:09:41,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-09-10 10:09:41,506 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:41,507 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:41,507 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:41,507 INFO L82 PathProgramCache]: Analyzing trace with hash -2056921797, now seen corresponding path program 1 times [2018-09-10 10:09:41,508 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:41,509 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:41,509 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:41,509 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:41,509 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:41,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:41,655 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:41,656 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:41,656 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:41,668 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:41,668 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:09:41,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:41,705 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:41,753 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:41,753 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:41,810 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:41,832 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:41,832 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:41,856 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:41,856 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:09:41,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:41,880 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:41,891 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:41,891 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:41,931 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:41,935 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:41,936 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-09-10 10:09:41,936 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:41,936 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-10 10:09:41,937 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-10 10:09:41,937 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-09-10 10:09:41,937 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. Second operand 4 states. [2018-09-10 10:09:42,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:42,035 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2018-09-10 10:09:42,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-10 10:09:42,037 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-09-10 10:09:42,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:42,037 INFO L225 Difference]: With dead ends: 27 [2018-09-10 10:09:42,038 INFO L226 Difference]: Without dead ends: 19 [2018-09-10 10:09:42,038 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-09-10 10:09:42,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-09-10 10:09:42,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-09-10 10:09:42,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-09-10 10:09:42,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2018-09-10 10:09:42,043 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 14 [2018-09-10 10:09:42,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:42,044 INFO L480 AbstractCegarLoop]: Abstraction has 19 states and 20 transitions. [2018-09-10 10:09:42,044 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-10 10:09:42,044 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 20 transitions. [2018-09-10 10:09:42,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-09-10 10:09:42,045 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:42,045 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:42,046 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:42,046 INFO L82 PathProgramCache]: Analyzing trace with hash 1670825662, now seen corresponding path program 2 times [2018-09-10 10:09:42,046 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:42,047 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:42,047 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:42,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:42,048 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:42,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:42,357 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:42,358 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:42,358 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:42,368 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:09:42,369 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:42,383 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:09:42,384 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:42,385 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:42,411 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:42,411 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:42,477 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:42,505 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:42,505 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:42,520 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:09:42,521 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:42,540 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:09:42,540 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:42,544 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:42,581 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:42,581 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:42,605 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (5)] Exception during sending of exit command (exit): Broken pipe [2018-09-10 10:09:42,610 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:42,610 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-09-10 10:09:42,610 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:42,611 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-10 10:09:42,611 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-10 10:09:42,613 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-09-10 10:09:42,614 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. Second operand 5 states. [2018-09-10 10:09:42,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:42,698 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-09-10 10:09:42,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-10 10:09:42,699 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-09-10 10:09:42,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:42,700 INFO L225 Difference]: With dead ends: 30 [2018-09-10 10:09:42,700 INFO L226 Difference]: Without dead ends: 22 [2018-09-10 10:09:42,701 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-09-10 10:09:42,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-09-10 10:09:42,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-09-10 10:09:42,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-09-10 10:09:42,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2018-09-10 10:09:42,706 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 23 transitions. Word has length 17 [2018-09-10 10:09:42,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:42,706 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 23 transitions. [2018-09-10 10:09:42,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-10 10:09:42,707 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2018-09-10 10:09:42,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-09-10 10:09:42,707 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:42,708 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:42,708 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:42,708 INFO L82 PathProgramCache]: Analyzing trace with hash 26004059, now seen corresponding path program 3 times [2018-09-10 10:09:42,708 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:42,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:42,710 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:42,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:42,710 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:42,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:42,924 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:42,924 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:42,924 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:42,932 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:09:42,932 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:09:42,943 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-09-10 10:09:42,943 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:42,944 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:42,960 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-09-10 10:09:42,960 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:42,988 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-09-10 10:09:43,008 INFO L313 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-09-10 10:09:43,009 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [6] total 8 [2018-09-10 10:09:43,009 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:09:43,009 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-10 10:09:43,010 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-10 10:09:43,010 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-09-10 10:09:43,011 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. Second operand 3 states. [2018-09-10 10:09:43,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:43,047 INFO L93 Difference]: Finished difference Result 30 states and 32 transitions. [2018-09-10 10:09:43,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-10 10:09:43,049 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2018-09-10 10:09:43,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:43,050 INFO L225 Difference]: With dead ends: 30 [2018-09-10 10:09:43,050 INFO L226 Difference]: Without dead ends: 25 [2018-09-10 10:09:43,051 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-09-10 10:09:43,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-09-10 10:09:43,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2018-09-10 10:09:43,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-09-10 10:09:43,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 25 transitions. [2018-09-10 10:09:43,056 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 25 transitions. Word has length 20 [2018-09-10 10:09:43,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:43,057 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 25 transitions. [2018-09-10 10:09:43,057 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-10 10:09:43,057 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 25 transitions. [2018-09-10 10:09:43,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-09-10 10:09:43,058 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:43,058 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:43,058 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:43,058 INFO L82 PathProgramCache]: Analyzing trace with hash -2092450784, now seen corresponding path program 1 times [2018-09-10 10:09:43,059 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:43,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:43,060 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:43,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:43,060 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:43,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:43,226 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:43,227 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:43,227 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:43,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:43,235 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:09:43,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:43,255 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:43,361 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:43,361 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:43,821 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:43,841 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:43,842 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:43,858 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:43,858 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:09:43,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:43,881 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:43,915 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:43,915 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:44,009 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:44,010 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:44,010 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 7, 6, 6] total 15 [2018-09-10 10:09:44,010 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:44,011 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-09-10 10:09:44,011 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-09-10 10:09:44,012 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=133, Unknown=0, NotChecked=0, Total=210 [2018-09-10 10:09:44,012 INFO L87 Difference]: Start difference. First operand 24 states and 25 transitions. Second operand 7 states. [2018-09-10 10:09:44,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:44,166 INFO L93 Difference]: Finished difference Result 37 states and 40 transitions. [2018-09-10 10:09:44,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-09-10 10:09:44,166 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-09-10 10:09:44,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:44,167 INFO L225 Difference]: With dead ends: 37 [2018-09-10 10:09:44,168 INFO L226 Difference]: Without dead ends: 27 [2018-09-10 10:09:44,168 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 81 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=77, Invalid=133, Unknown=0, NotChecked=0, Total=210 [2018-09-10 10:09:44,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-09-10 10:09:44,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-09-10 10:09:44,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-09-10 10:09:44,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2018-09-10 10:09:44,174 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 23 [2018-09-10 10:09:44,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:44,174 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2018-09-10 10:09:44,174 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-09-10 10:09:44,174 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2018-09-10 10:09:44,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-09-10 10:09:44,175 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:44,176 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:44,176 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:44,176 INFO L82 PathProgramCache]: Analyzing trace with hash 1956763133, now seen corresponding path program 2 times [2018-09-10 10:09:44,176 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:44,177 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:44,178 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:09:44,178 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:44,178 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:44,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:44,425 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:44,426 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:44,426 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:44,434 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:09:44,434 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:44,445 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:09:44,445 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:44,448 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:44,491 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:44,492 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:44,701 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:44,721 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:44,721 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:44,741 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:09:44,741 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:09:44,763 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:09:44,763 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:44,768 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:44,787 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:44,788 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:44,805 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:44,806 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:44,807 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-09-10 10:09:44,807 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:44,807 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-09-10 10:09:44,807 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-09-10 10:09:44,808 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-10 10:09:44,808 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand 8 states. [2018-09-10 10:09:44,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:44,952 INFO L93 Difference]: Finished difference Result 40 states and 43 transitions. [2018-09-10 10:09:44,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-10 10:09:44,953 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-09-10 10:09:44,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:44,953 INFO L225 Difference]: With dead ends: 40 [2018-09-10 10:09:44,954 INFO L226 Difference]: Without dead ends: 30 [2018-09-10 10:09:44,954 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 96 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-10 10:09:44,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-09-10 10:09:44,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-09-10 10:09:44,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-09-10 10:09:44,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 31 transitions. [2018-09-10 10:09:44,960 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 31 transitions. Word has length 26 [2018-09-10 10:09:44,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:44,960 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 31 transitions. [2018-09-10 10:09:44,960 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-09-10 10:09:44,960 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2018-09-10 10:09:44,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-09-10 10:09:44,961 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:44,961 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:44,962 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:44,962 INFO L82 PathProgramCache]: Analyzing trace with hash -657878272, now seen corresponding path program 3 times [2018-09-10 10:09:44,962 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:44,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:44,963 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:44,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:44,964 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:44,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:45,166 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:45,166 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:45,166 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:45,178 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:09:45,179 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:09:45,202 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-10 10:09:45,202 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:45,204 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:45,258 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-10 10:09:45,259 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:45,314 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-10 10:09:45,334 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:45,335 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:45,351 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:09:45,351 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:09:45,382 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-10 10:09:45,383 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:45,386 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:45,392 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-10 10:09:45,392 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:45,402 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-10 10:09:45,404 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:45,404 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 4, 4, 4, 4] total 13 [2018-09-10 10:09:45,404 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:45,405 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-10 10:09:45,405 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-10 10:09:45,405 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=105, Unknown=0, NotChecked=0, Total=156 [2018-09-10 10:09:45,405 INFO L87 Difference]: Start difference. First operand 30 states and 31 transitions. Second operand 11 states. [2018-09-10 10:09:45,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:45,722 INFO L93 Difference]: Finished difference Result 50 states and 57 transitions. [2018-09-10 10:09:45,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-10 10:09:45,725 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 29 [2018-09-10 10:09:45,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:45,726 INFO L225 Difference]: With dead ends: 50 [2018-09-10 10:09:45,726 INFO L226 Difference]: Without dead ends: 40 [2018-09-10 10:09:45,727 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 112 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-10 10:09:45,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-09-10 10:09:45,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 36. [2018-09-10 10:09:45,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-09-10 10:09:45,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2018-09-10 10:09:45,734 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 38 transitions. Word has length 29 [2018-09-10 10:09:45,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:45,735 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 38 transitions. [2018-09-10 10:09:45,735 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-10 10:09:45,735 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-09-10 10:09:45,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-09-10 10:09:45,736 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:45,736 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:45,737 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:45,737 INFO L82 PathProgramCache]: Analyzing trace with hash -249977826, now seen corresponding path program 4 times [2018-09-10 10:09:45,737 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:45,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:45,738 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:45,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:45,738 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:45,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:45,943 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:45,944 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:45,944 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:45,952 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:09:45,953 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:09:45,973 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:09:45,974 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:45,976 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:46,029 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-10 10:09:46,030 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:46,508 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-10 10:09:46,529 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:46,529 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:09:46,545 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:09:46,545 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:09:46,574 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:09:46,574 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:09:46,578 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:09:46,611 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-10 10:09:46,612 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:09:46,896 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-10 10:09:46,898 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:09:46,898 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10, 9, 9] total 25 [2018-09-10 10:09:46,898 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:09:46,899 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-10 10:09:46,899 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-10 10:09:46,899 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=201, Invalid=399, Unknown=0, NotChecked=0, Total=600 [2018-09-10 10:09:46,900 INFO L87 Difference]: Start difference. First operand 36 states and 38 transitions. Second operand 11 states. [2018-09-10 10:09:47,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:09:47,050 INFO L93 Difference]: Finished difference Result 52 states and 57 transitions. [2018-09-10 10:09:47,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-10 10:09:47,051 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-09-10 10:09:47,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:09:47,052 INFO L225 Difference]: With dead ends: 52 [2018-09-10 10:09:47,052 INFO L226 Difference]: Without dead ends: 39 [2018-09-10 10:09:47,054 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 123 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=201, Invalid=399, Unknown=0, NotChecked=0, Total=600 [2018-09-10 10:09:47,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-09-10 10:09:47,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-09-10 10:09:47,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-09-10 10:09:47,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 41 transitions. [2018-09-10 10:09:47,060 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 41 transitions. Word has length 35 [2018-09-10 10:09:47,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:09:47,060 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 41 transitions. [2018-09-10 10:09:47,060 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-10 10:09:47,061 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 41 transitions. [2018-09-10 10:09:47,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-09-10 10:09:47,062 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:09:47,062 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:09:47,062 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:09:47,062 INFO L82 PathProgramCache]: Analyzing trace with hash 1580391035, now seen corresponding path program 5 times [2018-09-10 10:09:47,062 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:09:47,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:47,064 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:09:47,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:09:47,064 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:09:47,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:09:47,310 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:09:47,310 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:09:47,311 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:09:47,319 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:09:47,319 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:10:06,141 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-10 10:10:06,141 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:06,288 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:06,571 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-10 10:10:06,571 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:07,215 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-10 10:10:07,236 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:07,236 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:07,251 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:10:07,251 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:10:07,354 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-10 10:10:07,354 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:07,360 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:07,384 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-10 10:10:07,384 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:07,754 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-10 10:10:07,758 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:07,758 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10, 11, 10, 10] total 28 [2018-09-10 10:10:07,758 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:07,759 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-09-10 10:10:07,759 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-09-10 10:10:07,760 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=507, Unknown=0, NotChecked=0, Total=756 [2018-09-10 10:10:07,760 INFO L87 Difference]: Start difference. First operand 39 states and 41 transitions. Second operand 12 states. [2018-09-10 10:10:08,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:08,097 INFO L93 Difference]: Finished difference Result 55 states and 60 transitions. [2018-09-10 10:10:08,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-10 10:10:08,099 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-09-10 10:10:08,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:08,101 INFO L225 Difference]: With dead ends: 55 [2018-09-10 10:10:08,102 INFO L226 Difference]: Without dead ends: 42 [2018-09-10 10:10:08,103 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 133 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=249, Invalid=507, Unknown=0, NotChecked=0, Total=756 [2018-09-10 10:10:08,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-09-10 10:10:08,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-09-10 10:10:08,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-09-10 10:10:08,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 44 transitions. [2018-09-10 10:10:08,108 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 44 transitions. Word has length 38 [2018-09-10 10:10:08,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:08,109 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 44 transitions. [2018-09-10 10:10:08,109 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-09-10 10:10:08,109 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 44 transitions. [2018-09-10 10:10:08,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-09-10 10:10:08,110 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:08,110 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 8, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:08,110 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:08,111 INFO L82 PathProgramCache]: Analyzing trace with hash 1194339070, now seen corresponding path program 6 times [2018-09-10 10:10:08,111 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:08,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:08,112 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:10:08,112 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:08,112 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:08,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:08,416 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:08,417 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:08,417 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:08,429 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:10:08,429 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:10:08,485 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-10 10:10:08,485 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:08,487 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:08,592 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:10:08,593 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:08,699 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:10:08,720 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:08,720 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:08,736 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:10:08,736 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:10:08,854 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-10 10:10:08,854 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:08,857 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:08,865 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:10:08,866 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:08,875 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:10:08,877 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:08,877 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 5, 5, 5, 5] total 19 [2018-09-10 10:10:08,877 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:08,877 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-10 10:10:08,877 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-10 10:10:08,878 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=241, Unknown=0, NotChecked=0, Total=342 [2018-09-10 10:10:08,878 INFO L87 Difference]: Start difference. First operand 42 states and 44 transitions. Second operand 16 states. [2018-09-10 10:10:09,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:09,591 INFO L93 Difference]: Finished difference Result 65 states and 74 transitions. [2018-09-10 10:10:09,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-10 10:10:09,591 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 41 [2018-09-10 10:10:09,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:09,593 INFO L225 Difference]: With dead ends: 65 [2018-09-10 10:10:09,593 INFO L226 Difference]: Without dead ends: 52 [2018-09-10 10:10:09,594 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 159 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=129, Invalid=291, Unknown=0, NotChecked=0, Total=420 [2018-09-10 10:10:09,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-09-10 10:10:09,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 48. [2018-09-10 10:10:09,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-09-10 10:10:09,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 51 transitions. [2018-09-10 10:10:09,600 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 51 transitions. Word has length 41 [2018-09-10 10:10:09,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:09,600 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 51 transitions. [2018-09-10 10:10:09,600 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-10 10:10:09,600 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 51 transitions. [2018-09-10 10:10:09,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-09-10 10:10:09,601 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:09,601 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 9, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:09,602 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:09,602 INFO L82 PathProgramCache]: Analyzing trace with hash -565963040, now seen corresponding path program 7 times [2018-09-10 10:10:09,602 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:09,603 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:09,603 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:10:09,603 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:09,603 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:09,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:10,208 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:10,208 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:10,209 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:10,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:10:10,221 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:10:10,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:10,236 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:10,262 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-10 10:10:10,262 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:10,939 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-10 10:10:10,959 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:10,960 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:10,975 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:10:10,975 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:10:11,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:11,006 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:11,027 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-10 10:10:11,027 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:11,694 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-10 10:10:11,696 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:11,696 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12, 13, 12, 12] total 35 [2018-09-10 10:10:11,697 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:11,697 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-10 10:10:11,697 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-10 10:10:11,698 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=382, Invalid=808, Unknown=0, NotChecked=0, Total=1190 [2018-09-10 10:10:11,698 INFO L87 Difference]: Start difference. First operand 48 states and 51 transitions. Second operand 15 states. [2018-09-10 10:10:11,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:11,921 INFO L93 Difference]: Finished difference Result 67 states and 74 transitions. [2018-09-10 10:10:11,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-10 10:10:11,921 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2018-09-10 10:10:11,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:11,922 INFO L225 Difference]: With dead ends: 67 [2018-09-10 10:10:11,922 INFO L226 Difference]: Without dead ends: 51 [2018-09-10 10:10:11,923 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 165 SyntacticMatches, 4 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=382, Invalid=808, Unknown=0, NotChecked=0, Total=1190 [2018-09-10 10:10:11,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-09-10 10:10:11,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-09-10 10:10:11,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-09-10 10:10:11,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 54 transitions. [2018-09-10 10:10:11,929 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 54 transitions. Word has length 47 [2018-09-10 10:10:11,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:11,929 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 54 transitions. [2018-09-10 10:10:11,930 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-10 10:10:11,930 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 54 transitions. [2018-09-10 10:10:11,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-09-10 10:10:11,930 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:11,931 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 10, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:11,931 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:11,931 INFO L82 PathProgramCache]: Analyzing trace with hash -1227511363, now seen corresponding path program 8 times [2018-09-10 10:10:11,931 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:11,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:11,932 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:10:11,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:11,932 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:11,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:12,390 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:12,390 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:12,390 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:12,398 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:10:12,398 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:10:12,415 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:10:12,415 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:12,416 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:12,444 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:12,445 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:13,208 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:13,228 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:13,228 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:13,244 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:10:13,244 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:10:13,284 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:10:13,284 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:13,289 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:13,326 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:13,327 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:13,370 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:13,372 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:13,372 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-09-10 10:10:13,372 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:13,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-10 10:10:13,373 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-10 10:10:13,373 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-09-10 10:10:13,374 INFO L87 Difference]: Start difference. First operand 51 states and 54 transitions. Second operand 16 states. [2018-09-10 10:10:13,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:13,713 INFO L93 Difference]: Finished difference Result 70 states and 77 transitions. [2018-09-10 10:10:13,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-10 10:10:13,713 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-09-10 10:10:13,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:13,714 INFO L225 Difference]: With dead ends: 70 [2018-09-10 10:10:13,714 INFO L226 Difference]: Without dead ends: 54 [2018-09-10 10:10:13,715 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 184 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-09-10 10:10:13,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-09-10 10:10:13,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-09-10 10:10:13,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-09-10 10:10:13,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 57 transitions. [2018-09-10 10:10:13,721 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 57 transitions. Word has length 50 [2018-09-10 10:10:13,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:13,722 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 57 transitions. [2018-09-10 10:10:13,722 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-10 10:10:13,722 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 57 transitions. [2018-09-10 10:10:13,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-09-10 10:10:13,723 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:13,723 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 11, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:13,723 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:13,723 INFO L82 PathProgramCache]: Analyzing trace with hash 191319488, now seen corresponding path program 9 times [2018-09-10 10:10:13,724 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:13,724 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:13,724 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:10:13,724 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:13,725 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:13,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:14,009 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:14,009 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:14,009 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:14,016 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:10:14,016 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:10:14,032 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-10 10:10:14,032 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:14,033 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:14,192 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-10 10:10:14,192 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:14,348 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-10 10:10:14,368 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:14,368 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:14,383 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:10:14,383 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:10:14,453 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-10 10:10:14,453 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:14,456 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:14,467 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-10 10:10:14,467 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:14,478 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-10 10:10:14,480 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:14,480 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 6, 6, 6, 6] total 25 [2018-09-10 10:10:14,480 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:14,481 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-10 10:10:14,481 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-10 10:10:14,481 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=433, Unknown=0, NotChecked=0, Total=600 [2018-09-10 10:10:14,482 INFO L87 Difference]: Start difference. First operand 54 states and 57 transitions. Second operand 21 states. [2018-09-10 10:10:17,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:17,854 INFO L93 Difference]: Finished difference Result 83 states and 95 transitions. [2018-09-10 10:10:17,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-10 10:10:17,854 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 53 [2018-09-10 10:10:17,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:17,855 INFO L225 Difference]: With dead ends: 83 [2018-09-10 10:10:17,855 INFO L226 Difference]: Without dead ends: 67 [2018-09-10 10:10:17,856 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 234 GetRequests, 206 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=241, Invalid=571, Unknown=0, NotChecked=0, Total=812 [2018-09-10 10:10:17,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-09-10 10:10:17,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 60. [2018-09-10 10:10:17,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-09-10 10:10:17,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 64 transitions. [2018-09-10 10:10:17,862 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 64 transitions. Word has length 53 [2018-09-10 10:10:17,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:17,863 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 64 transitions. [2018-09-10 10:10:17,863 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-10 10:10:17,863 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 64 transitions. [2018-09-10 10:10:17,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-10 10:10:17,864 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:17,864 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 12, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:17,865 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:17,865 INFO L82 PathProgramCache]: Analyzing trace with hash 794925150, now seen corresponding path program 10 times [2018-09-10 10:10:17,865 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:17,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:17,866 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:10:17,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:17,866 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:17,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:18,304 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:18,304 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:18,304 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:18,315 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:10:18,316 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:10:18,335 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:10:18,335 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:18,337 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:18,380 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:10:18,381 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:19,659 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:10:19,679 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:19,680 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:10:19,696 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:10:19,697 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:10:19,734 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:10:19,734 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:10:19,738 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:10:19,758 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:10:19,758 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:10:20,649 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:10:20,651 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:10:20,651 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 15, 16, 15, 15] total 45 [2018-09-10 10:10:20,652 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:10:20,652 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-10 10:10:20,654 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-10 10:10:20,654 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=620, Invalid=1360, Unknown=0, NotChecked=0, Total=1980 [2018-09-10 10:10:20,655 INFO L87 Difference]: Start difference. First operand 60 states and 64 transitions. Second operand 19 states. [2018-09-10 10:10:21,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:10:21,923 INFO L93 Difference]: Finished difference Result 82 states and 91 transitions. [2018-09-10 10:10:21,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-10 10:10:21,923 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2018-09-10 10:10:21,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:10:21,925 INFO L225 Difference]: With dead ends: 82 [2018-09-10 10:10:21,925 INFO L226 Difference]: Without dead ends: 63 [2018-09-10 10:10:21,927 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 254 GetRequests, 207 SyntacticMatches, 4 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=620, Invalid=1360, Unknown=0, NotChecked=0, Total=1980 [2018-09-10 10:10:21,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-09-10 10:10:21,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-09-10 10:10:21,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-09-10 10:10:21,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 67 transitions. [2018-09-10 10:10:21,936 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 67 transitions. Word has length 59 [2018-09-10 10:10:21,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:10:21,936 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 67 transitions. [2018-09-10 10:10:21,936 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-10 10:10:21,937 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 67 transitions. [2018-09-10 10:10:21,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-09-10 10:10:21,937 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:10:21,938 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 13, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:10:21,938 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:10:21,938 INFO L82 PathProgramCache]: Analyzing trace with hash 1464125371, now seen corresponding path program 11 times [2018-09-10 10:10:21,938 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:10:21,939 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:21,939 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:10:21,939 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:10:21,939 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:10:21,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:10:22,321 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:10:22,321 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:10:22,321 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:10:22,329 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:10:22,329 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:12:43,786 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-10 10:12:43,786 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:12:45,743 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:45,795 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 80 proven. 360 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-10 10:12:45,796 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:47,125 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 80 proven. 360 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-10 10:12:47,146 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:47,146 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:12:47,163 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:12:47,163 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:12:47,518 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-10 10:12:47,518 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:12:47,522 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:47,536 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 154 proven. 273 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:12:47,537 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:49,190 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 154 proven. 273 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:12:49,192 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:12:49,192 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 18, 19, 16, 16] total 50 [2018-09-10 10:12:49,192 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:12:49,193 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-10 10:12:49,193 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-10 10:12:49,194 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=718, Invalid=1732, Unknown=0, NotChecked=0, Total=2450 [2018-09-10 10:12:49,194 INFO L87 Difference]: Start difference. First operand 63 states and 67 transitions. Second operand 20 states. [2018-09-10 10:12:50,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:12:50,299 INFO L93 Difference]: Finished difference Result 85 states and 94 transitions. [2018-09-10 10:12:50,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-10 10:12:50,300 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 62 [2018-09-10 10:12:50,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:12:50,301 INFO L225 Difference]: With dead ends: 85 [2018-09-10 10:12:50,301 INFO L226 Difference]: Without dead ends: 66 [2018-09-10 10:12:50,303 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 215 SyntacticMatches, 4 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=718, Invalid=1732, Unknown=0, NotChecked=0, Total=2450 [2018-09-10 10:12:50,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-09-10 10:12:50,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-09-10 10:12:50,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-09-10 10:12:50,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-09-10 10:12:50,309 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 62 [2018-09-10 10:12:50,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:12:50,310 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-09-10 10:12:50,310 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-10 10:12:50,310 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-09-10 10:12:50,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-09-10 10:12:50,311 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:12:50,311 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 14, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:12:50,311 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:12:50,311 INFO L82 PathProgramCache]: Analyzing trace with hash 369721150, now seen corresponding path program 12 times [2018-09-10 10:12:50,312 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:12:50,312 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:12:50,312 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:12:50,312 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:12:50,313 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:12:50,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:12:50,634 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:50,634 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:50,634 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:12:50,643 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:12:50,643 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:12:53,160 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-09-10 10:12:53,160 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:12:53,201 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:53,597 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-10 10:12:53,597 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:53,867 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-10 10:12:53,896 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:53,896 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:12:53,914 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:12:53,914 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:12:54,221 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-09-10 10:12:54,221 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:12:54,226 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:54,233 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-10 10:12:54,233 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:54,305 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-10 10:12:54,306 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:12:54,307 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 7, 7, 7, 7] total 31 [2018-09-10 10:12:54,307 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:12:54,307 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-10 10:12:54,308 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-10 10:12:54,308 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=681, Unknown=0, NotChecked=0, Total=930 [2018-09-10 10:12:54,308 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 26 states. [2018-09-10 10:12:56,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:12:56,224 INFO L93 Difference]: Finished difference Result 95 states and 108 transitions. [2018-09-10 10:12:56,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-10 10:12:56,224 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 65 [2018-09-10 10:12:56,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:12:56,225 INFO L225 Difference]: With dead ends: 95 [2018-09-10 10:12:56,225 INFO L226 Difference]: Without dead ends: 76 [2018-09-10 10:12:56,226 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 287 GetRequests, 253 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=337, Invalid=853, Unknown=0, NotChecked=0, Total=1190 [2018-09-10 10:12:56,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-09-10 10:12:56,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 72. [2018-09-10 10:12:56,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-09-10 10:12:56,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 77 transitions. [2018-09-10 10:12:56,233 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 77 transitions. Word has length 65 [2018-09-10 10:12:56,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:12:56,233 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 77 transitions. [2018-09-10 10:12:56,233 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-10 10:12:56,233 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 77 transitions. [2018-09-10 10:12:56,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-09-10 10:12:56,234 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:12:56,235 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 15, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:12:56,235 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:12:56,235 INFO L82 PathProgramCache]: Analyzing trace with hash -512392800, now seen corresponding path program 13 times [2018-09-10 10:12:56,235 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:12:56,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:12:56,236 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:12:56,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:12:56,236 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:12:56,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:12:56,963 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:12:56,963 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:56,963 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:12:56,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:12:56,970 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:12:56,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:12:56,993 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:57,060 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-10 10:12:57,060 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:12:58,667 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-10 10:12:58,697 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:12:58,697 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:12:58,722 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:12:58,722 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:12:58,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:12:58,766 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:12:58,802 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-10 10:12:58,802 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:13:00,719 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-10 10:13:00,720 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:13:00,720 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 18, 19, 18, 18] total 55 [2018-09-10 10:13:00,720 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:13:00,721 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-09-10 10:13:00,721 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-09-10 10:13:00,722 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=915, Invalid=2055, Unknown=0, NotChecked=0, Total=2970 [2018-09-10 10:13:00,722 INFO L87 Difference]: Start difference. First operand 72 states and 77 transitions. Second operand 23 states. [2018-09-10 10:13:01,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:13:01,425 INFO L93 Difference]: Finished difference Result 97 states and 108 transitions. [2018-09-10 10:13:01,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-10 10:13:01,426 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 71 [2018-09-10 10:13:01,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:13:01,427 INFO L225 Difference]: With dead ends: 97 [2018-09-10 10:13:01,427 INFO L226 Difference]: Without dead ends: 75 [2018-09-10 10:13:01,429 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 306 GetRequests, 249 SyntacticMatches, 4 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=915, Invalid=2055, Unknown=0, NotChecked=0, Total=2970 [2018-09-10 10:13:01,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-09-10 10:13:01,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2018-09-10 10:13:01,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-09-10 10:13:01,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 80 transitions. [2018-09-10 10:13:01,434 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 80 transitions. Word has length 71 [2018-09-10 10:13:01,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:13:01,434 INFO L480 AbstractCegarLoop]: Abstraction has 75 states and 80 transitions. [2018-09-10 10:13:01,434 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-09-10 10:13:01,434 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 80 transitions. [2018-09-10 10:13:01,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-09-10 10:13:01,435 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:13:01,435 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 16, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:13:01,436 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:13:01,436 INFO L82 PathProgramCache]: Analyzing trace with hash 10718589, now seen corresponding path program 14 times [2018-09-10 10:13:01,436 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:13:01,436 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:01,437 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:13:01,437 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:01,437 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:13:01,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:13:03,322 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:13:03,322 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:13:03,322 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:13:03,333 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:13:03,334 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:13:03,353 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:13:03,353 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:13:03,355 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:13:03,369 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:13:03,369 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:13:04,648 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:13:04,670 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:13:04,670 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:13:04,685 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:13:04,685 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:13:04,738 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:13:04,738 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:13:04,742 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:13:04,778 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:13:04,779 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:13:04,824 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:13:04,826 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:13:04,826 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 46 [2018-09-10 10:13:04,826 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:13:04,826 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-10 10:13:04,827 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-10 10:13:04,827 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-09-10 10:13:04,828 INFO L87 Difference]: Start difference. First operand 75 states and 80 transitions. Second operand 24 states. [2018-09-10 10:13:05,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:13:05,536 INFO L93 Difference]: Finished difference Result 100 states and 111 transitions. [2018-09-10 10:13:05,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-10 10:13:05,537 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-09-10 10:13:05,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:13:05,537 INFO L225 Difference]: With dead ends: 100 [2018-09-10 10:13:05,538 INFO L226 Difference]: Without dead ends: 78 [2018-09-10 10:13:05,539 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 319 GetRequests, 272 SyntacticMatches, 3 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-09-10 10:13:05,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-09-10 10:13:05,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-09-10 10:13:05,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-09-10 10:13:05,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 83 transitions. [2018-09-10 10:13:05,544 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 83 transitions. Word has length 74 [2018-09-10 10:13:05,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:13:05,545 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 83 transitions. [2018-09-10 10:13:05,545 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-10 10:13:05,545 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2018-09-10 10:13:05,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-09-10 10:13:05,546 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:13:05,546 INFO L376 BasicCegarLoop]: trace histogram [23, 22, 17, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:13:05,546 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:13:05,546 INFO L82 PathProgramCache]: Analyzing trace with hash 1880758400, now seen corresponding path program 15 times [2018-09-10 10:13:05,547 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:13:05,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:05,547 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:13:05,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:05,548 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:13:05,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:13:06,466 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:13:06,467 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:13:06,467 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:13:06,474 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:13:06,474 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:13:06,504 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-10 10:13:06,504 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:13:06,505 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:13:06,778 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-10 10:13:06,778 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:13:07,079 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-10 10:13:07,100 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:13:07,100 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:13:07,116 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:13:07,116 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:13:07,247 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-10 10:13:07,247 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:13:07,250 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:13:07,258 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-10 10:13:07,258 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:13:07,271 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-10 10:13:07,273 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:13:07,273 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 8, 8, 8, 8] total 37 [2018-09-10 10:13:07,273 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:13:07,273 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-10 10:13:07,274 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-10 10:13:07,274 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=347, Invalid=985, Unknown=0, NotChecked=0, Total=1332 [2018-09-10 10:13:07,274 INFO L87 Difference]: Start difference. First operand 78 states and 83 transitions. Second operand 31 states. [2018-09-10 10:13:14,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:13:14,630 INFO L93 Difference]: Finished difference Result 110 states and 125 transitions. [2018-09-10 10:13:14,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-10 10:13:14,630 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 77 [2018-09-10 10:13:14,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:13:14,631 INFO L225 Difference]: With dead ends: 110 [2018-09-10 10:13:14,631 INFO L226 Difference]: Without dead ends: 88 [2018-09-10 10:13:14,632 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 342 GetRequests, 300 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=477, Invalid=1245, Unknown=0, NotChecked=0, Total=1722 [2018-09-10 10:13:14,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-09-10 10:13:14,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 84. [2018-09-10 10:13:14,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-09-10 10:13:14,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 90 transitions. [2018-09-10 10:13:14,641 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 90 transitions. Word has length 77 [2018-09-10 10:13:14,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:13:14,642 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 90 transitions. [2018-09-10 10:13:14,642 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-10 10:13:14,642 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 90 transitions. [2018-09-10 10:13:14,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-09-10 10:13:14,643 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:13:14,643 INFO L376 BasicCegarLoop]: trace histogram [25, 24, 18, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:13:14,643 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:13:14,644 INFO L82 PathProgramCache]: Analyzing trace with hash -1326089058, now seen corresponding path program 16 times [2018-09-10 10:13:14,644 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:13:14,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:14,644 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:13:14,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:14,644 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:13:14,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:13:15,126 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 48 proven. 828 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:13:15,126 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:13:15,126 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:13:15,140 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:13:15,140 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:13:15,164 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:13:15,164 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:13:15,166 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:13:15,213 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:13:15,213 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:13:16,981 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:13:17,001 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:13:17,001 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:13:17,017 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:13:17,017 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:13:17,071 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:13:17,072 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:13:17,076 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:13:17,094 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:13:17,094 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:13:19,421 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:13:19,422 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:13:19,422 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 21, 22, 21, 21] total 65 [2018-09-10 10:13:19,423 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:13:19,423 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-10 10:13:19,423 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-10 10:13:19,425 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1291, Invalid=2869, Unknown=0, NotChecked=0, Total=4160 [2018-09-10 10:13:19,425 INFO L87 Difference]: Start difference. First operand 84 states and 90 transitions. Second operand 27 states. [2018-09-10 10:13:20,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:13:20,085 INFO L93 Difference]: Finished difference Result 115 states and 129 transitions. [2018-09-10 10:13:20,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-10 10:13:20,085 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 83 [2018-09-10 10:13:20,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:13:20,087 INFO L225 Difference]: With dead ends: 115 [2018-09-10 10:13:20,087 INFO L226 Difference]: Without dead ends: 90 [2018-09-10 10:13:20,089 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 357 GetRequests, 291 SyntacticMatches, 3 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=1291, Invalid=2869, Unknown=0, NotChecked=0, Total=4160 [2018-09-10 10:13:20,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-09-10 10:13:20,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2018-09-10 10:13:20,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-09-10 10:13:20,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 96 transitions. [2018-09-10 10:13:20,096 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 96 transitions. Word has length 83 [2018-09-10 10:13:20,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:13:20,096 INFO L480 AbstractCegarLoop]: Abstraction has 90 states and 96 transitions. [2018-09-10 10:13:20,096 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-10 10:13:20,096 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 96 transitions. [2018-09-10 10:13:20,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-10 10:13:20,097 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:13:20,097 INFO L376 BasicCegarLoop]: trace histogram [27, 26, 20, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:13:20,098 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_acceleration_phases_true_unreach_call__i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:13:20,098 INFO L82 PathProgramCache]: Analyzing trace with hash -502348930, now seen corresponding path program 17 times [2018-09-10 10:13:20,098 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:13:20,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:20,099 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:13:20,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:13:20,099 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:13:20,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:13:20,615 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 52 proven. 975 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:13:20,615 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:13:20,615 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:13:20,624 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:13:20,625 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown