java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-invgen/up_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-3142e50-m [2018-09-10 10:14:26,431 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-10 10:14:26,436 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-10 10:14:26,448 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-10 10:14:26,448 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-10 10:14:26,450 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-10 10:14:26,451 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-10 10:14:26,454 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-10 10:14:26,456 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-10 10:14:26,458 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-10 10:14:26,460 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-10 10:14:26,460 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-10 10:14:26,461 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-10 10:14:26,463 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-10 10:14:26,468 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-10 10:14:26,468 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-10 10:14:26,469 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-10 10:14:26,475 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-10 10:14:26,479 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-10 10:14:26,481 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-10 10:14:26,482 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-10 10:14:26,485 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-10 10:14:26,490 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-10 10:14:26,491 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-10 10:14:26,491 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-10 10:14:26,492 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-10 10:14:26,493 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-10 10:14:26,494 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-10 10:14:26,495 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-10 10:14:26,497 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-10 10:14:26,497 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-10 10:14:26,500 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-09-10 10:14:26,500 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-09-10 10:14:26,500 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-09-10 10:14:26,501 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-09-10 10:14:26,503 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-09-10 10:14:26,503 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-10 10:14:26,528 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-10 10:14:26,529 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-10 10:14:26,530 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-10 10:14:26,530 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-10 10:14:26,531 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-10 10:14:26,531 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-10 10:14:26,531 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-10 10:14:26,531 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-10 10:14:26,531 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-10 10:14:26,532 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-10 10:14:26,532 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-10 10:14:26,533 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-10 10:14:26,533 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-10 10:14:26,534 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-10 10:14:26,534 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-10 10:14:26,534 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-10 10:14:26,534 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-10 10:14:26,534 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-10 10:14:26,534 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-10 10:14:26,535 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-10 10:14:26,535 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-10 10:14:26,535 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-10 10:14:26,535 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-10 10:14:26,536 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-10 10:14:26,536 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-10 10:14:26,536 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-10 10:14:26,536 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-10 10:14:26,536 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-10 10:14:26,537 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-10 10:14:26,537 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-10 10:14:26,537 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-10 10:14:26,537 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-10 10:14:26,537 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-10 10:14:26,600 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-10 10:14:26,615 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-10 10:14:26,620 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-10 10:14:26,622 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-10 10:14:26,622 INFO L276 PluginConnector]: CDTParser initialized [2018-09-10 10:14:26,623 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-invgen/up_true-unreach-call_true-termination.i [2018-09-10 10:14:27,017 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2fc7df047/a4f3dcffe737484682d945a2beb65bf3/FLAGaf3b87488 [2018-09-10 10:14:27,157 INFO L276 CDTParser]: Found 1 translation units. [2018-09-10 10:14:27,158 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-invgen/up_true-unreach-call_true-termination.i [2018-09-10 10:14:27,163 INFO L324 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2fc7df047/a4f3dcffe737484682d945a2beb65bf3/FLAGaf3b87488 [2018-09-10 10:14:27,178 INFO L332 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2fc7df047/a4f3dcffe737484682d945a2beb65bf3 [2018-09-10 10:14:27,189 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-10 10:14:27,192 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-10 10:14:27,193 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-10 10:14:27,194 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-10 10:14:27,200 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-10 10:14:27,201 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,204 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@509d26cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27, skipping insertion in model container [2018-09-10 10:14:27,204 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,393 INFO L180 PRDispatcher]: Starting pre-run dispatcher in SV-COMP mode [2018-09-10 10:14:27,436 INFO L175 PostProcessor]: Settings: Checked method=main [2018-09-10 10:14:27,456 INFO L431 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-10 10:14:27,462 INFO L175 PostProcessor]: Settings: Checked method=main [2018-09-10 10:14:27,478 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27 WrapperNode [2018-09-10 10:14:27,478 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-10 10:14:27,479 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-10 10:14:27,479 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-10 10:14:27,480 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-10 10:14:27,490 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,496 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,503 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-10 10:14:27,503 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-10 10:14:27,504 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-10 10:14:27,504 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-10 10:14:27,515 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,515 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,516 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,516 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,523 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,530 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,531 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (1/1) ... [2018-09-10 10:14:27,537 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-10 10:14:27,538 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-10 10:14:27,538 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-10 10:14:27,538 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-10 10:14:27,540 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-10 10:14:27,613 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-10 10:14:27,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-10 10:14:27,614 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-10 10:14:27,614 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-10 10:14:27,614 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-10 10:14:27,614 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-10 10:14:27,615 INFO L130 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assert [2018-09-10 10:14:27,615 INFO L138 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assert [2018-09-10 10:14:27,997 INFO L353 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-10 10:14:27,998 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 10:14:27 BoogieIcfgContainer [2018-09-10 10:14:27,998 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-10 10:14:27,999 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-10 10:14:28,000 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-10 10:14:28,003 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-10 10:14:28,003 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.09 10:14:27" (1/3) ... [2018-09-10 10:14:28,004 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@168cb1d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 10:14:28, skipping insertion in model container [2018-09-10 10:14:28,004 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 10:14:27" (2/3) ... [2018-09-10 10:14:28,005 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@168cb1d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 10:14:28, skipping insertion in model container [2018-09-10 10:14:28,005 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 10:14:27" (3/3) ... [2018-09-10 10:14:28,006 INFO L112 eAbstractionObserver]: Analyzing ICFG up_true-unreach-call_true-termination.i [2018-09-10 10:14:28,018 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-10 10:14:28,026 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-10 10:14:28,079 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-10 10:14:28,079 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-10 10:14:28,080 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-10 10:14:28,080 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-10 10:14:28,080 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-10 10:14:28,080 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-10 10:14:28,080 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-10 10:14:28,081 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-10 10:14:28,081 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-10 10:14:28,111 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-09-10 10:14:28,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-09-10 10:14:28,122 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:28,123 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:28,124 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:28,130 INFO L82 PathProgramCache]: Analyzing trace with hash -1884544245, now seen corresponding path program 1 times [2018-09-10 10:14:28,139 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:28,192 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:28,193 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:28,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:28,193 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:28,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:28,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:28,260 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:14:28,260 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-10 10:14:28,260 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:14:28,265 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-10 10:14:28,277 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-10 10:14:28,278 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-10 10:14:28,280 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 2 states. [2018-09-10 10:14:28,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:28,301 INFO L93 Difference]: Finished difference Result 37 states and 44 transitions. [2018-09-10 10:14:28,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-10 10:14:28,303 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 13 [2018-09-10 10:14:28,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:28,312 INFO L225 Difference]: With dead ends: 37 [2018-09-10 10:14:28,312 INFO L226 Difference]: Without dead ends: 18 [2018-09-10 10:14:28,316 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-10 10:14:28,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-09-10 10:14:28,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-09-10 10:14:28,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-09-10 10:14:28,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 19 transitions. [2018-09-10 10:14:28,354 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 19 transitions. Word has length 13 [2018-09-10 10:14:28,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:28,354 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 19 transitions. [2018-09-10 10:14:28,354 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-10 10:14:28,355 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2018-09-10 10:14:28,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-09-10 10:14:28,355 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:28,356 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:28,356 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:28,356 INFO L82 PathProgramCache]: Analyzing trace with hash 1969781111, now seen corresponding path program 1 times [2018-09-10 10:14:28,357 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:28,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:28,358 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:28,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:28,358 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:28,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:28,479 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:28,479 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:14:28,480 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-09-10 10:14:28,480 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:14:28,481 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-10 10:14:28,482 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-10 10:14:28,482 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-09-10 10:14:28,482 INFO L87 Difference]: Start difference. First operand 18 states and 19 transitions. Second operand 5 states. [2018-09-10 10:14:28,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:28,613 INFO L93 Difference]: Finished difference Result 33 states and 35 transitions. [2018-09-10 10:14:28,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-10 10:14:28,613 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-09-10 10:14:28,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:28,614 INFO L225 Difference]: With dead ends: 33 [2018-09-10 10:14:28,614 INFO L226 Difference]: Without dead ends: 20 [2018-09-10 10:14:28,616 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-09-10 10:14:28,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-09-10 10:14:28,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-09-10 10:14:28,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-09-10 10:14:28,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 21 transitions. [2018-09-10 10:14:28,621 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 21 transitions. Word has length 14 [2018-09-10 10:14:28,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:28,621 INFO L480 AbstractCegarLoop]: Abstraction has 20 states and 21 transitions. [2018-09-10 10:14:28,621 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-10 10:14:28,621 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2018-09-10 10:14:28,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-09-10 10:14:28,622 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:28,622 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:28,623 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:28,623 INFO L82 PathProgramCache]: Analyzing trace with hash -1960344783, now seen corresponding path program 1 times [2018-09-10 10:14:28,623 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:28,624 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:28,624 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:28,625 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:28,625 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:28,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:28,749 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:28,750 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-10 10:14:28,750 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-09-10 10:14:28,750 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-10 10:14:28,751 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-09-10 10:14:28,751 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-09-10 10:14:28,751 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-09-10 10:14:28,752 INFO L87 Difference]: Start difference. First operand 20 states and 21 transitions. Second operand 6 states. [2018-09-10 10:14:28,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:28,922 INFO L93 Difference]: Finished difference Result 34 states and 36 transitions. [2018-09-10 10:14:28,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-09-10 10:14:28,927 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 16 [2018-09-10 10:14:28,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:28,929 INFO L225 Difference]: With dead ends: 34 [2018-09-10 10:14:28,929 INFO L226 Difference]: Without dead ends: 32 [2018-09-10 10:14:28,930 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-09-10 10:14:28,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-09-10 10:14:28,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 27. [2018-09-10 10:14:28,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-09-10 10:14:28,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2018-09-10 10:14:28,941 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 16 [2018-09-10 10:14:28,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:28,942 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2018-09-10 10:14:28,942 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-09-10 10:14:28,942 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2018-09-10 10:14:28,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-09-10 10:14:28,943 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:28,943 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:28,944 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:28,944 INFO L82 PathProgramCache]: Analyzing trace with hash -1864992939, now seen corresponding path program 1 times [2018-09-10 10:14:28,944 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:28,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:28,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:28,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:28,946 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:28,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:29,241 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:29,242 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:29,242 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:29,253 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:29,253 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:29,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:29,284 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:29,379 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:29,379 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:29,466 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:29,497 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:29,497 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:29,517 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:29,518 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:29,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:29,548 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:29,557 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:29,558 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:29,764 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:29,767 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:29,767 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 9 [2018-09-10 10:14:29,767 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:29,768 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-09-10 10:14:29,768 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-09-10 10:14:29,769 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-09-10 10:14:29,769 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand 9 states. [2018-09-10 10:14:29,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:29,892 INFO L93 Difference]: Finished difference Result 46 states and 49 transitions. [2018-09-10 10:14:29,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-10 10:14:29,893 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 24 [2018-09-10 10:14:29,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:29,895 INFO L225 Difference]: With dead ends: 46 [2018-09-10 10:14:29,896 INFO L226 Difference]: Without dead ends: 29 [2018-09-10 10:14:29,897 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 86 SyntacticMatches, 8 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2018-09-10 10:14:29,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-09-10 10:14:29,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-09-10 10:14:29,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-09-10 10:14:29,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2018-09-10 10:14:29,905 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 30 transitions. Word has length 24 [2018-09-10 10:14:29,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:29,906 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 30 transitions. [2018-09-10 10:14:29,906 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-09-10 10:14:29,906 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 30 transitions. [2018-09-10 10:14:29,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-09-10 10:14:29,907 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:29,907 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:29,908 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:29,908 INFO L82 PathProgramCache]: Analyzing trace with hash -62381937, now seen corresponding path program 2 times [2018-09-10 10:14:29,908 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:29,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:29,909 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:29,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:29,910 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:29,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:30,074 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:30,074 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:30,075 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:30,082 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:30,083 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:30,124 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:30,124 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:30,127 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:30,450 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:30,450 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:30,502 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:30,523 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:30,523 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:30,539 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:30,539 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:30,565 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:30,565 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:30,570 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:30,578 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:30,578 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:30,689 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-10 10:14:30,690 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:30,691 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7, 7, 7] total 10 [2018-09-10 10:14:30,691 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:30,691 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-09-10 10:14:30,692 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-09-10 10:14:30,692 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-09-10 10:14:30,692 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. Second operand 10 states. [2018-09-10 10:14:30,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:30,858 INFO L93 Difference]: Finished difference Result 39 states and 40 transitions. [2018-09-10 10:14:30,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-10 10:14:30,859 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 26 [2018-09-10 10:14:30,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:30,861 INFO L225 Difference]: With dead ends: 39 [2018-09-10 10:14:30,861 INFO L226 Difference]: Without dead ends: 37 [2018-09-10 10:14:30,862 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 95 SyntacticMatches, 10 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2018-09-10 10:14:30,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-09-10 10:14:30,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-09-10 10:14:30,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-09-10 10:14:30,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 38 transitions. [2018-09-10 10:14:30,868 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 38 transitions. Word has length 26 [2018-09-10 10:14:30,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:30,869 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 38 transitions. [2018-09-10 10:14:30,869 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-09-10 10:14:30,869 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 38 transitions. [2018-09-10 10:14:30,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-09-10 10:14:30,870 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:30,870 INFO L376 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:30,872 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:30,872 INFO L82 PathProgramCache]: Analyzing trace with hash 1261098675, now seen corresponding path program 3 times [2018-09-10 10:14:30,872 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:30,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:30,873 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:30,873 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:30,874 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:30,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:31,007 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:31,008 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:31,008 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:31,020 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:31,020 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:31,050 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-10 10:14:31,051 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:31,054 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:31,178 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:31,178 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:31,268 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:31,290 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:31,291 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:31,311 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:31,312 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:31,345 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-10 10:14:31,345 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:31,350 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:31,361 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:31,361 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:31,476 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:31,478 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:31,479 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 12 [2018-09-10 10:14:31,479 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:31,480 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-09-10 10:14:31,480 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-09-10 10:14:31,480 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2018-09-10 10:14:31,481 INFO L87 Difference]: Start difference. First operand 37 states and 38 transitions. Second operand 12 states. [2018-09-10 10:14:31,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:31,654 INFO L93 Difference]: Finished difference Result 60 states and 64 transitions. [2018-09-10 10:14:31,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-10 10:14:31,658 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 34 [2018-09-10 10:14:31,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:31,659 INFO L225 Difference]: With dead ends: 60 [2018-09-10 10:14:31,660 INFO L226 Difference]: Without dead ends: 39 [2018-09-10 10:14:31,660 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 121 SyntacticMatches, 12 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=73, Invalid=167, Unknown=0, NotChecked=0, Total=240 [2018-09-10 10:14:31,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-09-10 10:14:31,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-09-10 10:14:31,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-09-10 10:14:31,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 40 transitions. [2018-09-10 10:14:31,669 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 40 transitions. Word has length 34 [2018-09-10 10:14:31,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:31,669 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 40 transitions. [2018-09-10 10:14:31,669 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-09-10 10:14:31,669 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 40 transitions. [2018-09-10 10:14:31,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-09-10 10:14:31,670 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:31,671 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:31,671 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:31,671 INFO L82 PathProgramCache]: Analyzing trace with hash -1825718419, now seen corresponding path program 4 times [2018-09-10 10:14:31,671 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:31,672 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:31,672 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:31,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:31,673 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:31,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:31,785 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 14 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-10 10:14:31,786 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:31,786 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:31,794 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:31,794 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:31,834 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:31,834 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:31,837 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:32,015 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:32,016 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:32,078 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:32,099 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:32,099 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:32,125 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:32,125 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:32,154 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:32,155 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:32,159 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:32,168 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:32,169 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:32,250 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-10 10:14:32,252 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:32,252 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8, 8, 8] total 11 [2018-09-10 10:14:32,252 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:32,253 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-10 10:14:32,253 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-10 10:14:32,253 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-09-10 10:14:32,254 INFO L87 Difference]: Start difference. First operand 39 states and 40 transitions. Second operand 11 states. [2018-09-10 10:14:32,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:32,406 INFO L93 Difference]: Finished difference Result 49 states and 50 transitions. [2018-09-10 10:14:32,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-10 10:14:32,406 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 36 [2018-09-10 10:14:32,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:32,408 INFO L225 Difference]: With dead ends: 49 [2018-09-10 10:14:32,408 INFO L226 Difference]: Without dead ends: 47 [2018-09-10 10:14:32,408 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 132 SyntacticMatches, 14 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-09-10 10:14:32,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-09-10 10:14:32,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-09-10 10:14:32,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-09-10 10:14:32,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 48 transitions. [2018-09-10 10:14:32,416 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 48 transitions. Word has length 36 [2018-09-10 10:14:32,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:32,417 INFO L480 AbstractCegarLoop]: Abstraction has 47 states and 48 transitions. [2018-09-10 10:14:32,417 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-10 10:14:32,417 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 48 transitions. [2018-09-10 10:14:32,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-09-10 10:14:32,418 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:32,418 INFO L376 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:32,419 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:32,419 INFO L82 PathProgramCache]: Analyzing trace with hash -51726447, now seen corresponding path program 5 times [2018-09-10 10:14:32,419 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:32,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:32,420 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:32,421 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:32,421 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:32,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:32,565 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:32,566 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:32,566 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:32,579 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:32,579 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:32,618 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-09-10 10:14:32,618 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:32,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:32,748 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:32,748 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:32,842 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:32,863 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:32,863 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:32,881 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:32,881 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:32,932 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-09-10 10:14:32,933 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:32,937 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:32,949 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:32,950 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:33,052 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:33,059 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:33,059 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 15 [2018-09-10 10:14:33,059 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:33,060 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-10 10:14:33,060 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-10 10:14:33,061 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2018-09-10 10:14:33,061 INFO L87 Difference]: Start difference. First operand 47 states and 48 transitions. Second operand 15 states. [2018-09-10 10:14:33,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:33,234 INFO L93 Difference]: Finished difference Result 74 states and 79 transitions. [2018-09-10 10:14:33,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-10 10:14:33,235 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 44 [2018-09-10 10:14:33,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:33,236 INFO L225 Difference]: With dead ends: 74 [2018-09-10 10:14:33,236 INFO L226 Difference]: Without dead ends: 49 [2018-09-10 10:14:33,237 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 156 SyntacticMatches, 16 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 144 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=109, Invalid=271, Unknown=0, NotChecked=0, Total=380 [2018-09-10 10:14:33,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-09-10 10:14:33,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-09-10 10:14:33,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-09-10 10:14:33,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 50 transitions. [2018-09-10 10:14:33,245 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 50 transitions. Word has length 44 [2018-09-10 10:14:33,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:33,245 INFO L480 AbstractCegarLoop]: Abstraction has 49 states and 50 transitions. [2018-09-10 10:14:33,245 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-10 10:14:33,245 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 50 transitions. [2018-09-10 10:14:33,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-09-10 10:14:33,247 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:33,247 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:33,247 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:33,247 INFO L82 PathProgramCache]: Analyzing trace with hash 446005195, now seen corresponding path program 6 times [2018-09-10 10:14:33,247 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:33,248 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:33,248 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:33,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:33,249 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:33,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:33,376 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 25 proven. 28 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-09-10 10:14:33,376 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:33,376 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:33,384 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:33,385 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:33,423 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-09-10 10:14:33,424 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:33,426 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:33,486 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:33,486 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:33,694 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:33,714 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:33,715 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:33,730 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:33,730 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:33,779 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-09-10 10:14:33,779 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:33,783 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:33,792 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:33,793 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:33,890 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-10 10:14:33,892 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:33,892 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9, 9, 9] total 12 [2018-09-10 10:14:33,892 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:33,893 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-09-10 10:14:33,893 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-09-10 10:14:33,893 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-09-10 10:14:33,894 INFO L87 Difference]: Start difference. First operand 49 states and 50 transitions. Second operand 12 states. [2018-09-10 10:14:34,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:34,161 INFO L93 Difference]: Finished difference Result 59 states and 60 transitions. [2018-09-10 10:14:34,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-10 10:14:34,162 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 46 [2018-09-10 10:14:34,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:34,164 INFO L225 Difference]: With dead ends: 59 [2018-09-10 10:14:34,164 INFO L226 Difference]: Without dead ends: 57 [2018-09-10 10:14:34,165 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 169 SyntacticMatches, 18 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2018-09-10 10:14:34,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-09-10 10:14:34,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-09-10 10:14:34,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-09-10 10:14:34,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 58 transitions. [2018-09-10 10:14:34,172 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 58 transitions. Word has length 46 [2018-09-10 10:14:34,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:34,173 INFO L480 AbstractCegarLoop]: Abstraction has 57 states and 58 transitions. [2018-09-10 10:14:34,173 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-09-10 10:14:34,173 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 58 transitions. [2018-09-10 10:14:34,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-09-10 10:14:34,174 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:34,174 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:34,175 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:34,175 INFO L82 PathProgramCache]: Analyzing trace with hash -239912465, now seen corresponding path program 7 times [2018-09-10 10:14:34,175 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:34,176 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:34,176 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:34,176 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:34,176 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:34,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:34,399 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:34,400 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:34,400 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:34,408 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:34,408 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:34,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:34,443 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:34,956 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:34,956 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:35,081 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:35,102 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:35,102 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:35,118 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:35,118 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:35,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:35,160 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:35,174 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:35,174 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:35,457 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:35,459 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:35,459 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 18 [2018-09-10 10:14:35,459 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:35,460 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-10 10:14:35,460 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-10 10:14:35,460 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2018-09-10 10:14:35,460 INFO L87 Difference]: Start difference. First operand 57 states and 58 transitions. Second operand 18 states. [2018-09-10 10:14:35,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:35,736 INFO L93 Difference]: Finished difference Result 88 states and 94 transitions. [2018-09-10 10:14:35,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-10 10:14:35,737 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 54 [2018-09-10 10:14:35,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:35,738 INFO L225 Difference]: With dead ends: 88 [2018-09-10 10:14:35,739 INFO L226 Difference]: Without dead ends: 59 [2018-09-10 10:14:35,740 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 233 GetRequests, 191 SyntacticMatches, 20 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 233 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=152, Invalid=400, Unknown=0, NotChecked=0, Total=552 [2018-09-10 10:14:35,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-09-10 10:14:35,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-09-10 10:14:35,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-09-10 10:14:35,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 60 transitions. [2018-09-10 10:14:35,762 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 60 transitions. Word has length 54 [2018-09-10 10:14:35,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:35,763 INFO L480 AbstractCegarLoop]: Abstraction has 59 states and 60 transitions. [2018-09-10 10:14:35,763 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-10 10:14:35,763 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 60 transitions. [2018-09-10 10:14:35,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-09-10 10:14:35,764 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:35,764 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:35,765 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:35,766 INFO L82 PathProgramCache]: Analyzing trace with hash -363560535, now seen corresponding path program 8 times [2018-09-10 10:14:35,766 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:35,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:35,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:35,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:35,767 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:35,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:35,937 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 37 proven. 46 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-10 10:14:35,938 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:35,938 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:35,949 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:35,949 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:35,973 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:35,973 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:35,975 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:36,073 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:36,073 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:36,194 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:36,215 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:36,215 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:36,232 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:36,232 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:36,272 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:36,272 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:36,275 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:36,284 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:36,284 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:36,468 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-10 10:14:36,470 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:36,470 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10, 10, 10] total 13 [2018-09-10 10:14:36,470 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:36,471 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-10 10:14:36,471 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-10 10:14:36,471 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-09-10 10:14:36,471 INFO L87 Difference]: Start difference. First operand 59 states and 60 transitions. Second operand 13 states. [2018-09-10 10:14:36,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:36,595 INFO L93 Difference]: Finished difference Result 69 states and 70 transitions. [2018-09-10 10:14:36,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-10 10:14:36,596 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 56 [2018-09-10 10:14:36,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:36,597 INFO L225 Difference]: With dead ends: 69 [2018-09-10 10:14:36,597 INFO L226 Difference]: Without dead ends: 67 [2018-09-10 10:14:36,598 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 206 SyntacticMatches, 22 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2018-09-10 10:14:36,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-09-10 10:14:36,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2018-09-10 10:14:36,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-09-10 10:14:36,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 68 transitions. [2018-09-10 10:14:36,605 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 68 transitions. Word has length 56 [2018-09-10 10:14:36,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:36,605 INFO L480 AbstractCegarLoop]: Abstraction has 67 states and 68 transitions. [2018-09-10 10:14:36,605 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-10 10:14:36,605 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 68 transitions. [2018-09-10 10:14:36,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-09-10 10:14:36,606 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:36,606 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:36,607 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:36,607 INFO L82 PathProgramCache]: Analyzing trace with hash 1782152653, now seen corresponding path program 9 times [2018-09-10 10:14:36,607 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:36,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:36,608 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:36,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:36,608 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:36,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:36,777 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:36,777 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:36,777 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:36,785 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:36,785 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:36,810 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-10 10:14:36,810 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:36,812 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:37,009 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:37,009 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:37,141 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:37,162 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:37,162 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:37,177 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:37,178 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:37,243 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-10 10:14:37,243 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:37,246 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:37,259 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:37,259 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:37,345 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:37,347 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:37,347 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 21 [2018-09-10 10:14:37,347 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:37,348 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-10 10:14:37,348 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-10 10:14:37,349 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=309, Unknown=0, NotChecked=0, Total=420 [2018-09-10 10:14:37,349 INFO L87 Difference]: Start difference. First operand 67 states and 68 transitions. Second operand 21 states. [2018-09-10 10:14:37,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:37,779 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-09-10 10:14:37,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-10 10:14:37,780 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 64 [2018-09-10 10:14:37,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:37,781 INFO L225 Difference]: With dead ends: 102 [2018-09-10 10:14:37,781 INFO L226 Difference]: Without dead ends: 69 [2018-09-10 10:14:37,782 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 276 GetRequests, 226 SyntacticMatches, 24 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 343 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=202, Invalid=554, Unknown=0, NotChecked=0, Total=756 [2018-09-10 10:14:37,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-09-10 10:14:37,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2018-09-10 10:14:37,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-09-10 10:14:37,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 70 transitions. [2018-09-10 10:14:37,791 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 70 transitions. Word has length 64 [2018-09-10 10:14:37,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:37,791 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 70 transitions. [2018-09-10 10:14:37,791 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-10 10:14:37,791 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 70 transitions. [2018-09-10 10:14:37,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-09-10 10:14:37,792 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:37,793 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:37,793 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:37,793 INFO L82 PathProgramCache]: Analyzing trace with hash 1767367943, now seen corresponding path program 10 times [2018-09-10 10:14:37,793 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:37,794 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:37,794 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:37,794 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:37,794 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:37,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:37,920 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 51 proven. 68 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-10 10:14:37,920 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:37,921 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:37,929 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:37,929 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:37,977 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:37,978 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:37,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:38,150 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:38,150 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:38,219 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:38,240 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:38,241 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:38,259 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:38,260 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:38,312 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:38,312 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:38,316 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:38,325 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:38,325 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:38,411 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-10 10:14:38,413 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:38,413 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11, 11, 11] total 14 [2018-09-10 10:14:38,413 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:38,413 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-10 10:14:38,414 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-10 10:14:38,414 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=134, Unknown=0, NotChecked=0, Total=182 [2018-09-10 10:14:38,414 INFO L87 Difference]: Start difference. First operand 69 states and 70 transitions. Second operand 14 states. [2018-09-10 10:14:38,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:38,647 INFO L93 Difference]: Finished difference Result 79 states and 80 transitions. [2018-09-10 10:14:38,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-10 10:14:38,648 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 66 [2018-09-10 10:14:38,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:38,649 INFO L225 Difference]: With dead ends: 79 [2018-09-10 10:14:38,650 INFO L226 Difference]: Without dead ends: 77 [2018-09-10 10:14:38,650 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 283 GetRequests, 243 SyntacticMatches, 26 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 130 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=179, Unknown=0, NotChecked=0, Total=240 [2018-09-10 10:14:38,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-09-10 10:14:38,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2018-09-10 10:14:38,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-09-10 10:14:38,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 78 transitions. [2018-09-10 10:14:38,658 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 78 transitions. Word has length 66 [2018-09-10 10:14:38,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:38,659 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 78 transitions. [2018-09-10 10:14:38,659 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-10 10:14:38,659 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 78 transitions. [2018-09-10 10:14:38,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-09-10 10:14:38,661 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:38,661 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:38,661 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:38,661 INFO L82 PathProgramCache]: Analyzing trace with hash 508207915, now seen corresponding path program 11 times [2018-09-10 10:14:38,662 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:38,662 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:38,663 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:38,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:38,663 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:38,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:38,839 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:38,840 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:38,840 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:38,848 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:38,848 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:38,872 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-10 10:14:38,872 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:38,874 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:39,082 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:39,083 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:39,180 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:39,200 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:39,201 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:39,215 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:39,216 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:39,300 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-10 10:14:39,300 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:39,305 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:39,319 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:39,320 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:39,605 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:39,607 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:39,608 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 24 [2018-09-10 10:14:39,608 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:39,609 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-10 10:14:39,609 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-10 10:14:39,610 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2018-09-10 10:14:39,610 INFO L87 Difference]: Start difference. First operand 77 states and 78 transitions. Second operand 24 states. [2018-09-10 10:14:40,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:40,059 INFO L93 Difference]: Finished difference Result 116 states and 124 transitions. [2018-09-10 10:14:40,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-10 10:14:40,059 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-09-10 10:14:40,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:40,061 INFO L225 Difference]: With dead ends: 116 [2018-09-10 10:14:40,061 INFO L226 Difference]: Without dead ends: 79 [2018-09-10 10:14:40,063 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 319 GetRequests, 261 SyntacticMatches, 28 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 474 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=259, Invalid=733, Unknown=0, NotChecked=0, Total=992 [2018-09-10 10:14:40,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-09-10 10:14:40,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-09-10 10:14:40,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-09-10 10:14:40,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 80 transitions. [2018-09-10 10:14:40,071 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 80 transitions. Word has length 74 [2018-09-10 10:14:40,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:40,071 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 80 transitions. [2018-09-10 10:14:40,072 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-10 10:14:40,072 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 80 transitions. [2018-09-10 10:14:40,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-09-10 10:14:40,073 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:40,073 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:40,073 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:40,074 INFO L82 PathProgramCache]: Analyzing trace with hash 262457829, now seen corresponding path program 12 times [2018-09-10 10:14:40,074 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:40,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:40,075 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:40,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:40,075 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:40,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:40,204 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 67 proven. 94 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-09-10 10:14:40,204 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:40,204 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:40,211 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:40,212 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:40,238 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-10 10:14:40,238 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:40,241 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:40,313 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:40,313 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:40,419 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:40,440 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:40,440 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:40,455 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:40,456 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:40,552 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-10 10:14:40,552 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:40,556 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:40,570 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:40,570 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:40,762 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-10 10:14:40,763 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:40,763 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12, 12, 12] total 15 [2018-09-10 10:14:40,763 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:40,764 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-10 10:14:40,764 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-10 10:14:40,764 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-09-10 10:14:40,765 INFO L87 Difference]: Start difference. First operand 79 states and 80 transitions. Second operand 15 states. [2018-09-10 10:14:40,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:40,990 INFO L93 Difference]: Finished difference Result 89 states and 90 transitions. [2018-09-10 10:14:40,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-10 10:14:40,991 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 76 [2018-09-10 10:14:40,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:40,992 INFO L225 Difference]: With dead ends: 89 [2018-09-10 10:14:40,993 INFO L226 Difference]: Without dead ends: 87 [2018-09-10 10:14:40,994 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 325 GetRequests, 280 SyntacticMatches, 30 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2018-09-10 10:14:40,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-09-10 10:14:41,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2018-09-10 10:14:41,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-09-10 10:14:41,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 88 transitions. [2018-09-10 10:14:41,001 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 88 transitions. Word has length 76 [2018-09-10 10:14:41,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:41,002 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 88 transitions. [2018-09-10 10:14:41,002 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-10 10:14:41,002 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 88 transitions. [2018-09-10 10:14:41,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-09-10 10:14:41,003 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:41,003 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:41,004 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:41,004 INFO L82 PathProgramCache]: Analyzing trace with hash 1053542921, now seen corresponding path program 13 times [2018-09-10 10:14:41,004 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:41,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:41,005 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:41,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:41,005 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:41,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:41,230 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:41,231 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:41,231 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:41,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:41,254 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:41,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:41,282 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:41,478 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:41,478 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:41,609 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:41,631 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:41,631 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:41,649 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:41,649 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:41,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:41,709 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:41,733 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:41,733 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:41,980 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:41,981 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:41,982 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 27 [2018-09-10 10:14:41,982 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:41,982 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-10 10:14:41,982 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-10 10:14:41,983 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=179, Invalid=523, Unknown=0, NotChecked=0, Total=702 [2018-09-10 10:14:41,983 INFO L87 Difference]: Start difference. First operand 87 states and 88 transitions. Second operand 27 states. [2018-09-10 10:14:42,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:42,285 INFO L93 Difference]: Finished difference Result 130 states and 139 transitions. [2018-09-10 10:14:42,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-10 10:14:42,285 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 84 [2018-09-10 10:14:42,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:42,286 INFO L225 Difference]: With dead ends: 130 [2018-09-10 10:14:42,286 INFO L226 Difference]: Without dead ends: 89 [2018-09-10 10:14:42,287 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 296 SyntacticMatches, 32 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 626 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=323, Invalid=937, Unknown=0, NotChecked=0, Total=1260 [2018-09-10 10:14:42,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-09-10 10:14:42,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2018-09-10 10:14:42,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-09-10 10:14:42,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 90 transitions. [2018-09-10 10:14:42,295 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 90 transitions. Word has length 84 [2018-09-10 10:14:42,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:42,296 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 90 transitions. [2018-09-10 10:14:42,296 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-10 10:14:42,296 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 90 transitions. [2018-09-10 10:14:42,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-09-10 10:14:42,297 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:42,297 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:42,298 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:42,298 INFO L82 PathProgramCache]: Analyzing trace with hash -396865469, now seen corresponding path program 14 times [2018-09-10 10:14:42,298 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:42,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:42,299 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:42,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:42,299 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:42,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:42,497 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 85 proven. 124 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-09-10 10:14:42,497 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:42,497 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:42,506 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:42,506 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:42,533 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:42,533 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:42,535 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:42,674 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:42,674 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:42,760 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:42,780 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:42,780 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:42,797 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:42,797 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:42,861 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:42,861 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:42,866 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:42,876 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:42,876 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:42,986 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-10 10:14:42,988 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:42,988 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13, 13, 13] total 16 [2018-09-10 10:14:42,988 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:42,988 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-10 10:14:42,988 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-10 10:14:42,988 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=173, Unknown=0, NotChecked=0, Total=240 [2018-09-10 10:14:42,989 INFO L87 Difference]: Start difference. First operand 89 states and 90 transitions. Second operand 16 states. [2018-09-10 10:14:43,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:43,351 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2018-09-10 10:14:43,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-10 10:14:43,351 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 86 [2018-09-10 10:14:43,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:43,353 INFO L225 Difference]: With dead ends: 99 [2018-09-10 10:14:43,353 INFO L226 Difference]: Without dead ends: 97 [2018-09-10 10:14:43,354 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 367 GetRequests, 317 SyntacticMatches, 34 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 204 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=80, Invalid=226, Unknown=0, NotChecked=0, Total=306 [2018-09-10 10:14:43,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-09-10 10:14:43,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2018-09-10 10:14:43,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-09-10 10:14:43,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 98 transitions. [2018-09-10 10:14:43,360 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 98 transitions. Word has length 86 [2018-09-10 10:14:43,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:43,360 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 98 transitions. [2018-09-10 10:14:43,360 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-10 10:14:43,360 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 98 transitions. [2018-09-10 10:14:43,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-09-10 10:14:43,362 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:43,362 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:43,362 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:43,362 INFO L82 PathProgramCache]: Analyzing trace with hash -138800537, now seen corresponding path program 15 times [2018-09-10 10:14:43,362 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:43,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:43,363 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:43,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:43,363 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:43,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:43,580 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:43,580 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:43,580 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:43,589 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:43,589 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:43,622 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-10 10:14:43,623 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:43,626 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:44,248 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:44,249 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:44,395 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:44,415 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:44,415 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:44,430 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:44,430 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:44,550 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-10 10:14:44,551 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:44,555 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:44,575 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:44,575 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:44,822 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:44,824 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:44,824 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 30 [2018-09-10 10:14:44,824 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:44,825 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-09-10 10:14:44,825 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-09-10 10:14:44,825 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=651, Unknown=0, NotChecked=0, Total=870 [2018-09-10 10:14:44,826 INFO L87 Difference]: Start difference. First operand 97 states and 98 transitions. Second operand 30 states. [2018-09-10 10:14:45,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:45,314 INFO L93 Difference]: Finished difference Result 144 states and 154 transitions. [2018-09-10 10:14:45,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-10 10:14:45,316 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 94 [2018-09-10 10:14:45,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:45,317 INFO L225 Difference]: With dead ends: 144 [2018-09-10 10:14:45,317 INFO L226 Difference]: Without dead ends: 99 [2018-09-10 10:14:45,318 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 331 SyntacticMatches, 36 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 799 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=394, Invalid=1166, Unknown=0, NotChecked=0, Total=1560 [2018-09-10 10:14:45,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-09-10 10:14:45,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-09-10 10:14:45,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-09-10 10:14:45,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2018-09-10 10:14:45,324 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 100 transitions. Word has length 94 [2018-09-10 10:14:45,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:45,325 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 100 transitions. [2018-09-10 10:14:45,325 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-09-10 10:14:45,325 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 100 transitions. [2018-09-10 10:14:45,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-09-10 10:14:45,326 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:45,326 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:45,326 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:45,326 INFO L82 PathProgramCache]: Analyzing trace with hash -1817733087, now seen corresponding path program 16 times [2018-09-10 10:14:45,326 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:45,327 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:45,327 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:45,327 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:45,328 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:45,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:46,029 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 105 proven. 158 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-09-10 10:14:46,030 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:46,030 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:46,037 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:46,037 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:46,067 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:46,067 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:46,069 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:46,112 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:46,112 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:46,234 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:46,254 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:46,255 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:46,275 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:46,275 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:46,353 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:46,353 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:46,358 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:46,378 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:46,378 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:46,653 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-10 10:14:46,654 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:46,654 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14, 14, 14] total 17 [2018-09-10 10:14:46,654 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:46,655 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-10 10:14:46,655 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-10 10:14:46,655 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2018-09-10 10:14:46,656 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. Second operand 17 states. [2018-09-10 10:14:46,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:46,897 INFO L93 Difference]: Finished difference Result 109 states and 110 transitions. [2018-09-10 10:14:46,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-10 10:14:46,897 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 96 [2018-09-10 10:14:46,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:46,899 INFO L225 Difference]: With dead ends: 109 [2018-09-10 10:14:46,900 INFO L226 Difference]: Without dead ends: 107 [2018-09-10 10:14:46,901 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 409 GetRequests, 354 SyntacticMatches, 38 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2018-09-10 10:14:46,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-09-10 10:14:46,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-09-10 10:14:46,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-09-10 10:14:46,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 108 transitions. [2018-09-10 10:14:46,908 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 108 transitions. Word has length 96 [2018-09-10 10:14:46,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:46,908 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 108 transitions. [2018-09-10 10:14:46,908 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-10 10:14:46,908 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 108 transitions. [2018-09-10 10:14:46,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-09-10 10:14:46,910 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:46,910 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:46,910 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:46,910 INFO L82 PathProgramCache]: Analyzing trace with hash 1915395141, now seen corresponding path program 17 times [2018-09-10 10:14:46,910 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:46,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:46,911 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:46,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:46,912 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:46,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:47,356 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:47,357 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:47,357 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:47,364 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:47,365 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:47,402 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-10 10:14:47,402 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:47,405 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:48,053 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:48,054 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:48,226 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:48,246 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:48,246 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:48,261 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:14:48,261 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:48,409 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-10 10:14:48,409 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:48,414 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:48,434 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:48,435 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:48,607 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:48,609 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:48,609 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 33 [2018-09-10 10:14:48,609 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:48,610 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-09-10 10:14:48,610 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-09-10 10:14:48,610 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=793, Unknown=0, NotChecked=0, Total=1056 [2018-09-10 10:14:48,611 INFO L87 Difference]: Start difference. First operand 107 states and 108 transitions. Second operand 33 states. [2018-09-10 10:14:49,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:49,057 INFO L93 Difference]: Finished difference Result 158 states and 169 transitions. [2018-09-10 10:14:49,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-10 10:14:49,057 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 104 [2018-09-10 10:14:49,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:49,058 INFO L225 Difference]: With dead ends: 158 [2018-09-10 10:14:49,058 INFO L226 Difference]: Without dead ends: 109 [2018-09-10 10:14:49,060 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 448 GetRequests, 366 SyntacticMatches, 40 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 993 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=472, Invalid=1420, Unknown=0, NotChecked=0, Total=1892 [2018-09-10 10:14:49,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-09-10 10:14:49,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 109. [2018-09-10 10:14:49,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-09-10 10:14:49,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 110 transitions. [2018-09-10 10:14:49,067 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 110 transitions. Word has length 104 [2018-09-10 10:14:49,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:49,068 INFO L480 AbstractCegarLoop]: Abstraction has 109 states and 110 transitions. [2018-09-10 10:14:49,068 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-09-10 10:14:49,068 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 110 transitions. [2018-09-10 10:14:49,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-09-10 10:14:49,069 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:49,069 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:49,069 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:49,069 INFO L82 PathProgramCache]: Analyzing trace with hash -924860033, now seen corresponding path program 18 times [2018-09-10 10:14:49,070 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:49,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:49,070 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:49,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:49,070 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:49,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:49,815 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 127 proven. 196 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-09-10 10:14:49,815 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:49,815 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:49,823 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:49,823 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:49,864 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-09-10 10:14:49,865 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:49,868 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:50,017 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:50,017 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:50,292 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:50,312 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:50,312 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:50,328 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:14:50,328 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:14:50,484 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-09-10 10:14:50,485 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:50,490 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:50,507 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:50,507 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:50,751 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-10 10:14:50,753 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:50,753 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15, 15, 15] total 18 [2018-09-10 10:14:50,753 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:50,754 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-10 10:14:50,754 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-10 10:14:50,755 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=216, Unknown=0, NotChecked=0, Total=306 [2018-09-10 10:14:50,755 INFO L87 Difference]: Start difference. First operand 109 states and 110 transitions. Second operand 18 states. [2018-09-10 10:14:50,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:50,935 INFO L93 Difference]: Finished difference Result 119 states and 120 transitions. [2018-09-10 10:14:50,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-10 10:14:50,936 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 106 [2018-09-10 10:14:50,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:50,938 INFO L225 Difference]: With dead ends: 119 [2018-09-10 10:14:50,938 INFO L226 Difference]: Without dead ends: 117 [2018-09-10 10:14:50,938 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 391 SyntacticMatches, 42 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 294 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2018-09-10 10:14:50,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-09-10 10:14:50,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-09-10 10:14:50,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-09-10 10:14:50,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 118 transitions. [2018-09-10 10:14:50,944 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 118 transitions. Word has length 106 [2018-09-10 10:14:50,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:50,945 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 118 transitions. [2018-09-10 10:14:50,945 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-10 10:14:50,945 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 118 transitions. [2018-09-10 10:14:50,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-09-10 10:14:50,946 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:50,946 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 11, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:50,946 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:50,947 INFO L82 PathProgramCache]: Analyzing trace with hash 1447724963, now seen corresponding path program 19 times [2018-09-10 10:14:50,947 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:50,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:50,947 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:50,948 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:50,948 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:50,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:51,248 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:14:51,248 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:51,248 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:51,256 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:51,256 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:51,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:51,292 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:51,954 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:14:51,954 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:52,132 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:14:52,152 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:52,152 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:52,167 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:52,167 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:14:52,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:52,246 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:52,273 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:14:52,273 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:53,059 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:14:53,060 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:53,061 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 36 [2018-09-10 10:14:53,061 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:53,061 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-09-10 10:14:53,062 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-09-10 10:14:53,062 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=311, Invalid=949, Unknown=0, NotChecked=0, Total=1260 [2018-09-10 10:14:53,062 INFO L87 Difference]: Start difference. First operand 117 states and 118 transitions. Second operand 36 states. [2018-09-10 10:14:53,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:53,598 INFO L93 Difference]: Finished difference Result 172 states and 184 transitions. [2018-09-10 10:14:53,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-10 10:14:53,599 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 114 [2018-09-10 10:14:53,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:53,600 INFO L225 Difference]: With dead ends: 172 [2018-09-10 10:14:53,601 INFO L226 Difference]: Without dead ends: 119 [2018-09-10 10:14:53,602 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 491 GetRequests, 401 SyntacticMatches, 44 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1208 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=557, Invalid=1699, Unknown=0, NotChecked=0, Total=2256 [2018-09-10 10:14:53,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-09-10 10:14:53,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-09-10 10:14:53,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-09-10 10:14:53,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 120 transitions. [2018-09-10 10:14:53,609 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 120 transitions. Word has length 114 [2018-09-10 10:14:53,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:53,609 INFO L480 AbstractCegarLoop]: Abstraction has 119 states and 120 transitions. [2018-09-10 10:14:53,609 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-09-10 10:14:53,609 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 120 transitions. [2018-09-10 10:14:53,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-09-10 10:14:53,610 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:53,610 INFO L376 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:53,611 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:53,611 INFO L82 PathProgramCache]: Analyzing trace with hash 1483074653, now seen corresponding path program 20 times [2018-09-10 10:14:53,611 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:53,611 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:53,612 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:14:53,612 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:53,612 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:53,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:53,850 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 151 proven. 238 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-09-10 10:14:53,850 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:53,850 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:53,857 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:53,857 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:53,891 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:53,891 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:53,894 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:54,044 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:14:54,044 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:54,202 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:14:54,224 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:54,224 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:54,239 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:14:54,240 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:14:54,320 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:14:54,321 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:54,326 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:54,344 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:14:54,345 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:54,639 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-10 10:14:54,640 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:54,641 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16, 16, 16] total 19 [2018-09-10 10:14:54,641 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:54,641 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-10 10:14:54,641 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-10 10:14:54,641 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=239, Unknown=0, NotChecked=0, Total=342 [2018-09-10 10:14:54,642 INFO L87 Difference]: Start difference. First operand 119 states and 120 transitions. Second operand 19 states. [2018-09-10 10:14:54,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:54,828 INFO L93 Difference]: Finished difference Result 129 states and 130 transitions. [2018-09-10 10:14:54,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-10 10:14:54,828 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 116 [2018-09-10 10:14:54,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:54,830 INFO L225 Difference]: With dead ends: 129 [2018-09-10 10:14:54,830 INFO L226 Difference]: Without dead ends: 127 [2018-09-10 10:14:54,830 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 493 GetRequests, 428 SyntacticMatches, 46 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 345 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=116, Invalid=304, Unknown=0, NotChecked=0, Total=420 [2018-09-10 10:14:54,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-09-10 10:14:54,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-09-10 10:14:54,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-09-10 10:14:54,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 128 transitions. [2018-09-10 10:14:54,836 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 128 transitions. Word has length 116 [2018-09-10 10:14:54,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:54,836 INFO L480 AbstractCegarLoop]: Abstraction has 127 states and 128 transitions. [2018-09-10 10:14:54,836 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-10 10:14:54,836 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 128 transitions. [2018-09-10 10:14:54,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-09-10 10:14:54,837 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:54,837 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:54,837 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:54,838 INFO L82 PathProgramCache]: Analyzing trace with hash -849415039, now seen corresponding path program 21 times [2018-09-10 10:14:54,838 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:54,838 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:54,838 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:54,838 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:54,839 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:54,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:55,464 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:55,464 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:55,464 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:55,472 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:55,472 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:55,527 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-09-10 10:14:55,527 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:55,531 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:56,605 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:56,605 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:56,818 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:56,839 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:56,839 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:56,855 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:14:56,856 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:14:57,112 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-09-10 10:14:57,113 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:57,120 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:57,148 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:57,149 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:57,440 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:57,441 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:57,441 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 39 [2018-09-10 10:14:57,442 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:57,442 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-09-10 10:14:57,442 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-09-10 10:14:57,443 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=363, Invalid=1119, Unknown=0, NotChecked=0, Total=1482 [2018-09-10 10:14:57,443 INFO L87 Difference]: Start difference. First operand 127 states and 128 transitions. Second operand 39 states. [2018-09-10 10:14:58,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:58,169 INFO L93 Difference]: Finished difference Result 186 states and 199 transitions. [2018-09-10 10:14:58,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-10 10:14:58,175 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 124 [2018-09-10 10:14:58,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:58,177 INFO L225 Difference]: With dead ends: 186 [2018-09-10 10:14:58,177 INFO L226 Difference]: Without dead ends: 129 [2018-09-10 10:14:58,178 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 534 GetRequests, 436 SyntacticMatches, 48 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1444 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=649, Invalid=2003, Unknown=0, NotChecked=0, Total=2652 [2018-09-10 10:14:58,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-09-10 10:14:58,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2018-09-10 10:14:58,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-09-10 10:14:58,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 130 transitions. [2018-09-10 10:14:58,187 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 130 transitions. Word has length 124 [2018-09-10 10:14:58,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:58,187 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 130 transitions. [2018-09-10 10:14:58,187 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-09-10 10:14:58,187 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 130 transitions. [2018-09-10 10:14:58,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-09-10 10:14:58,188 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:58,188 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:58,188 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:58,189 INFO L82 PathProgramCache]: Analyzing trace with hash -1380501317, now seen corresponding path program 22 times [2018-09-10 10:14:58,189 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:58,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:58,191 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:58,191 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:58,192 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:58,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:14:58,477 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 177 proven. 284 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-09-10 10:14:58,478 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:58,478 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:14:58,486 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:58,486 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:58,524 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:58,525 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:58,527 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:58,581 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 178 proven. 253 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:58,582 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:58,846 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 178 proven. 253 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:58,866 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:14:58,867 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:14:58,883 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:14:58,883 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:14:58,987 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:14:58,987 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:14:58,993 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:14:59,021 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 178 proven. 253 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:59,022 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:14:59,270 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 178 proven. 253 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-10 10:14:59,272 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:14:59,272 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17, 17, 17] total 20 [2018-09-10 10:14:59,273 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:14:59,273 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-10 10:14:59,273 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-10 10:14:59,273 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=263, Unknown=0, NotChecked=0, Total=380 [2018-09-10 10:14:59,274 INFO L87 Difference]: Start difference. First operand 129 states and 130 transitions. Second operand 20 states. [2018-09-10 10:14:59,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:14:59,492 INFO L93 Difference]: Finished difference Result 139 states and 140 transitions. [2018-09-10 10:14:59,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-10 10:14:59,493 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 126 [2018-09-10 10:14:59,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:14:59,495 INFO L225 Difference]: With dead ends: 139 [2018-09-10 10:14:59,495 INFO L226 Difference]: Without dead ends: 137 [2018-09-10 10:14:59,496 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 535 GetRequests, 465 SyntacticMatches, 50 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 400 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=130, Invalid=332, Unknown=0, NotChecked=0, Total=462 [2018-09-10 10:14:59,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-09-10 10:14:59,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-09-10 10:14:59,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-09-10 10:14:59,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 138 transitions. [2018-09-10 10:14:59,503 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 138 transitions. Word has length 126 [2018-09-10 10:14:59,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:14:59,503 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 138 transitions. [2018-09-10 10:14:59,503 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-10 10:14:59,503 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 138 transitions. [2018-09-10 10:14:59,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-09-10 10:14:59,504 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:14:59,504 INFO L376 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 13, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:14:59,505 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:14:59,505 INFO L82 PathProgramCache]: Analyzing trace with hash 63242975, now seen corresponding path program 23 times [2018-09-10 10:14:59,505 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:14:59,505 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:59,506 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:14:59,506 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:14:59,506 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:14:59,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:00,088 INFO L134 CoverageAnalysis]: Checked inductivity of 744 backedges. 324 proven. 156 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:00,089 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:00,089 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:00,096 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:00,096 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:00,143 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2018-09-10 10:15:00,143 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:00,145 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:00,895 INFO L134 CoverageAnalysis]: Checked inductivity of 744 backedges. 324 proven. 156 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:00,895 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:01,175 INFO L134 CoverageAnalysis]: Checked inductivity of 744 backedges. 324 proven. 156 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:01,196 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:01,196 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:01,211 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:01,212 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:01,443 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2018-09-10 10:15:01,443 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:01,448 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:01,478 INFO L134 CoverageAnalysis]: Checked inductivity of 744 backedges. 324 proven. 156 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:01,479 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:01,804 INFO L134 CoverageAnalysis]: Checked inductivity of 744 backedges. 324 proven. 156 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:01,805 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:01,806 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 42 [2018-09-10 10:15:01,806 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:01,807 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-09-10 10:15:01,807 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-09-10 10:15:01,808 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=419, Invalid=1303, Unknown=0, NotChecked=0, Total=1722 [2018-09-10 10:15:01,808 INFO L87 Difference]: Start difference. First operand 137 states and 138 transitions. Second operand 42 states. [2018-09-10 10:15:02,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:02,425 INFO L93 Difference]: Finished difference Result 200 states and 214 transitions. [2018-09-10 10:15:02,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-10 10:15:02,425 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 134 [2018-09-10 10:15:02,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:02,426 INFO L225 Difference]: With dead ends: 200 [2018-09-10 10:15:02,426 INFO L226 Difference]: Without dead ends: 139 [2018-09-10 10:15:02,428 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 577 GetRequests, 471 SyntacticMatches, 52 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1701 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=748, Invalid=2332, Unknown=0, NotChecked=0, Total=3080 [2018-09-10 10:15:02,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-09-10 10:15:02,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-09-10 10:15:02,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-09-10 10:15:02,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 140 transitions. [2018-09-10 10:15:02,436 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 140 transitions. Word has length 134 [2018-09-10 10:15:02,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:02,437 INFO L480 AbstractCegarLoop]: Abstraction has 139 states and 140 transitions. [2018-09-10 10:15:02,437 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-09-10 10:15:02,437 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 140 transitions. [2018-09-10 10:15:02,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-09-10 10:15:02,438 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:02,438 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:02,438 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:02,439 INFO L82 PathProgramCache]: Analyzing trace with hash -781662567, now seen corresponding path program 24 times [2018-09-10 10:15:02,439 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:02,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:02,439 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:02,440 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:02,440 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:02,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:02,662 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 205 proven. 334 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2018-09-10 10:15:02,663 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:02,663 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:02,671 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:02,672 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:02,726 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-09-10 10:15:02,726 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:02,729 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:02,819 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 206 proven. 300 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:02,819 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:03,098 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 206 proven. 300 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:03,119 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:03,119 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:03,135 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:03,135 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:03,407 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-09-10 10:15:03,408 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:03,414 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:03,434 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 206 proven. 300 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:03,434 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:03,630 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 206 proven. 300 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-10 10:15:03,632 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:03,632 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 18, 18, 18, 18] total 21 [2018-09-10 10:15:03,632 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:03,633 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-10 10:15:03,633 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-10 10:15:03,633 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=132, Invalid=288, Unknown=0, NotChecked=0, Total=420 [2018-09-10 10:15:03,634 INFO L87 Difference]: Start difference. First operand 139 states and 140 transitions. Second operand 21 states. [2018-09-10 10:15:04,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:04,135 INFO L93 Difference]: Finished difference Result 149 states and 150 transitions. [2018-09-10 10:15:04,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-10 10:15:04,136 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 136 [2018-09-10 10:15:04,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:04,138 INFO L225 Difference]: With dead ends: 149 [2018-09-10 10:15:04,138 INFO L226 Difference]: Without dead ends: 147 [2018-09-10 10:15:04,138 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 577 GetRequests, 502 SyntacticMatches, 54 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 459 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=145, Invalid=361, Unknown=0, NotChecked=0, Total=506 [2018-09-10 10:15:04,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-09-10 10:15:04,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-09-10 10:15:04,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-09-10 10:15:04,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 148 transitions. [2018-09-10 10:15:04,146 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 148 transitions. Word has length 136 [2018-09-10 10:15:04,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:04,146 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 148 transitions. [2018-09-10 10:15:04,146 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-10 10:15:04,146 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 148 transitions. [2018-09-10 10:15:04,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-09-10 10:15:04,147 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:04,148 INFO L376 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 14, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:04,148 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:04,148 INFO L82 PathProgramCache]: Analyzing trace with hash 720491197, now seen corresponding path program 25 times [2018-09-10 10:15:04,148 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:04,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:04,149 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:04,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:04,149 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:04,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:04,983 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 377 proven. 182 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:04,983 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:04,983 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:04,991 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:04,991 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:05,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:05,035 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:05,712 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 377 proven. 182 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:05,712 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:06,037 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 377 proven. 182 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:06,057 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:06,057 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:06,073 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:06,073 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:06,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:06,170 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:06,196 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 377 proven. 182 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:06,196 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:06,489 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 377 proven. 182 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:06,490 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:06,491 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 45 [2018-09-10 10:15:06,491 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:06,491 INFO L459 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-09-10 10:15:06,491 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-09-10 10:15:06,492 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=479, Invalid=1501, Unknown=0, NotChecked=0, Total=1980 [2018-09-10 10:15:06,492 INFO L87 Difference]: Start difference. First operand 147 states and 148 transitions. Second operand 45 states. [2018-09-10 10:15:08,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:08,288 INFO L93 Difference]: Finished difference Result 214 states and 229 transitions. [2018-09-10 10:15:08,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-09-10 10:15:08,288 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 144 [2018-09-10 10:15:08,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:08,289 INFO L225 Difference]: With dead ends: 214 [2018-09-10 10:15:08,289 INFO L226 Difference]: Without dead ends: 149 [2018-09-10 10:15:08,291 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 620 GetRequests, 506 SyntacticMatches, 56 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1979 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=854, Invalid=2686, Unknown=0, NotChecked=0, Total=3540 [2018-09-10 10:15:08,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-09-10 10:15:08,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-09-10 10:15:08,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-09-10 10:15:08,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 150 transitions. [2018-09-10 10:15:08,299 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 150 transitions. Word has length 144 [2018-09-10 10:15:08,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:08,299 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 150 transitions. [2018-09-10 10:15:08,299 INFO L481 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-09-10 10:15:08,300 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 150 transitions. [2018-09-10 10:15:08,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-09-10 10:15:08,300 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:08,300 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 14, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:08,301 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:08,301 INFO L82 PathProgramCache]: Analyzing trace with hash -349719049, now seen corresponding path program 26 times [2018-09-10 10:15:08,301 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:08,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:08,302 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:08,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:08,302 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:08,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:08,654 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 235 proven. 388 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-09-10 10:15:08,654 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:08,655 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:08,663 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:08,663 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:08,705 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:08,706 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:08,708 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:08,802 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 236 proven. 351 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:08,803 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:09,010 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 236 proven. 351 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:09,029 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:09,030 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:09,044 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:09,045 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:09,155 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:09,155 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:09,164 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:09,192 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 236 proven. 351 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:09,192 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:09,719 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 236 proven. 351 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-10 10:15:09,720 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:09,720 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19, 19, 19] total 22 [2018-09-10 10:15:09,720 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:09,721 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-10 10:15:09,721 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-10 10:15:09,721 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=314, Unknown=0, NotChecked=0, Total=462 [2018-09-10 10:15:09,721 INFO L87 Difference]: Start difference. First operand 149 states and 150 transitions. Second operand 22 states. [2018-09-10 10:15:10,634 WARN L175 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 9 DAG size of output: 7 [2018-09-10 10:15:10,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:10,717 INFO L93 Difference]: Finished difference Result 159 states and 160 transitions. [2018-09-10 10:15:10,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-10 10:15:10,717 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 146 [2018-09-10 10:15:10,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:10,719 INFO L225 Difference]: With dead ends: 159 [2018-09-10 10:15:10,719 INFO L226 Difference]: Without dead ends: 157 [2018-09-10 10:15:10,719 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 619 GetRequests, 539 SyntacticMatches, 58 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 522 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=161, Invalid=391, Unknown=0, NotChecked=0, Total=552 [2018-09-10 10:15:10,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-09-10 10:15:10,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 157. [2018-09-10 10:15:10,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-09-10 10:15:10,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 158 transitions. [2018-09-10 10:15:10,733 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 158 transitions. Word has length 146 [2018-09-10 10:15:10,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:10,733 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 158 transitions. [2018-09-10 10:15:10,733 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-10 10:15:10,733 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 158 transitions. [2018-09-10 10:15:10,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-09-10 10:15:10,734 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:10,735 INFO L376 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:10,735 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:10,735 INFO L82 PathProgramCache]: Analyzing trace with hash -76381157, now seen corresponding path program 27 times [2018-09-10 10:15:10,735 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:10,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:10,736 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:10,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:10,736 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:10,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:11,647 INFO L134 CoverageAnalysis]: Checked inductivity of 1008 backedges. 434 proven. 210 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:11,647 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:11,647 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:11,661 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:11,661 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:11,725 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2018-09-10 10:15:11,725 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:11,729 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:12,191 INFO L134 CoverageAnalysis]: Checked inductivity of 1008 backedges. 434 proven. 210 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:12,192 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:12,655 INFO L134 CoverageAnalysis]: Checked inductivity of 1008 backedges. 434 proven. 210 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:12,676 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:12,676 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:12,691 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:12,691 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:12,960 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2018-09-10 10:15:12,960 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:12,966 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:12,998 INFO L134 CoverageAnalysis]: Checked inductivity of 1008 backedges. 434 proven. 210 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:12,998 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:13,333 INFO L134 CoverageAnalysis]: Checked inductivity of 1008 backedges. 434 proven. 210 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:13,334 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:13,335 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 48 [2018-09-10 10:15:13,335 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:13,335 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-09-10 10:15:13,335 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-09-10 10:15:13,336 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=543, Invalid=1713, Unknown=0, NotChecked=0, Total=2256 [2018-09-10 10:15:13,336 INFO L87 Difference]: Start difference. First operand 157 states and 158 transitions. Second operand 48 states. [2018-09-10 10:15:14,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:14,112 INFO L93 Difference]: Finished difference Result 228 states and 244 transitions. [2018-09-10 10:15:14,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-09-10 10:15:14,113 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 154 [2018-09-10 10:15:14,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:14,114 INFO L225 Difference]: With dead ends: 228 [2018-09-10 10:15:14,114 INFO L226 Difference]: Without dead ends: 159 [2018-09-10 10:15:14,116 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 663 GetRequests, 541 SyntacticMatches, 60 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2278 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=967, Invalid=3065, Unknown=0, NotChecked=0, Total=4032 [2018-09-10 10:15:14,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-09-10 10:15:14,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-09-10 10:15:14,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-09-10 10:15:14,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 160 transitions. [2018-09-10 10:15:14,125 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 160 transitions. Word has length 154 [2018-09-10 10:15:14,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:14,125 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 160 transitions. [2018-09-10 10:15:14,125 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-09-10 10:15:14,126 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 160 transitions. [2018-09-10 10:15:14,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2018-09-10 10:15:14,126 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:14,127 INFO L376 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 15, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:14,127 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:14,127 INFO L82 PathProgramCache]: Analyzing trace with hash 1136207573, now seen corresponding path program 28 times [2018-09-10 10:15:14,127 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:14,128 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:14,128 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:14,128 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:14,128 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:14,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:15,206 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 267 proven. 446 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2018-09-10 10:15:15,206 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:15,206 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:15,213 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:15,213 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:15,261 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:15,261 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:15,263 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:15,318 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 268 proven. 406 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:15,318 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:15,946 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 268 proven. 406 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:15,966 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:15,966 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:15,981 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:15,981 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:16,103 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:16,103 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:16,110 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:16,129 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 268 proven. 406 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:16,129 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:16,373 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 268 proven. 406 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-10 10:15:16,374 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:16,374 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20, 20, 20, 20] total 23 [2018-09-10 10:15:16,375 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:16,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-09-10 10:15:16,375 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-09-10 10:15:16,375 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=341, Unknown=0, NotChecked=0, Total=506 [2018-09-10 10:15:16,376 INFO L87 Difference]: Start difference. First operand 159 states and 160 transitions. Second operand 23 states. [2018-09-10 10:15:16,990 WARN L175 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 9 DAG size of output: 7 [2018-09-10 10:15:16,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:16,997 INFO L93 Difference]: Finished difference Result 169 states and 170 transitions. [2018-09-10 10:15:16,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-10 10:15:16,997 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 156 [2018-09-10 10:15:16,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:16,998 INFO L225 Difference]: With dead ends: 169 [2018-09-10 10:15:16,998 INFO L226 Difference]: Without dead ends: 167 [2018-09-10 10:15:16,999 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 661 GetRequests, 576 SyntacticMatches, 62 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 589 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=178, Invalid=422, Unknown=0, NotChecked=0, Total=600 [2018-09-10 10:15:16,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-09-10 10:15:17,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 167. [2018-09-10 10:15:17,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-09-10 10:15:17,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 168 transitions. [2018-09-10 10:15:17,012 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 168 transitions. Word has length 156 [2018-09-10 10:15:17,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:17,012 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 168 transitions. [2018-09-10 10:15:17,012 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-09-10 10:15:17,012 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 168 transitions. [2018-09-10 10:15:17,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-09-10 10:15:17,013 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:17,015 INFO L376 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:17,015 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:17,015 INFO L82 PathProgramCache]: Analyzing trace with hash -1226033415, now seen corresponding path program 29 times [2018-09-10 10:15:17,015 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:17,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:17,016 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:17,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:17,017 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:17,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:17,492 INFO L134 CoverageAnalysis]: Checked inductivity of 1155 backedges. 495 proven. 240 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:15:17,492 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:17,492 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:17,499 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:17,499 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:17,561 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2018-09-10 10:15:17,561 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:17,565 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:18,104 INFO L134 CoverageAnalysis]: Checked inductivity of 1155 backedges. 495 proven. 240 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:15:18,104 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:18,463 INFO L134 CoverageAnalysis]: Checked inductivity of 1155 backedges. 495 proven. 240 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:15:18,493 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:18,493 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:18,524 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:18,525 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:18,849 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2018-09-10 10:15:18,849 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:18,855 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:18,898 INFO L134 CoverageAnalysis]: Checked inductivity of 1155 backedges. 495 proven. 240 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:15:18,898 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:19,287 INFO L134 CoverageAnalysis]: Checked inductivity of 1155 backedges. 495 proven. 240 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:15:19,289 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:19,289 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 51 [2018-09-10 10:15:19,289 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:19,290 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-09-10 10:15:19,290 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-09-10 10:15:19,291 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=611, Invalid=1939, Unknown=0, NotChecked=0, Total=2550 [2018-09-10 10:15:19,291 INFO L87 Difference]: Start difference. First operand 167 states and 168 transitions. Second operand 51 states. [2018-09-10 10:15:20,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:20,423 INFO L93 Difference]: Finished difference Result 242 states and 259 transitions. [2018-09-10 10:15:20,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-09-10 10:15:20,423 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 164 [2018-09-10 10:15:20,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:20,424 INFO L225 Difference]: With dead ends: 242 [2018-09-10 10:15:20,424 INFO L226 Difference]: Without dead ends: 169 [2018-09-10 10:15:20,429 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 706 GetRequests, 576 SyntacticMatches, 64 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2598 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1087, Invalid=3469, Unknown=0, NotChecked=0, Total=4556 [2018-09-10 10:15:20,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-09-10 10:15:20,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2018-09-10 10:15:20,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-09-10 10:15:20,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 170 transitions. [2018-09-10 10:15:20,441 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 170 transitions. Word has length 164 [2018-09-10 10:15:20,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:20,441 INFO L480 AbstractCegarLoop]: Abstraction has 169 states and 170 transitions. [2018-09-10 10:15:20,441 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-09-10 10:15:20,441 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 170 transitions. [2018-09-10 10:15:20,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-09-10 10:15:20,442 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:20,442 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 16, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:20,444 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:20,445 INFO L82 PathProgramCache]: Analyzing trace with hash -956679885, now seen corresponding path program 30 times [2018-09-10 10:15:20,445 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:20,446 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:20,446 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:20,446 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:20,446 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:20,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:20,952 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 301 proven. 508 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-09-10 10:15:20,952 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:20,952 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:20,960 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:20,960 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:21,019 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2018-09-10 10:15:21,019 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:21,023 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:21,102 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 302 proven. 465 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:15:21,102 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:21,387 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 302 proven. 465 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:15:21,408 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:21,408 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:21,424 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:21,424 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:21,736 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2018-09-10 10:15:21,736 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:21,742 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:21,772 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 302 proven. 465 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:15:21,772 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:22,548 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 302 proven. 465 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-10 10:15:22,549 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:22,549 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21, 21, 21] total 24 [2018-09-10 10:15:22,550 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:22,550 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-10 10:15:22,551 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-10 10:15:22,551 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=369, Unknown=0, NotChecked=0, Total=552 [2018-09-10 10:15:22,551 INFO L87 Difference]: Start difference. First operand 169 states and 170 transitions. Second operand 24 states. [2018-09-10 10:15:22,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:22,790 INFO L93 Difference]: Finished difference Result 179 states and 180 transitions. [2018-09-10 10:15:22,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-10 10:15:22,791 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 166 [2018-09-10 10:15:22,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:22,793 INFO L225 Difference]: With dead ends: 179 [2018-09-10 10:15:22,793 INFO L226 Difference]: Without dead ends: 177 [2018-09-10 10:15:22,793 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 703 GetRequests, 613 SyntacticMatches, 66 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 660 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=196, Invalid=454, Unknown=0, NotChecked=0, Total=650 [2018-09-10 10:15:22,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-09-10 10:15:22,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2018-09-10 10:15:22,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-09-10 10:15:22,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 178 transitions. [2018-09-10 10:15:22,802 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 178 transitions. Word has length 166 [2018-09-10 10:15:22,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:22,803 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 178 transitions. [2018-09-10 10:15:22,803 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-10 10:15:22,803 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 178 transitions. [2018-09-10 10:15:22,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2018-09-10 10:15:22,804 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:22,804 INFO L376 BasicCegarLoop]: trace histogram [17, 17, 17, 17, 17, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:22,804 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:22,805 INFO L82 PathProgramCache]: Analyzing trace with hash -1441002665, now seen corresponding path program 31 times [2018-09-10 10:15:22,805 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:22,805 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:22,806 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:22,806 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:22,806 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:22,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:23,629 INFO L134 CoverageAnalysis]: Checked inductivity of 1312 backedges. 560 proven. 272 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:15:23,629 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:23,629 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:23,637 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:23,637 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:23,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:23,691 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:24,264 INFO L134 CoverageAnalysis]: Checked inductivity of 1312 backedges. 560 proven. 272 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:15:24,264 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:24,679 INFO L134 CoverageAnalysis]: Checked inductivity of 1312 backedges. 560 proven. 272 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:15:24,698 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:24,699 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:24,731 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:24,731 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:24,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:24,845 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:24,890 INFO L134 CoverageAnalysis]: Checked inductivity of 1312 backedges. 560 proven. 272 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:15:24,891 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:25,485 INFO L134 CoverageAnalysis]: Checked inductivity of 1312 backedges. 560 proven. 272 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:15:25,487 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:25,487 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 54 [2018-09-10 10:15:25,487 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:25,487 INFO L459 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-09-10 10:15:25,488 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-09-10 10:15:25,488 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=683, Invalid=2179, Unknown=0, NotChecked=0, Total=2862 [2018-09-10 10:15:25,489 INFO L87 Difference]: Start difference. First operand 177 states and 178 transitions. Second operand 54 states. [2018-09-10 10:15:26,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:26,681 INFO L93 Difference]: Finished difference Result 256 states and 274 transitions. [2018-09-10 10:15:26,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-09-10 10:15:26,682 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 174 [2018-09-10 10:15:26,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:26,683 INFO L225 Difference]: With dead ends: 256 [2018-09-10 10:15:26,683 INFO L226 Difference]: Without dead ends: 179 [2018-09-10 10:15:26,685 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 749 GetRequests, 611 SyntacticMatches, 68 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2939 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1214, Invalid=3898, Unknown=0, NotChecked=0, Total=5112 [2018-09-10 10:15:26,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-09-10 10:15:26,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2018-09-10 10:15:26,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-09-10 10:15:26,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 180 transitions. [2018-09-10 10:15:26,695 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 180 transitions. Word has length 174 [2018-09-10 10:15:26,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:26,695 INFO L480 AbstractCegarLoop]: Abstraction has 179 states and 180 transitions. [2018-09-10 10:15:26,695 INFO L481 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-09-10 10:15:26,695 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 180 transitions. [2018-09-10 10:15:26,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-09-10 10:15:26,696 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:26,697 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 17, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:26,697 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:26,697 INFO L82 PathProgramCache]: Analyzing trace with hash 98569489, now seen corresponding path program 32 times [2018-09-10 10:15:26,697 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:26,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:26,698 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:26,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:26,698 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:26,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:27,049 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 337 proven. 574 refuted. 0 times theorem prover too weak. 435 trivial. 0 not checked. [2018-09-10 10:15:27,049 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:27,049 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:27,057 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:27,057 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:27,105 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:27,105 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:27,108 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:27,174 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 338 proven. 528 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:15:27,174 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:27,510 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 338 proven. 528 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:15:27,530 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:27,530 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:27,545 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:27,545 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:27,665 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:27,665 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:27,672 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:27,695 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 338 proven. 528 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:15:27,695 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:27,999 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 338 proven. 528 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-10 10:15:28,001 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:28,001 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22, 22, 22, 22] total 25 [2018-09-10 10:15:28,001 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:28,002 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-10 10:15:28,002 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-10 10:15:28,002 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=398, Unknown=0, NotChecked=0, Total=600 [2018-09-10 10:15:28,002 INFO L87 Difference]: Start difference. First operand 179 states and 180 transitions. Second operand 25 states. [2018-09-10 10:15:28,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:28,799 INFO L93 Difference]: Finished difference Result 189 states and 190 transitions. [2018-09-10 10:15:28,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-10 10:15:28,799 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 176 [2018-09-10 10:15:28,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:28,800 INFO L225 Difference]: With dead ends: 189 [2018-09-10 10:15:28,800 INFO L226 Difference]: Without dead ends: 187 [2018-09-10 10:15:28,801 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 745 GetRequests, 650 SyntacticMatches, 70 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 735 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=215, Invalid=487, Unknown=0, NotChecked=0, Total=702 [2018-09-10 10:15:28,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-09-10 10:15:28,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 187. [2018-09-10 10:15:28,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-09-10 10:15:28,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 188 transitions. [2018-09-10 10:15:28,810 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 188 transitions. Word has length 176 [2018-09-10 10:15:28,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:28,810 INFO L480 AbstractCegarLoop]: Abstraction has 187 states and 188 transitions. [2018-09-10 10:15:28,810 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-10 10:15:28,810 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 188 transitions. [2018-09-10 10:15:28,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2018-09-10 10:15:28,811 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:28,812 INFO L376 BasicCegarLoop]: trace histogram [18, 18, 18, 18, 18, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:28,812 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:28,812 INFO L82 PathProgramCache]: Analyzing trace with hash 785850677, now seen corresponding path program 33 times [2018-09-10 10:15:28,812 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:28,813 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:28,813 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:28,813 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:28,813 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:28,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:29,391 INFO L134 CoverageAnalysis]: Checked inductivity of 1479 backedges. 629 proven. 306 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:29,391 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:29,392 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:29,399 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:29,399 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:29,467 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2018-09-10 10:15:29,467 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:29,471 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:30,208 INFO L134 CoverageAnalysis]: Checked inductivity of 1479 backedges. 629 proven. 306 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:30,209 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:30,706 INFO L134 CoverageAnalysis]: Checked inductivity of 1479 backedges. 629 proven. 306 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:30,727 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:30,727 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:30,741 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:30,741 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:31,115 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2018-09-10 10:15:31,116 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:31,122 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:31,173 INFO L134 CoverageAnalysis]: Checked inductivity of 1479 backedges. 629 proven. 306 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:31,173 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:32,237 INFO L134 CoverageAnalysis]: Checked inductivity of 1479 backedges. 629 proven. 306 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:32,238 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:32,239 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 57 [2018-09-10 10:15:32,239 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:32,239 INFO L459 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-09-10 10:15:32,240 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-09-10 10:15:32,240 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=759, Invalid=2433, Unknown=0, NotChecked=0, Total=3192 [2018-09-10 10:15:32,240 INFO L87 Difference]: Start difference. First operand 187 states and 188 transitions. Second operand 57 states. [2018-09-10 10:15:33,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:33,058 INFO L93 Difference]: Finished difference Result 270 states and 289 transitions. [2018-09-10 10:15:33,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-10 10:15:33,059 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 184 [2018-09-10 10:15:33,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:33,060 INFO L225 Difference]: With dead ends: 270 [2018-09-10 10:15:33,060 INFO L226 Difference]: Without dead ends: 189 [2018-09-10 10:15:33,061 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 792 GetRequests, 646 SyntacticMatches, 72 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3301 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=1348, Invalid=4352, Unknown=0, NotChecked=0, Total=5700 [2018-09-10 10:15:33,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-09-10 10:15:33,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 189. [2018-09-10 10:15:33,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-09-10 10:15:33,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 190 transitions. [2018-09-10 10:15:33,070 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 190 transitions. Word has length 184 [2018-09-10 10:15:33,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:33,071 INFO L480 AbstractCegarLoop]: Abstraction has 189 states and 190 transitions. [2018-09-10 10:15:33,071 INFO L481 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-09-10 10:15:33,071 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 190 transitions. [2018-09-10 10:15:33,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2018-09-10 10:15:33,072 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:33,072 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 18, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:33,073 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:33,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1200110993, now seen corresponding path program 34 times [2018-09-10 10:15:33,073 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:33,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:33,074 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:33,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:33,074 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:33,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:33,646 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 375 proven. 644 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-09-10 10:15:33,646 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:33,647 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:33,655 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:33,655 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:33,709 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:33,709 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:33,712 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:34,122 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 376 proven. 595 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:34,122 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:34,481 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 376 proven. 595 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:34,501 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:34,501 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:34,516 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:34,516 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:34,656 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:34,657 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:34,664 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:34,689 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 376 proven. 595 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:34,690 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:35,197 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 376 proven. 595 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-10 10:15:35,198 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:35,198 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 23, 23, 23] total 26 [2018-09-10 10:15:35,199 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:35,199 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-10 10:15:35,199 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-10 10:15:35,199 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=428, Unknown=0, NotChecked=0, Total=650 [2018-09-10 10:15:35,199 INFO L87 Difference]: Start difference. First operand 189 states and 190 transitions. Second operand 26 states. [2018-09-10 10:15:35,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:35,477 INFO L93 Difference]: Finished difference Result 199 states and 200 transitions. [2018-09-10 10:15:35,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-10 10:15:35,478 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 186 [2018-09-10 10:15:35,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:35,480 INFO L225 Difference]: With dead ends: 199 [2018-09-10 10:15:35,480 INFO L226 Difference]: Without dead ends: 197 [2018-09-10 10:15:35,480 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 787 GetRequests, 687 SyntacticMatches, 74 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 814 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=235, Invalid=521, Unknown=0, NotChecked=0, Total=756 [2018-09-10 10:15:35,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-09-10 10:15:35,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 197. [2018-09-10 10:15:35,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-09-10 10:15:35,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 198 transitions. [2018-09-10 10:15:35,489 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 198 transitions. Word has length 186 [2018-09-10 10:15:35,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:35,489 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 198 transitions. [2018-09-10 10:15:35,489 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-10 10:15:35,489 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 198 transitions. [2018-09-10 10:15:35,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2018-09-10 10:15:35,490 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:35,491 INFO L376 BasicCegarLoop]: trace histogram [19, 19, 19, 19, 19, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:35,491 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:35,491 INFO L82 PathProgramCache]: Analyzing trace with hash 772446355, now seen corresponding path program 35 times [2018-09-10 10:15:35,491 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:35,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:35,492 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:35,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:35,492 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:35,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:36,494 INFO L134 CoverageAnalysis]: Checked inductivity of 1656 backedges. 702 proven. 342 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:15:36,494 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:36,494 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:36,503 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:36,503 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:36,573 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2018-09-10 10:15:36,573 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:36,578 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:37,310 INFO L134 CoverageAnalysis]: Checked inductivity of 1656 backedges. 702 proven. 342 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:15:37,310 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:37,828 INFO L134 CoverageAnalysis]: Checked inductivity of 1656 backedges. 702 proven. 342 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:15:37,849 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:37,849 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:37,864 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:37,864 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:38,262 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2018-09-10 10:15:38,262 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:38,268 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:38,324 INFO L134 CoverageAnalysis]: Checked inductivity of 1656 backedges. 702 proven. 342 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:15:38,324 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:38,843 INFO L134 CoverageAnalysis]: Checked inductivity of 1656 backedges. 702 proven. 342 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:15:38,845 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:38,845 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 60 [2018-09-10 10:15:38,845 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:38,846 INFO L459 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-09-10 10:15:38,846 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-09-10 10:15:38,846 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=839, Invalid=2701, Unknown=0, NotChecked=0, Total=3540 [2018-09-10 10:15:38,847 INFO L87 Difference]: Start difference. First operand 197 states and 198 transitions. Second operand 60 states. [2018-09-10 10:15:39,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:39,921 INFO L93 Difference]: Finished difference Result 284 states and 304 transitions. [2018-09-10 10:15:39,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-09-10 10:15:39,925 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 194 [2018-09-10 10:15:39,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:39,926 INFO L225 Difference]: With dead ends: 284 [2018-09-10 10:15:39,926 INFO L226 Difference]: Without dead ends: 199 [2018-09-10 10:15:39,928 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 835 GetRequests, 681 SyntacticMatches, 76 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3684 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=1489, Invalid=4831, Unknown=0, NotChecked=0, Total=6320 [2018-09-10 10:15:39,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-09-10 10:15:39,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 199. [2018-09-10 10:15:39,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-09-10 10:15:39,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 200 transitions. [2018-09-10 10:15:39,938 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 200 transitions. Word has length 194 [2018-09-10 10:15:39,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:39,939 INFO L480 AbstractCegarLoop]: Abstraction has 199 states and 200 transitions. [2018-09-10 10:15:39,939 INFO L481 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-09-10 10:15:39,939 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 200 transitions. [2018-09-10 10:15:39,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2018-09-10 10:15:39,940 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:39,940 INFO L376 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 19, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:39,941 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:39,941 INFO L82 PathProgramCache]: Analyzing trace with hash -1075414707, now seen corresponding path program 36 times [2018-09-10 10:15:39,941 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:39,941 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:39,942 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:39,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:39,942 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:39,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:40,637 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 415 proven. 718 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2018-09-10 10:15:40,637 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:40,637 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:40,645 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:40,646 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:40,721 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 20 check-sat command(s) [2018-09-10 10:15:40,721 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:40,726 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:40,804 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 416 proven. 666 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:15:40,804 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:41,427 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 416 proven. 666 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:15:41,447 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:41,447 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:41,462 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:15:41,462 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:15:41,878 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 20 check-sat command(s) [2018-09-10 10:15:41,878 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:41,886 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:41,913 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 416 proven. 666 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:15:41,914 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:42,277 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 416 proven. 666 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-10 10:15:42,278 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:42,279 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 24, 24, 24, 24] total 27 [2018-09-10 10:15:42,279 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:42,279 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-10 10:15:42,280 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-10 10:15:42,280 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=243, Invalid=459, Unknown=0, NotChecked=0, Total=702 [2018-09-10 10:15:42,280 INFO L87 Difference]: Start difference. First operand 199 states and 200 transitions. Second operand 27 states. [2018-09-10 10:15:42,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:42,520 INFO L93 Difference]: Finished difference Result 209 states and 210 transitions. [2018-09-10 10:15:42,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-09-10 10:15:42,520 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 196 [2018-09-10 10:15:42,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:42,522 INFO L225 Difference]: With dead ends: 209 [2018-09-10 10:15:42,522 INFO L226 Difference]: Without dead ends: 207 [2018-09-10 10:15:42,523 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 829 GetRequests, 724 SyntacticMatches, 78 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 897 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=256, Invalid=556, Unknown=0, NotChecked=0, Total=812 [2018-09-10 10:15:42,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-09-10 10:15:42,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2018-09-10 10:15:42,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-09-10 10:15:42,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 208 transitions. [2018-09-10 10:15:42,532 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 208 transitions. Word has length 196 [2018-09-10 10:15:42,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:42,532 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 208 transitions. [2018-09-10 10:15:42,532 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-10 10:15:42,532 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 208 transitions. [2018-09-10 10:15:42,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-09-10 10:15:42,533 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:42,534 INFO L376 BasicCegarLoop]: trace histogram [20, 20, 20, 20, 20, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:42,534 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:42,534 INFO L82 PathProgramCache]: Analyzing trace with hash 565940593, now seen corresponding path program 37 times [2018-09-10 10:15:42,534 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:42,535 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:42,535 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:42,535 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:42,535 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:42,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:43,206 INFO L134 CoverageAnalysis]: Checked inductivity of 1843 backedges. 779 proven. 380 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:43,206 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:43,207 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:43,215 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:43,215 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:43,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:43,276 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:43,983 INFO L134 CoverageAnalysis]: Checked inductivity of 1843 backedges. 779 proven. 380 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:43,983 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:44,540 INFO L134 CoverageAnalysis]: Checked inductivity of 1843 backedges. 779 proven. 380 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:44,560 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:44,560 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:44,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:44,575 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:15:44,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:44,710 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:44,753 INFO L134 CoverageAnalysis]: Checked inductivity of 1843 backedges. 779 proven. 380 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:44,753 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:45,350 INFO L134 CoverageAnalysis]: Checked inductivity of 1843 backedges. 779 proven. 380 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:45,351 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:45,352 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43, 43, 43] total 63 [2018-09-10 10:15:45,352 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:45,352 INFO L459 AbstractCegarLoop]: Interpolant automaton has 63 states [2018-09-10 10:15:45,353 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2018-09-10 10:15:45,353 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=923, Invalid=2983, Unknown=0, NotChecked=0, Total=3906 [2018-09-10 10:15:45,354 INFO L87 Difference]: Start difference. First operand 207 states and 208 transitions. Second operand 63 states. [2018-09-10 10:15:46,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:46,821 INFO L93 Difference]: Finished difference Result 298 states and 319 transitions. [2018-09-10 10:15:46,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-09-10 10:15:46,821 INFO L78 Accepts]: Start accepts. Automaton has 63 states. Word has length 204 [2018-09-10 10:15:46,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:46,822 INFO L225 Difference]: With dead ends: 298 [2018-09-10 10:15:46,822 INFO L226 Difference]: Without dead ends: 209 [2018-09-10 10:15:46,824 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 878 GetRequests, 716 SyntacticMatches, 80 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4088 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=1637, Invalid=5335, Unknown=0, NotChecked=0, Total=6972 [2018-09-10 10:15:46,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-09-10 10:15:46,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2018-09-10 10:15:46,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-09-10 10:15:46,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 210 transitions. [2018-09-10 10:15:46,834 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 210 transitions. Word has length 204 [2018-09-10 10:15:46,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:46,834 INFO L480 AbstractCegarLoop]: Abstraction has 209 states and 210 transitions. [2018-09-10 10:15:46,834 INFO L481 AbstractCegarLoop]: Interpolant automaton has 63 states. [2018-09-10 10:15:46,834 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 210 transitions. [2018-09-10 10:15:46,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2018-09-10 10:15:46,835 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:46,835 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 20, 20, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:46,836 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:46,836 INFO L82 PathProgramCache]: Analyzing trace with hash -1469492821, now seen corresponding path program 38 times [2018-09-10 10:15:46,836 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:46,837 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:46,837 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:15:46,837 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:46,837 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:46,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:47,200 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 457 proven. 796 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-10 10:15:47,201 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:47,201 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:47,208 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:47,208 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:47,269 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:47,269 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:47,272 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:47,337 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 458 proven. 741 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:47,337 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:47,842 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 458 proven. 741 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:47,862 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:47,863 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:47,877 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:15:47,877 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:48,014 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:15:48,015 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:48,021 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:48,061 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 458 proven. 741 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:48,061 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:48,522 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 458 proven. 741 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-10 10:15:48,524 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:48,524 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 25, 25, 25] total 28 [2018-09-10 10:15:48,524 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:48,524 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-09-10 10:15:48,525 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-09-10 10:15:48,525 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=265, Invalid=491, Unknown=0, NotChecked=0, Total=756 [2018-09-10 10:15:48,525 INFO L87 Difference]: Start difference. First operand 209 states and 210 transitions. Second operand 28 states. [2018-09-10 10:15:48,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:48,851 INFO L93 Difference]: Finished difference Result 219 states and 220 transitions. [2018-09-10 10:15:48,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-10 10:15:48,851 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 206 [2018-09-10 10:15:48,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:48,853 INFO L225 Difference]: With dead ends: 219 [2018-09-10 10:15:48,853 INFO L226 Difference]: Without dead ends: 217 [2018-09-10 10:15:48,854 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 871 GetRequests, 761 SyntacticMatches, 82 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 984 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=278, Invalid=592, Unknown=0, NotChecked=0, Total=870 [2018-09-10 10:15:48,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-09-10 10:15:48,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 217. [2018-09-10 10:15:48,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-09-10 10:15:48,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 218 transitions. [2018-09-10 10:15:48,865 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 218 transitions. Word has length 206 [2018-09-10 10:15:48,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:48,866 INFO L480 AbstractCegarLoop]: Abstraction has 217 states and 218 transitions. [2018-09-10 10:15:48,866 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-09-10 10:15:48,866 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 218 transitions. [2018-09-10 10:15:48,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2018-09-10 10:15:48,867 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:48,867 INFO L376 BasicCegarLoop]: trace histogram [21, 21, 21, 21, 21, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:48,868 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:48,868 INFO L82 PathProgramCache]: Analyzing trace with hash -1761137713, now seen corresponding path program 39 times [2018-09-10 10:15:48,868 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:48,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:48,869 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:48,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:48,869 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:48,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:49,751 INFO L134 CoverageAnalysis]: Checked inductivity of 2040 backedges. 860 proven. 420 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-10 10:15:49,751 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:49,751 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:49,759 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:49,759 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:49,838 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 21 check-sat command(s) [2018-09-10 10:15:49,838 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:49,842 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:50,598 INFO L134 CoverageAnalysis]: Checked inductivity of 2040 backedges. 860 proven. 420 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-10 10:15:50,599 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:51,226 INFO L134 CoverageAnalysis]: Checked inductivity of 2040 backedges. 860 proven. 420 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-10 10:15:51,247 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:51,247 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:51,261 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:15:51,262 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:15:51,755 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 21 check-sat command(s) [2018-09-10 10:15:51,756 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:51,763 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:51,811 INFO L134 CoverageAnalysis]: Checked inductivity of 2040 backedges. 860 proven. 420 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-10 10:15:51,811 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:52,415 INFO L134 CoverageAnalysis]: Checked inductivity of 2040 backedges. 860 proven. 420 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-10 10:15:52,417 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:52,418 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45, 45, 45, 45] total 66 [2018-09-10 10:15:52,418 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:52,418 INFO L459 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-09-10 10:15:52,419 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-09-10 10:15:52,419 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1011, Invalid=3279, Unknown=0, NotChecked=0, Total=4290 [2018-09-10 10:15:52,419 INFO L87 Difference]: Start difference. First operand 217 states and 218 transitions. Second operand 66 states. [2018-09-10 10:15:53,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:53,815 INFO L93 Difference]: Finished difference Result 312 states and 334 transitions. [2018-09-10 10:15:53,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-09-10 10:15:53,815 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 214 [2018-09-10 10:15:53,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:53,816 INFO L225 Difference]: With dead ends: 312 [2018-09-10 10:15:53,816 INFO L226 Difference]: Without dead ends: 219 [2018-09-10 10:15:53,818 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 921 GetRequests, 751 SyntacticMatches, 84 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4513 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=1792, Invalid=5864, Unknown=0, NotChecked=0, Total=7656 [2018-09-10 10:15:53,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-09-10 10:15:53,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 219. [2018-09-10 10:15:53,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219 states. [2018-09-10 10:15:53,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 220 transitions. [2018-09-10 10:15:53,828 INFO L78 Accepts]: Start accepts. Automaton has 219 states and 220 transitions. Word has length 214 [2018-09-10 10:15:53,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:53,828 INFO L480 AbstractCegarLoop]: Abstraction has 219 states and 220 transitions. [2018-09-10 10:15:53,828 INFO L481 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-09-10 10:15:53,829 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 220 transitions. [2018-09-10 10:15:53,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2018-09-10 10:15:53,830 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:53,830 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 21, 21, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:53,830 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:53,830 INFO L82 PathProgramCache]: Analyzing trace with hash -1420465271, now seen corresponding path program 40 times [2018-09-10 10:15:53,831 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:53,831 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:53,831 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:53,831 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:53,831 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:53,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:54,262 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 501 proven. 878 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2018-09-10 10:15:54,263 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:54,263 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:54,271 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:54,271 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:54,338 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:54,338 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:54,342 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:54,426 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 502 proven. 820 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-10 10:15:54,426 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:54,837 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 502 proven. 820 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-10 10:15:54,857 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:54,857 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:54,871 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:15:54,871 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:15:55,038 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:15:55,039 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:55,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:55,080 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 502 proven. 820 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-10 10:15:55,080 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:55,558 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 502 proven. 820 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-10 10:15:55,559 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:15:55,559 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 26, 26, 26, 26] total 29 [2018-09-10 10:15:55,559 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:15:55,560 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-09-10 10:15:55,560 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-09-10 10:15:55,560 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=288, Invalid=524, Unknown=0, NotChecked=0, Total=812 [2018-09-10 10:15:55,561 INFO L87 Difference]: Start difference. First operand 219 states and 220 transitions. Second operand 29 states. [2018-09-10 10:15:55,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:15:55,901 INFO L93 Difference]: Finished difference Result 229 states and 230 transitions. [2018-09-10 10:15:55,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-10 10:15:55,902 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 216 [2018-09-10 10:15:55,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:15:55,903 INFO L225 Difference]: With dead ends: 229 [2018-09-10 10:15:55,903 INFO L226 Difference]: Without dead ends: 227 [2018-09-10 10:15:55,904 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 913 GetRequests, 798 SyntacticMatches, 86 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1075 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=301, Invalid=629, Unknown=0, NotChecked=0, Total=930 [2018-09-10 10:15:55,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-09-10 10:15:55,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 227. [2018-09-10 10:15:55,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227 states. [2018-09-10 10:15:55,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227 states to 227 states and 228 transitions. [2018-09-10 10:15:55,914 INFO L78 Accepts]: Start accepts. Automaton has 227 states and 228 transitions. Word has length 216 [2018-09-10 10:15:55,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:15:55,915 INFO L480 AbstractCegarLoop]: Abstraction has 227 states and 228 transitions. [2018-09-10 10:15:55,915 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-09-10 10:15:55,915 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 228 transitions. [2018-09-10 10:15:55,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2018-09-10 10:15:55,916 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:15:55,916 INFO L376 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:15:55,916 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:15:55,917 INFO L82 PathProgramCache]: Analyzing trace with hash 807569325, now seen corresponding path program 41 times [2018-09-10 10:15:55,917 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:15:55,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:55,917 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:15:55,918 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:15:55,918 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:15:55,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:15:57,215 INFO L134 CoverageAnalysis]: Checked inductivity of 2247 backedges. 945 proven. 462 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:57,216 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:57,216 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:15:57,224 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:57,224 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:57,310 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-09-10 10:15:57,310 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:57,316 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:58,178 INFO L134 CoverageAnalysis]: Checked inductivity of 2247 backedges. 945 proven. 462 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:58,178 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:15:58,988 INFO L134 CoverageAnalysis]: Checked inductivity of 2247 backedges. 945 proven. 462 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:59,008 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:15:59,008 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:15:59,023 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:15:59,023 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:15:59,558 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-09-10 10:15:59,558 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:15:59,566 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:15:59,616 INFO L134 CoverageAnalysis]: Checked inductivity of 2247 backedges. 945 proven. 462 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:15:59,617 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:00,357 INFO L134 CoverageAnalysis]: Checked inductivity of 2247 backedges. 945 proven. 462 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:16:00,358 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:00,358 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47, 47, 47] total 69 [2018-09-10 10:16:00,358 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:00,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 69 states [2018-09-10 10:16:00,359 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2018-09-10 10:16:00,359 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1103, Invalid=3589, Unknown=0, NotChecked=0, Total=4692 [2018-09-10 10:16:00,360 INFO L87 Difference]: Start difference. First operand 227 states and 228 transitions. Second operand 69 states. [2018-09-10 10:16:01,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:01,877 INFO L93 Difference]: Finished difference Result 326 states and 349 transitions. [2018-09-10 10:16:01,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-09-10 10:16:01,878 INFO L78 Accepts]: Start accepts. Automaton has 69 states. Word has length 224 [2018-09-10 10:16:01,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:01,879 INFO L225 Difference]: With dead ends: 326 [2018-09-10 10:16:01,879 INFO L226 Difference]: Without dead ends: 229 [2018-09-10 10:16:01,880 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 964 GetRequests, 786 SyntacticMatches, 88 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4959 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=1954, Invalid=6418, Unknown=0, NotChecked=0, Total=8372 [2018-09-10 10:16:01,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-09-10 10:16:01,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 229. [2018-09-10 10:16:01,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229 states. [2018-09-10 10:16:01,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229 states to 229 states and 230 transitions. [2018-09-10 10:16:01,891 INFO L78 Accepts]: Start accepts. Automaton has 229 states and 230 transitions. Word has length 224 [2018-09-10 10:16:01,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:01,892 INFO L480 AbstractCegarLoop]: Abstraction has 229 states and 230 transitions. [2018-09-10 10:16:01,892 INFO L481 AbstractCegarLoop]: Interpolant automaton has 69 states. [2018-09-10 10:16:01,892 INFO L276 IsEmpty]: Start isEmpty. Operand 229 states and 230 transitions. [2018-09-10 10:16:01,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2018-09-10 10:16:01,893 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:01,893 INFO L376 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 22, 22, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:01,894 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:01,894 INFO L82 PathProgramCache]: Analyzing trace with hash 823650023, now seen corresponding path program 42 times [2018-09-10 10:16:01,894 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:01,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:01,895 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:01,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:01,895 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:01,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:02,620 INFO L134 CoverageAnalysis]: Checked inductivity of 2291 backedges. 547 proven. 964 refuted. 0 times theorem prover too weak. 780 trivial. 0 not checked. [2018-09-10 10:16:02,621 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:02,621 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:02,628 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:16:02,628 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:16:02,708 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 23 check-sat command(s) [2018-09-10 10:16:02,708 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:02,713 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:02,794 INFO L134 CoverageAnalysis]: Checked inductivity of 2291 backedges. 548 proven. 903 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:16:02,794 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:04,071 INFO L134 CoverageAnalysis]: Checked inductivity of 2291 backedges. 548 proven. 903 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:16:04,090 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:04,090 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:04,106 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:16:04,106 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:16:04,644 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 23 check-sat command(s) [2018-09-10 10:16:04,644 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:04,652 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:04,698 INFO L134 CoverageAnalysis]: Checked inductivity of 2291 backedges. 548 proven. 903 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:16:04,699 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:05,179 INFO L134 CoverageAnalysis]: Checked inductivity of 2291 backedges. 548 proven. 903 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-10 10:16:05,180 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:05,180 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 27, 27, 27, 27] total 30 [2018-09-10 10:16:05,181 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:05,181 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-09-10 10:16:05,181 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-09-10 10:16:05,181 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=312, Invalid=558, Unknown=0, NotChecked=0, Total=870 [2018-09-10 10:16:05,181 INFO L87 Difference]: Start difference. First operand 229 states and 230 transitions. Second operand 30 states. [2018-09-10 10:16:05,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:05,490 INFO L93 Difference]: Finished difference Result 239 states and 240 transitions. [2018-09-10 10:16:05,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-10 10:16:05,491 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 226 [2018-09-10 10:16:05,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:05,493 INFO L225 Difference]: With dead ends: 239 [2018-09-10 10:16:05,493 INFO L226 Difference]: Without dead ends: 237 [2018-09-10 10:16:05,493 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 955 GetRequests, 835 SyntacticMatches, 90 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1170 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=325, Invalid=667, Unknown=0, NotChecked=0, Total=992 [2018-09-10 10:16:05,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-09-10 10:16:05,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 237. [2018-09-10 10:16:05,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-09-10 10:16:05,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 238 transitions. [2018-09-10 10:16:05,504 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 238 transitions. Word has length 226 [2018-09-10 10:16:05,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:05,504 INFO L480 AbstractCegarLoop]: Abstraction has 237 states and 238 transitions. [2018-09-10 10:16:05,505 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-09-10 10:16:05,505 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 238 transitions. [2018-09-10 10:16:05,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2018-09-10 10:16:05,506 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:05,506 INFO L376 BasicCegarLoop]: trace histogram [23, 23, 23, 23, 23, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:05,506 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:05,507 INFO L82 PathProgramCache]: Analyzing trace with hash 643482891, now seen corresponding path program 43 times [2018-09-10 10:16:05,507 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:05,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:05,507 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:05,508 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:05,508 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:05,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:06,832 INFO L134 CoverageAnalysis]: Checked inductivity of 2464 backedges. 1034 proven. 506 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-10 10:16:06,833 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:06,833 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:06,840 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:06,840 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:16:06,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:06,910 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:07,906 INFO L134 CoverageAnalysis]: Checked inductivity of 2464 backedges. 1034 proven. 506 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-10 10:16:07,906 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:08,592 INFO L134 CoverageAnalysis]: Checked inductivity of 2464 backedges. 1034 proven. 506 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-10 10:16:08,613 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:08,613 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:08,630 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:08,630 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:16:08,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:08,778 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:08,857 INFO L134 CoverageAnalysis]: Checked inductivity of 2464 backedges. 1034 proven. 506 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-10 10:16:08,857 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:09,632 INFO L134 CoverageAnalysis]: Checked inductivity of 2464 backedges. 1034 proven. 506 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-10 10:16:09,634 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:09,634 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49, 49, 49] total 72 [2018-09-10 10:16:09,635 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:09,635 INFO L459 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-09-10 10:16:09,635 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-09-10 10:16:09,636 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1199, Invalid=3913, Unknown=0, NotChecked=0, Total=5112 [2018-09-10 10:16:09,636 INFO L87 Difference]: Start difference. First operand 237 states and 238 transitions. Second operand 72 states. [2018-09-10 10:16:10,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:10,874 INFO L93 Difference]: Finished difference Result 340 states and 364 transitions. [2018-09-10 10:16:10,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-09-10 10:16:10,874 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 234 [2018-09-10 10:16:10,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:10,876 INFO L225 Difference]: With dead ends: 340 [2018-09-10 10:16:10,876 INFO L226 Difference]: Without dead ends: 239 [2018-09-10 10:16:10,877 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1007 GetRequests, 821 SyntacticMatches, 92 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5426 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=2123, Invalid=6997, Unknown=0, NotChecked=0, Total=9120 [2018-09-10 10:16:10,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-09-10 10:16:10,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 239. [2018-09-10 10:16:10,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-09-10 10:16:10,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 240 transitions. [2018-09-10 10:16:10,889 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 240 transitions. Word has length 234 [2018-09-10 10:16:10,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:10,889 INFO L480 AbstractCegarLoop]: Abstraction has 239 states and 240 transitions. [2018-09-10 10:16:10,889 INFO L481 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-09-10 10:16:10,889 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 240 transitions. [2018-09-10 10:16:10,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2018-09-10 10:16:10,890 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:10,891 INFO L376 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 23, 23, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:10,891 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:10,891 INFO L82 PathProgramCache]: Analyzing trace with hash -751443003, now seen corresponding path program 44 times [2018-09-10 10:16:10,891 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:10,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:10,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:10,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:10,892 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:10,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:12,118 INFO L134 CoverageAnalysis]: Checked inductivity of 2510 backedges. 595 proven. 1054 refuted. 0 times theorem prover too weak. 861 trivial. 0 not checked. [2018-09-10 10:16:12,118 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:12,118 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:12,126 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:16:12,126 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:12,196 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:16:12,196 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:12,199 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:12,296 INFO L134 CoverageAnalysis]: Checked inductivity of 2510 backedges. 596 proven. 990 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-10 10:16:12,296 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:12,807 INFO L134 CoverageAnalysis]: Checked inductivity of 2510 backedges. 596 proven. 990 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-10 10:16:12,826 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:12,826 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:12,841 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:16:12,841 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:12,998 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:16:12,998 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:13,007 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:13,039 INFO L134 CoverageAnalysis]: Checked inductivity of 2510 backedges. 596 proven. 990 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-10 10:16:13,039 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:13,557 INFO L134 CoverageAnalysis]: Checked inductivity of 2510 backedges. 596 proven. 990 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-10 10:16:13,559 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:13,559 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 28, 28, 28, 28] total 31 [2018-09-10 10:16:13,559 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:13,559 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-10 10:16:13,559 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-10 10:16:13,560 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=337, Invalid=593, Unknown=0, NotChecked=0, Total=930 [2018-09-10 10:16:13,560 INFO L87 Difference]: Start difference. First operand 239 states and 240 transitions. Second operand 31 states. [2018-09-10 10:16:13,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:13,898 INFO L93 Difference]: Finished difference Result 249 states and 250 transitions. [2018-09-10 10:16:13,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-09-10 10:16:13,898 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 236 [2018-09-10 10:16:13,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:13,901 INFO L225 Difference]: With dead ends: 249 [2018-09-10 10:16:13,901 INFO L226 Difference]: Without dead ends: 247 [2018-09-10 10:16:13,901 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 997 GetRequests, 872 SyntacticMatches, 94 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1269 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=350, Invalid=706, Unknown=0, NotChecked=0, Total=1056 [2018-09-10 10:16:13,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2018-09-10 10:16:13,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 247. [2018-09-10 10:16:13,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-09-10 10:16:13,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 248 transitions. [2018-09-10 10:16:13,912 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 248 transitions. Word has length 236 [2018-09-10 10:16:13,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:13,912 INFO L480 AbstractCegarLoop]: Abstraction has 247 states and 248 transitions. [2018-09-10 10:16:13,912 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-10 10:16:13,913 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 248 transitions. [2018-09-10 10:16:13,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2018-09-10 10:16:13,914 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:13,914 INFO L376 BasicCegarLoop]: trace histogram [24, 24, 24, 24, 24, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:13,914 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:13,915 INFO L82 PathProgramCache]: Analyzing trace with hash 1276445673, now seen corresponding path program 45 times [2018-09-10 10:16:13,915 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:13,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:13,915 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:13,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:13,916 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:13,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:14,858 INFO L134 CoverageAnalysis]: Checked inductivity of 2691 backedges. 1127 proven. 552 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:16:14,858 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:14,858 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:14,869 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:16:14,869 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:16:14,964 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-09-10 10:16:14,964 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:14,969 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:15,955 INFO L134 CoverageAnalysis]: Checked inductivity of 2691 backedges. 1127 proven. 552 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:16:15,956 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:16,738 INFO L134 CoverageAnalysis]: Checked inductivity of 2691 backedges. 1127 proven. 552 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:16:16,759 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:16,759 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:16,774 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:16:16,774 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:16:17,390 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-09-10 10:16:17,390 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:17,398 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:17,450 INFO L134 CoverageAnalysis]: Checked inductivity of 2691 backedges. 1127 proven. 552 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:16:17,450 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:18,214 INFO L134 CoverageAnalysis]: Checked inductivity of 2691 backedges. 1127 proven. 552 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:16:18,215 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:18,215 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 51, 51, 51, 51] total 75 [2018-09-10 10:16:18,216 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:18,216 INFO L459 AbstractCegarLoop]: Interpolant automaton has 75 states [2018-09-10 10:16:18,216 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 75 interpolants. [2018-09-10 10:16:18,217 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1299, Invalid=4251, Unknown=0, NotChecked=0, Total=5550 [2018-09-10 10:16:18,217 INFO L87 Difference]: Start difference. First operand 247 states and 248 transitions. Second operand 75 states. [2018-09-10 10:16:19,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:19,555 INFO L93 Difference]: Finished difference Result 354 states and 379 transitions. [2018-09-10 10:16:19,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-09-10 10:16:19,555 INFO L78 Accepts]: Start accepts. Automaton has 75 states. Word has length 244 [2018-09-10 10:16:19,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:19,557 INFO L225 Difference]: With dead ends: 354 [2018-09-10 10:16:19,557 INFO L226 Difference]: Without dead ends: 249 [2018-09-10 10:16:19,558 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1050 GetRequests, 856 SyntacticMatches, 96 SemanticMatches, 98 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5914 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=2299, Invalid=7601, Unknown=0, NotChecked=0, Total=9900 [2018-09-10 10:16:19,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2018-09-10 10:16:19,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 249. [2018-09-10 10:16:19,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 249 states. [2018-09-10 10:16:19,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 250 transitions. [2018-09-10 10:16:19,570 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 250 transitions. Word has length 244 [2018-09-10 10:16:19,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:19,570 INFO L480 AbstractCegarLoop]: Abstraction has 249 states and 250 transitions. [2018-09-10 10:16:19,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 75 states. [2018-09-10 10:16:19,570 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 250 transitions. [2018-09-10 10:16:19,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2018-09-10 10:16:19,572 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:19,572 INFO L376 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 24, 24, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:19,572 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:19,572 INFO L82 PathProgramCache]: Analyzing trace with hash -565411293, now seen corresponding path program 46 times [2018-09-10 10:16:19,573 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:19,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:19,573 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:19,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:19,573 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:19,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:20,053 INFO L134 CoverageAnalysis]: Checked inductivity of 2739 backedges. 645 proven. 1148 refuted. 0 times theorem prover too weak. 946 trivial. 0 not checked. [2018-09-10 10:16:20,053 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:20,053 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:20,061 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:16:20,061 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:16:20,133 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:16:20,133 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:20,137 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:20,224 INFO L134 CoverageAnalysis]: Checked inductivity of 2739 backedges. 646 proven. 1081 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:16:20,224 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:20,771 INFO L134 CoverageAnalysis]: Checked inductivity of 2739 backedges. 646 proven. 1081 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:16:20,791 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:20,791 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:20,806 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:16:20,807 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:16:20,990 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:16:20,990 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:20,998 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:21,056 INFO L134 CoverageAnalysis]: Checked inductivity of 2739 backedges. 646 proven. 1081 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:16:21,056 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:21,595 INFO L134 CoverageAnalysis]: Checked inductivity of 2739 backedges. 646 proven. 1081 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-10 10:16:21,597 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:21,597 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 29, 29, 29, 29] total 32 [2018-09-10 10:16:21,597 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:21,598 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-09-10 10:16:21,598 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-09-10 10:16:21,598 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=363, Invalid=629, Unknown=0, NotChecked=0, Total=992 [2018-09-10 10:16:21,598 INFO L87 Difference]: Start difference. First operand 249 states and 250 transitions. Second operand 32 states. [2018-09-10 10:16:21,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:21,912 INFO L93 Difference]: Finished difference Result 259 states and 260 transitions. [2018-09-10 10:16:21,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-09-10 10:16:21,913 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 246 [2018-09-10 10:16:21,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:21,915 INFO L225 Difference]: With dead ends: 259 [2018-09-10 10:16:21,915 INFO L226 Difference]: Without dead ends: 257 [2018-09-10 10:16:21,916 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1039 GetRequests, 909 SyntacticMatches, 98 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1372 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=376, Invalid=746, Unknown=0, NotChecked=0, Total=1122 [2018-09-10 10:16:21,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-09-10 10:16:21,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 257. [2018-09-10 10:16:21,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 257 states. [2018-09-10 10:16:21,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 258 transitions. [2018-09-10 10:16:21,926 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 258 transitions. Word has length 246 [2018-09-10 10:16:21,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:21,927 INFO L480 AbstractCegarLoop]: Abstraction has 257 states and 258 transitions. [2018-09-10 10:16:21,927 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-09-10 10:16:21,927 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 258 transitions. [2018-09-10 10:16:21,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2018-09-10 10:16:21,928 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:21,928 INFO L376 BasicCegarLoop]: trace histogram [25, 25, 25, 25, 25, 24, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:21,929 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:21,929 INFO L82 PathProgramCache]: Analyzing trace with hash -1899076537, now seen corresponding path program 47 times [2018-09-10 10:16:21,929 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:21,930 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:21,930 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:21,930 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:21,930 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:21,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:23,722 INFO L134 CoverageAnalysis]: Checked inductivity of 2928 backedges. 1224 proven. 600 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-10 10:16:23,722 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:23,722 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-09-10 10:16:23,731 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:16:23,732 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:23,830 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 25 check-sat command(s) [2018-09-10 10:16:23,830 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:23,836 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:24,947 INFO L134 CoverageAnalysis]: Checked inductivity of 2928 backedges. 1224 proven. 600 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-10 10:16:24,947 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:25,770 INFO L134 CoverageAnalysis]: Checked inductivity of 2928 backedges. 1224 proven. 600 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-10 10:16:25,790 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:25,790 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:25,809 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:16:25,809 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:26,466 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 25 check-sat command(s) [2018-09-10 10:16:26,467 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:26,475 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:26,553 INFO L134 CoverageAnalysis]: Checked inductivity of 2928 backedges. 1224 proven. 600 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-10 10:16:26,553 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:27,697 INFO L134 CoverageAnalysis]: Checked inductivity of 2928 backedges. 1224 proven. 600 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-10 10:16:27,699 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:27,699 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53, 53, 53, 53] total 78 [2018-09-10 10:16:27,699 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:27,700 INFO L459 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-09-10 10:16:27,700 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-09-10 10:16:27,700 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1403, Invalid=4603, Unknown=0, NotChecked=0, Total=6006 [2018-09-10 10:16:27,700 INFO L87 Difference]: Start difference. First operand 257 states and 258 transitions. Second operand 78 states. [2018-09-10 10:16:29,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:29,105 INFO L93 Difference]: Finished difference Result 368 states and 394 transitions. [2018-09-10 10:16:29,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-09-10 10:16:29,105 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 254 [2018-09-10 10:16:29,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:29,106 INFO L225 Difference]: With dead ends: 368 [2018-09-10 10:16:29,106 INFO L226 Difference]: Without dead ends: 259 [2018-09-10 10:16:29,108 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1093 GetRequests, 891 SyntacticMatches, 100 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6423 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=2482, Invalid=8230, Unknown=0, NotChecked=0, Total=10712 [2018-09-10 10:16:29,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-09-10 10:16:29,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 259. [2018-09-10 10:16:29,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 259 states. [2018-09-10 10:16:29,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 259 states and 260 transitions. [2018-09-10 10:16:29,119 INFO L78 Accepts]: Start accepts. Automaton has 259 states and 260 transitions. Word has length 254 [2018-09-10 10:16:29,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:29,119 INFO L480 AbstractCegarLoop]: Abstraction has 259 states and 260 transitions. [2018-09-10 10:16:29,119 INFO L481 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-09-10 10:16:29,119 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 260 transitions. [2018-09-10 10:16:29,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 257 [2018-09-10 10:16:29,121 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:29,121 INFO L376 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 25, 25, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:29,121 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:29,121 INFO L82 PathProgramCache]: Analyzing trace with hash 1410392577, now seen corresponding path program 48 times [2018-09-10 10:16:29,121 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:29,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:29,122 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:29,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:29,122 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:29,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:30,082 INFO L134 CoverageAnalysis]: Checked inductivity of 2978 backedges. 697 proven. 1246 refuted. 0 times theorem prover too weak. 1035 trivial. 0 not checked. [2018-09-10 10:16:30,082 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:30,082 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:30,089 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:16:30,090 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:16:30,192 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2018-09-10 10:16:30,192 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:30,197 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:30,279 INFO L134 CoverageAnalysis]: Checked inductivity of 2978 backedges. 698 proven. 1176 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-10 10:16:30,279 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:30,857 INFO L134 CoverageAnalysis]: Checked inductivity of 2978 backedges. 698 proven. 1176 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-10 10:16:30,879 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:30,879 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:30,894 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:16:30,894 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:16:31,576 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2018-09-10 10:16:31,577 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:31,586 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:31,630 INFO L134 CoverageAnalysis]: Checked inductivity of 2978 backedges. 698 proven. 1176 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-10 10:16:31,631 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:32,237 INFO L134 CoverageAnalysis]: Checked inductivity of 2978 backedges. 698 proven. 1176 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-10 10:16:32,238 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:32,239 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 30, 30, 30, 30] total 33 [2018-09-10 10:16:32,239 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:32,239 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-09-10 10:16:32,239 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-09-10 10:16:32,239 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=390, Invalid=666, Unknown=0, NotChecked=0, Total=1056 [2018-09-10 10:16:32,240 INFO L87 Difference]: Start difference. First operand 259 states and 260 transitions. Second operand 33 states. [2018-09-10 10:16:32,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:32,814 INFO L93 Difference]: Finished difference Result 269 states and 270 transitions. [2018-09-10 10:16:32,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-09-10 10:16:32,815 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 256 [2018-09-10 10:16:32,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:32,817 INFO L225 Difference]: With dead ends: 269 [2018-09-10 10:16:32,817 INFO L226 Difference]: Without dead ends: 267 [2018-09-10 10:16:32,818 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1081 GetRequests, 946 SyntacticMatches, 102 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1479 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=403, Invalid=787, Unknown=0, NotChecked=0, Total=1190 [2018-09-10 10:16:32,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2018-09-10 10:16:32,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 267. [2018-09-10 10:16:32,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 267 states. [2018-09-10 10:16:32,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 268 transitions. [2018-09-10 10:16:32,829 INFO L78 Accepts]: Start accepts. Automaton has 267 states and 268 transitions. Word has length 256 [2018-09-10 10:16:32,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:32,830 INFO L480 AbstractCegarLoop]: Abstraction has 267 states and 268 transitions. [2018-09-10 10:16:32,830 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-09-10 10:16:32,830 INFO L276 IsEmpty]: Start isEmpty. Operand 267 states and 268 transitions. [2018-09-10 10:16:32,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2018-09-10 10:16:32,832 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:32,832 INFO L376 BasicCegarLoop]: trace histogram [26, 26, 26, 26, 26, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:32,832 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:32,832 INFO L82 PathProgramCache]: Analyzing trace with hash -115603931, now seen corresponding path program 49 times [2018-09-10 10:16:32,832 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:32,833 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:32,833 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:32,833 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:32,833 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:32,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:33,850 INFO L134 CoverageAnalysis]: Checked inductivity of 3175 backedges. 1325 proven. 650 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:33,850 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:33,851 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:33,857 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:33,857 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:16:33,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:33,935 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:35,076 INFO L134 CoverageAnalysis]: Checked inductivity of 3175 backedges. 1325 proven. 650 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:35,077 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:35,990 INFO L134 CoverageAnalysis]: Checked inductivity of 3175 backedges. 1325 proven. 650 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:36,010 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:36,010 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:36,039 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:36,039 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:16:36,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:36,209 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:36,276 INFO L134 CoverageAnalysis]: Checked inductivity of 3175 backedges. 1325 proven. 650 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:36,276 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:37,172 INFO L134 CoverageAnalysis]: Checked inductivity of 3175 backedges. 1325 proven. 650 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:37,173 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:37,173 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 55, 55, 55, 55] total 81 [2018-09-10 10:16:37,174 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:37,174 INFO L459 AbstractCegarLoop]: Interpolant automaton has 81 states [2018-09-10 10:16:37,174 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 81 interpolants. [2018-09-10 10:16:37,175 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1511, Invalid=4969, Unknown=0, NotChecked=0, Total=6480 [2018-09-10 10:16:37,175 INFO L87 Difference]: Start difference. First operand 267 states and 268 transitions. Second operand 81 states. [2018-09-10 10:16:38,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:38,925 INFO L93 Difference]: Finished difference Result 382 states and 409 transitions. [2018-09-10 10:16:38,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-09-10 10:16:38,928 INFO L78 Accepts]: Start accepts. Automaton has 81 states. Word has length 264 [2018-09-10 10:16:38,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:38,929 INFO L225 Difference]: With dead ends: 382 [2018-09-10 10:16:38,929 INFO L226 Difference]: Without dead ends: 269 [2018-09-10 10:16:38,931 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1136 GetRequests, 926 SyntacticMatches, 104 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6953 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=2672, Invalid=8884, Unknown=0, NotChecked=0, Total=11556 [2018-09-10 10:16:38,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2018-09-10 10:16:38,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 269. [2018-09-10 10:16:38,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269 states. [2018-09-10 10:16:38,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 270 transitions. [2018-09-10 10:16:38,943 INFO L78 Accepts]: Start accepts. Automaton has 269 states and 270 transitions. Word has length 264 [2018-09-10 10:16:38,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:38,943 INFO L480 AbstractCegarLoop]: Abstraction has 269 states and 270 transitions. [2018-09-10 10:16:38,943 INFO L481 AbstractCegarLoop]: Interpolant automaton has 81 states. [2018-09-10 10:16:38,943 INFO L276 IsEmpty]: Start isEmpty. Operand 269 states and 270 transitions. [2018-09-10 10:16:38,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2018-09-10 10:16:38,945 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:38,945 INFO L376 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 26, 26, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:38,945 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:38,946 INFO L82 PathProgramCache]: Analyzing trace with hash 1833968479, now seen corresponding path program 50 times [2018-09-10 10:16:38,946 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:38,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:38,946 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:16:38,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:38,947 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:38,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:39,907 INFO L134 CoverageAnalysis]: Checked inductivity of 3227 backedges. 751 proven. 1348 refuted. 0 times theorem prover too weak. 1128 trivial. 0 not checked. [2018-09-10 10:16:39,907 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:39,907 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:39,914 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:16:39,914 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:39,990 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:16:39,990 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:39,994 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:40,087 INFO L134 CoverageAnalysis]: Checked inductivity of 3227 backedges. 752 proven. 1275 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:40,088 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:40,733 INFO L134 CoverageAnalysis]: Checked inductivity of 3227 backedges. 752 proven. 1275 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:40,753 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:40,753 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:40,768 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:16:40,769 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:40,946 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:16:40,946 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:40,955 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:41,000 INFO L134 CoverageAnalysis]: Checked inductivity of 3227 backedges. 752 proven. 1275 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:41,000 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:41,627 INFO L134 CoverageAnalysis]: Checked inductivity of 3227 backedges. 752 proven. 1275 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-10 10:16:41,629 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:41,629 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 31, 31, 31, 31] total 34 [2018-09-10 10:16:41,629 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:41,630 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-09-10 10:16:41,630 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-09-10 10:16:41,630 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=418, Invalid=704, Unknown=0, NotChecked=0, Total=1122 [2018-09-10 10:16:41,630 INFO L87 Difference]: Start difference. First operand 269 states and 270 transitions. Second operand 34 states. [2018-09-10 10:16:41,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:41,983 INFO L93 Difference]: Finished difference Result 279 states and 280 transitions. [2018-09-10 10:16:41,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-09-10 10:16:41,985 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 266 [2018-09-10 10:16:41,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:41,987 INFO L225 Difference]: With dead ends: 279 [2018-09-10 10:16:41,987 INFO L226 Difference]: Without dead ends: 277 [2018-09-10 10:16:41,988 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1123 GetRequests, 983 SyntacticMatches, 106 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1590 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=431, Invalid=829, Unknown=0, NotChecked=0, Total=1260 [2018-09-10 10:16:41,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-09-10 10:16:41,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 277. [2018-09-10 10:16:41,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277 states. [2018-09-10 10:16:41,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 278 transitions. [2018-09-10 10:16:41,999 INFO L78 Accepts]: Start accepts. Automaton has 277 states and 278 transitions. Word has length 266 [2018-09-10 10:16:41,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:41,999 INFO L480 AbstractCegarLoop]: Abstraction has 277 states and 278 transitions. [2018-09-10 10:16:42,000 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-09-10 10:16:42,000 INFO L276 IsEmpty]: Start isEmpty. Operand 277 states and 278 transitions. [2018-09-10 10:16:42,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2018-09-10 10:16:42,001 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:42,001 INFO L376 BasicCegarLoop]: trace histogram [27, 27, 27, 27, 27, 26, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:42,002 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:42,002 INFO L82 PathProgramCache]: Analyzing trace with hash 883624323, now seen corresponding path program 51 times [2018-09-10 10:16:42,002 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:42,002 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:42,003 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:42,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:42,003 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:42,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:43,626 INFO L134 CoverageAnalysis]: Checked inductivity of 3432 backedges. 1430 proven. 702 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-10 10:16:43,627 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:43,627 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:43,635 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:16:43,636 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:16:43,747 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 27 check-sat command(s) [2018-09-10 10:16:43,747 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:43,753 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:45,016 INFO L134 CoverageAnalysis]: Checked inductivity of 3432 backedges. 1430 proven. 702 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-10 10:16:45,017 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:45,998 INFO L134 CoverageAnalysis]: Checked inductivity of 3432 backedges. 1430 proven. 702 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-10 10:16:46,017 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:46,018 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:46,033 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:16:46,033 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:16:46,790 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 27 check-sat command(s) [2018-09-10 10:16:46,790 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:46,800 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:46,869 INFO L134 CoverageAnalysis]: Checked inductivity of 3432 backedges. 1430 proven. 702 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-10 10:16:46,869 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:48,073 INFO L134 CoverageAnalysis]: Checked inductivity of 3432 backedges. 1430 proven. 702 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-10 10:16:48,075 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:48,075 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 57, 57, 57, 57] total 84 [2018-09-10 10:16:48,075 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:48,076 INFO L459 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-09-10 10:16:48,076 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-09-10 10:16:48,077 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1623, Invalid=5349, Unknown=0, NotChecked=0, Total=6972 [2018-09-10 10:16:48,077 INFO L87 Difference]: Start difference. First operand 277 states and 278 transitions. Second operand 84 states. [2018-09-10 10:16:49,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:49,722 INFO L93 Difference]: Finished difference Result 396 states and 424 transitions. [2018-09-10 10:16:49,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-09-10 10:16:49,722 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 274 [2018-09-10 10:16:49,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:49,723 INFO L225 Difference]: With dead ends: 396 [2018-09-10 10:16:49,723 INFO L226 Difference]: Without dead ends: 279 [2018-09-10 10:16:49,725 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1179 GetRequests, 961 SyntacticMatches, 108 SemanticMatches, 110 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7504 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=2869, Invalid=9563, Unknown=0, NotChecked=0, Total=12432 [2018-09-10 10:16:49,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2018-09-10 10:16:49,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 279. [2018-09-10 10:16:49,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 279 states. [2018-09-10 10:16:49,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 279 states to 279 states and 280 transitions. [2018-09-10 10:16:49,736 INFO L78 Accepts]: Start accepts. Automaton has 279 states and 280 transitions. Word has length 274 [2018-09-10 10:16:49,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:49,736 INFO L480 AbstractCegarLoop]: Abstraction has 279 states and 280 transitions. [2018-09-10 10:16:49,736 INFO L481 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-09-10 10:16:49,736 INFO L276 IsEmpty]: Start isEmpty. Operand 279 states and 280 transitions. [2018-09-10 10:16:49,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 277 [2018-09-10 10:16:49,738 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:49,738 INFO L376 BasicCegarLoop]: trace histogram [28, 27, 27, 27, 27, 27, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:49,738 INFO L423 AbstractCegarLoop]: === Iteration 55 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:49,739 INFO L82 PathProgramCache]: Analyzing trace with hash -1678809539, now seen corresponding path program 52 times [2018-09-10 10:16:49,739 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:49,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:49,739 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:49,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:49,740 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:49,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:50,346 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 807 proven. 1454 refuted. 0 times theorem prover too weak. 1225 trivial. 0 not checked. [2018-09-10 10:16:50,346 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:50,346 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:50,353 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:16:50,354 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:16:50,438 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:16:50,438 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:50,443 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:50,545 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 808 proven. 1378 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-10 10:16:50,546 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:51,192 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 808 proven. 1378 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-10 10:16:51,212 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:51,212 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:51,227 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:16:51,227 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:16:51,436 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:16:51,436 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:51,446 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:51,496 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 808 proven. 1378 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-10 10:16:51,497 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:52,167 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 808 proven. 1378 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-10 10:16:52,168 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:52,169 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 32, 32, 32, 32] total 35 [2018-09-10 10:16:52,169 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:52,169 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-09-10 10:16:52,170 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-09-10 10:16:52,170 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=447, Invalid=743, Unknown=0, NotChecked=0, Total=1190 [2018-09-10 10:16:52,170 INFO L87 Difference]: Start difference. First operand 279 states and 280 transitions. Second operand 35 states. [2018-09-10 10:16:52,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:16:52,553 INFO L93 Difference]: Finished difference Result 289 states and 290 transitions. [2018-09-10 10:16:52,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-09-10 10:16:52,554 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 276 [2018-09-10 10:16:52,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:16:52,556 INFO L225 Difference]: With dead ends: 289 [2018-09-10 10:16:52,556 INFO L226 Difference]: Without dead ends: 287 [2018-09-10 10:16:52,556 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1165 GetRequests, 1020 SyntacticMatches, 110 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1705 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=460, Invalid=872, Unknown=0, NotChecked=0, Total=1332 [2018-09-10 10:16:52,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states. [2018-09-10 10:16:52,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 287. [2018-09-10 10:16:52,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287 states. [2018-09-10 10:16:52,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 287 states and 288 transitions. [2018-09-10 10:16:52,565 INFO L78 Accepts]: Start accepts. Automaton has 287 states and 288 transitions. Word has length 276 [2018-09-10 10:16:52,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:16:52,565 INFO L480 AbstractCegarLoop]: Abstraction has 287 states and 288 transitions. [2018-09-10 10:16:52,565 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-09-10 10:16:52,566 INFO L276 IsEmpty]: Start isEmpty. Operand 287 states and 288 transitions. [2018-09-10 10:16:52,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 285 [2018-09-10 10:16:52,567 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:16:52,567 INFO L376 BasicCegarLoop]: trace histogram [28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:16:52,567 INFO L423 AbstractCegarLoop]: === Iteration 56 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:16:52,567 INFO L82 PathProgramCache]: Analyzing trace with hash -1941926303, now seen corresponding path program 53 times [2018-09-10 10:16:52,567 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:16:52,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:52,568 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:16:52,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:16:52,568 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:16:52,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:16:54,004 INFO L134 CoverageAnalysis]: Checked inductivity of 3699 backedges. 1539 proven. 756 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:54,005 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:54,005 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:16:54,013 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:16:54,013 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:54,131 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 28 check-sat command(s) [2018-09-10 10:16:54,131 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:54,137 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:55,419 INFO L134 CoverageAnalysis]: Checked inductivity of 3699 backedges. 1539 proven. 756 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:55,419 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:56,425 INFO L134 CoverageAnalysis]: Checked inductivity of 3699 backedges. 1539 proven. 756 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:56,446 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:16:56,447 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:16:56,461 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:16:56,461 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:16:57,273 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 28 check-sat command(s) [2018-09-10 10:16:57,273 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:16:57,282 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:16:57,374 INFO L134 CoverageAnalysis]: Checked inductivity of 3699 backedges. 1539 proven. 756 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:57,374 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:16:58,715 INFO L134 CoverageAnalysis]: Checked inductivity of 3699 backedges. 1539 proven. 756 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:16:58,717 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:16:58,717 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59, 59, 59, 59] total 87 [2018-09-10 10:16:58,718 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:16:58,718 INFO L459 AbstractCegarLoop]: Interpolant automaton has 87 states [2018-09-10 10:16:58,719 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 87 interpolants. [2018-09-10 10:16:58,719 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1739, Invalid=5743, Unknown=0, NotChecked=0, Total=7482 [2018-09-10 10:16:58,719 INFO L87 Difference]: Start difference. First operand 287 states and 288 transitions. Second operand 87 states. [2018-09-10 10:17:00,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:00,486 INFO L93 Difference]: Finished difference Result 410 states and 439 transitions. [2018-09-10 10:17:00,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-09-10 10:17:00,486 INFO L78 Accepts]: Start accepts. Automaton has 87 states. Word has length 284 [2018-09-10 10:17:00,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:00,488 INFO L225 Difference]: With dead ends: 410 [2018-09-10 10:17:00,488 INFO L226 Difference]: Without dead ends: 289 [2018-09-10 10:17:00,490 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1222 GetRequests, 996 SyntacticMatches, 112 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8076 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=3073, Invalid=10267, Unknown=0, NotChecked=0, Total=13340 [2018-09-10 10:17:00,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states. [2018-09-10 10:17:00,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 289. [2018-09-10 10:17:00,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2018-09-10 10:17:00,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 290 transitions. [2018-09-10 10:17:00,503 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 290 transitions. Word has length 284 [2018-09-10 10:17:00,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:00,503 INFO L480 AbstractCegarLoop]: Abstraction has 289 states and 290 transitions. [2018-09-10 10:17:00,503 INFO L481 AbstractCegarLoop]: Interpolant automaton has 87 states. [2018-09-10 10:17:00,503 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 290 transitions. [2018-09-10 10:17:00,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 287 [2018-09-10 10:17:00,505 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:00,505 INFO L376 BasicCegarLoop]: trace histogram [29, 28, 28, 28, 28, 28, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:00,506 INFO L423 AbstractCegarLoop]: === Iteration 57 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:00,506 INFO L82 PathProgramCache]: Analyzing trace with hash 216779419, now seen corresponding path program 54 times [2018-09-10 10:17:00,506 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:00,506 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:00,507 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:00,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:00,507 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:00,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:01,192 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 865 proven. 1564 refuted. 0 times theorem prover too weak. 1326 trivial. 0 not checked. [2018-09-10 10:17:01,193 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:01,193 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:01,200 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:17:01,200 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:17:01,325 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 29 check-sat command(s) [2018-09-10 10:17:01,326 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:01,330 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:01,436 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 866 proven. 1485 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:17:01,436 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:02,160 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 866 proven. 1485 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:17:02,181 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:02,182 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:02,196 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:17:02,196 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:17:03,025 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 29 check-sat command(s) [2018-09-10 10:17:03,025 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:03,034 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:03,078 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 866 proven. 1485 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:17:03,078 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:03,951 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 866 proven. 1485 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-10 10:17:03,953 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:03,953 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 33, 33, 33, 33] total 36 [2018-09-10 10:17:03,953 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:03,954 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-09-10 10:17:03,954 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-09-10 10:17:03,954 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=477, Invalid=783, Unknown=0, NotChecked=0, Total=1260 [2018-09-10 10:17:03,954 INFO L87 Difference]: Start difference. First operand 289 states and 290 transitions. Second operand 36 states. [2018-09-10 10:17:04,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:04,375 INFO L93 Difference]: Finished difference Result 299 states and 300 transitions. [2018-09-10 10:17:04,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-09-10 10:17:04,375 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 286 [2018-09-10 10:17:04,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:04,377 INFO L225 Difference]: With dead ends: 299 [2018-09-10 10:17:04,377 INFO L226 Difference]: Without dead ends: 297 [2018-09-10 10:17:04,378 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1207 GetRequests, 1057 SyntacticMatches, 114 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1824 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=490, Invalid=916, Unknown=0, NotChecked=0, Total=1406 [2018-09-10 10:17:04,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297 states. [2018-09-10 10:17:04,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297 to 297. [2018-09-10 10:17:04,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2018-09-10 10:17:04,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 298 transitions. [2018-09-10 10:17:04,387 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 298 transitions. Word has length 286 [2018-09-10 10:17:04,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:04,388 INFO L480 AbstractCegarLoop]: Abstraction has 297 states and 298 transitions. [2018-09-10 10:17:04,388 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-09-10 10:17:04,388 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 298 transitions. [2018-09-10 10:17:04,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 295 [2018-09-10 10:17:04,389 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:04,390 INFO L376 BasicCegarLoop]: trace histogram [29, 29, 29, 29, 29, 28, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:04,390 INFO L423 AbstractCegarLoop]: === Iteration 58 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:04,390 INFO L82 PathProgramCache]: Analyzing trace with hash 1840886975, now seen corresponding path program 55 times [2018-09-10 10:17:04,390 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:04,391 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:04,391 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:04,391 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:04,391 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:04,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:05,945 INFO L134 CoverageAnalysis]: Checked inductivity of 3976 backedges. 1652 proven. 812 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-10 10:17:05,945 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:05,945 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:05,968 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:05,969 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:17:06,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:06,057 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:07,448 INFO L134 CoverageAnalysis]: Checked inductivity of 3976 backedges. 1652 proven. 812 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-10 10:17:07,448 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:08,765 INFO L134 CoverageAnalysis]: Checked inductivity of 3976 backedges. 1652 proven. 812 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-10 10:17:08,785 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:08,786 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:08,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:08,802 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:17:08,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:08,994 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:09,069 INFO L134 CoverageAnalysis]: Checked inductivity of 3976 backedges. 1652 proven. 812 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-10 10:17:09,069 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:10,196 INFO L134 CoverageAnalysis]: Checked inductivity of 3976 backedges. 1652 proven. 812 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-10 10:17:10,198 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:10,198 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61, 61, 61, 61] total 90 [2018-09-10 10:17:10,198 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:10,199 INFO L459 AbstractCegarLoop]: Interpolant automaton has 90 states [2018-09-10 10:17:10,199 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 90 interpolants. [2018-09-10 10:17:10,200 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1859, Invalid=6151, Unknown=0, NotChecked=0, Total=8010 [2018-09-10 10:17:10,200 INFO L87 Difference]: Start difference. First operand 297 states and 298 transitions. Second operand 90 states. [2018-09-10 10:17:11,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:11,984 INFO L93 Difference]: Finished difference Result 424 states and 454 transitions. [2018-09-10 10:17:11,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-09-10 10:17:11,985 INFO L78 Accepts]: Start accepts. Automaton has 90 states. Word has length 294 [2018-09-10 10:17:11,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:11,986 INFO L225 Difference]: With dead ends: 424 [2018-09-10 10:17:11,986 INFO L226 Difference]: Without dead ends: 299 [2018-09-10 10:17:11,987 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1265 GetRequests, 1031 SyntacticMatches, 116 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8669 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=3284, Invalid=10996, Unknown=0, NotChecked=0, Total=14280 [2018-09-10 10:17:11,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299 states. [2018-09-10 10:17:11,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299 to 299. [2018-09-10 10:17:11,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 299 states. [2018-09-10 10:17:11,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 300 transitions. [2018-09-10 10:17:11,997 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 300 transitions. Word has length 294 [2018-09-10 10:17:11,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:11,997 INFO L480 AbstractCegarLoop]: Abstraction has 299 states and 300 transitions. [2018-09-10 10:17:11,997 INFO L481 AbstractCegarLoop]: Interpolant automaton has 90 states. [2018-09-10 10:17:11,997 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 300 transitions. [2018-09-10 10:17:11,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 297 [2018-09-10 10:17:11,999 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:11,999 INFO L376 BasicCegarLoop]: trace histogram [30, 29, 29, 29, 29, 29, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:11,999 INFO L423 AbstractCegarLoop]: === Iteration 59 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:11,999 INFO L82 PathProgramCache]: Analyzing trace with hash -1436913543, now seen corresponding path program 56 times [2018-09-10 10:17:12,000 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:12,000 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:12,000 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:12,000 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:12,000 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:12,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:12,536 INFO L134 CoverageAnalysis]: Checked inductivity of 4034 backedges. 925 proven. 1678 refuted. 0 times theorem prover too weak. 1431 trivial. 0 not checked. [2018-09-10 10:17:12,536 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:12,536 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:12,543 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:17:12,543 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:12,630 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:17:12,630 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:12,634 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:12,738 INFO L134 CoverageAnalysis]: Checked inductivity of 4034 backedges. 926 proven. 1596 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-10 10:17:12,739 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:13,751 INFO L134 CoverageAnalysis]: Checked inductivity of 4034 backedges. 926 proven. 1596 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-10 10:17:13,771 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:13,771 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:13,786 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:17:13,787 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:13,985 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:17:13,985 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:13,994 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:14,049 INFO L134 CoverageAnalysis]: Checked inductivity of 4034 backedges. 926 proven. 1596 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-10 10:17:14,050 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:14,837 INFO L134 CoverageAnalysis]: Checked inductivity of 4034 backedges. 926 proven. 1596 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-10 10:17:14,838 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:14,838 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 34, 34, 34, 34] total 37 [2018-09-10 10:17:14,838 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:14,839 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-09-10 10:17:14,839 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-09-10 10:17:14,839 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=508, Invalid=824, Unknown=0, NotChecked=0, Total=1332 [2018-09-10 10:17:14,839 INFO L87 Difference]: Start difference. First operand 299 states and 300 transitions. Second operand 37 states. [2018-09-10 10:17:15,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:15,297 INFO L93 Difference]: Finished difference Result 309 states and 310 transitions. [2018-09-10 10:17:15,297 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-09-10 10:17:15,297 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 296 [2018-09-10 10:17:15,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:15,299 INFO L225 Difference]: With dead ends: 309 [2018-09-10 10:17:15,299 INFO L226 Difference]: Without dead ends: 307 [2018-09-10 10:17:15,300 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1249 GetRequests, 1094 SyntacticMatches, 118 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1947 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=521, Invalid=961, Unknown=0, NotChecked=0, Total=1482 [2018-09-10 10:17:15,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307 states. [2018-09-10 10:17:15,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307 to 307. [2018-09-10 10:17:15,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307 states. [2018-09-10 10:17:15,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 308 transitions. [2018-09-10 10:17:15,308 INFO L78 Accepts]: Start accepts. Automaton has 307 states and 308 transitions. Word has length 296 [2018-09-10 10:17:15,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:15,308 INFO L480 AbstractCegarLoop]: Abstraction has 307 states and 308 transitions. [2018-09-10 10:17:15,309 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-09-10 10:17:15,309 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 308 transitions. [2018-09-10 10:17:15,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 305 [2018-09-10 10:17:15,310 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:15,310 INFO L376 BasicCegarLoop]: trace histogram [30, 30, 30, 30, 30, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:15,310 INFO L423 AbstractCegarLoop]: === Iteration 60 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:15,311 INFO L82 PathProgramCache]: Analyzing trace with hash 1812700317, now seen corresponding path program 57 times [2018-09-10 10:17:15,311 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:15,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:15,311 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:15,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:15,311 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:15,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:16,609 INFO L134 CoverageAnalysis]: Checked inductivity of 4263 backedges. 1769 proven. 870 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:17:16,609 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:16,609 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:16,617 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:17:16,617 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:17:16,746 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 30 check-sat command(s) [2018-09-10 10:17:16,747 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:16,751 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:18,264 INFO L134 CoverageAnalysis]: Checked inductivity of 4263 backedges. 1769 proven. 870 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:17:18,264 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:19,774 INFO L134 CoverageAnalysis]: Checked inductivity of 4263 backedges. 1769 proven. 870 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:17:19,794 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:19,795 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:19,809 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:17:19,809 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:17:20,775 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 30 check-sat command(s) [2018-09-10 10:17:20,775 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:20,784 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:20,862 INFO L134 CoverageAnalysis]: Checked inductivity of 4263 backedges. 1769 proven. 870 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:17:20,863 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:22,057 INFO L134 CoverageAnalysis]: Checked inductivity of 4263 backedges. 1769 proven. 870 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:17:22,059 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:22,059 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [63, 63, 63, 63, 63] total 93 [2018-09-10 10:17:22,059 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:22,060 INFO L459 AbstractCegarLoop]: Interpolant automaton has 93 states [2018-09-10 10:17:22,060 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 93 interpolants. [2018-09-10 10:17:22,061 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1983, Invalid=6573, Unknown=0, NotChecked=0, Total=8556 [2018-09-10 10:17:22,061 INFO L87 Difference]: Start difference. First operand 307 states and 308 transitions. Second operand 93 states. [2018-09-10 10:17:24,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:24,097 INFO L93 Difference]: Finished difference Result 438 states and 469 transitions. [2018-09-10 10:17:24,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-09-10 10:17:24,098 INFO L78 Accepts]: Start accepts. Automaton has 93 states. Word has length 304 [2018-09-10 10:17:24,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:24,099 INFO L225 Difference]: With dead ends: 438 [2018-09-10 10:17:24,099 INFO L226 Difference]: Without dead ends: 309 [2018-09-10 10:17:24,100 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1308 GetRequests, 1066 SyntacticMatches, 120 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9283 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=3502, Invalid=11750, Unknown=0, NotChecked=0, Total=15252 [2018-09-10 10:17:24,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-09-10 10:17:24,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 309. [2018-09-10 10:17:24,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 309 states. [2018-09-10 10:17:24,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 309 states to 309 states and 310 transitions. [2018-09-10 10:17:24,137 INFO L78 Accepts]: Start accepts. Automaton has 309 states and 310 transitions. Word has length 304 [2018-09-10 10:17:24,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:24,137 INFO L480 AbstractCegarLoop]: Abstraction has 309 states and 310 transitions. [2018-09-10 10:17:24,137 INFO L481 AbstractCegarLoop]: Interpolant automaton has 93 states. [2018-09-10 10:17:24,137 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 310 transitions. [2018-09-10 10:17:24,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 307 [2018-09-10 10:17:24,139 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:24,139 INFO L376 BasicCegarLoop]: trace histogram [31, 30, 30, 30, 30, 30, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:24,139 INFO L423 AbstractCegarLoop]: === Iteration 61 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:24,140 INFO L82 PathProgramCache]: Analyzing trace with hash -1654097961, now seen corresponding path program 58 times [2018-09-10 10:17:24,140 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:24,140 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:24,140 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:24,140 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:24,141 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:24,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:24,708 INFO L134 CoverageAnalysis]: Checked inductivity of 4323 backedges. 987 proven. 1796 refuted. 0 times theorem prover too weak. 1540 trivial. 0 not checked. [2018-09-10 10:17:24,709 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:24,709 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:24,716 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:17:24,717 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:17:24,810 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:17:24,810 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:24,814 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:24,944 INFO L134 CoverageAnalysis]: Checked inductivity of 4323 backedges. 988 proven. 1711 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:17:24,944 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:25,736 INFO L134 CoverageAnalysis]: Checked inductivity of 4323 backedges. 988 proven. 1711 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:17:25,757 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:25,757 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:25,771 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:17:25,772 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:17:26,009 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:17:26,010 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:26,025 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:26,083 INFO L134 CoverageAnalysis]: Checked inductivity of 4323 backedges. 988 proven. 1711 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:17:26,083 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:26,938 INFO L134 CoverageAnalysis]: Checked inductivity of 4323 backedges. 988 proven. 1711 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-10 10:17:26,940 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:26,940 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 35, 35, 35, 35] total 38 [2018-09-10 10:17:26,940 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:26,941 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-10 10:17:26,941 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-10 10:17:26,941 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=540, Invalid=866, Unknown=0, NotChecked=0, Total=1406 [2018-09-10 10:17:26,941 INFO L87 Difference]: Start difference. First operand 309 states and 310 transitions. Second operand 38 states. [2018-09-10 10:17:27,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:27,406 INFO L93 Difference]: Finished difference Result 319 states and 320 transitions. [2018-09-10 10:17:27,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-09-10 10:17:27,407 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 306 [2018-09-10 10:17:27,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:27,409 INFO L225 Difference]: With dead ends: 319 [2018-09-10 10:17:27,409 INFO L226 Difference]: Without dead ends: 317 [2018-09-10 10:17:27,409 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1291 GetRequests, 1131 SyntacticMatches, 122 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2074 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=553, Invalid=1007, Unknown=0, NotChecked=0, Total=1560 [2018-09-10 10:17:27,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-09-10 10:17:27,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 317. [2018-09-10 10:17:27,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2018-09-10 10:17:27,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 318 transitions. [2018-09-10 10:17:27,422 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 318 transitions. Word has length 306 [2018-09-10 10:17:27,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:27,422 INFO L480 AbstractCegarLoop]: Abstraction has 317 states and 318 transitions. [2018-09-10 10:17:27,423 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-10 10:17:27,423 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 318 transitions. [2018-09-10 10:17:27,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 315 [2018-09-10 10:17:27,424 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:27,425 INFO L376 BasicCegarLoop]: trace histogram [31, 31, 31, 31, 31, 30, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:27,425 INFO L423 AbstractCegarLoop]: === Iteration 62 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:27,425 INFO L82 PathProgramCache]: Analyzing trace with hash -1052547589, now seen corresponding path program 59 times [2018-09-10 10:17:27,425 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:27,426 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:27,426 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:27,426 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:27,426 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:27,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:29,063 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 1890 proven. 930 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-10 10:17:29,063 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:29,063 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:29,073 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:17:29,073 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:29,194 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 31 check-sat command(s) [2018-09-10 10:17:29,194 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:29,201 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:31,030 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 1890 proven. 930 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-10 10:17:31,030 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:32,331 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 1890 proven. 930 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-10 10:17:32,352 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:32,352 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:32,367 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:17:32,367 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:33,354 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 31 check-sat command(s) [2018-09-10 10:17:33,354 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:33,365 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:33,478 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 1890 proven. 930 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-10 10:17:33,479 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:35,006 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 1890 proven. 930 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-10 10:17:35,008 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:35,008 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65, 65, 65, 65] total 96 [2018-09-10 10:17:35,008 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:35,009 INFO L459 AbstractCegarLoop]: Interpolant automaton has 96 states [2018-09-10 10:17:35,009 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2018-09-10 10:17:35,010 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2111, Invalid=7009, Unknown=0, NotChecked=0, Total=9120 [2018-09-10 10:17:35,010 INFO L87 Difference]: Start difference. First operand 317 states and 318 transitions. Second operand 96 states. [2018-09-10 10:17:37,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:37,078 INFO L93 Difference]: Finished difference Result 452 states and 484 transitions. [2018-09-10 10:17:37,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-09-10 10:17:37,078 INFO L78 Accepts]: Start accepts. Automaton has 96 states. Word has length 314 [2018-09-10 10:17:37,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:37,080 INFO L225 Difference]: With dead ends: 452 [2018-09-10 10:17:37,080 INFO L226 Difference]: Without dead ends: 319 [2018-09-10 10:17:37,081 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1351 GetRequests, 1101 SyntacticMatches, 124 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9918 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=3727, Invalid=12529, Unknown=0, NotChecked=0, Total=16256 [2018-09-10 10:17:37,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states. [2018-09-10 10:17:37,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 319. [2018-09-10 10:17:37,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 319 states. [2018-09-10 10:17:37,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 319 states to 319 states and 320 transitions. [2018-09-10 10:17:37,095 INFO L78 Accepts]: Start accepts. Automaton has 319 states and 320 transitions. Word has length 314 [2018-09-10 10:17:37,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:37,095 INFO L480 AbstractCegarLoop]: Abstraction has 319 states and 320 transitions. [2018-09-10 10:17:37,096 INFO L481 AbstractCegarLoop]: Interpolant automaton has 96 states. [2018-09-10 10:17:37,096 INFO L276 IsEmpty]: Start isEmpty. Operand 319 states and 320 transitions. [2018-09-10 10:17:37,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 317 [2018-09-10 10:17:37,098 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:37,098 INFO L376 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 31, 31, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:37,098 INFO L423 AbstractCegarLoop]: === Iteration 63 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:37,098 INFO L82 PathProgramCache]: Analyzing trace with hash 1348141237, now seen corresponding path program 60 times [2018-09-10 10:17:37,099 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:37,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:37,099 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:37,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:37,100 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:37,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:37,744 INFO L134 CoverageAnalysis]: Checked inductivity of 4622 backedges. 1051 proven. 1918 refuted. 0 times theorem prover too weak. 1653 trivial. 0 not checked. [2018-09-10 10:17:37,745 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:37,745 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:37,752 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:17:37,752 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:17:38,021 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 32 check-sat command(s) [2018-09-10 10:17:38,022 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:38,026 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:38,134 INFO L134 CoverageAnalysis]: Checked inductivity of 4622 backedges. 1052 proven. 1830 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-10 10:17:38,134 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:39,190 INFO L134 CoverageAnalysis]: Checked inductivity of 4622 backedges. 1052 proven. 1830 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-10 10:17:39,210 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:39,210 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:39,225 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-10 10:17:39,225 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-10 10:17:40,209 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 32 check-sat command(s) [2018-09-10 10:17:40,209 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:40,221 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:40,281 INFO L134 CoverageAnalysis]: Checked inductivity of 4622 backedges. 1052 proven. 1830 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-10 10:17:40,281 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:41,189 INFO L134 CoverageAnalysis]: Checked inductivity of 4622 backedges. 1052 proven. 1830 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-10 10:17:41,191 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:41,191 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 36, 36, 36, 36] total 39 [2018-09-10 10:17:41,191 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:41,192 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-09-10 10:17:41,192 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-09-10 10:17:41,192 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=909, Unknown=0, NotChecked=0, Total=1482 [2018-09-10 10:17:41,193 INFO L87 Difference]: Start difference. First operand 319 states and 320 transitions. Second operand 39 states. [2018-09-10 10:17:41,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:41,629 INFO L93 Difference]: Finished difference Result 329 states and 330 transitions. [2018-09-10 10:17:41,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-09-10 10:17:41,630 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 316 [2018-09-10 10:17:41,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:41,632 INFO L225 Difference]: With dead ends: 329 [2018-09-10 10:17:41,632 INFO L226 Difference]: Without dead ends: 327 [2018-09-10 10:17:41,633 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1333 GetRequests, 1168 SyntacticMatches, 126 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2205 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=586, Invalid=1054, Unknown=0, NotChecked=0, Total=1640 [2018-09-10 10:17:41,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2018-09-10 10:17:41,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 327. [2018-09-10 10:17:41,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2018-09-10 10:17:41,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 328 transitions. [2018-09-10 10:17:41,642 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 328 transitions. Word has length 316 [2018-09-10 10:17:41,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:41,642 INFO L480 AbstractCegarLoop]: Abstraction has 327 states and 328 transitions. [2018-09-10 10:17:41,642 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-09-10 10:17:41,642 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 328 transitions. [2018-09-10 10:17:41,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2018-09-10 10:17:41,644 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:41,644 INFO L376 BasicCegarLoop]: trace histogram [32, 32, 32, 32, 32, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:41,644 INFO L423 AbstractCegarLoop]: === Iteration 64 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:41,645 INFO L82 PathProgramCache]: Analyzing trace with hash 1350971609, now seen corresponding path program 61 times [2018-09-10 10:17:41,645 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:41,645 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:41,645 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:41,645 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:41,645 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:41,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:43,060 INFO L134 CoverageAnalysis]: Checked inductivity of 4867 backedges. 2015 proven. 992 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:43,061 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:43,061 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:43,068 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:43,068 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:17:43,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:43,167 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:45,099 INFO L134 CoverageAnalysis]: Checked inductivity of 4867 backedges. 2015 proven. 992 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:45,100 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:46,483 INFO L134 CoverageAnalysis]: Checked inductivity of 4867 backedges. 2015 proven. 992 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:46,503 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:46,503 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:46,521 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:46,521 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-10 10:17:46,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:46,730 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:46,822 INFO L134 CoverageAnalysis]: Checked inductivity of 4867 backedges. 2015 proven. 992 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:46,823 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:48,120 INFO L134 CoverageAnalysis]: Checked inductivity of 4867 backedges. 2015 proven. 992 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:48,121 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:48,122 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 67, 67, 67, 67] total 99 [2018-09-10 10:17:48,122 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:48,122 INFO L459 AbstractCegarLoop]: Interpolant automaton has 99 states [2018-09-10 10:17:48,123 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2018-09-10 10:17:48,123 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2243, Invalid=7459, Unknown=0, NotChecked=0, Total=9702 [2018-09-10 10:17:48,123 INFO L87 Difference]: Start difference. First operand 327 states and 328 transitions. Second operand 99 states. [2018-09-10 10:17:50,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:50,322 INFO L93 Difference]: Finished difference Result 466 states and 499 transitions. [2018-09-10 10:17:50,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-09-10 10:17:50,322 INFO L78 Accepts]: Start accepts. Automaton has 99 states. Word has length 324 [2018-09-10 10:17:50,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:50,324 INFO L225 Difference]: With dead ends: 466 [2018-09-10 10:17:50,324 INFO L226 Difference]: Without dead ends: 329 [2018-09-10 10:17:50,325 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1394 GetRequests, 1136 SyntacticMatches, 128 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10574 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=3959, Invalid=13333, Unknown=0, NotChecked=0, Total=17292 [2018-09-10 10:17:50,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-09-10 10:17:50,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 329. [2018-09-10 10:17:50,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2018-09-10 10:17:50,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 330 transitions. [2018-09-10 10:17:50,335 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 330 transitions. Word has length 324 [2018-09-10 10:17:50,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:50,335 INFO L480 AbstractCegarLoop]: Abstraction has 329 states and 330 transitions. [2018-09-10 10:17:50,335 INFO L481 AbstractCegarLoop]: Interpolant automaton has 99 states. [2018-09-10 10:17:50,335 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 330 transitions. [2018-09-10 10:17:50,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327 [2018-09-10 10:17:50,337 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:50,337 INFO L376 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:50,337 INFO L423 AbstractCegarLoop]: === Iteration 65 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:50,338 INFO L82 PathProgramCache]: Analyzing trace with hash -259052781, now seen corresponding path program 62 times [2018-09-10 10:17:50,338 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:50,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:50,338 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-10 10:17:50,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:50,338 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:50,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:51,469 INFO L134 CoverageAnalysis]: Checked inductivity of 4931 backedges. 1117 proven. 2044 refuted. 0 times theorem prover too weak. 1770 trivial. 0 not checked. [2018-09-10 10:17:51,470 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:51,470 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:51,478 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:17:51,478 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:51,577 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:17:51,578 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:51,582 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:51,708 INFO L134 CoverageAnalysis]: Checked inductivity of 4931 backedges. 1118 proven. 1953 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:51,708 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:52,618 INFO L134 CoverageAnalysis]: Checked inductivity of 4931 backedges. 1118 proven. 1953 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:52,640 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:52,640 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:52,655 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-10 10:17:52,655 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:17:52,877 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-10 10:17:52,877 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:52,886 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:52,942 INFO L134 CoverageAnalysis]: Checked inductivity of 4931 backedges. 1118 proven. 1953 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:52,942 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:53,817 INFO L134 CoverageAnalysis]: Checked inductivity of 4931 backedges. 1118 proven. 1953 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-10 10:17:53,819 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:17:53,820 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 37, 37, 37, 37] total 40 [2018-09-10 10:17:53,820 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:17:53,821 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-09-10 10:17:53,821 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-09-10 10:17:53,821 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=607, Invalid=953, Unknown=0, NotChecked=0, Total=1560 [2018-09-10 10:17:53,821 INFO L87 Difference]: Start difference. First operand 329 states and 330 transitions. Second operand 40 states. [2018-09-10 10:17:54,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:17:54,407 INFO L93 Difference]: Finished difference Result 339 states and 340 transitions. [2018-09-10 10:17:54,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-10 10:17:54,407 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 326 [2018-09-10 10:17:54,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:17:54,409 INFO L225 Difference]: With dead ends: 339 [2018-09-10 10:17:54,409 INFO L226 Difference]: Without dead ends: 337 [2018-09-10 10:17:54,409 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1375 GetRequests, 1205 SyntacticMatches, 130 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2340 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=620, Invalid=1102, Unknown=0, NotChecked=0, Total=1722 [2018-09-10 10:17:54,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337 states. [2018-09-10 10:17:54,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337 to 337. [2018-09-10 10:17:54,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2018-09-10 10:17:54,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 338 transitions. [2018-09-10 10:17:54,442 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 338 transitions. Word has length 326 [2018-09-10 10:17:54,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:17:54,442 INFO L480 AbstractCegarLoop]: Abstraction has 337 states and 338 transitions. [2018-09-10 10:17:54,442 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-09-10 10:17:54,442 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 338 transitions. [2018-09-10 10:17:54,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335 [2018-09-10 10:17:54,445 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:17:54,445 INFO L376 BasicCegarLoop]: trace histogram [33, 33, 33, 33, 33, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:17:54,445 INFO L423 AbstractCegarLoop]: === Iteration 66 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:17:54,446 INFO L82 PathProgramCache]: Analyzing trace with hash 672210231, now seen corresponding path program 63 times [2018-09-10 10:17:54,446 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:17:54,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:54,448 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:17:54,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:17:54,448 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:17:54,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:17:56,049 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 2144 proven. 1056 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-10 10:17:56,050 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:56,050 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:17:56,059 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:17:56,059 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:17:56,202 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 33 check-sat command(s) [2018-09-10 10:17:56,203 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:17:56,207 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:17:57,977 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 2144 proven. 1056 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-10 10:17:57,977 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:17:59,386 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 2144 proven. 1056 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-10 10:17:59,420 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:17:59,420 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:17:59,435 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-10 10:17:59,435 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-10 10:18:00,564 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 33 check-sat command(s) [2018-09-10 10:18:00,564 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:18:00,587 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:18:00,680 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 2144 proven. 1056 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-10 10:18:00,680 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:18:02,096 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 2144 proven. 1056 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-10 10:18:02,098 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:18:02,098 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [69, 69, 69, 69, 69] total 102 [2018-09-10 10:18:02,098 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:18:02,099 INFO L459 AbstractCegarLoop]: Interpolant automaton has 102 states [2018-09-10 10:18:02,099 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 102 interpolants. [2018-09-10 10:18:02,100 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2379, Invalid=7923, Unknown=0, NotChecked=0, Total=10302 [2018-09-10 10:18:02,100 INFO L87 Difference]: Start difference. First operand 337 states and 338 transitions. Second operand 102 states. [2018-09-10 10:18:04,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:18:04,522 INFO L93 Difference]: Finished difference Result 480 states and 514 transitions. [2018-09-10 10:18:04,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2018-09-10 10:18:04,523 INFO L78 Accepts]: Start accepts. Automaton has 102 states. Word has length 334 [2018-09-10 10:18:04,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:18:04,524 INFO L225 Difference]: With dead ends: 480 [2018-09-10 10:18:04,524 INFO L226 Difference]: Without dead ends: 339 [2018-09-10 10:18:04,526 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1437 GetRequests, 1171 SyntacticMatches, 132 SemanticMatches, 134 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11251 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=4198, Invalid=14162, Unknown=0, NotChecked=0, Total=18360 [2018-09-10 10:18:04,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 339 states. [2018-09-10 10:18:04,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 339 to 339. [2018-09-10 10:18:04,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 339 states. [2018-09-10 10:18:04,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 339 states to 339 states and 340 transitions. [2018-09-10 10:18:04,540 INFO L78 Accepts]: Start accepts. Automaton has 339 states and 340 transitions. Word has length 334 [2018-09-10 10:18:04,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:18:04,540 INFO L480 AbstractCegarLoop]: Abstraction has 339 states and 340 transitions. [2018-09-10 10:18:04,540 INFO L481 AbstractCegarLoop]: Interpolant automaton has 102 states. [2018-09-10 10:18:04,540 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 340 transitions. [2018-09-10 10:18:04,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2018-09-10 10:18:04,542 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:18:04,542 INFO L376 BasicCegarLoop]: trace histogram [34, 33, 33, 33, 33, 33, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:18:04,542 INFO L423 AbstractCegarLoop]: === Iteration 67 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:18:04,542 INFO L82 PathProgramCache]: Analyzing trace with hash 1887049457, now seen corresponding path program 64 times [2018-09-10 10:18:04,542 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:18:04,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:18:04,543 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:18:04,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:18:04,543 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:18:04,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:18:05,331 INFO L134 CoverageAnalysis]: Checked inductivity of 5250 backedges. 1185 proven. 2174 refuted. 0 times theorem prover too weak. 1891 trivial. 0 not checked. [2018-09-10 10:18:05,331 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:18:05,331 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:18:05,340 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:18:05,340 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:18:05,442 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:18:05,442 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:18:05,447 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:18:05,608 INFO L134 CoverageAnalysis]: Checked inductivity of 5250 backedges. 1186 proven. 2080 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-10 10:18:05,609 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:18:06,562 INFO L134 CoverageAnalysis]: Checked inductivity of 5250 backedges. 1186 proven. 2080 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-10 10:18:06,582 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:18:06,582 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 129 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 129 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:18:06,598 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-10 10:18:06,598 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-10 10:18:06,871 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-10 10:18:06,871 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:18:06,881 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:18:06,941 INFO L134 CoverageAnalysis]: Checked inductivity of 5250 backedges. 1186 proven. 2080 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-10 10:18:06,942 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:18:07,871 INFO L134 CoverageAnalysis]: Checked inductivity of 5250 backedges. 1186 proven. 2080 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-10 10:18:07,873 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:18:07,874 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 38, 38, 38, 38] total 41 [2018-09-10 10:18:07,874 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:18:07,875 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-09-10 10:18:07,875 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-09-10 10:18:07,875 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=642, Invalid=998, Unknown=0, NotChecked=0, Total=1640 [2018-09-10 10:18:07,876 INFO L87 Difference]: Start difference. First operand 339 states and 340 transitions. Second operand 41 states. [2018-09-10 10:18:08,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:18:08,366 INFO L93 Difference]: Finished difference Result 349 states and 350 transitions. [2018-09-10 10:18:08,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-09-10 10:18:08,366 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 336 [2018-09-10 10:18:08,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:18:08,368 INFO L225 Difference]: With dead ends: 349 [2018-09-10 10:18:08,369 INFO L226 Difference]: Without dead ends: 347 [2018-09-10 10:18:08,369 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1417 GetRequests, 1242 SyntacticMatches, 134 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2479 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=655, Invalid=1151, Unknown=0, NotChecked=0, Total=1806 [2018-09-10 10:18:08,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-09-10 10:18:08,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 347. [2018-09-10 10:18:08,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 347 states. [2018-09-10 10:18:08,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 347 states to 347 states and 348 transitions. [2018-09-10 10:18:08,379 INFO L78 Accepts]: Start accepts. Automaton has 347 states and 348 transitions. Word has length 336 [2018-09-10 10:18:08,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:18:08,379 INFO L480 AbstractCegarLoop]: Abstraction has 347 states and 348 transitions. [2018-09-10 10:18:08,379 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-09-10 10:18:08,379 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 348 transitions. [2018-09-10 10:18:08,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 345 [2018-09-10 10:18:08,380 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:18:08,380 INFO L376 BasicCegarLoop]: trace histogram [34, 34, 34, 34, 34, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:18:08,381 INFO L423 AbstractCegarLoop]: === Iteration 68 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:18:08,381 INFO L82 PathProgramCache]: Analyzing trace with hash -2093397227, now seen corresponding path program 65 times [2018-09-10 10:18:08,381 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:18:08,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:18:08,382 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:18:08,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:18:08,382 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:18:08,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-10 10:18:10,365 INFO L134 CoverageAnalysis]: Checked inductivity of 5511 backedges. 2277 proven. 1122 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:18:10,366 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:18:10,366 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 130 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 130 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-10 10:18:10,373 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:18:10,373 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:18:10,523 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2018-09-10 10:18:10,523 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:18:10,529 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:18:12,384 INFO L134 CoverageAnalysis]: Checked inductivity of 5511 backedges. 2277 proven. 1122 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:18:12,384 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:18:13,891 INFO L134 CoverageAnalysis]: Checked inductivity of 5511 backedges. 2277 proven. 1122 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:18:13,912 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-10 10:18:13,912 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 131 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 131 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-10 10:18:13,927 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-10 10:18:13,927 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-10 10:18:15,110 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2018-09-10 10:18:15,111 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-10 10:18:15,122 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-10 10:18:15,232 INFO L134 CoverageAnalysis]: Checked inductivity of 5511 backedges. 2277 proven. 1122 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:18:15,232 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-10 10:18:16,794 INFO L134 CoverageAnalysis]: Checked inductivity of 5511 backedges. 2277 proven. 1122 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-10 10:18:16,796 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-10 10:18:16,796 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [71, 71, 71, 71, 71] total 105 [2018-09-10 10:18:16,796 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-10 10:18:16,797 INFO L459 AbstractCegarLoop]: Interpolant automaton has 105 states [2018-09-10 10:18:16,797 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 105 interpolants. [2018-09-10 10:18:16,798 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2519, Invalid=8401, Unknown=0, NotChecked=0, Total=10920 [2018-09-10 10:18:16,798 INFO L87 Difference]: Start difference. First operand 347 states and 348 transitions. Second operand 105 states. [2018-09-10 10:18:19,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-10 10:18:19,137 INFO L93 Difference]: Finished difference Result 494 states and 529 transitions. [2018-09-10 10:18:19,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-09-10 10:18:19,137 INFO L78 Accepts]: Start accepts. Automaton has 105 states. Word has length 344 [2018-09-10 10:18:19,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-10 10:18:19,138 INFO L225 Difference]: With dead ends: 494 [2018-09-10 10:18:19,138 INFO L226 Difference]: Without dead ends: 349 [2018-09-10 10:18:19,140 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1480 GetRequests, 1206 SyntacticMatches, 136 SemanticMatches, 138 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11949 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=4444, Invalid=15016, Unknown=0, NotChecked=0, Total=19460 [2018-09-10 10:18:19,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349 states. [2018-09-10 10:18:19,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349 to 349. [2018-09-10 10:18:19,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 349 states. [2018-09-10 10:18:19,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 349 states and 350 transitions. [2018-09-10 10:18:19,152 INFO L78 Accepts]: Start accepts. Automaton has 349 states and 350 transitions. Word has length 344 [2018-09-10 10:18:19,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-10 10:18:19,153 INFO L480 AbstractCegarLoop]: Abstraction has 349 states and 350 transitions. [2018-09-10 10:18:19,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 105 states. [2018-09-10 10:18:19,153 INFO L276 IsEmpty]: Start isEmpty. Operand 349 states and 350 transitions. [2018-09-10 10:18:19,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 347 [2018-09-10 10:18:19,154 INFO L368 BasicCegarLoop]: Found error trace [2018-09-10 10:18:19,154 INFO L376 BasicCegarLoop]: trace histogram [35, 34, 34, 34, 34, 34, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-10 10:18:19,155 INFO L423 AbstractCegarLoop]: === Iteration 69 === [__U_MULTI_f_storage_repos_ultimate_trunk_examples_svcomp_loop_invgen_up_true_unreach_call_true_termination_i____VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-10 10:18:19,155 INFO L82 PathProgramCache]: Analyzing trace with hash 162063439, now seen corresponding path program 66 times [2018-09-10 10:18:19,155 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-10 10:18:19,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:18:19,156 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-10 10:18:19,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-10 10:18:19,156 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-10 10:18:19,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat Received shutdown request... [2018-09-10 10:18:19,526 WARN L549 AbstractCegarLoop]: Verification canceled [2018-09-10 10:18:19,529 WARN L206 ceAbstractionStarter]: Timeout [2018-09-10 10:18:19,530 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.09 10:18:19 BoogieIcfgContainer [2018-09-10 10:18:19,530 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-10 10:18:19,530 INFO L168 Benchmark]: Toolchain (without parser) took 232340.60 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 748.7 MB). Free memory was 1.4 GB in the beginning and 1.9 GB in the end (delta: -448.3 MB). Peak memory consumption was 300.4 MB. Max. memory is 7.1 GB. [2018-09-10 10:18:19,531 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-10 10:18:19,531 INFO L168 Benchmark]: CACSL2BoogieTranslator took 285.47 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-09-10 10:18:19,532 INFO L168 Benchmark]: Boogie Procedure Inliner took 23.96 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-10 10:18:19,532 INFO L168 Benchmark]: Boogie Preprocessor took 33.73 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-10 10:18:19,532 INFO L168 Benchmark]: RCFGBuilder took 460.96 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 731.4 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -772.9 MB). Peak memory consumption was 26.9 MB. Max. memory is 7.1 GB. [2018-09-10 10:18:19,533 INFO L168 Benchmark]: TraceAbstraction took 231530.34 ms. Allocated memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 17.3 MB). Free memory was 2.2 GB in the beginning and 1.9 GB in the end (delta: 314.1 MB). Peak memory consumption was 331.4 MB. Max. memory is 7.1 GB. [2018-09-10 10:18:19,535 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 285.47 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 23.96 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 33.73 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 460.96 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 731.4 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -772.9 MB). Peak memory consumption was 26.9 MB. Max. memory is 7.1 GB. * TraceAbstraction took 231530.34 ms. Allocated memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 17.3 MB). Free memory was 2.2 GB in the beginning and 1.9 GB in the end (delta: 314.1 MB). Peak memory consumption was 331.4 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was analyzing trace of length 347 with TraceHistMax 35, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 27 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 22 locations, 1 error locations. TIMEOUT Result, 231.4s OverallTime, 69 OverallIterations, 35 TraceHistogramMax, 50.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3178 SDtfs, 2468 SDslu, 33111 SDs, 0 SdLazy, 39323 SolverSat, 2830 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 26.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 50664 GetRequests, 42716 SyntacticMatches, 4680 SemanticMatches, 3268 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170576 ImplicationChecksByTransitivity, 149.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=349occurred in iteration=68, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.7s AutomataMinimizationTime, 68 MinimizatonAttempts, 5 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.5s SsaConstructionTime, 22.6s SatisfiabilityAnalysisTime, 150.4s InterpolantComputationTime, 35635 NumberOfCodeBlocks, 35635 NumberOfCodeBlocksAsserted, 1362 NumberOfCheckSat, 59035 ConstructedInterpolants, 0 QuantifiedInterpolants, 37344695 SizeOfPredicates, 392 NumberOfNonLiveVariables, 50412 ConjunctsInSsa, 5132 ConjunctsInUnsatCore, 328 InterpolantComputations, 3 PerfectInterpolantSequences, 431707/615717 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/up_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-09-10_10-18-19-543.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/up_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-10_10-18-19-543.csv Completed graceful shutdown