java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-invgen/fragtest_simple_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dace188-m [2018-09-14 15:50:52,952 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-14 15:50:52,955 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-14 15:50:52,972 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-14 15:50:52,972 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-14 15:50:52,974 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-14 15:50:52,975 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-14 15:50:52,978 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-14 15:50:52,980 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-14 15:50:52,981 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-14 15:50:52,989 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-14 15:50:52,989 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-14 15:50:52,990 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-14 15:50:52,992 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-14 15:50:52,993 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-14 15:50:52,996 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-14 15:50:52,998 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-14 15:50:53,001 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-14 15:50:53,006 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-14 15:50:53,011 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-14 15:50:53,012 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-14 15:50:53,014 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-14 15:50:53,016 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-14 15:50:53,016 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-14 15:50:53,016 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-14 15:50:53,020 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-14 15:50:53,020 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-14 15:50:53,021 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-14 15:50:53,024 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-14 15:50:53,026 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-14 15:50:53,027 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-14 15:50:53,028 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-09-14 15:50:53,032 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-14 15:50:53,057 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-14 15:50:53,058 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-14 15:50:53,062 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-14 15:50:53,063 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-14 15:50:53,063 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-14 15:50:53,063 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-14 15:50:53,063 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-14 15:50:53,064 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-14 15:50:53,064 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-14 15:50:53,064 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-14 15:50:53,064 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-14 15:50:53,065 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-14 15:50:53,065 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-14 15:50:53,065 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-14 15:50:53,066 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-14 15:50:53,066 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-14 15:50:53,066 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-14 15:50:53,066 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-14 15:50:53,066 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-14 15:50:53,067 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-14 15:50:53,067 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-14 15:50:53,067 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-14 15:50:53,067 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-14 15:50:53,067 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-14 15:50:53,067 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-14 15:50:53,068 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-14 15:50:53,068 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-14 15:50:53,068 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-14 15:50:53,068 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-14 15:50:53,068 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-14 15:50:53,069 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-14 15:50:53,069 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-14 15:50:53,069 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-14 15:50:53,117 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-14 15:50:53,132 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-14 15:50:53,138 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-14 15:50:53,139 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-14 15:50:53,143 INFO L276 PluginConnector]: CDTParser initialized [2018-09-14 15:50:53,144 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-invgen/fragtest_simple_true-unreach-call_true-termination.i [2018-09-14 15:50:53,485 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6413abb32/964c1d523ee5405aa5d09180bd4ae022/FLAGd6904a22e [2018-09-14 15:50:53,643 INFO L277 CDTParser]: Found 1 translation units. [2018-09-14 15:50:53,644 INFO L159 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-invgen/fragtest_simple_true-unreach-call_true-termination.i [2018-09-14 15:50:53,652 INFO L325 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6413abb32/964c1d523ee5405aa5d09180bd4ae022/FLAGd6904a22e [2018-09-14 15:50:53,674 INFO L333 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6413abb32/964c1d523ee5405aa5d09180bd4ae022 [2018-09-14 15:50:53,684 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-14 15:50:53,686 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-14 15:50:53,687 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-14 15:50:53,687 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-14 15:50:53,694 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-14 15:50:53,695 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:53,698 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2931cab2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53, skipping insertion in model container [2018-09-14 15:50:53,698 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:53,711 INFO L160 ieTranslatorObserver]: Starting translation in SV-COMP mode [2018-09-14 15:50:53,905 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-14 15:50:53,925 INFO L424 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-14 15:50:53,934 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-14 15:50:53,953 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53 WrapperNode [2018-09-14 15:50:53,954 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-14 15:50:53,954 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-14 15:50:53,955 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-14 15:50:53,955 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-14 15:50:53,964 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:53,971 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:53,978 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-14 15:50:53,979 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-14 15:50:53,979 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-14 15:50:53,979 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-14 15:50:53,990 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:53,990 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:53,991 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:53,991 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:53,994 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:54,007 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:54,014 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (1/1) ... [2018-09-14 15:50:54,016 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-14 15:50:54,019 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-14 15:50:54,019 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-14 15:50:54,020 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-14 15:50:54,021 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-14 15:50:54,078 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-14 15:50:54,079 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-14 15:50:54,079 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-14 15:50:54,079 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-14 15:50:54,079 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-14 15:50:54,079 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-14 15:50:54,080 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-09-14 15:50:54,080 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-09-14 15:50:54,489 INFO L353 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-14 15:50:54,490 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.09 03:50:54 BoogieIcfgContainer [2018-09-14 15:50:54,490 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-14 15:50:54,491 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-14 15:50:54,491 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-14 15:50:54,494 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-14 15:50:54,495 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.09 03:50:53" (1/3) ... [2018-09-14 15:50:54,495 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a59fda6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.09 03:50:54, skipping insertion in model container [2018-09-14 15:50:54,496 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:50:53" (2/3) ... [2018-09-14 15:50:54,496 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a59fda6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.09 03:50:54, skipping insertion in model container [2018-09-14 15:50:54,496 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.09 03:50:54" (3/3) ... [2018-09-14 15:50:54,498 INFO L112 eAbstractionObserver]: Analyzing ICFG fragtest_simple_true-unreach-call_true-termination.i [2018-09-14 15:50:54,517 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-14 15:50:54,534 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-14 15:50:54,591 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-14 15:50:54,592 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-14 15:50:54,592 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-14 15:50:54,592 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-14 15:50:54,593 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-14 15:50:54,593 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-14 15:50:54,593 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-14 15:50:54,593 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-14 15:50:54,593 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-14 15:50:54,613 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states. [2018-09-14 15:50:54,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-09-14 15:50:54,621 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:54,622 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:54,623 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:54,628 INFO L82 PathProgramCache]: Analyzing trace with hash 62896836, now seen corresponding path program 1 times [2018-09-14 15:50:54,631 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:54,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:54,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:50:54,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:54,689 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:54,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:54,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:54,752 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-14 15:50:54,752 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-14 15:50:54,753 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:50:54,756 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-14 15:50:54,768 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-14 15:50:54,768 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-14 15:50:54,771 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 2 states. [2018-09-14 15:50:54,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:54,794 INFO L93 Difference]: Finished difference Result 52 states and 67 transitions. [2018-09-14 15:50:54,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-14 15:50:54,795 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 16 [2018-09-14 15:50:54,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:54,805 INFO L225 Difference]: With dead ends: 52 [2018-09-14 15:50:54,805 INFO L226 Difference]: Without dead ends: 25 [2018-09-14 15:50:54,809 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-14 15:50:54,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-09-14 15:50:54,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-09-14 15:50:54,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-09-14 15:50:54,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 28 transitions. [2018-09-14 15:50:54,850 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 28 transitions. Word has length 16 [2018-09-14 15:50:54,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:54,851 INFO L480 AbstractCegarLoop]: Abstraction has 25 states and 28 transitions. [2018-09-14 15:50:54,851 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-14 15:50:54,851 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2018-09-14 15:50:54,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-09-14 15:50:54,852 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:54,852 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:54,853 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:54,853 INFO L82 PathProgramCache]: Analyzing trace with hash -111227420, now seen corresponding path program 1 times [2018-09-14 15:50:54,853 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:54,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:54,855 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:50:54,855 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:54,855 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:54,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:54,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:54,985 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-14 15:50:54,985 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-09-14 15:50:54,986 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:50:54,987 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-14 15:50:54,988 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-14 15:50:54,988 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-09-14 15:50:54,988 INFO L87 Difference]: Start difference. First operand 25 states and 28 transitions. Second operand 5 states. [2018-09-14 15:50:55,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:55,160 INFO L93 Difference]: Finished difference Result 35 states and 38 transitions. [2018-09-14 15:50:55,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-14 15:50:55,161 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-09-14 15:50:55,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:55,163 INFO L225 Difference]: With dead ends: 35 [2018-09-14 15:50:55,164 INFO L226 Difference]: Without dead ends: 33 [2018-09-14 15:50:55,165 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-09-14 15:50:55,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-09-14 15:50:55,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2018-09-14 15:50:55,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-09-14 15:50:55,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 35 transitions. [2018-09-14 15:50:55,175 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 35 transitions. Word has length 20 [2018-09-14 15:50:55,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:55,175 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 35 transitions. [2018-09-14 15:50:55,176 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-14 15:50:55,176 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 35 transitions. [2018-09-14 15:50:55,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-09-14 15:50:55,177 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:55,177 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:55,178 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:55,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1352658359, now seen corresponding path program 1 times [2018-09-14 15:50:55,178 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:55,179 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:55,179 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:50:55,179 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:55,180 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:55,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:55,305 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:55,305 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-14 15:50:55,306 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-09-14 15:50:55,306 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:50:55,306 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-14 15:50:55,307 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-14 15:50:55,307 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-09-14 15:50:55,307 INFO L87 Difference]: Start difference. First operand 32 states and 35 transitions. Second operand 5 states. [2018-09-14 15:50:55,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:55,667 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2018-09-14 15:50:55,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-14 15:50:55,668 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-09-14 15:50:55,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:55,673 INFO L225 Difference]: With dead ends: 57 [2018-09-14 15:50:55,673 INFO L226 Difference]: Without dead ends: 40 [2018-09-14 15:50:55,674 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-09-14 15:50:55,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-09-14 15:50:55,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 35. [2018-09-14 15:50:55,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-09-14 15:50:55,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 38 transitions. [2018-09-14 15:50:55,686 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 38 transitions. Word has length 29 [2018-09-14 15:50:55,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:55,686 INFO L480 AbstractCegarLoop]: Abstraction has 35 states and 38 transitions. [2018-09-14 15:50:55,686 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-14 15:50:55,686 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 38 transitions. [2018-09-14 15:50:55,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-09-14 15:50:55,687 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:55,688 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:55,688 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:55,688 INFO L82 PathProgramCache]: Analyzing trace with hash -38707475, now seen corresponding path program 1 times [2018-09-14 15:50:55,688 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:55,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:55,690 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:50:55,690 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:55,690 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:55,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:55,861 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:55,861 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:55,862 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:50:55,878 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:50:55,878 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:50:55,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:55,908 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:56,139 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:56,139 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:56,256 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:56,283 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:56,283 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:50:56,299 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:50:56,299 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:50:56,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:56,331 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:56,340 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:56,340 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:56,390 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:56,396 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:50:56,396 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6, 6, 6] total 13 [2018-09-14 15:50:56,396 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:50:56,397 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-14 15:50:56,401 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-14 15:50:56,401 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2018-09-14 15:50:56,402 INFO L87 Difference]: Start difference. First operand 35 states and 38 transitions. Second operand 11 states. [2018-09-14 15:50:57,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:57,089 INFO L93 Difference]: Finished difference Result 72 states and 83 transitions. [2018-09-14 15:50:57,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-14 15:50:57,090 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-09-14 15:50:57,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:57,092 INFO L225 Difference]: With dead ends: 72 [2018-09-14 15:50:57,093 INFO L226 Difference]: Without dead ends: 55 [2018-09-14 15:50:57,094 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 123 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=71, Invalid=271, Unknown=0, NotChecked=0, Total=342 [2018-09-14 15:50:57,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-09-14 15:50:57,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 45. [2018-09-14 15:50:57,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-09-14 15:50:57,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 49 transitions. [2018-09-14 15:50:57,104 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 49 transitions. Word has length 32 [2018-09-14 15:50:57,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:57,104 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 49 transitions. [2018-09-14 15:50:57,104 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-14 15:50:57,105 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 49 transitions. [2018-09-14 15:50:57,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-09-14 15:50:57,107 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:57,107 INFO L376 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:57,108 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:57,108 INFO L82 PathProgramCache]: Analyzing trace with hash -1515908604, now seen corresponding path program 2 times [2018-09-14 15:50:57,108 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:57,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:57,109 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:50:57,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:57,110 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:57,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:57,249 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 12 proven. 15 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-14 15:50:57,250 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:57,250 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:50:57,260 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:50:57,260 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:50:57,285 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:50:57,285 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:57,289 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:57,538 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:50:57,538 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:57,736 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:50:57,757 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:57,757 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:50:57,772 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:50:57,773 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:50:57,812 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:50:57,813 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:57,818 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:57,831 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:50:57,831 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:57,988 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:50:57,990 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:50:57,990 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 17 [2018-09-14 15:50:57,990 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:50:57,990 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-14 15:50:57,991 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-14 15:50:57,991 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2018-09-14 15:50:57,992 INFO L87 Difference]: Start difference. First operand 45 states and 49 transitions. Second operand 14 states. [2018-09-14 15:50:58,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:58,554 INFO L93 Difference]: Finished difference Result 92 states and 107 transitions. [2018-09-14 15:50:58,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-14 15:50:58,555 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-09-14 15:50:58,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:58,559 INFO L225 Difference]: With dead ends: 92 [2018-09-14 15:50:58,559 INFO L226 Difference]: Without dead ends: 70 [2018-09-14 15:50:58,560 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 168 SyntacticMatches, 6 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=125, Invalid=525, Unknown=0, NotChecked=0, Total=650 [2018-09-14 15:50:58,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-09-14 15:50:58,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 53. [2018-09-14 15:50:58,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-09-14 15:50:58,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2018-09-14 15:50:58,571 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 44 [2018-09-14 15:50:58,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:58,571 INFO L480 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2018-09-14 15:50:58,571 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-14 15:50:58,572 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2018-09-14 15:50:58,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-09-14 15:50:58,573 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:58,573 INFO L376 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:58,574 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:58,574 INFO L82 PathProgramCache]: Analyzing trace with hash 775099085, now seen corresponding path program 3 times [2018-09-14 15:50:58,574 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:58,575 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:58,575 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:50:58,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:58,576 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:58,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:58,712 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:50:58,712 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:58,712 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:50:58,720 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:50:58,721 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:50:58,767 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-14 15:50:58,768 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:58,771 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:58,905 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:50:58,905 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:59,012 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:50:59,032 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:59,032 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:50:59,048 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:50:59,048 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:50:59,105 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-14 15:50:59,105 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:59,111 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:59,139 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:50:59,139 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:59,270 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:50:59,272 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:50:59,272 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 14 [2018-09-14 15:50:59,272 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:50:59,273 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-14 15:50:59,273 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-14 15:50:59,273 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2018-09-14 15:50:59,274 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand 14 states. [2018-09-14 15:50:59,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:59,548 INFO L93 Difference]: Finished difference Result 103 states and 120 transitions. [2018-09-14 15:50:59,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-14 15:50:59,549 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 56 [2018-09-14 15:50:59,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:59,551 INFO L225 Difference]: With dead ends: 103 [2018-09-14 15:50:59,551 INFO L226 Difference]: Without dead ends: 76 [2018-09-14 15:50:59,552 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 206 SyntacticMatches, 14 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-09-14 15:50:59,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-09-14 15:50:59,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 56. [2018-09-14 15:50:59,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-09-14 15:50:59,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 61 transitions. [2018-09-14 15:50:59,562 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 61 transitions. Word has length 56 [2018-09-14 15:50:59,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:59,562 INFO L480 AbstractCegarLoop]: Abstraction has 56 states and 61 transitions. [2018-09-14 15:50:59,562 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-14 15:50:59,562 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 61 transitions. [2018-09-14 15:50:59,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-14 15:50:59,564 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:59,564 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:59,564 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:59,564 INFO L82 PathProgramCache]: Analyzing trace with hash -916783191, now seen corresponding path program 4 times [2018-09-14 15:50:59,565 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:59,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:59,566 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:50:59,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:59,566 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:59,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:59,725 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 35 proven. 31 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-09-14 15:50:59,726 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:59,726 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:50:59,735 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:50:59,735 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:50:59,767 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:50:59,767 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:59,770 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:59,871 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:50:59,871 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:59,980 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:51:00,000 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:00,001 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:00,016 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:00,016 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:00,074 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:00,074 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:00,080 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:00,093 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:51:00,094 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:00,243 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:51:00,246 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:00,246 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 9, 9, 9] total 14 [2018-09-14 15:51:00,246 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:00,247 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-14 15:51:00,247 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-14 15:51:00,248 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2018-09-14 15:51:00,249 INFO L87 Difference]: Start difference. First operand 56 states and 61 transitions. Second operand 13 states. [2018-09-14 15:51:00,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:00,468 INFO L93 Difference]: Finished difference Result 77 states and 85 transitions. [2018-09-14 15:51:00,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-14 15:51:00,469 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 59 [2018-09-14 15:51:00,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:00,471 INFO L225 Difference]: With dead ends: 77 [2018-09-14 15:51:00,472 INFO L226 Difference]: Without dead ends: 75 [2018-09-14 15:51:00,472 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 223 SyntacticMatches, 14 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2018-09-14 15:51:00,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-09-14 15:51:00,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 68. [2018-09-14 15:51:00,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-09-14 15:51:00,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 74 transitions. [2018-09-14 15:51:00,482 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 74 transitions. Word has length 59 [2018-09-14 15:51:00,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:00,482 INFO L480 AbstractCegarLoop]: Abstraction has 68 states and 74 transitions. [2018-09-14 15:51:00,483 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-14 15:51:00,483 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 74 transitions. [2018-09-14 15:51:00,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-09-14 15:51:00,484 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:00,484 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:00,485 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:00,485 INFO L82 PathProgramCache]: Analyzing trace with hash 928258569, now seen corresponding path program 5 times [2018-09-14 15:51:00,485 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:00,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:00,486 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:00,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:00,486 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:00,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:00,677 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 75 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:00,677 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:00,677 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:00,686 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:00,686 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:00,759 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-09-14 15:51:00,760 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:00,763 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:01,103 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 75 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:01,103 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:01,530 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 75 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:01,551 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:01,552 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:01,569 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:01,569 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:01,677 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-09-14 15:51:01,678 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:01,684 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:01,705 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 86 proven. 30 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-09-14 15:51:01,705 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:01,954 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 72 proven. 30 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-09-14 15:51:01,958 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:01,958 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 12, 12] total 21 [2018-09-14 15:51:01,958 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:01,960 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-14 15:51:01,961 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-14 15:51:01,961 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2018-09-14 15:51:01,962 INFO L87 Difference]: Start difference. First operand 68 states and 74 transitions. Second operand 19 states. [2018-09-14 15:51:02,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:02,337 INFO L93 Difference]: Finished difference Result 135 states and 156 transitions. [2018-09-14 15:51:02,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-14 15:51:02,344 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 77 [2018-09-14 15:51:02,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:02,345 INFO L225 Difference]: With dead ends: 135 [2018-09-14 15:51:02,345 INFO L226 Difference]: Without dead ends: 96 [2018-09-14 15:51:02,349 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 324 GetRequests, 283 SyntacticMatches, 17 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 253 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=192, Invalid=458, Unknown=0, NotChecked=0, Total=650 [2018-09-14 15:51:02,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-09-14 15:51:02,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 71. [2018-09-14 15:51:02,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-09-14 15:51:02,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 77 transitions. [2018-09-14 15:51:02,370 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 77 transitions. Word has length 77 [2018-09-14 15:51:02,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:02,370 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 77 transitions. [2018-09-14 15:51:02,370 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-14 15:51:02,370 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 77 transitions. [2018-09-14 15:51:02,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-09-14 15:51:02,372 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:02,372 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:02,372 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:02,372 INFO L82 PathProgramCache]: Analyzing trace with hash -846983507, now seen corresponding path program 6 times [2018-09-14 15:51:02,375 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:02,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:02,376 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:02,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:02,376 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:02,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:02,613 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:02,613 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:02,614 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:02,623 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:02,623 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:02,650 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2018-09-14 15:51:02,650 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:02,654 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:02,884 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:02,884 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:02,986 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:03,006 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:03,006 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:03,022 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:03,022 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:03,113 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2018-09-14 15:51:03,114 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:03,119 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:03,137 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:03,137 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:03,300 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:03,302 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:03,303 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 20 [2018-09-14 15:51:03,303 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:03,303 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-14 15:51:03,303 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-14 15:51:03,305 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2018-09-14 15:51:03,305 INFO L87 Difference]: Start difference. First operand 71 states and 77 transitions. Second operand 20 states. [2018-09-14 15:51:03,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:03,847 INFO L93 Difference]: Finished difference Result 141 states and 165 transitions. [2018-09-14 15:51:03,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-14 15:51:03,848 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 80 [2018-09-14 15:51:03,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:03,850 INFO L225 Difference]: With dead ends: 141 [2018-09-14 15:51:03,850 INFO L226 Difference]: Without dead ends: 104 [2018-09-14 15:51:03,851 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 338 GetRequests, 292 SyntacticMatches, 22 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 245 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-09-14 15:51:03,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-09-14 15:51:03,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 74. [2018-09-14 15:51:03,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-09-14 15:51:03,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 80 transitions. [2018-09-14 15:51:03,860 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 80 transitions. Word has length 80 [2018-09-14 15:51:03,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:03,860 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 80 transitions. [2018-09-14 15:51:03,860 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-14 15:51:03,861 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 80 transitions. [2018-09-14 15:51:03,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-09-14 15:51:03,862 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:03,862 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:03,862 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:03,863 INFO L82 PathProgramCache]: Analyzing trace with hash 1143613321, now seen corresponding path program 7 times [2018-09-14 15:51:03,863 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:03,863 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:03,864 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:03,864 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:03,864 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:03,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:04,018 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 72 proven. 78 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-14 15:51:04,018 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:04,018 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:04,026 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:04,026 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:04,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:04,054 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:04,097 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:04,098 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:04,257 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:04,277 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:04,277 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:04,292 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:04,292 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:04,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:04,363 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:04,375 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:04,375 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:04,648 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:51:04,649 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:04,650 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11, 11, 11] total 15 [2018-09-14 15:51:04,650 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:04,650 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-14 15:51:04,650 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-14 15:51:04,651 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-09-14 15:51:04,651 INFO L87 Difference]: Start difference. First operand 74 states and 80 transitions. Second operand 14 states. [2018-09-14 15:51:04,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:04,897 INFO L93 Difference]: Finished difference Result 90 states and 97 transitions. [2018-09-14 15:51:04,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-14 15:51:04,897 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 83 [2018-09-14 15:51:04,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:04,899 INFO L225 Difference]: With dead ends: 90 [2018-09-14 15:51:04,900 INFO L226 Difference]: Without dead ends: 88 [2018-09-14 15:51:04,900 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 351 GetRequests, 314 SyntacticMatches, 22 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2018-09-14 15:51:04,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-09-14 15:51:04,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-09-14 15:51:04,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-09-14 15:51:04,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 95 transitions. [2018-09-14 15:51:04,909 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 95 transitions. Word has length 83 [2018-09-14 15:51:04,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:04,910 INFO L480 AbstractCegarLoop]: Abstraction has 88 states and 95 transitions. [2018-09-14 15:51:04,910 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-14 15:51:04,910 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 95 transitions. [2018-09-14 15:51:04,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-09-14 15:51:04,912 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:04,912 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:04,912 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:04,913 INFO L82 PathProgramCache]: Analyzing trace with hash 643631593, now seen corresponding path program 8 times [2018-09-14 15:51:04,913 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:04,914 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:04,914 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:04,914 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:04,914 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:04,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:05,939 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 140 proven. 63 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:51:05,939 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:05,939 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:05,947 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:05,947 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:05,978 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:05,979 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:05,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:06,179 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 159 proven. 63 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2018-09-14 15:51:06,180 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:06,275 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 137 proven. 63 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-09-14 15:51:06,295 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:06,295 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:06,312 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:06,313 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:06,376 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:06,376 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:06,381 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:06,398 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 159 proven. 63 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2018-09-14 15:51:06,398 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:06,511 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 137 proven. 63 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-09-14 15:51:06,515 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:06,515 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16, 16, 16] total 24 [2018-09-14 15:51:06,515 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:06,516 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-14 15:51:06,516 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-14 15:51:06,516 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2018-09-14 15:51:06,517 INFO L87 Difference]: Start difference. First operand 88 states and 95 transitions. Second operand 24 states. [2018-09-14 15:51:06,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:06,905 INFO L93 Difference]: Finished difference Result 175 states and 203 transitions. [2018-09-14 15:51:06,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-14 15:51:06,906 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 101 [2018-09-14 15:51:06,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:06,907 INFO L225 Difference]: With dead ends: 175 [2018-09-14 15:51:06,907 INFO L226 Difference]: Without dead ends: 126 [2018-09-14 15:51:06,909 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 426 GetRequests, 371 SyntacticMatches, 26 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 375 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=262, Invalid=668, Unknown=0, NotChecked=0, Total=930 [2018-09-14 15:51:06,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-09-14 15:51:06,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 91. [2018-09-14 15:51:06,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-09-14 15:51:06,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 98 transitions. [2018-09-14 15:51:06,918 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 98 transitions. Word has length 101 [2018-09-14 15:51:06,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:06,918 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 98 transitions. [2018-09-14 15:51:06,918 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-14 15:51:06,918 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 98 transitions. [2018-09-14 15:51:06,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-09-14 15:51:06,920 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:06,920 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:06,920 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:06,920 INFO L82 PathProgramCache]: Analyzing trace with hash -1746775411, now seen corresponding path program 9 times [2018-09-14 15:51:06,921 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:06,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:06,921 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:06,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:06,922 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:06,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:07,173 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:51:07,173 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:07,173 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:07,182 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:07,182 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:07,216 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-09-14 15:51:07,217 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:07,220 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:07,416 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:51:07,417 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:07,748 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:51:07,769 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:07,769 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:07,785 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:07,785 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:07,932 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-09-14 15:51:07,932 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:07,939 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:07,964 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:51:07,965 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:08,125 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:51:08,127 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:08,127 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 26 [2018-09-14 15:51:08,127 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:08,128 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-14 15:51:08,128 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-14 15:51:08,129 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=481, Unknown=0, NotChecked=0, Total=650 [2018-09-14 15:51:08,129 INFO L87 Difference]: Start difference. First operand 91 states and 98 transitions. Second operand 26 states. [2018-09-14 15:51:08,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:08,452 INFO L93 Difference]: Finished difference Result 181 states and 212 transitions. [2018-09-14 15:51:08,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-14 15:51:08,453 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 104 [2018-09-14 15:51:08,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:08,455 INFO L225 Difference]: With dead ends: 181 [2018-09-14 15:51:08,455 INFO L226 Difference]: Without dead ends: 134 [2018-09-14 15:51:08,456 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 440 GetRequests, 378 SyntacticMatches, 30 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 462 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-09-14 15:51:08,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-09-14 15:51:08,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 94. [2018-09-14 15:51:08,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-09-14 15:51:08,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 101 transitions. [2018-09-14 15:51:08,467 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 101 transitions. Word has length 104 [2018-09-14 15:51:08,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:08,467 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 101 transitions. [2018-09-14 15:51:08,467 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-14 15:51:08,468 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 101 transitions. [2018-09-14 15:51:08,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-09-14 15:51:08,469 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:08,469 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:08,470 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:08,470 INFO L82 PathProgramCache]: Analyzing trace with hash 490903401, now seen corresponding path program 10 times [2018-09-14 15:51:08,470 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:08,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:08,471 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:08,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:08,471 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:08,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:08,758 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 121 proven. 145 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-09-14 15:51:08,759 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:08,759 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:08,767 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:08,767 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:08,799 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:08,799 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:08,801 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:08,862 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:51:08,862 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:09,062 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:51:09,082 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:09,082 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:09,101 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:09,101 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:09,184 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:09,184 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:09,190 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:09,208 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:51:09,208 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:09,590 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:51:09,592 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:09,592 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 13, 13, 13] total 18 [2018-09-14 15:51:09,592 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:09,593 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-14 15:51:09,593 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-14 15:51:09,593 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=224, Unknown=0, NotChecked=0, Total=306 [2018-09-14 15:51:09,594 INFO L87 Difference]: Start difference. First operand 94 states and 101 transitions. Second operand 17 states. [2018-09-14 15:51:09,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:09,835 INFO L93 Difference]: Finished difference Result 115 states and 125 transitions. [2018-09-14 15:51:09,835 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-14 15:51:09,836 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 107 [2018-09-14 15:51:09,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:09,838 INFO L225 Difference]: With dead ends: 115 [2018-09-14 15:51:09,838 INFO L226 Difference]: Without dead ends: 113 [2018-09-14 15:51:09,839 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 403 SyntacticMatches, 30 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 267 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2018-09-14 15:51:09,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-09-14 15:51:09,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 108. [2018-09-14 15:51:09,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-09-14 15:51:09,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 116 transitions. [2018-09-14 15:51:09,848 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 116 transitions. Word has length 107 [2018-09-14 15:51:09,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:09,848 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 116 transitions. [2018-09-14 15:51:09,848 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-14 15:51:09,848 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 116 transitions. [2018-09-14 15:51:09,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-09-14 15:51:09,850 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:09,850 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:09,850 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:09,851 INFO L82 PathProgramCache]: Analyzing trace with hash -1091747383, now seen corresponding path program 11 times [2018-09-14 15:51:09,851 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:09,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:09,852 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:09,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:09,852 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:09,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:10,110 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 225 proven. 108 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:10,111 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:10,111 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:10,117 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:10,118 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:10,160 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-14 15:51:10,160 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:10,164 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:10,443 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 225 proven. 108 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:10,443 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:10,621 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 225 proven. 108 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:10,641 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:10,642 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:10,657 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:10,657 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:10,831 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-14 15:51:10,832 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:10,837 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:10,859 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 252 proven. 108 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2018-09-14 15:51:10,859 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:11,075 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 222 proven. 108 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-09-14 15:51:11,077 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:11,077 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 20, 20] total 33 [2018-09-14 15:51:11,077 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:11,077 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-14 15:51:11,078 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-14 15:51:11,078 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=273, Invalid=783, Unknown=0, NotChecked=0, Total=1056 [2018-09-14 15:51:11,078 INFO L87 Difference]: Start difference. First operand 108 states and 116 transitions. Second operand 31 states. [2018-09-14 15:51:11,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:11,496 INFO L93 Difference]: Finished difference Result 215 states and 250 transitions. [2018-09-14 15:51:11,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-14 15:51:11,497 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 125 [2018-09-14 15:51:11,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:11,499 INFO L225 Difference]: With dead ends: 215 [2018-09-14 15:51:11,499 INFO L226 Difference]: Without dead ends: 156 [2018-09-14 15:51:11,500 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 528 GetRequests, 455 SyntacticMatches, 33 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 767 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=480, Invalid=1242, Unknown=0, NotChecked=0, Total=1722 [2018-09-14 15:51:11,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-09-14 15:51:11,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 111. [2018-09-14 15:51:11,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-09-14 15:51:11,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 119 transitions. [2018-09-14 15:51:11,510 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 119 transitions. Word has length 125 [2018-09-14 15:51:11,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:11,510 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 119 transitions. [2018-09-14 15:51:11,510 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-14 15:51:11,511 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 119 transitions. [2018-09-14 15:51:11,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-09-14 15:51:11,512 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:11,512 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:11,512 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:11,513 INFO L82 PathProgramCache]: Analyzing trace with hash 1980489325, now seen corresponding path program 12 times [2018-09-14 15:51:11,513 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:11,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:11,513 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:11,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:11,514 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:11,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:11,887 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:11,887 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:11,887 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:11,894 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:11,894 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:11,939 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-09-14 15:51:11,939 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:11,943 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:12,246 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:12,247 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:12,536 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:12,556 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:12,556 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:12,572 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:12,572 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:12,763 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-09-14 15:51:12,764 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:12,769 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:12,810 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:12,811 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:13,249 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:13,251 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:13,251 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 32 [2018-09-14 15:51:13,251 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:13,251 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-09-14 15:51:13,252 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-09-14 15:51:13,252 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=251, Invalid=741, Unknown=0, NotChecked=0, Total=992 [2018-09-14 15:51:13,253 INFO L87 Difference]: Start difference. First operand 111 states and 119 transitions. Second operand 32 states. [2018-09-14 15:51:13,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:13,804 INFO L93 Difference]: Finished difference Result 221 states and 259 transitions. [2018-09-14 15:51:13,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-14 15:51:13,805 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 128 [2018-09-14 15:51:13,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:13,807 INFO L225 Difference]: With dead ends: 221 [2018-09-14 15:51:13,807 INFO L226 Difference]: Without dead ends: 164 [2018-09-14 15:51:13,809 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 542 GetRequests, 464 SyntacticMatches, 38 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 747 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-09-14 15:51:13,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-09-14 15:51:13,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 114. [2018-09-14 15:51:13,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-09-14 15:51:13,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 122 transitions. [2018-09-14 15:51:13,817 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 122 transitions. Word has length 128 [2018-09-14 15:51:13,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:13,817 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 122 transitions. [2018-09-14 15:51:13,818 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-09-14 15:51:13,818 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 122 transitions. [2018-09-14 15:51:13,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-09-14 15:51:13,819 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:13,819 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:13,819 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:13,819 INFO L82 PathProgramCache]: Analyzing trace with hash 1231179593, now seen corresponding path program 13 times [2018-09-14 15:51:13,820 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:13,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:13,820 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:13,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:13,821 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:13,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:14,289 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 182 proven. 232 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-09-14 15:51:14,289 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:14,289 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:14,301 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:14,301 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:14,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:14,341 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:14,393 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:14,394 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:14,709 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:14,730 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:14,730 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:14,745 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:14,746 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:14,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:14,842 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:14,859 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:14,860 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:15,011 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-14 15:51:15,013 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:15,013 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15, 15, 15] total 19 [2018-09-14 15:51:15,013 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:15,014 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-14 15:51:15,014 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-14 15:51:15,014 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=239, Unknown=0, NotChecked=0, Total=342 [2018-09-14 15:51:15,014 INFO L87 Difference]: Start difference. First operand 114 states and 122 transitions. Second operand 18 states. [2018-09-14 15:51:15,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:15,187 INFO L93 Difference]: Finished difference Result 130 states and 139 transitions. [2018-09-14 15:51:15,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-14 15:51:15,188 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 131 [2018-09-14 15:51:15,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:15,190 INFO L225 Difference]: With dead ends: 130 [2018-09-14 15:51:15,191 INFO L226 Difference]: Without dead ends: 128 [2018-09-14 15:51:15,192 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 551 GetRequests, 494 SyntacticMatches, 38 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 352 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=116, Invalid=304, Unknown=0, NotChecked=0, Total=420 [2018-09-14 15:51:15,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-09-14 15:51:15,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-09-14 15:51:15,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-09-14 15:51:15,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-09-14 15:51:15,200 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 131 [2018-09-14 15:51:15,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:15,201 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-09-14 15:51:15,201 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-14 15:51:15,201 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-09-14 15:51:15,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-09-14 15:51:15,202 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:15,203 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:15,203 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:15,203 INFO L82 PathProgramCache]: Analyzing trace with hash -2109554263, now seen corresponding path program 14 times [2018-09-14 15:51:15,203 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:15,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:15,204 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:15,204 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:15,204 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:15,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:16,558 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 330 proven. 165 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-14 15:51:16,558 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:16,559 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:16,567 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:16,567 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:16,614 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:16,614 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:16,619 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:17,016 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 365 proven. 165 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2018-09-14 15:51:17,016 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:17,245 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 327 proven. 165 refuted. 0 times theorem prover too weak. 223 trivial. 0 not checked. [2018-09-14 15:51:17,266 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:17,266 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:17,282 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:17,282 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:17,385 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:17,385 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:17,391 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:17,426 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 365 proven. 165 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2018-09-14 15:51:17,426 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:18,264 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 327 proven. 165 refuted. 0 times theorem prover too weak. 223 trivial. 0 not checked. [2018-09-14 15:51:18,266 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:18,266 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 24, 24, 24, 24] total 36 [2018-09-14 15:51:18,266 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:18,268 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-09-14 15:51:18,268 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-09-14 15:51:18,269 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=311, Invalid=949, Unknown=0, NotChecked=0, Total=1260 [2018-09-14 15:51:18,269 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 36 states. [2018-09-14 15:51:19,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:19,062 INFO L93 Difference]: Finished difference Result 255 states and 297 transitions. [2018-09-14 15:51:19,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-14 15:51:19,062 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 149 [2018-09-14 15:51:19,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:19,064 INFO L225 Difference]: With dead ends: 255 [2018-09-14 15:51:19,064 INFO L226 Difference]: Without dead ends: 186 [2018-09-14 15:51:19,065 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 630 GetRequests, 543 SyntacticMatches, 42 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 965 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=586, Invalid=1576, Unknown=0, NotChecked=0, Total=2162 [2018-09-14 15:51:19,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-09-14 15:51:19,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 131. [2018-09-14 15:51:19,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-09-14 15:51:19,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 140 transitions. [2018-09-14 15:51:19,074 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 140 transitions. Word has length 149 [2018-09-14 15:51:19,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:19,074 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 140 transitions. [2018-09-14 15:51:19,075 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-09-14 15:51:19,075 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 140 transitions. [2018-09-14 15:51:19,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-09-14 15:51:19,076 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:19,076 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:19,077 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:19,077 INFO L82 PathProgramCache]: Analyzing trace with hash 1564389965, now seen corresponding path program 15 times [2018-09-14 15:51:19,077 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:19,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:19,078 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:19,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:19,078 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:19,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:19,462 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-14 15:51:19,463 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:19,463 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:19,470 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:19,470 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:19,533 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-09-14 15:51:19,533 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:19,538 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:20,114 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-14 15:51:20,114 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:20,358 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-14 15:51:20,378 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:20,378 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:20,393 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:20,393 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:20,639 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-09-14 15:51:20,639 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:20,646 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:20,679 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-14 15:51:20,679 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:20,916 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-14 15:51:20,917 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:20,917 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 38 [2018-09-14 15:51:20,918 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:20,918 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-14 15:51:20,918 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-14 15:51:20,919 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=349, Invalid=1057, Unknown=0, NotChecked=0, Total=1406 [2018-09-14 15:51:20,919 INFO L87 Difference]: Start difference. First operand 131 states and 140 transitions. Second operand 38 states. [2018-09-14 15:51:21,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:21,499 INFO L93 Difference]: Finished difference Result 261 states and 306 transitions. [2018-09-14 15:51:21,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-09-14 15:51:21,499 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 152 [2018-09-14 15:51:21,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:21,501 INFO L225 Difference]: With dead ends: 261 [2018-09-14 15:51:21,501 INFO L226 Difference]: Without dead ends: 194 [2018-09-14 15:51:21,503 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 644 GetRequests, 550 SyntacticMatches, 46 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1100 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-09-14 15:51:21,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-09-14 15:51:21,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 134. [2018-09-14 15:51:21,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-09-14 15:51:21,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 143 transitions. [2018-09-14 15:51:21,512 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 143 transitions. Word has length 152 [2018-09-14 15:51:21,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:21,512 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 143 transitions. [2018-09-14 15:51:21,512 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-14 15:51:21,513 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 143 transitions. [2018-09-14 15:51:21,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-09-14 15:51:21,514 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:21,514 INFO L376 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:21,514 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:21,514 INFO L82 PathProgramCache]: Analyzing trace with hash -909684951, now seen corresponding path program 16 times [2018-09-14 15:51:21,514 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:21,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:21,515 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:21,515 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:21,516 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:21,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:21,776 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 255 proven. 339 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-09-14 15:51:21,776 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:21,776 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:21,784 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:21,784 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:21,847 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:21,848 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:21,852 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:22,783 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-14 15:51:22,784 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:23,235 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-14 15:51:23,256 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:23,256 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:23,273 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:23,273 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:23,395 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:23,396 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:23,402 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:23,423 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-14 15:51:23,423 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:23,585 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-14 15:51:23,586 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:23,587 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 17, 17, 17] total 22 [2018-09-14 15:51:23,587 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:23,587 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-14 15:51:23,587 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-14 15:51:23,588 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=326, Unknown=0, NotChecked=0, Total=462 [2018-09-14 15:51:23,588 INFO L87 Difference]: Start difference. First operand 134 states and 143 transitions. Second operand 21 states. [2018-09-14 15:51:24,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:24,070 INFO L93 Difference]: Finished difference Result 155 states and 167 transitions. [2018-09-14 15:51:24,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-14 15:51:24,070 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 155 [2018-09-14 15:51:24,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:24,073 INFO L225 Difference]: With dead ends: 155 [2018-09-14 15:51:24,073 INFO L226 Difference]: Without dead ends: 153 [2018-09-14 15:51:24,073 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 651 GetRequests, 583 SyntacticMatches, 46 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 491 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=149, Invalid=403, Unknown=0, NotChecked=0, Total=552 [2018-09-14 15:51:24,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-09-14 15:51:24,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 148. [2018-09-14 15:51:24,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-09-14 15:51:24,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 158 transitions. [2018-09-14 15:51:24,082 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 158 transitions. Word has length 155 [2018-09-14 15:51:24,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:24,083 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 158 transitions. [2018-09-14 15:51:24,083 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-14 15:51:24,083 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 158 transitions. [2018-09-14 15:51:24,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-09-14 15:51:24,084 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:24,084 INFO L376 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 13, 13, 13, 13, 13, 13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:24,084 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:24,085 INFO L82 PathProgramCache]: Analyzing trace with hash -568620663, now seen corresponding path program 17 times [2018-09-14 15:51:24,085 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:24,085 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:24,085 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:24,085 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:24,085 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:24,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:25,007 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:25,007 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:25,007 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:25,018 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:25,018 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:25,081 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-09-14 15:51:25,082 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:25,086 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:25,546 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:25,546 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:25,847 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:25,867 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:25,867 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:25,882 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:25,882 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:26,174 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-09-14 15:51:26,174 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:26,181 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:26,222 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:26,222 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:26,545 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:26,553 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:26,553 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 45 [2018-09-14 15:51:26,553 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:26,554 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-09-14 15:51:26,554 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-09-14 15:51:26,555 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=493, Invalid=1487, Unknown=0, NotChecked=0, Total=1980 [2018-09-14 15:51:26,555 INFO L87 Difference]: Start difference. First operand 148 states and 158 transitions. Second operand 43 states. [2018-09-14 15:51:27,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:27,138 INFO L93 Difference]: Finished difference Result 295 states and 344 transitions. [2018-09-14 15:51:27,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-14 15:51:27,139 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 173 [2018-09-14 15:51:27,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:27,141 INFO L225 Difference]: With dead ends: 295 [2018-09-14 15:51:27,141 INFO L226 Difference]: Without dead ends: 216 [2018-09-14 15:51:27,142 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 732 GetRequests, 628 SyntacticMatches, 48 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1540 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=896, Invalid=2410, Unknown=0, NotChecked=0, Total=3306 [2018-09-14 15:51:27,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-09-14 15:51:27,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 151. [2018-09-14 15:51:27,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-09-14 15:51:27,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 161 transitions. [2018-09-14 15:51:27,153 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 161 transitions. Word has length 173 [2018-09-14 15:51:27,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:27,153 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 161 transitions. [2018-09-14 15:51:27,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-09-14 15:51:27,153 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 161 transitions. [2018-09-14 15:51:27,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-09-14 15:51:27,154 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:27,154 INFO L376 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 14, 14, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:27,155 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:27,155 INFO L82 PathProgramCache]: Analyzing trace with hash 792251949, now seen corresponding path program 18 times [2018-09-14 15:51:27,155 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:27,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:27,156 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:27,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:27,156 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:27,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:27,711 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:27,711 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:27,711 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:27,719 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:27,719 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:27,786 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-09-14 15:51:27,786 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:27,790 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:28,212 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:28,212 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:28,484 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:28,504 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:28,505 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:28,520 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:28,520 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:28,851 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-09-14 15:51:28,851 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:28,859 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:28,907 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:28,907 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:29,460 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:29,461 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:29,462 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 44 [2018-09-14 15:51:29,462 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:29,463 INFO L459 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-09-14 15:51:29,463 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-09-14 15:51:29,463 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=463, Invalid=1429, Unknown=0, NotChecked=0, Total=1892 [2018-09-14 15:51:29,464 INFO L87 Difference]: Start difference. First operand 151 states and 161 transitions. Second operand 44 states. [2018-09-14 15:51:30,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:30,435 INFO L93 Difference]: Finished difference Result 301 states and 353 transitions. [2018-09-14 15:51:30,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-09-14 15:51:30,435 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 176 [2018-09-14 15:51:30,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:30,437 INFO L225 Difference]: With dead ends: 301 [2018-09-14 15:51:30,437 INFO L226 Difference]: Without dead ends: 224 [2018-09-14 15:51:30,438 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 746 GetRequests, 636 SyntacticMatches, 54 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1521 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=897, Invalid=2409, Unknown=0, NotChecked=0, Total=3306 [2018-09-14 15:51:30,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-09-14 15:51:30,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 154. [2018-09-14 15:51:30,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-14 15:51:30,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 164 transitions. [2018-09-14 15:51:30,450 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 164 transitions. Word has length 176 [2018-09-14 15:51:30,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:30,451 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 164 transitions. [2018-09-14 15:51:30,451 INFO L481 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-09-14 15:51:30,451 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 164 transitions. [2018-09-14 15:51:30,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2018-09-14 15:51:30,452 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:30,452 INFO L376 BasicCegarLoop]: trace histogram [15, 15, 14, 14, 14, 14, 14, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:30,452 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:30,453 INFO L82 PathProgramCache]: Analyzing trace with hash -1943038199, now seen corresponding path program 19 times [2018-09-14 15:51:30,453 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:30,453 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:30,454 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:30,454 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:30,454 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:30,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:30,717 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 340 proven. 466 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-09-14 15:51:30,718 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:30,718 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:30,726 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:30,726 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:30,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:30,785 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:30,894 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:30,894 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:31,127 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:31,147 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:31,147 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:31,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:31,164 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:31,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:31,286 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:31,319 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:31,320 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:31,739 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-14 15:51:31,740 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:31,740 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19, 19, 19] total 23 [2018-09-14 15:51:31,740 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:31,741 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-14 15:51:31,741 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-14 15:51:31,741 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=341, Unknown=0, NotChecked=0, Total=506 [2018-09-14 15:51:31,741 INFO L87 Difference]: Start difference. First operand 154 states and 164 transitions. Second operand 22 states. [2018-09-14 15:51:31,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:31,951 INFO L93 Difference]: Finished difference Result 170 states and 181 transitions. [2018-09-14 15:51:31,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-14 15:51:31,954 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 179 [2018-09-14 15:51:31,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:31,955 INFO L225 Difference]: With dead ends: 170 [2018-09-14 15:51:31,955 INFO L226 Difference]: Without dead ends: 168 [2018-09-14 15:51:31,955 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 751 GetRequests, 674 SyntacticMatches, 54 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 604 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=178, Invalid=422, Unknown=0, NotChecked=0, Total=600 [2018-09-14 15:51:31,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-09-14 15:51:31,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2018-09-14 15:51:31,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-09-14 15:51:31,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 179 transitions. [2018-09-14 15:51:31,968 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 179 transitions. Word has length 179 [2018-09-14 15:51:31,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:31,969 INFO L480 AbstractCegarLoop]: Abstraction has 168 states and 179 transitions. [2018-09-14 15:51:31,969 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-14 15:51:31,969 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 179 transitions. [2018-09-14 15:51:31,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-09-14 15:51:31,972 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:31,972 INFO L376 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:31,973 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:31,973 INFO L82 PathProgramCache]: Analyzing trace with hash 213227881, now seen corresponding path program 20 times [2018-09-14 15:51:31,973 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:31,973 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:31,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:31,974 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:31,974 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:31,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:32,450 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 600 proven. 315 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-14 15:51:32,450 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:32,450 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:32,457 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:32,457 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:32,526 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:32,527 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:32,531 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:32,980 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 651 proven. 315 refuted. 0 times theorem prover too weak. 369 trivial. 0 not checked. [2018-09-14 15:51:32,980 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:33,397 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 597 proven. 315 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2018-09-14 15:51:33,418 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:33,418 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:33,433 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:33,433 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:33,583 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:33,583 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:33,591 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:33,664 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 651 proven. 315 refuted. 0 times theorem prover too weak. 369 trivial. 0 not checked. [2018-09-14 15:51:33,665 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:34,140 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 597 proven. 315 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2018-09-14 15:51:34,141 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:34,142 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 32, 32, 32, 32] total 48 [2018-09-14 15:51:34,142 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:34,142 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-09-14 15:51:34,142 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-09-14 15:51:34,144 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=543, Invalid=1713, Unknown=0, NotChecked=0, Total=2256 [2018-09-14 15:51:34,144 INFO L87 Difference]: Start difference. First operand 168 states and 179 transitions. Second operand 48 states. [2018-09-14 15:51:34,811 WARN L178 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-09-14 15:51:35,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:35,517 INFO L93 Difference]: Finished difference Result 335 states and 391 transitions. [2018-09-14 15:51:35,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-09-14 15:51:35,517 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 197 [2018-09-14 15:51:35,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:35,519 INFO L225 Difference]: With dead ends: 335 [2018-09-14 15:51:35,519 INFO L226 Difference]: Without dead ends: 246 [2018-09-14 15:51:35,521 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 834 GetRequests, 715 SyntacticMatches, 58 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1827 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1038, Invalid=2868, Unknown=0, NotChecked=0, Total=3906 [2018-09-14 15:51:35,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-09-14 15:51:35,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 171. [2018-09-14 15:51:35,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-09-14 15:51:35,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 182 transitions. [2018-09-14 15:51:35,532 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 182 transitions. Word has length 197 [2018-09-14 15:51:35,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:35,533 INFO L480 AbstractCegarLoop]: Abstraction has 171 states and 182 transitions. [2018-09-14 15:51:35,533 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-09-14 15:51:35,533 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 182 transitions. [2018-09-14 15:51:35,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-09-14 15:51:35,534 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:35,534 INFO L376 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:35,535 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:35,535 INFO L82 PathProgramCache]: Analyzing trace with hash -1707593203, now seen corresponding path program 21 times [2018-09-14 15:51:35,535 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:35,535 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:35,536 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:35,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:35,536 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:35,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:36,077 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-14 15:51:36,077 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:36,077 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:36,084 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:36,084 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:36,159 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-09-14 15:51:36,159 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:36,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:36,631 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-14 15:51:36,632 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:36,986 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-14 15:51:37,006 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:37,006 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:37,022 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:37,022 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:37,409 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-09-14 15:51:37,409 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:37,416 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:37,469 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-14 15:51:37,469 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:37,846 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-14 15:51:37,849 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:37,849 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 50 [2018-09-14 15:51:37,849 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:37,850 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-09-14 15:51:37,850 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-09-14 15:51:37,852 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=593, Invalid=1857, Unknown=0, NotChecked=0, Total=2450 [2018-09-14 15:51:37,852 INFO L87 Difference]: Start difference. First operand 171 states and 182 transitions. Second operand 50 states. [2018-09-14 15:51:39,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:39,294 INFO L93 Difference]: Finished difference Result 341 states and 400 transitions. [2018-09-14 15:51:39,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-09-14 15:51:39,294 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 200 [2018-09-14 15:51:39,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:39,296 INFO L225 Difference]: With dead ends: 341 [2018-09-14 15:51:39,296 INFO L226 Difference]: Without dead ends: 254 [2018-09-14 15:51:39,298 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 848 GetRequests, 722 SyntacticMatches, 62 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2010 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1153, Invalid=3137, Unknown=0, NotChecked=0, Total=4290 [2018-09-14 15:51:39,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-09-14 15:51:39,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 174. [2018-09-14 15:51:39,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-09-14 15:51:39,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 185 transitions. [2018-09-14 15:51:39,311 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 185 transitions. Word has length 200 [2018-09-14 15:51:39,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:39,311 INFO L480 AbstractCegarLoop]: Abstraction has 174 states and 185 transitions. [2018-09-14 15:51:39,311 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-09-14 15:51:39,311 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 185 transitions. [2018-09-14 15:51:39,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-09-14 15:51:39,313 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:39,313 INFO L376 BasicCegarLoop]: trace histogram [17, 17, 16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:39,313 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:39,313 INFO L82 PathProgramCache]: Analyzing trace with hash 1255745257, now seen corresponding path program 22 times [2018-09-14 15:51:39,313 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:39,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:39,314 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:39,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:39,314 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:39,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:40,509 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 437 proven. 613 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-09-14 15:51:40,510 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:40,510 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:40,539 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:40,539 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:40,600 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:40,600 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:40,603 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:40,686 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-14 15:51:40,686 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:40,957 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-14 15:51:40,977 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:40,978 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:40,993 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:40,993 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:41,153 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:41,154 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:41,162 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:41,202 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-14 15:51:41,202 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:41,554 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-14 15:51:41,556 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:41,556 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 21, 21, 21] total 26 [2018-09-14 15:51:41,556 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:41,556 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-14 15:51:41,557 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-14 15:51:41,557 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=444, Unknown=0, NotChecked=0, Total=650 [2018-09-14 15:51:41,558 INFO L87 Difference]: Start difference. First operand 174 states and 185 transitions. Second operand 25 states. [2018-09-14 15:51:42,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:42,034 INFO L93 Difference]: Finished difference Result 195 states and 209 transitions. [2018-09-14 15:51:42,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-14 15:51:42,035 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 203 [2018-09-14 15:51:42,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:42,037 INFO L225 Difference]: With dead ends: 195 [2018-09-14 15:51:42,037 INFO L226 Difference]: Without dead ends: 193 [2018-09-14 15:51:42,038 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 851 GetRequests, 763 SyntacticMatches, 62 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 779 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=219, Invalid=537, Unknown=0, NotChecked=0, Total=756 [2018-09-14 15:51:42,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-09-14 15:51:42,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 188. [2018-09-14 15:51:42,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-09-14 15:51:42,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 200 transitions. [2018-09-14 15:51:42,049 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 200 transitions. Word has length 203 [2018-09-14 15:51:42,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:42,050 INFO L480 AbstractCegarLoop]: Abstraction has 188 states and 200 transitions. [2018-09-14 15:51:42,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-14 15:51:42,050 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 200 transitions. [2018-09-14 15:51:42,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2018-09-14 15:51:42,052 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:42,052 INFO L376 BasicCegarLoop]: trace histogram [18, 18, 18, 18, 17, 17, 17, 17, 17, 17, 17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:42,052 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:42,053 INFO L82 PathProgramCache]: Analyzing trace with hash -187764407, now seen corresponding path program 23 times [2018-09-14 15:51:42,053 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:42,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:42,053 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:42,054 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:42,054 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:42,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:42,680 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:42,680 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:42,680 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:42,687 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:42,687 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:42,767 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-14 15:51:42,767 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:42,772 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:43,813 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:43,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:44,248 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:44,269 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:44,269 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:44,284 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:44,284 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:44,738 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-14 15:51:44,738 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:44,746 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:44,808 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:44,808 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:45,576 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:45,577 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:45,577 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 57 [2018-09-14 15:51:45,577 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:45,578 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-09-14 15:51:45,579 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-09-14 15:51:45,579 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=777, Invalid=2415, Unknown=0, NotChecked=0, Total=3192 [2018-09-14 15:51:45,580 INFO L87 Difference]: Start difference. First operand 188 states and 200 transitions. Second operand 55 states. [2018-09-14 15:51:46,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:46,496 INFO L93 Difference]: Finished difference Result 375 states and 438 transitions. [2018-09-14 15:51:46,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-09-14 15:51:46,497 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 221 [2018-09-14 15:51:46,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:46,499 INFO L225 Difference]: With dead ends: 375 [2018-09-14 15:51:46,499 INFO L226 Difference]: Without dead ends: 276 [2018-09-14 15:51:46,500 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 936 GetRequests, 800 SyntacticMatches, 64 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2594 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=1440, Invalid=3962, Unknown=0, NotChecked=0, Total=5402 [2018-09-14 15:51:46,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2018-09-14 15:51:46,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 191. [2018-09-14 15:51:46,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-09-14 15:51:46,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 203 transitions. [2018-09-14 15:51:46,513 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 203 transitions. Word has length 221 [2018-09-14 15:51:46,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:46,514 INFO L480 AbstractCegarLoop]: Abstraction has 191 states and 203 transitions. [2018-09-14 15:51:46,514 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-09-14 15:51:46,514 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 203 transitions. [2018-09-14 15:51:46,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2018-09-14 15:51:46,515 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:46,516 INFO L376 BasicCegarLoop]: trace histogram [18, 18, 18, 18, 18, 18, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:46,516 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:46,516 INFO L82 PathProgramCache]: Analyzing trace with hash -117776915, now seen corresponding path program 24 times [2018-09-14 15:51:46,516 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:46,517 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:46,517 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:46,517 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:46,517 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:46,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:47,457 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:47,457 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:47,457 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:47,464 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:47,465 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:47,551 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 18 check-sat command(s) [2018-09-14 15:51:47,552 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:47,555 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:48,168 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:48,169 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:48,650 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:48,671 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:48,672 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:48,687 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:48,687 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:49,160 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 18 check-sat command(s) [2018-09-14 15:51:49,160 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:49,169 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:49,230 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:49,230 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:49,783 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:49,784 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:49,784 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 56 [2018-09-14 15:51:49,785 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:49,785 INFO L459 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-09-14 15:51:49,785 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-09-14 15:51:49,786 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=739, Invalid=2341, Unknown=0, NotChecked=0, Total=3080 [2018-09-14 15:51:49,786 INFO L87 Difference]: Start difference. First operand 191 states and 203 transitions. Second operand 56 states. [2018-09-14 15:51:51,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:51,335 INFO L93 Difference]: Finished difference Result 381 states and 447 transitions. [2018-09-14 15:51:51,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-09-14 15:51:51,336 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 224 [2018-09-14 15:51:51,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:51,337 INFO L225 Difference]: With dead ends: 381 [2018-09-14 15:51:51,337 INFO L226 Difference]: Without dead ends: 284 [2018-09-14 15:51:51,338 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 950 GetRequests, 808 SyntacticMatches, 70 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2567 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1441, Invalid=3961, Unknown=0, NotChecked=0, Total=5402 [2018-09-14 15:51:51,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284 states. [2018-09-14 15:51:51,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284 to 194. [2018-09-14 15:51:51,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-09-14 15:51:51,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 206 transitions. [2018-09-14 15:51:51,351 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 206 transitions. Word has length 224 [2018-09-14 15:51:51,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:51,351 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 206 transitions. [2018-09-14 15:51:51,351 INFO L481 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-09-14 15:51:51,351 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 206 transitions. [2018-09-14 15:51:51,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2018-09-14 15:51:51,353 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:51,353 INFO L376 BasicCegarLoop]: trace histogram [19, 19, 18, 18, 18, 18, 18, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:51,353 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:51,353 INFO L82 PathProgramCache]: Analyzing trace with hash 1820458697, now seen corresponding path program 25 times [2018-09-14 15:51:51,353 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:51,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:51,354 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:51,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:51,354 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:51,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:51,699 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 546 proven. 780 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-09-14 15:51:51,699 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:51,699 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:51,708 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:51,708 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:51,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:51,777 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:51,865 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:51,866 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:52,263 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:52,293 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:52,293 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:52,318 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:52,318 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:52,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:52,464 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:52,514 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:52,514 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:53,278 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-14 15:51:53,280 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:53,280 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 23, 23, 23] total 27 [2018-09-14 15:51:53,280 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:53,281 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-14 15:51:53,281 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-14 15:51:53,281 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=243, Invalid=459, Unknown=0, NotChecked=0, Total=702 [2018-09-14 15:51:53,281 INFO L87 Difference]: Start difference. First operand 194 states and 206 transitions. Second operand 26 states. [2018-09-14 15:51:53,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:53,574 INFO L93 Difference]: Finished difference Result 210 states and 223 transitions. [2018-09-14 15:51:53,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-14 15:51:53,575 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 227 [2018-09-14 15:51:53,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:53,576 INFO L225 Difference]: With dead ends: 210 [2018-09-14 15:51:53,577 INFO L226 Difference]: Without dead ends: 208 [2018-09-14 15:51:53,577 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 951 GetRequests, 854 SyntacticMatches, 70 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 920 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=256, Invalid=556, Unknown=0, NotChecked=0, Total=812 [2018-09-14 15:51:53,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-09-14 15:51:53,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 208. [2018-09-14 15:51:53,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-09-14 15:51:53,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 221 transitions. [2018-09-14 15:51:53,590 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 221 transitions. Word has length 227 [2018-09-14 15:51:53,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:53,590 INFO L480 AbstractCegarLoop]: Abstraction has 208 states and 221 transitions. [2018-09-14 15:51:53,590 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-14 15:51:53,591 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 221 transitions. [2018-09-14 15:51:53,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2018-09-14 15:51:53,592 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:53,593 INFO L376 BasicCegarLoop]: trace histogram [20, 20, 20, 20, 19, 19, 19, 19, 19, 19, 19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:53,593 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:53,593 INFO L82 PathProgramCache]: Analyzing trace with hash 161845545, now seen corresponding path program 26 times [2018-09-14 15:51:53,593 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:53,594 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:53,594 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:53,594 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:53,594 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:53,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:54,943 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 950 proven. 513 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-14 15:51:54,943 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:54,943 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:54,952 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:54,952 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:55,023 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:55,023 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:55,026 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:55,932 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 1017 proven. 513 refuted. 0 times theorem prover too weak. 617 trivial. 0 not checked. [2018-09-14 15:51:55,932 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:57,003 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 947 proven. 513 refuted. 0 times theorem prover too weak. 687 trivial. 0 not checked. [2018-09-14 15:51:57,023 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:57,023 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:57,039 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:57,039 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:57,212 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:57,212 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:57,220 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:57,276 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 1017 proven. 513 refuted. 0 times theorem prover too weak. 617 trivial. 0 not checked. [2018-09-14 15:51:57,276 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:57,867 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 947 proven. 513 refuted. 0 times theorem prover too weak. 687 trivial. 0 not checked. [2018-09-14 15:51:57,869 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:57,870 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 40, 40, 40, 40] total 60 [2018-09-14 15:51:57,870 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:57,870 INFO L459 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-09-14 15:51:57,871 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-09-14 15:51:57,871 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=839, Invalid=2701, Unknown=0, NotChecked=0, Total=3540 [2018-09-14 15:51:57,871 INFO L87 Difference]: Start difference. First operand 208 states and 221 transitions. Second operand 60 states. [2018-09-14 15:51:58,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:58,930 INFO L93 Difference]: Finished difference Result 415 states and 485 transitions. [2018-09-14 15:51:58,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-09-14 15:51:58,930 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 245 [2018-09-14 15:51:58,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:58,932 INFO L225 Difference]: With dead ends: 415 [2018-09-14 15:51:58,932 INFO L226 Difference]: Without dead ends: 306 [2018-09-14 15:51:58,933 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1038 GetRequests, 887 SyntacticMatches, 74 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2961 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=1618, Invalid=4544, Unknown=0, NotChecked=0, Total=6162 [2018-09-14 15:51:58,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-09-14 15:51:58,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 211. [2018-09-14 15:51:58,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-09-14 15:51:58,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 224 transitions. [2018-09-14 15:51:58,947 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 224 transitions. Word has length 245 [2018-09-14 15:51:58,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:58,947 INFO L480 AbstractCegarLoop]: Abstraction has 211 states and 224 transitions. [2018-09-14 15:51:58,947 INFO L481 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-09-14 15:51:58,948 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 224 transitions. [2018-09-14 15:51:58,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2018-09-14 15:51:58,949 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:58,949 INFO L376 BasicCegarLoop]: trace histogram [20, 20, 20, 20, 20, 20, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:58,950 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:58,950 INFO L82 PathProgramCache]: Analyzing trace with hash 851366349, now seen corresponding path program 27 times [2018-09-14 15:51:58,950 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:58,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:58,951 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:58,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:58,951 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:58,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:59,868 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-14 15:51:59,868 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:59,868 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:59,876 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:59,876 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:59,961 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2018-09-14 15:51:59,961 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:59,965 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:01,028 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-14 15:52:01,029 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:01,619 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-14 15:52:01,640 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:01,640 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:01,655 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:52:01,655 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:52:02,233 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2018-09-14 15:52:02,233 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:02,242 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:02,302 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-14 15:52:02,302 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:02,841 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-14 15:52:02,843 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:02,843 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 62 [2018-09-14 15:52:02,843 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:02,844 INFO L459 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-09-14 15:52:02,844 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-09-14 15:52:02,844 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=901, Invalid=2881, Unknown=0, NotChecked=0, Total=3782 [2018-09-14 15:52:02,844 INFO L87 Difference]: Start difference. First operand 211 states and 224 transitions. Second operand 62 states. [2018-09-14 15:52:03,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:03,936 INFO L93 Difference]: Finished difference Result 421 states and 494 transitions. [2018-09-14 15:52:03,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-09-14 15:52:03,936 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 248 [2018-09-14 15:52:03,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:03,938 INFO L225 Difference]: With dead ends: 421 [2018-09-14 15:52:03,938 INFO L226 Difference]: Without dead ends: 314 [2018-09-14 15:52:03,939 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1052 GetRequests, 894 SyntacticMatches, 78 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3192 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=1761, Invalid=4881, Unknown=0, NotChecked=0, Total=6642 [2018-09-14 15:52:03,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-09-14 15:52:03,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 214. [2018-09-14 15:52:03,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-09-14 15:52:03,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 227 transitions. [2018-09-14 15:52:03,953 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 227 transitions. Word has length 248 [2018-09-14 15:52:03,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:03,953 INFO L480 AbstractCegarLoop]: Abstraction has 214 states and 227 transitions. [2018-09-14 15:52:03,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-09-14 15:52:03,954 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 227 transitions. [2018-09-14 15:52:03,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2018-09-14 15:52:03,955 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:03,956 INFO L376 BasicCegarLoop]: trace histogram [21, 21, 20, 20, 20, 20, 20, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:03,956 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:03,956 INFO L82 PathProgramCache]: Analyzing trace with hash -462938455, now seen corresponding path program 28 times [2018-09-14 15:52:03,956 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:03,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:03,957 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:03,957 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:03,957 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:03,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:04,478 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 667 proven. 967 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-14 15:52:04,478 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:04,478 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:04,486 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:52:04,486 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:52:04,562 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:52:04,563 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:04,566 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:04,674 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-14 15:52:04,674 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:05,073 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-14 15:52:05,093 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:05,093 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:05,109 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:52:05,109 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:52:05,299 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:52:05,299 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:05,309 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:05,350 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-14 15:52:05,350 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:06,124 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-14 15:52:06,125 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:06,126 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 25, 25, 25] total 30 [2018-09-14 15:52:06,126 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:06,126 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-09-14 15:52:06,126 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-09-14 15:52:06,127 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=292, Invalid=578, Unknown=0, NotChecked=0, Total=870 [2018-09-14 15:52:06,127 INFO L87 Difference]: Start difference. First operand 214 states and 227 transitions. Second operand 29 states. [2018-09-14 15:52:06,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:06,497 INFO L93 Difference]: Finished difference Result 235 states and 251 transitions. [2018-09-14 15:52:06,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-14 15:52:06,497 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 251 [2018-09-14 15:52:06,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:06,499 INFO L225 Difference]: With dead ends: 235 [2018-09-14 15:52:06,500 INFO L226 Difference]: Without dead ends: 233 [2018-09-14 15:52:06,500 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1051 GetRequests, 943 SyntacticMatches, 78 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1131 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=305, Invalid=687, Unknown=0, NotChecked=0, Total=992 [2018-09-14 15:52:06,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-09-14 15:52:06,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 228. [2018-09-14 15:52:06,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-09-14 15:52:06,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 242 transitions. [2018-09-14 15:52:06,515 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 242 transitions. Word has length 251 [2018-09-14 15:52:06,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:06,515 INFO L480 AbstractCegarLoop]: Abstraction has 228 states and 242 transitions. [2018-09-14 15:52:06,515 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-09-14 15:52:06,516 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 242 transitions. [2018-09-14 15:52:06,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2018-09-14 15:52:06,517 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:06,517 INFO L376 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 21, 21, 21, 21, 21, 21, 21, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:06,518 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:06,518 INFO L82 PathProgramCache]: Analyzing trace with hash 720861449, now seen corresponding path program 29 times [2018-09-14 15:52:06,518 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:06,519 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:06,519 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:06,519 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:06,519 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:06,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:07,370 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1155 proven. 630 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:07,371 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:07,371 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:07,378 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:52:07,378 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:07,481 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-09-14 15:52:07,481 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:07,485 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:08,513 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1155 proven. 630 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:08,514 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:09,257 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1155 proven. 630 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:09,277 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:09,278 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:09,299 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:52:09,299 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:09,954 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-09-14 15:52:09,954 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:09,964 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:10,034 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1230 proven. 630 refuted. 0 times theorem prover too weak. 765 trivial. 0 not checked. [2018-09-14 15:52:10,034 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:10,675 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1152 proven. 630 refuted. 0 times theorem prover too weak. 843 trivial. 0 not checked. [2018-09-14 15:52:10,676 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:10,677 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45, 45, 44, 44] total 69 [2018-09-14 15:52:10,677 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:10,677 INFO L459 AbstractCegarLoop]: Interpolant automaton has 67 states [2018-09-14 15:52:10,678 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2018-09-14 15:52:10,679 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1125, Invalid=3567, Unknown=0, NotChecked=0, Total=4692 [2018-09-14 15:52:10,679 INFO L87 Difference]: Start difference. First operand 228 states and 242 transitions. Second operand 67 states. [2018-09-14 15:52:12,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:12,038 INFO L93 Difference]: Finished difference Result 455 states and 532 transitions. [2018-09-14 15:52:12,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-09-14 15:52:12,039 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 269 [2018-09-14 15:52:12,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:12,041 INFO L225 Difference]: With dead ends: 455 [2018-09-14 15:52:12,041 INFO L226 Difference]: Without dead ends: 336 [2018-09-14 15:52:12,043 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1140 GetRequests, 971 SyntacticMatches, 81 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3941 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=2112, Invalid=5898, Unknown=0, NotChecked=0, Total=8010 [2018-09-14 15:52:12,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states. [2018-09-14 15:52:12,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 231. [2018-09-14 15:52:12,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states. [2018-09-14 15:52:12,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 245 transitions. [2018-09-14 15:52:12,059 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 245 transitions. Word has length 269 [2018-09-14 15:52:12,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:12,059 INFO L480 AbstractCegarLoop]: Abstraction has 231 states and 245 transitions. [2018-09-14 15:52:12,059 INFO L481 AbstractCegarLoop]: Interpolant automaton has 67 states. [2018-09-14 15:52:12,059 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 245 transitions. [2018-09-14 15:52:12,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2018-09-14 15:52:12,061 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:12,061 INFO L376 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:12,061 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:12,061 INFO L82 PathProgramCache]: Analyzing trace with hash -1690169939, now seen corresponding path program 30 times [2018-09-14 15:52:12,061 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:12,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:12,062 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:12,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:12,062 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:12,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:12,997 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:12,997 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:12,997 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:13,004 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:52:13,004 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:52:13,108 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 22 check-sat command(s) [2018-09-14 15:52:13,109 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:13,114 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:14,096 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:14,096 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:14,745 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:14,765 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:14,765 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:14,780 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:52:14,780 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:52:15,456 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 22 check-sat command(s) [2018-09-14 15:52:15,457 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:15,465 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:15,536 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:15,536 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:16,590 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:16,592 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:16,592 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46, 46, 46, 46] total 68 [2018-09-14 15:52:16,593 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:16,594 INFO L459 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-09-14 15:52:16,594 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-09-14 15:52:16,595 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1079, Invalid=3477, Unknown=0, NotChecked=0, Total=4556 [2018-09-14 15:52:16,595 INFO L87 Difference]: Start difference. First operand 231 states and 245 transitions. Second operand 68 states. [2018-09-14 15:52:17,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:17,871 INFO L93 Difference]: Finished difference Result 461 states and 541 transitions. [2018-09-14 15:52:17,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-09-14 15:52:17,871 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 272 [2018-09-14 15:52:17,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:17,873 INFO L225 Difference]: With dead ends: 461 [2018-09-14 15:52:17,873 INFO L226 Difference]: Without dead ends: 344 [2018-09-14 15:52:17,875 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1154 GetRequests, 980 SyntacticMatches, 86 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3885 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=2113, Invalid=5897, Unknown=0, NotChecked=0, Total=8010 [2018-09-14 15:52:17,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-09-14 15:52:17,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 234. [2018-09-14 15:52:17,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-09-14 15:52:17,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 248 transitions. [2018-09-14 15:52:17,891 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 248 transitions. Word has length 272 [2018-09-14 15:52:17,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:17,891 INFO L480 AbstractCegarLoop]: Abstraction has 234 states and 248 transitions. [2018-09-14 15:52:17,891 INFO L481 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-09-14 15:52:17,891 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 248 transitions. [2018-09-14 15:52:17,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-09-14 15:52:17,893 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:17,893 INFO L376 BasicCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:17,893 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:17,894 INFO L82 PathProgramCache]: Analyzing trace with hash 306808457, now seen corresponding path program 31 times [2018-09-14 15:52:17,894 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:17,894 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:17,894 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:17,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:17,895 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:17,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:18,832 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 800 proven. 1174 refuted. 0 times theorem prover too weak. 780 trivial. 0 not checked. [2018-09-14 15:52:18,832 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:18,832 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:18,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:18,839 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:18,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:18,926 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:19,013 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:19,013 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:19,482 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:19,504 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:19,504 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:19,518 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:19,519 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:19,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:19,717 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:19,762 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:19,763 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:20,240 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-14 15:52:20,242 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:20,242 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 27, 27, 27, 27] total 31 [2018-09-14 15:52:20,242 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:20,242 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-09-14 15:52:20,243 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-09-14 15:52:20,243 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=337, Invalid=593, Unknown=0, NotChecked=0, Total=930 [2018-09-14 15:52:20,243 INFO L87 Difference]: Start difference. First operand 234 states and 248 transitions. Second operand 30 states. [2018-09-14 15:52:20,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:20,627 INFO L93 Difference]: Finished difference Result 250 states and 265 transitions. [2018-09-14 15:52:20,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-14 15:52:20,627 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 275 [2018-09-14 15:52:20,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:20,629 INFO L225 Difference]: With dead ends: 250 [2018-09-14 15:52:20,629 INFO L226 Difference]: Without dead ends: 248 [2018-09-14 15:52:20,630 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1151 GetRequests, 1034 SyntacticMatches, 86 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1300 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=350, Invalid=706, Unknown=0, NotChecked=0, Total=1056 [2018-09-14 15:52:20,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-09-14 15:52:20,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248. [2018-09-14 15:52:20,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-09-14 15:52:20,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 263 transitions. [2018-09-14 15:52:20,646 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 263 transitions. Word has length 275 [2018-09-14 15:52:20,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:20,647 INFO L480 AbstractCegarLoop]: Abstraction has 248 states and 263 transitions. [2018-09-14 15:52:20,647 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-09-14 15:52:20,647 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 263 transitions. [2018-09-14 15:52:20,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2018-09-14 15:52:20,649 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:20,649 INFO L376 BasicCegarLoop]: trace histogram [24, 24, 24, 24, 23, 23, 23, 23, 23, 23, 23, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:20,649 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:20,649 INFO L82 PathProgramCache]: Analyzing trace with hash -2063423255, now seen corresponding path program 32 times [2018-09-14 15:52:20,649 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:20,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:20,650 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:20,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:20,650 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:20,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:21,898 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1380 proven. 759 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-14 15:52:21,898 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:21,898 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:21,906 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:52:21,907 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:21,991 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:52:21,992 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:21,996 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:22,941 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1463 proven. 759 refuted. 0 times theorem prover too weak. 929 trivial. 0 not checked. [2018-09-14 15:52:22,942 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:23,675 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1377 proven. 759 refuted. 0 times theorem prover too weak. 1015 trivial. 0 not checked. [2018-09-14 15:52:23,696 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:23,696 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:23,712 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:52:23,712 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:23,916 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:52:23,916 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:23,926 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:24,007 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1463 proven. 759 refuted. 0 times theorem prover too weak. 929 trivial. 0 not checked. [2018-09-14 15:52:24,007 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:24,741 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1377 proven. 759 refuted. 0 times theorem prover too weak. 1015 trivial. 0 not checked. [2018-09-14 15:52:24,743 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:24,743 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 48, 48, 48, 48] total 72 [2018-09-14 15:52:24,743 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:24,744 INFO L459 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-09-14 15:52:24,744 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-09-14 15:52:24,745 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1199, Invalid=3913, Unknown=0, NotChecked=0, Total=5112 [2018-09-14 15:52:24,745 INFO L87 Difference]: Start difference. First operand 248 states and 263 transitions. Second operand 72 states. [2018-09-14 15:52:25,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:25,973 INFO L93 Difference]: Finished difference Result 495 states and 579 transitions. [2018-09-14 15:52:25,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-09-14 15:52:25,973 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 293 [2018-09-14 15:52:25,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:25,976 INFO L225 Difference]: With dead ends: 495 [2018-09-14 15:52:25,976 INFO L226 Difference]: Without dead ends: 366 [2018-09-14 15:52:25,977 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1242 GetRequests, 1059 SyntacticMatches, 90 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4367 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=2326, Invalid=6604, Unknown=0, NotChecked=0, Total=8930 [2018-09-14 15:52:25,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2018-09-14 15:52:25,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 251. [2018-09-14 15:52:25,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 251 states. [2018-09-14 15:52:25,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 266 transitions. [2018-09-14 15:52:25,995 INFO L78 Accepts]: Start accepts. Automaton has 251 states and 266 transitions. Word has length 293 [2018-09-14 15:52:25,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:25,996 INFO L480 AbstractCegarLoop]: Abstraction has 251 states and 266 transitions. [2018-09-14 15:52:25,996 INFO L481 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-09-14 15:52:25,996 INFO L276 IsEmpty]: Start isEmpty. Operand 251 states and 266 transitions. [2018-09-14 15:52:25,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 297 [2018-09-14 15:52:25,998 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:25,998 INFO L376 BasicCegarLoop]: trace histogram [24, 24, 24, 24, 24, 24, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:25,998 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:25,999 INFO L82 PathProgramCache]: Analyzing trace with hash -759000691, now seen corresponding path program 33 times [2018-09-14 15:52:25,999 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:25,999 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:26,000 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:26,000 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:26,000 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:26,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:27,342 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-14 15:52:27,342 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:27,342 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:27,349 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:52:27,349 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:52:27,466 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-09-14 15:52:27,466 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:27,470 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:28,453 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-14 15:52:28,453 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:29,379 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-14 15:52:29,400 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:29,400 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:29,415 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:52:29,415 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:52:30,206 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-09-14 15:52:30,206 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:30,217 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:30,299 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-14 15:52:30,299 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:31,122 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-14 15:52:31,124 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:31,124 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 74 [2018-09-14 15:52:31,124 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:31,125 INFO L459 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-09-14 15:52:31,125 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-09-14 15:52:31,126 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1273, Invalid=4129, Unknown=0, NotChecked=0, Total=5402 [2018-09-14 15:52:31,126 INFO L87 Difference]: Start difference. First operand 251 states and 266 transitions. Second operand 74 states. [2018-09-14 15:52:32,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:32,537 INFO L93 Difference]: Finished difference Result 501 states and 588 transitions. [2018-09-14 15:52:32,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-09-14 15:52:32,538 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 296 [2018-09-14 15:52:32,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:32,540 INFO L225 Difference]: With dead ends: 501 [2018-09-14 15:52:32,540 INFO L226 Difference]: Without dead ends: 374 [2018-09-14 15:52:32,541 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1256 GetRequests, 1066 SyntacticMatches, 94 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4646 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=2497, Invalid=7009, Unknown=0, NotChecked=0, Total=9506 [2018-09-14 15:52:32,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states. [2018-09-14 15:52:32,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 254. [2018-09-14 15:52:32,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-09-14 15:52:32,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 269 transitions. [2018-09-14 15:52:32,558 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 269 transitions. Word has length 296 [2018-09-14 15:52:32,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:32,558 INFO L480 AbstractCegarLoop]: Abstraction has 254 states and 269 transitions. [2018-09-14 15:52:32,558 INFO L481 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-09-14 15:52:32,559 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 269 transitions. [2018-09-14 15:52:32,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 300 [2018-09-14 15:52:32,560 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:32,561 INFO L376 BasicCegarLoop]: trace histogram [25, 25, 24, 24, 24, 24, 24, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:32,561 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:32,561 INFO L82 PathProgramCache]: Analyzing trace with hash -1570490775, now seen corresponding path program 34 times [2018-09-14 15:52:32,561 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:32,562 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:32,562 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:32,562 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:32,562 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:32,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:33,058 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 945 proven. 1401 refuted. 0 times theorem prover too weak. 946 trivial. 0 not checked. [2018-09-14 15:52:33,059 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:33,059 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:33,066 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:52:33,066 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:52:33,158 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:52:33,159 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:33,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:33,293 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-14 15:52:33,293 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:33,808 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-14 15:52:33,829 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:33,829 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:33,843 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:52:33,844 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:52:34,078 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:52:34,078 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:34,095 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:34,151 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-14 15:52:34,152 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:35,409 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-14 15:52:35,411 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:35,411 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 29, 29, 29] total 34 [2018-09-14 15:52:35,411 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:35,412 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-09-14 15:52:35,412 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-09-14 15:52:35,412 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=394, Invalid=728, Unknown=0, NotChecked=0, Total=1122 [2018-09-14 15:52:35,412 INFO L87 Difference]: Start difference. First operand 254 states and 269 transitions. Second operand 33 states. [2018-09-14 15:52:35,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:35,847 INFO L93 Difference]: Finished difference Result 275 states and 293 transitions. [2018-09-14 15:52:35,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-09-14 15:52:35,848 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 299 [2018-09-14 15:52:35,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:35,851 INFO L225 Difference]: With dead ends: 275 [2018-09-14 15:52:35,851 INFO L226 Difference]: Without dead ends: 273 [2018-09-14 15:52:35,851 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1251 GetRequests, 1123 SyntacticMatches, 94 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1547 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=407, Invalid=853, Unknown=0, NotChecked=0, Total=1260 [2018-09-14 15:52:35,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states. [2018-09-14 15:52:35,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 268. [2018-09-14 15:52:35,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 268 states. [2018-09-14 15:52:35,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 284 transitions. [2018-09-14 15:52:35,868 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 284 transitions. Word has length 299 [2018-09-14 15:52:35,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:35,869 INFO L480 AbstractCegarLoop]: Abstraction has 268 states and 284 transitions. [2018-09-14 15:52:35,869 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-09-14 15:52:35,869 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 284 transitions. [2018-09-14 15:52:35,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 318 [2018-09-14 15:52:35,871 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:35,871 INFO L376 BasicCegarLoop]: trace histogram [26, 26, 26, 26, 25, 25, 25, 25, 25, 25, 25, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:35,871 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:35,872 INFO L82 PathProgramCache]: Analyzing trace with hash 1887772873, now seen corresponding path program 35 times [2018-09-14 15:52:35,872 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:35,872 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:35,872 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:35,872 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:35,873 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:35,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:37,419 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1625 proven. 900 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:37,419 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:37,419 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:37,427 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:52:37,427 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:37,547 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2018-09-14 15:52:37,547 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:37,551 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:38,732 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1625 proven. 900 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:38,733 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:39,615 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1625 proven. 900 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:39,635 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:39,635 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:39,651 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:52:39,651 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:40,543 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2018-09-14 15:52:40,543 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:40,555 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:40,679 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1716 proven. 900 refuted. 0 times theorem prover too weak. 1109 trivial. 0 not checked. [2018-09-14 15:52:40,680 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:41,867 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1622 proven. 900 refuted. 0 times theorem prover too weak. 1203 trivial. 0 not checked. [2018-09-14 15:52:41,868 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:41,868 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53, 53, 52, 52] total 81 [2018-09-14 15:52:41,869 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:41,869 INFO L459 AbstractCegarLoop]: Interpolant automaton has 79 states [2018-09-14 15:52:41,870 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2018-09-14 15:52:41,870 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1537, Invalid=4943, Unknown=0, NotChecked=0, Total=6480 [2018-09-14 15:52:41,870 INFO L87 Difference]: Start difference. First operand 268 states and 284 transitions. Second operand 79 states. [2018-09-14 15:52:43,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:43,377 INFO L93 Difference]: Finished difference Result 535 states and 626 transitions. [2018-09-14 15:52:43,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-09-14 15:52:43,377 INFO L78 Accepts]: Start accepts. Automaton has 79 states. Word has length 317 [2018-09-14 15:52:43,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:43,379 INFO L225 Difference]: With dead ends: 535 [2018-09-14 15:52:43,379 INFO L226 Difference]: Without dead ends: 396 [2018-09-14 15:52:43,381 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1344 GetRequests, 1143 SyntacticMatches, 97 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5543 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=2912, Invalid=8218, Unknown=0, NotChecked=0, Total=11130 [2018-09-14 15:52:43,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2018-09-14 15:52:43,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 271. [2018-09-14 15:52:43,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 271 states. [2018-09-14 15:52:43,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 287 transitions. [2018-09-14 15:52:43,396 INFO L78 Accepts]: Start accepts. Automaton has 271 states and 287 transitions. Word has length 317 [2018-09-14 15:52:43,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:43,396 INFO L480 AbstractCegarLoop]: Abstraction has 271 states and 287 transitions. [2018-09-14 15:52:43,396 INFO L481 AbstractCegarLoop]: Interpolant automaton has 79 states. [2018-09-14 15:52:43,396 INFO L276 IsEmpty]: Start isEmpty. Operand 271 states and 287 transitions. [2018-09-14 15:52:43,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 321 [2018-09-14 15:52:43,398 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:43,398 INFO L376 BasicCegarLoop]: trace histogram [26, 26, 26, 26, 26, 26, 25, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:43,399 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:43,399 INFO L82 PathProgramCache]: Analyzing trace with hash -1510056595, now seen corresponding path program 36 times [2018-09-14 15:52:43,399 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:43,400 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:43,400 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:43,400 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:43,400 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:43,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:44,783 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:44,784 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:44,784 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:44,792 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:52:44,792 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:52:44,916 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2018-09-14 15:52:44,916 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:44,921 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:46,146 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:46,146 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:47,319 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:47,339 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:47,339 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:47,354 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:52:47,354 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:52:48,289 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2018-09-14 15:52:48,290 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:48,302 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:48,414 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:48,414 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:49,299 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:49,301 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:49,301 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54, 54, 54, 54] total 80 [2018-09-14 15:52:49,301 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:49,302 INFO L459 AbstractCegarLoop]: Interpolant automaton has 80 states [2018-09-14 15:52:49,302 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 80 interpolants. [2018-09-14 15:52:49,303 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1483, Invalid=4837, Unknown=0, NotChecked=0, Total=6320 [2018-09-14 15:52:49,303 INFO L87 Difference]: Start difference. First operand 271 states and 287 transitions. Second operand 80 states. [2018-09-14 15:52:51,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:51,108 INFO L93 Difference]: Finished difference Result 541 states and 635 transitions. [2018-09-14 15:52:51,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-09-14 15:52:51,108 INFO L78 Accepts]: Start accepts. Automaton has 80 states. Word has length 320 [2018-09-14 15:52:51,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:51,111 INFO L225 Difference]: With dead ends: 541 [2018-09-14 15:52:51,111 INFO L226 Difference]: Without dead ends: 404 [2018-09-14 15:52:51,112 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1358 GetRequests, 1152 SyntacticMatches, 102 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5475 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=2913, Invalid=8217, Unknown=0, NotChecked=0, Total=11130 [2018-09-14 15:52:51,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states. [2018-09-14 15:52:51,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 274. [2018-09-14 15:52:51,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 274 states. [2018-09-14 15:52:51,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 274 states to 274 states and 290 transitions. [2018-09-14 15:52:51,131 INFO L78 Accepts]: Start accepts. Automaton has 274 states and 290 transitions. Word has length 320 [2018-09-14 15:52:51,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:51,132 INFO L480 AbstractCegarLoop]: Abstraction has 274 states and 290 transitions. [2018-09-14 15:52:51,132 INFO L481 AbstractCegarLoop]: Interpolant automaton has 80 states. [2018-09-14 15:52:51,132 INFO L276 IsEmpty]: Start isEmpty. Operand 274 states and 290 transitions. [2018-09-14 15:52:51,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324 [2018-09-14 15:52:51,134 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:51,134 INFO L376 BasicCegarLoop]: trace histogram [27, 27, 26, 26, 26, 26, 26, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:51,134 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:51,135 INFO L82 PathProgramCache]: Analyzing trace with hash 1836461641, now seen corresponding path program 37 times [2018-09-14 15:52:51,135 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:51,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:51,135 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:51,136 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:51,136 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:51,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:52,081 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1102 proven. 1648 refuted. 0 times theorem prover too weak. 1128 trivial. 0 not checked. [2018-09-14 15:52:52,082 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:52,082 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:52,089 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:52,089 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:52,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:52,192 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:52,346 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:52,346 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:52,968 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:52,988 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:52,988 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:53,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:53,003 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:53,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:53,239 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:53,303 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:53,303 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:53,924 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-14 15:52:53,926 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:53,927 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 31, 31, 31, 31] total 35 [2018-09-14 15:52:53,927 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:53,927 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-09-14 15:52:53,927 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-09-14 15:52:53,927 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=447, Invalid=743, Unknown=0, NotChecked=0, Total=1190 [2018-09-14 15:52:53,928 INFO L87 Difference]: Start difference. First operand 274 states and 290 transitions. Second operand 34 states. [2018-09-14 15:52:54,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:54,320 INFO L93 Difference]: Finished difference Result 290 states and 307 transitions. [2018-09-14 15:52:54,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-09-14 15:52:54,320 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 323 [2018-09-14 15:52:54,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:54,323 INFO L225 Difference]: With dead ends: 290 [2018-09-14 15:52:54,323 INFO L226 Difference]: Without dead ends: 288 [2018-09-14 15:52:54,323 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1351 GetRequests, 1214 SyntacticMatches, 102 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1744 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=460, Invalid=872, Unknown=0, NotChecked=0, Total=1332 [2018-09-14 15:52:54,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-09-14 15:52:54,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 288. [2018-09-14 15:52:54,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-09-14 15:52:54,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 305 transitions. [2018-09-14 15:52:54,340 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 305 transitions. Word has length 323 [2018-09-14 15:52:54,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:54,340 INFO L480 AbstractCegarLoop]: Abstraction has 288 states and 305 transitions. [2018-09-14 15:52:54,340 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-09-14 15:52:54,340 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 305 transitions. [2018-09-14 15:52:54,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2018-09-14 15:52:54,342 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:54,342 INFO L376 BasicCegarLoop]: trace histogram [28, 28, 28, 28, 27, 27, 27, 27, 27, 27, 27, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:54,343 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:54,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1388109993, now seen corresponding path program 38 times [2018-09-14 15:52:54,343 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:54,343 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:54,344 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:54,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:54,344 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:54,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:55,870 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1890 proven. 1053 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-14 15:52:55,870 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:55,870 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:55,877 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:52:55,877 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:55,977 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:52:55,977 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:55,982 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:57,581 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1989 proven. 1053 refuted. 0 times theorem prover too weak. 1305 trivial. 0 not checked. [2018-09-14 15:52:57,581 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:58,546 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1887 proven. 1053 refuted. 0 times theorem prover too weak. 1407 trivial. 0 not checked. [2018-09-14 15:52:58,566 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:58,566 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:58,581 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:52:58,581 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:58,817 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:52:58,817 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:58,836 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:58,946 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1989 proven. 1053 refuted. 0 times theorem prover too weak. 1305 trivial. 0 not checked. [2018-09-14 15:52:58,946 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:59,936 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1887 proven. 1053 refuted. 0 times theorem prover too weak. 1407 trivial. 0 not checked. [2018-09-14 15:52:59,938 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:59,938 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 56, 56, 56, 56] total 84 [2018-09-14 15:52:59,938 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:59,939 INFO L459 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-09-14 15:52:59,939 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-09-14 15:52:59,940 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1623, Invalid=5349, Unknown=0, NotChecked=0, Total=6972 [2018-09-14 15:52:59,940 INFO L87 Difference]: Start difference. First operand 288 states and 305 transitions. Second operand 84 states. [2018-09-14 15:53:01,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:01,540 INFO L93 Difference]: Finished difference Result 575 states and 673 transitions. [2018-09-14 15:53:01,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-09-14 15:53:01,541 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 341 [2018-09-14 15:53:01,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:01,543 INFO L225 Difference]: With dead ends: 575 [2018-09-14 15:53:01,543 INFO L226 Difference]: Without dead ends: 426 [2018-09-14 15:53:01,545 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1446 GetRequests, 1231 SyntacticMatches, 106 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6045 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=3162, Invalid=9048, Unknown=0, NotChecked=0, Total=12210 [2018-09-14 15:53:01,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2018-09-14 15:53:01,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 291. [2018-09-14 15:53:01,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2018-09-14 15:53:01,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 308 transitions. [2018-09-14 15:53:01,565 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 308 transitions. Word has length 341 [2018-09-14 15:53:01,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:01,565 INFO L480 AbstractCegarLoop]: Abstraction has 291 states and 308 transitions. [2018-09-14 15:53:01,565 INFO L481 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-09-14 15:53:01,565 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 308 transitions. [2018-09-14 15:53:01,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 345 [2018-09-14 15:53:01,567 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:01,568 INFO L376 BasicCegarLoop]: trace histogram [28, 28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:01,568 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:01,568 INFO L82 PathProgramCache]: Analyzing trace with hash -298618547, now seen corresponding path program 39 times [2018-09-14 15:53:01,568 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:01,569 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:01,569 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:01,569 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:01,569 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:01,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:03,242 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-14 15:53:03,243 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:03,243 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:03,252 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:53:03,253 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:53:03,393 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-09-14 15:53:03,393 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:03,399 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:04,751 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-14 15:53:04,751 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:05,769 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-14 15:53:05,789 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:05,789 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:05,804 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:53:05,805 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:53:06,875 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-09-14 15:53:06,875 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:06,896 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:07,004 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-14 15:53:07,004 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:08,358 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-14 15:53:08,360 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:08,361 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58, 58, 58, 58] total 86 [2018-09-14 15:53:08,361 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:08,361 INFO L459 AbstractCegarLoop]: Interpolant automaton has 86 states [2018-09-14 15:53:08,362 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2018-09-14 15:53:08,363 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1709, Invalid=5601, Unknown=0, NotChecked=0, Total=7310 [2018-09-14 15:53:08,363 INFO L87 Difference]: Start difference. First operand 291 states and 308 transitions. Second operand 86 states. [2018-09-14 15:53:10,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:10,272 INFO L93 Difference]: Finished difference Result 581 states and 682 transitions. [2018-09-14 15:53:10,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-09-14 15:53:10,272 INFO L78 Accepts]: Start accepts. Automaton has 86 states. Word has length 344 [2018-09-14 15:53:10,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:10,274 INFO L225 Difference]: With dead ends: 581 [2018-09-14 15:53:10,274 INFO L226 Difference]: Without dead ends: 434 [2018-09-14 15:53:10,275 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1460 GetRequests, 1238 SyntacticMatches, 110 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6372 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=3361, Invalid=9521, Unknown=0, NotChecked=0, Total=12882 [2018-09-14 15:53:10,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2018-09-14 15:53:10,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 294. [2018-09-14 15:53:10,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-09-14 15:53:10,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 311 transitions. [2018-09-14 15:53:10,297 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 311 transitions. Word has length 344 [2018-09-14 15:53:10,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:10,298 INFO L480 AbstractCegarLoop]: Abstraction has 294 states and 311 transitions. [2018-09-14 15:53:10,298 INFO L481 AbstractCegarLoop]: Interpolant automaton has 86 states. [2018-09-14 15:53:10,298 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 311 transitions. [2018-09-14 15:53:10,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 348 [2018-09-14 15:53:10,300 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:10,300 INFO L376 BasicCegarLoop]: trace histogram [29, 29, 28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:10,300 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:10,301 INFO L82 PathProgramCache]: Analyzing trace with hash 1488809513, now seen corresponding path program 40 times [2018-09-14 15:53:10,301 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:10,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:10,302 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:10,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:10,302 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:10,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:10,902 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1271 proven. 1915 refuted. 0 times theorem prover too weak. 1326 trivial. 0 not checked. [2018-09-14 15:53:10,902 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:10,902 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:10,910 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:53:10,910 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:53:11,015 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:53:11,015 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:11,020 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:11,179 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-14 15:53:11,179 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:11,935 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-14 15:53:11,956 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:11,956 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:11,971 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:53:11,971 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:53:12,254 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:53:12,254 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:12,266 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:12,340 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-14 15:53:12,340 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:13,262 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-14 15:53:13,264 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:13,264 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 33, 33, 33] total 38 [2018-09-14 15:53:13,264 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:13,265 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-09-14 15:53:13,265 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-09-14 15:53:13,266 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=512, Invalid=894, Unknown=0, NotChecked=0, Total=1406 [2018-09-14 15:53:13,266 INFO L87 Difference]: Start difference. First operand 294 states and 311 transitions. Second operand 37 states. [2018-09-14 15:53:13,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:13,719 INFO L93 Difference]: Finished difference Result 315 states and 335 transitions. [2018-09-14 15:53:13,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-09-14 15:53:13,720 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 347 [2018-09-14 15:53:13,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:13,722 INFO L225 Difference]: With dead ends: 315 [2018-09-14 15:53:13,722 INFO L226 Difference]: Without dead ends: 313 [2018-09-14 15:53:13,723 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1451 GetRequests, 1303 SyntacticMatches, 110 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2027 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=525, Invalid=1035, Unknown=0, NotChecked=0, Total=1560 [2018-09-14 15:53:13,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2018-09-14 15:53:13,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 308. [2018-09-14 15:53:13,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2018-09-14 15:53:13,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 326 transitions. [2018-09-14 15:53:13,741 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 326 transitions. Word has length 347 [2018-09-14 15:53:13,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:13,741 INFO L480 AbstractCegarLoop]: Abstraction has 308 states and 326 transitions. [2018-09-14 15:53:13,742 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-09-14 15:53:13,742 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 326 transitions. [2018-09-14 15:53:13,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 366 [2018-09-14 15:53:13,744 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:13,744 INFO L376 BasicCegarLoop]: trace histogram [30, 30, 30, 30, 29, 29, 29, 29, 29, 29, 29, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:13,745 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:13,745 INFO L82 PathProgramCache]: Analyzing trace with hash 2103961737, now seen corresponding path program 41 times [2018-09-14 15:53:13,745 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:13,745 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:13,746 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:13,746 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:13,746 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:13,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:15,219 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:15,219 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:15,219 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:15,248 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:53:15,248 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:53:15,398 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-09-14 15:53:15,398 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:15,404 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:16,909 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:16,909 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:18,279 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:18,300 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:18,300 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:18,316 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:53:18,316 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:53:19,462 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-09-14 15:53:19,462 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:19,480 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:19,624 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:19,624 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:20,773 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:20,775 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:20,775 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61, 61, 61, 61] total 93 [2018-09-14 15:53:20,775 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:20,776 INFO L459 AbstractCegarLoop]: Interpolant automaton has 91 states [2018-09-14 15:53:20,776 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 91 interpolants. [2018-09-14 15:53:20,777 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2013, Invalid=6543, Unknown=0, NotChecked=0, Total=8556 [2018-09-14 15:53:20,777 INFO L87 Difference]: Start difference. First operand 308 states and 326 transitions. Second operand 91 states. [2018-09-14 15:53:22,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:22,946 INFO L93 Difference]: Finished difference Result 615 states and 720 transitions. [2018-09-14 15:53:22,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-09-14 15:53:22,946 INFO L78 Accepts]: Start accepts. Automaton has 91 states. Word has length 365 [2018-09-14 15:53:22,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:22,948 INFO L225 Difference]: With dead ends: 615 [2018-09-14 15:53:22,948 INFO L226 Difference]: Without dead ends: 456 [2018-09-14 15:53:22,950 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1548 GetRequests, 1316 SyntacticMatches, 112 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7388 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=3840, Invalid=10922, Unknown=0, NotChecked=0, Total=14762 [2018-09-14 15:53:22,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 456 states. [2018-09-14 15:53:22,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 456 to 311. [2018-09-14 15:53:22,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 311 states. [2018-09-14 15:53:22,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311 states to 311 states and 329 transitions. [2018-09-14 15:53:22,970 INFO L78 Accepts]: Start accepts. Automaton has 311 states and 329 transitions. Word has length 365 [2018-09-14 15:53:22,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:22,970 INFO L480 AbstractCegarLoop]: Abstraction has 311 states and 329 transitions. [2018-09-14 15:53:22,970 INFO L481 AbstractCegarLoop]: Interpolant automaton has 91 states. [2018-09-14 15:53:22,971 INFO L276 IsEmpty]: Start isEmpty. Operand 311 states and 329 transitions. [2018-09-14 15:53:22,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 369 [2018-09-14 15:53:22,973 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:22,973 INFO L376 BasicCegarLoop]: trace histogram [30, 30, 30, 30, 30, 30, 29, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:22,974 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:22,974 INFO L82 PathProgramCache]: Analyzing trace with hash 1897909549, now seen corresponding path program 42 times [2018-09-14 15:53:22,974 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:22,975 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:22,975 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:22,975 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:22,975 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:23,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:24,514 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:24,514 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:24,514 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:24,522 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:53:24,522 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:53:24,669 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 30 check-sat command(s) [2018-09-14 15:53:24,669 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:24,676 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:26,188 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:26,188 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:27,382 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:27,403 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:27,403 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:27,419 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:53:27,419 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:53:28,680 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 30 check-sat command(s) [2018-09-14 15:53:28,681 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:28,696 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:28,826 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:28,826 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:30,020 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:30,022 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:30,023 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62, 62, 62, 62] total 92 [2018-09-14 15:53:30,023 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:30,023 INFO L459 AbstractCegarLoop]: Interpolant automaton has 92 states [2018-09-14 15:53:30,024 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2018-09-14 15:53:30,024 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1951, Invalid=6421, Unknown=0, NotChecked=0, Total=8372 [2018-09-14 15:53:30,024 INFO L87 Difference]: Start difference. First operand 311 states and 329 transitions. Second operand 92 states. [2018-09-14 15:53:32,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:32,139 INFO L93 Difference]: Finished difference Result 621 states and 729 transitions. [2018-09-14 15:53:32,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-09-14 15:53:32,139 INFO L78 Accepts]: Start accepts. Automaton has 92 states. Word has length 368 [2018-09-14 15:53:32,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:32,141 INFO L225 Difference]: With dead ends: 621 [2018-09-14 15:53:32,142 INFO L226 Difference]: Without dead ends: 464 [2018-09-14 15:53:32,143 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1562 GetRequests, 1324 SyntacticMatches, 118 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7337 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=3841, Invalid=10921, Unknown=0, NotChecked=0, Total=14762 [2018-09-14 15:53:32,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2018-09-14 15:53:32,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 314. [2018-09-14 15:53:32,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314 states. [2018-09-14 15:53:32,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 332 transitions. [2018-09-14 15:53:32,164 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 332 transitions. Word has length 368 [2018-09-14 15:53:32,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:32,164 INFO L480 AbstractCegarLoop]: Abstraction has 314 states and 332 transitions. [2018-09-14 15:53:32,164 INFO L481 AbstractCegarLoop]: Interpolant automaton has 92 states. [2018-09-14 15:53:32,165 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 332 transitions. [2018-09-14 15:53:32,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 372 [2018-09-14 15:53:32,167 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:32,167 INFO L376 BasicCegarLoop]: trace histogram [31, 31, 30, 30, 30, 30, 30, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:32,167 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:32,168 INFO L82 PathProgramCache]: Analyzing trace with hash 905442825, now seen corresponding path program 43 times [2018-09-14 15:53:32,168 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:32,168 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:32,168 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:32,169 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:32,169 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:32,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:33,601 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1452 proven. 2202 refuted. 0 times theorem prover too weak. 1540 trivial. 0 not checked. [2018-09-14 15:53:33,602 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:33,602 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:33,611 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:53:33,611 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:53:33,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:33,731 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:33,876 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:33,876 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:34,721 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:34,741 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:34,742 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:34,758 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:53:34,758 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:53:35,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:35,036 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:35,119 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:35,119 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:35,934 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-14 15:53:35,936 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:35,936 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 35, 35, 35, 35] total 39 [2018-09-14 15:53:35,936 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:35,937 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-14 15:53:35,937 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-14 15:53:35,938 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=909, Unknown=0, NotChecked=0, Total=1482 [2018-09-14 15:53:35,938 INFO L87 Difference]: Start difference. First operand 314 states and 332 transitions. Second operand 38 states. [2018-09-14 15:53:36,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:36,396 INFO L93 Difference]: Finished difference Result 330 states and 349 transitions. [2018-09-14 15:53:36,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-09-14 15:53:36,397 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 371 [2018-09-14 15:53:36,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:36,400 INFO L225 Difference]: With dead ends: 330 [2018-09-14 15:53:36,400 INFO L226 Difference]: Without dead ends: 328 [2018-09-14 15:53:36,400 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1551 GetRequests, 1394 SyntacticMatches, 118 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2252 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=586, Invalid=1054, Unknown=0, NotChecked=0, Total=1640 [2018-09-14 15:53:36,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2018-09-14 15:53:36,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 328. [2018-09-14 15:53:36,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2018-09-14 15:53:36,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 347 transitions. [2018-09-14 15:53:36,422 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 347 transitions. Word has length 371 [2018-09-14 15:53:36,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:36,423 INFO L480 AbstractCegarLoop]: Abstraction has 328 states and 347 transitions. [2018-09-14 15:53:36,423 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-14 15:53:36,423 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 347 transitions. [2018-09-14 15:53:36,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 390 [2018-09-14 15:53:36,425 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:36,425 INFO L376 BasicCegarLoop]: trace histogram [32, 32, 32, 32, 31, 31, 31, 31, 31, 31, 31, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:36,426 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:36,426 INFO L82 PathProgramCache]: Analyzing trace with hash 247740521, now seen corresponding path program 44 times [2018-09-14 15:53:36,426 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:36,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:36,427 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:53:36,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:36,427 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:36,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:38,399 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2480 proven. 1395 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-14 15:53:38,399 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:38,399 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:38,405 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:53:38,406 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:53:38,524 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:53:38,525 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:38,531 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:40,133 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2595 proven. 1395 refuted. 0 times theorem prover too weak. 1745 trivial. 0 not checked. [2018-09-14 15:53:40,133 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:41,439 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2477 proven. 1395 refuted. 0 times theorem prover too weak. 1863 trivial. 0 not checked. [2018-09-14 15:53:41,460 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:41,460 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:41,475 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:53:41,475 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:53:41,749 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:53:41,749 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:41,768 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:41,900 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2595 proven. 1395 refuted. 0 times theorem prover too weak. 1745 trivial. 0 not checked. [2018-09-14 15:53:41,900 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:43,432 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2477 proven. 1395 refuted. 0 times theorem prover too weak. 1863 trivial. 0 not checked. [2018-09-14 15:53:43,434 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:43,434 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 64, 64, 64, 64] total 96 [2018-09-14 15:53:43,434 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:43,435 INFO L459 AbstractCegarLoop]: Interpolant automaton has 96 states [2018-09-14 15:53:43,436 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2018-09-14 15:53:43,437 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2111, Invalid=7009, Unknown=0, NotChecked=0, Total=9120 [2018-09-14 15:53:43,437 INFO L87 Difference]: Start difference. First operand 328 states and 347 transitions. Second operand 96 states. [2018-09-14 15:53:49,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:49,065 INFO L93 Difference]: Finished difference Result 655 states and 767 transitions. [2018-09-14 15:53:49,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-09-14 15:53:49,065 INFO L78 Accepts]: Start accepts. Automaton has 96 states. Word has length 389 [2018-09-14 15:53:49,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:49,067 INFO L225 Difference]: With dead ends: 655 [2018-09-14 15:53:49,068 INFO L226 Difference]: Without dead ends: 486 [2018-09-14 15:53:49,069 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1650 GetRequests, 1403 SyntacticMatches, 122 SemanticMatches, 125 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7995 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=4126, Invalid=11876, Unknown=0, NotChecked=0, Total=16002 [2018-09-14 15:53:49,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 486 states. [2018-09-14 15:53:49,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 486 to 331. [2018-09-14 15:53:49,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2018-09-14 15:53:49,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 350 transitions. [2018-09-14 15:53:49,092 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 350 transitions. Word has length 389 [2018-09-14 15:53:49,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:49,093 INFO L480 AbstractCegarLoop]: Abstraction has 331 states and 350 transitions. [2018-09-14 15:53:49,093 INFO L481 AbstractCegarLoop]: Interpolant automaton has 96 states. [2018-09-14 15:53:49,093 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 350 transitions. [2018-09-14 15:53:49,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 393 [2018-09-14 15:53:49,095 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:49,096 INFO L376 BasicCegarLoop]: trace histogram [32, 32, 32, 32, 32, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:49,096 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:49,096 INFO L82 PathProgramCache]: Analyzing trace with hash -1056870131, now seen corresponding path program 45 times [2018-09-14 15:53:49,096 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:49,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:49,097 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:49,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:49,097 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:49,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:51,078 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-14 15:53:51,079 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:51,079 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:51,090 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:53:51,091 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:53:51,260 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 32 check-sat command(s) [2018-09-14 15:53:51,260 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:51,266 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:53,004 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-14 15:53:53,004 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:54,673 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-14 15:53:54,695 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:54,695 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:54,716 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:53:54,716 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:53:56,133 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 32 check-sat command(s) [2018-09-14 15:53:56,133 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:56,147 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:56,306 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-14 15:53:56,307 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:57,740 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-14 15:53:57,742 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:57,742 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 66, 66, 66, 66] total 98 [2018-09-14 15:53:57,742 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:57,743 INFO L459 AbstractCegarLoop]: Interpolant automaton has 98 states [2018-09-14 15:53:57,744 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2018-09-14 15:53:57,744 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2209, Invalid=7297, Unknown=0, NotChecked=0, Total=9506 [2018-09-14 15:53:57,745 INFO L87 Difference]: Start difference. First operand 331 states and 350 transitions. Second operand 98 states. [2018-09-14 15:54:00,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:54:00,008 INFO L93 Difference]: Finished difference Result 661 states and 776 transitions. [2018-09-14 15:54:00,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-09-14 15:54:00,008 INFO L78 Accepts]: Start accepts. Automaton has 98 states. Word has length 392 [2018-09-14 15:54:00,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:54:00,010 INFO L225 Difference]: With dead ends: 661 [2018-09-14 15:54:00,010 INFO L226 Difference]: Without dead ends: 494 [2018-09-14 15:54:00,012 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1664 GetRequests, 1410 SyntacticMatches, 126 SemanticMatches, 128 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8370 ImplicationChecksByTransitivity, 6.8s TimeCoverageRelationStatistics Valid=4353, Invalid=12417, Unknown=0, NotChecked=0, Total=16770 [2018-09-14 15:54:00,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states. [2018-09-14 15:54:00,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 334. [2018-09-14 15:54:00,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 334 states. [2018-09-14 15:54:00,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 334 states to 334 states and 353 transitions. [2018-09-14 15:54:00,035 INFO L78 Accepts]: Start accepts. Automaton has 334 states and 353 transitions. Word has length 392 [2018-09-14 15:54:00,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:54:00,036 INFO L480 AbstractCegarLoop]: Abstraction has 334 states and 353 transitions. [2018-09-14 15:54:00,036 INFO L481 AbstractCegarLoop]: Interpolant automaton has 98 states. [2018-09-14 15:54:00,036 INFO L276 IsEmpty]: Start isEmpty. Operand 334 states and 353 transitions. [2018-09-14 15:54:00,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 396 [2018-09-14 15:54:00,038 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:54:00,039 INFO L376 BasicCegarLoop]: trace histogram [33, 33, 32, 32, 32, 32, 32, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:54:00,039 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:54:00,039 INFO L82 PathProgramCache]: Analyzing trace with hash -1553742359, now seen corresponding path program 46 times [2018-09-14 15:54:00,039 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:54:00,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:00,040 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:54:00,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:00,040 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:54:00,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:01,118 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1645 proven. 2509 refuted. 0 times theorem prover too weak. 1770 trivial. 0 not checked. [2018-09-14 15:54:01,119 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:01,119 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:54:01,128 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:54:01,128 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:54:01,252 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:54:01,252 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:01,259 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:01,441 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-14 15:54:01,442 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:02,327 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-14 15:54:02,347 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:02,348 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:54:02,362 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:54:02,363 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:54:02,717 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:54:02,717 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:02,735 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:02,846 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-14 15:54:02,846 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:04,028 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-14 15:54:04,030 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:54:04,030 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 37, 37, 37] total 42 [2018-09-14 15:54:04,030 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:54:04,031 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-09-14 15:54:04,031 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-09-14 15:54:04,032 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=646, Invalid=1076, Unknown=0, NotChecked=0, Total=1722 [2018-09-14 15:54:04,032 INFO L87 Difference]: Start difference. First operand 334 states and 353 transitions. Second operand 41 states. [2018-09-14 15:54:04,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:54:04,631 INFO L93 Difference]: Finished difference Result 355 states and 377 transitions. [2018-09-14 15:54:04,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-09-14 15:54:04,631 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 395 [2018-09-14 15:54:04,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:54:04,634 INFO L225 Difference]: With dead ends: 355 [2018-09-14 15:54:04,634 INFO L226 Difference]: Without dead ends: 353 [2018-09-14 15:54:04,635 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1651 GetRequests, 1483 SyntacticMatches, 126 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2571 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=659, Invalid=1233, Unknown=0, NotChecked=0, Total=1892 [2018-09-14 15:54:04,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 353 states. [2018-09-14 15:54:04,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 353 to 348. [2018-09-14 15:54:04,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2018-09-14 15:54:04,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 368 transitions. [2018-09-14 15:54:04,653 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 368 transitions. Word has length 395 [2018-09-14 15:54:04,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:54:04,654 INFO L480 AbstractCegarLoop]: Abstraction has 348 states and 368 transitions. [2018-09-14 15:54:04,654 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-09-14 15:54:04,654 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 368 transitions. [2018-09-14 15:54:04,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 414 [2018-09-14 15:54:04,656 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:54:04,656 INFO L376 BasicCegarLoop]: trace histogram [34, 34, 34, 34, 33, 33, 33, 33, 33, 33, 33, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:54:04,657 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:54:04,657 INFO L82 PathProgramCache]: Analyzing trace with hash -779104183, now seen corresponding path program 47 times [2018-09-14 15:54:04,657 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:54:04,658 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:04,658 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:54:04,658 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:04,658 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:54:04,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:06,279 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:06,279 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:06,279 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:54:06,286 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:54:06,286 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:54:06,466 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2018-09-14 15:54:06,467 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:06,473 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:08,354 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:08,354 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:10,152 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:10,172 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:10,172 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:54:10,188 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:54:10,188 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:54:11,644 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2018-09-14 15:54:11,645 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:11,658 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:11,813 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:11,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:13,290 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:13,291 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:54:13,292 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [69, 69, 69, 69, 69] total 105 [2018-09-14 15:54:13,292 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:54:13,292 INFO L459 AbstractCegarLoop]: Interpolant automaton has 103 states [2018-09-14 15:54:13,293 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2018-09-14 15:54:13,293 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2553, Invalid=8367, Unknown=0, NotChecked=0, Total=10920 [2018-09-14 15:54:13,293 INFO L87 Difference]: Start difference. First operand 348 states and 368 transitions. Second operand 103 states. [2018-09-14 15:54:15,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:54:15,491 INFO L93 Difference]: Finished difference Result 695 states and 814 transitions. [2018-09-14 15:54:15,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-09-14 15:54:15,492 INFO L78 Accepts]: Start accepts. Automaton has 103 states. Word has length 413 [2018-09-14 15:54:15,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:54:15,495 INFO L225 Difference]: With dead ends: 695 [2018-09-14 15:54:15,495 INFO L226 Difference]: Without dead ends: 516 [2018-09-14 15:54:15,497 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1752 GetRequests, 1488 SyntacticMatches, 128 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9530 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=4896, Invalid=14010, Unknown=0, NotChecked=0, Total=18906 [2018-09-14 15:54:15,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 516 states. [2018-09-14 15:54:15,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 516 to 351. [2018-09-14 15:54:15,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 351 states. [2018-09-14 15:54:15,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 351 states to 351 states and 371 transitions. [2018-09-14 15:54:15,522 INFO L78 Accepts]: Start accepts. Automaton has 351 states and 371 transitions. Word has length 413 [2018-09-14 15:54:15,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:54:15,522 INFO L480 AbstractCegarLoop]: Abstraction has 351 states and 371 transitions. [2018-09-14 15:54:15,522 INFO L481 AbstractCegarLoop]: Interpolant automaton has 103 states. [2018-09-14 15:54:15,522 INFO L276 IsEmpty]: Start isEmpty. Operand 351 states and 371 transitions. [2018-09-14 15:54:15,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 417 [2018-09-14 15:54:15,525 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:54:15,526 INFO L376 BasicCegarLoop]: trace histogram [34, 34, 34, 34, 34, 34, 33, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:54:15,526 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:54:15,526 INFO L82 PathProgramCache]: Analyzing trace with hash 479616237, now seen corresponding path program 48 times [2018-09-14 15:54:15,526 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:54:15,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:15,527 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:54:15,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:15,527 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:54:15,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:17,243 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:17,243 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:17,243 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:54:17,250 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:54:17,251 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:54:17,433 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 34 check-sat command(s) [2018-09-14 15:54:17,433 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:17,440 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:19,536 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:19,536 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:21,061 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:21,081 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:21,082 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:54:21,096 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:54:21,096 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:54:22,638 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 34 check-sat command(s) [2018-09-14 15:54:22,639 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:22,653 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:22,814 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:22,815 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:24,670 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:24,672 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:54:24,673 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [70, 70, 70, 70, 70] total 104 [2018-09-14 15:54:24,673 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:54:24,673 INFO L459 AbstractCegarLoop]: Interpolant automaton has 104 states [2018-09-14 15:54:24,674 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2018-09-14 15:54:24,674 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2483, Invalid=8229, Unknown=0, NotChecked=0, Total=10712 [2018-09-14 15:54:24,674 INFO L87 Difference]: Start difference. First operand 351 states and 371 transitions. Second operand 104 states. [2018-09-14 15:54:27,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:54:27,136 INFO L93 Difference]: Finished difference Result 701 states and 823 transitions. [2018-09-14 15:54:27,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-09-14 15:54:27,137 INFO L78 Accepts]: Start accepts. Automaton has 104 states. Word has length 416 [2018-09-14 15:54:27,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:54:27,140 INFO L225 Difference]: With dead ends: 701 [2018-09-14 15:54:27,140 INFO L226 Difference]: Without dead ends: 524 [2018-09-14 15:54:27,142 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1766 GetRequests, 1496 SyntacticMatches, 134 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9471 ImplicationChecksByTransitivity, 7.1s TimeCoverageRelationStatistics Valid=4897, Invalid=14009, Unknown=0, NotChecked=0, Total=18906 [2018-09-14 15:54:27,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 524 states. [2018-09-14 15:54:27,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 524 to 354. [2018-09-14 15:54:27,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 354 states. [2018-09-14 15:54:27,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 374 transitions. [2018-09-14 15:54:27,168 INFO L78 Accepts]: Start accepts. Automaton has 354 states and 374 transitions. Word has length 416 [2018-09-14 15:54:27,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:54:27,168 INFO L480 AbstractCegarLoop]: Abstraction has 354 states and 374 transitions. [2018-09-14 15:54:27,168 INFO L481 AbstractCegarLoop]: Interpolant automaton has 104 states. [2018-09-14 15:54:27,168 INFO L276 IsEmpty]: Start isEmpty. Operand 354 states and 374 transitions. [2018-09-14 15:54:27,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 420 [2018-09-14 15:54:27,171 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:54:27,171 INFO L376 BasicCegarLoop]: trace histogram [35, 35, 34, 34, 34, 34, 34, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:54:27,172 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:54:27,172 INFO L82 PathProgramCache]: Analyzing trace with hash -339812919, now seen corresponding path program 49 times [2018-09-14 15:54:27,172 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:54:27,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:27,173 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:54:27,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:27,173 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:54:27,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:27,995 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1850 proven. 2836 refuted. 0 times theorem prover too weak. 2016 trivial. 0 not checked. [2018-09-14 15:54:27,995 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:27,995 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:54:28,002 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:54:28,002 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:54:28,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:28,136 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:28,299 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:28,299 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:29,580 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:29,600 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:29,600 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:54:29,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:54:29,615 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:54:29,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:29,926 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:30,079 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:30,079 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:31,118 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-14 15:54:31,120 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:54:31,121 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 39, 39, 39, 39] total 43 [2018-09-14 15:54:31,121 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:54:31,122 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-09-14 15:54:31,122 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-09-14 15:54:31,122 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=715, Invalid=1091, Unknown=0, NotChecked=0, Total=1806 [2018-09-14 15:54:31,122 INFO L87 Difference]: Start difference. First operand 354 states and 374 transitions. Second operand 42 states. [2018-09-14 15:54:31,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:54:31,684 INFO L93 Difference]: Finished difference Result 370 states and 391 transitions. [2018-09-14 15:54:31,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-09-14 15:54:31,684 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 419 [2018-09-14 15:54:31,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:54:31,687 INFO L225 Difference]: With dead ends: 370 [2018-09-14 15:54:31,687 INFO L226 Difference]: Without dead ends: 368 [2018-09-14 15:54:31,688 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1751 GetRequests, 1574 SyntacticMatches, 134 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2824 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=728, Invalid=1252, Unknown=0, NotChecked=0, Total=1980 [2018-09-14 15:54:31,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states. [2018-09-14 15:54:31,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 368. [2018-09-14 15:54:31,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 368 states. [2018-09-14 15:54:31,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 389 transitions. [2018-09-14 15:54:31,705 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 389 transitions. Word has length 419 [2018-09-14 15:54:31,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:54:31,705 INFO L480 AbstractCegarLoop]: Abstraction has 368 states and 389 transitions. [2018-09-14 15:54:31,705 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-09-14 15:54:31,706 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 389 transitions. [2018-09-14 15:54:31,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 438 [2018-09-14 15:54:31,708 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:54:31,708 INFO L376 BasicCegarLoop]: trace histogram [36, 36, 36, 36, 35, 35, 35, 35, 35, 35, 35, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:54:31,708 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:54:31,709 INFO L82 PathProgramCache]: Analyzing trace with hash 487108649, now seen corresponding path program 50 times [2018-09-14 15:54:31,709 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:54:31,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:31,709 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:54:31,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:31,710 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:54:31,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:33,585 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3150 proven. 1785 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-14 15:54:33,585 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:33,585 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:54:33,593 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:54:33,593 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:54:33,724 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:54:33,724 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:33,730 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:36,035 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3281 proven. 1785 refuted. 0 times theorem prover too weak. 2249 trivial. 0 not checked. [2018-09-14 15:54:36,035 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:37,630 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3147 proven. 1785 refuted. 0 times theorem prover too weak. 2383 trivial. 0 not checked. [2018-09-14 15:54:37,651 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:37,652 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:54:37,667 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:54:37,667 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:54:37,970 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:54:37,970 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:37,991 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:38,160 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3281 proven. 1785 refuted. 0 times theorem prover too weak. 2249 trivial. 0 not checked. [2018-09-14 15:54:38,160 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:40,075 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3147 proven. 1785 refuted. 0 times theorem prover too weak. 2383 trivial. 0 not checked. [2018-09-14 15:54:40,077 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:54:40,078 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [73, 72, 72, 72, 72] total 108 [2018-09-14 15:54:40,078 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:54:40,078 INFO L459 AbstractCegarLoop]: Interpolant automaton has 108 states [2018-09-14 15:54:40,079 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 108 interpolants. [2018-09-14 15:54:40,079 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2663, Invalid=8893, Unknown=0, NotChecked=0, Total=11556 [2018-09-14 15:54:40,079 INFO L87 Difference]: Start difference. First operand 368 states and 389 transitions. Second operand 108 states. [2018-09-14 15:54:42,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:54:42,817 INFO L93 Difference]: Finished difference Result 735 states and 861 transitions. [2018-09-14 15:54:42,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2018-09-14 15:54:42,817 INFO L78 Accepts]: Start accepts. Automaton has 108 states. Word has length 437 [2018-09-14 15:54:42,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:54:42,819 INFO L225 Difference]: With dead ends: 735 [2018-09-14 15:54:42,819 INFO L226 Difference]: Without dead ends: 546 [2018-09-14 15:54:42,821 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1854 GetRequests, 1575 SyntacticMatches, 138 SemanticMatches, 141 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10217 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=5218, Invalid=15088, Unknown=0, NotChecked=0, Total=20306 [2018-09-14 15:54:42,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2018-09-14 15:54:42,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 371. [2018-09-14 15:54:42,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 371 states. [2018-09-14 15:54:42,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371 states to 371 states and 392 transitions. [2018-09-14 15:54:42,842 INFO L78 Accepts]: Start accepts. Automaton has 371 states and 392 transitions. Word has length 437 [2018-09-14 15:54:42,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:54:42,842 INFO L480 AbstractCegarLoop]: Abstraction has 371 states and 392 transitions. [2018-09-14 15:54:42,842 INFO L481 AbstractCegarLoop]: Interpolant automaton has 108 states. [2018-09-14 15:54:42,842 INFO L276 IsEmpty]: Start isEmpty. Operand 371 states and 392 transitions. [2018-09-14 15:54:42,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 441 [2018-09-14 15:54:42,844 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:54:42,844 INFO L376 BasicCegarLoop]: trace histogram [36, 36, 36, 36, 36, 36, 35, 35, 35, 35, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:54:42,844 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:54:42,845 INFO L82 PathProgramCache]: Analyzing trace with hash 1327272141, now seen corresponding path program 51 times [2018-09-14 15:54:42,845 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:54:42,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:42,845 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:54:42,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:42,846 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:54:42,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:44,954 INFO L134 CoverageAnalysis]: Checked inductivity of 7420 backedges. 3150 proven. 1890 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-14 15:54:44,955 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:44,955 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:54:44,962 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:54:44,962 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:54:45,244 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 36 check-sat command(s) [2018-09-14 15:54:45,244 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:45,251 INFO L273 TraceCheckSpWp]: Computing forward predicates... Received shutdown request... [2018-09-14 15:54:45,787 INFO L177 TraceCheckSpWp]: Timeout while computing interpolants [2018-09-14 15:54:45,988 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 102 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:54:45,988 WARN L549 AbstractCegarLoop]: Verification canceled [2018-09-14 15:54:45,993 WARN L206 ceAbstractionStarter]: Timeout [2018-09-14 15:54:45,994 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.09 03:54:45 BoogieIcfgContainer [2018-09-14 15:54:45,994 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-14 15:54:45,994 INFO L168 Benchmark]: Toolchain (without parser) took 232310.39 ms. Allocated memory was 1.5 GB in the beginning and 2.5 GB in the end (delta: 932.2 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -766.1 MB). Peak memory consumption was 166.1 MB. Max. memory is 7.1 GB. [2018-09-14 15:54:45,995 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-14 15:54:45,995 INFO L168 Benchmark]: CACSL2BoogieTranslator took 266.85 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-09-14 15:54:45,996 INFO L168 Benchmark]: Boogie Procedure Inliner took 24.05 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-14 15:54:45,996 INFO L168 Benchmark]: Boogie Preprocessor took 37.38 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-14 15:54:45,996 INFO L168 Benchmark]: RCFGBuilder took 471.09 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 733.5 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -776.2 MB). Peak memory consumption was 26.7 MB. Max. memory is 7.1 GB. [2018-09-14 15:54:45,997 INFO L168 Benchmark]: TraceAbstraction took 231502.77 ms. Allocated memory was 2.3 GB in the beginning and 2.5 GB in the end (delta: 198.7 MB). Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: -432.9 kB). Peak memory consumption was 198.3 MB. Max. memory is 7.1 GB. [2018-09-14 15:54:45,999 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 266.85 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 24.05 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 37.38 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 471.09 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 733.5 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -776.2 MB). Peak memory consumption was 26.7 MB. Max. memory is 7.1 GB. * TraceAbstraction took 231502.77 ms. Allocated memory was 2.3 GB in the beginning and 2.5 GB in the end (delta: 198.7 MB). Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: -432.9 kB). Peak memory consumption was 198.3 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was analyzing trace of length 441 with TraceHistMax 36, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 86 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 30 locations, 1 error locations. TIMEOUT Result, 231.4s OverallTime, 54 OverallIterations, 36 TraceHistogramMax, 52.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3926 SDtfs, 8247 SDslu, 37495 SDs, 0 SdLazy, 30265 SolverSat, 4656 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 28.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 49813 GetRequests, 43157 SyntacticMatches, 3614 SemanticMatches, 3042 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143033 ImplicationChecksByTransitivity, 137.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=371occurred in iteration=53, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.7s AutomataMinimizationTime, 53 MinimizatonAttempts, 3195 StatesRemovedByMinimization, 44 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.2s SsaConstructionTime, 23.8s SatisfiabilityAnalysisTime, 144.2s InterpolantComputationTime, 35429 NumberOfCodeBlocks, 35429 NumberOfCodeBlocksAsserted, 1067 NumberOfCheckSat, 58752 ConstructedInterpolants, 0 QuantifiedInterpolants, 52002208 SizeOfPredicates, 284 NumberOfNonLiveVariables, 56742 ConjunctsInSsa, 4104 ConjunctsInUnsatCore, 253 InterpolantComputations, 3 PerfectInterpolantSequences, 443886/634345 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/fragtest_simple_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-09-14_15-54-46-009.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/fragtest_simple_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-14_15-54-46-009.csv Completed graceful shutdown