java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-lit/mcmillan2006_true-unreach-call_true-termination.c.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dace188-m [2018-09-14 15:52:51,047 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-14 15:52:51,049 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-14 15:52:51,067 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-14 15:52:51,067 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-14 15:52:51,069 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-14 15:52:51,070 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-14 15:52:51,072 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-14 15:52:51,074 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-14 15:52:51,075 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-14 15:52:51,076 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-14 15:52:51,076 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-14 15:52:51,077 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-14 15:52:51,078 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-14 15:52:51,079 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-14 15:52:51,080 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-14 15:52:51,081 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-14 15:52:51,082 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-14 15:52:51,084 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-14 15:52:51,086 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-14 15:52:51,087 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-14 15:52:51,088 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-14 15:52:51,090 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-14 15:52:51,091 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-14 15:52:51,091 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-14 15:52:51,092 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-14 15:52:51,093 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-14 15:52:51,094 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-14 15:52:51,097 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-14 15:52:51,099 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-14 15:52:51,099 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-14 15:52:51,101 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-09-14 15:52:51,104 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-14 15:52:51,134 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-14 15:52:51,134 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-14 15:52:51,135 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-14 15:52:51,135 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-14 15:52:51,135 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-14 15:52:51,137 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-14 15:52:51,138 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-14 15:52:51,138 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-14 15:52:51,138 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-14 15:52:51,138 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-14 15:52:51,139 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-14 15:52:51,139 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-14 15:52:51,140 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-14 15:52:51,140 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-14 15:52:51,140 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-14 15:52:51,140 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-14 15:52:51,141 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-14 15:52:51,141 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-14 15:52:51,141 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-14 15:52:51,141 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-14 15:52:51,142 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-14 15:52:51,142 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-14 15:52:51,142 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-14 15:52:51,142 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-14 15:52:51,143 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-14 15:52:51,143 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-14 15:52:51,143 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-14 15:52:51,143 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-14 15:52:51,144 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-14 15:52:51,144 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-14 15:52:51,145 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-14 15:52:51,145 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-14 15:52:51,145 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-14 15:52:51,210 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-14 15:52:51,230 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-14 15:52:51,236 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-14 15:52:51,238 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-14 15:52:51,239 INFO L276 PluginConnector]: CDTParser initialized [2018-09-14 15:52:51,239 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-lit/mcmillan2006_true-unreach-call_true-termination.c.i [2018-09-14 15:52:51,568 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/53ecd158a/4af21033e7fe40268f4d26a590325113/FLAG94300d771 [2018-09-14 15:52:51,774 INFO L277 CDTParser]: Found 1 translation units. [2018-09-14 15:52:51,774 INFO L159 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006_true-unreach-call_true-termination.c.i [2018-09-14 15:52:51,783 INFO L325 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/53ecd158a/4af21033e7fe40268f4d26a590325113/FLAG94300d771 [2018-09-14 15:52:51,810 INFO L333 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/53ecd158a/4af21033e7fe40268f4d26a590325113 [2018-09-14 15:52:51,824 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-14 15:52:51,828 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-14 15:52:51,829 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-14 15:52:51,829 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-14 15:52:51,837 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-14 15:52:51,838 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.09 03:52:51" (1/1) ... [2018-09-14 15:52:51,841 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@66ef855e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:51, skipping insertion in model container [2018-09-14 15:52:51,842 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.09 03:52:51" (1/1) ... [2018-09-14 15:52:51,856 INFO L160 ieTranslatorObserver]: Starting translation in SV-COMP mode [2018-09-14 15:52:52,087 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-14 15:52:52,111 INFO L424 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-14 15:52:52,118 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-14 15:52:52,138 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52 WrapperNode [2018-09-14 15:52:52,138 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-14 15:52:52,139 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-14 15:52:52,139 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-14 15:52:52,140 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-14 15:52:52,149 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (1/1) ... [2018-09-14 15:52:52,161 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (1/1) ... [2018-09-14 15:52:52,184 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-14 15:52:52,184 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-14 15:52:52,188 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-14 15:52:52,188 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-14 15:52:52,199 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (1/1) ... [2018-09-14 15:52:52,199 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (1/1) ... [2018-09-14 15:52:52,201 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (1/1) ... [2018-09-14 15:52:52,201 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (1/1) ... [2018-09-14 15:52:52,208 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (1/1) ... [2018-09-14 15:52:52,221 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (1/1) ... [2018-09-14 15:52:52,225 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (1/1) ... [2018-09-14 15:52:52,230 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-14 15:52:52,230 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-14 15:52:52,230 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-14 15:52:52,231 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-14 15:52:52,234 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-14 15:52:52,411 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-14 15:52:52,411 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-14 15:52:52,411 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-14 15:52:52,411 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-14 15:52:52,412 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-14 15:52:52,412 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-14 15:52:52,412 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-09-14 15:52:52,412 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-09-14 15:52:52,854 INFO L353 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-14 15:52:52,855 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.09 03:52:52 BoogieIcfgContainer [2018-09-14 15:52:52,855 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-14 15:52:52,856 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-14 15:52:52,856 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-14 15:52:52,859 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-14 15:52:52,860 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.09 03:52:51" (1/3) ... [2018-09-14 15:52:52,860 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a3bfa7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.09 03:52:52, skipping insertion in model container [2018-09-14 15:52:52,861 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:52:52" (2/3) ... [2018-09-14 15:52:52,861 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a3bfa7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.09 03:52:52, skipping insertion in model container [2018-09-14 15:52:52,861 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.09 03:52:52" (3/3) ... [2018-09-14 15:52:52,863 INFO L112 eAbstractionObserver]: Analyzing ICFG mcmillan2006_true-unreach-call_true-termination.c.i [2018-09-14 15:52:52,872 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-14 15:52:52,880 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-14 15:52:52,925 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-14 15:52:52,925 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-14 15:52:52,926 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-14 15:52:52,926 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-14 15:52:52,926 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-14 15:52:52,926 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-14 15:52:52,926 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-14 15:52:52,926 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-14 15:52:52,927 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-14 15:52:52,945 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states. [2018-09-14 15:52:52,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-09-14 15:52:52,951 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:52,952 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:52,953 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:52,958 INFO L82 PathProgramCache]: Analyzing trace with hash 235483989, now seen corresponding path program 1 times [2018-09-14 15:52:52,961 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:53,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:53,012 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:53,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:53,012 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:53,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:53,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:53,113 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-14 15:52:53,113 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-14 15:52:53,113 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:52:53,117 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-14 15:52:53,129 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-14 15:52:53,129 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-14 15:52:53,132 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 2 states. [2018-09-14 15:52:53,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:53,155 INFO L93 Difference]: Finished difference Result 44 states and 52 transitions. [2018-09-14 15:52:53,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-14 15:52:53,157 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 15 [2018-09-14 15:52:53,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:53,165 INFO L225 Difference]: With dead ends: 44 [2018-09-14 15:52:53,166 INFO L226 Difference]: Without dead ends: 22 [2018-09-14 15:52:53,169 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-14 15:52:53,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-09-14 15:52:53,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-09-14 15:52:53,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-09-14 15:52:53,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2018-09-14 15:52:53,209 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 23 transitions. Word has length 15 [2018-09-14 15:52:53,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:53,209 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 23 transitions. [2018-09-14 15:52:53,209 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-14 15:52:53,210 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2018-09-14 15:52:53,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-09-14 15:52:53,210 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:53,211 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:53,211 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:53,211 INFO L82 PathProgramCache]: Analyzing trace with hash 1613839314, now seen corresponding path program 1 times [2018-09-14 15:52:53,212 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:53,213 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:53,213 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:53,213 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:53,213 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:53,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:53,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:53,371 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-14 15:52:53,371 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-09-14 15:52:53,372 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:52:53,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-14 15:52:53,374 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-14 15:52:53,374 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-09-14 15:52:53,374 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. Second operand 5 states. [2018-09-14 15:52:53,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:53,539 INFO L93 Difference]: Finished difference Result 39 states and 41 transitions. [2018-09-14 15:52:53,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-14 15:52:53,541 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-09-14 15:52:53,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:53,542 INFO L225 Difference]: With dead ends: 39 [2018-09-14 15:52:53,542 INFO L226 Difference]: Without dead ends: 25 [2018-09-14 15:52:53,543 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-09-14 15:52:53,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-09-14 15:52:53,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2018-09-14 15:52:53,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-09-14 15:52:53,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 25 transitions. [2018-09-14 15:52:53,550 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 25 transitions. Word has length 16 [2018-09-14 15:52:53,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:53,550 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 25 transitions. [2018-09-14 15:52:53,550 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-14 15:52:53,550 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 25 transitions. [2018-09-14 15:52:53,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-09-14 15:52:53,551 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:53,551 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:53,552 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:53,552 INFO L82 PathProgramCache]: Analyzing trace with hash -1557204615, now seen corresponding path program 1 times [2018-09-14 15:52:53,552 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:53,553 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:53,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:53,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:53,554 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:53,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:54,116 WARN L178 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 16 DAG size of output: 11 [2018-09-14 15:52:54,153 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:54,153 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:54,154 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:54,163 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:54,164 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:54,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:54,216 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:54,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-09-14 15:52:54,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-09-14 15:52:54,341 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:52:54,343 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:54,349 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:54,349 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-09-14 15:52:54,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-09-14 15:52:54,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-09-14 15:52:54,509 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:52:54,521 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:54,523 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:54,523 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 [2018-09-14 15:52:54,590 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:54,590 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:54,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-09-14 15:52:54,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2018-09-14 15:52:54,765 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:52:54,769 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:54,775 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:54,775 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:14, output treesize:5 [2018-09-14 15:52:54,810 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:54,831 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:54,831 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:54,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:54,849 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:54,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:54,894 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:54,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-09-14 15:52:54,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-09-14 15:52:54,955 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:52:54,978 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:55,003 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:55,003 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-09-14 15:52:55,020 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-09-14 15:52:55,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-09-14 15:52:55,035 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:52:55,060 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:55,091 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:55,091 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 [2018-09-14 15:52:55,179 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:55,180 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:55,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-09-14 15:52:55,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2018-09-14 15:52:55,247 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:52:55,250 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:55,252 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:55,252 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:14, output treesize:5 [2018-09-14 15:52:55,280 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:55,282 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:55,282 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8, 8, 8] total 15 [2018-09-14 15:52:55,282 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:55,282 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-09-14 15:52:55,283 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-09-14 15:52:55,283 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=169, Unknown=0, NotChecked=0, Total=210 [2018-09-14 15:52:55,284 INFO L87 Difference]: Start difference. First operand 24 states and 25 transitions. Second operand 12 states. [2018-09-14 15:52:55,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:55,834 INFO L93 Difference]: Finished difference Result 36 states and 37 transitions. [2018-09-14 15:52:55,835 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-14 15:52:55,835 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 19 [2018-09-14 15:52:55,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:55,837 INFO L225 Difference]: With dead ends: 36 [2018-09-14 15:52:55,837 INFO L226 Difference]: Without dead ends: 34 [2018-09-14 15:52:55,838 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 62 SyntacticMatches, 8 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=55, Invalid=217, Unknown=0, NotChecked=0, Total=272 [2018-09-14 15:52:55,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-09-14 15:52:55,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 31. [2018-09-14 15:52:55,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-09-14 15:52:55,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 32 transitions. [2018-09-14 15:52:55,846 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 32 transitions. Word has length 19 [2018-09-14 15:52:55,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:55,846 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 32 transitions. [2018-09-14 15:52:55,846 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-09-14 15:52:55,846 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 32 transitions. [2018-09-14 15:52:55,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-09-14 15:52:55,848 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:55,848 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:55,848 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:55,848 INFO L82 PathProgramCache]: Analyzing trace with hash -1892261924, now seen corresponding path program 1 times [2018-09-14 15:52:55,848 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:55,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:55,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:55,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:55,850 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:55,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:55,967 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:55,967 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:55,967 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:55,976 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:55,976 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:56,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:56,016 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:56,075 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:56,075 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:56,180 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:56,202 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:56,202 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:56,217 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:56,218 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:56,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:56,264 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:56,271 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:56,272 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:56,354 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:56,361 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:56,361 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 11 [2018-09-14 15:52:56,361 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:56,362 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-09-14 15:52:56,362 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-09-14 15:52:56,362 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-09-14 15:52:56,365 INFO L87 Difference]: Start difference. First operand 31 states and 32 transitions. Second operand 10 states. [2018-09-14 15:52:56,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:56,557 INFO L93 Difference]: Finished difference Result 54 states and 57 transitions. [2018-09-14 15:52:56,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-14 15:52:56,559 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 28 [2018-09-14 15:52:56,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:56,562 INFO L225 Difference]: With dead ends: 54 [2018-09-14 15:52:56,562 INFO L226 Difference]: Without dead ends: 35 [2018-09-14 15:52:56,563 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 102 SyntacticMatches, 6 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2018-09-14 15:52:56,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-09-14 15:52:56,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2018-09-14 15:52:56,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-09-14 15:52:56,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 35 transitions. [2018-09-14 15:52:56,578 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 35 transitions. Word has length 28 [2018-09-14 15:52:56,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:56,578 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 35 transitions. [2018-09-14 15:52:56,578 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-09-14 15:52:56,578 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 35 transitions. [2018-09-14 15:52:56,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-09-14 15:52:56,579 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:56,579 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:56,580 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:56,580 INFO L82 PathProgramCache]: Analyzing trace with hash 2043007747, now seen corresponding path program 2 times [2018-09-14 15:52:56,580 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:56,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:56,581 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:56,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:56,581 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:56,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:56,788 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:56,789 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:56,789 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:56,798 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:52:56,798 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:56,836 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:52:56,836 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:56,839 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:56,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:52:56,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:52:56,969 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:52:56,970 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:56,986 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-09-14 15:52:56,986 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:18 [2018-09-14 15:52:59,137 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-09-14 15:52:59,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-09-14 15:52:59,140 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:52:59,141 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:59,166 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:59,166 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-09-14 15:52:59,259 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:59,259 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:59,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-09-14 15:52:59,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-09-14 15:52:59,809 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:52:59,811 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:59,812 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:52:59,813 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:5 [2018-09-14 15:52:59,828 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:59,849 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:59,849 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:59,865 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:52:59,865 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:59,918 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:52:59,918 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:59,923 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:00,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:53:00,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:53:00,002 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:00,005 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:00,011 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:00,012 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-09-14 15:53:13,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-09-14 15:53:13,032 INFO L682 Elim1Store]: detected equality via solver [2018-09-14 15:53:13,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-09-14 15:53:13,034 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:13,040 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:13,048 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:13,049 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:32, output treesize:3 [2018-09-14 15:53:13,061 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:13,061 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:15,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-09-14 15:53:15,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 3 [2018-09-14 15:53:15,286 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:15,287 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:15,296 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:15,296 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:7 [2018-09-14 15:53:15,337 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:15,341 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:15,341 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13, 10, 13, 12] total 31 [2018-09-14 15:53:15,341 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:15,342 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-14 15:53:15,342 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-14 15:53:15,343 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=810, Unknown=8, NotChecked=0, Total=930 [2018-09-14 15:53:15,343 INFO L87 Difference]: Start difference. First operand 34 states and 35 transitions. Second operand 17 states. [2018-09-14 15:53:17,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:17,865 INFO L93 Difference]: Finished difference Result 48 states and 49 transitions. [2018-09-14 15:53:17,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-14 15:53:17,866 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 31 [2018-09-14 15:53:17,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:17,868 INFO L225 Difference]: With dead ends: 48 [2018-09-14 15:53:17,868 INFO L226 Difference]: Without dead ends: 46 [2018-09-14 15:53:17,869 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 90 SyntacticMatches, 16 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 386 ImplicationChecksByTransitivity, 18.3s TimeCoverageRelationStatistics Valid=177, Invalid=1221, Unknown=8, NotChecked=0, Total=1406 [2018-09-14 15:53:17,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-09-14 15:53:17,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 43. [2018-09-14 15:53:17,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-09-14 15:53:17,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 44 transitions. [2018-09-14 15:53:17,877 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 44 transitions. Word has length 31 [2018-09-14 15:53:17,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:17,878 INFO L480 AbstractCegarLoop]: Abstraction has 43 states and 44 transitions. [2018-09-14 15:53:17,878 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-14 15:53:17,878 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 44 transitions. [2018-09-14 15:53:17,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-09-14 15:53:17,879 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:17,880 INFO L376 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:17,880 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:17,880 INFO L82 PathProgramCache]: Analyzing trace with hash -43804270, now seen corresponding path program 3 times [2018-09-14 15:53:17,880 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:17,881 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:17,882 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:17,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:17,882 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:17,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:18,092 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:53:18,093 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:18,093 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:18,102 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:53:18,102 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:53:18,163 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-14 15:53:18,163 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:18,167 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:18,267 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 15 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:53:18,267 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:18,332 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 15 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:53:18,352 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:18,352 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:18,370 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:53:18,370 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:53:18,435 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-14 15:53:18,435 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:18,441 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:18,450 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 15 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:53:18,450 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:18,522 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 15 proven. 7 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:53:18,524 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:18,524 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 14 [2018-09-14 15:53:18,524 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:18,525 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-14 15:53:18,525 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-14 15:53:18,526 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2018-09-14 15:53:18,526 INFO L87 Difference]: Start difference. First operand 43 states and 44 transitions. Second operand 13 states. [2018-09-14 15:53:18,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:18,663 INFO L93 Difference]: Finished difference Result 71 states and 75 transitions. [2018-09-14 15:53:18,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-14 15:53:18,663 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 40 [2018-09-14 15:53:18,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:18,665 INFO L225 Difference]: With dead ends: 71 [2018-09-14 15:53:18,665 INFO L226 Difference]: Without dead ends: 47 [2018-09-14 15:53:18,665 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 145 SyntacticMatches, 10 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=82, Invalid=224, Unknown=0, NotChecked=0, Total=306 [2018-09-14 15:53:18,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-09-14 15:53:18,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 46. [2018-09-14 15:53:18,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-09-14 15:53:18,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 47 transitions. [2018-09-14 15:53:18,674 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 47 transitions. Word has length 40 [2018-09-14 15:53:18,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:18,675 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 47 transitions. [2018-09-14 15:53:18,675 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-14 15:53:18,675 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 47 transitions. [2018-09-14 15:53:18,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-09-14 15:53:18,676 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:18,676 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:18,677 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:18,677 INFO L82 PathProgramCache]: Analyzing trace with hash -1152087495, now seen corresponding path program 4 times [2018-09-14 15:53:18,677 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:18,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:18,678 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:18,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:18,679 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:18,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:19,168 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 3 proven. 30 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-14 15:53:19,169 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:19,169 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:19,176 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:53:19,177 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:53:19,230 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:53:19,231 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:19,235 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:19,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:53:19,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:53:19,413 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:19,438 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:19,478 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-09-14 15:53:19,479 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:22 [2018-09-14 15:53:26,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-09-14 15:53:26,448 INFO L682 Elim1Store]: detected equality via solver [2018-09-14 15:53:26,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-09-14 15:53:26,449 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:26,478 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:26,479 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:26,479 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:3 [2018-09-14 15:53:26,549 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:53:26,550 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:28,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-09-14 15:53:28,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2018-09-14 15:53:28,697 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:28,699 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:28,701 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:28,701 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:18, output treesize:5 [2018-09-14 15:53:28,718 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 26 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:53:28,738 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:28,738 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:28,772 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:53:28,772 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:53:28,854 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:53:28,854 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:28,860 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:28,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:53:28,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:53:28,906 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:28,908 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:28,913 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-09-14 15:53:28,913 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:22 [2018-09-14 15:53:36,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-09-14 15:53:36,323 INFO L682 Elim1Store]: detected equality via solver [2018-09-14 15:53:36,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-09-14 15:53:36,323 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:36,326 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:36,326 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:36,327 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:3 [2018-09-14 15:53:36,339 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:53:36,339 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:36,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-09-14 15:53:36,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2018-09-14 15:53:36,430 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:36,432 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:36,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:36,433 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:5 [2018-09-14 15:53:36,446 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 26 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-14 15:53:36,452 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:36,452 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 12, 13, 12] total 19 [2018-09-14 15:53:36,453 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:36,453 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-14 15:53:36,453 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-14 15:53:36,454 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=292, Unknown=3, NotChecked=0, Total=342 [2018-09-14 15:53:36,454 INFO L87 Difference]: Start difference. First operand 46 states and 47 transitions. Second operand 18 states. [2018-09-14 15:53:41,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:41,084 INFO L93 Difference]: Finished difference Result 60 states and 61 transitions. [2018-09-14 15:53:41,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-14 15:53:41,085 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 43 [2018-09-14 15:53:41,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:41,086 INFO L225 Difference]: With dead ends: 60 [2018-09-14 15:53:41,086 INFO L226 Difference]: Without dead ends: 58 [2018-09-14 15:53:41,089 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 197 GetRequests, 138 SyntacticMatches, 33 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 17.4s TimeCoverageRelationStatistics Valid=108, Invalid=645, Unknown=3, NotChecked=0, Total=756 [2018-09-14 15:53:41,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-09-14 15:53:41,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 55. [2018-09-14 15:53:41,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-09-14 15:53:41,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 56 transitions. [2018-09-14 15:53:41,096 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 56 transitions. Word has length 43 [2018-09-14 15:53:41,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:41,097 INFO L480 AbstractCegarLoop]: Abstraction has 55 states and 56 transitions. [2018-09-14 15:53:41,097 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-14 15:53:41,097 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 56 transitions. [2018-09-14 15:53:41,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-09-14 15:53:41,099 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:41,099 INFO L376 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:41,099 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:41,099 INFO L82 PathProgramCache]: Analyzing trace with hash -1561288932, now seen corresponding path program 5 times [2018-09-14 15:53:41,099 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:41,100 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:41,100 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:41,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:41,101 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:41,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:41,753 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 18 proven. 27 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:53:41,753 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:41,754 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:41,762 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:53:41,762 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:53:41,819 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-09-14 15:53:41,820 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:41,823 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:41,958 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 30 proven. 15 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:53:41,958 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:42,038 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 30 proven. 15 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:53:42,058 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:42,058 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:42,073 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:53:42,073 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:53:42,153 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-09-14 15:53:42,153 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:42,157 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:42,168 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 30 proven. 15 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:53:42,168 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:42,260 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 30 proven. 15 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:53:42,262 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:42,263 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 17 [2018-09-14 15:53:42,263 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:42,264 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-14 15:53:42,264 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-14 15:53:42,265 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2018-09-14 15:53:42,265 INFO L87 Difference]: Start difference. First operand 55 states and 56 transitions. Second operand 16 states. [2018-09-14 15:53:42,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:42,578 INFO L93 Difference]: Finished difference Result 88 states and 93 transitions. [2018-09-14 15:53:42,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-14 15:53:42,578 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 52 [2018-09-14 15:53:42,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:42,580 INFO L225 Difference]: With dead ends: 88 [2018-09-14 15:53:42,580 INFO L226 Difference]: Without dead ends: 59 [2018-09-14 15:53:42,581 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 222 GetRequests, 188 SyntacticMatches, 14 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 216 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=118, Invalid=344, Unknown=0, NotChecked=0, Total=462 [2018-09-14 15:53:42,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-09-14 15:53:42,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 58. [2018-09-14 15:53:42,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-09-14 15:53:42,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 59 transitions. [2018-09-14 15:53:42,589 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 59 transitions. Word has length 52 [2018-09-14 15:53:42,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:42,589 INFO L480 AbstractCegarLoop]: Abstraction has 58 states and 59 transitions. [2018-09-14 15:53:42,589 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-14 15:53:42,590 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 59 transitions. [2018-09-14 15:53:42,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-09-14 15:53:42,591 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:42,591 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:42,591 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:42,591 INFO L82 PathProgramCache]: Analyzing trace with hash 1718799683, now seen corresponding path program 6 times [2018-09-14 15:53:42,591 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:42,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:42,592 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:42,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:42,592 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:42,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:43,078 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 5 proven. 57 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-09-14 15:53:43,079 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:43,079 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:43,086 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:53:43,086 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:53:43,118 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-09-14 15:53:43,119 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:43,122 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:43,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-09-14 15:53:43,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-09-14 15:53:43,342 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:43,367 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:43,430 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:43,430 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-09-14 15:53:43,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-09-14 15:53:43,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-09-14 15:53:43,767 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:43,768 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:43,769 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:43,769 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:3 [2018-09-14 15:53:43,821 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:53:43,821 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:43,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-09-14 15:53:43,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2018-09-14 15:53:43,993 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:43,995 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:43,996 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:43,996 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:5 [2018-09-14 15:53:44,060 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 6 proven. 50 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:53:44,081 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:44,081 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:44,096 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:53:44,096 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:53:44,225 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-09-14 15:53:44,225 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:44,230 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:44,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:53:44,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:53:44,320 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:44,322 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:44,325 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:44,325 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-09-14 15:53:45,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-09-14 15:53:45,236 INFO L682 Elim1Store]: detected equality via solver [2018-09-14 15:53:45,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-09-14 15:53:45,237 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:45,242 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:45,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:45,250 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:32, output treesize:3 [2018-09-14 15:53:45,273 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 21 proven. 35 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:53:45,273 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:45,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-09-14 15:53:45,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2018-09-14 15:53:45,635 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:45,637 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:45,642 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:45,642 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:7 [2018-09-14 15:53:45,796 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 21 proven. 35 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-14 15:53:45,797 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:45,797 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14, 17, 16] total 47 [2018-09-14 15:53:45,797 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:45,798 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-14 15:53:45,798 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-14 15:53:45,799 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=1942, Unknown=0, NotChecked=0, Total=2162 [2018-09-14 15:53:45,799 INFO L87 Difference]: Start difference. First operand 58 states and 59 transitions. Second operand 27 states. [2018-09-14 15:53:46,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:46,676 INFO L93 Difference]: Finished difference Result 72 states and 73 transitions. [2018-09-14 15:53:46,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-14 15:53:46,677 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 55 [2018-09-14 15:53:46,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:46,678 INFO L225 Difference]: With dead ends: 72 [2018-09-14 15:53:46,679 INFO L226 Difference]: Without dead ends: 70 [2018-09-14 15:53:46,680 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 248 GetRequests, 164 SyntacticMatches, 29 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1133 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=313, Invalid=2879, Unknown=0, NotChecked=0, Total=3192 [2018-09-14 15:53:46,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-09-14 15:53:46,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 67. [2018-09-14 15:53:46,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-09-14 15:53:46,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 68 transitions. [2018-09-14 15:53:46,690 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 68 transitions. Word has length 55 [2018-09-14 15:53:46,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:46,690 INFO L480 AbstractCegarLoop]: Abstraction has 67 states and 68 transitions. [2018-09-14 15:53:46,690 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-14 15:53:46,690 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 68 transitions. [2018-09-14 15:53:46,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-09-14 15:53:46,691 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:46,692 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:46,692 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:46,692 INFO L82 PathProgramCache]: Analyzing trace with hash 1561077586, now seen corresponding path program 7 times [2018-09-14 15:53:46,692 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:46,693 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:46,693 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:46,693 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:46,694 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:46,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:47,446 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 33 proven. 43 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-14 15:53:47,446 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:47,446 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:47,454 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:53:47,454 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:53:47,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:47,493 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:47,675 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 50 proven. 26 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-14 15:53:47,676 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:47,739 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 50 proven. 26 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-14 15:53:47,760 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:47,760 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:47,776 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:53:47,776 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:53:47,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:47,851 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:47,859 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 50 proven. 26 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-14 15:53:47,859 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:47,933 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 50 proven. 26 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-14 15:53:47,934 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:47,934 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 20 [2018-09-14 15:53:47,935 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:47,935 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-14 15:53:47,936 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-14 15:53:47,936 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2018-09-14 15:53:47,936 INFO L87 Difference]: Start difference. First operand 67 states and 68 transitions. Second operand 19 states. [2018-09-14 15:53:48,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:48,260 INFO L93 Difference]: Finished difference Result 105 states and 111 transitions. [2018-09-14 15:53:48,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-14 15:53:48,260 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 64 [2018-09-14 15:53:48,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:48,261 INFO L225 Difference]: With dead ends: 105 [2018-09-14 15:53:48,261 INFO L226 Difference]: Without dead ends: 71 [2018-09-14 15:53:48,262 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 273 GetRequests, 231 SyntacticMatches, 18 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 331 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2018-09-14 15:53:48,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-09-14 15:53:48,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 70. [2018-09-14 15:53:48,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-09-14 15:53:48,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 71 transitions. [2018-09-14 15:53:48,270 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 71 transitions. Word has length 64 [2018-09-14 15:53:48,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:48,271 INFO L480 AbstractCegarLoop]: Abstraction has 70 states and 71 transitions. [2018-09-14 15:53:48,271 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-14 15:53:48,271 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 71 transitions. [2018-09-14 15:53:48,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-09-14 15:53:48,272 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:48,272 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:48,272 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:48,272 INFO L82 PathProgramCache]: Analyzing trace with hash -827370759, now seen corresponding path program 8 times [2018-09-14 15:53:48,273 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:48,273 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:48,273 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:53:48,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:48,274 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:48,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:48,517 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 7 proven. 92 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-14 15:53:48,518 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:48,518 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:48,526 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:53:48,526 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:53:48,564 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:53:48,564 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:48,567 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:48,590 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:53:48,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:53:48,595 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:53:48,596 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:53:48,601 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-09-14 15:53:48,602 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:18 [2018-09-14 15:54:18,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-09-14 15:54:18,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-09-14 15:54:18,215 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:54:18,216 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:54:18,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:54:18,217 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-09-14 15:54:18,272 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 0 proven. 99 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-14 15:54:18,272 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:20,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-09-14 15:54:20,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-09-14 15:54:20,462 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:54:20,463 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:54:20,465 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:54:20,465 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:5 [2018-09-14 15:54:20,482 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 8 proven. 82 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-14 15:54:20,502 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:20,502 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:54:20,517 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:54:20,517 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:54:20,607 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:54:20,607 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:20,614 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:20,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:54:20,698 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:54:20,698 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:54:20,724 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:54:20,755 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-09-14 15:54:20,755 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:18 [2018-09-14 15:54:51,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-09-14 15:54:51,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-09-14 15:54:51,757 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:54:51,758 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:54:51,759 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:54:51,759 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-09-14 15:54:51,789 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-14 15:54:51,789 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:52,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-09-14 15:54:52,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-09-14 15:54:52,105 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:54:52,107 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:54:52,108 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:54:52,108 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:5 [2018-09-14 15:54:52,124 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 8 proven. 82 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-14 15:54:52,125 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:54:52,126 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19, 16, 17, 16] total 27 [2018-09-14 15:54:52,126 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:54:52,126 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-14 15:54:52,126 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-14 15:54:52,127 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=624, Unknown=5, NotChecked=0, Total=702 [2018-09-14 15:54:52,127 INFO L87 Difference]: Start difference. First operand 70 states and 71 transitions. Second operand 26 states. [2018-09-14 15:54:59,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:54:59,975 INFO L93 Difference]: Finished difference Result 84 states and 85 transitions. [2018-09-14 15:54:59,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-14 15:54:59,975 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 67 [2018-09-14 15:54:59,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:54:59,978 INFO L225 Difference]: With dead ends: 84 [2018-09-14 15:54:59,978 INFO L226 Difference]: Without dead ends: 82 [2018-09-14 15:54:59,979 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 295 GetRequests, 223 SyntacticMatches, 37 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 469 ImplicationChecksByTransitivity, 63.4s TimeCoverageRelationStatistics Valid=149, Invalid=1178, Unknown=5, NotChecked=0, Total=1332 [2018-09-14 15:54:59,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-09-14 15:54:59,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 79. [2018-09-14 15:54:59,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-09-14 15:54:59,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 80 transitions. [2018-09-14 15:54:59,987 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 80 transitions. Word has length 67 [2018-09-14 15:54:59,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:54:59,987 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 80 transitions. [2018-09-14 15:54:59,988 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-14 15:54:59,988 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 80 transitions. [2018-09-14 15:54:59,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-09-14 15:54:59,989 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:54:59,989 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:54:59,989 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:54:59,990 INFO L82 PathProgramCache]: Analyzing trace with hash 1280028252, now seen corresponding path program 9 times [2018-09-14 15:54:59,990 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:54:59,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:59,990 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:54:59,991 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:59,991 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:55:00,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:55:00,220 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 53 proven. 62 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:55:00,220 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:55:00,220 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:55:00,228 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:55:00,228 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:55:00,273 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-14 15:55:00,273 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:55:00,275 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:55:00,384 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 75 proven. 40 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:55:00,384 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:55:01,208 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 75 proven. 40 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:55:01,229 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:55:01,229 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:55:01,245 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:55:01,245 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:55:01,442 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-14 15:55:01,442 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:55:01,447 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:55:01,457 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 75 proven. 40 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:55:01,457 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:55:01,545 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 75 proven. 40 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:55:01,547 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:55:01,547 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 23 [2018-09-14 15:55:01,547 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:55:01,548 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-14 15:55:01,548 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-14 15:55:01,548 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=382, Unknown=0, NotChecked=0, Total=506 [2018-09-14 15:55:01,548 INFO L87 Difference]: Start difference. First operand 79 states and 80 transitions. Second operand 22 states. [2018-09-14 15:55:01,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:55:01,785 INFO L93 Difference]: Finished difference Result 122 states and 129 transitions. [2018-09-14 15:55:01,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-14 15:55:01,785 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 76 [2018-09-14 15:55:01,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:55:01,787 INFO L225 Difference]: With dead ends: 122 [2018-09-14 15:55:01,787 INFO L226 Difference]: Without dead ends: 83 [2018-09-14 15:55:01,788 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 324 GetRequests, 274 SyntacticMatches, 22 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 467 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=211, Invalid=659, Unknown=0, NotChecked=0, Total=870 [2018-09-14 15:55:01,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-09-14 15:55:01,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 82. [2018-09-14 15:55:01,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-09-14 15:55:01,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 83 transitions. [2018-09-14 15:55:01,796 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 83 transitions. Word has length 76 [2018-09-14 15:55:01,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:55:01,797 INFO L480 AbstractCegarLoop]: Abstraction has 82 states and 83 transitions. [2018-09-14 15:55:01,797 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-14 15:55:01,797 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 83 transitions. [2018-09-14 15:55:01,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-09-14 15:55:01,798 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:55:01,798 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:55:01,799 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:55:01,799 INFO L82 PathProgramCache]: Analyzing trace with hash -83912829, now seen corresponding path program 10 times [2018-09-14 15:55:01,799 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:55:01,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:55:01,800 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:55:01,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:55:01,800 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:55:01,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:55:02,129 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 9 proven. 135 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-14 15:55:02,129 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:55:02,130 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:55:02,137 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:55:02,137 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:55:02,187 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:55:02,187 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:55:02,191 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:55:02,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:55:02,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:55:02,257 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:55:02,284 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:55:02,381 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-09-14 15:55:02,382 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:18 [2018-09-14 15:55:51,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-09-14 15:55:51,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-09-14 15:55:51,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:55:51,181 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:55:51,182 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:55:51,182 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-09-14 15:55:51,260 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:55:51,260 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:55:52,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-09-14 15:55:52,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-09-14 15:55:52,230 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:55:52,231 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:55:52,233 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:55:52,233 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:16, output treesize:5 [2018-09-14 15:55:52,253 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 10 proven. 122 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:55:52,274 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:55:52,274 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:55:52,291 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:55:52,291 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:55:52,467 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:55:52,467 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:55:52,473 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:55:52,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:55:52,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:55:52,497 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:55:52,502 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:55:52,511 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-09-14 15:55:52,511 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:18 [2018-09-14 15:56:40,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-09-14 15:56:40,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-09-14 15:56:40,007 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:56:40,010 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:40,011 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:40,011 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-09-14 15:56:40,035 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:56:40,035 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:56:40,140 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-09-14 15:56:40,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-09-14 15:56:40,153 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:56:40,154 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:40,155 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:40,155 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:5 [2018-09-14 15:56:40,273 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 10 proven. 122 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:56:40,278 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:56:40,278 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 18, 19, 18] total 28 [2018-09-14 15:56:40,278 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:56:40,279 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-14 15:56:40,279 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-14 15:56:40,279 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=676, Unknown=6, NotChecked=0, Total=756 [2018-09-14 15:56:40,280 INFO L87 Difference]: Start difference. First operand 82 states and 83 transitions. Second operand 27 states. [2018-09-14 15:56:50,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:56:50,563 INFO L93 Difference]: Finished difference Result 96 states and 97 transitions. [2018-09-14 15:56:50,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-14 15:56:50,563 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 79 [2018-09-14 15:56:50,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:56:50,564 INFO L225 Difference]: With dead ends: 96 [2018-09-14 15:56:50,564 INFO L226 Difference]: Without dead ends: 94 [2018-09-14 15:56:50,565 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 348 GetRequests, 265 SyntacticMatches, 45 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 517 ImplicationChecksByTransitivity, 98.1s TimeCoverageRelationStatistics Valid=159, Invalid=1395, Unknown=6, NotChecked=0, Total=1560 [2018-09-14 15:56:50,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-09-14 15:56:50,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 91. [2018-09-14 15:56:50,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-09-14 15:56:50,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 92 transitions. [2018-09-14 15:56:50,578 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 92 transitions. Word has length 79 [2018-09-14 15:56:50,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:56:50,579 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 92 transitions. [2018-09-14 15:56:50,579 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-14 15:56:50,579 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 92 transitions. [2018-09-14 15:56:50,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-09-14 15:56:50,580 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:56:50,580 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:56:50,581 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:56:50,582 INFO L82 PathProgramCache]: Analyzing trace with hash 731833618, now seen corresponding path program 11 times [2018-09-14 15:56:50,582 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:56:50,582 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:56:50,582 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:56:50,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:56:50,583 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:56:50,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:56:50,860 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 78 proven. 84 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-14 15:56:50,860 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:56:50,860 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:56:50,870 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:56:50,870 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:56:50,929 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-14 15:56:50,929 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:56:50,931 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:56:51,079 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 105 proven. 57 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-14 15:56:51,079 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:56:51,539 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 105 proven. 57 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-14 15:56:51,574 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:56:51,574 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:56:51,603 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:56:51,603 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:56:51,831 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-14 15:56:51,832 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:56:51,837 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:56:51,850 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 105 proven. 57 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-14 15:56:51,850 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:56:51,958 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 105 proven. 57 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-14 15:56:51,960 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:56:51,960 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 26 [2018-09-14 15:56:51,960 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:56:51,960 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-14 15:56:51,961 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-14 15:56:51,961 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=157, Invalid=493, Unknown=0, NotChecked=0, Total=650 [2018-09-14 15:56:51,962 INFO L87 Difference]: Start difference. First operand 91 states and 92 transitions. Second operand 25 states. [2018-09-14 15:56:52,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:56:52,322 INFO L93 Difference]: Finished difference Result 139 states and 147 transitions. [2018-09-14 15:56:52,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-14 15:56:52,323 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 88 [2018-09-14 15:56:52,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:56:52,324 INFO L225 Difference]: With dead ends: 139 [2018-09-14 15:56:52,324 INFO L226 Difference]: Without dead ends: 95 [2018-09-14 15:56:52,326 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 375 GetRequests, 317 SyntacticMatches, 26 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 624 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=268, Invalid=854, Unknown=0, NotChecked=0, Total=1122 [2018-09-14 15:56:52,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-09-14 15:56:52,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 94. [2018-09-14 15:56:52,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-09-14 15:56:52,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 95 transitions. [2018-09-14 15:56:52,334 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 95 transitions. Word has length 88 [2018-09-14 15:56:52,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:56:52,334 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 95 transitions. [2018-09-14 15:56:52,334 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-14 15:56:52,335 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 95 transitions. [2018-09-14 15:56:52,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-09-14 15:56:52,336 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:56:52,336 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:56:52,336 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:56:52,336 INFO L82 PathProgramCache]: Analyzing trace with hash -55358535, now seen corresponding path program 12 times [2018-09-14 15:56:52,337 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:56:52,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:56:52,337 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:56:52,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:56:52,338 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:56:52,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:56:52,810 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 11 proven. 186 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-09-14 15:56:52,810 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:56:52,810 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:56:52,818 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:56:52,818 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:56:52,877 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-14 15:56:52,877 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:56:52,880 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:56:53,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:56:53,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:56:53,288 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:56:53,289 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:53,293 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:53,294 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-09-14 15:56:54,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-09-14 15:56:54,668 INFO L682 Elim1Store]: detected equality via solver [2018-09-14 15:56:54,669 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-09-14 15:56:54,669 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:56:54,678 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:54,684 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:54,684 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:32, output treesize:3 [2018-09-14 15:56:54,783 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 87 proven. 95 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-14 15:56:54,783 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:56:55,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-09-14 15:56:55,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2018-09-14 15:56:55,628 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:56:55,629 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:55,635 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:55,635 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:7 [2018-09-14 15:56:55,845 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 87 proven. 95 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-14 15:56:55,867 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:56:55,867 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:56:55,882 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:56:55,882 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:56:56,268 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-14 15:56:56,268 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:56:56,275 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:56:56,282 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:56:56,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:56:56,284 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:56:56,288 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:56,296 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:56,296 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-09-14 15:56:57,723 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-09-14 15:56:57,737 INFO L682 Elim1Store]: detected equality via solver [2018-09-14 15:56:57,737 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-09-14 15:56:57,738 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:56:57,744 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:57,757 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:57,757 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:32, output treesize:3 [2018-09-14 15:56:57,868 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 87 proven. 95 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-14 15:56:57,868 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:56:58,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-09-14 15:56:58,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 3 [2018-09-14 15:56:58,118 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:56:58,119 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:58,125 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:56:58,125 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:7 [2018-09-14 15:56:58,314 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 87 proven. 95 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-14 15:56:58,316 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:56:58,316 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 23, 22, 23, 22] total 51 [2018-09-14 15:56:58,316 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:56:58,317 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-09-14 15:56:58,317 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-09-14 15:56:58,318 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=281, Invalid=2269, Unknown=0, NotChecked=0, Total=2550 [2018-09-14 15:56:58,318 INFO L87 Difference]: Start difference. First operand 94 states and 95 transitions. Second operand 41 states. [2018-09-14 15:57:07,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:57:07,693 INFO L93 Difference]: Finished difference Result 153 states and 161 transitions. [2018-09-14 15:57:07,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-09-14 15:57:07,693 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 91 [2018-09-14 15:57:07,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:57:07,695 INFO L225 Difference]: With dead ends: 153 [2018-09-14 15:57:07,695 INFO L226 Difference]: Without dead ends: 109 [2018-09-14 15:57:07,699 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 432 GetRequests, 292 SyntacticMatches, 45 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2664 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=847, Invalid=8465, Unknown=0, NotChecked=0, Total=9312 [2018-09-14 15:57:07,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-09-14 15:57:07,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 106. [2018-09-14 15:57:07,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-09-14 15:57:07,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 107 transitions. [2018-09-14 15:57:07,710 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 107 transitions. Word has length 91 [2018-09-14 15:57:07,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:57:07,710 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 107 transitions. [2018-09-14 15:57:07,710 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-09-14 15:57:07,710 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 107 transitions. [2018-09-14 15:57:07,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-09-14 15:57:07,712 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:57:07,712 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:57:07,712 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:57:07,712 INFO L82 PathProgramCache]: Analyzing trace with hash 762851779, now seen corresponding path program 13 times [2018-09-14 15:57:07,712 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:57:07,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:57:07,713 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:57:07,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:57:07,713 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:57:07,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:57:08,474 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 13 proven. 245 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-09-14 15:57:08,475 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:57:08,475 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:57:08,484 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:57:08,485 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:57:08,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:57:08,541 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:57:08,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-09-14 15:57:08,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-14 15:57:08,572 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-14 15:57:08,579 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-14 15:57:08,589 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-09-14 15:57:08,589 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:22 Received shutdown request... [2018-09-14 15:57:31,138 INFO L177 TraceCheckSpWp]: Timeout while computing interpolants [2018-09-14 15:57:31,339 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 28 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:57:31,340 WARN L549 AbstractCegarLoop]: Verification canceled [2018-09-14 15:57:31,345 WARN L206 ceAbstractionStarter]: Timeout [2018-09-14 15:57:31,345 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.09 03:57:31 BoogieIcfgContainer [2018-09-14 15:57:31,345 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-14 15:57:31,346 INFO L168 Benchmark]: Toolchain (without parser) took 279521.91 ms. Allocated memory was 1.5 GB in the beginning and 2.5 GB in the end (delta: 925.9 MB). Free memory was 1.4 GB in the beginning and 2.3 GB in the end (delta: -818.9 MB). Peak memory consumption was 107.0 MB. Max. memory is 7.1 GB. [2018-09-14 15:57:31,347 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-14 15:57:31,348 INFO L168 Benchmark]: CACSL2BoogieTranslator took 310.17 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-09-14 15:57:31,348 INFO L168 Benchmark]: Boogie Procedure Inliner took 44.74 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-14 15:57:31,348 INFO L168 Benchmark]: Boogie Preprocessor took 45.60 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-14 15:57:31,348 INFO L168 Benchmark]: RCFGBuilder took 624.94 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 784.3 MB). Free memory was 1.4 GB in the beginning and 2.3 GB in the end (delta: -834.6 MB). Peak memory consumption was 26.5 MB. Max. memory is 7.1 GB. [2018-09-14 15:57:31,349 INFO L168 Benchmark]: TraceAbstraction took 278489.55 ms. Allocated memory was 2.3 GB in the beginning and 2.5 GB in the end (delta: 141.6 MB). Free memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 5.1 MB). Peak memory consumption was 146.7 MB. Max. memory is 7.1 GB. [2018-09-14 15:57:31,351 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 310.17 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 44.74 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 45.60 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 624.94 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 784.3 MB). Free memory was 1.4 GB in the beginning and 2.3 GB in the end (delta: -834.6 MB). Peak memory consumption was 26.5 MB. Max. memory is 7.1 GB. * TraceAbstraction took 278489.55 ms. Allocated memory was 2.3 GB in the beginning and 2.5 GB in the end (delta: 141.6 MB). Free memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 5.1 MB). Peak memory consumption was 146.7 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 6]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 6). Cancelled while BasicCegarLoop was analyzing trace of length 104 with TraceHistMax 9, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 25 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 27 locations, 1 error locations. TIMEOUT Result, 278.4s OverallTime, 16 OverallIterations, 9 TraceHistogramMax, 37.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 438 SDtfs, 543 SDslu, 4185 SDs, 0 SdLazy, 4480 SolverSat, 359 SolverUnsat, 15 SolverUnknown, 0 SolverNotchecked, 32.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3241 GetRequests, 2495 SyntacticMatches, 309 SemanticMatches, 437 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7284 ImplicationChecksByTransitivity, 212.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=106occurred in iteration=15, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 15 MinimizatonAttempts, 28 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 2.3s SatisfiabilityAnalysisTime, 213.1s InterpolantComputationTime, 2230 NumberOfCodeBlocks, 2230 NumberOfCodeBlocksAsserted, 103 NumberOfCheckSat, 3629 ConstructedInterpolants, 364 QuantifiedInterpolants, 1438651 SizeOfPredicates, 299 NumberOfNonLiveVariables, 5442 ConjunctsInSsa, 690 ConjunctsInUnsatCore, 67 InterpolantComputations, 2 PerfectInterpolantSequences, 3141/6055 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/mcmillan2006_true-unreach-call_true-termination.c.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-09-14_15-57-31-360.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/mcmillan2006_true-unreach-call_true-termination.c.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-14_15-57-31-360.csv Completed graceful shutdown