java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dace188-m [2018-09-14 15:46:48,616 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-14 15:46:48,618 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-14 15:46:48,638 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-14 15:46:48,638 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-14 15:46:48,639 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-14 15:46:48,641 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-14 15:46:48,643 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-14 15:46:48,645 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-14 15:46:48,646 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-14 15:46:48,647 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-14 15:46:48,647 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-14 15:46:48,648 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-14 15:46:48,649 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-14 15:46:48,651 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-14 15:46:48,651 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-14 15:46:48,652 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-14 15:46:48,654 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-14 15:46:48,657 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-14 15:46:48,658 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-14 15:46:48,660 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-14 15:46:48,661 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-14 15:46:48,664 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-14 15:46:48,664 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-14 15:46:48,664 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-14 15:46:48,666 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-14 15:46:48,667 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-14 15:46:48,668 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-14 15:46:48,669 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-14 15:46:48,670 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-14 15:46:48,670 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-14 15:46:48,671 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-09-14 15:46:48,671 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-09-14 15:46:48,672 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-09-14 15:46:48,673 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-09-14 15:46:48,673 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-09-14 15:46:48,674 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-14 15:46:48,692 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-14 15:46:48,692 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-14 15:46:48,693 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-14 15:46:48,694 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-14 15:46:48,694 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-14 15:46:48,694 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-14 15:46:48,694 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-14 15:46:48,695 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-14 15:46:48,695 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-14 15:46:48,695 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-14 15:46:48,695 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-14 15:46:48,696 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-14 15:46:48,696 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-14 15:46:48,697 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-14 15:46:48,697 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-14 15:46:48,697 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-14 15:46:48,698 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-14 15:46:48,698 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-14 15:46:48,698 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-14 15:46:48,698 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-14 15:46:48,699 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-14 15:46:48,699 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-14 15:46:48,699 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-14 15:46:48,699 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-14 15:46:48,701 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-14 15:46:48,701 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-14 15:46:48,701 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-14 15:46:48,701 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-14 15:46:48,701 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-14 15:46:48,702 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-14 15:46:48,702 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-14 15:46:48,702 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-14 15:46:48,702 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-14 15:46:48,771 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-14 15:46:48,790 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-14 15:46:48,797 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-14 15:46:48,799 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-14 15:46:48,799 INFO L276 PluginConnector]: CDTParser initialized [2018-09-14 15:46:48,800 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i [2018-09-14 15:46:49,179 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b2bfd68a/e68e6186f56e4cdda5e0f35e05ef842c/FLAG30cda987b [2018-09-14 15:46:49,330 INFO L277 CDTParser]: Found 1 translation units. [2018-09-14 15:46:49,330 INFO L159 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i [2018-09-14 15:46:49,336 INFO L325 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b2bfd68a/e68e6186f56e4cdda5e0f35e05ef842c/FLAG30cda987b [2018-09-14 15:46:49,350 INFO L333 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b2bfd68a/e68e6186f56e4cdda5e0f35e05ef842c [2018-09-14 15:46:49,361 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-14 15:46:49,364 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-14 15:46:49,367 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-14 15:46:49,367 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-14 15:46:49,377 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-14 15:46:49,378 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,381 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@26a8c619 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49, skipping insertion in model container [2018-09-14 15:46:49,382 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,394 INFO L160 ieTranslatorObserver]: Starting translation in SV-COMP mode [2018-09-14 15:46:49,607 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-14 15:46:49,625 INFO L424 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-14 15:46:49,631 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-14 15:46:49,645 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49 WrapperNode [2018-09-14 15:46:49,645 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-14 15:46:49,646 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-14 15:46:49,647 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-14 15:46:49,647 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-14 15:46:49,656 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,663 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,669 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-14 15:46:49,670 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-14 15:46:49,670 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-14 15:46:49,670 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-14 15:46:49,681 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,682 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,687 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,687 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,689 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,695 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,697 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (1/1) ... [2018-09-14 15:46:49,703 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-14 15:46:49,703 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-14 15:46:49,704 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-14 15:46:49,704 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-14 15:46:49,705 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-14 15:46:49,780 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-14 15:46:49,780 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-14 15:46:49,780 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-14 15:46:49,780 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-14 15:46:49,781 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-14 15:46:49,781 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-14 15:46:49,781 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-09-14 15:46:49,781 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-09-14 15:46:50,028 INFO L353 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-14 15:46:50,029 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.09 03:46:50 BoogieIcfgContainer [2018-09-14 15:46:50,029 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-14 15:46:50,030 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-14 15:46:50,030 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-14 15:46:50,033 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-14 15:46:50,033 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.09 03:46:49" (1/3) ... [2018-09-14 15:46:50,034 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@10c03b52 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.09 03:46:50, skipping insertion in model container [2018-09-14 15:46:50,034 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:46:49" (2/3) ... [2018-09-14 15:46:50,035 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@10c03b52 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.09 03:46:50, skipping insertion in model container [2018-09-14 15:46:50,035 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.09 03:46:50" (3/3) ... [2018-09-14 15:46:50,037 INFO L112 eAbstractionObserver]: Analyzing ICFG phases_true-unreach-call1.i [2018-09-14 15:46:50,047 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-14 15:46:50,054 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-14 15:46:50,105 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-14 15:46:50,106 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-14 15:46:50,106 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-14 15:46:50,107 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-14 15:46:50,107 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-14 15:46:50,107 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-14 15:46:50,107 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-14 15:46:50,107 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-14 15:46:50,108 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-14 15:46:50,126 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states. [2018-09-14 15:46:50,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-09-14 15:46:50,133 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:46:50,134 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:46:50,135 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:46:50,141 INFO L82 PathProgramCache]: Analyzing trace with hash 1713253442, now seen corresponding path program 1 times [2018-09-14 15:46:50,144 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:46:50,199 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:50,199 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:46:50,199 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:50,199 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:46:50,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:50,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:50,260 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-14 15:46:50,261 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-14 15:46:50,261 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:46:50,266 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-14 15:46:50,281 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-14 15:46:50,282 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-14 15:46:50,284 INFO L87 Difference]: Start difference. First operand 19 states. Second operand 2 states. [2018-09-14 15:46:50,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:46:50,307 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-09-14 15:46:50,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-14 15:46:50,309 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-09-14 15:46:50,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:46:50,317 INFO L225 Difference]: With dead ends: 30 [2018-09-14 15:46:50,318 INFO L226 Difference]: Without dead ends: 13 [2018-09-14 15:46:50,321 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-14 15:46:50,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-09-14 15:46:50,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-09-14 15:46:50,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-09-14 15:46:50,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2018-09-14 15:46:50,358 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 10 [2018-09-14 15:46:50,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:46:50,358 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2018-09-14 15:46:50,358 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-14 15:46:50,359 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2018-09-14 15:46:50,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-09-14 15:46:50,359 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:46:50,360 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:46:50,360 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:46:50,360 INFO L82 PathProgramCache]: Analyzing trace with hash 1144102878, now seen corresponding path program 1 times [2018-09-14 15:46:50,361 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:46:50,362 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:50,362 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:46:50,362 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:50,362 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:46:50,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:50,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:50,534 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-14 15:46:50,534 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-09-14 15:46:50,534 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:46:50,536 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-14 15:46:50,536 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-14 15:46:50,536 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-14 15:46:50,537 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand 3 states. [2018-09-14 15:46:50,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:46:50,629 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2018-09-14 15:46:50,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-14 15:46:50,633 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-09-14 15:46:50,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:46:50,634 INFO L225 Difference]: With dead ends: 24 [2018-09-14 15:46:50,635 INFO L226 Difference]: Without dead ends: 16 [2018-09-14 15:46:50,636 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-14 15:46:50,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-09-14 15:46:50,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-09-14 15:46:50,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-09-14 15:46:50,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2018-09-14 15:46:50,641 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 17 transitions. Word has length 11 [2018-09-14 15:46:50,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:46:50,641 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 17 transitions. [2018-09-14 15:46:50,641 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-14 15:46:50,642 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 17 transitions. [2018-09-14 15:46:50,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-09-14 15:46:50,643 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:46:50,643 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:46:50,644 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:46:50,644 INFO L82 PathProgramCache]: Analyzing trace with hash -2056921797, now seen corresponding path program 1 times [2018-09-14 15:46:50,644 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:46:50,645 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:50,646 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:46:50,646 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:50,646 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:46:50,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:50,768 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:50,768 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:50,769 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:46:50,784 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:46:50,784 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:46:50,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:50,805 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:50,840 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:50,840 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:50,926 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:50,951 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:50,951 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:46:50,967 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:46:50,968 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:46:50,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:50,986 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:51,025 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:51,025 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:51,063 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:51,068 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:46:51,068 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-09-14 15:46:51,068 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:46:51,069 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-14 15:46:51,069 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-14 15:46:51,069 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-09-14 15:46:51,070 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. Second operand 4 states. [2018-09-14 15:46:51,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:46:51,183 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2018-09-14 15:46:51,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-14 15:46:51,185 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-09-14 15:46:51,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:46:51,186 INFO L225 Difference]: With dead ends: 27 [2018-09-14 15:46:51,186 INFO L226 Difference]: Without dead ends: 19 [2018-09-14 15:46:51,187 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-09-14 15:46:51,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-09-14 15:46:51,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-09-14 15:46:51,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-09-14 15:46:51,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2018-09-14 15:46:51,194 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 14 [2018-09-14 15:46:51,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:46:51,194 INFO L480 AbstractCegarLoop]: Abstraction has 19 states and 20 transitions. [2018-09-14 15:46:51,194 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-14 15:46:51,195 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 20 transitions. [2018-09-14 15:46:51,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-09-14 15:46:51,195 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:46:51,196 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:46:51,196 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:46:51,196 INFO L82 PathProgramCache]: Analyzing trace with hash 1670825662, now seen corresponding path program 2 times [2018-09-14 15:46:51,198 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:46:51,198 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:51,199 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:46:51,199 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:51,199 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:46:51,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:51,403 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:51,403 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:51,405 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:46:51,426 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:46:51,427 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:46:51,466 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:46:51,466 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:46:51,468 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:51,499 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:51,500 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:51,626 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:51,646 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:51,646 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:46:51,661 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:46:51,662 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:46:51,684 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:46:51,685 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:46:51,688 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:51,726 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:51,726 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:51,760 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:51,762 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:46:51,763 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-09-14 15:46:51,763 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:46:51,763 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-14 15:46:51,764 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-14 15:46:51,764 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-09-14 15:46:51,764 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. Second operand 5 states. [2018-09-14 15:46:51,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:46:51,818 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-09-14 15:46:51,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-14 15:46:51,819 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-09-14 15:46:51,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:46:51,820 INFO L225 Difference]: With dead ends: 30 [2018-09-14 15:46:51,820 INFO L226 Difference]: Without dead ends: 22 [2018-09-14 15:46:51,821 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-09-14 15:46:51,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-09-14 15:46:51,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-09-14 15:46:51,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-09-14 15:46:51,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2018-09-14 15:46:51,827 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 23 transitions. Word has length 17 [2018-09-14 15:46:51,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:46:51,827 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 23 transitions. [2018-09-14 15:46:51,827 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-14 15:46:51,827 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2018-09-14 15:46:51,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-09-14 15:46:51,828 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:46:51,828 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:46:51,828 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:46:51,829 INFO L82 PathProgramCache]: Analyzing trace with hash 26004059, now seen corresponding path program 3 times [2018-09-14 15:46:51,829 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:46:51,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:51,830 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:46:51,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:51,830 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:46:51,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:52,030 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:52,030 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:52,031 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:46:52,040 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:46:52,041 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:46:52,064 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-09-14 15:46:52,065 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:46:52,067 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:52,093 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-09-14 15:46:52,093 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:52,123 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-09-14 15:46:52,144 INFO L313 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-09-14 15:46:52,145 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [6] total 8 [2018-09-14 15:46:52,145 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:46:52,145 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-14 15:46:52,146 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-14 15:46:52,146 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-09-14 15:46:52,146 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. Second operand 3 states. [2018-09-14 15:46:52,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:46:52,206 INFO L93 Difference]: Finished difference Result 30 states and 32 transitions. [2018-09-14 15:46:52,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-14 15:46:52,207 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2018-09-14 15:46:52,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:46:52,209 INFO L225 Difference]: With dead ends: 30 [2018-09-14 15:46:52,209 INFO L226 Difference]: Without dead ends: 25 [2018-09-14 15:46:52,210 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-09-14 15:46:52,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-09-14 15:46:52,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2018-09-14 15:46:52,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-09-14 15:46:52,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 25 transitions. [2018-09-14 15:46:52,215 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 25 transitions. Word has length 20 [2018-09-14 15:46:52,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:46:52,215 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 25 transitions. [2018-09-14 15:46:52,215 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-14 15:46:52,215 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 25 transitions. [2018-09-14 15:46:52,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-09-14 15:46:52,216 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:46:52,216 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:46:52,217 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:46:52,217 INFO L82 PathProgramCache]: Analyzing trace with hash -2092450784, now seen corresponding path program 1 times [2018-09-14 15:46:52,217 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:46:52,218 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:52,218 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:46:52,218 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:52,219 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:46:52,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:52,413 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:52,414 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:52,414 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:46:52,423 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:46:52,423 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:46:52,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:52,438 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:52,481 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:52,481 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:53,012 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:53,033 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:53,033 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:46:53,048 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:46:53,048 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:46:53,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:53,071 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:53,101 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:53,101 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:53,201 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:53,213 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:46:53,213 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 7, 6, 6] total 15 [2018-09-14 15:46:53,213 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:46:53,214 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-09-14 15:46:53,214 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-09-14 15:46:53,215 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=133, Unknown=0, NotChecked=0, Total=210 [2018-09-14 15:46:53,215 INFO L87 Difference]: Start difference. First operand 24 states and 25 transitions. Second operand 7 states. [2018-09-14 15:46:53,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:46:53,325 INFO L93 Difference]: Finished difference Result 37 states and 40 transitions. [2018-09-14 15:46:53,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-09-14 15:46:53,326 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-09-14 15:46:53,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:46:53,327 INFO L225 Difference]: With dead ends: 37 [2018-09-14 15:46:53,327 INFO L226 Difference]: Without dead ends: 27 [2018-09-14 15:46:53,328 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 81 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=77, Invalid=133, Unknown=0, NotChecked=0, Total=210 [2018-09-14 15:46:53,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-09-14 15:46:53,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-09-14 15:46:53,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-09-14 15:46:53,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2018-09-14 15:46:53,333 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 23 [2018-09-14 15:46:53,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:46:53,334 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2018-09-14 15:46:53,334 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-09-14 15:46:53,334 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2018-09-14 15:46:53,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-09-14 15:46:53,335 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:46:53,335 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:46:53,335 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:46:53,336 INFO L82 PathProgramCache]: Analyzing trace with hash 1956763133, now seen corresponding path program 2 times [2018-09-14 15:46:53,336 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:46:53,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:53,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:46:53,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:53,337 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:46:53,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:53,512 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:53,513 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:53,513 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:46:53,521 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:46:53,521 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:46:53,533 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:46:53,533 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:46:53,535 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:53,559 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:53,560 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:53,753 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:53,774 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:53,774 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:46:53,792 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:46:53,792 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:46:53,815 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:46:53,816 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:46:53,819 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:53,836 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:53,837 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:53,858 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:53,860 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:46:53,860 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-09-14 15:46:53,860 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:46:53,861 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-09-14 15:46:53,861 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-09-14 15:46:53,861 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-14 15:46:53,861 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand 8 states. [2018-09-14 15:46:54,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:46:54,006 INFO L93 Difference]: Finished difference Result 40 states and 43 transitions. [2018-09-14 15:46:54,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-14 15:46:54,007 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-09-14 15:46:54,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:46:54,008 INFO L225 Difference]: With dead ends: 40 [2018-09-14 15:46:54,009 INFO L226 Difference]: Without dead ends: 30 [2018-09-14 15:46:54,009 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 96 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-14 15:46:54,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-09-14 15:46:54,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-09-14 15:46:54,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-09-14 15:46:54,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 31 transitions. [2018-09-14 15:46:54,014 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 31 transitions. Word has length 26 [2018-09-14 15:46:54,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:46:54,015 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 31 transitions. [2018-09-14 15:46:54,015 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-09-14 15:46:54,015 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2018-09-14 15:46:54,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-09-14 15:46:54,016 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:46:54,016 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:46:54,016 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:46:54,017 INFO L82 PathProgramCache]: Analyzing trace with hash -657878272, now seen corresponding path program 3 times [2018-09-14 15:46:54,017 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:46:54,018 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:54,018 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:46:54,018 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:54,018 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:46:54,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:54,352 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:54,352 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:54,352 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:46:54,364 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:46:54,364 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:46:54,404 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-14 15:46:54,404 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:46:54,406 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:54,485 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-14 15:46:54,486 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:54,545 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-14 15:46:54,567 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:54,567 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:46:54,583 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:46:54,584 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:46:54,613 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-14 15:46:54,613 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:46:54,620 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:54,627 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-14 15:46:54,627 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:54,642 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-14 15:46:54,643 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:46:54,643 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 4, 4, 4, 4] total 13 [2018-09-14 15:46:54,643 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:46:54,644 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-14 15:46:54,644 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-14 15:46:54,645 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=105, Unknown=0, NotChecked=0, Total=156 [2018-09-14 15:46:54,646 INFO L87 Difference]: Start difference. First operand 30 states and 31 transitions. Second operand 11 states. [2018-09-14 15:46:54,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:46:54,925 INFO L93 Difference]: Finished difference Result 50 states and 57 transitions. [2018-09-14 15:46:54,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-14 15:46:54,928 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 29 [2018-09-14 15:46:54,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:46:54,929 INFO L225 Difference]: With dead ends: 50 [2018-09-14 15:46:54,929 INFO L226 Difference]: Without dead ends: 40 [2018-09-14 15:46:54,930 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 112 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-14 15:46:54,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-09-14 15:46:54,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 36. [2018-09-14 15:46:54,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-09-14 15:46:54,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2018-09-14 15:46:54,935 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 38 transitions. Word has length 29 [2018-09-14 15:46:54,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:46:54,937 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 38 transitions. [2018-09-14 15:46:54,937 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-14 15:46:54,938 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-09-14 15:46:54,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-09-14 15:46:54,938 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:46:54,940 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:46:54,940 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:46:54,941 INFO L82 PathProgramCache]: Analyzing trace with hash -249977826, now seen corresponding path program 4 times [2018-09-14 15:46:54,941 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:46:54,941 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:54,942 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:46:54,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:54,942 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:46:54,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:55,149 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:55,149 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:55,150 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:46:55,157 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:46:55,157 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:46:55,177 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:46:55,178 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:46:55,180 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:55,235 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-14 15:46:55,235 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:55,644 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-14 15:46:55,664 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:55,665 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:46:55,682 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:46:55,682 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:46:55,707 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:46:55,708 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:46:55,711 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:46:55,748 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-14 15:46:55,749 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:46:56,622 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-14 15:46:56,623 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:46:56,623 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10, 9, 9] total 25 [2018-09-14 15:46:56,623 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:46:56,624 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-14 15:46:56,624 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-14 15:46:56,624 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=201, Invalid=399, Unknown=0, NotChecked=0, Total=600 [2018-09-14 15:46:56,625 INFO L87 Difference]: Start difference. First operand 36 states and 38 transitions. Second operand 11 states. [2018-09-14 15:46:56,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:46:56,790 INFO L93 Difference]: Finished difference Result 52 states and 57 transitions. [2018-09-14 15:46:56,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-14 15:46:56,790 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-09-14 15:46:56,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:46:56,792 INFO L225 Difference]: With dead ends: 52 [2018-09-14 15:46:56,792 INFO L226 Difference]: Without dead ends: 39 [2018-09-14 15:46:56,793 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 123 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=201, Invalid=399, Unknown=0, NotChecked=0, Total=600 [2018-09-14 15:46:56,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-09-14 15:46:56,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-09-14 15:46:56,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-09-14 15:46:56,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 41 transitions. [2018-09-14 15:46:56,799 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 41 transitions. Word has length 35 [2018-09-14 15:46:56,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:46:56,799 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 41 transitions. [2018-09-14 15:46:56,800 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-14 15:46:56,800 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 41 transitions. [2018-09-14 15:46:56,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-09-14 15:46:56,801 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:46:56,801 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:46:56,801 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:46:56,802 INFO L82 PathProgramCache]: Analyzing trace with hash 1580391035, now seen corresponding path program 5 times [2018-09-14 15:46:56,802 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:46:56,803 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:56,803 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:46:56,803 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:46:56,803 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:46:56,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:46:57,074 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:46:57,074 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:46:57,074 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:46:57,083 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:46:57,084 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:47:15,842 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-14 15:47:15,842 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:47:15,989 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:16,270 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-14 15:47:16,270 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:16,902 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-14 15:47:16,923 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:16,923 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:47:16,939 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:47:16,939 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:47:17,041 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-14 15:47:17,041 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:47:17,047 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:17,072 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-14 15:47:17,072 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:17,449 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-14 15:47:17,450 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:47:17,450 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10, 11, 10, 10] total 28 [2018-09-14 15:47:17,450 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:47:17,451 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-09-14 15:47:17,451 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-09-14 15:47:17,452 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=507, Unknown=0, NotChecked=0, Total=756 [2018-09-14 15:47:17,452 INFO L87 Difference]: Start difference. First operand 39 states and 41 transitions. Second operand 12 states. [2018-09-14 15:47:17,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:47:17,786 INFO L93 Difference]: Finished difference Result 55 states and 60 transitions. [2018-09-14 15:47:17,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-14 15:47:17,787 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-09-14 15:47:17,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:47:17,788 INFO L225 Difference]: With dead ends: 55 [2018-09-14 15:47:17,788 INFO L226 Difference]: Without dead ends: 42 [2018-09-14 15:47:17,789 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 133 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=249, Invalid=507, Unknown=0, NotChecked=0, Total=756 [2018-09-14 15:47:17,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-09-14 15:47:17,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-09-14 15:47:17,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-09-14 15:47:17,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 44 transitions. [2018-09-14 15:47:17,797 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 44 transitions. Word has length 38 [2018-09-14 15:47:17,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:47:17,797 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 44 transitions. [2018-09-14 15:47:17,797 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-09-14 15:47:17,797 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 44 transitions. [2018-09-14 15:47:17,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-09-14 15:47:17,798 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:47:17,799 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 8, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:47:17,799 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:47:17,799 INFO L82 PathProgramCache]: Analyzing trace with hash 1194339070, now seen corresponding path program 6 times [2018-09-14 15:47:17,799 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:47:17,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:17,800 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:47:17,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:17,801 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:47:17,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:47:18,008 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:47:18,008 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:18,008 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:47:18,038 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:47:18,038 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:47:18,098 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-14 15:47:18,098 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:47:18,099 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:18,185 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:47:18,185 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:18,256 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:47:18,277 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:18,277 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:47:18,292 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:47:18,293 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:47:18,410 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-14 15:47:18,410 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:47:18,413 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:18,418 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:47:18,418 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:18,428 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-14 15:47:18,429 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:47:18,430 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 5, 5, 5, 5] total 19 [2018-09-14 15:47:18,430 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:47:18,430 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-14 15:47:18,430 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-14 15:47:18,431 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=241, Unknown=0, NotChecked=0, Total=342 [2018-09-14 15:47:18,431 INFO L87 Difference]: Start difference. First operand 42 states and 44 transitions. Second operand 16 states. [2018-09-14 15:47:19,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:47:19,045 INFO L93 Difference]: Finished difference Result 65 states and 74 transitions. [2018-09-14 15:47:19,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-14 15:47:19,045 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 41 [2018-09-14 15:47:19,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:47:19,047 INFO L225 Difference]: With dead ends: 65 [2018-09-14 15:47:19,048 INFO L226 Difference]: Without dead ends: 52 [2018-09-14 15:47:19,048 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 159 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=129, Invalid=291, Unknown=0, NotChecked=0, Total=420 [2018-09-14 15:47:19,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-09-14 15:47:19,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 48. [2018-09-14 15:47:19,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-09-14 15:47:19,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 51 transitions. [2018-09-14 15:47:19,055 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 51 transitions. Word has length 41 [2018-09-14 15:47:19,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:47:19,055 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 51 transitions. [2018-09-14 15:47:19,055 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-14 15:47:19,055 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 51 transitions. [2018-09-14 15:47:19,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-09-14 15:47:19,056 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:47:19,056 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 9, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:47:19,057 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:47:19,057 INFO L82 PathProgramCache]: Analyzing trace with hash -565963040, now seen corresponding path program 7 times [2018-09-14 15:47:19,057 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:47:19,058 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:19,058 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:47:19,058 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:19,058 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:47:19,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:47:19,699 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:47:19,699 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:19,699 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:47:19,707 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:47:19,707 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:47:19,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:47:19,725 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:19,790 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-14 15:47:19,790 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:20,511 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-14 15:47:20,532 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:20,532 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:47:20,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:47:20,547 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:47:20,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:47:20,576 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:20,588 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-14 15:47:20,588 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:21,220 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-14 15:47:21,222 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:47:21,222 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12, 13, 12, 12] total 35 [2018-09-14 15:47:21,222 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:47:21,222 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-14 15:47:21,223 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-14 15:47:21,224 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=382, Invalid=808, Unknown=0, NotChecked=0, Total=1190 [2018-09-14 15:47:21,224 INFO L87 Difference]: Start difference. First operand 48 states and 51 transitions. Second operand 15 states. [2018-09-14 15:47:21,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:47:21,499 INFO L93 Difference]: Finished difference Result 67 states and 74 transitions. [2018-09-14 15:47:21,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-14 15:47:21,501 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2018-09-14 15:47:21,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:47:21,503 INFO L225 Difference]: With dead ends: 67 [2018-09-14 15:47:21,503 INFO L226 Difference]: Without dead ends: 51 [2018-09-14 15:47:21,504 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 165 SyntacticMatches, 4 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=382, Invalid=808, Unknown=0, NotChecked=0, Total=1190 [2018-09-14 15:47:21,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-09-14 15:47:21,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-09-14 15:47:21,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-09-14 15:47:21,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 54 transitions. [2018-09-14 15:47:21,509 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 54 transitions. Word has length 47 [2018-09-14 15:47:21,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:47:21,510 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 54 transitions. [2018-09-14 15:47:21,510 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-14 15:47:21,510 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 54 transitions. [2018-09-14 15:47:21,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-09-14 15:47:21,511 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:47:21,511 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 10, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:47:21,511 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:47:21,511 INFO L82 PathProgramCache]: Analyzing trace with hash -1227511363, now seen corresponding path program 8 times [2018-09-14 15:47:21,512 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:47:21,512 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:21,512 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:47:21,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:21,513 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:47:21,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:47:21,866 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:47:21,866 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:21,866 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:47:21,875 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:47:21,875 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:47:21,901 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:47:21,902 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:47:21,904 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:21,984 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:47:21,984 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:22,658 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:47:22,679 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:22,679 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:47:22,694 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:47:22,694 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:47:22,730 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:47:22,731 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:47:22,734 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:22,796 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:47:22,796 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:22,858 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:47:22,860 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:47:22,860 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-09-14 15:47:22,860 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:47:22,861 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-14 15:47:22,861 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-14 15:47:22,862 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-09-14 15:47:22,862 INFO L87 Difference]: Start difference. First operand 51 states and 54 transitions. Second operand 16 states. [2018-09-14 15:47:23,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:47:23,128 INFO L93 Difference]: Finished difference Result 70 states and 77 transitions. [2018-09-14 15:47:23,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-14 15:47:23,128 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-09-14 15:47:23,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:47:23,130 INFO L225 Difference]: With dead ends: 70 [2018-09-14 15:47:23,130 INFO L226 Difference]: Without dead ends: 54 [2018-09-14 15:47:23,131 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 184 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-09-14 15:47:23,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-09-14 15:47:23,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-09-14 15:47:23,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-09-14 15:47:23,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 57 transitions. [2018-09-14 15:47:23,142 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 57 transitions. Word has length 50 [2018-09-14 15:47:23,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:47:23,142 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 57 transitions. [2018-09-14 15:47:23,143 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-14 15:47:23,143 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 57 transitions. [2018-09-14 15:47:23,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-09-14 15:47:23,144 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:47:23,144 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 11, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:47:23,144 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:47:23,144 INFO L82 PathProgramCache]: Analyzing trace with hash 191319488, now seen corresponding path program 9 times [2018-09-14 15:47:23,144 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:47:23,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:23,145 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:47:23,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:23,146 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:47:23,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:47:23,417 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:47:23,418 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:23,418 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:47:23,428 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:47:23,428 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:47:23,445 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-14 15:47:23,445 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:47:23,448 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:23,590 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-14 15:47:23,590 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:23,709 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-14 15:47:23,730 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:23,730 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:47:23,746 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:47:23,747 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:47:23,818 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-14 15:47:23,818 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:47:23,821 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:23,828 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-14 15:47:23,828 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:23,838 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-14 15:47:23,840 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:47:23,840 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 6, 6, 6, 6] total 25 [2018-09-14 15:47:23,840 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:47:23,840 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-14 15:47:23,841 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-14 15:47:23,841 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=433, Unknown=0, NotChecked=0, Total=600 [2018-09-14 15:47:23,841 INFO L87 Difference]: Start difference. First operand 54 states and 57 transitions. Second operand 21 states. [2018-09-14 15:47:24,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:47:24,729 INFO L93 Difference]: Finished difference Result 80 states and 91 transitions. [2018-09-14 15:47:24,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-14 15:47:24,729 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 53 [2018-09-14 15:47:24,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:47:24,730 INFO L225 Difference]: With dead ends: 80 [2018-09-14 15:47:24,730 INFO L226 Difference]: Without dead ends: 64 [2018-09-14 15:47:24,731 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 233 GetRequests, 206 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=221, Invalid=535, Unknown=0, NotChecked=0, Total=756 [2018-09-14 15:47:24,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-09-14 15:47:24,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 60. [2018-09-14 15:47:24,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-09-14 15:47:24,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 64 transitions. [2018-09-14 15:47:24,738 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 64 transitions. Word has length 53 [2018-09-14 15:47:24,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:47:24,738 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 64 transitions. [2018-09-14 15:47:24,738 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-14 15:47:24,738 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 64 transitions. [2018-09-14 15:47:24,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-14 15:47:24,739 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:47:24,739 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 12, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:47:24,740 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:47:24,740 INFO L82 PathProgramCache]: Analyzing trace with hash 794925150, now seen corresponding path program 10 times [2018-09-14 15:47:24,740 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:47:24,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:24,741 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:47:24,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:24,741 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:47:24,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:47:25,291 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:47:25,291 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:25,291 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:47:25,300 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:47:25,300 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:47:25,330 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:47:25,331 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:47:25,332 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:25,367 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-14 15:47:25,367 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:26,340 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-14 15:47:26,361 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:26,361 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:47:26,392 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:47:26,392 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:47:26,426 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:47:26,427 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:47:26,430 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:47:26,454 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-14 15:47:26,455 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:47:27,372 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-14 15:47:27,374 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:47:27,375 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 15, 16, 15, 15] total 45 [2018-09-14 15:47:27,375 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:47:27,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-14 15:47:27,375 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-14 15:47:27,376 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=620, Invalid=1360, Unknown=0, NotChecked=0, Total=1980 [2018-09-14 15:47:27,377 INFO L87 Difference]: Start difference. First operand 60 states and 64 transitions. Second operand 19 states. [2018-09-14 15:47:27,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:47:27,792 INFO L93 Difference]: Finished difference Result 82 states and 91 transitions. [2018-09-14 15:47:27,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-14 15:47:27,792 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2018-09-14 15:47:27,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:47:27,793 INFO L225 Difference]: With dead ends: 82 [2018-09-14 15:47:27,793 INFO L226 Difference]: Without dead ends: 63 [2018-09-14 15:47:27,795 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 254 GetRequests, 207 SyntacticMatches, 4 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=620, Invalid=1360, Unknown=0, NotChecked=0, Total=1980 [2018-09-14 15:47:27,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-09-14 15:47:27,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-09-14 15:47:27,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-09-14 15:47:27,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 67 transitions. [2018-09-14 15:47:27,801 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 67 transitions. Word has length 59 [2018-09-14 15:47:27,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:47:27,802 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 67 transitions. [2018-09-14 15:47:27,802 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-14 15:47:27,802 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 67 transitions. [2018-09-14 15:47:27,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-09-14 15:47:27,803 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:47:27,803 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 13, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:47:27,804 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:47:27,804 INFO L82 PathProgramCache]: Analyzing trace with hash 1464125371, now seen corresponding path program 11 times [2018-09-14 15:47:27,804 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:47:27,804 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:27,805 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:47:27,805 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:47:27,805 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:47:27,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:47:28,213 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:47:28,214 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:47:28,214 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:47:28,222 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:47:28,222 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:50:06,113 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-14 15:50:06,113 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:09,648 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:09,686 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:09,686 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:10,594 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:10,614 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:10,614 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:50:10,632 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:50:10,632 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:50:10,986 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-14 15:50:10,986 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:10,989 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:11,009 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 154 proven. 273 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-14 15:50:11,010 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:12,197 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 154 proven. 273 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-14 15:50:12,199 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:50:12,199 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 16, 16] total 52 [2018-09-14 15:50:12,199 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:50:12,199 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-14 15:50:12,200 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-14 15:50:12,201 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=874, Invalid=1778, Unknown=0, NotChecked=0, Total=2652 [2018-09-14 15:50:12,202 INFO L87 Difference]: Start difference. First operand 63 states and 67 transitions. Second operand 20 states. [2018-09-14 15:50:12,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:12,920 INFO L93 Difference]: Finished difference Result 85 states and 94 transitions. [2018-09-14 15:50:12,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-14 15:50:12,921 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 62 [2018-09-14 15:50:12,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:12,922 INFO L225 Difference]: With dead ends: 85 [2018-09-14 15:50:12,922 INFO L226 Difference]: Without dead ends: 66 [2018-09-14 15:50:12,923 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 214 SyntacticMatches, 3 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=874, Invalid=1778, Unknown=0, NotChecked=0, Total=2652 [2018-09-14 15:50:12,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-09-14 15:50:12,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-09-14 15:50:12,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-09-14 15:50:12,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-09-14 15:50:12,930 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 62 [2018-09-14 15:50:12,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:12,931 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-09-14 15:50:12,931 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-14 15:50:12,931 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-09-14 15:50:12,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-09-14 15:50:12,932 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:12,932 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 14, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:12,932 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:12,933 INFO L82 PathProgramCache]: Analyzing trace with hash 369721150, now seen corresponding path program 12 times [2018-09-14 15:50:12,933 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:12,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:12,934 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:50:12,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:12,934 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:12,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:13,345 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:13,346 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:13,346 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:50:13,355 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:50:13,355 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:50:15,878 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-09-14 15:50:15,878 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:15,920 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:16,129 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-14 15:50:16,129 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:16,337 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-14 15:50:16,357 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:16,357 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:50:16,373 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:50:16,374 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:50:16,684 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-09-14 15:50:16,684 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:16,688 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:16,709 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-14 15:50:16,710 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:16,780 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-14 15:50:16,781 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:50:16,781 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 7, 7, 7, 7] total 31 [2018-09-14 15:50:16,782 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:50:16,782 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-14 15:50:16,782 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-14 15:50:16,783 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=681, Unknown=0, NotChecked=0, Total=930 [2018-09-14 15:50:16,783 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 26 states. [2018-09-14 15:50:25,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:25,898 INFO L93 Difference]: Finished difference Result 98 states and 112 transitions. [2018-09-14 15:50:25,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-14 15:50:25,899 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 65 [2018-09-14 15:50:25,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:25,899 INFO L225 Difference]: With dead ends: 98 [2018-09-14 15:50:25,899 INFO L226 Difference]: Without dead ends: 79 [2018-09-14 15:50:25,900 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 289 GetRequests, 254 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=362, Invalid=898, Unknown=0, NotChecked=0, Total=1260 [2018-09-14 15:50:25,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-09-14 15:50:25,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 72. [2018-09-14 15:50:25,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-09-14 15:50:25,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 77 transitions. [2018-09-14 15:50:25,907 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 77 transitions. Word has length 65 [2018-09-14 15:50:25,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:25,907 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 77 transitions. [2018-09-14 15:50:25,907 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-14 15:50:25,907 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 77 transitions. [2018-09-14 15:50:25,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-09-14 15:50:25,908 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:25,909 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 15, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:25,909 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:25,909 INFO L82 PathProgramCache]: Analyzing trace with hash -512392800, now seen corresponding path program 13 times [2018-09-14 15:50:25,909 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:25,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:25,910 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:50:25,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:25,910 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:25,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:26,384 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:26,385 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:26,385 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:50:26,392 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:50:26,392 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:50:26,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:26,416 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:26,489 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-14 15:50:26,489 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:28,156 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-14 15:50:28,177 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:28,177 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:50:28,195 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:50:28,195 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:50:28,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:28,243 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:28,272 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-14 15:50:28,272 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:30,376 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-14 15:50:30,378 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:50:30,378 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 18, 19, 18, 18] total 55 [2018-09-14 15:50:30,378 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:50:30,378 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-09-14 15:50:30,379 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-09-14 15:50:30,380 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=915, Invalid=2055, Unknown=0, NotChecked=0, Total=2970 [2018-09-14 15:50:30,380 INFO L87 Difference]: Start difference. First operand 72 states and 77 transitions. Second operand 23 states. [2018-09-14 15:50:31,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:31,169 INFO L93 Difference]: Finished difference Result 97 states and 108 transitions. [2018-09-14 15:50:31,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-14 15:50:31,170 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 71 [2018-09-14 15:50:31,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:31,171 INFO L225 Difference]: With dead ends: 97 [2018-09-14 15:50:31,171 INFO L226 Difference]: Without dead ends: 75 [2018-09-14 15:50:31,173 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 306 GetRequests, 249 SyntacticMatches, 4 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=915, Invalid=2055, Unknown=0, NotChecked=0, Total=2970 [2018-09-14 15:50:31,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-09-14 15:50:31,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2018-09-14 15:50:31,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-09-14 15:50:31,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 80 transitions. [2018-09-14 15:50:31,179 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 80 transitions. Word has length 71 [2018-09-14 15:50:31,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:31,179 INFO L480 AbstractCegarLoop]: Abstraction has 75 states and 80 transitions. [2018-09-14 15:50:31,179 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-09-14 15:50:31,179 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 80 transitions. [2018-09-14 15:50:31,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-09-14 15:50:31,180 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:31,181 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 16, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:31,181 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:31,181 INFO L82 PathProgramCache]: Analyzing trace with hash 10718589, now seen corresponding path program 14 times [2018-09-14 15:50:31,181 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:31,182 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:31,182 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:50:31,182 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:31,182 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:31,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:32,542 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:32,543 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:32,543 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:50:32,552 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:50:32,552 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:50:32,572 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:50:32,572 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:32,574 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:32,594 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:32,594 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:34,073 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:34,094 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:34,094 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:50:34,109 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:50:34,109 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:50:34,159 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:50:34,160 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:34,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:34,194 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:34,195 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:34,208 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:34,209 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:50:34,209 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 46 [2018-09-14 15:50:34,210 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:50:34,210 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-14 15:50:34,210 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-14 15:50:34,211 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-09-14 15:50:34,211 INFO L87 Difference]: Start difference. First operand 75 states and 80 transitions. Second operand 24 states. [2018-09-14 15:50:34,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:34,758 INFO L93 Difference]: Finished difference Result 100 states and 111 transitions. [2018-09-14 15:50:34,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-14 15:50:34,759 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-09-14 15:50:34,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:34,759 INFO L225 Difference]: With dead ends: 100 [2018-09-14 15:50:34,759 INFO L226 Difference]: Without dead ends: 78 [2018-09-14 15:50:34,760 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 319 GetRequests, 272 SyntacticMatches, 3 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-09-14 15:50:34,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-09-14 15:50:34,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-09-14 15:50:34,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-09-14 15:50:34,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 83 transitions. [2018-09-14 15:50:34,768 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 83 transitions. Word has length 74 [2018-09-14 15:50:34,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:34,768 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 83 transitions. [2018-09-14 15:50:34,768 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-14 15:50:34,768 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2018-09-14 15:50:34,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-09-14 15:50:34,769 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:34,769 INFO L376 BasicCegarLoop]: trace histogram [23, 22, 17, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:34,769 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:34,770 INFO L82 PathProgramCache]: Analyzing trace with hash 1880758400, now seen corresponding path program 15 times [2018-09-14 15:50:34,770 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:34,770 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:34,770 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:50:34,771 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:34,771 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:34,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:35,468 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:35,468 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:35,468 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:50:35,476 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:50:35,476 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:50:35,506 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-14 15:50:35,506 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:35,507 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:35,795 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-14 15:50:35,795 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:36,100 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-14 15:50:36,122 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:36,122 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:50:36,142 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:50:36,142 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:50:36,272 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-14 15:50:36,272 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:36,276 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:36,291 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-14 15:50:36,291 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:36,306 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-14 15:50:36,307 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:50:36,308 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 8, 8, 8, 8] total 37 [2018-09-14 15:50:36,308 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:50:36,308 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-14 15:50:36,308 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-14 15:50:36,309 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=347, Invalid=985, Unknown=0, NotChecked=0, Total=1332 [2018-09-14 15:50:36,309 INFO L87 Difference]: Start difference. First operand 78 states and 83 transitions. Second operand 31 states. [2018-09-14 15:50:41,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:41,660 INFO L93 Difference]: Finished difference Result 110 states and 125 transitions. [2018-09-14 15:50:41,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-14 15:50:41,660 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 77 [2018-09-14 15:50:41,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:41,661 INFO L225 Difference]: With dead ends: 110 [2018-09-14 15:50:41,661 INFO L226 Difference]: Without dead ends: 88 [2018-09-14 15:50:41,662 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 342 GetRequests, 300 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=477, Invalid=1245, Unknown=0, NotChecked=0, Total=1722 [2018-09-14 15:50:41,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-09-14 15:50:41,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 84. [2018-09-14 15:50:41,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-09-14 15:50:41,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 90 transitions. [2018-09-14 15:50:41,672 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 90 transitions. Word has length 77 [2018-09-14 15:50:41,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:41,672 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 90 transitions. [2018-09-14 15:50:41,672 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-14 15:50:41,673 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 90 transitions. [2018-09-14 15:50:41,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-09-14 15:50:41,673 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:41,673 INFO L376 BasicCegarLoop]: trace histogram [25, 24, 18, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:41,674 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:41,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1326089058, now seen corresponding path program 16 times [2018-09-14 15:50:41,675 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:41,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:41,675 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:50:41,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:41,675 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:41,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:42,536 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 48 proven. 828 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:42,536 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:42,536 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:50:42,545 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:50:42,545 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:50:42,567 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:50:42,567 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:42,569 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:42,620 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:50:42,620 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:44,654 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:50:44,673 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:44,674 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:50:44,688 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:50:44,689 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:50:44,742 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:50:44,742 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:50:44,746 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:50:44,788 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:50:44,788 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:50:46,961 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-14 15:50:46,963 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:50:46,963 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 21, 22, 21, 21] total 65 [2018-09-14 15:50:46,963 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:50:46,964 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-14 15:50:46,964 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-14 15:50:46,965 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1291, Invalid=2869, Unknown=0, NotChecked=0, Total=4160 [2018-09-14 15:50:46,966 INFO L87 Difference]: Start difference. First operand 84 states and 90 transitions. Second operand 27 states. [2018-09-14 15:50:47,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:50:47,631 INFO L93 Difference]: Finished difference Result 115 states and 129 transitions. [2018-09-14 15:50:47,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-14 15:50:47,631 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 83 [2018-09-14 15:50:47,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:50:47,633 INFO L225 Difference]: With dead ends: 115 [2018-09-14 15:50:47,633 INFO L226 Difference]: Without dead ends: 90 [2018-09-14 15:50:47,635 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 357 GetRequests, 291 SyntacticMatches, 3 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=1291, Invalid=2869, Unknown=0, NotChecked=0, Total=4160 [2018-09-14 15:50:47,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-09-14 15:50:47,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2018-09-14 15:50:47,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-09-14 15:50:47,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 96 transitions. [2018-09-14 15:50:47,640 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 96 transitions. Word has length 83 [2018-09-14 15:50:47,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:50:47,640 INFO L480 AbstractCegarLoop]: Abstraction has 90 states and 96 transitions. [2018-09-14 15:50:47,640 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-14 15:50:47,641 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 96 transitions. [2018-09-14 15:50:47,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-14 15:50:47,641 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:50:47,641 INFO L376 BasicCegarLoop]: trace histogram [27, 26, 20, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:50:47,642 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:50:47,642 INFO L82 PathProgramCache]: Analyzing trace with hash -502348930, now seen corresponding path program 17 times [2018-09-14 15:50:47,642 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:50:47,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:47,643 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:50:47,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:50:47,643 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:50:47,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:50:49,079 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 52 proven. 975 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:50:49,079 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:50:49,079 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:50:49,088 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:50:49,088 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown