java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-invgen/string_concat-noarr_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-dace188-m [2018-09-14 15:51:15,842 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-14 15:51:15,844 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-14 15:51:15,861 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-14 15:51:15,861 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-14 15:51:15,862 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-14 15:51:15,863 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-14 15:51:15,866 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-14 15:51:15,867 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-14 15:51:15,868 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-14 15:51:15,869 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-14 15:51:15,869 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-14 15:51:15,870 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-14 15:51:15,873 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-14 15:51:15,874 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-14 15:51:15,875 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-14 15:51:15,877 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-14 15:51:15,879 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-14 15:51:15,883 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-14 15:51:15,885 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-14 15:51:15,891 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-14 15:51:15,893 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-14 15:51:15,898 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-09-14 15:51:15,912 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-14 15:51:15,933 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-14 15:51:15,934 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-14 15:51:15,934 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-14 15:51:15,935 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-14 15:51:15,935 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-14 15:51:15,935 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-14 15:51:15,935 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-14 15:51:15,935 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-14 15:51:15,936 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-14 15:51:15,936 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-14 15:51:15,936 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-14 15:51:15,937 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-14 15:51:15,937 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-14 15:51:15,937 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-14 15:51:15,937 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-14 15:51:15,938 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-14 15:51:15,938 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-14 15:51:15,939 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-14 15:51:15,939 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-14 15:51:15,939 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-14 15:51:15,939 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-14 15:51:15,939 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-14 15:51:15,940 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-14 15:51:15,940 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-14 15:51:15,940 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-14 15:51:15,940 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-14 15:51:15,941 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-14 15:51:15,941 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-14 15:51:15,941 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-14 15:51:15,941 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-14 15:51:15,941 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-14 15:51:15,941 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-14 15:51:15,942 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-14 15:51:15,998 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-14 15:51:16,012 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-14 15:51:16,015 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-14 15:51:16,016 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-14 15:51:16,016 INFO L276 PluginConnector]: CDTParser initialized [2018-09-14 15:51:16,017 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-invgen/string_concat-noarr_true-unreach-call_true-termination.i [2018-09-14 15:51:16,333 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c2a84ba27/351cc7dca45046d58d24e864731f10ea/FLAGbe87f1f32 [2018-09-14 15:51:16,503 INFO L277 CDTParser]: Found 1 translation units. [2018-09-14 15:51:16,504 INFO L159 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-invgen/string_concat-noarr_true-unreach-call_true-termination.i [2018-09-14 15:51:16,509 INFO L325 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c2a84ba27/351cc7dca45046d58d24e864731f10ea/FLAGbe87f1f32 [2018-09-14 15:51:16,525 INFO L333 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c2a84ba27/351cc7dca45046d58d24e864731f10ea [2018-09-14 15:51:16,534 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-14 15:51:16,536 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-14 15:51:16,537 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-14 15:51:16,537 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-14 15:51:16,543 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-14 15:51:16,544 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,547 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@537cd63d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16, skipping insertion in model container [2018-09-14 15:51:16,547 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,559 INFO L160 ieTranslatorObserver]: Starting translation in SV-COMP mode [2018-09-14 15:51:16,763 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-14 15:51:16,779 INFO L424 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-14 15:51:16,784 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-14 15:51:16,798 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16 WrapperNode [2018-09-14 15:51:16,800 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-14 15:51:16,801 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-14 15:51:16,801 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-14 15:51:16,801 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-14 15:51:16,810 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,816 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,821 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-14 15:51:16,821 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-14 15:51:16,822 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-14 15:51:16,822 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-14 15:51:16,830 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,830 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,831 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,831 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,833 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,837 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,838 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (1/1) ... [2018-09-14 15:51:16,839 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-14 15:51:16,840 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-14 15:51:16,840 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-14 15:51:16,840 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-14 15:51:16,841 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-14 15:51:16,898 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-14 15:51:16,898 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-14 15:51:16,898 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-14 15:51:16,898 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-14 15:51:16,898 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-14 15:51:16,899 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-14 15:51:16,899 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-09-14 15:51:16,899 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-09-14 15:51:17,206 INFO L353 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-14 15:51:17,207 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.09 03:51:17 BoogieIcfgContainer [2018-09-14 15:51:17,207 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-14 15:51:17,208 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-14 15:51:17,208 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-14 15:51:17,211 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-14 15:51:17,211 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.09 03:51:16" (1/3) ... [2018-09-14 15:51:17,212 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b48ee3e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.09 03:51:17, skipping insertion in model container [2018-09-14 15:51:17,212 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.09 03:51:16" (2/3) ... [2018-09-14 15:51:17,213 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b48ee3e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.09 03:51:17, skipping insertion in model container [2018-09-14 15:51:17,213 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.09 03:51:17" (3/3) ... [2018-09-14 15:51:17,214 INFO L112 eAbstractionObserver]: Analyzing ICFG string_concat-noarr_true-unreach-call_true-termination.i [2018-09-14 15:51:17,224 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-14 15:51:17,232 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-14 15:51:17,278 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-14 15:51:17,278 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-14 15:51:17,278 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-14 15:51:17,279 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-14 15:51:17,279 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-14 15:51:17,279 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-14 15:51:17,279 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-14 15:51:17,279 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-14 15:51:17,279 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-14 15:51:17,296 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states. [2018-09-14 15:51:17,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-09-14 15:51:17,303 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:17,304 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:17,305 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:17,309 INFO L82 PathProgramCache]: Analyzing trace with hash -745796184, now seen corresponding path program 1 times [2018-09-14 15:51:17,312 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:17,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:17,360 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:17,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:17,361 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:17,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:17,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:17,424 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-14 15:51:17,424 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-14 15:51:17,424 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:51:17,429 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-14 15:51:17,443 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-14 15:51:17,444 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-14 15:51:17,446 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 2 states. [2018-09-14 15:51:17,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:17,467 INFO L93 Difference]: Finished difference Result 45 states and 54 transitions. [2018-09-14 15:51:17,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-14 15:51:17,469 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-09-14 15:51:17,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:17,478 INFO L225 Difference]: With dead ends: 45 [2018-09-14 15:51:17,478 INFO L226 Difference]: Without dead ends: 19 [2018-09-14 15:51:17,482 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-14 15:51:17,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-09-14 15:51:17,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-09-14 15:51:17,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-09-14 15:51:17,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2018-09-14 15:51:17,519 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 14 [2018-09-14 15:51:17,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:17,519 INFO L480 AbstractCegarLoop]: Abstraction has 19 states and 20 transitions. [2018-09-14 15:51:17,519 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-14 15:51:17,520 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 20 transitions. [2018-09-14 15:51:17,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-09-14 15:51:17,520 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:17,521 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:17,521 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:17,521 INFO L82 PathProgramCache]: Analyzing trace with hash 800081396, now seen corresponding path program 1 times [2018-09-14 15:51:17,522 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:17,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:17,523 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:17,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:17,523 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:17,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:17,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:17,823 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-14 15:51:17,823 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-09-14 15:51:17,823 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:51:17,825 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-14 15:51:17,825 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-14 15:51:17,825 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-09-14 15:51:17,826 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. Second operand 5 states. [2018-09-14 15:51:18,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:18,076 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2018-09-14 15:51:18,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-14 15:51:18,077 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-09-14 15:51:18,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:18,078 INFO L225 Difference]: With dead ends: 32 [2018-09-14 15:51:18,078 INFO L226 Difference]: Without dead ends: 26 [2018-09-14 15:51:18,079 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-09-14 15:51:18,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-09-14 15:51:18,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-09-14 15:51:18,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-09-14 15:51:18,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 28 transitions. [2018-09-14 15:51:18,085 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 28 transitions. Word has length 18 [2018-09-14 15:51:18,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:18,085 INFO L480 AbstractCegarLoop]: Abstraction has 26 states and 28 transitions. [2018-09-14 15:51:18,085 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-14 15:51:18,086 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2018-09-14 15:51:18,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-09-14 15:51:18,087 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:18,087 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:18,087 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:18,088 INFO L82 PathProgramCache]: Analyzing trace with hash 1097925811, now seen corresponding path program 1 times [2018-09-14 15:51:18,088 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:18,089 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:18,089 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:18,089 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:18,089 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:18,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:18,190 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-09-14 15:51:18,190 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-14 15:51:18,190 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-09-14 15:51:18,195 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-14 15:51:18,196 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-14 15:51:18,196 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-14 15:51:18,196 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-09-14 15:51:18,197 INFO L87 Difference]: Start difference. First operand 26 states and 28 transitions. Second operand 5 states. [2018-09-14 15:51:18,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:18,421 INFO L93 Difference]: Finished difference Result 35 states and 37 transitions. [2018-09-14 15:51:18,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-14 15:51:18,423 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-09-14 15:51:18,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:18,425 INFO L225 Difference]: With dead ends: 35 [2018-09-14 15:51:18,425 INFO L226 Difference]: Without dead ends: 29 [2018-09-14 15:51:18,427 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-09-14 15:51:18,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-09-14 15:51:18,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 22. [2018-09-14 15:51:18,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-09-14 15:51:18,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2018-09-14 15:51:18,436 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 23 transitions. Word has length 21 [2018-09-14 15:51:18,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:18,437 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 23 transitions. [2018-09-14 15:51:18,437 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-14 15:51:18,437 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2018-09-14 15:51:18,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-09-14 15:51:18,438 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:18,438 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:18,438 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:18,440 INFO L82 PathProgramCache]: Analyzing trace with hash -278190259, now seen corresponding path program 1 times [2018-09-14 15:51:18,440 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:18,441 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:18,441 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:18,441 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:18,442 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:18,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:18,565 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:18,566 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:18,566 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:18,582 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:18,582 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:18,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:18,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:18,725 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:18,726 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:18,825 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:18,847 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:18,847 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:18,863 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:18,863 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:18,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:18,887 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:18,994 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:18,994 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:19,041 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:19,043 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:19,044 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 12 [2018-09-14 15:51:19,044 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:19,044 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-09-14 15:51:19,044 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-09-14 15:51:19,045 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-09-14 15:51:19,045 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. Second operand 8 states. [2018-09-14 15:51:19,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:19,204 INFO L93 Difference]: Finished difference Result 63 states and 70 transitions. [2018-09-14 15:51:19,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-09-14 15:51:19,205 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-09-14 15:51:19,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:19,207 INFO L225 Difference]: With dead ends: 63 [2018-09-14 15:51:19,207 INFO L226 Difference]: Without dead ends: 53 [2018-09-14 15:51:19,208 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2018-09-14 15:51:19,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-09-14 15:51:19,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 39. [2018-09-14 15:51:19,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-09-14 15:51:19,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 42 transitions. [2018-09-14 15:51:19,215 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 42 transitions. Word has length 21 [2018-09-14 15:51:19,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:19,215 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 42 transitions. [2018-09-14 15:51:19,215 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-09-14 15:51:19,215 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 42 transitions. [2018-09-14 15:51:19,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-09-14 15:51:19,216 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:19,216 INFO L376 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:19,217 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:19,217 INFO L82 PathProgramCache]: Analyzing trace with hash -2006845708, now seen corresponding path program 1 times [2018-09-14 15:51:19,217 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:19,218 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:19,218 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:19,218 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:19,219 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:19,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:19,409 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:19,410 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:19,410 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:19,424 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:19,424 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:19,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:19,458 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:19,616 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:19,616 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:19,888 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:19,908 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:19,909 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:19,924 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:19,924 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:19,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:19,955 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:20,004 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:20,004 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:20,055 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:20,057 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:20,057 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 16 [2018-09-14 15:51:20,057 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:20,058 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-09-14 15:51:20,058 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-09-14 15:51:20,059 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=164, Unknown=0, NotChecked=0, Total=240 [2018-09-14 15:51:20,059 INFO L87 Difference]: Start difference. First operand 39 states and 42 transitions. Second operand 9 states. [2018-09-14 15:51:20,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:20,172 INFO L93 Difference]: Finished difference Result 75 states and 81 transitions. [2018-09-14 15:51:20,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-14 15:51:20,173 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 30 [2018-09-14 15:51:20,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:20,177 INFO L225 Difference]: With dead ends: 75 [2018-09-14 15:51:20,177 INFO L226 Difference]: Without dead ends: 69 [2018-09-14 15:51:20,178 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=82, Invalid=190, Unknown=0, NotChecked=0, Total=272 [2018-09-14 15:51:20,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-09-14 15:51:20,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 46. [2018-09-14 15:51:20,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-09-14 15:51:20,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 50 transitions. [2018-09-14 15:51:20,185 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 50 transitions. Word has length 30 [2018-09-14 15:51:20,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:20,186 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 50 transitions. [2018-09-14 15:51:20,186 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-09-14 15:51:20,186 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 50 transitions. [2018-09-14 15:51:20,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-09-14 15:51:20,187 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:20,188 INFO L376 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:20,188 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:20,188 INFO L82 PathProgramCache]: Analyzing trace with hash 750227251, now seen corresponding path program 2 times [2018-09-14 15:51:20,188 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:20,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:20,189 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:20,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:20,190 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:20,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:20,340 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:20,341 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:20,341 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:20,350 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:20,350 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:20,364 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:20,364 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:20,366 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:20,407 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:20,407 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:20,707 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:20,728 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:20,728 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:20,744 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:20,744 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:20,772 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:20,772 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:20,777 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:20,824 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:20,824 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:20,843 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:20,844 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:20,845 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 18 [2018-09-14 15:51:20,845 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:20,845 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-09-14 15:51:20,845 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-09-14 15:51:20,846 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=205, Unknown=0, NotChecked=0, Total=306 [2018-09-14 15:51:20,846 INFO L87 Difference]: Start difference. First operand 46 states and 50 transitions. Second operand 10 states. [2018-09-14 15:51:21,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:21,137 INFO L93 Difference]: Finished difference Result 82 states and 89 transitions. [2018-09-14 15:51:21,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-14 15:51:21,137 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 33 [2018-09-14 15:51:21,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:21,139 INFO L225 Difference]: With dead ends: 82 [2018-09-14 15:51:21,139 INFO L226 Difference]: Without dead ends: 76 [2018-09-14 15:51:21,140 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 122 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=107, Invalid=235, Unknown=0, NotChecked=0, Total=342 [2018-09-14 15:51:21,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-09-14 15:51:21,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 53. [2018-09-14 15:51:21,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-09-14 15:51:21,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2018-09-14 15:51:21,147 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 33 [2018-09-14 15:51:21,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:21,148 INFO L480 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2018-09-14 15:51:21,148 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-09-14 15:51:21,148 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2018-09-14 15:51:21,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-09-14 15:51:21,149 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:21,149 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:21,150 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:21,150 INFO L82 PathProgramCache]: Analyzing trace with hash -243819884, now seen corresponding path program 3 times [2018-09-14 15:51:21,150 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:21,151 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:21,151 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:21,151 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:21,151 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:21,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:21,281 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:21,281 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:21,281 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:21,290 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:21,290 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:21,304 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-14 15:51:21,305 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:21,308 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:21,380 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-14 15:51:21,381 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:21,516 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-14 15:51:21,537 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:21,537 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:21,565 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:21,566 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:21,599 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-14 15:51:21,599 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:21,604 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:21,622 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-14 15:51:21,622 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:21,660 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-14 15:51:21,664 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:21,664 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7, 7, 7, 7] total 19 [2018-09-14 15:51:21,664 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:21,665 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-14 15:51:21,665 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-14 15:51:21,666 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=227, Unknown=0, NotChecked=0, Total=342 [2018-09-14 15:51:21,666 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand 14 states. [2018-09-14 15:51:21,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:21,976 INFO L93 Difference]: Finished difference Result 119 states and 133 transitions. [2018-09-14 15:51:21,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-14 15:51:21,977 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 36 [2018-09-14 15:51:21,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:21,979 INFO L225 Difference]: With dead ends: 119 [2018-09-14 15:51:21,979 INFO L226 Difference]: Without dead ends: 107 [2018-09-14 15:51:21,980 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=121, Invalid=259, Unknown=0, NotChecked=0, Total=380 [2018-09-14 15:51:21,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-09-14 15:51:21,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 77. [2018-09-14 15:51:21,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-09-14 15:51:21,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 85 transitions. [2018-09-14 15:51:21,988 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 85 transitions. Word has length 36 [2018-09-14 15:51:21,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:21,988 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 85 transitions. [2018-09-14 15:51:21,988 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-14 15:51:21,989 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 85 transitions. [2018-09-14 15:51:21,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-09-14 15:51:21,990 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:21,990 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 7, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:21,991 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:21,991 INFO L82 PathProgramCache]: Analyzing trace with hash 1071743214, now seen corresponding path program 4 times [2018-09-14 15:51:21,991 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:21,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:21,993 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:21,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:21,993 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:22,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:22,164 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:22,164 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:22,164 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:22,173 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:22,173 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:22,202 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:22,203 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:22,206 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:22,242 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:22,242 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:22,629 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:22,650 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:22,650 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:22,667 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:22,667 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:22,705 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:22,705 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:22,710 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:22,756 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:22,758 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:22,784 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:22,787 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:22,787 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-09-14 15:51:22,788 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:22,788 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-14 15:51:22,789 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-14 15:51:22,789 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=470, Unknown=0, NotChecked=0, Total=756 [2018-09-14 15:51:22,794 INFO L87 Difference]: Start difference. First operand 77 states and 85 transitions. Second operand 15 states. [2018-09-14 15:51:22,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:22,974 INFO L93 Difference]: Finished difference Result 129 states and 141 transitions. [2018-09-14 15:51:22,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-14 15:51:22,974 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 48 [2018-09-14 15:51:22,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:22,976 INFO L225 Difference]: With dead ends: 129 [2018-09-14 15:51:22,976 INFO L226 Difference]: Without dead ends: 123 [2018-09-14 15:51:22,977 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 177 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=292, Invalid=520, Unknown=0, NotChecked=0, Total=812 [2018-09-14 15:51:22,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-09-14 15:51:22,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 84. [2018-09-14 15:51:22,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-09-14 15:51:22,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 93 transitions. [2018-09-14 15:51:22,985 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 93 transitions. Word has length 48 [2018-09-14 15:51:22,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:22,985 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 93 transitions. [2018-09-14 15:51:22,985 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-14 15:51:22,985 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 93 transitions. [2018-09-14 15:51:22,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-09-14 15:51:22,987 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:22,987 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 8, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:22,987 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:22,987 INFO L82 PathProgramCache]: Analyzing trace with hash 535766893, now seen corresponding path program 5 times [2018-09-14 15:51:22,987 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:22,988 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:22,988 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:22,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:22,989 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:23,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:23,394 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:23,394 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:23,394 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:23,403 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:23,403 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:23,530 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-09-14 15:51:23,530 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:23,533 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:23,700 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:23,700 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:24,094 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:24,115 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:24,115 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:24,131 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:24,131 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:24,191 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-09-14 15:51:24,191 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:24,195 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:24,227 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:24,227 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:24,251 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:24,252 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:24,252 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-09-14 15:51:24,253 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:24,253 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-14 15:51:24,253 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-14 15:51:24,254 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=335, Invalid=535, Unknown=0, NotChecked=0, Total=870 [2018-09-14 15:51:24,254 INFO L87 Difference]: Start difference. First operand 84 states and 93 transitions. Second operand 16 states. [2018-09-14 15:51:24,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:24,517 INFO L93 Difference]: Finished difference Result 136 states and 149 transitions. [2018-09-14 15:51:24,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-14 15:51:24,517 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 51 [2018-09-14 15:51:24,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:24,518 INFO L225 Difference]: With dead ends: 136 [2018-09-14 15:51:24,518 INFO L226 Difference]: Without dead ends: 130 [2018-09-14 15:51:24,519 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 188 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=341, Invalid=589, Unknown=0, NotChecked=0, Total=930 [2018-09-14 15:51:24,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-09-14 15:51:24,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 91. [2018-09-14 15:51:24,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-09-14 15:51:24,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 101 transitions. [2018-09-14 15:51:24,527 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 101 transitions. Word has length 51 [2018-09-14 15:51:24,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:24,528 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 101 transitions. [2018-09-14 15:51:24,528 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-14 15:51:24,528 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 101 transitions. [2018-09-14 15:51:24,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-09-14 15:51:24,529 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:24,529 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 9, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:24,530 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:24,530 INFO L82 PathProgramCache]: Analyzing trace with hash 1953594510, now seen corresponding path program 6 times [2018-09-14 15:51:24,530 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:24,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:24,531 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:24,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:24,531 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:24,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:24,860 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:24,860 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:24,861 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:24,870 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:24,870 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:24,899 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-09-14 15:51:24,899 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:24,901 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:24,982 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 135 trivial. 0 not checked. [2018-09-14 15:51:24,982 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:25,170 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 135 trivial. 0 not checked. [2018-09-14 15:51:25,190 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:25,190 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:25,205 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:25,205 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:25,258 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-09-14 15:51:25,259 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:25,262 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:25,517 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 135 trivial. 0 not checked. [2018-09-14 15:51:25,517 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:25,578 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 135 trivial. 0 not checked. [2018-09-14 15:51:25,580 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:25,580 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 8, 8, 8, 8] total 27 [2018-09-14 15:51:25,581 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:25,581 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-14 15:51:25,581 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-14 15:51:25,582 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=439, Unknown=0, NotChecked=0, Total=702 [2018-09-14 15:51:25,582 INFO L87 Difference]: Start difference. First operand 91 states and 101 transitions. Second operand 21 states. [2018-09-14 15:51:25,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:25,849 INFO L93 Difference]: Finished difference Result 188 states and 210 transitions. [2018-09-14 15:51:25,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-14 15:51:25,850 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 54 [2018-09-14 15:51:25,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:25,852 INFO L225 Difference]: With dead ends: 188 [2018-09-14 15:51:25,852 INFO L226 Difference]: Without dead ends: 174 [2018-09-14 15:51:25,853 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 232 GetRequests, 204 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=269, Invalid=487, Unknown=0, NotChecked=0, Total=756 [2018-09-14 15:51:25,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-09-14 15:51:25,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 122. [2018-09-14 15:51:25,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-09-14 15:51:25,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 136 transitions. [2018-09-14 15:51:25,861 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 136 transitions. Word has length 54 [2018-09-14 15:51:25,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:25,862 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 136 transitions. [2018-09-14 15:51:25,862 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-14 15:51:25,862 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 136 transitions. [2018-09-14 15:51:25,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-09-14 15:51:25,863 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:25,864 INFO L376 BasicCegarLoop]: trace histogram [14, 14, 13, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:25,864 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:25,864 INFO L82 PathProgramCache]: Analyzing trace with hash 1732418355, now seen corresponding path program 7 times [2018-09-14 15:51:25,864 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:25,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:25,865 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:25,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:25,865 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:25,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:26,280 INFO L134 CoverageAnalysis]: Checked inductivity of 303 backedges. 0 proven. 303 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:26,281 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:26,281 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:26,289 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:26,289 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:26,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:26,311 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:26,399 INFO L134 CoverageAnalysis]: Checked inductivity of 303 backedges. 0 proven. 303 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:26,399 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:27,143 INFO L134 CoverageAnalysis]: Checked inductivity of 303 backedges. 0 proven. 303 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:27,163 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:27,163 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:27,178 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:27,178 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:27,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:27,222 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:27,299 INFO L134 CoverageAnalysis]: Checked inductivity of 303 backedges. 0 proven. 303 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:27,300 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:27,365 INFO L134 CoverageAnalysis]: Checked inductivity of 303 backedges. 0 proven. 303 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:27,366 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:27,366 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 42 [2018-09-14 15:51:27,366 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:27,367 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-14 15:51:27,370 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-14 15:51:27,370 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=713, Invalid=1009, Unknown=0, NotChecked=0, Total=1722 [2018-09-14 15:51:27,371 INFO L87 Difference]: Start difference. First operand 122 states and 136 transitions. Second operand 22 states. [2018-09-14 15:51:27,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:27,626 INFO L93 Difference]: Finished difference Result 193 states and 212 transitions. [2018-09-14 15:51:27,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-14 15:51:27,626 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 69 [2018-09-14 15:51:27,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:27,628 INFO L225 Difference]: With dead ends: 193 [2018-09-14 15:51:27,628 INFO L226 Difference]: Without dead ends: 187 [2018-09-14 15:51:27,629 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 297 GetRequests, 254 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 176 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=719, Invalid=1087, Unknown=0, NotChecked=0, Total=1806 [2018-09-14 15:51:27,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-09-14 15:51:27,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 129. [2018-09-14 15:51:27,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-09-14 15:51:27,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 144 transitions. [2018-09-14 15:51:27,636 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 144 transitions. Word has length 69 [2018-09-14 15:51:27,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:27,636 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 144 transitions. [2018-09-14 15:51:27,636 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-14 15:51:27,636 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 144 transitions. [2018-09-14 15:51:27,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-09-14 15:51:27,638 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:27,638 INFO L376 BasicCegarLoop]: trace histogram [15, 15, 14, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:27,638 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:27,638 INFO L82 PathProgramCache]: Analyzing trace with hash 1957710356, now seen corresponding path program 8 times [2018-09-14 15:51:27,639 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:27,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:27,639 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:27,640 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:27,640 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:27,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:27,933 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:27,933 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:27,933 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:27,940 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:27,940 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:27,965 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:27,966 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:27,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:28,011 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:28,011 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:29,025 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:29,045 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:29,046 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:29,060 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:29,060 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:29,113 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:29,113 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:29,118 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:29,272 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:29,273 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:29,303 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:29,304 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:29,304 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 44 [2018-09-14 15:51:29,305 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:29,305 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-09-14 15:51:29,305 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-09-14 15:51:29,306 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=790, Invalid=1102, Unknown=0, NotChecked=0, Total=1892 [2018-09-14 15:51:29,306 INFO L87 Difference]: Start difference. First operand 129 states and 144 transitions. Second operand 23 states. [2018-09-14 15:51:29,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:29,536 INFO L93 Difference]: Finished difference Result 200 states and 220 transitions. [2018-09-14 15:51:29,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-14 15:51:29,536 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 72 [2018-09-14 15:51:29,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:29,538 INFO L225 Difference]: With dead ends: 200 [2018-09-14 15:51:29,538 INFO L226 Difference]: Without dead ends: 194 [2018-09-14 15:51:29,540 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 310 GetRequests, 265 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 186 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=796, Invalid=1184, Unknown=0, NotChecked=0, Total=1980 [2018-09-14 15:51:29,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-09-14 15:51:29,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 136. [2018-09-14 15:51:29,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-09-14 15:51:29,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 152 transitions. [2018-09-14 15:51:29,546 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 152 transitions. Word has length 72 [2018-09-14 15:51:29,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:29,546 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 152 transitions. [2018-09-14 15:51:29,546 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-09-14 15:51:29,546 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 152 transitions. [2018-09-14 15:51:29,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-09-14 15:51:29,548 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:29,548 INFO L376 BasicCegarLoop]: trace histogram [16, 16, 15, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:29,548 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:29,549 INFO L82 PathProgramCache]: Analyzing trace with hash 597828499, now seen corresponding path program 9 times [2018-09-14 15:51:29,549 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:29,550 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:29,550 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:29,550 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:29,550 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:29,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:30,451 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 390 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:30,452 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:30,452 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:30,461 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:30,461 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:30,481 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-09-14 15:51:30,482 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:30,485 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:30,691 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2018-09-14 15:51:30,691 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:31,484 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2018-09-14 15:51:31,505 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:31,506 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:31,523 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:31,523 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:31,568 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-09-14 15:51:31,568 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:31,571 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:31,589 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2018-09-14 15:51:31,589 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:31,607 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2018-09-14 15:51:31,608 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:31,609 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 9, 9, 9, 9] total 36 [2018-09-14 15:51:31,609 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:31,609 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-09-14 15:51:31,609 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-09-14 15:51:31,610 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=506, Invalid=754, Unknown=0, NotChecked=0, Total=1260 [2018-09-14 15:51:31,610 INFO L87 Difference]: Start difference. First operand 136 states and 152 transitions. Second operand 29 states. [2018-09-14 15:51:32,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:32,027 INFO L93 Difference]: Finished difference Result 270 states and 301 transitions. [2018-09-14 15:51:32,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-14 15:51:32,028 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 75 [2018-09-14 15:51:32,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:32,030 INFO L225 Difference]: With dead ends: 270 [2018-09-14 15:51:32,030 INFO L226 Difference]: Without dead ends: 254 [2018-09-14 15:51:32,032 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 286 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 156 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=512, Invalid=820, Unknown=0, NotChecked=0, Total=1332 [2018-09-14 15:51:32,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-09-14 15:51:32,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 174. [2018-09-14 15:51:32,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-09-14 15:51:32,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 195 transitions. [2018-09-14 15:51:32,037 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 195 transitions. Word has length 75 [2018-09-14 15:51:32,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:32,038 INFO L480 AbstractCegarLoop]: Abstraction has 174 states and 195 transitions. [2018-09-14 15:51:32,038 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-09-14 15:51:32,038 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 195 transitions. [2018-09-14 15:51:32,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-09-14 15:51:32,039 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:32,040 INFO L376 BasicCegarLoop]: trace histogram [21, 21, 20, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:32,040 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:32,040 INFO L82 PathProgramCache]: Analyzing trace with hash 1143150669, now seen corresponding path program 10 times [2018-09-14 15:51:32,040 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:32,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:32,041 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:32,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:32,041 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:32,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:32,476 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 0 proven. 675 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:32,477 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:32,477 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:32,485 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:32,485 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:32,537 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:32,538 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:32,540 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:32,648 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 0 proven. 675 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:32,649 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:33,460 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 0 proven. 675 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:33,479 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:33,480 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:33,496 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:33,496 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:33,559 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:33,559 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:33,563 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:33,631 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 0 proven. 675 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:33,632 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:33,654 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 0 proven. 675 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:33,655 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:33,655 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 58 [2018-09-14 15:51:33,656 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:33,656 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-09-14 15:51:33,656 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-09-14 15:51:33,657 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1441, Invalid=1865, Unknown=0, NotChecked=0, Total=3306 [2018-09-14 15:51:33,657 INFO L87 Difference]: Start difference. First operand 174 states and 195 transitions. Second operand 30 states. [2018-09-14 15:51:33,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:33,963 INFO L93 Difference]: Finished difference Result 267 states and 294 transitions. [2018-09-14 15:51:33,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-09-14 15:51:33,964 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 93 [2018-09-14 15:51:33,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:33,967 INFO L225 Difference]: With dead ends: 267 [2018-09-14 15:51:33,967 INFO L226 Difference]: Without dead ends: 261 [2018-09-14 15:51:33,969 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 401 GetRequests, 342 SyntacticMatches, 2 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 256 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1447, Invalid=1975, Unknown=0, NotChecked=0, Total=3422 [2018-09-14 15:51:33,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states. [2018-09-14 15:51:33,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 181. [2018-09-14 15:51:33,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-09-14 15:51:33,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 203 transitions. [2018-09-14 15:51:33,974 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 203 transitions. Word has length 93 [2018-09-14 15:51:33,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:33,974 INFO L480 AbstractCegarLoop]: Abstraction has 181 states and 203 transitions. [2018-09-14 15:51:33,974 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-09-14 15:51:33,975 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 203 transitions. [2018-09-14 15:51:33,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-09-14 15:51:33,976 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:33,976 INFO L376 BasicCegarLoop]: trace histogram [22, 22, 21, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:33,976 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:33,977 INFO L82 PathProgramCache]: Analyzing trace with hash 492467246, now seen corresponding path program 11 times [2018-09-14 15:51:33,977 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:33,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:33,977 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:33,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:33,978 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:33,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:34,407 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 0 proven. 738 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:34,407 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:34,407 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:34,416 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:34,417 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:34,465 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-09-14 15:51:34,465 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:34,468 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:34,510 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 0 proven. 738 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:34,511 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:35,834 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 0 proven. 738 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:35,855 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:35,855 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:35,871 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:35,871 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:36,074 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-09-14 15:51:36,075 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:36,081 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:36,136 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 0 proven. 738 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:36,136 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:36,160 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 0 proven. 738 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:36,163 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:36,164 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 60 [2018-09-14 15:51:36,164 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:36,165 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-14 15:51:36,165 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-14 15:51:36,166 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1550, Invalid=1990, Unknown=0, NotChecked=0, Total=3540 [2018-09-14 15:51:36,166 INFO L87 Difference]: Start difference. First operand 181 states and 203 transitions. Second operand 31 states. [2018-09-14 15:51:36,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:36,759 INFO L93 Difference]: Finished difference Result 274 states and 302 transitions. [2018-09-14 15:51:36,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-09-14 15:51:36,759 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 96 [2018-09-14 15:51:36,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:36,761 INFO L225 Difference]: With dead ends: 274 [2018-09-14 15:51:36,761 INFO L226 Difference]: Without dead ends: 268 [2018-09-14 15:51:36,763 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 414 GetRequests, 353 SyntacticMatches, 2 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 266 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1556, Invalid=2104, Unknown=0, NotChecked=0, Total=3660 [2018-09-14 15:51:36,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2018-09-14 15:51:36,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 188. [2018-09-14 15:51:36,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-09-14 15:51:36,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 211 transitions. [2018-09-14 15:51:36,768 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 211 transitions. Word has length 96 [2018-09-14 15:51:36,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:36,769 INFO L480 AbstractCegarLoop]: Abstraction has 188 states and 211 transitions. [2018-09-14 15:51:36,769 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-14 15:51:36,769 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 211 transitions. [2018-09-14 15:51:36,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-14 15:51:36,770 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:36,770 INFO L376 BasicCegarLoop]: trace histogram [23, 23, 22, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:36,770 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:36,771 INFO L82 PathProgramCache]: Analyzing trace with hash -829980499, now seen corresponding path program 12 times [2018-09-14 15:51:36,771 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:36,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:36,772 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:36,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:36,772 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:36,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:37,306 INFO L134 CoverageAnalysis]: Checked inductivity of 804 backedges. 0 proven. 804 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:37,306 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:37,307 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:37,314 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:37,315 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:37,344 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-09-14 15:51:37,344 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:37,346 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:37,685 INFO L134 CoverageAnalysis]: Checked inductivity of 804 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 759 trivial. 0 not checked. [2018-09-14 15:51:37,686 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:37,896 INFO L134 CoverageAnalysis]: Checked inductivity of 804 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 759 trivial. 0 not checked. [2018-09-14 15:51:37,916 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:37,916 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:37,932 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:51:37,933 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:51:38,038 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-09-14 15:51:38,038 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:38,042 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:38,091 INFO L134 CoverageAnalysis]: Checked inductivity of 804 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 759 trivial. 0 not checked. [2018-09-14 15:51:38,092 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:38,124 INFO L134 CoverageAnalysis]: Checked inductivity of 804 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 759 trivial. 0 not checked. [2018-09-14 15:51:38,126 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:38,126 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 10, 10, 10, 10] total 46 [2018-09-14 15:51:38,126 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:38,126 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-14 15:51:38,127 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-14 15:51:38,128 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=871, Invalid=1199, Unknown=0, NotChecked=0, Total=2070 [2018-09-14 15:51:38,128 INFO L87 Difference]: Start difference. First operand 188 states and 211 transitions. Second operand 38 states. [2018-09-14 15:51:38,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:38,584 INFO L93 Difference]: Finished difference Result 365 states and 406 transitions. [2018-09-14 15:51:38,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-09-14 15:51:38,584 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 99 [2018-09-14 15:51:38,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:38,587 INFO L225 Difference]: With dead ends: 365 [2018-09-14 15:51:38,588 INFO L226 Difference]: Without dead ends: 347 [2018-09-14 15:51:38,590 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 427 GetRequests, 380 SyntacticMatches, 2 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=877, Invalid=1285, Unknown=0, NotChecked=0, Total=2162 [2018-09-14 15:51:38,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-09-14 15:51:38,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 233. [2018-09-14 15:51:38,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-09-14 15:51:38,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 262 transitions. [2018-09-14 15:51:38,596 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 262 transitions. Word has length 99 [2018-09-14 15:51:38,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:38,596 INFO L480 AbstractCegarLoop]: Abstraction has 233 states and 262 transitions. [2018-09-14 15:51:38,596 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-14 15:51:38,596 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 262 transitions. [2018-09-14 15:51:38,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-09-14 15:51:38,598 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:38,598 INFO L376 BasicCegarLoop]: trace histogram [29, 29, 28, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:38,598 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:38,598 INFO L82 PathProgramCache]: Analyzing trace with hash -612030252, now seen corresponding path program 13 times [2018-09-14 15:51:38,599 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:38,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:38,599 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:38,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:38,600 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:38,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:39,762 INFO L134 CoverageAnalysis]: Checked inductivity of 1281 backedges. 0 proven. 1281 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:39,762 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:39,762 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:39,772 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:39,772 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:39,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:39,808 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:39,883 INFO L134 CoverageAnalysis]: Checked inductivity of 1281 backedges. 0 proven. 1281 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:39,883 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:42,848 INFO L134 CoverageAnalysis]: Checked inductivity of 1281 backedges. 0 proven. 1281 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:42,879 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:42,879 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:42,898 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:42,898 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:51:42,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:42,984 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:43,036 INFO L134 CoverageAnalysis]: Checked inductivity of 1281 backedges. 0 proven. 1281 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:43,037 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:43,091 INFO L134 CoverageAnalysis]: Checked inductivity of 1281 backedges. 0 proven. 1281 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:43,092 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:43,093 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 76 [2018-09-14 15:51:43,093 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:43,093 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-09-14 15:51:43,093 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-09-14 15:51:43,095 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2566, Invalid=3134, Unknown=0, NotChecked=0, Total=5700 [2018-09-14 15:51:43,095 INFO L87 Difference]: Start difference. First operand 233 states and 262 transitions. Second operand 39 states. [2018-09-14 15:51:43,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:43,553 INFO L93 Difference]: Finished difference Result 351 states and 387 transitions. [2018-09-14 15:51:43,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-14 15:51:43,554 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 120 [2018-09-14 15:51:43,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:43,556 INFO L225 Difference]: With dead ends: 351 [2018-09-14 15:51:43,556 INFO L226 Difference]: Without dead ends: 345 [2018-09-14 15:51:43,558 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 518 GetRequests, 441 SyntacticMatches, 2 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 346 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=2572, Invalid=3280, Unknown=0, NotChecked=0, Total=5852 [2018-09-14 15:51:43,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states. [2018-09-14 15:51:43,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 240. [2018-09-14 15:51:43,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240 states. [2018-09-14 15:51:43,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 270 transitions. [2018-09-14 15:51:43,564 INFO L78 Accepts]: Start accepts. Automaton has 240 states and 270 transitions. Word has length 120 [2018-09-14 15:51:43,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:43,564 INFO L480 AbstractCegarLoop]: Abstraction has 240 states and 270 transitions. [2018-09-14 15:51:43,564 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-09-14 15:51:43,565 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 270 transitions. [2018-09-14 15:51:43,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-09-14 15:51:43,566 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:43,566 INFO L376 BasicCegarLoop]: trace histogram [30, 30, 29, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:43,566 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:43,567 INFO L82 PathProgramCache]: Analyzing trace with hash -314283949, now seen corresponding path program 14 times [2018-09-14 15:51:43,567 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:43,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:43,568 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:51:43,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:43,568 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:43,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:44,450 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 0 proven. 1368 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:44,450 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:44,450 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:44,457 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:44,458 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:44,499 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:44,500 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:44,502 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:44,550 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 0 proven. 1368 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:44,550 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:46,438 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 0 proven. 1368 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:46,459 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:46,459 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:46,474 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:51:46,474 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:46,563 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:51:46,563 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:46,569 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:46,633 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 0 proven. 1368 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:46,633 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:46,663 INFO L134 CoverageAnalysis]: Checked inductivity of 1368 backedges. 0 proven. 1368 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:46,665 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:46,665 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 78 [2018-09-14 15:51:46,665 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:46,666 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-09-14 15:51:46,666 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-09-14 15:51:46,668 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2711, Invalid=3295, Unknown=0, NotChecked=0, Total=6006 [2018-09-14 15:51:46,669 INFO L87 Difference]: Start difference. First operand 240 states and 270 transitions. Second operand 40 states. [2018-09-14 15:51:47,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:47,144 INFO L93 Difference]: Finished difference Result 358 states and 395 transitions. [2018-09-14 15:51:47,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-09-14 15:51:47,145 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 123 [2018-09-14 15:51:47,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:47,148 INFO L225 Difference]: With dead ends: 358 [2018-09-14 15:51:47,148 INFO L226 Difference]: Without dead ends: 352 [2018-09-14 15:51:47,150 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 531 GetRequests, 452 SyntacticMatches, 2 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 356 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=2717, Invalid=3445, Unknown=0, NotChecked=0, Total=6162 [2018-09-14 15:51:47,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2018-09-14 15:51:47,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 247. [2018-09-14 15:51:47,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-09-14 15:51:47,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 278 transitions. [2018-09-14 15:51:47,157 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 278 transitions. Word has length 123 [2018-09-14 15:51:47,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:47,157 INFO L480 AbstractCegarLoop]: Abstraction has 247 states and 278 transitions. [2018-09-14 15:51:47,157 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-09-14 15:51:47,157 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 278 transitions. [2018-09-14 15:51:47,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-09-14 15:51:47,159 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:47,159 INFO L376 BasicCegarLoop]: trace histogram [31, 31, 30, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:47,159 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:47,160 INFO L82 PathProgramCache]: Analyzing trace with hash 738362484, now seen corresponding path program 15 times [2018-09-14 15:51:47,160 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:47,161 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:47,161 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:47,161 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:47,161 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:47,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:48,086 INFO L134 CoverageAnalysis]: Checked inductivity of 1458 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:48,087 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:48,087 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:48,094 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:48,094 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:48,125 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-09-14 15:51:48,126 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:48,128 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:48,412 INFO L134 CoverageAnalysis]: Checked inductivity of 1458 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 1395 trivial. 0 not checked. [2018-09-14 15:51:48,412 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:48,708 INFO L134 CoverageAnalysis]: Checked inductivity of 1458 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 1395 trivial. 0 not checked. [2018-09-14 15:51:48,728 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:48,728 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:48,745 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:51:48,745 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:51:48,816 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-09-14 15:51:48,817 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:48,821 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:48,854 INFO L134 CoverageAnalysis]: Checked inductivity of 1458 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 1395 trivial. 0 not checked. [2018-09-14 15:51:48,854 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:48,868 INFO L134 CoverageAnalysis]: Checked inductivity of 1458 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 1395 trivial. 0 not checked. [2018-09-14 15:51:48,869 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:48,870 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 11, 11, 11, 11] total 57 [2018-09-14 15:51:48,870 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:48,870 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-09-14 15:51:48,871 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-09-14 15:51:48,872 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1388, Invalid=1804, Unknown=0, NotChecked=0, Total=3192 [2018-09-14 15:51:48,872 INFO L87 Difference]: Start difference. First operand 247 states and 278 transitions. Second operand 48 states. [2018-09-14 15:51:50,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:50,722 INFO L93 Difference]: Finished difference Result 473 states and 525 transitions. [2018-09-14 15:51:50,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-09-14 15:51:50,722 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 126 [2018-09-14 15:51:50,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:50,726 INFO L225 Difference]: With dead ends: 473 [2018-09-14 15:51:50,726 INFO L226 Difference]: Without dead ends: 453 [2018-09-14 15:51:50,727 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 544 GetRequests, 486 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 274 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1394, Invalid=1912, Unknown=0, NotChecked=0, Total=3306 [2018-09-14 15:51:50,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 453 states. [2018-09-14 15:51:50,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 453 to 299. [2018-09-14 15:51:50,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 299 states. [2018-09-14 15:51:50,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 337 transitions. [2018-09-14 15:51:50,734 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 337 transitions. Word has length 126 [2018-09-14 15:51:50,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:50,734 INFO L480 AbstractCegarLoop]: Abstraction has 299 states and 337 transitions. [2018-09-14 15:51:50,734 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-09-14 15:51:50,735 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 337 transitions. [2018-09-14 15:51:50,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2018-09-14 15:51:50,736 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:50,736 INFO L376 BasicCegarLoop]: trace histogram [38, 38, 37, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:50,737 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:50,737 INFO L82 PathProgramCache]: Analyzing trace with hash -1973406962, now seen corresponding path program 16 times [2018-09-14 15:51:50,737 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:50,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:50,738 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:50,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:50,738 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:50,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:51,639 INFO L134 CoverageAnalysis]: Checked inductivity of 2193 backedges. 0 proven. 2193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:51,640 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:51,640 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:51,647 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:51,647 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:51,697 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:51,697 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:51,700 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:51,796 INFO L134 CoverageAnalysis]: Checked inductivity of 2193 backedges. 0 proven. 2193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:51,797 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:54,155 INFO L134 CoverageAnalysis]: Checked inductivity of 2193 backedges. 0 proven. 2193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:54,176 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:54,176 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:54,191 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:51:54,191 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:51:54,296 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:51:54,296 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:54,304 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:54,393 INFO L134 CoverageAnalysis]: Checked inductivity of 2193 backedges. 0 proven. 2193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:54,394 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:54,470 INFO L134 CoverageAnalysis]: Checked inductivity of 2193 backedges. 0 proven. 2193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:54,472 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:51:54,472 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49, 49, 49] total 96 [2018-09-14 15:51:54,472 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:51:54,472 INFO L459 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-09-14 15:51:54,473 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-09-14 15:51:54,474 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=4196, Invalid=4924, Unknown=0, NotChecked=0, Total=9120 [2018-09-14 15:51:54,474 INFO L87 Difference]: Start difference. First operand 299 states and 337 transitions. Second operand 49 states. [2018-09-14 15:51:55,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:51:55,198 INFO L93 Difference]: Finished difference Result 445 states and 491 transitions. [2018-09-14 15:51:55,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-09-14 15:51:55,198 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 150 [2018-09-14 15:51:55,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:51:55,202 INFO L225 Difference]: With dead ends: 445 [2018-09-14 15:51:55,202 INFO L226 Difference]: Without dead ends: 439 [2018-09-14 15:51:55,204 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 648 GetRequests, 551 SyntacticMatches, 2 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 446 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=4202, Invalid=5110, Unknown=0, NotChecked=0, Total=9312 [2018-09-14 15:51:55,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states. [2018-09-14 15:51:55,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 306. [2018-09-14 15:51:55,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 306 states. [2018-09-14 15:51:55,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 306 states to 306 states and 345 transitions. [2018-09-14 15:51:55,210 INFO L78 Accepts]: Start accepts. Automaton has 306 states and 345 transitions. Word has length 150 [2018-09-14 15:51:55,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:51:55,211 INFO L480 AbstractCegarLoop]: Abstraction has 306 states and 345 transitions. [2018-09-14 15:51:55,211 INFO L481 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-09-14 15:51:55,211 INFO L276 IsEmpty]: Start isEmpty. Operand 306 states and 345 transitions. [2018-09-14 15:51:55,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2018-09-14 15:51:55,213 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:51:55,213 INFO L376 BasicCegarLoop]: trace histogram [39, 39, 38, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:51:55,213 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:51:55,213 INFO L82 PathProgramCache]: Analyzing trace with hash -324892083, now seen corresponding path program 17 times [2018-09-14 15:51:55,214 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:51:55,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:55,214 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:51:55,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:51:55,214 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:51:55,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:51:56,486 INFO L134 CoverageAnalysis]: Checked inductivity of 2307 backedges. 0 proven. 2307 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:56,487 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:56,487 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:51:56,495 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:56,495 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:56,581 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 39 check-sat command(s) [2018-09-14 15:51:56,581 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:51:56,586 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:51:56,676 INFO L134 CoverageAnalysis]: Checked inductivity of 2307 backedges. 0 proven. 2307 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:56,676 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:51:59,518 INFO L134 CoverageAnalysis]: Checked inductivity of 2307 backedges. 0 proven. 2307 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:51:59,540 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:51:59,540 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:51:59,556 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:51:59,556 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:51:59,998 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 39 check-sat command(s) [2018-09-14 15:51:59,999 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:00,004 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:00,106 INFO L134 CoverageAnalysis]: Checked inductivity of 2307 backedges. 0 proven. 2307 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:00,106 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:00,140 INFO L134 CoverageAnalysis]: Checked inductivity of 2307 backedges. 0 proven. 2307 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:00,141 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:00,141 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 98 [2018-09-14 15:52:00,141 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:00,142 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-09-14 15:52:00,143 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-09-14 15:52:00,143 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=4381, Invalid=5125, Unknown=0, NotChecked=0, Total=9506 [2018-09-14 15:52:00,144 INFO L87 Difference]: Start difference. First operand 306 states and 345 transitions. Second operand 50 states. [2018-09-14 15:52:00,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:00,850 INFO L93 Difference]: Finished difference Result 452 states and 499 transitions. [2018-09-14 15:52:00,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-09-14 15:52:00,851 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 153 [2018-09-14 15:52:00,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:00,854 INFO L225 Difference]: With dead ends: 452 [2018-09-14 15:52:00,854 INFO L226 Difference]: Without dead ends: 446 [2018-09-14 15:52:00,855 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 661 GetRequests, 562 SyntacticMatches, 2 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 456 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=4387, Invalid=5315, Unknown=0, NotChecked=0, Total=9702 [2018-09-14 15:52:00,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 446 states. [2018-09-14 15:52:00,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 446 to 313. [2018-09-14 15:52:00,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 313 states. [2018-09-14 15:52:00,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 313 states to 313 states and 353 transitions. [2018-09-14 15:52:00,861 INFO L78 Accepts]: Start accepts. Automaton has 313 states and 353 transitions. Word has length 153 [2018-09-14 15:52:00,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:00,862 INFO L480 AbstractCegarLoop]: Abstraction has 313 states and 353 transitions. [2018-09-14 15:52:00,862 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-09-14 15:52:00,862 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 353 transitions. [2018-09-14 15:52:00,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2018-09-14 15:52:00,864 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:00,864 INFO L376 BasicCegarLoop]: trace histogram [40, 40, 39, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:00,864 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:00,864 INFO L82 PathProgramCache]: Analyzing trace with hash 1925805742, now seen corresponding path program 18 times [2018-09-14 15:52:00,864 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:00,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:00,865 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:00,865 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:00,865 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:00,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:01,833 INFO L134 CoverageAnalysis]: Checked inductivity of 2424 backedges. 0 proven. 2424 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:01,833 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:01,834 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:01,842 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:52:01,842 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:52:01,879 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-09-14 15:52:01,880 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:01,883 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:02,209 INFO L134 CoverageAnalysis]: Checked inductivity of 2424 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 2340 trivial. 0 not checked. [2018-09-14 15:52:02,210 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:02,689 INFO L134 CoverageAnalysis]: Checked inductivity of 2424 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 2340 trivial. 0 not checked. [2018-09-14 15:52:02,719 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:02,719 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:02,741 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:52:02,741 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:52:02,896 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-09-14 15:52:02,896 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:02,902 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:03,033 INFO L134 CoverageAnalysis]: Checked inductivity of 2424 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 2340 trivial. 0 not checked. [2018-09-14 15:52:03,033 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:03,046 INFO L134 CoverageAnalysis]: Checked inductivity of 2424 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 2340 trivial. 0 not checked. [2018-09-14 15:52:03,048 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:03,048 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 12, 12, 12, 12] total 69 [2018-09-14 15:52:03,048 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:03,048 INFO L459 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-09-14 15:52:03,049 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-09-14 15:52:03,049 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2090, Invalid=2602, Unknown=0, NotChecked=0, Total=4692 [2018-09-14 15:52:03,050 INFO L87 Difference]: Start difference. First operand 313 states and 353 transitions. Second operand 59 states. [2018-09-14 15:52:04,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:04,085 INFO L93 Difference]: Finished difference Result 594 states and 658 transitions. [2018-09-14 15:52:04,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-09-14 15:52:04,087 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 156 [2018-09-14 15:52:04,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:04,089 INFO L225 Difference]: With dead ends: 594 [2018-09-14 15:52:04,089 INFO L226 Difference]: Without dead ends: 572 [2018-09-14 15:52:04,091 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 674 GetRequests, 604 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 342 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2096, Invalid=2734, Unknown=0, NotChecked=0, Total=4830 [2018-09-14 15:52:04,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2018-09-14 15:52:04,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 372. [2018-09-14 15:52:04,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 372 states. [2018-09-14 15:52:04,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 420 transitions. [2018-09-14 15:52:04,098 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 420 transitions. Word has length 156 [2018-09-14 15:52:04,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:04,098 INFO L480 AbstractCegarLoop]: Abstraction has 372 states and 420 transitions. [2018-09-14 15:52:04,098 INFO L481 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-09-14 15:52:04,099 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 420 transitions. [2018-09-14 15:52:04,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2018-09-14 15:52:04,100 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:04,101 INFO L376 BasicCegarLoop]: trace histogram [48, 48, 47, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:04,101 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:04,101 INFO L82 PathProgramCache]: Analyzing trace with hash -252635693, now seen corresponding path program 19 times [2018-09-14 15:52:04,101 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:04,102 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:04,102 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:04,102 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:04,102 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:04,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:05,478 INFO L134 CoverageAnalysis]: Checked inductivity of 3492 backedges. 0 proven. 3492 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:05,478 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:05,479 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:05,485 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:05,486 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:05,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:05,552 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:06,280 INFO L134 CoverageAnalysis]: Checked inductivity of 3492 backedges. 0 proven. 3492 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:06,281 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:10,465 INFO L134 CoverageAnalysis]: Checked inductivity of 3492 backedges. 0 proven. 3492 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:10,486 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:10,486 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:10,502 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:10,502 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:10,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:10,632 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:10,727 INFO L134 CoverageAnalysis]: Checked inductivity of 3492 backedges. 0 proven. 3492 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:10,727 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:10,823 INFO L134 CoverageAnalysis]: Checked inductivity of 3492 backedges. 0 proven. 3492 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:10,826 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:10,827 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 60, 60, 60, 60] total 118 [2018-09-14 15:52:10,827 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:10,828 INFO L459 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-09-14 15:52:10,828 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-09-14 15:52:10,829 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=6451, Invalid=7355, Unknown=0, NotChecked=0, Total=13806 [2018-09-14 15:52:10,829 INFO L87 Difference]: Start difference. First operand 372 states and 420 transitions. Second operand 60 states. [2018-09-14 15:52:11,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:11,929 INFO L93 Difference]: Finished difference Result 549 states and 606 transitions. [2018-09-14 15:52:11,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-09-14 15:52:11,930 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 183 [2018-09-14 15:52:11,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:11,933 INFO L225 Difference]: With dead ends: 549 [2018-09-14 15:52:11,934 INFO L226 Difference]: Without dead ends: 543 [2018-09-14 15:52:11,935 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 791 GetRequests, 672 SyntacticMatches, 2 SemanticMatches, 117 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 556 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=6457, Invalid=7585, Unknown=0, NotChecked=0, Total=14042 [2018-09-14 15:52:11,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states. [2018-09-14 15:52:11,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 379. [2018-09-14 15:52:11,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 379 states. [2018-09-14 15:52:11,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 379 states to 379 states and 428 transitions. [2018-09-14 15:52:11,942 INFO L78 Accepts]: Start accepts. Automaton has 379 states and 428 transitions. Word has length 183 [2018-09-14 15:52:11,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:11,943 INFO L480 AbstractCegarLoop]: Abstraction has 379 states and 428 transitions. [2018-09-14 15:52:11,943 INFO L481 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-09-14 15:52:11,943 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 428 transitions. [2018-09-14 15:52:11,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2018-09-14 15:52:11,945 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:11,945 INFO L376 BasicCegarLoop]: trace histogram [49, 49, 48, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:11,945 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:11,945 INFO L82 PathProgramCache]: Analyzing trace with hash 895935092, now seen corresponding path program 20 times [2018-09-14 15:52:11,945 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:11,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:11,946 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:11,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:11,946 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:11,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:13,494 INFO L134 CoverageAnalysis]: Checked inductivity of 3636 backedges. 0 proven. 3636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:13,494 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:13,494 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:13,502 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:52:13,502 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:13,562 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:52:13,562 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:13,566 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:14,072 INFO L134 CoverageAnalysis]: Checked inductivity of 3636 backedges. 0 proven. 3636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:14,072 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:18,254 INFO L134 CoverageAnalysis]: Checked inductivity of 3636 backedges. 0 proven. 3636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:18,274 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:18,274 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:18,290 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:52:18,290 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:18,418 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:52:18,419 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:18,427 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:18,704 INFO L134 CoverageAnalysis]: Checked inductivity of 3636 backedges. 0 proven. 3636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:18,704 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:18,793 INFO L134 CoverageAnalysis]: Checked inductivity of 3636 backedges. 0 proven. 3636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:18,794 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:18,795 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61, 61, 61, 61] total 120 [2018-09-14 15:52:18,795 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:18,795 INFO L459 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-09-14 15:52:18,796 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-09-14 15:52:18,796 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=6680, Invalid=7600, Unknown=0, NotChecked=0, Total=14280 [2018-09-14 15:52:18,796 INFO L87 Difference]: Start difference. First operand 379 states and 428 transitions. Second operand 61 states. [2018-09-14 15:52:20,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:20,840 INFO L93 Difference]: Finished difference Result 556 states and 614 transitions. [2018-09-14 15:52:20,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-09-14 15:52:20,840 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 186 [2018-09-14 15:52:20,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:20,844 INFO L225 Difference]: With dead ends: 556 [2018-09-14 15:52:20,844 INFO L226 Difference]: Without dead ends: 550 [2018-09-14 15:52:20,845 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 804 GetRequests, 683 SyntacticMatches, 2 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 566 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=6686, Invalid=7834, Unknown=0, NotChecked=0, Total=14520 [2018-09-14 15:52:20,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 550 states. [2018-09-14 15:52:20,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 550 to 386. [2018-09-14 15:52:20,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 386 states. [2018-09-14 15:52:20,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 386 states and 436 transitions. [2018-09-14 15:52:20,854 INFO L78 Accepts]: Start accepts. Automaton has 386 states and 436 transitions. Word has length 186 [2018-09-14 15:52:20,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:20,855 INFO L480 AbstractCegarLoop]: Abstraction has 386 states and 436 transitions. [2018-09-14 15:52:20,855 INFO L481 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-09-14 15:52:20,855 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 436 transitions. [2018-09-14 15:52:20,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2018-09-14 15:52:20,856 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:20,856 INFO L376 BasicCegarLoop]: trace histogram [50, 50, 49, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:20,857 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:20,857 INFO L82 PathProgramCache]: Analyzing trace with hash -36256205, now seen corresponding path program 21 times [2018-09-14 15:52:20,857 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:20,858 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:20,858 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:20,858 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:20,858 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:20,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:22,881 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 3783 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:22,881 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:22,881 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:22,892 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:52:22,892 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:52:23,038 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-14 15:52:23,039 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:23,041 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:23,492 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-09-14 15:52:23,492 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:24,029 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-09-14 15:52:24,049 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:24,049 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:24,080 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:52:24,080 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:52:24,217 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-14 15:52:24,217 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:24,223 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:24,600 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-09-14 15:52:24,600 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:24,633 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-09-14 15:52:24,634 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:24,635 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 13, 13, 13, 13] total 82 [2018-09-14 15:52:24,635 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:24,635 INFO L459 AbstractCegarLoop]: Interpolant automaton has 71 states [2018-09-14 15:52:24,636 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2018-09-14 15:52:24,636 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3013, Invalid=3629, Unknown=0, NotChecked=0, Total=6642 [2018-09-14 15:52:24,636 INFO L87 Difference]: Start difference. First operand 386 states and 436 transitions. Second operand 71 states. [2018-09-14 15:52:26,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:26,626 INFO L93 Difference]: Finished difference Result 728 states and 805 transitions. [2018-09-14 15:52:26,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-09-14 15:52:26,626 INFO L78 Accepts]: Start accepts. Automaton has 71 states. Word has length 189 [2018-09-14 15:52:26,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:26,629 INFO L225 Difference]: With dead ends: 728 [2018-09-14 15:52:26,629 INFO L226 Difference]: Without dead ends: 704 [2018-09-14 15:52:26,630 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 817 GetRequests, 734 SyntacticMatches, 2 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 416 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=3019, Invalid=3787, Unknown=0, NotChecked=0, Total=6806 [2018-09-14 15:52:26,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 704 states. [2018-09-14 15:52:26,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 704 to 452. [2018-09-14 15:52:26,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 452 states. [2018-09-14 15:52:26,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 452 states to 452 states and 511 transitions. [2018-09-14 15:52:26,639 INFO L78 Accepts]: Start accepts. Automaton has 452 states and 511 transitions. Word has length 189 [2018-09-14 15:52:26,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:26,639 INFO L480 AbstractCegarLoop]: Abstraction has 452 states and 511 transitions. [2018-09-14 15:52:26,640 INFO L481 AbstractCegarLoop]: Interpolant automaton has 71 states. [2018-09-14 15:52:26,640 INFO L276 IsEmpty]: Start isEmpty. Operand 452 states and 511 transitions. [2018-09-14 15:52:26,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2018-09-14 15:52:26,641 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:26,641 INFO L376 BasicCegarLoop]: trace histogram [59, 59, 58, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:26,642 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:26,642 INFO L82 PathProgramCache]: Analyzing trace with hash -518064979, now seen corresponding path program 22 times [2018-09-14 15:52:26,642 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:26,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:26,643 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:26,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:26,643 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:26,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:28,574 INFO L134 CoverageAnalysis]: Checked inductivity of 5268 backedges. 0 proven. 5268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:28,574 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:28,574 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:28,581 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:52:28,582 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:52:28,653 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:52:28,653 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:28,657 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:28,747 INFO L134 CoverageAnalysis]: Checked inductivity of 5268 backedges. 0 proven. 5268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:28,748 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:34,152 INFO L134 CoverageAnalysis]: Checked inductivity of 5268 backedges. 0 proven. 5268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:34,173 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:34,173 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:34,189 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:52:34,189 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:52:34,348 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:52:34,349 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:34,360 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:34,835 INFO L134 CoverageAnalysis]: Checked inductivity of 5268 backedges. 0 proven. 5268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:34,835 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:34,878 INFO L134 CoverageAnalysis]: Checked inductivity of 5268 backedges. 0 proven. 5268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:34,880 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:34,880 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [72, 72, 72, 72, 72] total 142 [2018-09-14 15:52:34,880 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:34,881 INFO L459 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-09-14 15:52:34,882 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-09-14 15:52:34,883 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=9463, Invalid=10559, Unknown=0, NotChecked=0, Total=20022 [2018-09-14 15:52:34,884 INFO L87 Difference]: Start difference. First operand 452 states and 511 transitions. Second operand 72 states. [2018-09-14 15:52:36,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:36,646 INFO L93 Difference]: Finished difference Result 663 states and 732 transitions. [2018-09-14 15:52:36,646 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2018-09-14 15:52:36,646 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 219 [2018-09-14 15:52:36,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:36,650 INFO L225 Difference]: With dead ends: 663 [2018-09-14 15:52:36,650 INFO L226 Difference]: Without dead ends: 657 [2018-09-14 15:52:36,652 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 947 GetRequests, 804 SyntacticMatches, 2 SemanticMatches, 141 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 676 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=9469, Invalid=10837, Unknown=0, NotChecked=0, Total=20306 [2018-09-14 15:52:36,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 657 states. [2018-09-14 15:52:36,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 657 to 459. [2018-09-14 15:52:36,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 459 states. [2018-09-14 15:52:36,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 459 states to 459 states and 519 transitions. [2018-09-14 15:52:36,661 INFO L78 Accepts]: Start accepts. Automaton has 459 states and 519 transitions. Word has length 219 [2018-09-14 15:52:36,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:36,662 INFO L480 AbstractCegarLoop]: Abstraction has 459 states and 519 transitions. [2018-09-14 15:52:36,662 INFO L481 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-09-14 15:52:36,662 INFO L276 IsEmpty]: Start isEmpty. Operand 459 states and 519 transitions. [2018-09-14 15:52:36,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2018-09-14 15:52:36,663 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:36,664 INFO L376 BasicCegarLoop]: trace histogram [60, 60, 59, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:36,664 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:36,664 INFO L82 PathProgramCache]: Analyzing trace with hash -399850290, now seen corresponding path program 23 times [2018-09-14 15:52:36,664 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:36,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:36,665 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:36,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:36,665 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:36,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:39,056 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 0 proven. 5445 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:39,057 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:39,057 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:39,065 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:52:39,065 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:39,196 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 60 check-sat command(s) [2018-09-14 15:52:39,196 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:39,200 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:39,360 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 0 proven. 5445 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:39,361 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:44,853 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 0 proven. 5445 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:44,872 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:44,873 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:44,888 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:52:44,888 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:52:45,845 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 60 check-sat command(s) [2018-09-14 15:52:45,846 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:45,855 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:46,171 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 0 proven. 5445 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:46,171 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:46,281 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 0 proven. 5445 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:46,282 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:46,283 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [73, 73, 73, 73, 73] total 144 [2018-09-14 15:52:46,283 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:46,283 INFO L459 AbstractCegarLoop]: Interpolant automaton has 73 states [2018-09-14 15:52:46,285 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2018-09-14 15:52:46,286 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=9740, Invalid=10852, Unknown=0, NotChecked=0, Total=20592 [2018-09-14 15:52:46,286 INFO L87 Difference]: Start difference. First operand 459 states and 519 transitions. Second operand 73 states. [2018-09-14 15:52:48,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:48,301 INFO L93 Difference]: Finished difference Result 670 states and 740 transitions. [2018-09-14 15:52:48,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2018-09-14 15:52:48,301 INFO L78 Accepts]: Start accepts. Automaton has 73 states. Word has length 222 [2018-09-14 15:52:48,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:48,305 INFO L225 Difference]: With dead ends: 670 [2018-09-14 15:52:48,305 INFO L226 Difference]: Without dead ends: 664 [2018-09-14 15:52:48,306 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 960 GetRequests, 815 SyntacticMatches, 2 SemanticMatches, 143 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 686 ImplicationChecksByTransitivity, 8.1s TimeCoverageRelationStatistics Valid=9746, Invalid=11134, Unknown=0, NotChecked=0, Total=20880 [2018-09-14 15:52:48,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 664 states. [2018-09-14 15:52:48,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 664 to 466. [2018-09-14 15:52:48,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 466 states. [2018-09-14 15:52:48,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 466 states to 466 states and 527 transitions. [2018-09-14 15:52:48,314 INFO L78 Accepts]: Start accepts. Automaton has 466 states and 527 transitions. Word has length 222 [2018-09-14 15:52:48,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:48,315 INFO L480 AbstractCegarLoop]: Abstraction has 466 states and 527 transitions. [2018-09-14 15:52:48,315 INFO L481 AbstractCegarLoop]: Interpolant automaton has 73 states. [2018-09-14 15:52:48,315 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 527 transitions. [2018-09-14 15:52:48,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2018-09-14 15:52:48,317 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:48,317 INFO L376 BasicCegarLoop]: trace histogram [61, 61, 60, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:48,317 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:48,317 INFO L82 PathProgramCache]: Analyzing trace with hash -539233011, now seen corresponding path program 24 times [2018-09-14 15:52:48,318 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:48,318 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:48,318 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:48,318 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:48,319 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:48,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:50,477 INFO L134 CoverageAnalysis]: Checked inductivity of 5625 backedges. 0 proven. 5625 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:50,477 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:50,477 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:50,484 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:52:50,484 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:52:50,537 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-09-14 15:52:50,537 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:50,540 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:51,114 INFO L134 CoverageAnalysis]: Checked inductivity of 5625 backedges. 0 proven. 135 refuted. 0 times theorem prover too weak. 5490 trivial. 0 not checked. [2018-09-14 15:52:51,114 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:52,102 INFO L134 CoverageAnalysis]: Checked inductivity of 5625 backedges. 0 proven. 135 refuted. 0 times theorem prover too weak. 5490 trivial. 0 not checked. [2018-09-14 15:52:52,122 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:52,122 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:52:52,138 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:52:52,138 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:52:52,370 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-09-14 15:52:52,371 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:52:52,375 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:53,307 INFO L134 CoverageAnalysis]: Checked inductivity of 5625 backedges. 0 proven. 135 refuted. 0 times theorem prover too weak. 5490 trivial. 0 not checked. [2018-09-14 15:52:53,307 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:52:53,384 INFO L134 CoverageAnalysis]: Checked inductivity of 5625 backedges. 0 proven. 135 refuted. 0 times theorem prover too weak. 5490 trivial. 0 not checked. [2018-09-14 15:52:53,385 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:52:53,385 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [74, 14, 14, 14, 14] total 96 [2018-09-14 15:52:53,386 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:52:53,386 INFO L459 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-09-14 15:52:53,387 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-09-14 15:52:53,387 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=4196, Invalid=4924, Unknown=0, NotChecked=0, Total=9120 [2018-09-14 15:52:53,388 INFO L87 Difference]: Start difference. First operand 466 states and 527 transitions. Second operand 84 states. [2018-09-14 15:52:56,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:52:56,337 INFO L93 Difference]: Finished difference Result 875 states and 966 transitions. [2018-09-14 15:52:56,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2018-09-14 15:52:56,338 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 225 [2018-09-14 15:52:56,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:52:56,341 INFO L225 Difference]: With dead ends: 875 [2018-09-14 15:52:56,341 INFO L226 Difference]: Without dead ends: 849 [2018-09-14 15:52:56,341 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 973 GetRequests, 876 SyntacticMatches, 2 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 496 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=4202, Invalid=5110, Unknown=0, NotChecked=0, Total=9312 [2018-09-14 15:52:56,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 849 states. [2018-09-14 15:52:56,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 849 to 539. [2018-09-14 15:52:56,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 539 states. [2018-09-14 15:52:56,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 539 states to 539 states and 610 transitions. [2018-09-14 15:52:56,352 INFO L78 Accepts]: Start accepts. Automaton has 539 states and 610 transitions. Word has length 225 [2018-09-14 15:52:56,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:52:56,352 INFO L480 AbstractCegarLoop]: Abstraction has 539 states and 610 transitions. [2018-09-14 15:52:56,352 INFO L481 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-09-14 15:52:56,353 INFO L276 IsEmpty]: Start isEmpty. Operand 539 states and 610 transitions. [2018-09-14 15:52:56,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 259 [2018-09-14 15:52:56,354 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:52:56,355 INFO L376 BasicCegarLoop]: trace histogram [71, 71, 70, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:52:56,355 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:52:56,355 INFO L82 PathProgramCache]: Analyzing trace with hash 412573620, now seen corresponding path program 25 times [2018-09-14 15:52:56,355 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:52:56,356 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:56,356 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:52:56,356 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:52:56,356 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:52:56,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:59,302 INFO L134 CoverageAnalysis]: Checked inductivity of 7620 backedges. 0 proven. 7620 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:59,302 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:52:59,302 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:52:59,311 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:52:59,311 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:52:59,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:52:59,397 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:52:59,511 INFO L134 CoverageAnalysis]: Checked inductivity of 7620 backedges. 0 proven. 7620 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:52:59,511 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:07,037 INFO L134 CoverageAnalysis]: Checked inductivity of 7620 backedges. 0 proven. 7620 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:07,057 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:07,058 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:07,074 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:53:07,074 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:53:07,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:07,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:07,584 INFO L134 CoverageAnalysis]: Checked inductivity of 7620 backedges. 0 proven. 7620 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:07,584 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:07,724 INFO L134 CoverageAnalysis]: Checked inductivity of 7620 backedges. 0 proven. 7620 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:07,726 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:07,727 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [85, 85, 85, 85, 85] total 168 [2018-09-14 15:53:07,727 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:07,727 INFO L459 AbstractCegarLoop]: Interpolant automaton has 85 states [2018-09-14 15:53:07,728 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 85 interpolants. [2018-09-14 15:53:07,729 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=13376, Invalid=14680, Unknown=0, NotChecked=0, Total=28056 [2018-09-14 15:53:07,729 INFO L87 Difference]: Start difference. First operand 539 states and 610 transitions. Second operand 85 states. [2018-09-14 15:53:11,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:11,059 INFO L93 Difference]: Finished difference Result 787 states and 869 transitions. [2018-09-14 15:53:11,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2018-09-14 15:53:11,060 INFO L78 Accepts]: Start accepts. Automaton has 85 states. Word has length 258 [2018-09-14 15:53:11,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:11,064 INFO L225 Difference]: With dead ends: 787 [2018-09-14 15:53:11,064 INFO L226 Difference]: Without dead ends: 781 [2018-09-14 15:53:11,066 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1116 GetRequests, 947 SyntacticMatches, 2 SemanticMatches, 167 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 806 ImplicationChecksByTransitivity, 10.6s TimeCoverageRelationStatistics Valid=13382, Invalid=15010, Unknown=0, NotChecked=0, Total=28392 [2018-09-14 15:53:11,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 781 states. [2018-09-14 15:53:11,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 781 to 546. [2018-09-14 15:53:11,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 546 states. [2018-09-14 15:53:11,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 546 states to 546 states and 618 transitions. [2018-09-14 15:53:11,075 INFO L78 Accepts]: Start accepts. Automaton has 546 states and 618 transitions. Word has length 258 [2018-09-14 15:53:11,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:11,076 INFO L480 AbstractCegarLoop]: Abstraction has 546 states and 618 transitions. [2018-09-14 15:53:11,076 INFO L481 AbstractCegarLoop]: Interpolant automaton has 85 states. [2018-09-14 15:53:11,076 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 618 transitions. [2018-09-14 15:53:11,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-09-14 15:53:11,078 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:11,078 INFO L376 BasicCegarLoop]: trace histogram [72, 72, 71, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:11,079 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:11,079 INFO L82 PathProgramCache]: Analyzing trace with hash 431856755, now seen corresponding path program 26 times [2018-09-14 15:53:11,079 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:11,080 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:11,080 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:53:11,080 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:11,080 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:11,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:14,005 INFO L134 CoverageAnalysis]: Checked inductivity of 7833 backedges. 0 proven. 7833 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:14,005 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:14,005 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:14,034 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:53:14,035 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:53:14,118 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:53:14,118 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:14,122 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:14,247 INFO L134 CoverageAnalysis]: Checked inductivity of 7833 backedges. 0 proven. 7833 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:14,247 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:21,833 INFO L134 CoverageAnalysis]: Checked inductivity of 7833 backedges. 0 proven. 7833 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:21,853 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:21,853 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:21,868 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:53:21,869 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:53:22,042 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:53:22,042 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:22,052 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:22,156 INFO L134 CoverageAnalysis]: Checked inductivity of 7833 backedges. 0 proven. 7833 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:22,157 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:22,241 INFO L134 CoverageAnalysis]: Checked inductivity of 7833 backedges. 0 proven. 7833 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:22,243 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:22,243 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [86, 86, 86, 86, 86] total 170 [2018-09-14 15:53:22,243 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:22,244 INFO L459 AbstractCegarLoop]: Interpolant automaton has 86 states [2018-09-14 15:53:22,244 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2018-09-14 15:53:22,245 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=13705, Invalid=15025, Unknown=0, NotChecked=0, Total=28730 [2018-09-14 15:53:22,245 INFO L87 Difference]: Start difference. First operand 546 states and 618 transitions. Second operand 86 states. [2018-09-14 15:53:25,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:25,701 INFO L93 Difference]: Finished difference Result 794 states and 877 transitions. [2018-09-14 15:53:25,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2018-09-14 15:53:25,701 INFO L78 Accepts]: Start accepts. Automaton has 86 states. Word has length 261 [2018-09-14 15:53:25,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:25,706 INFO L225 Difference]: With dead ends: 794 [2018-09-14 15:53:25,706 INFO L226 Difference]: Without dead ends: 788 [2018-09-14 15:53:25,707 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1129 GetRequests, 958 SyntacticMatches, 2 SemanticMatches, 169 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 816 ImplicationChecksByTransitivity, 10.4s TimeCoverageRelationStatistics Valid=13711, Invalid=15359, Unknown=0, NotChecked=0, Total=29070 [2018-09-14 15:53:25,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 788 states. [2018-09-14 15:53:25,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 788 to 553. [2018-09-14 15:53:25,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 553 states. [2018-09-14 15:53:25,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 626 transitions. [2018-09-14 15:53:25,715 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 626 transitions. Word has length 261 [2018-09-14 15:53:25,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:25,716 INFO L480 AbstractCegarLoop]: Abstraction has 553 states and 626 transitions. [2018-09-14 15:53:25,716 INFO L481 AbstractCegarLoop]: Interpolant automaton has 86 states. [2018-09-14 15:53:25,716 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 626 transitions. [2018-09-14 15:53:25,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2018-09-14 15:53:25,718 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:25,718 INFO L376 BasicCegarLoop]: trace histogram [73, 73, 72, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:25,719 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:25,719 INFO L82 PathProgramCache]: Analyzing trace with hash -629886124, now seen corresponding path program 27 times [2018-09-14 15:53:25,719 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:25,720 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:25,720 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:25,720 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:25,720 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:25,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:29,055 INFO L134 CoverageAnalysis]: Checked inductivity of 8049 backedges. 0 proven. 8049 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:29,055 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:29,055 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:29,064 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:53:29,064 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:53:29,142 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-09-14 15:53:29,143 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:29,145 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:29,924 INFO L134 CoverageAnalysis]: Checked inductivity of 8049 backedges. 0 proven. 165 refuted. 0 times theorem prover too weak. 7884 trivial. 0 not checked. [2018-09-14 15:53:29,925 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:30,804 INFO L134 CoverageAnalysis]: Checked inductivity of 8049 backedges. 0 proven. 165 refuted. 0 times theorem prover too weak. 7884 trivial. 0 not checked. [2018-09-14 15:53:30,824 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:30,824 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:30,839 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-14 15:53:30,839 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-14 15:53:30,977 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-09-14 15:53:30,977 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:30,982 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:31,067 INFO L134 CoverageAnalysis]: Checked inductivity of 8049 backedges. 0 proven. 165 refuted. 0 times theorem prover too weak. 7884 trivial. 0 not checked. [2018-09-14 15:53:31,067 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:31,097 INFO L134 CoverageAnalysis]: Checked inductivity of 8049 backedges. 0 proven. 165 refuted. 0 times theorem prover too weak. 7884 trivial. 0 not checked. [2018-09-14 15:53:31,099 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:31,099 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [87, 15, 15, 15, 15] total 111 [2018-09-14 15:53:31,099 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:31,100 INFO L459 AbstractCegarLoop]: Interpolant automaton has 98 states [2018-09-14 15:53:31,101 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2018-09-14 15:53:31,101 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=5681, Invalid=6529, Unknown=0, NotChecked=0, Total=12210 [2018-09-14 15:53:31,101 INFO L87 Difference]: Start difference. First operand 553 states and 626 transitions. Second operand 98 states. [2018-09-14 15:53:34,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:34,485 INFO L93 Difference]: Finished difference Result 1035 states and 1141 transitions. [2018-09-14 15:53:34,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2018-09-14 15:53:34,485 INFO L78 Accepts]: Start accepts. Automaton has 98 states. Word has length 264 [2018-09-14 15:53:34,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:34,490 INFO L225 Difference]: With dead ends: 1035 [2018-09-14 15:53:34,490 INFO L226 Difference]: Without dead ends: 1007 [2018-09-14 15:53:34,492 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1142 GetRequests, 1030 SyntacticMatches, 2 SemanticMatches, 110 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 582 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=5687, Invalid=6745, Unknown=0, NotChecked=0, Total=12432 [2018-09-14 15:53:34,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1007 states. [2018-09-14 15:53:34,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1007 to 633. [2018-09-14 15:53:34,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 633 states. [2018-09-14 15:53:34,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 633 states to 633 states and 717 transitions. [2018-09-14 15:53:34,502 INFO L78 Accepts]: Start accepts. Automaton has 633 states and 717 transitions. Word has length 264 [2018-09-14 15:53:34,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:34,502 INFO L480 AbstractCegarLoop]: Abstraction has 633 states and 717 transitions. [2018-09-14 15:53:34,503 INFO L481 AbstractCegarLoop]: Interpolant automaton has 98 states. [2018-09-14 15:53:34,503 INFO L276 IsEmpty]: Start isEmpty. Operand 633 states and 717 transitions. [2018-09-14 15:53:34,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 301 [2018-09-14 15:53:34,505 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:34,505 INFO L376 BasicCegarLoop]: trace histogram [84, 84, 83, 12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:34,505 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:34,506 INFO L82 PathProgramCache]: Analyzing trace with hash 1112549934, now seen corresponding path program 28 times [2018-09-14 15:53:34,506 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:34,506 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:34,507 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:34,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:34,507 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:34,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:38,337 INFO L134 CoverageAnalysis]: Checked inductivity of 10656 backedges. 0 proven. 10656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:38,338 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:38,338 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:38,347 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:53:38,347 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:53:38,445 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:53:38,446 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:38,451 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:38,596 INFO L134 CoverageAnalysis]: Checked inductivity of 10656 backedges. 0 proven. 10656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:38,597 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:49,011 INFO L134 CoverageAnalysis]: Checked inductivity of 10656 backedges. 0 proven. 10656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:49,032 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:49,032 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:53:49,048 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-14 15:53:49,048 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-14 15:53:49,237 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-14 15:53:49,237 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:49,246 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:49,374 INFO L134 CoverageAnalysis]: Checked inductivity of 10656 backedges. 0 proven. 10656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:49,374 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:53:49,521 INFO L134 CoverageAnalysis]: Checked inductivity of 10656 backedges. 0 proven. 10656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:49,523 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:53:49,523 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [99, 99, 99, 99, 99] total 196 [2018-09-14 15:53:49,523 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:53:49,524 INFO L459 AbstractCegarLoop]: Interpolant automaton has 99 states [2018-09-14 15:53:49,525 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2018-09-14 15:53:49,525 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=18346, Invalid=19874, Unknown=0, NotChecked=0, Total=38220 [2018-09-14 15:53:49,526 INFO L87 Difference]: Start difference. First operand 633 states and 717 transitions. Second operand 99 states. [2018-09-14 15:53:54,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:53:54,243 INFO L93 Difference]: Finished difference Result 921 states and 1017 transitions. [2018-09-14 15:53:54,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2018-09-14 15:53:54,243 INFO L78 Accepts]: Start accepts. Automaton has 99 states. Word has length 300 [2018-09-14 15:53:54,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:53:54,248 INFO L225 Difference]: With dead ends: 921 [2018-09-14 15:53:54,249 INFO L226 Difference]: Without dead ends: 915 [2018-09-14 15:53:54,250 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1298 GetRequests, 1101 SyntacticMatches, 2 SemanticMatches, 195 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 946 ImplicationChecksByTransitivity, 14.1s TimeCoverageRelationStatistics Valid=18352, Invalid=20260, Unknown=0, NotChecked=0, Total=38612 [2018-09-14 15:53:54,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 915 states. [2018-09-14 15:53:54,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 915 to 640. [2018-09-14 15:53:54,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 640 states. [2018-09-14 15:53:54,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 640 states to 640 states and 725 transitions. [2018-09-14 15:53:54,259 INFO L78 Accepts]: Start accepts. Automaton has 640 states and 725 transitions. Word has length 300 [2018-09-14 15:53:54,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:53:54,260 INFO L480 AbstractCegarLoop]: Abstraction has 640 states and 725 transitions. [2018-09-14 15:53:54,260 INFO L481 AbstractCegarLoop]: Interpolant automaton has 99 states. [2018-09-14 15:53:54,260 INFO L276 IsEmpty]: Start isEmpty. Operand 640 states and 725 transitions. [2018-09-14 15:53:54,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 304 [2018-09-14 15:53:54,263 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:53:54,263 INFO L376 BasicCegarLoop]: trace histogram [85, 85, 84, 12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:53:54,263 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:53:54,264 INFO L82 PathProgramCache]: Analyzing trace with hash -709031891, now seen corresponding path program 29 times [2018-09-14 15:53:54,264 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:53:54,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:54,265 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:53:54,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:53:54,265 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:53:54,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:53:58,191 INFO L134 CoverageAnalysis]: Checked inductivity of 10908 backedges. 0 proven. 10908 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:58,191 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:53:58,192 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:53:58,199 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:53:58,200 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:53:58,402 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 85 check-sat command(s) [2018-09-14 15:53:58,402 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:53:58,407 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:53:58,672 INFO L134 CoverageAnalysis]: Checked inductivity of 10908 backedges. 0 proven. 10908 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:53:58,672 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:09,185 INFO L134 CoverageAnalysis]: Checked inductivity of 10908 backedges. 0 proven. 10908 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:54:09,205 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:09,205 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:54:09,221 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-14 15:54:09,222 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:54:10,976 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 85 check-sat command(s) [2018-09-14 15:54:10,976 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:10,986 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:11,136 INFO L134 CoverageAnalysis]: Checked inductivity of 10908 backedges. 0 proven. 10908 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:54:11,137 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:11,216 INFO L134 CoverageAnalysis]: Checked inductivity of 10908 backedges. 0 proven. 10908 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:54:11,218 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:54:11,218 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [100, 100, 100, 100, 100] total 198 [2018-09-14 15:54:11,219 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:54:11,219 INFO L459 AbstractCegarLoop]: Interpolant automaton has 100 states [2018-09-14 15:54:11,220 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 100 interpolants. [2018-09-14 15:54:11,221 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=18731, Invalid=20275, Unknown=0, NotChecked=0, Total=39006 [2018-09-14 15:54:11,221 INFO L87 Difference]: Start difference. First operand 640 states and 725 transitions. Second operand 100 states. [2018-09-14 15:54:16,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:54:16,913 INFO L93 Difference]: Finished difference Result 928 states and 1025 transitions. [2018-09-14 15:54:16,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2018-09-14 15:54:16,914 INFO L78 Accepts]: Start accepts. Automaton has 100 states. Word has length 303 [2018-09-14 15:54:16,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:54:16,918 INFO L225 Difference]: With dead ends: 928 [2018-09-14 15:54:16,919 INFO L226 Difference]: Without dead ends: 922 [2018-09-14 15:54:16,920 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1311 GetRequests, 1112 SyntacticMatches, 2 SemanticMatches, 197 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 956 ImplicationChecksByTransitivity, 14.4s TimeCoverageRelationStatistics Valid=18737, Invalid=20665, Unknown=0, NotChecked=0, Total=39402 [2018-09-14 15:54:16,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 922 states. [2018-09-14 15:54:16,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 922 to 647. [2018-09-14 15:54:16,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 647 states. [2018-09-14 15:54:16,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 647 states and 733 transitions. [2018-09-14 15:54:16,929 INFO L78 Accepts]: Start accepts. Automaton has 647 states and 733 transitions. Word has length 303 [2018-09-14 15:54:16,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:54:16,930 INFO L480 AbstractCegarLoop]: Abstraction has 647 states and 733 transitions. [2018-09-14 15:54:16,930 INFO L481 AbstractCegarLoop]: Interpolant automaton has 100 states. [2018-09-14 15:54:16,930 INFO L276 IsEmpty]: Start isEmpty. Operand 647 states and 733 transitions. [2018-09-14 15:54:16,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 307 [2018-09-14 15:54:16,932 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:54:16,933 INFO L376 BasicCegarLoop]: trace histogram [86, 86, 85, 12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:54:16,933 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:54:16,933 INFO L82 PathProgramCache]: Analyzing trace with hash -541395506, now seen corresponding path program 30 times [2018-09-14 15:54:16,933 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:54:16,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:16,934 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:54:16,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:16,934 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:54:16,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:20,979 INFO L134 CoverageAnalysis]: Checked inductivity of 11163 backedges. 0 proven. 11163 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:54:20,980 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:20,980 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:54:20,987 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:54:20,987 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:54:21,057 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 23 check-sat command(s) [2018-09-14 15:54:21,057 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:21,061 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:22,056 INFO L134 CoverageAnalysis]: Checked inductivity of 11163 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 10965 trivial. 0 not checked. [2018-09-14 15:54:22,057 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:23,201 INFO L134 CoverageAnalysis]: Checked inductivity of 11163 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 10965 trivial. 0 not checked. [2018-09-14 15:54:23,222 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:23,223 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:54:23,238 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-14 15:54:23,238 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-14 15:54:23,548 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 23 check-sat command(s) [2018-09-14 15:54:23,548 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:54:23,554 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:23,651 INFO L134 CoverageAnalysis]: Checked inductivity of 11163 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 10965 trivial. 0 not checked. [2018-09-14 15:54:23,651 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:23,695 INFO L134 CoverageAnalysis]: Checked inductivity of 11163 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 10965 trivial. 0 not checked. [2018-09-14 15:54:23,697 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:54:23,697 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [101, 16, 16, 16, 16] total 127 [2018-09-14 15:54:23,697 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:54:23,698 INFO L459 AbstractCegarLoop]: Interpolant automaton has 113 states [2018-09-14 15:54:23,699 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 113 interpolants. [2018-09-14 15:54:23,699 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=7513, Invalid=8489, Unknown=0, NotChecked=0, Total=16002 [2018-09-14 15:54:23,700 INFO L87 Difference]: Start difference. First operand 647 states and 733 transitions. Second operand 113 states. [2018-09-14 15:54:28,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:54:28,423 INFO L93 Difference]: Finished difference Result 1208 states and 1330 transitions. [2018-09-14 15:54:28,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 113 states. [2018-09-14 15:54:28,424 INFO L78 Accepts]: Start accepts. Automaton has 113 states. Word has length 306 [2018-09-14 15:54:28,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:54:28,430 INFO L225 Difference]: With dead ends: 1208 [2018-09-14 15:54:28,431 INFO L226 Difference]: Without dead ends: 1178 [2018-09-14 15:54:28,432 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1324 GetRequests, 1196 SyntacticMatches, 2 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 674 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=7519, Invalid=8737, Unknown=0, NotChecked=0, Total=16256 [2018-09-14 15:54:28,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1178 states. [2018-09-14 15:54:28,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1178 to 734. [2018-09-14 15:54:28,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 734 states. [2018-09-14 15:54:28,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 832 transitions. [2018-09-14 15:54:28,442 INFO L78 Accepts]: Start accepts. Automaton has 734 states and 832 transitions. Word has length 306 [2018-09-14 15:54:28,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:54:28,442 INFO L480 AbstractCegarLoop]: Abstraction has 734 states and 832 transitions. [2018-09-14 15:54:28,442 INFO L481 AbstractCegarLoop]: Interpolant automaton has 113 states. [2018-09-14 15:54:28,442 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 832 transitions. [2018-09-14 15:54:28,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2018-09-14 15:54:28,445 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:54:28,445 INFO L376 BasicCegarLoop]: trace histogram [98, 98, 97, 13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:54:28,446 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:54:28,446 INFO L82 PathProgramCache]: Analyzing trace with hash -294769805, now seen corresponding path program 31 times [2018-09-14 15:54:28,446 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:54:28,446 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:28,447 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-14 15:54:28,447 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:28,447 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:54:28,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:33,437 INFO L134 CoverageAnalysis]: Checked inductivity of 14493 backedges. 0 proven. 14493 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:54:33,437 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:33,437 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:54:33,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:54:33,445 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:54:33,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:33,560 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:33,716 INFO L134 CoverageAnalysis]: Checked inductivity of 14493 backedges. 0 proven. 14493 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:54:33,716 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:45,927 INFO L134 CoverageAnalysis]: Checked inductivity of 14493 backedges. 0 proven. 14493 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:54:45,947 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:54:45,947 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:54:45,962 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:54:45,962 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-14 15:54:46,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:54:46,200 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:54:46,354 INFO L134 CoverageAnalysis]: Checked inductivity of 14493 backedges. 0 proven. 14493 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:54:46,354 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:54:47,872 INFO L134 CoverageAnalysis]: Checked inductivity of 14493 backedges. 0 proven. 14493 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:54:47,874 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:54:47,875 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [114, 114, 114, 114, 114] total 206 [2018-09-14 15:54:47,875 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:54:47,875 INFO L459 AbstractCegarLoop]: Interpolant automaton has 114 states [2018-09-14 15:54:47,877 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 114 interpolants. [2018-09-14 15:54:47,878 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=20311, Invalid=21919, Unknown=0, NotChecked=0, Total=42230 [2018-09-14 15:54:47,878 INFO L87 Difference]: Start difference. First operand 734 states and 832 transitions. Second operand 114 states. [2018-09-14 15:54:55,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-14 15:54:55,324 INFO L93 Difference]: Finished difference Result 867 states and 978 transitions. [2018-09-14 15:54:55,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 114 states. [2018-09-14 15:54:55,324 INFO L78 Accepts]: Start accepts. Automaton has 114 states. Word has length 345 [2018-09-14 15:54:55,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-14 15:54:55,329 INFO L225 Difference]: With dead ends: 867 [2018-09-14 15:54:55,329 INFO L226 Difference]: Without dead ends: 861 [2018-09-14 15:54:55,331 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1493 GetRequests, 1246 SyntacticMatches, 42 SemanticMatches, 205 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4996 ImplicationChecksByTransitivity, 18.4s TimeCoverageRelationStatistics Valid=20317, Invalid=22325, Unknown=0, NotChecked=0, Total=42642 [2018-09-14 15:54:55,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 861 states. [2018-09-14 15:54:55,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 861 to 741. [2018-09-14 15:54:55,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 741 states. [2018-09-14 15:54:55,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 741 states and 840 transitions. [2018-09-14 15:54:55,339 INFO L78 Accepts]: Start accepts. Automaton has 741 states and 840 transitions. Word has length 345 [2018-09-14 15:54:55,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-14 15:54:55,339 INFO L480 AbstractCegarLoop]: Abstraction has 741 states and 840 transitions. [2018-09-14 15:54:55,340 INFO L481 AbstractCegarLoop]: Interpolant automaton has 114 states. [2018-09-14 15:54:55,340 INFO L276 IsEmpty]: Start isEmpty. Operand 741 states and 840 transitions. [2018-09-14 15:54:55,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 349 [2018-09-14 15:54:55,342 INFO L368 BasicCegarLoop]: Found error trace [2018-09-14 15:54:55,343 INFO L376 BasicCegarLoop]: trace histogram [99, 99, 98, 13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-14 15:54:55,343 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-14 15:54:55,343 INFO L82 PathProgramCache]: Analyzing trace with hash -304447532, now seen corresponding path program 32 times [2018-09-14 15:54:55,343 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-14 15:54:55,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:55,344 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-14 15:54:55,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-14 15:54:55,344 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-14 15:54:55,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-14 15:55:01,108 INFO L134 CoverageAnalysis]: Checked inductivity of 14787 backedges. 0 proven. 14787 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:55:01,109 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:55:01,109 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-14 15:55:01,116 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:55:01,116 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:55:01,229 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:55:01,230 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:55:01,236 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:55:01,410 INFO L134 CoverageAnalysis]: Checked inductivity of 14787 backedges. 0 proven. 14787 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:55:01,411 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:55:13,349 INFO L134 CoverageAnalysis]: Checked inductivity of 14787 backedges. 0 proven. 14787 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:55:13,370 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-14 15:55:13,370 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-14 15:55:13,385 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-14 15:55:13,386 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-14 15:55:13,627 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-14 15:55:13,628 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-14 15:55:13,639 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-14 15:55:13,790 INFO L134 CoverageAnalysis]: Checked inductivity of 14787 backedges. 0 proven. 14787 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:55:13,790 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-14 15:55:15,769 INFO L134 CoverageAnalysis]: Checked inductivity of 14787 backedges. 0 proven. 14787 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-14 15:55:15,771 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-14 15:55:15,771 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [115, 115, 115, 115, 115] total 206 [2018-09-14 15:55:15,771 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-14 15:55:15,772 INFO L459 AbstractCegarLoop]: Interpolant automaton has 115 states [2018-09-14 15:55:15,773 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 115 interpolants. [2018-09-14 15:55:15,774 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=20311, Invalid=21919, Unknown=0, NotChecked=0, Total=42230 [2018-09-14 15:55:15,775 INFO L87 Difference]: Start difference. First operand 741 states and 840 transitions. Second operand 115 states. Received shutdown request... [2018-09-14 15:55:18,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-09-14 15:55:18,358 WARN L549 AbstractCegarLoop]: Verification canceled [2018-09-14 15:55:18,364 WARN L206 ceAbstractionStarter]: Timeout [2018-09-14 15:55:18,364 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.09 03:55:18 BoogieIcfgContainer [2018-09-14 15:55:18,364 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-14 15:55:18,365 INFO L168 Benchmark]: Toolchain (without parser) took 241830.68 ms. Allocated memory was 1.5 GB in the beginning and 2.4 GB in the end (delta: 855.6 MB). Free memory was 1.4 GB in the beginning and 1.6 GB in the end (delta: -173.1 MB). Peak memory consumption was 682.5 MB. Max. memory is 7.1 GB. [2018-09-14 15:55:18,367 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-14 15:55:18,367 INFO L168 Benchmark]: CACSL2BoogieTranslator took 263.75 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-09-14 15:55:18,368 INFO L168 Benchmark]: Boogie Procedure Inliner took 20.09 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-14 15:55:18,368 INFO L168 Benchmark]: Boogie Preprocessor took 17.97 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-14 15:55:18,368 INFO L168 Benchmark]: RCFGBuilder took 367.24 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 716.2 MB). Free memory was 1.4 GB in the beginning and 2.1 GB in the end (delta: -755.2 MB). Peak memory consumption was 26.8 MB. Max. memory is 7.1 GB. [2018-09-14 15:55:18,369 INFO L168 Benchmark]: TraceAbstraction took 241156.47 ms. Allocated memory was 2.2 GB in the beginning and 2.4 GB in the end (delta: 139.5 MB). Free memory was 2.1 GB in the beginning and 1.6 GB in the end (delta: 571.5 MB). Peak memory consumption was 711.0 MB. Max. memory is 7.1 GB. [2018-09-14 15:55:18,372 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 263.75 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 20.09 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 17.97 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 367.24 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 716.2 MB). Free memory was 1.4 GB in the beginning and 2.1 GB in the end (delta: -755.2 MB). Peak memory consumption was 26.8 MB. Max. memory is 7.1 GB. * TraceAbstraction took 241156.47 ms. Allocated memory was 2.2 GB in the beginning and 2.4 GB in the end (delta: 139.5 MB). Free memory was 2.1 GB in the beginning and 1.6 GB in the end (delta: 571.5 MB). Peak memory consumption was 711.0 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was constructing difference of abstraction (741states) and FLOYD_HOARE automaton (currently 55 states, 115 states before enhancement), while ReachableStatesComputation was computing reachable states (367 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 27 locations, 1 error locations. TIMEOUT Result, 241.0s OverallTime, 36 OverallIterations, 99 TraceHistogramMax, 57.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 515 SDtfs, 13496 SDslu, 13999 SDs, 0 SdLazy, 9638 SolverSat, 4459 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 20.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 22541 GetRequests, 19423 SyntacticMatches, 150 SemanticMatches, 2968 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22468 ImplicationChecksByTransitivity, 165.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=741occurred in iteration=35, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 35 MinimizatonAttempts, 4771 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.8s SsaConstructionTime, 8.7s SatisfiabilityAnalysisTime, 171.4s InterpolantComputationTime, 15695 NumberOfCodeBlocks, 13985 NumberOfCodeBlocksAsserted, 744 NumberOfCheckSat, 25955 ConstructedInterpolants, 0 QuantifiedInterpolants, 14688867 SizeOfPredicates, 153 NumberOfNonLiveVariables, 20694 ConjunctsInSsa, 2772 ConjunctsInUnsatCore, 168 InterpolantComputations, 3 PerfectInterpolantSequences, 132135/637563 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/string_concat-noarr_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-09-14_15-55-18-383.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/string_concat-noarr_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-14_15-55-18-383.csv Completed graceful shutdown