java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-new/count_by_k_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-69f5bdd-m [2018-09-18 10:04:17,453 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-18 10:04:17,455 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-18 10:04:17,466 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-18 10:04:17,467 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-18 10:04:17,468 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-18 10:04:17,469 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-18 10:04:17,470 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-18 10:04:17,472 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-18 10:04:17,473 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-18 10:04:17,473 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-18 10:04:17,474 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-18 10:04:17,474 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-18 10:04:17,475 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-18 10:04:17,476 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-18 10:04:17,477 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-18 10:04:17,478 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-18 10:04:17,480 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-18 10:04:17,481 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-18 10:04:17,483 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-18 10:04:17,484 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-18 10:04:17,485 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-18 10:04:17,487 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-18 10:04:17,488 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-18 10:04:17,488 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-18 10:04:17,489 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-18 10:04:17,490 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-18 10:04:17,491 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-18 10:04:17,491 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-18 10:04:17,492 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-18 10:04:17,493 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-18 10:04:17,493 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-09-18 10:04:17,496 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-18 10:04:17,516 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-18 10:04:17,517 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-18 10:04:17,517 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-18 10:04:17,518 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-18 10:04:17,518 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-18 10:04:17,518 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-18 10:04:17,518 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-18 10:04:17,518 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-18 10:04:17,519 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-18 10:04:17,519 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-18 10:04:17,519 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-09-18 10:04:17,519 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-18 10:04:17,520 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-18 10:04:17,520 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-18 10:04:17,520 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-18 10:04:17,520 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-18 10:04:17,521 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-18 10:04:17,521 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-18 10:04:17,521 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-18 10:04:17,521 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-18 10:04:17,521 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-18 10:04:17,522 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-18 10:04:17,522 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-18 10:04:17,522 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-18 10:04:17,522 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 10:04:17,522 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-18 10:04:17,523 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-18 10:04:17,523 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-18 10:04:17,523 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-18 10:04:17,523 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-18 10:04:17,523 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-18 10:04:17,524 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-18 10:04:17,524 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-18 10:04:17,524 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-18 10:04:17,572 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-18 10:04:17,584 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-18 10:04:17,590 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-18 10:04:17,592 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-18 10:04:17,592 INFO L276 PluginConnector]: CDTParser initialized [2018-09-18 10:04:17,593 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-new/count_by_k_true-unreach-call_true-termination.i [2018-09-18 10:04:17,948 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/af017a859/13d482ac8c404e699220b0c6f7cc43a6/FLAG3b61fec28 [2018-09-18 10:04:18,102 INFO L277 CDTParser]: Found 1 translation units. [2018-09-18 10:04:18,103 INFO L159 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-new/count_by_k_true-unreach-call_true-termination.i [2018-09-18 10:04:18,110 INFO L325 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/af017a859/13d482ac8c404e699220b0c6f7cc43a6/FLAG3b61fec28 [2018-09-18 10:04:18,134 INFO L333 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/af017a859/13d482ac8c404e699220b0c6f7cc43a6 [2018-09-18 10:04:18,147 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-18 10:04:18,154 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-18 10:04:18,155 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-18 10:04:18,156 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-18 10:04:18,165 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-18 10:04:18,166 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,170 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@762f4698 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18, skipping insertion in model container [2018-09-18 10:04:18,170 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,183 INFO L160 ieTranslatorObserver]: Starting translation in SV-COMP mode [2018-09-18 10:04:18,420 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 10:04:18,437 INFO L424 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-18 10:04:18,441 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 10:04:18,453 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18 WrapperNode [2018-09-18 10:04:18,454 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-18 10:04:18,454 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-18 10:04:18,455 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-18 10:04:18,455 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-18 10:04:18,464 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,470 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,476 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-18 10:04:18,476 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-18 10:04:18,477 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-18 10:04:18,477 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-18 10:04:18,486 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,487 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,487 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,487 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,489 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,494 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,495 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (1/1) ... [2018-09-18 10:04:18,496 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-18 10:04:18,497 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-18 10:04:18,497 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-18 10:04:18,497 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-18 10:04:18,498 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 10:04:18,564 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-18 10:04:18,565 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-18 10:04:18,565 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-18 10:04:18,565 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-18 10:04:18,565 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-18 10:04:18,565 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-18 10:04:18,566 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-09-18 10:04:18,566 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-09-18 10:04:18,953 INFO L356 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-18 10:04:18,954 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 10:04:18 BoogieIcfgContainer [2018-09-18 10:04:18,954 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-18 10:04:18,955 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-18 10:04:18,956 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-18 10:04:18,959 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-18 10:04:18,959 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.09 10:04:18" (1/3) ... [2018-09-18 10:04:18,960 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b667f28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 10:04:18, skipping insertion in model container [2018-09-18 10:04:18,960 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:04:18" (2/3) ... [2018-09-18 10:04:18,961 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b667f28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 10:04:18, skipping insertion in model container [2018-09-18 10:04:18,961 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 10:04:18" (3/3) ... [2018-09-18 10:04:18,962 INFO L112 eAbstractionObserver]: Analyzing ICFG count_by_k_true-unreach-call_true-termination.i [2018-09-18 10:04:18,973 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-18 10:04:18,980 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-18 10:04:19,045 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-18 10:04:19,046 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-18 10:04:19,046 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-18 10:04:19,046 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-18 10:04:19,046 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-18 10:04:19,047 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-18 10:04:19,047 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-18 10:04:19,047 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-18 10:04:19,047 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-18 10:04:19,069 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-09-18 10:04:19,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-09-18 10:04:19,082 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:19,083 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:19,087 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:19,099 INFO L82 PathProgramCache]: Analyzing trace with hash 1152414567, now seen corresponding path program 1 times [2018-09-18 10:04:19,102 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:19,165 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:19,165 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:19,165 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:19,166 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:19,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:19,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:19,238 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:04:19,238 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-18 10:04:19,239 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:04:19,243 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-18 10:04:19,255 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-18 10:04:19,256 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 10:04:19,258 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 2 states. [2018-09-18 10:04:19,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:19,279 INFO L93 Difference]: Finished difference Result 33 states and 37 transitions. [2018-09-18 10:04:19,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-18 10:04:19,280 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 11 [2018-09-18 10:04:19,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:19,289 INFO L225 Difference]: With dead ends: 33 [2018-09-18 10:04:19,289 INFO L226 Difference]: Without dead ends: 14 [2018-09-18 10:04:19,293 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 10:04:19,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2018-09-18 10:04:19,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2018-09-18 10:04:19,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-09-18 10:04:19,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 14 transitions. [2018-09-18 10:04:19,329 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 14 transitions. Word has length 11 [2018-09-18 10:04:19,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:19,330 INFO L480 AbstractCegarLoop]: Abstraction has 14 states and 14 transitions. [2018-09-18 10:04:19,330 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-18 10:04:19,330 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-09-18 10:04:19,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-09-18 10:04:19,330 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:19,331 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:19,331 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:19,331 INFO L82 PathProgramCache]: Analyzing trace with hash 1083883255, now seen corresponding path program 1 times [2018-09-18 10:04:19,332 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:19,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:19,334 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:19,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:19,335 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:19,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:19,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:19,583 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:04:19,584 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-09-18 10:04:19,584 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:04:19,586 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-09-18 10:04:19,586 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-09-18 10:04:19,586 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-09-18 10:04:19,587 INFO L87 Difference]: Start difference. First operand 14 states and 14 transitions. Second operand 6 states. [2018-09-18 10:04:19,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:19,731 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-09-18 10:04:19,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-09-18 10:04:19,732 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 12 [2018-09-18 10:04:19,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:19,732 INFO L225 Difference]: With dead ends: 21 [2018-09-18 10:04:19,733 INFO L226 Difference]: Without dead ends: 16 [2018-09-18 10:04:19,734 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-09-18 10:04:19,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-09-18 10:04:19,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-09-18 10:04:19,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-09-18 10:04:19,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-09-18 10:04:19,739 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 12 [2018-09-18 10:04:19,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:19,740 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-09-18 10:04:19,740 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-09-18 10:04:19,740 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-09-18 10:04:19,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-09-18 10:04:19,740 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:19,741 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:19,741 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:19,741 INFO L82 PathProgramCache]: Analyzing trace with hash 1128913667, now seen corresponding path program 1 times [2018-09-18 10:04:19,741 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:19,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:19,742 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:19,743 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:19,743 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:19,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:19,837 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:19,837 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:19,837 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:19,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:19,851 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:19,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:19,880 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:20,293 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:20,294 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:20,498 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:20,519 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:20,520 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:20,540 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:20,540 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:20,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:20,556 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:20,567 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:20,568 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:20,828 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:20,835 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:20,835 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-09-18 10:04:20,835 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:20,836 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-09-18 10:04:20,836 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-09-18 10:04:20,836 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-09-18 10:04:20,837 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 7 states. [2018-09-18 10:04:21,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:21,046 INFO L93 Difference]: Finished difference Result 30 states and 32 transitions. [2018-09-18 10:04:21,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-18 10:04:21,049 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 [2018-09-18 10:04:21,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:21,049 INFO L225 Difference]: With dead ends: 30 [2018-09-18 10:04:21,050 INFO L226 Difference]: Without dead ends: 25 [2018-09-18 10:04:21,050 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 53 SyntacticMatches, 4 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-09-18 10:04:21,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-09-18 10:04:21,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-09-18 10:04:21,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-09-18 10:04:21,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-09-18 10:04:21,056 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 15 [2018-09-18 10:04:21,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:21,057 INFO L480 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-09-18 10:04:21,057 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-09-18 10:04:21,057 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-09-18 10:04:21,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-09-18 10:04:21,058 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:21,058 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:21,058 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:21,059 INFO L82 PathProgramCache]: Analyzing trace with hash 1437681655, now seen corresponding path program 2 times [2018-09-18 10:04:21,059 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:21,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:21,060 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:21,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:21,060 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:21,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:21,352 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:21,352 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:21,353 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:21,365 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:21,365 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:21,377 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:21,377 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:21,380 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:21,500 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:21,500 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:21,975 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:21,996 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:21,996 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:22,012 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:22,012 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:22,029 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:22,029 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:22,033 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:22,041 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:22,041 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:22,114 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:22,118 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:22,118 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-09-18 10:04:22,118 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:22,119 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-09-18 10:04:22,119 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-09-18 10:04:22,119 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=126, Unknown=0, NotChecked=0, Total=182 [2018-09-18 10:04:22,120 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 10 states. [2018-09-18 10:04:22,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:22,381 INFO L93 Difference]: Finished difference Result 39 states and 41 transitions. [2018-09-18 10:04:22,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-18 10:04:22,381 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 24 [2018-09-18 10:04:22,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:22,383 INFO L225 Difference]: With dead ends: 39 [2018-09-18 10:04:22,383 INFO L226 Difference]: Without dead ends: 34 [2018-09-18 10:04:22,384 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 86 SyntacticMatches, 4 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=127, Invalid=253, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:04:22,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-09-18 10:04:22,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-09-18 10:04:22,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-09-18 10:04:22,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-09-18 10:04:22,391 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 24 [2018-09-18 10:04:22,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:22,392 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-09-18 10:04:22,392 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-09-18 10:04:22,392 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-09-18 10:04:22,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-09-18 10:04:22,393 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:22,393 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:22,394 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:22,394 INFO L82 PathProgramCache]: Analyzing trace with hash -656200317, now seen corresponding path program 3 times [2018-09-18 10:04:22,394 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:22,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:22,395 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:22,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:22,395 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:22,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:22,621 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:22,622 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:22,622 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:22,631 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:22,631 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:22,656 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-09-18 10:04:22,656 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:22,660 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:22,748 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:22,749 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:23,054 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:23,074 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:23,075 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:23,091 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:23,092 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:23,137 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-09-18 10:04:23,137 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:23,141 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:23,151 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:23,151 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:23,237 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:23,243 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:23,243 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-09-18 10:04:23,243 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:23,244 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-18 10:04:23,244 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-18 10:04:23,244 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=261, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:04:23,245 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 13 states. [2018-09-18 10:04:23,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:23,641 INFO L93 Difference]: Finished difference Result 48 states and 50 transitions. [2018-09-18 10:04:23,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-18 10:04:23,643 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 33 [2018-09-18 10:04:23,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:23,644 INFO L225 Difference]: With dead ends: 48 [2018-09-18 10:04:23,644 INFO L226 Difference]: Without dead ends: 43 [2018-09-18 10:04:23,645 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 119 SyntacticMatches, 4 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=277, Invalid=535, Unknown=0, NotChecked=0, Total=812 [2018-09-18 10:04:23,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-09-18 10:04:23,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-09-18 10:04:23,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-09-18 10:04:23,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-09-18 10:04:23,653 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 33 [2018-09-18 10:04:23,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:23,653 INFO L480 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-09-18 10:04:23,654 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-18 10:04:23,654 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-09-18 10:04:23,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-09-18 10:04:23,655 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:23,655 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:23,656 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:23,656 INFO L82 PathProgramCache]: Analyzing trace with hash -1490238089, now seen corresponding path program 4 times [2018-09-18 10:04:23,656 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:23,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:23,657 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:23,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:23,658 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:23,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:24,000 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:24,000 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:24,001 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:24,009 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:24,009 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:24,021 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:24,021 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:24,027 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:24,153 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:24,153 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:24,569 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:24,589 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:24,590 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:24,607 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:24,607 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:24,630 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:24,630 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:24,634 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:24,647 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:24,647 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:25,053 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:25,057 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:25,057 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-09-18 10:04:25,057 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:25,059 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-18 10:04:25,060 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-18 10:04:25,060 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=209, Invalid=441, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:04:25,061 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 16 states. [2018-09-18 10:04:25,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:25,971 INFO L93 Difference]: Finished difference Result 57 states and 59 transitions. [2018-09-18 10:04:25,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-18 10:04:25,971 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-09-18 10:04:25,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:25,973 INFO L225 Difference]: With dead ends: 57 [2018-09-18 10:04:25,974 INFO L226 Difference]: Without dead ends: 52 [2018-09-18 10:04:25,975 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 152 SyntacticMatches, 4 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=490, Invalid=916, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:04:25,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-09-18 10:04:25,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-09-18 10:04:25,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-09-18 10:04:25,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-09-18 10:04:25,982 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 42 [2018-09-18 10:04:25,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:25,983 INFO L480 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-09-18 10:04:25,983 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-18 10:04:25,983 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-09-18 10:04:25,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-09-18 10:04:25,985 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:25,985 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:25,985 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:25,986 INFO L82 PathProgramCache]: Analyzing trace with hash 45932547, now seen corresponding path program 5 times [2018-09-18 10:04:25,986 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:25,987 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:25,987 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:25,987 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:25,987 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:26,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:26,695 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:26,695 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:26,695 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:26,704 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:26,704 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:26,723 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-09-18 10:04:26,723 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:26,727 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:26,839 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:26,839 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:27,477 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:27,499 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:27,500 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:27,518 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:27,518 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:27,583 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-09-18 10:04:27,583 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:27,587 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:27,615 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:27,616 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:27,724 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:27,726 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:27,726 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-09-18 10:04:27,727 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:27,728 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-18 10:04:27,728 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-18 10:04:27,729 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=326, Invalid=666, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:04:27,729 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 19 states. [2018-09-18 10:04:28,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:28,373 INFO L93 Difference]: Finished difference Result 66 states and 68 transitions. [2018-09-18 10:04:28,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-18 10:04:28,375 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 51 [2018-09-18 10:04:28,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:28,377 INFO L225 Difference]: With dead ends: 66 [2018-09-18 10:04:28,377 INFO L226 Difference]: Without dead ends: 61 [2018-09-18 10:04:28,379 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 234 GetRequests, 185 SyntacticMatches, 4 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 235 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=766, Invalid=1396, Unknown=0, NotChecked=0, Total=2162 [2018-09-18 10:04:28,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-09-18 10:04:28,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-09-18 10:04:28,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-09-18 10:04:28,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 61 transitions. [2018-09-18 10:04:28,387 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 61 transitions. Word has length 51 [2018-09-18 10:04:28,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:28,387 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 61 transitions. [2018-09-18 10:04:28,388 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-18 10:04:28,388 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 61 transitions. [2018-09-18 10:04:28,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-09-18 10:04:28,390 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:28,390 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:28,391 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:28,391 INFO L82 PathProgramCache]: Analyzing trace with hash -1227627785, now seen corresponding path program 6 times [2018-09-18 10:04:28,391 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:28,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:28,392 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:28,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:28,392 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:28,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:28,931 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:28,931 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:28,931 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:28,945 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:28,945 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:28,975 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2018-09-18 10:04:28,976 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:28,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:29,086 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:29,086 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:29,702 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:29,731 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:29,731 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:29,748 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:29,748 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:29,843 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2018-09-18 10:04:29,843 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:29,847 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:29,860 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:29,861 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:30,039 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:30,040 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:30,041 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 38 [2018-09-18 10:04:30,041 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:30,041 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-18 10:04:30,042 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-18 10:04:30,042 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=470, Invalid=936, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:04:30,042 INFO L87 Difference]: Start difference. First operand 61 states and 61 transitions. Second operand 22 states. [2018-09-18 10:04:31,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:31,038 INFO L93 Difference]: Finished difference Result 75 states and 77 transitions. [2018-09-18 10:04:31,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-18 10:04:31,039 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-09-18 10:04:31,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:31,040 INFO L225 Difference]: With dead ends: 75 [2018-09-18 10:04:31,041 INFO L226 Difference]: Without dead ends: 70 [2018-09-18 10:04:31,042 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 276 GetRequests, 218 SyntacticMatches, 4 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 310 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1105, Invalid=1975, Unknown=0, NotChecked=0, Total=3080 [2018-09-18 10:04:31,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-09-18 10:04:31,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2018-09-18 10:04:31,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-09-18 10:04:31,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 70 transitions. [2018-09-18 10:04:31,050 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 70 transitions. Word has length 60 [2018-09-18 10:04:31,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:31,050 INFO L480 AbstractCegarLoop]: Abstraction has 70 states and 70 transitions. [2018-09-18 10:04:31,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-18 10:04:31,051 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 70 transitions. [2018-09-18 10:04:31,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-09-18 10:04:31,052 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:31,052 INFO L376 BasicCegarLoop]: trace histogram [20, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:31,052 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:31,052 INFO L82 PathProgramCache]: Analyzing trace with hash 360641155, now seen corresponding path program 7 times [2018-09-18 10:04:31,053 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:31,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:31,054 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:31,054 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:31,054 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:31,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:31,962 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:31,962 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:31,962 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:31,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:31,970 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:31,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:32,005 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:32,080 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:32,080 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:32,904 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:32,924 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:32,925 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:32,940 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:32,940 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:32,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:32,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:33,002 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:33,002 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:33,277 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 0 proven. 551 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:33,279 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:33,279 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 44 [2018-09-18 10:04:33,279 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:33,280 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-18 10:04:33,280 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-18 10:04:33,281 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=641, Invalid=1251, Unknown=0, NotChecked=0, Total=1892 [2018-09-18 10:04:33,281 INFO L87 Difference]: Start difference. First operand 70 states and 70 transitions. Second operand 25 states. [2018-09-18 10:04:34,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:34,344 INFO L93 Difference]: Finished difference Result 84 states and 86 transitions. [2018-09-18 10:04:34,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-18 10:04:34,347 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 69 [2018-09-18 10:04:34,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:34,348 INFO L225 Difference]: With dead ends: 84 [2018-09-18 10:04:34,349 INFO L226 Difference]: Without dead ends: 79 [2018-09-18 10:04:34,350 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 318 GetRequests, 251 SyntacticMatches, 4 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 394 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=1507, Invalid=2653, Unknown=0, NotChecked=0, Total=4160 [2018-09-18 10:04:34,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-09-18 10:04:34,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-09-18 10:04:34,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-09-18 10:04:34,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 79 transitions. [2018-09-18 10:04:34,357 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 79 transitions. Word has length 69 [2018-09-18 10:04:34,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:34,358 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 79 transitions. [2018-09-18 10:04:34,358 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-18 10:04:34,358 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 79 transitions. [2018-09-18 10:04:34,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-09-18 10:04:34,359 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:34,359 INFO L376 BasicCegarLoop]: trace histogram [23, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:34,359 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:34,360 INFO L82 PathProgramCache]: Analyzing trace with hash -318857097, now seen corresponding path program 8 times [2018-09-18 10:04:34,360 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:34,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:34,361 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:34,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:34,361 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:34,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:34,805 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:34,805 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:34,805 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:34,812 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:34,812 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:34,845 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:34,846 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:34,858 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:35,029 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:35,030 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:36,430 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:36,452 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:36,452 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:36,466 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:36,467 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:36,509 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:36,509 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:36,513 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:36,652 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:36,652 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:36,815 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:36,818 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:36,818 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 55 [2018-09-18 10:04:36,818 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:36,819 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-09-18 10:04:36,819 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-09-18 10:04:36,820 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=982, Invalid=1988, Unknown=0, NotChecked=0, Total=2970 [2018-09-18 10:04:36,820 INFO L87 Difference]: Start difference. First operand 79 states and 79 transitions. Second operand 28 states. [2018-09-18 10:04:37,603 WARN L178 SmtUtils]: Spent 327.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 11 [2018-09-18 10:04:38,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:38,667 INFO L93 Difference]: Finished difference Result 93 states and 95 transitions. [2018-09-18 10:04:38,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-18 10:04:38,667 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 78 [2018-09-18 10:04:38,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:38,669 INFO L225 Difference]: With dead ends: 93 [2018-09-18 10:04:38,669 INFO L226 Difference]: Without dead ends: 88 [2018-09-18 10:04:38,671 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 278 SyntacticMatches, 6 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 794 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=2153, Invalid=3853, Unknown=0, NotChecked=0, Total=6006 [2018-09-18 10:04:38,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-09-18 10:04:38,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-09-18 10:04:38,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-09-18 10:04:38,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 88 transitions. [2018-09-18 10:04:38,679 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 88 transitions. Word has length 78 [2018-09-18 10:04:38,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:38,679 INFO L480 AbstractCegarLoop]: Abstraction has 88 states and 88 transitions. [2018-09-18 10:04:38,679 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-09-18 10:04:38,679 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 88 transitions. [2018-09-18 10:04:38,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-09-18 10:04:38,681 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:38,681 INFO L376 BasicCegarLoop]: trace histogram [26, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:38,681 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:38,681 INFO L82 PathProgramCache]: Analyzing trace with hash -1949211389, now seen corresponding path program 9 times [2018-09-18 10:04:38,681 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:38,682 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:38,682 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:38,682 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:38,683 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:38,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:39,703 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:39,703 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:39,704 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:39,718 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:39,719 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:39,755 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 26 check-sat command(s) [2018-09-18 10:04:39,756 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:39,760 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:40,365 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:40,366 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:42,061 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:42,081 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:42,081 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:42,097 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:42,097 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:42,269 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 26 check-sat command(s) [2018-09-18 10:04:42,269 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:42,272 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:42,286 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:42,286 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:42,440 INFO L134 CoverageAnalysis]: Checked inductivity of 950 backedges. 0 proven. 950 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:42,442 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:42,442 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 56 [2018-09-18 10:04:42,442 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:42,442 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-18 10:04:42,443 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-18 10:04:42,444 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1064, Invalid=2016, Unknown=0, NotChecked=0, Total=3080 [2018-09-18 10:04:42,444 INFO L87 Difference]: Start difference. First operand 88 states and 88 transitions. Second operand 31 states. [2018-09-18 10:04:43,293 WARN L178 SmtUtils]: Spent 314.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 11 [2018-09-18 10:04:43,630 WARN L178 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 11 [2018-09-18 10:04:44,802 WARN L178 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 11 [2018-09-18 10:04:45,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:45,266 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2018-09-18 10:04:45,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-09-18 10:04:45,268 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 87 [2018-09-18 10:04:45,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:45,270 INFO L225 Difference]: With dead ends: 102 [2018-09-18 10:04:45,270 INFO L226 Difference]: Without dead ends: 97 [2018-09-18 10:04:45,272 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 402 GetRequests, 317 SyntacticMatches, 4 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 589 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=2500, Invalid=4306, Unknown=0, NotChecked=0, Total=6806 [2018-09-18 10:04:45,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-09-18 10:04:45,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2018-09-18 10:04:45,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-09-18 10:04:45,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 97 transitions. [2018-09-18 10:04:45,281 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 97 transitions. Word has length 87 [2018-09-18 10:04:45,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:45,281 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 97 transitions. [2018-09-18 10:04:45,281 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-18 10:04:45,281 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 97 transitions. [2018-09-18 10:04:45,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-09-18 10:04:45,283 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:45,283 INFO L376 BasicCegarLoop]: trace histogram [29, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:45,283 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:45,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1275395575, now seen corresponding path program 10 times [2018-09-18 10:04:45,284 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:45,288 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:45,288 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:45,288 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:45,288 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:45,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:46,019 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:46,019 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:46,019 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:46,027 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:46,027 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:46,064 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:46,064 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:46,077 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:46,197 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:46,197 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:47,751 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:47,772 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:47,772 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:47,790 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:47,790 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:47,834 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:47,834 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:47,838 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:48,278 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:48,279 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:48,791 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 0 proven. 1190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:48,793 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:48,793 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 81 [2018-09-18 10:04:48,793 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:48,794 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-09-18 10:04:48,794 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-09-18 10:04:48,796 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1909, Invalid=4571, Unknown=0, NotChecked=0, Total=6480 [2018-09-18 10:04:48,797 INFO L87 Difference]: Start difference. First operand 97 states and 97 transitions. Second operand 34 states. [2018-09-18 10:04:51,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:51,066 INFO L93 Difference]: Finished difference Result 111 states and 113 transitions. [2018-09-18 10:04:51,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-09-18 10:04:51,067 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 96 [2018-09-18 10:04:51,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:51,068 INFO L225 Difference]: With dead ends: 111 [2018-09-18 10:04:51,068 INFO L226 Difference]: Without dead ends: 106 [2018-09-18 10:04:51,071 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 444 GetRequests, 330 SyntacticMatches, 6 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2255 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=3944, Invalid=8046, Unknown=0, NotChecked=0, Total=11990 [2018-09-18 10:04:51,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-09-18 10:04:51,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-09-18 10:04:51,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-09-18 10:04:51,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 106 transitions. [2018-09-18 10:04:51,078 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 106 transitions. Word has length 96 [2018-09-18 10:04:51,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:51,079 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 106 transitions. [2018-09-18 10:04:51,079 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-09-18 10:04:51,079 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 106 transitions. [2018-09-18 10:04:51,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-09-18 10:04:51,080 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:51,080 INFO L376 BasicCegarLoop]: trace histogram [32, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:51,081 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:51,081 INFO L82 PathProgramCache]: Analyzing trace with hash -2040776829, now seen corresponding path program 11 times [2018-09-18 10:04:51,081 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:51,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:51,082 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:51,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:51,082 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:51,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:52,643 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:52,643 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:52,643 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:52,651 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:52,651 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:52,720 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 32 check-sat command(s) [2018-09-18 10:04:52,720 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:52,730 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:52,871 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:52,871 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:54,522 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:54,542 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:54,542 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:54,558 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:54,558 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:54,747 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 32 check-sat command(s) [2018-09-18 10:04:54,747 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:54,751 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:54,774 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:54,774 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:54,974 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 0 proven. 1457 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:54,975 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:54,975 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 68 [2018-09-18 10:04:54,975 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:54,978 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-09-18 10:04:54,979 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-09-18 10:04:54,980 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1595, Invalid=2961, Unknown=0, NotChecked=0, Total=4556 [2018-09-18 10:04:54,981 INFO L87 Difference]: Start difference. First operand 106 states and 106 transitions. Second operand 37 states. [2018-09-18 10:04:57,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:57,606 INFO L93 Difference]: Finished difference Result 120 states and 122 transitions. [2018-09-18 10:04:57,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-09-18 10:04:57,607 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 105 [2018-09-18 10:04:57,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:57,608 INFO L225 Difference]: With dead ends: 120 [2018-09-18 10:04:57,608 INFO L226 Difference]: Without dead ends: 115 [2018-09-18 10:04:57,611 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 486 GetRequests, 383 SyntacticMatches, 4 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 820 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=3745, Invalid=6355, Unknown=0, NotChecked=0, Total=10100 [2018-09-18 10:04:57,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-09-18 10:04:57,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-09-18 10:04:57,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-09-18 10:04:57,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 115 transitions. [2018-09-18 10:04:57,619 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 115 transitions. Word has length 105 [2018-09-18 10:04:57,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:57,619 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 115 transitions. [2018-09-18 10:04:57,619 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-09-18 10:04:57,619 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 115 transitions. [2018-09-18 10:04:57,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-09-18 10:04:57,622 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:57,623 INFO L376 BasicCegarLoop]: trace histogram [35, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:57,623 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:57,623 INFO L82 PathProgramCache]: Analyzing trace with hash -264307849, now seen corresponding path program 12 times [2018-09-18 10:04:57,623 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:57,624 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:57,624 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:57,624 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:57,624 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:57,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:58,447 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:58,448 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:58,448 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:58,455 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:58,455 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:58,535 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 35 check-sat command(s) [2018-09-18 10:04:58,536 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:58,539 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:58,675 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:58,675 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:00,439 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:00,460 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:00,460 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:00,476 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:05:00,477 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:05:00,721 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 35 check-sat command(s) [2018-09-18 10:05:00,721 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:00,725 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:00,746 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:00,746 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:00,908 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 0 proven. 1751 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:00,910 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:00,910 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 74 [2018-09-18 10:05:00,910 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:00,911 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-09-18 10:05:00,912 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-09-18 10:05:00,913 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1901, Invalid=3501, Unknown=0, NotChecked=0, Total=5402 [2018-09-18 10:05:00,913 INFO L87 Difference]: Start difference. First operand 115 states and 115 transitions. Second operand 40 states. [2018-09-18 10:05:04,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:04,029 INFO L93 Difference]: Finished difference Result 129 states and 131 transitions. [2018-09-18 10:05:04,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-09-18 10:05:04,030 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 114 [2018-09-18 10:05:04,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:04,031 INFO L225 Difference]: With dead ends: 129 [2018-09-18 10:05:04,031 INFO L226 Difference]: Without dead ends: 124 [2018-09-18 10:05:04,033 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 528 GetRequests, 416 SyntacticMatches, 4 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 949 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=4462, Invalid=7528, Unknown=0, NotChecked=0, Total=11990 [2018-09-18 10:05:04,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-09-18 10:05:04,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-09-18 10:05:04,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-09-18 10:05:04,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 124 transitions. [2018-09-18 10:05:04,040 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 124 transitions. Word has length 114 [2018-09-18 10:05:04,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:04,041 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 124 transitions. [2018-09-18 10:05:04,041 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-09-18 10:05:04,041 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 124 transitions. [2018-09-18 10:05:04,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-09-18 10:05:04,042 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:04,042 INFO L376 BasicCegarLoop]: trace histogram [38, 37, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:04,043 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:04,043 INFO L82 PathProgramCache]: Analyzing trace with hash 1271360003, now seen corresponding path program 13 times [2018-09-18 10:05:04,043 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:04,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:04,044 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:05:04,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:04,044 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:04,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:04,999 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:05,000 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:05,000 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:05,007 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:05:05,007 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:05:05,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:05,148 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:05,302 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:05,303 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:07,663 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:07,683 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:07,683 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:07,698 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:05:07,698 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:05:07,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:07,771 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:07,802 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:07,802 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:08,060 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 0 proven. 2072 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:08,062 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:08,062 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 80 [2018-09-18 10:05:08,062 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:08,063 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-09-18 10:05:08,063 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-09-18 10:05:08,064 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2234, Invalid=4086, Unknown=0, NotChecked=0, Total=6320 [2018-09-18 10:05:08,064 INFO L87 Difference]: Start difference. First operand 124 states and 124 transitions. Second operand 43 states. [2018-09-18 10:05:11,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:11,829 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-09-18 10:05:11,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-09-18 10:05:11,829 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 123 [2018-09-18 10:05:11,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:11,830 INFO L225 Difference]: With dead ends: 138 [2018-09-18 10:05:11,830 INFO L226 Difference]: Without dead ends: 133 [2018-09-18 10:05:11,832 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 570 GetRequests, 449 SyntacticMatches, 4 SemanticMatches, 117 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1087 ImplicationChecksByTransitivity, 6.9s TimeCoverageRelationStatistics Valid=5242, Invalid=8800, Unknown=0, NotChecked=0, Total=14042 [2018-09-18 10:05:11,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-09-18 10:05:11,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-09-18 10:05:11,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-09-18 10:05:11,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 133 transitions. [2018-09-18 10:05:11,839 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 133 transitions. Word has length 123 [2018-09-18 10:05:11,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:11,840 INFO L480 AbstractCegarLoop]: Abstraction has 133 states and 133 transitions. [2018-09-18 10:05:11,840 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-09-18 10:05:11,840 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 133 transitions. [2018-09-18 10:05:11,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-09-18 10:05:11,841 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:11,841 INFO L376 BasicCegarLoop]: trace histogram [41, 40, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:11,841 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:11,842 INFO L82 PathProgramCache]: Analyzing trace with hash -1878746889, now seen corresponding path program 14 times [2018-09-18 10:05:11,842 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:11,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:11,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:05:11,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:11,843 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:11,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:13,056 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:13,056 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:13,056 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:13,066 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:05:13,066 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:05:13,188 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:05:13,188 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:13,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:13,383 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:13,384 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:15,844 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:15,864 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:15,864 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:15,879 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:05:15,879 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:05:15,966 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:05:15,966 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:15,970 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:16,160 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:16,160 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:16,403 INFO L134 CoverageAnalysis]: Checked inductivity of 2420 backedges. 0 proven. 2420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:16,405 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:16,406 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44, 44, 44, 44] total 91 [2018-09-18 10:05:16,406 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:16,406 INFO L459 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-09-18 10:05:16,406 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-09-18 10:05:16,407 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2827, Invalid=5363, Unknown=0, NotChecked=0, Total=8190 [2018-09-18 10:05:16,407 INFO L87 Difference]: Start difference. First operand 133 states and 133 transitions. Second operand 46 states. [2018-09-18 10:05:20,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:20,954 INFO L93 Difference]: Finished difference Result 147 states and 149 transitions. [2018-09-18 10:05:20,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-09-18 10:05:20,955 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 132 [2018-09-18 10:05:20,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:20,956 INFO L225 Difference]: With dead ends: 147 [2018-09-18 10:05:20,956 INFO L226 Difference]: Without dead ends: 142 [2018-09-18 10:05:20,958 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 612 GetRequests, 476 SyntacticMatches, 6 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1757 ImplicationChecksByTransitivity, 8.1s TimeCoverageRelationStatistics Valid=6392, Invalid=10900, Unknown=0, NotChecked=0, Total=17292 [2018-09-18 10:05:20,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-09-18 10:05:20,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-09-18 10:05:20,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-09-18 10:05:20,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 142 transitions. [2018-09-18 10:05:20,966 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 142 transitions. Word has length 132 [2018-09-18 10:05:20,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:20,966 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 142 transitions. [2018-09-18 10:05:20,966 INFO L481 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-09-18 10:05:20,966 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 142 transitions. [2018-09-18 10:05:20,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-09-18 10:05:20,968 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:20,968 INFO L376 BasicCegarLoop]: trace histogram [44, 43, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:20,968 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:20,968 INFO L82 PathProgramCache]: Analyzing trace with hash -927269757, now seen corresponding path program 15 times [2018-09-18 10:05:20,969 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:20,969 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:20,969 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:05:20,969 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:20,970 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:21,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:22,239 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:22,239 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:22,239 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:22,248 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:05:22,249 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:05:22,303 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 44 check-sat command(s) [2018-09-18 10:05:22,304 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:22,308 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:22,500 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:22,500 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:25,256 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:25,277 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:25,278 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:25,293 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:05:25,293 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:05:25,639 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 44 check-sat command(s) [2018-09-18 10:05:25,639 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:25,644 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:25,687 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:25,687 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:25,915 INFO L134 CoverageAnalysis]: Checked inductivity of 2795 backedges. 0 proven. 2795 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:25,917 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:25,917 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47, 47, 47] total 92 [2018-09-18 10:05:25,917 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:25,917 INFO L459 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-09-18 10:05:25,918 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-09-18 10:05:25,918 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2981, Invalid=5391, Unknown=0, NotChecked=0, Total=8372 [2018-09-18 10:05:25,918 INFO L87 Difference]: Start difference. First operand 142 states and 142 transitions. Second operand 49 states. [2018-09-18 10:05:31,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:31,179 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2018-09-18 10:05:31,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-09-18 10:05:31,179 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 141 [2018-09-18 10:05:31,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:31,181 INFO L225 Difference]: With dead ends: 156 [2018-09-18 10:05:31,181 INFO L226 Difference]: Without dead ends: 151 [2018-09-18 10:05:31,183 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 654 GetRequests, 515 SyntacticMatches, 4 SemanticMatches, 135 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1390 ImplicationChecksByTransitivity, 8.9s TimeCoverageRelationStatistics Valid=6991, Invalid=11641, Unknown=0, NotChecked=0, Total=18632 [2018-09-18 10:05:31,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-09-18 10:05:31,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-09-18 10:05:31,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-09-18 10:05:31,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 151 transitions. [2018-09-18 10:05:31,189 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 151 transitions. Word has length 141 [2018-09-18 10:05:31,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:31,190 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 151 transitions. [2018-09-18 10:05:31,190 INFO L481 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-09-18 10:05:31,190 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 151 transitions. [2018-09-18 10:05:31,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2018-09-18 10:05:31,191 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:31,192 INFO L376 BasicCegarLoop]: trace histogram [47, 46, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:31,192 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:31,192 INFO L82 PathProgramCache]: Analyzing trace with hash -72493449, now seen corresponding path program 16 times [2018-09-18 10:05:31,192 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:31,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:31,193 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:05:31,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:31,193 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:31,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:32,798 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:32,798 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:32,798 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:32,808 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:05:32,808 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:05:32,869 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:05:32,869 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:32,886 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:33,035 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:33,035 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:36,200 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:36,221 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:36,222 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:36,240 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:05:36,241 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:05:36,305 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:05:36,305 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:36,310 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:36,768 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:36,769 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:37,307 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:37,310 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:37,310 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 109 [2018-09-18 10:05:37,310 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:37,311 INFO L459 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-09-18 10:05:37,311 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-09-18 10:05:37,312 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3868, Invalid=7904, Unknown=0, NotChecked=0, Total=11772 [2018-09-18 10:05:37,312 INFO L87 Difference]: Start difference. First operand 151 states and 151 transitions. Second operand 52 states. [2018-09-18 10:05:37,680 WARN L178 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 138 DAG size of output: 8 [2018-09-18 10:05:37,818 WARN L178 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 141 DAG size of output: 8 [2018-09-18 10:05:37,950 WARN L178 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 147 DAG size of output: 9 [2018-09-18 10:05:38,092 WARN L178 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-09-18 10:05:43,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:43,784 INFO L93 Difference]: Finished difference Result 165 states and 167 transitions. [2018-09-18 10:05:43,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-09-18 10:05:43,784 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 150 [2018-09-18 10:05:43,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:43,785 INFO L225 Difference]: With dead ends: 165 [2018-09-18 10:05:43,785 INFO L226 Difference]: Without dead ends: 160 [2018-09-18 10:05:43,787 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 696 GetRequests, 536 SyntacticMatches, 6 SemanticMatches, 154 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2906 ImplicationChecksByTransitivity, 11.3s TimeCoverageRelationStatistics Valid=8657, Invalid=15523, Unknown=0, NotChecked=0, Total=24180 [2018-09-18 10:05:43,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-09-18 10:05:43,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2018-09-18 10:05:43,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-09-18 10:05:43,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 160 transitions. [2018-09-18 10:05:43,792 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 160 transitions. Word has length 150 [2018-09-18 10:05:43,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:43,793 INFO L480 AbstractCegarLoop]: Abstraction has 160 states and 160 transitions. [2018-09-18 10:05:43,793 INFO L481 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-09-18 10:05:43,793 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 160 transitions. [2018-09-18 10:05:43,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-09-18 10:05:43,794 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:43,794 INFO L376 BasicCegarLoop]: trace histogram [50, 49, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:43,794 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:43,794 INFO L82 PathProgramCache]: Analyzing trace with hash 266268419, now seen corresponding path program 17 times [2018-09-18 10:05:43,794 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:43,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:43,795 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:05:43,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:43,795 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:43,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:45,413 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:45,413 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:45,413 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:45,428 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:05:45,428 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:05:45,712 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 50 check-sat command(s) [2018-09-18 10:05:45,712 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:45,733 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:45,946 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:45,946 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:50,049 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:50,081 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:50,081 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:50,108 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:05:50,108 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:05:50,537 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 50 check-sat command(s) [2018-09-18 10:05:50,538 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:50,543 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:50,588 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:50,588 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:50,812 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 0 proven. 3626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:50,814 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:50,814 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53, 53, 53, 53] total 104 [2018-09-18 10:05:50,814 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:50,815 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-09-18 10:05:50,816 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-09-18 10:05:50,816 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3836, Invalid=6876, Unknown=0, NotChecked=0, Total=10712 [2018-09-18 10:05:50,817 INFO L87 Difference]: Start difference. First operand 160 states and 160 transitions. Second operand 55 states. [2018-09-18 10:05:51,005 WARN L178 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 147 DAG size of output: 8 [2018-09-18 10:05:51,241 WARN L178 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 156 DAG size of output: 9 [2018-09-18 10:05:51,370 WARN L178 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-09-18 10:05:51,513 WARN L178 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-09-18 10:05:51,649 WARN L178 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-09-18 10:05:51,797 WARN L178 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-09-18 10:05:51,945 WARN L178 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 143 DAG size of output: 11 [2018-09-18 10:05:52,857 WARN L178 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 125 DAG size of output: 11 [2018-09-18 10:05:57,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:57,573 INFO L93 Difference]: Finished difference Result 174 states and 176 transitions. [2018-09-18 10:05:57,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-09-18 10:05:57,574 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 159 [2018-09-18 10:05:57,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:57,575 INFO L225 Difference]: With dead ends: 174 [2018-09-18 10:05:57,575 INFO L226 Difference]: Without dead ends: 169 [2018-09-18 10:05:57,576 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 738 GetRequests, 581 SyntacticMatches, 4 SemanticMatches, 153 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1729 ImplicationChecksByTransitivity, 12.1s TimeCoverageRelationStatistics Valid=8992, Invalid=14878, Unknown=0, NotChecked=0, Total=23870 [2018-09-18 10:05:57,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-09-18 10:05:57,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2018-09-18 10:05:57,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-09-18 10:05:57,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 169 transitions. [2018-09-18 10:05:57,584 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 169 transitions. Word has length 159 [2018-09-18 10:05:57,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:57,584 INFO L480 AbstractCegarLoop]: Abstraction has 169 states and 169 transitions. [2018-09-18 10:05:57,584 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-09-18 10:05:57,584 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 169 transitions. [2018-09-18 10:05:57,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-09-18 10:05:57,585 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:57,586 INFO L376 BasicCegarLoop]: trace histogram [53, 52, 52, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:57,586 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:57,586 INFO L82 PathProgramCache]: Analyzing trace with hash -1651330057, now seen corresponding path program 18 times [2018-09-18 10:05:57,586 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:57,587 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:57,587 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:05:57,587 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:57,587 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:57,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:59,520 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:59,521 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:59,521 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:59,529 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:05:59,529 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:05:59,590 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 53 check-sat command(s) [2018-09-18 10:05:59,590 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:59,597 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:59,878 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:05:59,879 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:06:04,270 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:04,290 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:06:04,290 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:06:04,305 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:06:04,306 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:06:04,806 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 53 check-sat command(s) [2018-09-18 10:06:04,807 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:06:04,813 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:06:04,865 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:04,866 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:06:06,079 INFO L134 CoverageAnalysis]: Checked inductivity of 4082 backedges. 0 proven. 4082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:06,080 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:06:06,081 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56, 56, 56, 56] total 110 [2018-09-18 10:06:06,081 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:06:06,082 INFO L459 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-09-18 10:06:06,083 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-09-18 10:06:06,083 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=4304, Invalid=7686, Unknown=0, NotChecked=0, Total=11990 [2018-09-18 10:06:06,084 INFO L87 Difference]: Start difference. First operand 169 states and 169 transitions. Second operand 58 states. [2018-09-18 10:06:06,279 WARN L178 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 156 DAG size of output: 8 [2018-09-18 10:06:06,406 WARN L178 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 159 DAG size of output: 8 [2018-09-18 10:06:06,547 WARN L178 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 165 DAG size of output: 9 [2018-09-18 10:06:06,690 WARN L178 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-09-18 10:06:06,837 WARN L178 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-09-18 10:06:06,983 WARN L178 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-09-18 10:06:07,135 WARN L178 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-09-18 10:06:07,295 WARN L178 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-09-18 10:06:07,444 WARN L178 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-09-18 10:06:08,290 WARN L178 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 11 [2018-09-18 10:06:08,473 WARN L178 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 131 DAG size of output: 11 [2018-09-18 10:06:14,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:06:14,064 INFO L93 Difference]: Finished difference Result 183 states and 185 transitions. [2018-09-18 10:06:14,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-09-18 10:06:14,064 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 168 [2018-09-18 10:06:14,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:06:14,065 INFO L225 Difference]: With dead ends: 183 [2018-09-18 10:06:14,066 INFO L226 Difference]: Without dead ends: 178 [2018-09-18 10:06:14,067 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 780 GetRequests, 614 SyntacticMatches, 4 SemanticMatches, 162 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1912 ImplicationChecksByTransitivity, 14.8s TimeCoverageRelationStatistics Valid=10087, Invalid=16645, Unknown=0, NotChecked=0, Total=26732 [2018-09-18 10:06:14,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-09-18 10:06:14,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2018-09-18 10:06:14,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-09-18 10:06:14,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 178 transitions. [2018-09-18 10:06:14,075 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 178 transitions. Word has length 168 [2018-09-18 10:06:14,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:06:14,075 INFO L480 AbstractCegarLoop]: Abstraction has 178 states and 178 transitions. [2018-09-18 10:06:14,075 INFO L481 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-09-18 10:06:14,075 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 178 transitions. [2018-09-18 10:06:14,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2018-09-18 10:06:14,076 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:06:14,077 INFO L376 BasicCegarLoop]: trace histogram [56, 55, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:06:14,077 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:06:14,077 INFO L82 PathProgramCache]: Analyzing trace with hash -639942269, now seen corresponding path program 19 times [2018-09-18 10:06:14,077 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:06:14,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:06:14,078 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:06:14,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:06:14,078 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:06:14,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:06:16,381 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:16,381 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:06:16,381 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:06:16,396 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:06:16,397 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:06:16,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:06:16,825 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:06:17,048 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:17,048 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:06:21,996 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:22,017 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:06:22,018 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:06:22,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:06:22,034 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:06:22,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:06:22,181 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:06:22,237 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:22,237 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:06:22,528 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 0 proven. 4565 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:22,530 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:06:22,530 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59, 59, 59, 59] total 116 [2018-09-18 10:06:22,530 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:06:22,531 INFO L459 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-09-18 10:06:22,531 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-09-18 10:06:22,532 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=4799, Invalid=8541, Unknown=0, NotChecked=0, Total=13340 [2018-09-18 10:06:22,532 INFO L87 Difference]: Start difference. First operand 178 states and 178 transitions. Second operand 61 states. [2018-09-18 10:06:22,754 WARN L178 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 165 DAG size of output: 8 [2018-09-18 10:06:22,884 WARN L178 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 168 DAG size of output: 8 [2018-09-18 10:06:23,043 WARN L178 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 174 DAG size of output: 9 [2018-09-18 10:06:23,200 WARN L178 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-09-18 10:06:23,366 WARN L178 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-09-18 10:06:23,548 WARN L178 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 [2018-09-18 10:06:23,738 WARN L178 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-09-18 10:06:23,934 WARN L178 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-09-18 10:06:24,099 WARN L178 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-09-18 10:06:24,270 WARN L178 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-09-18 10:06:24,447 WARN L178 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-09-18 10:06:24,624 WARN L178 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-09-18 10:06:24,799 WARN L178 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-09-18 10:06:31,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:06:31,567 INFO L93 Difference]: Finished difference Result 192 states and 194 transitions. [2018-09-18 10:06:31,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-09-18 10:06:31,567 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 177 [2018-09-18 10:06:31,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:06:31,569 INFO L225 Difference]: With dead ends: 192 [2018-09-18 10:06:31,569 INFO L226 Difference]: Without dead ends: 187 [2018-09-18 10:06:31,570 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 822 GetRequests, 647 SyntacticMatches, 4 SemanticMatches, 171 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2104 ImplicationChecksByTransitivity, 15.8s TimeCoverageRelationStatistics Valid=11245, Invalid=18511, Unknown=0, NotChecked=0, Total=29756 [2018-09-18 10:06:31,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-09-18 10:06:31,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 187. [2018-09-18 10:06:31,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-09-18 10:06:31,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 187 transitions. [2018-09-18 10:06:31,578 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 187 transitions. Word has length 177 [2018-09-18 10:06:31,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:06:31,578 INFO L480 AbstractCegarLoop]: Abstraction has 187 states and 187 transitions. [2018-09-18 10:06:31,578 INFO L481 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-09-18 10:06:31,578 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 187 transitions. [2018-09-18 10:06:31,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2018-09-18 10:06:31,579 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:06:31,579 INFO L376 BasicCegarLoop]: trace histogram [59, 58, 58, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:06:31,579 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:06:31,580 INFO L82 PathProgramCache]: Analyzing trace with hash -99929737, now seen corresponding path program 20 times [2018-09-18 10:06:31,580 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:06:31,580 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:06:31,580 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:06:31,580 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:06:31,581 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:06:31,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:06:33,765 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:33,766 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:06:33,766 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:06:33,773 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:06:33,773 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:06:34,061 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:06:34,061 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:06:34,238 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:06:34,433 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:34,433 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:06:39,634 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:39,656 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:06:39,656 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:06:39,671 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:06:39,672 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:06:39,831 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:06:39,831 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:06:39,836 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:06:40,099 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:40,099 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:06:40,484 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 0 proven. 5075 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:40,486 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:06:40,486 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62, 62, 62, 62] total 127 [2018-09-18 10:06:40,486 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:06:40,486 INFO L459 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-09-18 10:06:40,487 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-09-18 10:06:40,487 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=5644, Invalid=10358, Unknown=0, NotChecked=0, Total=16002 [2018-09-18 10:06:40,487 INFO L87 Difference]: Start difference. First operand 187 states and 187 transitions. Second operand 64 states. [2018-09-18 10:06:40,706 WARN L178 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 174 DAG size of output: 8 [2018-09-18 10:06:40,846 WARN L178 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 177 DAG size of output: 8 [2018-09-18 10:06:41,022 WARN L178 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 183 DAG size of output: 9 [2018-09-18 10:06:41,195 WARN L178 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 182 DAG size of output: 11 [2018-09-18 10:06:41,370 WARN L178 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 179 DAG size of output: 11 [2018-09-18 10:06:41,553 WARN L178 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 176 DAG size of output: 11 [2018-09-18 10:06:41,745 WARN L178 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-09-18 10:06:41,930 WARN L178 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-09-18 10:06:42,125 WARN L178 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 [2018-09-18 10:06:42,316 WARN L178 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-09-18 10:06:42,517 WARN L178 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-09-18 10:06:42,706 WARN L178 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-09-18 10:06:42,897 WARN L178 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-09-18 10:06:43,110 WARN L178 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-09-18 10:06:43,311 WARN L178 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-09-18 10:06:43,540 WARN L178 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-09-18 10:06:44,186 WARN L178 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 137 DAG size of output: 11 [2018-09-18 10:06:44,402 WARN L178 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 11 [2018-09-18 10:06:50,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:06:50,838 INFO L93 Difference]: Finished difference Result 201 states and 203 transitions. [2018-09-18 10:06:50,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-09-18 10:06:50,839 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 186 [2018-09-18 10:06:50,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:06:50,840 INFO L225 Difference]: With dead ends: 201 [2018-09-18 10:06:50,840 INFO L226 Difference]: Without dead ends: 196 [2018-09-18 10:06:50,841 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 864 GetRequests, 674 SyntacticMatches, 6 SemanticMatches, 184 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3044 ImplicationChecksByTransitivity, 17.4s TimeCoverageRelationStatistics Valid=12899, Invalid=21511, Unknown=0, NotChecked=0, Total=34410 [2018-09-18 10:06:50,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-09-18 10:06:50,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2018-09-18 10:06:50,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-09-18 10:06:50,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 196 transitions. [2018-09-18 10:06:50,849 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 196 transitions. Word has length 186 [2018-09-18 10:06:50,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:06:50,849 INFO L480 AbstractCegarLoop]: Abstraction has 196 states and 196 transitions. [2018-09-18 10:06:50,850 INFO L481 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-09-18 10:06:50,850 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 196 transitions. [2018-09-18 10:06:50,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2018-09-18 10:06:50,851 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:06:50,851 INFO L376 BasicCegarLoop]: trace histogram [62, 61, 61, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:06:50,851 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:06:50,851 INFO L82 PathProgramCache]: Analyzing trace with hash 89650179, now seen corresponding path program 21 times [2018-09-18 10:06:50,851 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:06:50,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:06:50,852 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:06:50,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:06:50,852 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:06:51,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:06:53,118 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:53,119 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:06:53,119 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:06:53,128 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:06:53,128 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:06:53,195 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 62 check-sat command(s) [2018-09-18 10:06:53,195 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:06:53,203 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:06:53,421 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:53,422 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:06:59,015 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:59,037 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:06:59,037 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:06:59,052 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:06:59,052 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:06:59,681 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 62 check-sat command(s) [2018-09-18 10:06:59,682 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:06:59,687 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:06:59,758 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:06:59,759 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:07:00,018 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 0 proven. 5612 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:00,020 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:07:00,020 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65, 65, 65, 65] total 128 [2018-09-18 10:07:00,020 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:07:00,021 INFO L459 AbstractCegarLoop]: Interpolant automaton has 67 states [2018-09-18 10:07:00,021 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2018-09-18 10:07:00,022 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=5870, Invalid=10386, Unknown=0, NotChecked=0, Total=16256 [2018-09-18 10:07:00,022 INFO L87 Difference]: Start difference. First operand 196 states and 196 transitions. Second operand 67 states. [2018-09-18 10:07:00,262 WARN L178 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 183 DAG size of output: 8 [2018-09-18 10:07:00,418 WARN L178 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 186 DAG size of output: 8 [2018-09-18 10:07:00,588 WARN L178 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 192 DAG size of output: 9 [2018-09-18 10:07:00,766 WARN L178 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 191 DAG size of output: 11 [2018-09-18 10:07:00,955 WARN L178 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 188 DAG size of output: 11 [2018-09-18 10:07:01,140 WARN L178 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 185 DAG size of output: 11 [2018-09-18 10:07:01,325 WARN L178 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 182 DAG size of output: 11 [2018-09-18 10:07:01,532 WARN L178 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 179 DAG size of output: 11 [2018-09-18 10:07:01,734 WARN L178 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 176 DAG size of output: 11 [2018-09-18 10:07:01,931 WARN L178 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-09-18 10:07:02,135 WARN L178 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-09-18 10:07:02,353 WARN L178 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 [2018-09-18 10:07:02,564 WARN L178 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-09-18 10:07:02,777 WARN L178 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-09-18 10:07:02,987 WARN L178 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-09-18 10:07:03,211 WARN L178 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-09-18 10:07:03,432 WARN L178 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-09-18 10:07:03,807 WARN L178 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-09-18 10:07:04,011 WARN L178 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-09-18 10:07:04,227 WARN L178 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 143 DAG size of output: 11 [2018-09-18 10:07:04,464 WARN L178 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 140 DAG size of output: 11 [2018-09-18 10:07:04,706 WARN L178 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 137 DAG size of output: 11 [2018-09-18 10:07:11,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:07:11,637 INFO L93 Difference]: Finished difference Result 210 states and 212 transitions. [2018-09-18 10:07:11,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-09-18 10:07:11,638 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 195 [2018-09-18 10:07:11,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:07:11,639 INFO L225 Difference]: With dead ends: 210 [2018-09-18 10:07:11,639 INFO L226 Difference]: Without dead ends: 205 [2018-09-18 10:07:11,640 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 906 GetRequests, 713 SyntacticMatches, 4 SemanticMatches, 189 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2515 ImplicationChecksByTransitivity, 18.9s TimeCoverageRelationStatistics Valid=13750, Invalid=22540, Unknown=0, NotChecked=0, Total=36290 [2018-09-18 10:07:11,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-09-18 10:07:11,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 205. [2018-09-18 10:07:11,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-09-18 10:07:11,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 205 transitions. [2018-09-18 10:07:11,646 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 205 transitions. Word has length 195 [2018-09-18 10:07:11,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:07:11,647 INFO L480 AbstractCegarLoop]: Abstraction has 205 states and 205 transitions. [2018-09-18 10:07:11,647 INFO L481 AbstractCegarLoop]: Interpolant automaton has 67 states. [2018-09-18 10:07:11,647 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 205 transitions. [2018-09-18 10:07:11,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-09-18 10:07:11,648 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:07:11,648 INFO L376 BasicCegarLoop]: trace histogram [65, 64, 64, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:07:11,648 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:07:11,648 INFO L82 PathProgramCache]: Analyzing trace with hash 795823863, now seen corresponding path program 22 times [2018-09-18 10:07:11,648 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:07:11,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:07:11,649 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:07:11,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:07:11,649 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:07:11,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:07:14,290 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:14,290 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:07:14,290 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:07:14,299 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:07:14,299 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:07:14,562 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:07:14,562 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:07:14,712 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:07:15,141 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:15,141 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:07:21,246 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:21,268 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:07:21,269 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:07:21,284 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:07:21,284 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:07:21,382 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:07:21,382 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:07:21,390 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:07:24,023 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:24,023 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:07:26,407 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 0 proven. 6176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:26,408 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:07:26,409 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 68, 68, 68, 68] total 181 [2018-09-18 10:07:26,409 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:07:26,409 INFO L459 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-09-18 10:07:26,410 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-09-18 10:07:26,410 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=9403, Invalid=23177, Unknown=0, NotChecked=0, Total=32580 [2018-09-18 10:07:26,410 INFO L87 Difference]: Start difference. First operand 205 states and 205 transitions. Second operand 70 states. [2018-09-18 10:07:26,699 WARN L178 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 192 DAG size of output: 8 [2018-09-18 10:07:26,869 WARN L178 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 195 DAG size of output: 8 [2018-09-18 10:07:27,129 WARN L178 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 201 DAG size of output: 9 [2018-09-18 10:07:27,394 WARN L178 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 200 DAG size of output: 11 [2018-09-18 10:07:27,661 WARN L178 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 197 DAG size of output: 11 [2018-09-18 10:07:27,920 WARN L178 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 194 DAG size of output: 11 [2018-09-18 10:07:28,197 WARN L178 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 191 DAG size of output: 11 [2018-09-18 10:07:28,474 WARN L178 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 188 DAG size of output: 11 [2018-09-18 10:07:28,761 WARN L178 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 185 DAG size of output: 11 [2018-09-18 10:07:29,038 WARN L178 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 182 DAG size of output: 11 [2018-09-18 10:07:29,318 WARN L178 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 179 DAG size of output: 11 [2018-09-18 10:07:29,608 WARN L178 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 176 DAG size of output: 11 [2018-09-18 10:07:29,886 WARN L178 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-09-18 10:07:30,206 WARN L178 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-09-18 10:07:30,539 WARN L178 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 [2018-09-18 10:07:30,822 WARN L178 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-09-18 10:07:31,102 WARN L178 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-09-18 10:07:31,378 WARN L178 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-09-18 10:07:31,650 WARN L178 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-09-18 10:07:31,924 WARN L178 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-09-18 10:07:33,030 WARN L178 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 140 DAG size of output: 11 [2018-09-18 10:07:40,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:07:40,984 INFO L93 Difference]: Finished difference Result 219 states and 221 transitions. [2018-09-18 10:07:40,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-09-18 10:07:40,984 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 204 [2018-09-18 10:07:40,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:07:40,986 INFO L225 Difference]: With dead ends: 219 [2018-09-18 10:07:40,986 INFO L226 Difference]: Without dead ends: 214 [2018-09-18 10:07:40,988 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 948 GetRequests, 698 SyntacticMatches, 6 SemanticMatches, 244 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11294 ImplicationChecksByTransitivity, 27.5s TimeCoverageRelationStatistics Valid=19709, Invalid=40561, Unknown=0, NotChecked=0, Total=60270 [2018-09-18 10:07:40,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-09-18 10:07:40,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2018-09-18 10:07:40,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-09-18 10:07:40,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 214 transitions. [2018-09-18 10:07:40,998 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 214 transitions. Word has length 204 [2018-09-18 10:07:40,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:07:40,999 INFO L480 AbstractCegarLoop]: Abstraction has 214 states and 214 transitions. [2018-09-18 10:07:40,999 INFO L481 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-09-18 10:07:40,999 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 214 transitions. [2018-09-18 10:07:41,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2018-09-18 10:07:41,000 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:07:41,000 INFO L376 BasicCegarLoop]: trace histogram [68, 67, 67, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:07:41,000 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:07:41,000 INFO L82 PathProgramCache]: Analyzing trace with hash 385681027, now seen corresponding path program 23 times [2018-09-18 10:07:41,001 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:07:41,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:07:41,001 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:07:41,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:07:41,002 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:07:41,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:07:43,720 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:43,720 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:07:43,720 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:07:43,728 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:07:43,728 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:07:44,157 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 68 check-sat command(s) [2018-09-18 10:07:44,157 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:07:44,205 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:07:44,432 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:44,432 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:07:51,546 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:51,566 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:07:51,567 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:07:51,581 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:07:51,581 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:07:52,460 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 68 check-sat command(s) [2018-09-18 10:07:52,460 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:07:52,470 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:07:52,533 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:52,533 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:07:52,759 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 0 proven. 6767 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:07:52,760 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:07:52,761 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [71, 71, 71, 71, 71] total 140 [2018-09-18 10:07:52,761 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:07:52,761 INFO L459 AbstractCegarLoop]: Interpolant automaton has 73 states [2018-09-18 10:07:52,762 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2018-09-18 10:07:52,763 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=7049, Invalid=12411, Unknown=0, NotChecked=0, Total=19460 [2018-09-18 10:07:52,763 INFO L87 Difference]: Start difference. First operand 214 states and 214 transitions. Second operand 73 states. [2018-09-18 10:07:53,336 WARN L178 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 201 DAG size of output: 8 [2018-09-18 10:07:53,512 WARN L178 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 204 DAG size of output: 8 [2018-09-18 10:07:53,707 WARN L178 SmtUtils]: Spent 177.00 ms on a formula simplification. DAG size of input: 210 DAG size of output: 9 [2018-09-18 10:07:53,912 WARN L178 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 209 DAG size of output: 11 [2018-09-18 10:07:54,141 WARN L178 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 206 DAG size of output: 11 [2018-09-18 10:07:54,372 WARN L178 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 203 DAG size of output: 11 [2018-09-18 10:07:54,580 WARN L178 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 200 DAG size of output: 11 [2018-09-18 10:07:54,804 WARN L178 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 197 DAG size of output: 11 [2018-09-18 10:07:55,115 WARN L178 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 194 DAG size of output: 11 [2018-09-18 10:07:55,348 WARN L178 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 191 DAG size of output: 11 [2018-09-18 10:07:55,580 WARN L178 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 188 DAG size of output: 11 [2018-09-18 10:07:55,841 WARN L178 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 185 DAG size of output: 11 [2018-09-18 10:07:56,107 WARN L178 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 182 DAG size of output: 11 [2018-09-18 10:07:56,341 WARN L178 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 179 DAG size of output: 11 [2018-09-18 10:07:56,587 WARN L178 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 176 DAG size of output: 11 [2018-09-18 10:07:56,837 WARN L178 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 173 DAG size of output: 11 [2018-09-18 10:07:57,081 WARN L178 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 170 DAG size of output: 11 [2018-09-18 10:07:57,332 WARN L178 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 11 [2018-09-18 10:07:57,572 WARN L178 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 164 DAG size of output: 11 [2018-09-18 10:07:57,833 WARN L178 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 11 [2018-09-18 10:07:58,065 WARN L178 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 158 DAG size of output: 11 [2018-09-18 10:07:58,308 WARN L178 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 155 DAG size of output: 11 [2018-09-18 10:07:58,544 WARN L178 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 152 DAG size of output: 11 [2018-09-18 10:07:58,792 WARN L178 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 149 DAG size of output: 11 [2018-09-18 10:07:59,024 WARN L178 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 146 DAG size of output: 11 [2018-09-18 10:07:59,269 WARN L178 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 143 DAG size of output: 11 [2018-09-18 10:08:01,135 WARN L178 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 119 DAG size of output: 11 [2018-09-18 10:08:08,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:08:08,973 INFO L93 Difference]: Finished difference Result 228 states and 230 transitions. [2018-09-18 10:08:08,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2018-09-18 10:08:08,975 INFO L78 Accepts]: Start accepts. Automaton has 73 states. Word has length 213 [2018-09-18 10:08:08,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:08:08,976 INFO L225 Difference]: With dead ends: 228 [2018-09-18 10:08:08,976 INFO L226 Difference]: Without dead ends: 223 [2018-09-18 10:08:08,978 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 990 GetRequests, 779 SyntacticMatches, 4 SemanticMatches, 207 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2962 ImplicationChecksByTransitivity, 24.8s TimeCoverageRelationStatistics Valid=16507, Invalid=26965, Unknown=0, NotChecked=0, Total=43472 [2018-09-18 10:08:08,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-09-18 10:08:08,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 223. [2018-09-18 10:08:08,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-09-18 10:08:08,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 223 transitions. [2018-09-18 10:08:08,987 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 223 transitions. Word has length 213 [2018-09-18 10:08:08,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:08:08,987 INFO L480 AbstractCegarLoop]: Abstraction has 223 states and 223 transitions. [2018-09-18 10:08:08,987 INFO L481 AbstractCegarLoop]: Interpolant automaton has 73 states. [2018-09-18 10:08:08,988 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 223 transitions. [2018-09-18 10:08:08,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2018-09-18 10:08:08,989 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:08:08,989 INFO L376 BasicCegarLoop]: trace histogram [71, 70, 70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:08:08,989 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:08:08,989 INFO L82 PathProgramCache]: Analyzing trace with hash 1981222007, now seen corresponding path program 24 times [2018-09-18 10:08:08,990 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:08:08,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:08:08,990 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:08:08,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:08:08,991 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:08:09,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:08:12,675 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 0 proven. 7385 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:08:12,675 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:08:12,675 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:08:12,684 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:08:12,684 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:08:12,772 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 71 check-sat command(s) [2018-09-18 10:08:12,772 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:08:12,781 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:08:13,010 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 0 proven. 7385 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:08:13,010 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:08:20,367 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 0 proven. 7385 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:08:20,389 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:08:20,389 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:08:20,404 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:08:20,404 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:08:21,205 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 71 check-sat command(s) [2018-09-18 10:08:21,205 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:08:21,211 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:08:21,293 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 0 proven. 7385 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:08:21,293 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:08:21,779 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 0 proven. 7385 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:08:21,780 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:08:21,780 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [74, 74, 74, 74, 74] total 146 [2018-09-18 10:08:21,781 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:08:21,781 INFO L459 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-09-18 10:08:21,782 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-09-18 10:08:21,782 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=7679, Invalid=13491, Unknown=0, NotChecked=0, Total=21170 [2018-09-18 10:08:21,782 INFO L87 Difference]: Start difference. First operand 223 states and 223 transitions. Second operand 76 states. [2018-09-18 10:08:22,070 WARN L178 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 210 DAG size of output: 8 [2018-09-18 10:08:22,259 WARN L178 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 213 DAG size of output: 8 [2018-09-18 10:08:22,479 WARN L178 SmtUtils]: Spent 199.00 ms on a formula simplification. DAG size of input: 219 DAG size of output: 9 [2018-09-18 10:08:22,703 WARN L178 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 218 DAG size of output: 11 [2018-09-18 10:08:22,920 WARN L178 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 215 DAG size of output: 11 [2018-09-18 10:08:23,153 WARN L178 SmtUtils]: Spent 189.00 ms on a formula simplification. DAG size of input: 212 DAG size of output: 11 [2018-09-18 10:08:23,388 WARN L178 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 209 DAG size of output: 11 [2018-09-18 10:08:23,641 WARN L178 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 206 DAG size of output: 11 [2018-09-18 10:08:23,884 WARN L178 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 203 DAG size of output: 11 [2018-09-18 10:08:24,139 WARN L178 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 200 DAG size of output: 11 Received shutdown request... [2018-09-18 10:08:24,282 WARN L186 SmtUtils]: Removed 41 from assertion stack [2018-09-18 10:08:24,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-18 10:08:24,283 WARN L549 AbstractCegarLoop]: Verification canceled [2018-09-18 10:08:24,288 WARN L206 ceAbstractionStarter]: Timeout [2018-09-18 10:08:24,288 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.09 10:08:24 BoogieIcfgContainer [2018-09-18 10:08:24,288 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-18 10:08:24,289 INFO L168 Benchmark]: Toolchain (without parser) took 246141.27 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 661.7 MB). Free memory was 1.4 GB in the beginning and 2.1 GB in the end (delta: -627.8 MB). Peak memory consumption was 33.9 MB. Max. memory is 7.1 GB. [2018-09-18 10:08:24,290 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:08:24,290 INFO L168 Benchmark]: CACSL2BoogieTranslator took 298.49 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-09-18 10:08:24,291 INFO L168 Benchmark]: Boogie Procedure Inliner took 21.75 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:08:24,291 INFO L168 Benchmark]: Boogie Preprocessor took 20.01 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:08:24,291 INFO L168 Benchmark]: RCFGBuilder took 457.58 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 747.1 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -798.0 MB). Peak memory consumption was 26.6 MB. Max. memory is 7.1 GB. [2018-09-18 10:08:24,292 INFO L168 Benchmark]: TraceAbstraction took 245333.21 ms. Allocated memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: -85.5 MB). Free memory was 2.2 GB in the beginning and 2.1 GB in the end (delta: 159.7 MB). Peak memory consumption was 74.2 MB. Max. memory is 7.1 GB. [2018-09-18 10:08:24,294 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 298.49 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 21.75 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 20.01 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 457.58 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 747.1 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -798.0 MB). Peak memory consumption was 26.6 MB. Max. memory is 7.1 GB. * TraceAbstraction took 245333.21 ms. Allocated memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: -85.5 MB). Free memory was 2.2 GB in the beginning and 2.1 GB in the end (delta: 159.7 MB). Peak memory consumption was 74.2 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was constructing difference of abstraction (223states) and FLOYD_HOARE automaton (currently 12 states, 76 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 197. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 21 locations, 1 error locations. TIMEOUT Result, 245.2s OverallTime, 26 OverallIterations, 71 TraceHistogramMax, 116.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 339 SDtfs, 3542 SDslu, 7954 SDs, 0 SdLazy, 3689 SolverSat, 2287 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 13122 GetRequests, 10286 SyntacticMatches, 108 SemanticMatches, 2727 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39974 ImplicationChecksByTransitivity, 216.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=223occurred in iteration=25, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 25 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 10.1s SatisfiabilityAnalysisTime, 116.2s InterpolantComputationTime, 8555 NumberOfCodeBlocks, 8555 NumberOfCodeBlocksAsserted, 1026 NumberOfCheckSat, 14121 ConstructedInterpolants, 142 QuantifiedInterpolants, 13440723 SizeOfPredicates, 144 NumberOfNonLiveVariables, 8208 ConjunctsInSsa, 1848 ConjunctsInUnsatCore, 122 InterpolantComputations, 2 PerfectInterpolantSequences, 0/306600 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/count_by_k_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-09-18_10-08-24-303.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/count_by_k_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-18_10-08-24-303.csv Completed graceful shutdown