java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-invgen/down_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-69f5bdd-m [2018-09-18 10:01:12,021 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-18 10:01:12,023 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-18 10:01:12,037 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-18 10:01:12,037 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-18 10:01:12,038 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-18 10:01:12,040 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-18 10:01:12,042 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-18 10:01:12,045 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-18 10:01:12,046 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-18 10:01:12,055 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-18 10:01:12,055 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-18 10:01:12,056 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-18 10:01:12,057 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-18 10:01:12,059 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-18 10:01:12,059 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-18 10:01:12,064 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-18 10:01:12,067 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-18 10:01:12,072 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-18 10:01:12,075 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-18 10:01:12,076 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-18 10:01:12,078 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-18 10:01:12,080 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-18 10:01:12,080 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-18 10:01:12,081 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-18 10:01:12,081 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-18 10:01:12,082 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-18 10:01:12,083 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-18 10:01:12,084 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-18 10:01:12,085 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-18 10:01:12,085 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-18 10:01:12,086 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-09-18 10:01:12,086 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-09-18 10:01:12,086 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-09-18 10:01:12,087 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-09-18 10:01:12,088 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-09-18 10:01:12,088 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-18 10:01:12,109 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-18 10:01:12,109 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-18 10:01:12,110 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-18 10:01:12,110 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-18 10:01:12,113 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-18 10:01:12,113 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-18 10:01:12,114 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-18 10:01:12,114 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-18 10:01:12,114 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-18 10:01:12,114 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-18 10:01:12,114 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-09-18 10:01:12,115 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-18 10:01:12,115 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-18 10:01:12,116 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-18 10:01:12,116 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-18 10:01:12,116 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-18 10:01:12,116 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-18 10:01:12,117 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-18 10:01:12,117 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-18 10:01:12,118 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-18 10:01:12,118 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-18 10:01:12,118 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-18 10:01:12,118 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-18 10:01:12,118 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-18 10:01:12,119 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 10:01:12,119 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-18 10:01:12,119 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-18 10:01:12,120 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-18 10:01:12,120 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-18 10:01:12,120 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-18 10:01:12,120 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-18 10:01:12,120 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-18 10:01:12,121 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-18 10:01:12,121 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-18 10:01:12,184 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-18 10:01:12,199 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-18 10:01:12,205 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-18 10:01:12,206 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-18 10:01:12,207 INFO L276 PluginConnector]: CDTParser initialized [2018-09-18 10:01:12,208 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-invgen/down_true-unreach-call_true-termination.i [2018-09-18 10:01:12,556 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/72f6ca376/73bd5ec861cf427498b92529f05840e8/FLAG3c3bf01c2 [2018-09-18 10:01:12,714 INFO L277 CDTParser]: Found 1 translation units. [2018-09-18 10:01:12,715 INFO L159 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-invgen/down_true-unreach-call_true-termination.i [2018-09-18 10:01:12,721 INFO L325 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/72f6ca376/73bd5ec861cf427498b92529f05840e8/FLAG3c3bf01c2 [2018-09-18 10:01:12,736 INFO L333 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/72f6ca376/73bd5ec861cf427498b92529f05840e8 [2018-09-18 10:01:12,745 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-18 10:01:12,748 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-18 10:01:12,749 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-18 10:01:12,749 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-18 10:01:12,755 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-18 10:01:12,756 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:12,759 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@14b9986e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12, skipping insertion in model container [2018-09-18 10:01:12,759 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:12,771 INFO L160 ieTranslatorObserver]: Starting translation in SV-COMP mode [2018-09-18 10:01:12,952 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 10:01:12,969 INFO L424 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-18 10:01:12,974 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 10:01:12,986 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12 WrapperNode [2018-09-18 10:01:12,986 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-18 10:01:12,987 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-18 10:01:12,987 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-18 10:01:12,987 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-18 10:01:12,997 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:13,003 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:13,008 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-18 10:01:13,009 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-18 10:01:13,009 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-18 10:01:13,009 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-18 10:01:13,019 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:13,019 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:13,020 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:13,020 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:13,022 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:13,027 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:13,028 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (1/1) ... [2018-09-18 10:01:13,030 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-18 10:01:13,030 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-18 10:01:13,031 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-18 10:01:13,031 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-18 10:01:13,032 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 10:01:13,099 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-18 10:01:13,100 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-18 10:01:13,100 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-18 10:01:13,100 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-18 10:01:13,100 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-18 10:01:13,100 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-18 10:01:13,100 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-09-18 10:01:13,101 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-09-18 10:01:13,409 INFO L356 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-18 10:01:13,409 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 10:01:13 BoogieIcfgContainer [2018-09-18 10:01:13,409 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-18 10:01:13,410 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-18 10:01:13,410 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-18 10:01:13,413 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-18 10:01:13,414 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.09 10:01:12" (1/3) ... [2018-09-18 10:01:13,415 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a517655 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 10:01:13, skipping insertion in model container [2018-09-18 10:01:13,415 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:12" (2/3) ... [2018-09-18 10:01:13,415 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a517655 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 10:01:13, skipping insertion in model container [2018-09-18 10:01:13,415 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 10:01:13" (3/3) ... [2018-09-18 10:01:13,417 INFO L112 eAbstractionObserver]: Analyzing ICFG down_true-unreach-call_true-termination.i [2018-09-18 10:01:13,427 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-18 10:01:13,434 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-18 10:01:13,477 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-18 10:01:13,477 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-18 10:01:13,478 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-18 10:01:13,478 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-18 10:01:13,478 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-18 10:01:13,478 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-18 10:01:13,478 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-18 10:01:13,479 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-18 10:01:13,479 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-18 10:01:13,497 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2018-09-18 10:01:13,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-09-18 10:01:13,503 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:13,504 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:13,505 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:13,511 INFO L82 PathProgramCache]: Analyzing trace with hash 123585964, now seen corresponding path program 1 times [2018-09-18 10:01:13,514 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:13,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:13,566 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:13,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:13,566 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:13,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:13,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:13,626 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:01:13,626 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-18 10:01:13,627 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:01:13,630 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-18 10:01:13,642 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-18 10:01:13,642 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 10:01:13,644 INFO L87 Difference]: Start difference. First operand 23 states. Second operand 2 states. [2018-09-18 10:01:13,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:13,670 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2018-09-18 10:01:13,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-18 10:01:13,671 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 13 [2018-09-18 10:01:13,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:13,680 INFO L225 Difference]: With dead ends: 39 [2018-09-18 10:01:13,680 INFO L226 Difference]: Without dead ends: 18 [2018-09-18 10:01:13,684 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 10:01:13,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-09-18 10:01:13,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-09-18 10:01:13,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-09-18 10:01:13,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 19 transitions. [2018-09-18 10:01:13,721 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 19 transitions. Word has length 13 [2018-09-18 10:01:13,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:13,722 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 19 transitions. [2018-09-18 10:01:13,722 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-18 10:01:13,722 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2018-09-18 10:01:13,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-09-18 10:01:13,723 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:13,723 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:13,724 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:13,724 INFO L82 PathProgramCache]: Analyzing trace with hash -203615370, now seen corresponding path program 1 times [2018-09-18 10:01:13,724 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:13,725 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:13,726 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:13,727 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:13,727 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:13,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:14,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:14,008 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:01:14,008 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-09-18 10:01:14,008 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:01:14,010 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-18 10:01:14,010 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-18 10:01:14,011 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-09-18 10:01:14,011 INFO L87 Difference]: Start difference. First operand 18 states and 19 transitions. Second operand 5 states. [2018-09-18 10:01:14,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:14,220 INFO L93 Difference]: Finished difference Result 33 states and 35 transitions. [2018-09-18 10:01:14,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-18 10:01:14,220 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-09-18 10:01:14,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:14,222 INFO L225 Difference]: With dead ends: 33 [2018-09-18 10:01:14,223 INFO L226 Difference]: Without dead ends: 20 [2018-09-18 10:01:14,224 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-09-18 10:01:14,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-09-18 10:01:14,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-09-18 10:01:14,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-09-18 10:01:14,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 21 transitions. [2018-09-18 10:01:14,230 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 21 transitions. Word has length 14 [2018-09-18 10:01:14,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:14,231 INFO L480 AbstractCegarLoop]: Abstraction has 20 states and 21 transitions. [2018-09-18 10:01:14,231 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-18 10:01:14,231 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2018-09-18 10:01:14,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-09-18 10:01:14,232 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:14,232 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:14,233 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:14,233 INFO L82 PathProgramCache]: Analyzing trace with hash 1025157488, now seen corresponding path program 1 times [2018-09-18 10:01:14,233 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:14,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:14,235 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:14,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:14,235 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:14,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:14,365 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:14,365 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:01:14,365 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-09-18 10:01:14,366 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:01:14,366 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-09-18 10:01:14,366 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-09-18 10:01:14,367 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-09-18 10:01:14,367 INFO L87 Difference]: Start difference. First operand 20 states and 21 transitions. Second operand 6 states. [2018-09-18 10:01:14,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:14,590 INFO L93 Difference]: Finished difference Result 34 states and 36 transitions. [2018-09-18 10:01:14,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-09-18 10:01:14,591 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 16 [2018-09-18 10:01:14,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:14,595 INFO L225 Difference]: With dead ends: 34 [2018-09-18 10:01:14,596 INFO L226 Difference]: Without dead ends: 32 [2018-09-18 10:01:14,598 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-09-18 10:01:14,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-09-18 10:01:14,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 27. [2018-09-18 10:01:14,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-09-18 10:01:14,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2018-09-18 10:01:14,618 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 16 [2018-09-18 10:01:14,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:14,618 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2018-09-18 10:01:14,618 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-09-18 10:01:14,618 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2018-09-18 10:01:14,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-09-18 10:01:14,622 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:14,622 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:14,623 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:14,623 INFO L82 PathProgramCache]: Analyzing trace with hash -1392733261, now seen corresponding path program 1 times [2018-09-18 10:01:14,623 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:14,624 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:14,624 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:14,625 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:14,625 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:14,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:14,788 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:14,788 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:14,789 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:14,798 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:14,798 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:14,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:14,835 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:14,859 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:14,860 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:14,979 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:15,001 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:15,001 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:15,019 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:15,019 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:15,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:15,043 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:15,052 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:15,052 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:15,147 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:15,152 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:15,152 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 7 [2018-09-18 10:01:15,152 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:15,153 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-09-18 10:01:15,153 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-09-18 10:01:15,153 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-09-18 10:01:15,154 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand 7 states. [2018-09-18 10:01:15,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:15,383 INFO L93 Difference]: Finished difference Result 46 states and 49 transitions. [2018-09-18 10:01:15,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-18 10:01:15,384 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-09-18 10:01:15,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:15,387 INFO L225 Difference]: With dead ends: 46 [2018-09-18 10:01:15,387 INFO L226 Difference]: Without dead ends: 29 [2018-09-18 10:01:15,389 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 88 SyntacticMatches, 8 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2018-09-18 10:01:15,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-09-18 10:01:15,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-09-18 10:01:15,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-09-18 10:01:15,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2018-09-18 10:01:15,395 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 30 transitions. Word has length 24 [2018-09-18 10:01:15,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:15,395 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 30 transitions. [2018-09-18 10:01:15,396 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-09-18 10:01:15,396 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 30 transitions. [2018-09-18 10:01:15,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-09-18 10:01:15,397 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:15,397 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:15,397 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:15,397 INFO L82 PathProgramCache]: Analyzing trace with hash -782599891, now seen corresponding path program 2 times [2018-09-18 10:01:15,398 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:15,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:15,399 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:15,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:15,399 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:15,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:15,568 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:15,569 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:15,569 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:15,578 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:15,578 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:15,592 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:15,592 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:15,596 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:15,668 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:15,668 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:16,010 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:16,031 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:16,031 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:16,046 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:16,047 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:16,069 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:16,069 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:16,073 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:16,082 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:16,082 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:16,170 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:16,171 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:16,171 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7, 7, 7] total 10 [2018-09-18 10:01:16,171 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:16,172 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-09-18 10:01:16,172 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-09-18 10:01:16,172 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-09-18 10:01:16,173 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. Second operand 10 states. [2018-09-18 10:01:16,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:16,365 INFO L93 Difference]: Finished difference Result 39 states and 40 transitions. [2018-09-18 10:01:16,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-18 10:01:16,366 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 26 [2018-09-18 10:01:16,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:16,368 INFO L225 Difference]: With dead ends: 39 [2018-09-18 10:01:16,368 INFO L226 Difference]: Without dead ends: 37 [2018-09-18 10:01:16,369 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 95 SyntacticMatches, 10 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2018-09-18 10:01:16,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-09-18 10:01:16,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-09-18 10:01:16,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-09-18 10:01:16,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 38 transitions. [2018-09-18 10:01:16,376 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 38 transitions. Word has length 26 [2018-09-18 10:01:16,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:16,376 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 38 transitions. [2018-09-18 10:01:16,376 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-09-18 10:01:16,377 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 38 transitions. [2018-09-18 10:01:16,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-09-18 10:01:16,378 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:16,378 INFO L376 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:16,378 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:16,379 INFO L82 PathProgramCache]: Analyzing trace with hash 1585665648, now seen corresponding path program 3 times [2018-09-18 10:01:16,379 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:16,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:16,380 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:16,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:16,380 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:16,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:16,498 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:16,499 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:16,499 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:16,518 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:16,518 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:16,538 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-18 10:01:16,539 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:16,543 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:16,551 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:16,552 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:16,651 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:16,673 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:16,673 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:16,689 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:16,689 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:16,720 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-18 10:01:16,720 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:16,725 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:16,734 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:16,734 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:16,848 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:16,850 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:16,850 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 9 [2018-09-18 10:01:16,851 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:16,851 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-09-18 10:01:16,852 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-09-18 10:01:16,852 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-09-18 10:01:16,853 INFO L87 Difference]: Start difference. First operand 37 states and 38 transitions. Second operand 9 states. [2018-09-18 10:01:17,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:17,064 INFO L93 Difference]: Finished difference Result 60 states and 64 transitions. [2018-09-18 10:01:17,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-18 10:01:17,066 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2018-09-18 10:01:17,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:17,067 INFO L225 Difference]: With dead ends: 60 [2018-09-18 10:01:17,067 INFO L226 Difference]: Without dead ends: 39 [2018-09-18 10:01:17,068 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 124 SyntacticMatches, 12 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2018-09-18 10:01:17,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-09-18 10:01:17,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-09-18 10:01:17,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-09-18 10:01:17,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 40 transitions. [2018-09-18 10:01:17,074 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 40 transitions. Word has length 34 [2018-09-18 10:01:17,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:17,075 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 40 transitions. [2018-09-18 10:01:17,075 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-09-18 10:01:17,075 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 40 transitions. [2018-09-18 10:01:17,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-09-18 10:01:17,076 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:17,076 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:17,077 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:17,077 INFO L82 PathProgramCache]: Analyzing trace with hash -75224214, now seen corresponding path program 4 times [2018-09-18 10:01:17,077 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:17,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:17,078 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:17,079 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:17,079 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:17,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:17,233 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 14 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-18 10:01:17,233 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:17,234 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:17,244 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:17,244 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:17,266 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:17,267 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:17,269 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:17,326 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:17,327 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:17,550 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:17,570 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:17,570 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:17,586 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:17,586 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:17,617 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:17,618 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:17,622 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:17,631 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:17,632 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:17,718 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:17,720 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:17,720 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8, 8, 8] total 11 [2018-09-18 10:01:17,720 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:17,721 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-18 10:01:17,721 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-18 10:01:17,721 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-09-18 10:01:17,722 INFO L87 Difference]: Start difference. First operand 39 states and 40 transitions. Second operand 11 states. [2018-09-18 10:01:17,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:17,846 INFO L93 Difference]: Finished difference Result 49 states and 50 transitions. [2018-09-18 10:01:17,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-18 10:01:17,846 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 36 [2018-09-18 10:01:17,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:17,847 INFO L225 Difference]: With dead ends: 49 [2018-09-18 10:01:17,848 INFO L226 Difference]: Without dead ends: 47 [2018-09-18 10:01:17,848 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 132 SyntacticMatches, 14 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-09-18 10:01:17,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-09-18 10:01:17,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-09-18 10:01:17,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-09-18 10:01:17,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 48 transitions. [2018-09-18 10:01:17,855 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 48 transitions. Word has length 36 [2018-09-18 10:01:17,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:17,856 INFO L480 AbstractCegarLoop]: Abstraction has 47 states and 48 transitions. [2018-09-18 10:01:17,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-18 10:01:17,856 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 48 transitions. [2018-09-18 10:01:17,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-09-18 10:01:17,857 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:17,857 INFO L376 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:17,857 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:17,858 INFO L82 PathProgramCache]: Analyzing trace with hash 959019949, now seen corresponding path program 5 times [2018-09-18 10:01:17,858 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:17,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:17,859 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:17,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:17,859 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:17,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:18,005 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:18,005 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:18,005 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:18,012 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:18,013 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:18,035 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-09-18 10:01:18,036 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:18,039 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:18,050 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:18,050 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:18,167 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:18,187 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:18,187 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:18,204 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:18,204 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:18,245 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-09-18 10:01:18,246 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:18,250 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:18,260 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:18,261 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:18,357 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:18,359 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:18,359 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 11 [2018-09-18 10:01:18,359 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:18,360 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-18 10:01:18,360 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-18 10:01:18,361 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2018-09-18 10:01:18,361 INFO L87 Difference]: Start difference. First operand 47 states and 48 transitions. Second operand 11 states. [2018-09-18 10:01:18,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:18,544 INFO L93 Difference]: Finished difference Result 74 states and 79 transitions. [2018-09-18 10:01:18,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-18 10:01:18,545 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 44 [2018-09-18 10:01:18,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:18,546 INFO L225 Difference]: With dead ends: 74 [2018-09-18 10:01:18,546 INFO L226 Difference]: Without dead ends: 49 [2018-09-18 10:01:18,547 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 160 SyntacticMatches, 16 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=71, Invalid=169, Unknown=0, NotChecked=0, Total=240 [2018-09-18 10:01:18,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-09-18 10:01:18,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-09-18 10:01:18,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-09-18 10:01:18,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 50 transitions. [2018-09-18 10:01:18,554 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 50 transitions. Word has length 44 [2018-09-18 10:01:18,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:18,555 INFO L480 AbstractCegarLoop]: Abstraction has 49 states and 50 transitions. [2018-09-18 10:01:18,555 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-18 10:01:18,555 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 50 transitions. [2018-09-18 10:01:18,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-09-18 10:01:18,556 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:18,556 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:18,557 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:18,557 INFO L82 PathProgramCache]: Analyzing trace with hash 1636294695, now seen corresponding path program 6 times [2018-09-18 10:01:18,557 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:18,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:18,558 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:18,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:18,558 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:18,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:18,682 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 25 proven. 28 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-09-18 10:01:18,683 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:18,683 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:18,696 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:18,696 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:18,748 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-09-18 10:01:18,748 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:18,751 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:18,936 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:18,936 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:18,995 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:19,015 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:19,015 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:19,031 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:19,031 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:19,076 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-09-18 10:01:19,077 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:19,080 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:19,091 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:19,092 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:19,179 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:19,181 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:19,181 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9, 9, 9] total 12 [2018-09-18 10:01:19,181 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:19,182 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-09-18 10:01:19,183 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-09-18 10:01:19,183 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-09-18 10:01:19,183 INFO L87 Difference]: Start difference. First operand 49 states and 50 transitions. Second operand 12 states. [2018-09-18 10:01:19,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:19,440 INFO L93 Difference]: Finished difference Result 59 states and 60 transitions. [2018-09-18 10:01:19,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-18 10:01:19,440 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 46 [2018-09-18 10:01:19,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:19,441 INFO L225 Difference]: With dead ends: 59 [2018-09-18 10:01:19,442 INFO L226 Difference]: Without dead ends: 57 [2018-09-18 10:01:19,442 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 169 SyntacticMatches, 18 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2018-09-18 10:01:19,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-09-18 10:01:19,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-09-18 10:01:19,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-09-18 10:01:19,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 58 transitions. [2018-09-18 10:01:19,450 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 58 transitions. Word has length 46 [2018-09-18 10:01:19,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:19,451 INFO L480 AbstractCegarLoop]: Abstraction has 57 states and 58 transitions. [2018-09-18 10:01:19,451 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-09-18 10:01:19,451 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 58 transitions. [2018-09-18 10:01:19,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-09-18 10:01:19,452 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:19,452 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:19,453 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:19,453 INFO L82 PathProgramCache]: Analyzing trace with hash -2134957206, now seen corresponding path program 7 times [2018-09-18 10:01:19,453 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:19,454 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:19,454 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:19,454 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:19,454 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:19,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:19,626 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:19,626 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:19,626 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:19,634 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:19,635 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:19,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:19,667 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:19,676 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:19,677 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:20,029 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:20,049 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:20,049 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:20,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:20,066 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:20,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:20,108 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:20,118 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:20,119 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:20,335 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:20,337 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:20,337 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 13 [2018-09-18 10:01:20,337 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:20,338 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-18 10:01:20,338 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-18 10:01:20,338 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-09-18 10:01:20,338 INFO L87 Difference]: Start difference. First operand 57 states and 58 transitions. Second operand 13 states. [2018-09-18 10:01:20,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:20,659 INFO L93 Difference]: Finished difference Result 88 states and 94 transitions. [2018-09-18 10:01:20,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-18 10:01:20,666 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2018-09-18 10:01:20,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:20,667 INFO L225 Difference]: With dead ends: 88 [2018-09-18 10:01:20,667 INFO L226 Difference]: Without dead ends: 59 [2018-09-18 10:01:20,668 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 233 GetRequests, 196 SyntacticMatches, 20 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=97, Invalid=245, Unknown=0, NotChecked=0, Total=342 [2018-09-18 10:01:20,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-09-18 10:01:20,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-09-18 10:01:20,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-09-18 10:01:20,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 60 transitions. [2018-09-18 10:01:20,682 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 60 transitions. Word has length 54 [2018-09-18 10:01:20,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:20,682 INFO L480 AbstractCegarLoop]: Abstraction has 59 states and 60 transitions. [2018-09-18 10:01:20,682 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-18 10:01:20,682 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 60 transitions. [2018-09-18 10:01:20,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-09-18 10:01:20,683 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:20,684 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:20,684 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:20,684 INFO L82 PathProgramCache]: Analyzing trace with hash -1771194524, now seen corresponding path program 8 times [2018-09-18 10:01:20,684 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:20,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:20,690 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:20,690 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:20,690 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:20,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:20,886 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 37 proven. 46 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-18 10:01:20,887 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:20,887 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:20,909 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:20,910 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:20,948 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:20,949 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:20,953 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:21,125 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:21,125 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:21,182 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:21,203 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:21,203 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:21,219 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:21,219 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:21,263 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:21,264 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:21,268 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:21,278 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:21,279 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:21,626 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:21,628 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:21,628 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10, 10, 10] total 13 [2018-09-18 10:01:21,628 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:21,629 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-18 10:01:21,629 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-18 10:01:21,629 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-09-18 10:01:21,629 INFO L87 Difference]: Start difference. First operand 59 states and 60 transitions. Second operand 13 states. [2018-09-18 10:01:21,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:21,796 INFO L93 Difference]: Finished difference Result 69 states and 70 transitions. [2018-09-18 10:01:21,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-18 10:01:21,796 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 56 [2018-09-18 10:01:21,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:21,798 INFO L225 Difference]: With dead ends: 69 [2018-09-18 10:01:21,798 INFO L226 Difference]: Without dead ends: 67 [2018-09-18 10:01:21,799 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 206 SyntacticMatches, 22 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2018-09-18 10:01:21,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-09-18 10:01:21,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2018-09-18 10:01:21,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-09-18 10:01:21,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 68 transitions. [2018-09-18 10:01:21,806 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 68 transitions. Word has length 56 [2018-09-18 10:01:21,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:21,806 INFO L480 AbstractCegarLoop]: Abstraction has 67 states and 68 transitions. [2018-09-18 10:01:21,806 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-18 10:01:21,807 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 68 transitions. [2018-09-18 10:01:21,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-09-18 10:01:21,808 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:21,808 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:21,808 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:21,808 INFO L82 PathProgramCache]: Analyzing trace with hash -835949145, now seen corresponding path program 9 times [2018-09-18 10:01:21,808 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:21,809 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:21,809 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:21,810 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:21,810 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:21,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:21,993 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:21,993 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:21,993 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:22,000 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:22,000 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:22,051 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-18 10:01:22,052 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:22,053 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:22,063 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:22,063 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:22,257 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:22,279 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:22,279 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:22,296 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:22,296 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:22,362 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-18 10:01:22,363 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:22,366 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:22,376 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:22,376 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:22,507 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:22,509 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:22,509 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 15 [2018-09-18 10:01:22,509 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:22,509 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-18 10:01:22,510 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-18 10:01:22,510 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-09-18 10:01:22,510 INFO L87 Difference]: Start difference. First operand 67 states and 68 transitions. Second operand 15 states. [2018-09-18 10:01:22,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:22,864 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-09-18 10:01:22,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-18 10:01:22,864 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 64 [2018-09-18 10:01:22,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:22,865 INFO L225 Difference]: With dead ends: 102 [2018-09-18 10:01:22,865 INFO L226 Difference]: Without dead ends: 69 [2018-09-18 10:01:22,866 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 276 GetRequests, 232 SyntacticMatches, 24 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=127, Invalid=335, Unknown=0, NotChecked=0, Total=462 [2018-09-18 10:01:22,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-09-18 10:01:22,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2018-09-18 10:01:22,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-09-18 10:01:22,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 70 transitions. [2018-09-18 10:01:22,878 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 70 transitions. Word has length 64 [2018-09-18 10:01:22,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:22,878 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 70 transitions. [2018-09-18 10:01:22,878 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-18 10:01:22,878 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 70 transitions. [2018-09-18 10:01:22,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-09-18 10:01:22,879 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:22,879 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:22,879 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:22,879 INFO L82 PathProgramCache]: Analyzing trace with hash -598355679, now seen corresponding path program 10 times [2018-09-18 10:01:22,879 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:22,880 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:22,880 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:22,880 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:22,881 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:22,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:23,079 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 51 proven. 68 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-18 10:01:23,079 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:23,079 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:23,086 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:23,087 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:23,125 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:23,126 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:23,128 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:23,272 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:23,272 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:23,380 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:23,400 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:23,400 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:23,416 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:23,416 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:23,470 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:23,470 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:23,474 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:23,484 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:23,484 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:23,622 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:23,623 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:23,623 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11, 11, 11] total 14 [2018-09-18 10:01:23,623 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:23,624 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-18 10:01:23,624 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-18 10:01:23,624 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=134, Unknown=0, NotChecked=0, Total=182 [2018-09-18 10:01:23,625 INFO L87 Difference]: Start difference. First operand 69 states and 70 transitions. Second operand 14 states. [2018-09-18 10:01:23,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:23,755 INFO L93 Difference]: Finished difference Result 79 states and 80 transitions. [2018-09-18 10:01:23,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-18 10:01:23,756 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 66 [2018-09-18 10:01:23,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:23,758 INFO L225 Difference]: With dead ends: 79 [2018-09-18 10:01:23,758 INFO L226 Difference]: Without dead ends: 77 [2018-09-18 10:01:23,759 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 283 GetRequests, 243 SyntacticMatches, 26 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 132 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=61, Invalid=179, Unknown=0, NotChecked=0, Total=240 [2018-09-18 10:01:23,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-09-18 10:01:23,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2018-09-18 10:01:23,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-09-18 10:01:23,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 78 transitions. [2018-09-18 10:01:23,765 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 78 transitions. Word has length 66 [2018-09-18 10:01:23,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:23,766 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 78 transitions. [2018-09-18 10:01:23,766 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-18 10:01:23,766 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 78 transitions. [2018-09-18 10:01:23,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-09-18 10:01:23,767 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:23,767 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:23,768 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:23,768 INFO L82 PathProgramCache]: Analyzing trace with hash -781092252, now seen corresponding path program 11 times [2018-09-18 10:01:23,768 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:23,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:23,769 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:23,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:23,769 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:23,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:23,950 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:01:23,950 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:23,950 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:23,958 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:23,958 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:24,018 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-18 10:01:24,018 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:24,021 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:24,031 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:01:24,031 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:24,169 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:01:24,189 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:24,189 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:24,204 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:24,204 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:24,291 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-18 10:01:24,291 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:24,295 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:24,306 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:01:24,306 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:24,488 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:01:24,490 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:24,490 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 17 [2018-09-18 10:01:24,490 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:24,490 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-18 10:01:24,491 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-18 10:01:24,491 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=199, Unknown=0, NotChecked=0, Total=272 [2018-09-18 10:01:24,491 INFO L87 Difference]: Start difference. First operand 77 states and 78 transitions. Second operand 17 states. [2018-09-18 10:01:24,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:24,860 INFO L93 Difference]: Finished difference Result 116 states and 124 transitions. [2018-09-18 10:01:24,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-18 10:01:24,861 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 74 [2018-09-18 10:01:24,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:24,863 INFO L225 Difference]: With dead ends: 116 [2018-09-18 10:01:24,863 INFO L226 Difference]: Without dead ends: 79 [2018-09-18 10:01:24,865 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 319 GetRequests, 268 SyntacticMatches, 28 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 237 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=161, Invalid=439, Unknown=0, NotChecked=0, Total=600 [2018-09-18 10:01:24,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-09-18 10:01:24,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-09-18 10:01:24,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-09-18 10:01:24,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 80 transitions. [2018-09-18 10:01:24,872 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 80 transitions. Word has length 74 [2018-09-18 10:01:24,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:24,872 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 80 transitions. [2018-09-18 10:01:24,872 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-18 10:01:24,872 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 80 transitions. [2018-09-18 10:01:24,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-09-18 10:01:24,873 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:24,873 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:24,874 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:24,874 INFO L82 PathProgramCache]: Analyzing trace with hash 1719160158, now seen corresponding path program 12 times [2018-09-18 10:01:24,874 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:24,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:24,875 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:24,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:24,875 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:24,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:25,013 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 67 proven. 94 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-09-18 10:01:25,013 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:25,013 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:25,021 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:25,021 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:25,048 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-18 10:01:25,048 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:25,051 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:25,088 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:01:25,088 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:25,198 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:01:25,217 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:25,218 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:25,233 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:25,233 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:25,318 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-18 10:01:25,318 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:25,323 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:25,334 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:01:25,334 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:25,504 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:01:25,506 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:25,507 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12, 12, 12] total 15 [2018-09-18 10:01:25,507 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:25,507 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-18 10:01:25,507 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-18 10:01:25,508 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-09-18 10:01:25,508 INFO L87 Difference]: Start difference. First operand 79 states and 80 transitions. Second operand 15 states. [2018-09-18 10:01:25,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:25,708 INFO L93 Difference]: Finished difference Result 89 states and 90 transitions. [2018-09-18 10:01:25,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-18 10:01:25,709 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 76 [2018-09-18 10:01:25,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:25,711 INFO L225 Difference]: With dead ends: 89 [2018-09-18 10:01:25,711 INFO L226 Difference]: Without dead ends: 87 [2018-09-18 10:01:25,711 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 325 GetRequests, 280 SyntacticMatches, 30 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2018-09-18 10:01:25,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-09-18 10:01:25,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2018-09-18 10:01:25,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-09-18 10:01:25,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 88 transitions. [2018-09-18 10:01:25,719 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 88 transitions. Word has length 76 [2018-09-18 10:01:25,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:25,719 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 88 transitions. [2018-09-18 10:01:25,719 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-18 10:01:25,720 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 88 transitions. [2018-09-18 10:01:25,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-09-18 10:01:25,721 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:25,721 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:25,721 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:25,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1817810527, now seen corresponding path program 13 times [2018-09-18 10:01:25,722 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:25,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:25,723 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:25,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:25,723 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:25,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:25,945 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:01:25,946 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:25,946 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:25,953 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:25,954 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:25,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:25,978 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:25,995 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:01:25,995 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:26,173 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:01:26,192 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:26,193 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:26,219 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:26,219 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:26,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:26,277 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:26,290 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:01:26,291 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:26,441 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:01:26,442 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:26,442 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 19 [2018-09-18 10:01:26,443 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:26,443 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-18 10:01:26,443 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-18 10:01:26,443 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2018-09-18 10:01:26,444 INFO L87 Difference]: Start difference. First operand 87 states and 88 transitions. Second operand 19 states. [2018-09-18 10:01:26,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:26,935 INFO L93 Difference]: Finished difference Result 130 states and 139 transitions. [2018-09-18 10:01:26,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-18 10:01:26,935 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 84 [2018-09-18 10:01:26,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:26,936 INFO L225 Difference]: With dead ends: 130 [2018-09-18 10:01:26,937 INFO L226 Difference]: Without dead ends: 89 [2018-09-18 10:01:26,938 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 304 SyntacticMatches, 32 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 315 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=199, Invalid=557, Unknown=0, NotChecked=0, Total=756 [2018-09-18 10:01:26,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-09-18 10:01:26,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2018-09-18 10:01:26,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-09-18 10:01:26,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 90 transitions. [2018-09-18 10:01:26,945 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 90 transitions. Word has length 84 [2018-09-18 10:01:26,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:26,945 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 90 transitions. [2018-09-18 10:01:26,945 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-18 10:01:26,945 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 90 transitions. [2018-09-18 10:01:26,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-09-18 10:01:26,946 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:26,946 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:26,946 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:26,947 INFO L82 PathProgramCache]: Analyzing trace with hash 455429147, now seen corresponding path program 14 times [2018-09-18 10:01:26,947 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:26,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:26,948 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:26,948 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:26,948 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:26,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:27,077 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 85 proven. 124 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-09-18 10:01:27,077 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:27,077 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:27,085 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:27,086 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:27,124 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:27,125 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:27,127 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:27,212 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:01:27,212 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:27,364 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:01:27,384 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:27,384 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:27,399 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:27,399 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:27,455 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:27,456 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:27,460 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:27,470 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:01:27,470 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:27,624 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:01:27,625 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:27,625 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13, 13, 13] total 16 [2018-09-18 10:01:27,626 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:27,626 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-18 10:01:27,626 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-18 10:01:27,626 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=173, Unknown=0, NotChecked=0, Total=240 [2018-09-18 10:01:27,627 INFO L87 Difference]: Start difference. First operand 89 states and 90 transitions. Second operand 16 states. [2018-09-18 10:01:27,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:27,797 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2018-09-18 10:01:27,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-18 10:01:27,798 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 86 [2018-09-18 10:01:27,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:27,799 INFO L225 Difference]: With dead ends: 99 [2018-09-18 10:01:27,799 INFO L226 Difference]: Without dead ends: 97 [2018-09-18 10:01:27,800 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 367 GetRequests, 317 SyntacticMatches, 34 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=80, Invalid=226, Unknown=0, NotChecked=0, Total=306 [2018-09-18 10:01:27,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-09-18 10:01:27,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2018-09-18 10:01:27,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-09-18 10:01:27,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 98 transitions. [2018-09-18 10:01:27,807 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 98 transitions. Word has length 86 [2018-09-18 10:01:27,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:27,807 INFO L480 AbstractCegarLoop]: Abstraction has 97 states and 98 transitions. [2018-09-18 10:01:27,807 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-18 10:01:27,807 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 98 transitions. [2018-09-18 10:01:27,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-09-18 10:01:27,808 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:27,808 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:27,809 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:27,809 INFO L82 PathProgramCache]: Analyzing trace with hash 955997022, now seen corresponding path program 15 times [2018-09-18 10:01:27,809 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:27,810 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:27,810 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:27,810 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:27,810 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:27,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:28,043 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:01:28,043 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:28,043 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:28,051 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:28,051 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:28,086 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-18 10:01:28,086 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:28,089 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:28,103 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:01:28,104 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:28,479 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:01:28,498 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:28,499 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:28,513 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:28,514 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:28,630 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-18 10:01:28,630 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:28,634 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:28,649 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:01:28,649 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:28,809 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:01:28,810 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:28,811 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 21 [2018-09-18 10:01:28,811 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:28,812 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-18 10:01:28,812 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-18 10:01:28,812 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=309, Unknown=0, NotChecked=0, Total=420 [2018-09-18 10:01:28,813 INFO L87 Difference]: Start difference. First operand 97 states and 98 transitions. Second operand 21 states. [2018-09-18 10:01:29,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:29,144 INFO L93 Difference]: Finished difference Result 144 states and 154 transitions. [2018-09-18 10:01:29,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-18 10:01:29,145 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 94 [2018-09-18 10:01:29,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:29,147 INFO L225 Difference]: With dead ends: 144 [2018-09-18 10:01:29,147 INFO L226 Difference]: Without dead ends: 99 [2018-09-18 10:01:29,148 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 340 SyntacticMatches, 36 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 404 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=241, Invalid=689, Unknown=0, NotChecked=0, Total=930 [2018-09-18 10:01:29,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-09-18 10:01:29,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-09-18 10:01:29,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-09-18 10:01:29,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2018-09-18 10:01:29,155 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 100 transitions. Word has length 94 [2018-09-18 10:01:29,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:29,156 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 100 transitions. [2018-09-18 10:01:29,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-18 10:01:29,156 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 100 transitions. [2018-09-18 10:01:29,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-09-18 10:01:29,157 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:29,157 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:29,157 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:29,158 INFO L82 PathProgramCache]: Analyzing trace with hash -708514472, now seen corresponding path program 16 times [2018-09-18 10:01:29,158 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:29,158 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:29,159 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:29,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:29,159 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:29,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:29,375 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 105 proven. 158 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-09-18 10:01:29,375 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:29,375 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:29,383 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:29,383 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:29,412 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:29,412 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:29,415 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:29,462 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:01:29,462 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:29,572 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:01:29,591 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:29,591 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:29,607 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:29,607 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:29,679 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:29,679 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:29,683 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:29,695 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:01:29,695 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:29,820 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:01:29,822 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:29,822 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14, 14, 14] total 17 [2018-09-18 10:01:29,822 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:29,822 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-18 10:01:29,823 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-18 10:01:29,823 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2018-09-18 10:01:29,823 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. Second operand 17 states. [2018-09-18 10:01:30,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:30,002 INFO L93 Difference]: Finished difference Result 109 states and 110 transitions. [2018-09-18 10:01:30,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-18 10:01:30,003 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 96 [2018-09-18 10:01:30,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:30,005 INFO L225 Difference]: With dead ends: 109 [2018-09-18 10:01:30,005 INFO L226 Difference]: Without dead ends: 107 [2018-09-18 10:01:30,005 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 409 GetRequests, 354 SyntacticMatches, 38 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 249 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2018-09-18 10:01:30,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-09-18 10:01:30,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-09-18 10:01:30,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-09-18 10:01:30,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 108 transitions. [2018-09-18 10:01:30,011 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 108 transitions. Word has length 96 [2018-09-18 10:01:30,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:30,011 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 108 transitions. [2018-09-18 10:01:30,012 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-18 10:01:30,012 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 108 transitions. [2018-09-18 10:01:30,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-09-18 10:01:30,013 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:30,013 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:30,013 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:30,013 INFO L82 PathProgramCache]: Analyzing trace with hash 1119383451, now seen corresponding path program 17 times [2018-09-18 10:01:30,013 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:30,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:30,014 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:30,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:30,014 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:30,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:30,268 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:01:30,268 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:30,268 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:30,277 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:30,277 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:30,316 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-18 10:01:30,316 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:30,320 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:30,338 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:01:30,338 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:30,558 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:01:30,578 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:30,578 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:30,593 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:30,593 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:30,731 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-18 10:01:30,731 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:30,736 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:30,769 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:01:30,770 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:31,810 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:01:31,811 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:31,812 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 23 [2018-09-18 10:01:31,812 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:31,812 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-09-18 10:01:31,812 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-09-18 10:01:31,813 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=133, Invalid=373, Unknown=0, NotChecked=0, Total=506 [2018-09-18 10:01:31,813 INFO L87 Difference]: Start difference. First operand 107 states and 108 transitions. Second operand 23 states. [2018-09-18 10:01:32,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:32,259 INFO L93 Difference]: Finished difference Result 158 states and 169 transitions. [2018-09-18 10:01:32,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-18 10:01:32,262 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 104 [2018-09-18 10:01:32,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:32,263 INFO L225 Difference]: With dead ends: 158 [2018-09-18 10:01:32,263 INFO L226 Difference]: Without dead ends: 109 [2018-09-18 10:01:32,264 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 448 GetRequests, 376 SyntacticMatches, 40 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 504 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=287, Invalid=835, Unknown=0, NotChecked=0, Total=1122 [2018-09-18 10:01:32,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-09-18 10:01:32,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 109. [2018-09-18 10:01:32,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-09-18 10:01:32,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 110 transitions. [2018-09-18 10:01:32,273 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 110 transitions. Word has length 104 [2018-09-18 10:01:32,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:32,273 INFO L480 AbstractCegarLoop]: Abstraction has 109 states and 110 transitions. [2018-09-18 10:01:32,273 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-09-18 10:01:32,273 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 110 transitions. [2018-09-18 10:01:32,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-09-18 10:01:32,274 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:32,274 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:32,275 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:32,275 INFO L82 PathProgramCache]: Analyzing trace with hash 685199637, now seen corresponding path program 18 times [2018-09-18 10:01:32,275 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:32,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:32,276 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:32,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:32,276 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:32,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:33,185 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 127 proven. 196 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-09-18 10:01:33,186 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:33,186 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:33,194 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:33,194 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:33,260 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-09-18 10:01:33,260 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:33,264 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:33,340 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:01:33,340 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:33,592 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:01:33,611 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:33,612 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:33,627 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:33,627 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:33,768 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-09-18 10:01:33,768 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:33,773 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:33,790 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:01:33,791 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:34,007 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:01:34,008 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:34,009 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15, 15, 15] total 18 [2018-09-18 10:01:34,009 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:34,009 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-18 10:01:34,010 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-18 10:01:34,010 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=216, Unknown=0, NotChecked=0, Total=306 [2018-09-18 10:01:34,010 INFO L87 Difference]: Start difference. First operand 109 states and 110 transitions. Second operand 18 states. [2018-09-18 10:01:34,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:34,215 INFO L93 Difference]: Finished difference Result 119 states and 120 transitions. [2018-09-18 10:01:34,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-18 10:01:34,215 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 106 [2018-09-18 10:01:34,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:34,219 INFO L225 Difference]: With dead ends: 119 [2018-09-18 10:01:34,219 INFO L226 Difference]: Without dead ends: 117 [2018-09-18 10:01:34,220 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 391 SyntacticMatches, 42 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:01:34,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-09-18 10:01:34,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-09-18 10:01:34,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-09-18 10:01:34,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 118 transitions. [2018-09-18 10:01:34,229 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 118 transitions. Word has length 106 [2018-09-18 10:01:34,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:34,229 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 118 transitions. [2018-09-18 10:01:34,229 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-18 10:01:34,229 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 118 transitions. [2018-09-18 10:01:34,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-09-18 10:01:34,230 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:34,230 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 11, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:34,231 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:34,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1363002968, now seen corresponding path program 19 times [2018-09-18 10:01:34,231 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:34,232 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:34,232 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:34,232 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:34,232 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:34,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:34,843 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:01:34,843 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:34,843 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:34,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:34,852 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:34,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:34,890 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:34,907 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:01:34,908 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:35,143 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:01:35,163 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:35,163 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:35,180 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:35,180 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:35,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:35,250 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:35,268 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:01:35,268 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:35,617 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:01:35,618 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:35,618 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 25 [2018-09-18 10:01:35,618 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:35,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-18 10:01:35,619 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-18 10:01:35,619 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=157, Invalid=443, Unknown=0, NotChecked=0, Total=600 [2018-09-18 10:01:35,620 INFO L87 Difference]: Start difference. First operand 117 states and 118 transitions. Second operand 25 states. [2018-09-18 10:01:35,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:35,897 INFO L93 Difference]: Finished difference Result 172 states and 184 transitions. [2018-09-18 10:01:35,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-18 10:01:35,898 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 114 [2018-09-18 10:01:35,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:35,900 INFO L225 Difference]: With dead ends: 172 [2018-09-18 10:01:35,900 INFO L226 Difference]: Without dead ends: 119 [2018-09-18 10:01:35,900 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 491 GetRequests, 412 SyntacticMatches, 44 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 615 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=337, Invalid=995, Unknown=0, NotChecked=0, Total=1332 [2018-09-18 10:01:35,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-09-18 10:01:35,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-09-18 10:01:35,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-09-18 10:01:35,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 120 transitions. [2018-09-18 10:01:35,907 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 120 transitions. Word has length 114 [2018-09-18 10:01:35,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:35,908 INFO L480 AbstractCegarLoop]: Abstraction has 119 states and 120 transitions. [2018-09-18 10:01:35,908 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-18 10:01:35,908 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 120 transitions. [2018-09-18 10:01:35,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-09-18 10:01:35,909 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:35,909 INFO L376 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:35,909 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:35,909 INFO L82 PathProgramCache]: Analyzing trace with hash -1611360430, now seen corresponding path program 20 times [2018-09-18 10:01:35,909 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:35,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:35,910 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:35,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:35,910 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:35,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:36,072 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 151 proven. 238 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-09-18 10:01:36,072 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:36,072 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:36,079 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:36,079 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:36,110 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:36,110 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:36,112 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:36,287 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:01:36,287 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:36,436 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:01:36,456 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:36,456 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:36,472 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:36,472 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:36,549 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:36,549 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:36,554 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:36,573 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:01:36,574 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:37,373 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:01:37,375 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:37,375 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16, 16, 16] total 19 [2018-09-18 10:01:37,375 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:37,376 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-18 10:01:37,376 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-18 10:01:37,376 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=239, Unknown=0, NotChecked=0, Total=342 [2018-09-18 10:01:37,376 INFO L87 Difference]: Start difference. First operand 119 states and 120 transitions. Second operand 19 states. [2018-09-18 10:01:37,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:37,578 INFO L93 Difference]: Finished difference Result 129 states and 130 transitions. [2018-09-18 10:01:37,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-18 10:01:37,578 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 116 [2018-09-18 10:01:37,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:37,580 INFO L225 Difference]: With dead ends: 129 [2018-09-18 10:01:37,580 INFO L226 Difference]: Without dead ends: 127 [2018-09-18 10:01:37,580 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 493 GetRequests, 428 SyntacticMatches, 46 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 347 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=116, Invalid=304, Unknown=0, NotChecked=0, Total=420 [2018-09-18 10:01:37,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-09-18 10:01:37,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-09-18 10:01:37,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-09-18 10:01:37,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 128 transitions. [2018-09-18 10:01:37,586 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 128 transitions. Word has length 116 [2018-09-18 10:01:37,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:37,586 INFO L480 AbstractCegarLoop]: Abstraction has 127 states and 128 transitions. [2018-09-18 10:01:37,586 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-18 10:01:37,586 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 128 transitions. [2018-09-18 10:01:37,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-09-18 10:01:37,587 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:37,587 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:37,587 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:37,587 INFO L82 PathProgramCache]: Analyzing trace with hash 1711505301, now seen corresponding path program 21 times [2018-09-18 10:01:37,588 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:37,589 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:37,589 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:37,589 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:37,589 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:37,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:38,828 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:01:38,828 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:38,828 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:38,836 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:38,836 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:38,911 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-09-18 10:01:38,912 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:38,916 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:38,936 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:01:38,936 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:40,190 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:01:40,210 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:40,210 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:40,224 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:40,225 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:40,404 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-09-18 10:01:40,404 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:40,409 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:40,428 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:01:40,428 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:41,068 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:01:41,069 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:41,069 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 27 [2018-09-18 10:01:41,070 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:41,070 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-18 10:01:41,070 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-18 10:01:41,071 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=519, Unknown=0, NotChecked=0, Total=702 [2018-09-18 10:01:41,071 INFO L87 Difference]: Start difference. First operand 127 states and 128 transitions. Second operand 27 states. [2018-09-18 10:01:41,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:41,577 INFO L93 Difference]: Finished difference Result 186 states and 199 transitions. [2018-09-18 10:01:41,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-18 10:01:41,581 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 124 [2018-09-18 10:01:41,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:41,582 INFO L225 Difference]: With dead ends: 186 [2018-09-18 10:01:41,582 INFO L226 Difference]: Without dead ends: 129 [2018-09-18 10:01:41,583 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 534 GetRequests, 448 SyntacticMatches, 48 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 737 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=391, Invalid=1169, Unknown=0, NotChecked=0, Total=1560 [2018-09-18 10:01:41,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-09-18 10:01:41,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2018-09-18 10:01:41,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-09-18 10:01:41,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 130 transitions. [2018-09-18 10:01:41,590 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 130 transitions. Word has length 124 [2018-09-18 10:01:41,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:41,591 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 130 transitions. [2018-09-18 10:01:41,591 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-18 10:01:41,591 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 130 transitions. [2018-09-18 10:01:41,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-09-18 10:01:41,592 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:41,592 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:41,592 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:41,592 INFO L82 PathProgramCache]: Analyzing trace with hash -2117279729, now seen corresponding path program 22 times [2018-09-18 10:01:41,592 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:41,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:41,593 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:41,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:41,593 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:41,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:41,846 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 177 proven. 284 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-09-18 10:01:41,846 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:41,846 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:41,856 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:41,856 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:41,896 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:41,897 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:41,900 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:42,019 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 178 proven. 253 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:01:42,020 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:42,392 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 178 proven. 253 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:01:42,413 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:42,413 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:42,428 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:42,428 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:42,526 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:42,526 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:42,532 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:42,547 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 178 proven. 253 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:01:42,547 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:42,901 INFO L134 CoverageAnalysis]: Checked inductivity of 651 backedges. 178 proven. 253 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:01:42,902 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:42,902 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17, 17, 17] total 20 [2018-09-18 10:01:42,902 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:42,902 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-18 10:01:42,903 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-18 10:01:42,903 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=263, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:01:42,903 INFO L87 Difference]: Start difference. First operand 129 states and 130 transitions. Second operand 20 states. [2018-09-18 10:01:43,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:43,095 INFO L93 Difference]: Finished difference Result 139 states and 140 transitions. [2018-09-18 10:01:43,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-18 10:01:43,095 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 126 [2018-09-18 10:01:43,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:43,097 INFO L225 Difference]: With dead ends: 139 [2018-09-18 10:01:43,097 INFO L226 Difference]: Without dead ends: 137 [2018-09-18 10:01:43,098 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 535 GetRequests, 465 SyntacticMatches, 50 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 402 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=130, Invalid=332, Unknown=0, NotChecked=0, Total=462 [2018-09-18 10:01:43,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-09-18 10:01:43,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-09-18 10:01:43,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-09-18 10:01:43,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 138 transitions. [2018-09-18 10:01:43,105 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 138 transitions. Word has length 126 [2018-09-18 10:01:43,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:43,106 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 138 transitions. [2018-09-18 10:01:43,106 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-18 10:01:43,106 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 138 transitions. [2018-09-18 10:01:43,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-09-18 10:01:43,107 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:43,107 INFO L376 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 13, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:43,107 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:43,107 INFO L82 PathProgramCache]: Analyzing trace with hash -1516651694, now seen corresponding path program 23 times [2018-09-18 10:01:43,108 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:43,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:43,108 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:43,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:43,109 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:43,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:43,489 INFO L134 CoverageAnalysis]: Checked inductivity of 744 backedges. 324 proven. 156 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-18 10:01:43,490 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:43,490 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:43,497 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:43,498 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:43,556 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2018-09-18 10:01:43,556 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:43,560 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:43,576 INFO L134 CoverageAnalysis]: Checked inductivity of 744 backedges. 324 proven. 156 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-18 10:01:43,576 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:43,856 INFO L134 CoverageAnalysis]: Checked inductivity of 744 backedges. 324 proven. 156 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-18 10:01:43,876 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:43,876 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:43,892 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:43,892 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:44,098 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2018-09-18 10:01:44,098 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:44,103 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:44,137 INFO L134 CoverageAnalysis]: Checked inductivity of 744 backedges. 324 proven. 156 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-18 10:01:44,138 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:44,653 INFO L134 CoverageAnalysis]: Checked inductivity of 744 backedges. 324 proven. 156 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-18 10:01:44,655 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:44,655 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 29 [2018-09-18 10:01:44,655 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:44,655 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-09-18 10:01:44,656 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-09-18 10:01:44,656 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=211, Invalid=601, Unknown=0, NotChecked=0, Total=812 [2018-09-18 10:01:44,656 INFO L87 Difference]: Start difference. First operand 137 states and 138 transitions. Second operand 29 states. [2018-09-18 10:01:45,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:45,127 INFO L93 Difference]: Finished difference Result 200 states and 214 transitions. [2018-09-18 10:01:45,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-18 10:01:45,127 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 134 [2018-09-18 10:01:45,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:45,128 INFO L225 Difference]: With dead ends: 200 [2018-09-18 10:01:45,128 INFO L226 Difference]: Without dead ends: 139 [2018-09-18 10:01:45,129 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 577 GetRequests, 484 SyntacticMatches, 52 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 870 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=449, Invalid=1357, Unknown=0, NotChecked=0, Total=1806 [2018-09-18 10:01:45,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-09-18 10:01:45,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-09-18 10:01:45,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-09-18 10:01:45,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 140 transitions. [2018-09-18 10:01:45,137 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 140 transitions. Word has length 134 [2018-09-18 10:01:45,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:45,137 INFO L480 AbstractCegarLoop]: Abstraction has 139 states and 140 transitions. [2018-09-18 10:01:45,137 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-09-18 10:01:45,137 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 140 transitions. [2018-09-18 10:01:45,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-09-18 10:01:45,138 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:45,138 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:45,138 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:45,139 INFO L82 PathProgramCache]: Analyzing trace with hash 304630604, now seen corresponding path program 24 times [2018-09-18 10:01:45,139 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:45,139 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:45,139 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:45,140 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:45,140 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:45,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:45,670 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 205 proven. 334 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2018-09-18 10:01:45,670 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:45,670 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:45,680 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:45,680 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:45,728 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-09-18 10:01:45,729 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:45,733 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:45,835 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 206 proven. 300 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-18 10:01:45,836 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:46,017 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 206 proven. 300 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-18 10:01:46,037 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:46,037 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:46,052 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:46,052 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:46,319 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-09-18 10:01:46,319 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:46,324 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:46,342 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 206 proven. 300 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-18 10:01:46,342 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:46,548 INFO L134 CoverageAnalysis]: Checked inductivity of 770 backedges. 206 proven. 300 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-09-18 10:01:46,549 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:46,549 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 18, 18, 18, 18] total 21 [2018-09-18 10:01:46,549 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:46,550 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-18 10:01:46,550 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-18 10:01:46,550 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=132, Invalid=288, Unknown=0, NotChecked=0, Total=420 [2018-09-18 10:01:46,550 INFO L87 Difference]: Start difference. First operand 139 states and 140 transitions. Second operand 21 states. [2018-09-18 10:01:46,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:46,746 INFO L93 Difference]: Finished difference Result 149 states and 150 transitions. [2018-09-18 10:01:46,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-18 10:01:46,747 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 136 [2018-09-18 10:01:46,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:46,748 INFO L225 Difference]: With dead ends: 149 [2018-09-18 10:01:46,748 INFO L226 Difference]: Without dead ends: 147 [2018-09-18 10:01:46,749 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 577 GetRequests, 502 SyntacticMatches, 54 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 461 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=145, Invalid=361, Unknown=0, NotChecked=0, Total=506 [2018-09-18 10:01:46,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-09-18 10:01:46,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-09-18 10:01:46,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-09-18 10:01:46,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 148 transitions. [2018-09-18 10:01:46,756 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 148 transitions. Word has length 136 [2018-09-18 10:01:46,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:46,756 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 148 transitions. [2018-09-18 10:01:46,757 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-18 10:01:46,757 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 148 transitions. [2018-09-18 10:01:46,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-09-18 10:01:46,758 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:46,758 INFO L376 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 14, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:46,758 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:46,758 INFO L82 PathProgramCache]: Analyzing trace with hash -1717003889, now seen corresponding path program 25 times [2018-09-18 10:01:46,758 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:46,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:46,759 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:46,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:46,759 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:46,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:47,433 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 377 proven. 182 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-18 10:01:47,434 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:47,434 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:47,441 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:47,441 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:47,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:47,479 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:47,503 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 377 proven. 182 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-18 10:01:47,503 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:47,885 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 377 proven. 182 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-18 10:01:47,905 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:47,905 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:47,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:47,921 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:48,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:48,014 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:48,037 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 377 proven. 182 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-18 10:01:48,038 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:48,371 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 377 proven. 182 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-18 10:01:48,372 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:48,372 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 31 [2018-09-18 10:01:48,372 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:48,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-18 10:01:48,373 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-18 10:01:48,373 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=241, Invalid=689, Unknown=0, NotChecked=0, Total=930 [2018-09-18 10:01:48,373 INFO L87 Difference]: Start difference. First operand 147 states and 148 transitions. Second operand 31 states. [2018-09-18 10:01:49,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:49,243 INFO L93 Difference]: Finished difference Result 214 states and 229 transitions. [2018-09-18 10:01:49,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-09-18 10:01:49,243 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 144 [2018-09-18 10:01:49,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:49,245 INFO L225 Difference]: With dead ends: 214 [2018-09-18 10:01:49,245 INFO L226 Difference]: Without dead ends: 149 [2018-09-18 10:01:49,246 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 620 GetRequests, 520 SyntacticMatches, 56 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1014 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=511, Invalid=1559, Unknown=0, NotChecked=0, Total=2070 [2018-09-18 10:01:49,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-09-18 10:01:49,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-09-18 10:01:49,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-09-18 10:01:49,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 150 transitions. [2018-09-18 10:01:49,254 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 150 transitions. Word has length 144 [2018-09-18 10:01:49,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:49,254 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 150 transitions. [2018-09-18 10:01:49,254 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-18 10:01:49,254 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 150 transitions. [2018-09-18 10:01:49,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-09-18 10:01:49,255 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:49,255 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 14, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:49,256 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:49,256 INFO L82 PathProgramCache]: Analyzing trace with hash 1407645961, now seen corresponding path program 26 times [2018-09-18 10:01:49,256 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:49,257 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:49,257 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:49,257 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:49,257 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:49,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:49,634 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 235 proven. 388 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-09-18 10:01:49,634 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:49,634 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:49,643 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:49,643 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:49,682 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:49,682 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:49,684 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:49,772 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 236 proven. 351 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-18 10:01:49,772 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:49,983 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 236 proven. 351 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-18 10:01:50,003 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:50,003 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:50,018 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:50,018 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:50,122 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:50,122 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:50,130 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:50,157 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 236 proven. 351 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-18 10:01:50,158 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:50,600 INFO L134 CoverageAnalysis]: Checked inductivity of 899 backedges. 236 proven. 351 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-09-18 10:01:50,601 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:50,601 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19, 19, 19] total 22 [2018-09-18 10:01:50,601 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:50,602 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-18 10:01:50,602 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-18 10:01:50,602 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=314, Unknown=0, NotChecked=0, Total=462 [2018-09-18 10:01:50,602 INFO L87 Difference]: Start difference. First operand 149 states and 150 transitions. Second operand 22 states. [2018-09-18 10:01:51,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:51,025 INFO L93 Difference]: Finished difference Result 159 states and 160 transitions. [2018-09-18 10:01:51,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-18 10:01:51,025 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 146 [2018-09-18 10:01:51,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:51,027 INFO L225 Difference]: With dead ends: 159 [2018-09-18 10:01:51,027 INFO L226 Difference]: Without dead ends: 157 [2018-09-18 10:01:51,028 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 619 GetRequests, 539 SyntacticMatches, 58 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 524 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=161, Invalid=391, Unknown=0, NotChecked=0, Total=552 [2018-09-18 10:01:51,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-09-18 10:01:51,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 157. [2018-09-18 10:01:51,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-09-18 10:01:51,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 158 transitions. [2018-09-18 10:01:51,035 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 158 transitions. Word has length 146 [2018-09-18 10:01:51,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:51,035 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 158 transitions. [2018-09-18 10:01:51,036 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-18 10:01:51,036 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 158 transitions. [2018-09-18 10:01:51,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-09-18 10:01:51,037 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:51,037 INFO L376 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:51,037 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:51,037 INFO L82 PathProgramCache]: Analyzing trace with hash -219137460, now seen corresponding path program 27 times [2018-09-18 10:01:51,037 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:51,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:51,038 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:51,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:51,038 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:51,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:51,535 INFO L134 CoverageAnalysis]: Checked inductivity of 1008 backedges. 434 proven. 210 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-18 10:01:51,536 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:51,536 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:51,544 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:51,544 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:51,602 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2018-09-18 10:01:51,603 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:51,606 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:51,630 INFO L134 CoverageAnalysis]: Checked inductivity of 1008 backedges. 434 proven. 210 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-18 10:01:51,630 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:51,950 INFO L134 CoverageAnalysis]: Checked inductivity of 1008 backedges. 434 proven. 210 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-18 10:01:51,971 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:51,971 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:51,988 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:51,988 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:52,240 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2018-09-18 10:01:52,240 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:52,245 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:52,265 INFO L134 CoverageAnalysis]: Checked inductivity of 1008 backedges. 434 proven. 210 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-18 10:01:52,265 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:52,698 INFO L134 CoverageAnalysis]: Checked inductivity of 1008 backedges. 434 proven. 210 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-18 10:01:52,699 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:52,699 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 33 [2018-09-18 10:01:52,699 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:52,700 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-09-18 10:01:52,700 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-09-18 10:01:52,701 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=273, Invalid=783, Unknown=0, NotChecked=0, Total=1056 [2018-09-18 10:01:52,701 INFO L87 Difference]: Start difference. First operand 157 states and 158 transitions. Second operand 33 states. [2018-09-18 10:01:53,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:53,734 INFO L93 Difference]: Finished difference Result 228 states and 244 transitions. [2018-09-18 10:01:53,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-09-18 10:01:53,734 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 154 [2018-09-18 10:01:53,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:53,736 INFO L225 Difference]: With dead ends: 228 [2018-09-18 10:01:53,736 INFO L226 Difference]: Without dead ends: 159 [2018-09-18 10:01:53,737 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 663 GetRequests, 556 SyntacticMatches, 60 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1169 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=577, Invalid=1775, Unknown=0, NotChecked=0, Total=2352 [2018-09-18 10:01:53,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-09-18 10:01:53,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-09-18 10:01:53,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-09-18 10:01:53,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 160 transitions. [2018-09-18 10:01:53,746 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 160 transitions. Word has length 154 [2018-09-18 10:01:53,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:53,746 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 160 transitions. [2018-09-18 10:01:53,746 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-09-18 10:01:53,747 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 160 transitions. [2018-09-18 10:01:53,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2018-09-18 10:01:53,748 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:53,748 INFO L376 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 15, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:53,748 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:53,748 INFO L82 PathProgramCache]: Analyzing trace with hash 1258359110, now seen corresponding path program 28 times [2018-09-18 10:01:53,748 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:53,749 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:53,749 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:53,749 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:53,749 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:53,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:54,676 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 267 proven. 446 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2018-09-18 10:01:54,676 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:54,676 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:54,684 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:54,684 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:54,730 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:54,730 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:54,733 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:54,800 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 268 proven. 406 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-18 10:01:54,800 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:55,256 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 268 proven. 406 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-18 10:01:55,275 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:55,275 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:55,292 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:55,292 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:55,412 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:55,412 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:55,417 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:55,435 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 268 proven. 406 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-18 10:01:55,435 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:55,687 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 268 proven. 406 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2018-09-18 10:01:55,688 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:55,688 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20, 20, 20, 20] total 23 [2018-09-18 10:01:55,689 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:55,689 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-09-18 10:01:55,689 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-09-18 10:01:55,689 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=341, Unknown=0, NotChecked=0, Total=506 [2018-09-18 10:01:55,689 INFO L87 Difference]: Start difference. First operand 159 states and 160 transitions. Second operand 23 states. [2018-09-18 10:01:56,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:56,289 INFO L93 Difference]: Finished difference Result 169 states and 170 transitions. [2018-09-18 10:01:56,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-18 10:01:56,290 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 156 [2018-09-18 10:01:56,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:56,292 INFO L225 Difference]: With dead ends: 169 [2018-09-18 10:01:56,292 INFO L226 Difference]: Without dead ends: 167 [2018-09-18 10:01:56,293 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 661 GetRequests, 576 SyntacticMatches, 62 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 591 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=178, Invalid=422, Unknown=0, NotChecked=0, Total=600 [2018-09-18 10:01:56,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-09-18 10:01:56,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 167. [2018-09-18 10:01:56,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-09-18 10:01:56,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 168 transitions. [2018-09-18 10:01:56,302 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 168 transitions. Word has length 156 [2018-09-18 10:01:56,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:56,302 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 168 transitions. [2018-09-18 10:01:56,302 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-09-18 10:01:56,302 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 168 transitions. [2018-09-18 10:01:56,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-09-18 10:01:56,303 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:56,304 INFO L376 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:56,304 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:56,304 INFO L82 PathProgramCache]: Analyzing trace with hash -884425335, now seen corresponding path program 29 times [2018-09-18 10:01:56,304 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:56,305 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:56,305 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:56,305 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:56,305 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:56,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:56,736 INFO L134 CoverageAnalysis]: Checked inductivity of 1155 backedges. 495 proven. 240 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-18 10:01:56,737 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:56,737 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:56,745 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:56,745 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:56,802 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2018-09-18 10:01:56,803 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:56,807 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:56,831 INFO L134 CoverageAnalysis]: Checked inductivity of 1155 backedges. 495 proven. 240 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-18 10:01:56,831 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:57,299 INFO L134 CoverageAnalysis]: Checked inductivity of 1155 backedges. 495 proven. 240 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-18 10:01:57,329 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:57,329 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:57,359 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:57,359 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:57,653 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2018-09-18 10:01:57,653 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:57,659 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:57,681 INFO L134 CoverageAnalysis]: Checked inductivity of 1155 backedges. 495 proven. 240 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-18 10:01:57,681 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:58,019 INFO L134 CoverageAnalysis]: Checked inductivity of 1155 backedges. 495 proven. 240 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-18 10:01:58,020 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:58,021 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 35 [2018-09-18 10:01:58,021 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:58,021 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-09-18 10:01:58,021 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-09-18 10:01:58,022 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=307, Invalid=883, Unknown=0, NotChecked=0, Total=1190 [2018-09-18 10:01:58,022 INFO L87 Difference]: Start difference. First operand 167 states and 168 transitions. Second operand 35 states. [2018-09-18 10:01:59,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:59,897 INFO L93 Difference]: Finished difference Result 242 states and 259 transitions. [2018-09-18 10:01:59,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-09-18 10:01:59,897 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 164 [2018-09-18 10:01:59,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:59,898 INFO L225 Difference]: With dead ends: 242 [2018-09-18 10:01:59,899 INFO L226 Difference]: Without dead ends: 169 [2018-09-18 10:01:59,900 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 706 GetRequests, 592 SyntacticMatches, 64 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1335 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=647, Invalid=2005, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:01:59,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-09-18 10:01:59,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2018-09-18 10:01:59,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-09-18 10:01:59,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 170 transitions. [2018-09-18 10:01:59,909 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 170 transitions. Word has length 164 [2018-09-18 10:01:59,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:59,910 INFO L480 AbstractCegarLoop]: Abstraction has 169 states and 170 transitions. [2018-09-18 10:01:59,910 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-09-18 10:01:59,910 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 170 transitions. [2018-09-18 10:01:59,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-09-18 10:01:59,911 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:59,911 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 16, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:59,911 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:59,911 INFO L82 PathProgramCache]: Analyzing trace with hash -1098474493, now seen corresponding path program 30 times [2018-09-18 10:01:59,912 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:59,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:59,912 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:59,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:59,913 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:59,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:00,240 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 301 proven. 508 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-09-18 10:02:00,240 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:00,240 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:00,248 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:00,248 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:00,310 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2018-09-18 10:02:00,310 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:00,313 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:00,382 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 302 proven. 465 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-18 10:02:00,382 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:00,698 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 302 proven. 465 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-18 10:02:00,717 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:00,717 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:00,748 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:00,748 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:01,037 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2018-09-18 10:02:01,038 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:01,049 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:01,079 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 302 proven. 465 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-18 10:02:01,080 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:02,302 INFO L134 CoverageAnalysis]: Checked inductivity of 1187 backedges. 302 proven. 465 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-09-18 10:02:02,303 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:02,303 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21, 21, 21] total 24 [2018-09-18 10:02:02,303 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:02,304 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-18 10:02:02,304 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-18 10:02:02,305 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=369, Unknown=0, NotChecked=0, Total=552 [2018-09-18 10:02:02,305 INFO L87 Difference]: Start difference. First operand 169 states and 170 transitions. Second operand 24 states. [2018-09-18 10:02:02,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:02,644 INFO L93 Difference]: Finished difference Result 179 states and 180 transitions. [2018-09-18 10:02:02,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-18 10:02:02,644 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 166 [2018-09-18 10:02:02,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:02,645 INFO L225 Difference]: With dead ends: 179 [2018-09-18 10:02:02,645 INFO L226 Difference]: Without dead ends: 177 [2018-09-18 10:02:02,646 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 703 GetRequests, 613 SyntacticMatches, 66 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 662 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=196, Invalid=454, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:02:02,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-09-18 10:02:02,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2018-09-18 10:02:02,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-09-18 10:02:02,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 178 transitions. [2018-09-18 10:02:02,655 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 178 transitions. Word has length 166 [2018-09-18 10:02:02,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:02,656 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 178 transitions. [2018-09-18 10:02:02,656 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-18 10:02:02,656 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 178 transitions. [2018-09-18 10:02:02,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2018-09-18 10:02:02,657 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:02,657 INFO L376 BasicCegarLoop]: trace histogram [17, 17, 17, 17, 17, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:02,658 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:02,658 INFO L82 PathProgramCache]: Analyzing trace with hash 1738687302, now seen corresponding path program 31 times [2018-09-18 10:02:02,658 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:02,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:02,659 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:02,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:02,659 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:02,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:03,437 INFO L134 CoverageAnalysis]: Checked inductivity of 1312 backedges. 560 proven. 272 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-18 10:02:03,437 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:03,437 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:03,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:03,445 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:03,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:03,496 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:03,520 INFO L134 CoverageAnalysis]: Checked inductivity of 1312 backedges. 560 proven. 272 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-18 10:02:03,520 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:03,921 INFO L134 CoverageAnalysis]: Checked inductivity of 1312 backedges. 560 proven. 272 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-18 10:02:03,941 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:03,941 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:03,956 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:03,956 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:04,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:04,067 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:04,098 INFO L134 CoverageAnalysis]: Checked inductivity of 1312 backedges. 560 proven. 272 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-18 10:02:04,098 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:04,658 INFO L134 CoverageAnalysis]: Checked inductivity of 1312 backedges. 560 proven. 272 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-18 10:02:04,659 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:04,659 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 37 [2018-09-18 10:02:04,659 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:04,660 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-09-18 10:02:04,660 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-09-18 10:02:04,660 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=343, Invalid=989, Unknown=0, NotChecked=0, Total=1332 [2018-09-18 10:02:04,661 INFO L87 Difference]: Start difference. First operand 177 states and 178 transitions. Second operand 37 states. [2018-09-18 10:02:05,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:05,617 INFO L93 Difference]: Finished difference Result 256 states and 274 transitions. [2018-09-18 10:02:05,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-09-18 10:02:05,617 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 174 [2018-09-18 10:02:05,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:05,618 INFO L225 Difference]: With dead ends: 256 [2018-09-18 10:02:05,618 INFO L226 Difference]: Without dead ends: 179 [2018-09-18 10:02:05,619 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 749 GetRequests, 628 SyntacticMatches, 68 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1512 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=721, Invalid=2249, Unknown=0, NotChecked=0, Total=2970 [2018-09-18 10:02:05,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-09-18 10:02:05,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2018-09-18 10:02:05,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-09-18 10:02:05,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 180 transitions. [2018-09-18 10:02:05,628 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 180 transitions. Word has length 174 [2018-09-18 10:02:05,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:05,628 INFO L480 AbstractCegarLoop]: Abstraction has 179 states and 180 transitions. [2018-09-18 10:02:05,628 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-09-18 10:02:05,628 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 180 transitions. [2018-09-18 10:02:05,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-09-18 10:02:05,629 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:05,630 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 17, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:05,630 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:05,630 INFO L82 PathProgramCache]: Analyzing trace with hash 2057294144, now seen corresponding path program 32 times [2018-09-18 10:02:05,630 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:05,631 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:05,631 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:05,631 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:05,631 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:05,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:06,055 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 337 proven. 574 refuted. 0 times theorem prover too weak. 435 trivial. 0 not checked. [2018-09-18 10:02:06,055 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:06,055 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:06,063 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:06,063 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:06,110 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:06,110 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:06,113 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:06,208 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 338 proven. 528 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-18 10:02:06,208 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:06,586 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 338 proven. 528 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-18 10:02:06,606 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:06,606 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:06,639 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:06,639 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:06,745 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:06,745 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:06,754 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:06,778 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 338 proven. 528 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-18 10:02:06,778 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:07,083 INFO L134 CoverageAnalysis]: Checked inductivity of 1346 backedges. 338 proven. 528 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-09-18 10:02:07,085 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:07,085 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22, 22, 22, 22] total 25 [2018-09-18 10:02:07,085 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:07,085 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-18 10:02:07,085 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-18 10:02:07,086 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=398, Unknown=0, NotChecked=0, Total=600 [2018-09-18 10:02:07,086 INFO L87 Difference]: Start difference. First operand 179 states and 180 transitions. Second operand 25 states. [2018-09-18 10:02:07,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:07,722 INFO L93 Difference]: Finished difference Result 189 states and 190 transitions. [2018-09-18 10:02:07,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-18 10:02:07,722 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 176 [2018-09-18 10:02:07,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:07,724 INFO L225 Difference]: With dead ends: 189 [2018-09-18 10:02:07,725 INFO L226 Difference]: Without dead ends: 187 [2018-09-18 10:02:07,725 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 745 GetRequests, 650 SyntacticMatches, 70 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 737 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=215, Invalid=487, Unknown=0, NotChecked=0, Total=702 [2018-09-18 10:02:07,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-09-18 10:02:07,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 187. [2018-09-18 10:02:07,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-09-18 10:02:07,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 188 transitions. [2018-09-18 10:02:07,734 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 188 transitions. Word has length 176 [2018-09-18 10:02:07,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:07,734 INFO L480 AbstractCegarLoop]: Abstraction has 187 states and 188 transitions. [2018-09-18 10:02:07,735 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-18 10:02:07,735 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 188 transitions. [2018-09-18 10:02:07,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2018-09-18 10:02:07,736 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:07,736 INFO L376 BasicCegarLoop]: trace histogram [18, 18, 18, 18, 18, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:07,736 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:07,737 INFO L82 PathProgramCache]: Analyzing trace with hash 2047142787, now seen corresponding path program 33 times [2018-09-18 10:02:07,737 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:07,737 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:07,737 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:07,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:07,738 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:07,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:08,613 INFO L134 CoverageAnalysis]: Checked inductivity of 1479 backedges. 629 proven. 306 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-18 10:02:08,613 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:08,613 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:08,621 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:08,621 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:08,683 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2018-09-18 10:02:08,684 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:08,687 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:08,712 INFO L134 CoverageAnalysis]: Checked inductivity of 1479 backedges. 629 proven. 306 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-18 10:02:08,712 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:09,151 INFO L134 CoverageAnalysis]: Checked inductivity of 1479 backedges. 629 proven. 306 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-18 10:02:09,171 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:09,171 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:09,185 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:09,185 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:09,534 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2018-09-18 10:02:09,534 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:09,540 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:09,576 INFO L134 CoverageAnalysis]: Checked inductivity of 1479 backedges. 629 proven. 306 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-18 10:02:09,576 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:10,478 INFO L134 CoverageAnalysis]: Checked inductivity of 1479 backedges. 629 proven. 306 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-18 10:02:10,480 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:10,480 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 39 [2018-09-18 10:02:10,480 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:10,481 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-09-18 10:02:10,481 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-09-18 10:02:10,482 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=381, Invalid=1101, Unknown=0, NotChecked=0, Total=1482 [2018-09-18 10:02:10,482 INFO L87 Difference]: Start difference. First operand 187 states and 188 transitions. Second operand 39 states. [2018-09-18 10:02:11,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:11,551 INFO L93 Difference]: Finished difference Result 270 states and 289 transitions. [2018-09-18 10:02:11,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-18 10:02:11,552 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 184 [2018-09-18 10:02:11,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:11,553 INFO L225 Difference]: With dead ends: 270 [2018-09-18 10:02:11,553 INFO L226 Difference]: Without dead ends: 189 [2018-09-18 10:02:11,555 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 792 GetRequests, 664 SyntacticMatches, 72 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1700 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=799, Invalid=2507, Unknown=0, NotChecked=0, Total=3306 [2018-09-18 10:02:11,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-09-18 10:02:11,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 189. [2018-09-18 10:02:11,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-09-18 10:02:11,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 190 transitions. [2018-09-18 10:02:11,565 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 190 transitions. Word has length 184 [2018-09-18 10:02:11,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:11,565 INFO L480 AbstractCegarLoop]: Abstraction has 189 states and 190 transitions. [2018-09-18 10:02:11,565 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-09-18 10:02:11,565 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 190 transitions. [2018-09-18 10:02:11,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2018-09-18 10:02:11,566 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:11,566 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 18, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:11,567 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:11,567 INFO L82 PathProgramCache]: Analyzing trace with hash 311216381, now seen corresponding path program 34 times [2018-09-18 10:02:11,567 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:11,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:11,568 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:11,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:11,568 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:11,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:12,376 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 375 proven. 644 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-09-18 10:02:12,377 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:12,377 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:12,384 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:12,384 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:12,434 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:12,434 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:12,437 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:12,494 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 376 proven. 595 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-18 10:02:12,494 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:13,212 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 376 proven. 595 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-18 10:02:13,233 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:13,233 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:13,248 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:13,248 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:13,380 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:13,380 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:13,386 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:13,419 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 376 proven. 595 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-18 10:02:13,419 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:14,314 INFO L134 CoverageAnalysis]: Checked inductivity of 1515 backedges. 376 proven. 595 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-09-18 10:02:14,315 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:14,316 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 23, 23, 23] total 26 [2018-09-18 10:02:14,316 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:14,316 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-18 10:02:14,316 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-18 10:02:14,317 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=428, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:02:14,317 INFO L87 Difference]: Start difference. First operand 189 states and 190 transitions. Second operand 26 states. [2018-09-18 10:02:14,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:14,556 INFO L93 Difference]: Finished difference Result 199 states and 200 transitions. [2018-09-18 10:02:14,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-18 10:02:14,557 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 186 [2018-09-18 10:02:14,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:14,559 INFO L225 Difference]: With dead ends: 199 [2018-09-18 10:02:14,559 INFO L226 Difference]: Without dead ends: 197 [2018-09-18 10:02:14,560 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 787 GetRequests, 687 SyntacticMatches, 74 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 816 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=235, Invalid=521, Unknown=0, NotChecked=0, Total=756 [2018-09-18 10:02:14,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-09-18 10:02:14,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 197. [2018-09-18 10:02:14,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-09-18 10:02:14,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 198 transitions. [2018-09-18 10:02:14,569 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 198 transitions. Word has length 186 [2018-09-18 10:02:14,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:14,569 INFO L480 AbstractCegarLoop]: Abstraction has 197 states and 198 transitions. [2018-09-18 10:02:14,569 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-18 10:02:14,569 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 198 transitions. [2018-09-18 10:02:14,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2018-09-18 10:02:14,570 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:14,571 INFO L376 BasicCegarLoop]: trace histogram [19, 19, 19, 19, 19, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:14,571 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:14,571 INFO L82 PathProgramCache]: Analyzing trace with hash -477047232, now seen corresponding path program 35 times [2018-09-18 10:02:14,571 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:14,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:14,572 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:14,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:14,572 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:14,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:15,893 INFO L134 CoverageAnalysis]: Checked inductivity of 1656 backedges. 702 proven. 342 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-18 10:02:15,894 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:15,894 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:15,901 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:15,901 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:15,971 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2018-09-18 10:02:15,972 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:15,976 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:16,003 INFO L134 CoverageAnalysis]: Checked inductivity of 1656 backedges. 702 proven. 342 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-18 10:02:16,003 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:16,484 INFO L134 CoverageAnalysis]: Checked inductivity of 1656 backedges. 702 proven. 342 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-18 10:02:16,504 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:16,504 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:16,519 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:16,519 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:16,900 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2018-09-18 10:02:16,901 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:16,907 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:16,934 INFO L134 CoverageAnalysis]: Checked inductivity of 1656 backedges. 702 proven. 342 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-18 10:02:16,935 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:17,414 INFO L134 CoverageAnalysis]: Checked inductivity of 1656 backedges. 702 proven. 342 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-18 10:02:17,415 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:17,415 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 41 [2018-09-18 10:02:17,416 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:17,416 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-09-18 10:02:17,416 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-09-18 10:02:17,417 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=421, Invalid=1219, Unknown=0, NotChecked=0, Total=1640 [2018-09-18 10:02:17,417 INFO L87 Difference]: Start difference. First operand 197 states and 198 transitions. Second operand 41 states. [2018-09-18 10:02:18,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:18,760 INFO L93 Difference]: Finished difference Result 284 states and 304 transitions. [2018-09-18 10:02:18,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-09-18 10:02:18,760 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 194 [2018-09-18 10:02:18,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:18,762 INFO L225 Difference]: With dead ends: 284 [2018-09-18 10:02:18,762 INFO L226 Difference]: Without dead ends: 199 [2018-09-18 10:02:18,763 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 835 GetRequests, 700 SyntacticMatches, 76 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1899 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=881, Invalid=2779, Unknown=0, NotChecked=0, Total=3660 [2018-09-18 10:02:18,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-09-18 10:02:18,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 199. [2018-09-18 10:02:18,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-09-18 10:02:18,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 200 transitions. [2018-09-18 10:02:18,775 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 200 transitions. Word has length 194 [2018-09-18 10:02:18,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:18,775 INFO L480 AbstractCegarLoop]: Abstraction has 199 states and 200 transitions. [2018-09-18 10:02:18,775 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-09-18 10:02:18,776 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 200 transitions. [2018-09-18 10:02:18,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2018-09-18 10:02:18,777 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:18,777 INFO L376 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 19, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:18,777 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:18,778 INFO L82 PathProgramCache]: Analyzing trace with hash 581280570, now seen corresponding path program 36 times [2018-09-18 10:02:18,778 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:18,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:18,779 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:18,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:18,779 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:18,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:19,396 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 415 proven. 718 refuted. 0 times theorem prover too weak. 561 trivial. 0 not checked. [2018-09-18 10:02:19,396 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:19,396 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:19,404 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:19,404 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:19,469 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 20 check-sat command(s) [2018-09-18 10:02:19,469 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:19,472 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:19,542 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 416 proven. 666 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-18 10:02:19,543 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:19,932 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 416 proven. 666 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-18 10:02:19,953 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:19,953 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:19,968 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:19,968 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:20,367 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 20 check-sat command(s) [2018-09-18 10:02:20,367 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:20,375 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:20,403 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 416 proven. 666 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-18 10:02:20,404 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:20,801 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 416 proven. 666 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2018-09-18 10:02:20,803 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:20,803 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 24, 24, 24, 24] total 27 [2018-09-18 10:02:20,803 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:20,804 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-18 10:02:20,804 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-18 10:02:20,804 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=243, Invalid=459, Unknown=0, NotChecked=0, Total=702 [2018-09-18 10:02:20,804 INFO L87 Difference]: Start difference. First operand 199 states and 200 transitions. Second operand 27 states. [2018-09-18 10:02:21,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:21,073 INFO L93 Difference]: Finished difference Result 209 states and 210 transitions. [2018-09-18 10:02:21,073 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-09-18 10:02:21,074 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 196 [2018-09-18 10:02:21,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:21,075 INFO L225 Difference]: With dead ends: 209 [2018-09-18 10:02:21,075 INFO L226 Difference]: Without dead ends: 207 [2018-09-18 10:02:21,076 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 829 GetRequests, 724 SyntacticMatches, 78 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 899 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=256, Invalid=556, Unknown=0, NotChecked=0, Total=812 [2018-09-18 10:02:21,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-09-18 10:02:21,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2018-09-18 10:02:21,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-09-18 10:02:21,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 208 transitions. [2018-09-18 10:02:21,085 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 208 transitions. Word has length 196 [2018-09-18 10:02:21,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:21,086 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 208 transitions. [2018-09-18 10:02:21,086 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-18 10:02:21,086 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 208 transitions. [2018-09-18 10:02:21,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-09-18 10:02:21,087 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:21,087 INFO L376 BasicCegarLoop]: trace histogram [20, 20, 20, 20, 20, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:21,087 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:21,088 INFO L82 PathProgramCache]: Analyzing trace with hash -159505539, now seen corresponding path program 37 times [2018-09-18 10:02:21,088 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:21,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:21,088 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:21,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:21,089 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:21,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:21,775 INFO L134 CoverageAnalysis]: Checked inductivity of 1843 backedges. 779 proven. 380 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-18 10:02:21,775 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:21,776 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:21,783 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:21,783 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:21,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:21,843 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:21,872 INFO L134 CoverageAnalysis]: Checked inductivity of 1843 backedges. 779 proven. 380 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-18 10:02:21,872 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:22,393 INFO L134 CoverageAnalysis]: Checked inductivity of 1843 backedges. 779 proven. 380 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-18 10:02:22,412 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:22,412 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:22,427 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:22,427 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:22,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:22,556 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:22,582 INFO L134 CoverageAnalysis]: Checked inductivity of 1843 backedges. 779 proven. 380 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-18 10:02:22,582 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:23,462 INFO L134 CoverageAnalysis]: Checked inductivity of 1843 backedges. 779 proven. 380 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-18 10:02:23,464 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:23,464 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43, 43, 43] total 43 [2018-09-18 10:02:23,464 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:23,464 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-09-18 10:02:23,464 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-09-18 10:02:23,465 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=463, Invalid=1343, Unknown=0, NotChecked=0, Total=1806 [2018-09-18 10:02:23,465 INFO L87 Difference]: Start difference. First operand 207 states and 208 transitions. Second operand 43 states. [2018-09-18 10:02:24,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:24,313 INFO L93 Difference]: Finished difference Result 298 states and 319 transitions. [2018-09-18 10:02:24,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-09-18 10:02:24,313 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 204 [2018-09-18 10:02:24,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:24,314 INFO L225 Difference]: With dead ends: 298 [2018-09-18 10:02:24,314 INFO L226 Difference]: Without dead ends: 209 [2018-09-18 10:02:24,315 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 878 GetRequests, 736 SyntacticMatches, 80 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2109 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=967, Invalid=3065, Unknown=0, NotChecked=0, Total=4032 [2018-09-18 10:02:24,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-09-18 10:02:24,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2018-09-18 10:02:24,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-09-18 10:02:24,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 210 transitions. [2018-09-18 10:02:24,325 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 210 transitions. Word has length 204 [2018-09-18 10:02:24,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:24,325 INFO L480 AbstractCegarLoop]: Abstraction has 209 states and 210 transitions. [2018-09-18 10:02:24,325 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-09-18 10:02:24,325 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 210 transitions. [2018-09-18 10:02:24,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2018-09-18 10:02:24,326 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:24,327 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 20, 20, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:24,327 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:24,327 INFO L82 PathProgramCache]: Analyzing trace with hash 307920887, now seen corresponding path program 38 times [2018-09-18 10:02:24,327 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:24,328 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:24,328 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:24,328 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:24,328 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:24,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:24,832 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 457 proven. 796 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-18 10:02:24,833 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:24,833 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:24,841 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:24,841 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:24,898 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:24,898 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:24,901 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:24,981 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 458 proven. 741 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-18 10:02:24,981 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:25,461 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 458 proven. 741 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-18 10:02:25,481 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:25,481 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:25,496 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:25,496 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:25,628 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:25,628 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:25,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:25,667 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 458 proven. 741 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-18 10:02:25,667 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:26,071 INFO L134 CoverageAnalysis]: Checked inductivity of 1883 backedges. 458 proven. 741 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-09-18 10:02:26,072 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:26,072 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 25, 25, 25] total 28 [2018-09-18 10:02:26,072 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:26,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-09-18 10:02:26,073 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-09-18 10:02:26,074 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=265, Invalid=491, Unknown=0, NotChecked=0, Total=756 [2018-09-18 10:02:26,074 INFO L87 Difference]: Start difference. First operand 209 states and 210 transitions. Second operand 28 states. [2018-09-18 10:02:26,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:26,388 INFO L93 Difference]: Finished difference Result 219 states and 220 transitions. [2018-09-18 10:02:26,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-18 10:02:26,388 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 206 [2018-09-18 10:02:26,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:26,390 INFO L225 Difference]: With dead ends: 219 [2018-09-18 10:02:26,390 INFO L226 Difference]: Without dead ends: 217 [2018-09-18 10:02:26,391 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 871 GetRequests, 761 SyntacticMatches, 82 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 986 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=278, Invalid=592, Unknown=0, NotChecked=0, Total=870 [2018-09-18 10:02:26,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-09-18 10:02:26,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 217. [2018-09-18 10:02:26,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-09-18 10:02:26,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 218 transitions. [2018-09-18 10:02:26,401 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 218 transitions. Word has length 206 [2018-09-18 10:02:26,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:26,402 INFO L480 AbstractCegarLoop]: Abstraction has 217 states and 218 transitions. [2018-09-18 10:02:26,402 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-09-18 10:02:26,402 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 218 transitions. [2018-09-18 10:02:26,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2018-09-18 10:02:26,403 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:26,403 INFO L376 BasicCegarLoop]: trace histogram [21, 21, 21, 21, 21, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:26,404 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:26,404 INFO L82 PathProgramCache]: Analyzing trace with hash 941421370, now seen corresponding path program 39 times [2018-09-18 10:02:26,404 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:26,404 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:26,405 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:26,405 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:26,405 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:26,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:29,064 INFO L134 CoverageAnalysis]: Checked inductivity of 2040 backedges. 860 proven. 420 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-18 10:02:29,064 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:29,064 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:29,073 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:29,073 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:29,149 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 21 check-sat command(s) [2018-09-18 10:02:29,149 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:29,153 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:29,186 INFO L134 CoverageAnalysis]: Checked inductivity of 2040 backedges. 860 proven. 420 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-18 10:02:29,186 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:29,874 INFO L134 CoverageAnalysis]: Checked inductivity of 2040 backedges. 860 proven. 420 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-18 10:02:29,894 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:29,894 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:29,910 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:29,910 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:30,368 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 21 check-sat command(s) [2018-09-18 10:02:30,368 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:30,375 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:30,407 INFO L134 CoverageAnalysis]: Checked inductivity of 2040 backedges. 860 proven. 420 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-18 10:02:30,407 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:31,026 INFO L134 CoverageAnalysis]: Checked inductivity of 2040 backedges. 860 proven. 420 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-18 10:02:31,027 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:31,028 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45, 45, 45, 45] total 45 [2018-09-18 10:02:31,028 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:31,028 INFO L459 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-09-18 10:02:31,028 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-09-18 10:02:31,029 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=507, Invalid=1473, Unknown=0, NotChecked=0, Total=1980 [2018-09-18 10:02:31,029 INFO L87 Difference]: Start difference. First operand 217 states and 218 transitions. Second operand 45 states. [2018-09-18 10:02:32,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:32,030 INFO L93 Difference]: Finished difference Result 312 states and 334 transitions. [2018-09-18 10:02:32,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-09-18 10:02:32,030 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 214 [2018-09-18 10:02:32,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:32,031 INFO L225 Difference]: With dead ends: 312 [2018-09-18 10:02:32,032 INFO L226 Difference]: Without dead ends: 219 [2018-09-18 10:02:32,033 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 921 GetRequests, 772 SyntacticMatches, 84 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2330 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=1057, Invalid=3365, Unknown=0, NotChecked=0, Total=4422 [2018-09-18 10:02:32,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-09-18 10:02:32,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 219. [2018-09-18 10:02:32,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219 states. [2018-09-18 10:02:32,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 220 transitions. [2018-09-18 10:02:32,044 INFO L78 Accepts]: Start accepts. Automaton has 219 states and 220 transitions. Word has length 214 [2018-09-18 10:02:32,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:32,044 INFO L480 AbstractCegarLoop]: Abstraction has 219 states and 220 transitions. [2018-09-18 10:02:32,044 INFO L481 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-09-18 10:02:32,044 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 220 transitions. [2018-09-18 10:02:32,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2018-09-18 10:02:32,045 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:32,046 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 21, 21, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:32,046 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:32,046 INFO L82 PathProgramCache]: Analyzing trace with hash 1446215476, now seen corresponding path program 40 times [2018-09-18 10:02:32,046 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:32,047 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:32,047 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:32,047 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:32,047 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:32,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:33,630 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 501 proven. 878 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2018-09-18 10:02:33,630 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:33,630 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:33,637 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:33,637 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:33,699 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:33,700 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:33,704 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:33,787 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 502 proven. 820 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-18 10:02:33,787 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:34,247 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 502 proven. 820 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-18 10:02:34,267 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:34,267 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:34,282 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:34,282 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:34,438 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:34,438 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:34,445 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:34,481 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 502 proven. 820 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-18 10:02:34,481 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:34,904 INFO L134 CoverageAnalysis]: Checked inductivity of 2082 backedges. 502 proven. 820 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2018-09-18 10:02:34,905 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:34,906 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 26, 26, 26, 26] total 29 [2018-09-18 10:02:34,906 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:34,906 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-09-18 10:02:34,906 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-09-18 10:02:34,907 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=288, Invalid=524, Unknown=0, NotChecked=0, Total=812 [2018-09-18 10:02:34,907 INFO L87 Difference]: Start difference. First operand 219 states and 220 transitions. Second operand 29 states. [2018-09-18 10:02:35,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:35,200 INFO L93 Difference]: Finished difference Result 229 states and 230 transitions. [2018-09-18 10:02:35,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-18 10:02:35,201 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 216 [2018-09-18 10:02:35,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:35,203 INFO L225 Difference]: With dead ends: 229 [2018-09-18 10:02:35,203 INFO L226 Difference]: Without dead ends: 227 [2018-09-18 10:02:35,203 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 913 GetRequests, 798 SyntacticMatches, 86 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1077 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=301, Invalid=629, Unknown=0, NotChecked=0, Total=930 [2018-09-18 10:02:35,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-09-18 10:02:35,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 227. [2018-09-18 10:02:35,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227 states. [2018-09-18 10:02:35,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227 states to 227 states and 228 transitions. [2018-09-18 10:02:35,213 INFO L78 Accepts]: Start accepts. Automaton has 227 states and 228 transitions. Word has length 216 [2018-09-18 10:02:35,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:35,214 INFO L480 AbstractCegarLoop]: Abstraction has 227 states and 228 transitions. [2018-09-18 10:02:35,214 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-09-18 10:02:35,214 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 228 transitions. [2018-09-18 10:02:35,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2018-09-18 10:02:35,215 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:35,215 INFO L376 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:35,216 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:35,216 INFO L82 PathProgramCache]: Analyzing trace with hash -1563073161, now seen corresponding path program 41 times [2018-09-18 10:02:35,216 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:35,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:35,217 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:35,217 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:35,217 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:35,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:36,348 INFO L134 CoverageAnalysis]: Checked inductivity of 2247 backedges. 945 proven. 462 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-18 10:02:36,349 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:36,349 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:36,356 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:36,356 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:36,439 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-09-18 10:02:36,440 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:36,444 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:36,480 INFO L134 CoverageAnalysis]: Checked inductivity of 2247 backedges. 945 proven. 462 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-18 10:02:36,480 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:37,110 INFO L134 CoverageAnalysis]: Checked inductivity of 2247 backedges. 945 proven. 462 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-18 10:02:37,130 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:37,130 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:37,145 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:37,145 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:37,643 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-09-18 10:02:37,643 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:37,650 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:37,685 INFO L134 CoverageAnalysis]: Checked inductivity of 2247 backedges. 945 proven. 462 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-18 10:02:37,685 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:38,529 INFO L134 CoverageAnalysis]: Checked inductivity of 2247 backedges. 945 proven. 462 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-18 10:02:38,531 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:38,531 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47, 47, 47] total 47 [2018-09-18 10:02:38,531 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:38,532 INFO L459 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-09-18 10:02:38,532 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-09-18 10:02:38,532 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=553, Invalid=1609, Unknown=0, NotChecked=0, Total=2162 [2018-09-18 10:02:38,533 INFO L87 Difference]: Start difference. First operand 227 states and 228 transitions. Second operand 47 states. [2018-09-18 10:02:39,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:39,911 INFO L93 Difference]: Finished difference Result 326 states and 349 transitions. [2018-09-18 10:02:39,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-09-18 10:02:39,911 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 224 [2018-09-18 10:02:39,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:39,913 INFO L225 Difference]: With dead ends: 326 [2018-09-18 10:02:39,913 INFO L226 Difference]: Without dead ends: 229 [2018-09-18 10:02:39,914 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 964 GetRequests, 808 SyntacticMatches, 88 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2562 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=1151, Invalid=3679, Unknown=0, NotChecked=0, Total=4830 [2018-09-18 10:02:39,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-09-18 10:02:39,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 229. [2018-09-18 10:02:39,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229 states. [2018-09-18 10:02:39,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229 states to 229 states and 230 transitions. [2018-09-18 10:02:39,923 INFO L78 Accepts]: Start accepts. Automaton has 229 states and 230 transitions. Word has length 224 [2018-09-18 10:02:39,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:39,923 INFO L480 AbstractCegarLoop]: Abstraction has 229 states and 230 transitions. [2018-09-18 10:02:39,924 INFO L481 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-09-18 10:02:39,924 INFO L276 IsEmpty]: Start isEmpty. Operand 229 states and 230 transitions. [2018-09-18 10:02:39,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2018-09-18 10:02:39,925 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:39,925 INFO L376 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 22, 22, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:39,925 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:39,926 INFO L82 PathProgramCache]: Analyzing trace with hash 835764465, now seen corresponding path program 42 times [2018-09-18 10:02:39,926 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:39,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:39,926 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:39,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:39,927 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:39,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:41,329 INFO L134 CoverageAnalysis]: Checked inductivity of 2291 backedges. 547 proven. 964 refuted. 0 times theorem prover too weak. 780 trivial. 0 not checked. [2018-09-18 10:02:41,329 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:41,329 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:41,336 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:41,336 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:41,419 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 23 check-sat command(s) [2018-09-18 10:02:41,419 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:41,423 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:41,513 INFO L134 CoverageAnalysis]: Checked inductivity of 2291 backedges. 548 proven. 903 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-18 10:02:41,513 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:42,093 INFO L134 CoverageAnalysis]: Checked inductivity of 2291 backedges. 548 proven. 903 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-18 10:02:42,112 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:42,113 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:42,128 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:42,128 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:42,645 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 23 check-sat command(s) [2018-09-18 10:02:42,646 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:42,654 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:42,695 INFO L134 CoverageAnalysis]: Checked inductivity of 2291 backedges. 548 proven. 903 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-18 10:02:42,695 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:43,154 INFO L134 CoverageAnalysis]: Checked inductivity of 2291 backedges. 548 proven. 903 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-09-18 10:02:43,156 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:43,156 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 27, 27, 27, 27] total 30 [2018-09-18 10:02:43,156 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:43,156 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-09-18 10:02:43,156 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-09-18 10:02:43,157 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=312, Invalid=558, Unknown=0, NotChecked=0, Total=870 [2018-09-18 10:02:43,157 INFO L87 Difference]: Start difference. First operand 229 states and 230 transitions. Second operand 30 states. [2018-09-18 10:02:43,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:43,582 INFO L93 Difference]: Finished difference Result 239 states and 240 transitions. [2018-09-18 10:02:43,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-18 10:02:43,582 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 226 [2018-09-18 10:02:43,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:43,584 INFO L225 Difference]: With dead ends: 239 [2018-09-18 10:02:43,584 INFO L226 Difference]: Without dead ends: 237 [2018-09-18 10:02:43,585 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 955 GetRequests, 835 SyntacticMatches, 90 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1172 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=325, Invalid=667, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:02:43,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-09-18 10:02:43,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 237. [2018-09-18 10:02:43,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-09-18 10:02:43,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 238 transitions. [2018-09-18 10:02:43,595 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 238 transitions. Word has length 226 [2018-09-18 10:02:43,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:43,595 INFO L480 AbstractCegarLoop]: Abstraction has 237 states and 238 transitions. [2018-09-18 10:02:43,595 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-09-18 10:02:43,595 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 238 transitions. [2018-09-18 10:02:43,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2018-09-18 10:02:43,597 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:43,597 INFO L376 BasicCegarLoop]: trace histogram [23, 23, 23, 23, 23, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:43,597 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:43,597 INFO L82 PathProgramCache]: Analyzing trace with hash 1747425844, now seen corresponding path program 43 times [2018-09-18 10:02:43,598 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:43,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:43,598 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:43,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:43,599 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:43,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:44,457 INFO L134 CoverageAnalysis]: Checked inductivity of 2464 backedges. 1034 proven. 506 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-18 10:02:44,458 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:44,458 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:44,465 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:44,465 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:44,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:44,534 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:44,588 INFO L134 CoverageAnalysis]: Checked inductivity of 2464 backedges. 1034 proven. 506 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-18 10:02:44,588 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:45,728 INFO L134 CoverageAnalysis]: Checked inductivity of 2464 backedges. 1034 proven. 506 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-18 10:02:45,748 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:45,748 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:45,764 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:45,764 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:45,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:45,913 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:45,951 INFO L134 CoverageAnalysis]: Checked inductivity of 2464 backedges. 1034 proven. 506 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-18 10:02:45,951 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:46,649 INFO L134 CoverageAnalysis]: Checked inductivity of 2464 backedges. 1034 proven. 506 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-18 10:02:46,650 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:46,651 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49, 49, 49] total 49 [2018-09-18 10:02:46,651 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:46,651 INFO L459 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-09-18 10:02:46,651 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-09-18 10:02:46,652 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=601, Invalid=1751, Unknown=0, NotChecked=0, Total=2352 [2018-09-18 10:02:46,652 INFO L87 Difference]: Start difference. First operand 237 states and 238 transitions. Second operand 49 states. [2018-09-18 10:02:47,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:47,866 INFO L93 Difference]: Finished difference Result 340 states and 364 transitions. [2018-09-18 10:02:47,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-09-18 10:02:47,867 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 234 [2018-09-18 10:02:47,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:47,868 INFO L225 Difference]: With dead ends: 340 [2018-09-18 10:02:47,868 INFO L226 Difference]: Without dead ends: 239 [2018-09-18 10:02:47,870 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1007 GetRequests, 844 SyntacticMatches, 92 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2805 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=1249, Invalid=4007, Unknown=0, NotChecked=0, Total=5256 [2018-09-18 10:02:47,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-09-18 10:02:47,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 239. [2018-09-18 10:02:47,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-09-18 10:02:47,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 240 transitions. [2018-09-18 10:02:47,881 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 240 transitions. Word has length 234 [2018-09-18 10:02:47,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:47,881 INFO L480 AbstractCegarLoop]: Abstraction has 239 states and 240 transitions. [2018-09-18 10:02:47,881 INFO L481 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-09-18 10:02:47,881 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 240 transitions. [2018-09-18 10:02:47,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2018-09-18 10:02:47,882 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:47,883 INFO L376 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 23, 23, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:47,883 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:47,883 INFO L82 PathProgramCache]: Analyzing trace with hash -102079186, now seen corresponding path program 44 times [2018-09-18 10:02:47,883 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:47,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:47,884 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:47,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:47,884 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:47,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:48,542 INFO L134 CoverageAnalysis]: Checked inductivity of 2510 backedges. 595 proven. 1054 refuted. 0 times theorem prover too weak. 861 trivial. 0 not checked. [2018-09-18 10:02:48,542 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:48,543 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:48,550 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:48,550 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:48,618 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:48,618 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:48,622 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:48,790 INFO L134 CoverageAnalysis]: Checked inductivity of 2510 backedges. 596 proven. 990 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-18 10:02:48,790 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:49,689 INFO L134 CoverageAnalysis]: Checked inductivity of 2510 backedges. 596 proven. 990 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-18 10:02:49,710 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:49,710 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:49,724 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:49,725 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:49,874 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:49,874 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:49,882 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:49,916 INFO L134 CoverageAnalysis]: Checked inductivity of 2510 backedges. 596 proven. 990 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-18 10:02:49,916 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:50,414 INFO L134 CoverageAnalysis]: Checked inductivity of 2510 backedges. 596 proven. 990 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2018-09-18 10:02:50,416 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:50,416 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 28, 28, 28, 28] total 31 [2018-09-18 10:02:50,416 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:50,417 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-18 10:02:50,417 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-18 10:02:50,417 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=337, Invalid=593, Unknown=0, NotChecked=0, Total=930 [2018-09-18 10:02:50,417 INFO L87 Difference]: Start difference. First operand 239 states and 240 transitions. Second operand 31 states. [2018-09-18 10:02:50,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:50,751 INFO L93 Difference]: Finished difference Result 249 states and 250 transitions. [2018-09-18 10:02:50,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-09-18 10:02:50,752 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 236 [2018-09-18 10:02:50,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:50,754 INFO L225 Difference]: With dead ends: 249 [2018-09-18 10:02:50,754 INFO L226 Difference]: Without dead ends: 247 [2018-09-18 10:02:50,755 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 997 GetRequests, 872 SyntacticMatches, 94 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1271 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=350, Invalid=706, Unknown=0, NotChecked=0, Total=1056 [2018-09-18 10:02:50,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2018-09-18 10:02:50,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 247. [2018-09-18 10:02:50,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-09-18 10:02:50,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 248 transitions. [2018-09-18 10:02:50,765 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 248 transitions. Word has length 236 [2018-09-18 10:02:50,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:50,765 INFO L480 AbstractCegarLoop]: Abstraction has 247 states and 248 transitions. [2018-09-18 10:02:50,766 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-18 10:02:50,766 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 248 transitions. [2018-09-18 10:02:50,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2018-09-18 10:02:50,767 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:50,767 INFO L376 BasicCegarLoop]: trace histogram [24, 24, 24, 24, 24, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:50,767 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:50,768 INFO L82 PathProgramCache]: Analyzing trace with hash 850112881, now seen corresponding path program 45 times [2018-09-18 10:02:50,768 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:50,768 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:50,768 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:50,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:50,769 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:50,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:51,613 INFO L134 CoverageAnalysis]: Checked inductivity of 2691 backedges. 1127 proven. 552 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-18 10:02:51,613 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:51,613 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:51,623 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:51,624 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:51,712 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-09-18 10:02:51,712 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:51,717 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:51,777 INFO L134 CoverageAnalysis]: Checked inductivity of 2691 backedges. 1127 proven. 552 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-18 10:02:51,777 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:52,493 INFO L134 CoverageAnalysis]: Checked inductivity of 2691 backedges. 1127 proven. 552 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-18 10:02:52,513 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:52,513 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:52,528 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:52,528 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:53,105 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-09-18 10:02:53,105 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:53,113 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:53,155 INFO L134 CoverageAnalysis]: Checked inductivity of 2691 backedges. 1127 proven. 552 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-18 10:02:53,155 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:54,214 INFO L134 CoverageAnalysis]: Checked inductivity of 2691 backedges. 1127 proven. 552 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-18 10:02:54,216 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:54,216 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 51, 51, 51, 51] total 51 [2018-09-18 10:02:54,216 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:54,217 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-09-18 10:02:54,217 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-09-18 10:02:54,217 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=651, Invalid=1899, Unknown=0, NotChecked=0, Total=2550 [2018-09-18 10:02:54,217 INFO L87 Difference]: Start difference. First operand 247 states and 248 transitions. Second operand 51 states. [2018-09-18 10:02:55,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:55,287 INFO L93 Difference]: Finished difference Result 354 states and 379 transitions. [2018-09-18 10:02:55,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-09-18 10:02:55,288 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 244 [2018-09-18 10:02:55,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:55,289 INFO L225 Difference]: With dead ends: 354 [2018-09-18 10:02:55,289 INFO L226 Difference]: Without dead ends: 249 [2018-09-18 10:02:55,290 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1050 GetRequests, 880 SyntacticMatches, 96 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3059 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=1351, Invalid=4349, Unknown=0, NotChecked=0, Total=5700 [2018-09-18 10:02:55,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2018-09-18 10:02:55,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 249. [2018-09-18 10:02:55,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 249 states. [2018-09-18 10:02:55,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 250 transitions. [2018-09-18 10:02:55,302 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 250 transitions. Word has length 244 [2018-09-18 10:02:55,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:55,303 INFO L480 AbstractCegarLoop]: Abstraction has 249 states and 250 transitions. [2018-09-18 10:02:55,303 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-09-18 10:02:55,303 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 250 transitions. [2018-09-18 10:02:55,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2018-09-18 10:02:55,304 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:55,305 INFO L376 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 24, 24, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:55,305 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:55,305 INFO L82 PathProgramCache]: Analyzing trace with hash -699364373, now seen corresponding path program 46 times [2018-09-18 10:02:55,305 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:55,306 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:55,306 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:55,306 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:55,306 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:55,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:55,745 INFO L134 CoverageAnalysis]: Checked inductivity of 2739 backedges. 645 proven. 1148 refuted. 0 times theorem prover too weak. 946 trivial. 0 not checked. [2018-09-18 10:02:55,746 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:55,746 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:55,753 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:55,753 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:55,822 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:55,822 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:55,827 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:55,925 INFO L134 CoverageAnalysis]: Checked inductivity of 2739 backedges. 646 proven. 1081 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-18 10:02:55,926 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:56,474 INFO L134 CoverageAnalysis]: Checked inductivity of 2739 backedges. 646 proven. 1081 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-18 10:02:56,494 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:56,494 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:56,509 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:56,509 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:56,683 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:56,683 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:56,691 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:56,732 INFO L134 CoverageAnalysis]: Checked inductivity of 2739 backedges. 646 proven. 1081 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-18 10:02:56,733 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:57,283 INFO L134 CoverageAnalysis]: Checked inductivity of 2739 backedges. 646 proven. 1081 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-09-18 10:02:57,285 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:57,285 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 29, 29, 29, 29] total 32 [2018-09-18 10:02:57,285 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:57,286 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-09-18 10:02:57,286 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-09-18 10:02:57,286 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=363, Invalid=629, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:02:57,286 INFO L87 Difference]: Start difference. First operand 249 states and 250 transitions. Second operand 32 states. [2018-09-18 10:02:57,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:57,663 INFO L93 Difference]: Finished difference Result 259 states and 260 transitions. [2018-09-18 10:02:57,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-09-18 10:02:57,663 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 246 [2018-09-18 10:02:57,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:57,665 INFO L225 Difference]: With dead ends: 259 [2018-09-18 10:02:57,665 INFO L226 Difference]: Without dead ends: 257 [2018-09-18 10:02:57,666 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1039 GetRequests, 909 SyntacticMatches, 98 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1374 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=376, Invalid=746, Unknown=0, NotChecked=0, Total=1122 [2018-09-18 10:02:57,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-09-18 10:02:57,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 257. [2018-09-18 10:02:57,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 257 states. [2018-09-18 10:02:57,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 258 transitions. [2018-09-18 10:02:57,676 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 258 transitions. Word has length 246 [2018-09-18 10:02:57,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:57,677 INFO L480 AbstractCegarLoop]: Abstraction has 257 states and 258 transitions. [2018-09-18 10:02:57,677 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-09-18 10:02:57,677 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 258 transitions. [2018-09-18 10:02:57,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2018-09-18 10:02:57,678 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:57,678 INFO L376 BasicCegarLoop]: trace histogram [25, 25, 25, 25, 25, 24, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:57,679 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:57,679 INFO L82 PathProgramCache]: Analyzing trace with hash -401487058, now seen corresponding path program 47 times [2018-09-18 10:02:57,679 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:57,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:57,680 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:57,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:57,680 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:57,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:58,565 INFO L134 CoverageAnalysis]: Checked inductivity of 2928 backedges. 1224 proven. 600 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-18 10:02:58,565 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:58,565 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:58,574 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:58,574 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:58,668 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 25 check-sat command(s) [2018-09-18 10:02:58,668 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:58,673 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:58,718 INFO L134 CoverageAnalysis]: Checked inductivity of 2928 backedges. 1224 proven. 600 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-18 10:02:58,718 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:59,700 INFO L134 CoverageAnalysis]: Checked inductivity of 2928 backedges. 1224 proven. 600 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-18 10:02:59,721 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:59,721 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:59,738 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:59,738 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:00,352 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 25 check-sat command(s) [2018-09-18 10:03:00,352 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:00,365 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:00,403 INFO L134 CoverageAnalysis]: Checked inductivity of 2928 backedges. 1224 proven. 600 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-18 10:03:00,403 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:01,244 INFO L134 CoverageAnalysis]: Checked inductivity of 2928 backedges. 1224 proven. 600 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-18 10:03:01,246 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:01,246 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53, 53, 53, 53] total 53 [2018-09-18 10:03:01,246 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:01,246 INFO L459 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-09-18 10:03:01,246 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-09-18 10:03:01,247 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=2053, Unknown=0, NotChecked=0, Total=2756 [2018-09-18 10:03:01,247 INFO L87 Difference]: Start difference. First operand 257 states and 258 transitions. Second operand 53 states. [2018-09-18 10:03:02,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:02,529 INFO L93 Difference]: Finished difference Result 368 states and 394 transitions. [2018-09-18 10:03:02,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-09-18 10:03:02,529 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 254 [2018-09-18 10:03:02,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:02,531 INFO L225 Difference]: With dead ends: 368 [2018-09-18 10:03:02,531 INFO L226 Difference]: Without dead ends: 259 [2018-09-18 10:03:02,532 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1093 GetRequests, 916 SyntacticMatches, 100 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3324 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=1457, Invalid=4705, Unknown=0, NotChecked=0, Total=6162 [2018-09-18 10:03:02,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-09-18 10:03:02,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 259. [2018-09-18 10:03:02,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 259 states. [2018-09-18 10:03:02,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 259 states and 260 transitions. [2018-09-18 10:03:02,543 INFO L78 Accepts]: Start accepts. Automaton has 259 states and 260 transitions. Word has length 254 [2018-09-18 10:03:02,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:02,543 INFO L480 AbstractCegarLoop]: Abstraction has 259 states and 260 transitions. [2018-09-18 10:03:02,543 INFO L481 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-09-18 10:03:02,543 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 260 transitions. [2018-09-18 10:03:02,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 257 [2018-09-18 10:03:02,545 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:02,545 INFO L376 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 25, 25, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:02,545 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:02,546 INFO L82 PathProgramCache]: Analyzing trace with hash 65754408, now seen corresponding path program 48 times [2018-09-18 10:03:02,546 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:02,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:02,546 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:02,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:02,547 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:02,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:03,060 INFO L134 CoverageAnalysis]: Checked inductivity of 2978 backedges. 697 proven. 1246 refuted. 0 times theorem prover too weak. 1035 trivial. 0 not checked. [2018-09-18 10:03:03,060 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:03,061 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:03,067 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:03,067 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:03,166 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2018-09-18 10:03:03,166 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:03,170 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:03,271 INFO L134 CoverageAnalysis]: Checked inductivity of 2978 backedges. 698 proven. 1176 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-18 10:03:03,271 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:03,845 INFO L134 CoverageAnalysis]: Checked inductivity of 2978 backedges. 698 proven. 1176 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-18 10:03:03,865 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:03,865 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:03,880 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:03,880 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:04,523 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2018-09-18 10:03:04,523 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:04,531 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:04,576 INFO L134 CoverageAnalysis]: Checked inductivity of 2978 backedges. 698 proven. 1176 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-18 10:03:04,576 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:05,181 INFO L134 CoverageAnalysis]: Checked inductivity of 2978 backedges. 698 proven. 1176 refuted. 0 times theorem prover too weak. 1104 trivial. 0 not checked. [2018-09-18 10:03:05,183 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:05,183 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 30, 30, 30, 30] total 33 [2018-09-18 10:03:05,183 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:05,183 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-09-18 10:03:05,184 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-09-18 10:03:05,184 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=390, Invalid=666, Unknown=0, NotChecked=0, Total=1056 [2018-09-18 10:03:05,184 INFO L87 Difference]: Start difference. First operand 259 states and 260 transitions. Second operand 33 states. [2018-09-18 10:03:05,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:05,565 INFO L93 Difference]: Finished difference Result 269 states and 270 transitions. [2018-09-18 10:03:05,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-09-18 10:03:05,566 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 256 [2018-09-18 10:03:05,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:05,568 INFO L225 Difference]: With dead ends: 269 [2018-09-18 10:03:05,568 INFO L226 Difference]: Without dead ends: 267 [2018-09-18 10:03:05,568 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1081 GetRequests, 946 SyntacticMatches, 102 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1481 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=403, Invalid=787, Unknown=0, NotChecked=0, Total=1190 [2018-09-18 10:03:05,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2018-09-18 10:03:05,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 267. [2018-09-18 10:03:05,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 267 states. [2018-09-18 10:03:05,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 268 transitions. [2018-09-18 10:03:05,580 INFO L78 Accepts]: Start accepts. Automaton has 267 states and 268 transitions. Word has length 256 [2018-09-18 10:03:05,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:05,580 INFO L480 AbstractCegarLoop]: Abstraction has 267 states and 268 transitions. [2018-09-18 10:03:05,580 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-09-18 10:03:05,580 INFO L276 IsEmpty]: Start isEmpty. Operand 267 states and 268 transitions. [2018-09-18 10:03:05,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2018-09-18 10:03:05,582 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:05,582 INFO L376 BasicCegarLoop]: trace histogram [26, 26, 26, 26, 26, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:05,582 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:05,582 INFO L82 PathProgramCache]: Analyzing trace with hash -350091413, now seen corresponding path program 49 times [2018-09-18 10:03:05,583 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:05,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:05,583 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:05,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:05,583 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:05,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:06,749 INFO L134 CoverageAnalysis]: Checked inductivity of 3175 backedges. 1325 proven. 650 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-18 10:03:06,749 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:06,749 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:06,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:06,757 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:06,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:06,833 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:06,880 INFO L134 CoverageAnalysis]: Checked inductivity of 3175 backedges. 1325 proven. 650 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-18 10:03:06,880 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:07,755 INFO L134 CoverageAnalysis]: Checked inductivity of 3175 backedges. 1325 proven. 650 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-18 10:03:07,776 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:07,776 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:07,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:07,791 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:07,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:07,956 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:08,003 INFO L134 CoverageAnalysis]: Checked inductivity of 3175 backedges. 1325 proven. 650 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-18 10:03:08,003 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:08,927 INFO L134 CoverageAnalysis]: Checked inductivity of 3175 backedges. 1325 proven. 650 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-18 10:03:08,929 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:08,929 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 55, 55, 55, 55] total 55 [2018-09-18 10:03:08,929 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:08,930 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-09-18 10:03:08,930 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-09-18 10:03:08,931 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=757, Invalid=2213, Unknown=0, NotChecked=0, Total=2970 [2018-09-18 10:03:08,931 INFO L87 Difference]: Start difference. First operand 267 states and 268 transitions. Second operand 55 states. [2018-09-18 10:03:10,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:10,050 INFO L93 Difference]: Finished difference Result 382 states and 409 transitions. [2018-09-18 10:03:10,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-09-18 10:03:10,058 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 264 [2018-09-18 10:03:10,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:10,059 INFO L225 Difference]: With dead ends: 382 [2018-09-18 10:03:10,059 INFO L226 Difference]: Without dead ends: 269 [2018-09-18 10:03:10,061 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1136 GetRequests, 952 SyntacticMatches, 104 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3600 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=1567, Invalid=5075, Unknown=0, NotChecked=0, Total=6642 [2018-09-18 10:03:10,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2018-09-18 10:03:10,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 269. [2018-09-18 10:03:10,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269 states. [2018-09-18 10:03:10,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 270 transitions. [2018-09-18 10:03:10,072 INFO L78 Accepts]: Start accepts. Automaton has 269 states and 270 transitions. Word has length 264 [2018-09-18 10:03:10,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:10,072 INFO L480 AbstractCegarLoop]: Abstraction has 269 states and 270 transitions. [2018-09-18 10:03:10,072 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-09-18 10:03:10,072 INFO L276 IsEmpty]: Start isEmpty. Operand 269 states and 270 transitions. [2018-09-18 10:03:10,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2018-09-18 10:03:10,074 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:10,074 INFO L376 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 26, 26, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:10,074 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:10,075 INFO L82 PathProgramCache]: Analyzing trace with hash -1766137627, now seen corresponding path program 50 times [2018-09-18 10:03:10,075 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:10,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:10,075 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:10,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:10,076 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:10,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:10,556 INFO L134 CoverageAnalysis]: Checked inductivity of 3227 backedges. 751 proven. 1348 refuted. 0 times theorem prover too weak. 1128 trivial. 0 not checked. [2018-09-18 10:03:10,556 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:10,556 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:10,563 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:10,564 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:10,640 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:10,640 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:10,644 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:10,747 INFO L134 CoverageAnalysis]: Checked inductivity of 3227 backedges. 752 proven. 1275 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-18 10:03:10,747 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:11,416 INFO L134 CoverageAnalysis]: Checked inductivity of 3227 backedges. 752 proven. 1275 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-18 10:03:11,438 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:11,438 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:11,455 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:11,455 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:11,632 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:11,632 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:11,643 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:11,691 INFO L134 CoverageAnalysis]: Checked inductivity of 3227 backedges. 752 proven. 1275 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-18 10:03:11,691 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:12,390 INFO L134 CoverageAnalysis]: Checked inductivity of 3227 backedges. 752 proven. 1275 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-09-18 10:03:12,391 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:12,392 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 31, 31, 31, 31] total 34 [2018-09-18 10:03:12,392 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:12,392 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-09-18 10:03:12,393 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-09-18 10:03:12,393 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=418, Invalid=704, Unknown=0, NotChecked=0, Total=1122 [2018-09-18 10:03:12,393 INFO L87 Difference]: Start difference. First operand 269 states and 270 transitions. Second operand 34 states. [2018-09-18 10:03:12,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:12,784 INFO L93 Difference]: Finished difference Result 279 states and 280 transitions. [2018-09-18 10:03:12,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-09-18 10:03:12,785 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 266 [2018-09-18 10:03:12,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:12,787 INFO L225 Difference]: With dead ends: 279 [2018-09-18 10:03:12,787 INFO L226 Difference]: Without dead ends: 277 [2018-09-18 10:03:12,787 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1123 GetRequests, 983 SyntacticMatches, 106 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1592 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=431, Invalid=829, Unknown=0, NotChecked=0, Total=1260 [2018-09-18 10:03:12,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-09-18 10:03:12,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 277. [2018-09-18 10:03:12,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277 states. [2018-09-18 10:03:12,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 278 transitions. [2018-09-18 10:03:12,799 INFO L78 Accepts]: Start accepts. Automaton has 277 states and 278 transitions. Word has length 266 [2018-09-18 10:03:12,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:12,799 INFO L480 AbstractCegarLoop]: Abstraction has 277 states and 278 transitions. [2018-09-18 10:03:12,799 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-09-18 10:03:12,800 INFO L276 IsEmpty]: Start isEmpty. Operand 277 states and 278 transitions. [2018-09-18 10:03:12,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2018-09-18 10:03:12,801 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:12,801 INFO L376 BasicCegarLoop]: trace histogram [27, 27, 27, 27, 27, 26, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:12,801 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:12,802 INFO L82 PathProgramCache]: Analyzing trace with hash -574847448, now seen corresponding path program 51 times [2018-09-18 10:03:12,802 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:12,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:12,802 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:12,803 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:12,803 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:12,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:13,868 INFO L134 CoverageAnalysis]: Checked inductivity of 3432 backedges. 1430 proven. 702 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-18 10:03:13,869 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:13,869 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:13,876 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:13,876 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:13,987 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 27 check-sat command(s) [2018-09-18 10:03:13,988 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:13,994 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:14,046 INFO L134 CoverageAnalysis]: Checked inductivity of 3432 backedges. 1430 proven. 702 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-18 10:03:14,047 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:15,258 INFO L134 CoverageAnalysis]: Checked inductivity of 3432 backedges. 1430 proven. 702 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-18 10:03:15,279 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:15,279 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:15,295 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:15,295 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:16,075 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 27 check-sat command(s) [2018-09-18 10:03:16,075 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:16,085 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:16,128 INFO L134 CoverageAnalysis]: Checked inductivity of 3432 backedges. 1430 proven. 702 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-18 10:03:16,128 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:17,090 INFO L134 CoverageAnalysis]: Checked inductivity of 3432 backedges. 1430 proven. 702 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-18 10:03:17,092 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:17,092 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 57, 57, 57, 57] total 57 [2018-09-18 10:03:17,092 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:17,093 INFO L459 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-09-18 10:03:17,093 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-09-18 10:03:17,094 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=813, Invalid=2379, Unknown=0, NotChecked=0, Total=3192 [2018-09-18 10:03:17,094 INFO L87 Difference]: Start difference. First operand 277 states and 278 transitions. Second operand 57 states. [2018-09-18 10:03:18,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:18,277 INFO L93 Difference]: Finished difference Result 396 states and 424 transitions. [2018-09-18 10:03:18,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-09-18 10:03:18,277 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 274 [2018-09-18 10:03:18,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:18,279 INFO L225 Difference]: With dead ends: 396 [2018-09-18 10:03:18,279 INFO L226 Difference]: Without dead ends: 279 [2018-09-18 10:03:18,280 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1179 GetRequests, 988 SyntacticMatches, 108 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3887 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=1681, Invalid=5459, Unknown=0, NotChecked=0, Total=7140 [2018-09-18 10:03:18,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2018-09-18 10:03:18,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 279. [2018-09-18 10:03:18,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 279 states. [2018-09-18 10:03:18,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 279 states to 279 states and 280 transitions. [2018-09-18 10:03:18,289 INFO L78 Accepts]: Start accepts. Automaton has 279 states and 280 transitions. Word has length 274 [2018-09-18 10:03:18,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:18,290 INFO L480 AbstractCegarLoop]: Abstraction has 279 states and 280 transitions. [2018-09-18 10:03:18,290 INFO L481 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-09-18 10:03:18,290 INFO L276 IsEmpty]: Start isEmpty. Operand 279 states and 280 transitions. [2018-09-18 10:03:18,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 277 [2018-09-18 10:03:18,291 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:18,292 INFO L376 BasicCegarLoop]: trace histogram [28, 27, 27, 27, 27, 27, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:18,292 INFO L423 AbstractCegarLoop]: === Iteration 55 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:18,292 INFO L82 PathProgramCache]: Analyzing trace with hash -1143517406, now seen corresponding path program 52 times [2018-09-18 10:03:18,292 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:18,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:18,293 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:18,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:18,293 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:18,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:18,894 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 807 proven. 1454 refuted. 0 times theorem prover too weak. 1225 trivial. 0 not checked. [2018-09-18 10:03:18,894 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:18,894 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:18,902 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:18,902 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:18,982 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:18,982 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:18,987 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:19,095 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 808 proven. 1378 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-18 10:03:19,095 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:20,018 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 808 proven. 1378 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-18 10:03:20,039 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:20,039 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:20,054 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:20,054 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:20,262 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:20,262 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:20,272 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:20,320 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 808 proven. 1378 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-18 10:03:20,320 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:21,016 INFO L134 CoverageAnalysis]: Checked inductivity of 3486 backedges. 808 proven. 1378 refuted. 0 times theorem prover too weak. 1300 trivial. 0 not checked. [2018-09-18 10:03:21,018 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:21,018 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 32, 32, 32, 32] total 35 [2018-09-18 10:03:21,019 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:21,019 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-09-18 10:03:21,019 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-09-18 10:03:21,019 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=447, Invalid=743, Unknown=0, NotChecked=0, Total=1190 [2018-09-18 10:03:21,020 INFO L87 Difference]: Start difference. First operand 279 states and 280 transitions. Second operand 35 states. [2018-09-18 10:03:21,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:21,477 INFO L93 Difference]: Finished difference Result 289 states and 290 transitions. [2018-09-18 10:03:21,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-09-18 10:03:21,478 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 276 [2018-09-18 10:03:21,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:21,480 INFO L225 Difference]: With dead ends: 289 [2018-09-18 10:03:21,480 INFO L226 Difference]: Without dead ends: 287 [2018-09-18 10:03:21,480 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1165 GetRequests, 1020 SyntacticMatches, 110 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1707 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=460, Invalid=872, Unknown=0, NotChecked=0, Total=1332 [2018-09-18 10:03:21,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states. [2018-09-18 10:03:21,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 287. [2018-09-18 10:03:21,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287 states. [2018-09-18 10:03:21,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 287 states and 288 transitions. [2018-09-18 10:03:21,492 INFO L78 Accepts]: Start accepts. Automaton has 287 states and 288 transitions. Word has length 276 [2018-09-18 10:03:21,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:21,492 INFO L480 AbstractCegarLoop]: Abstraction has 287 states and 288 transitions. [2018-09-18 10:03:21,492 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-09-18 10:03:21,492 INFO L276 IsEmpty]: Start isEmpty. Operand 287 states and 288 transitions. [2018-09-18 10:03:21,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 285 [2018-09-18 10:03:21,494 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:21,494 INFO L376 BasicCegarLoop]: trace histogram [28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:21,495 INFO L423 AbstractCegarLoop]: === Iteration 56 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:21,495 INFO L82 PathProgramCache]: Analyzing trace with hash -489068699, now seen corresponding path program 53 times [2018-09-18 10:03:21,495 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:21,495 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:21,496 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:21,496 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:21,496 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:21,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:22,703 INFO L134 CoverageAnalysis]: Checked inductivity of 3699 backedges. 1539 proven. 756 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-18 10:03:22,703 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:22,703 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:22,711 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:22,712 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:22,822 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 28 check-sat command(s) [2018-09-18 10:03:22,822 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:22,828 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:22,881 INFO L134 CoverageAnalysis]: Checked inductivity of 3699 backedges. 1539 proven. 756 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-18 10:03:22,882 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:23,912 INFO L134 CoverageAnalysis]: Checked inductivity of 3699 backedges. 1539 proven. 756 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-18 10:03:23,932 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:23,932 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:23,947 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:23,947 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:24,780 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 28 check-sat command(s) [2018-09-18 10:03:24,780 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:24,800 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:24,853 INFO L134 CoverageAnalysis]: Checked inductivity of 3699 backedges. 1539 proven. 756 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-18 10:03:24,853 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:25,853 INFO L134 CoverageAnalysis]: Checked inductivity of 3699 backedges. 1539 proven. 756 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-18 10:03:25,855 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:25,856 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59, 59, 59, 59] total 59 [2018-09-18 10:03:25,856 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:25,857 INFO L459 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-09-18 10:03:25,857 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-09-18 10:03:25,857 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=871, Invalid=2551, Unknown=0, NotChecked=0, Total=3422 [2018-09-18 10:03:25,858 INFO L87 Difference]: Start difference. First operand 287 states and 288 transitions. Second operand 59 states. [2018-09-18 10:03:27,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:27,470 INFO L93 Difference]: Finished difference Result 410 states and 439 transitions. [2018-09-18 10:03:27,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-09-18 10:03:27,470 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 284 [2018-09-18 10:03:27,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:27,471 INFO L225 Difference]: With dead ends: 410 [2018-09-18 10:03:27,472 INFO L226 Difference]: Without dead ends: 289 [2018-09-18 10:03:27,473 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1222 GetRequests, 1024 SyntacticMatches, 112 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4185 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=1799, Invalid=5857, Unknown=0, NotChecked=0, Total=7656 [2018-09-18 10:03:27,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states. [2018-09-18 10:03:27,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 289. [2018-09-18 10:03:27,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2018-09-18 10:03:27,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 290 transitions. [2018-09-18 10:03:27,486 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 290 transitions. Word has length 284 [2018-09-18 10:03:27,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:27,487 INFO L480 AbstractCegarLoop]: Abstraction has 289 states and 290 transitions. [2018-09-18 10:03:27,487 INFO L481 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-09-18 10:03:27,487 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 290 transitions. [2018-09-18 10:03:27,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 287 [2018-09-18 10:03:27,488 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:27,488 INFO L376 BasicCegarLoop]: trace histogram [29, 28, 28, 28, 28, 28, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:27,489 INFO L423 AbstractCegarLoop]: === Iteration 57 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:27,489 INFO L82 PathProgramCache]: Analyzing trace with hash 2070986719, now seen corresponding path program 54 times [2018-09-18 10:03:27,489 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:27,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:27,490 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:27,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:27,490 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:27,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:28,006 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 865 proven. 1564 refuted. 0 times theorem prover too weak. 1326 trivial. 0 not checked. [2018-09-18 10:03:28,006 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:28,006 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:28,014 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:28,014 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:28,123 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 29 check-sat command(s) [2018-09-18 10:03:28,123 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:28,128 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:28,255 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 866 proven. 1485 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-18 10:03:28,255 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:28,972 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 866 proven. 1485 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-18 10:03:28,993 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:28,993 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:29,008 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:29,008 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:29,829 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 29 check-sat command(s) [2018-09-18 10:03:29,830 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:29,842 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:29,900 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 866 proven. 1485 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-18 10:03:29,900 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:30,649 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 866 proven. 1485 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-09-18 10:03:30,651 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:30,651 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 33, 33, 33, 33] total 36 [2018-09-18 10:03:30,651 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:30,652 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-09-18 10:03:30,652 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-09-18 10:03:30,652 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=477, Invalid=783, Unknown=0, NotChecked=0, Total=1260 [2018-09-18 10:03:30,653 INFO L87 Difference]: Start difference. First operand 289 states and 290 transitions. Second operand 36 states. [2018-09-18 10:03:31,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:31,000 INFO L93 Difference]: Finished difference Result 299 states and 300 transitions. [2018-09-18 10:03:31,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-09-18 10:03:31,001 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 286 [2018-09-18 10:03:31,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:31,003 INFO L225 Difference]: With dead ends: 299 [2018-09-18 10:03:31,003 INFO L226 Difference]: Without dead ends: 297 [2018-09-18 10:03:31,003 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1207 GetRequests, 1057 SyntacticMatches, 114 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1826 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=490, Invalid=916, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:03:31,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297 states. [2018-09-18 10:03:31,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297 to 297. [2018-09-18 10:03:31,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2018-09-18 10:03:31,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 298 transitions. [2018-09-18 10:03:31,016 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 298 transitions. Word has length 286 [2018-09-18 10:03:31,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:31,016 INFO L480 AbstractCegarLoop]: Abstraction has 297 states and 298 transitions. [2018-09-18 10:03:31,016 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-09-18 10:03:31,016 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 298 transitions. [2018-09-18 10:03:31,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 295 [2018-09-18 10:03:31,018 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:31,018 INFO L376 BasicCegarLoop]: trace histogram [29, 29, 29, 29, 29, 28, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:31,019 INFO L423 AbstractCegarLoop]: === Iteration 58 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:31,019 INFO L82 PathProgramCache]: Analyzing trace with hash 1619577634, now seen corresponding path program 55 times [2018-09-18 10:03:31,019 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:31,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:31,020 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:31,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:31,020 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:31,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:32,503 INFO L134 CoverageAnalysis]: Checked inductivity of 3976 backedges. 1652 proven. 812 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-18 10:03:32,504 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:32,504 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:32,511 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:32,511 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:32,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:32,599 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:32,656 INFO L134 CoverageAnalysis]: Checked inductivity of 3976 backedges. 1652 proven. 812 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-18 10:03:32,657 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:33,729 INFO L134 CoverageAnalysis]: Checked inductivity of 3976 backedges. 1652 proven. 812 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-18 10:03:33,749 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:33,749 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:33,765 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:33,765 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:33,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:33,958 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:34,014 INFO L134 CoverageAnalysis]: Checked inductivity of 3976 backedges. 1652 proven. 812 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-18 10:03:34,014 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:35,391 INFO L134 CoverageAnalysis]: Checked inductivity of 3976 backedges. 1652 proven. 812 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-18 10:03:35,392 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:35,393 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61, 61, 61, 61] total 61 [2018-09-18 10:03:35,393 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:35,393 INFO L459 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-09-18 10:03:35,394 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-09-18 10:03:35,394 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=931, Invalid=2729, Unknown=0, NotChecked=0, Total=3660 [2018-09-18 10:03:35,395 INFO L87 Difference]: Start difference. First operand 297 states and 298 transitions. Second operand 61 states. [2018-09-18 10:03:37,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:37,074 INFO L93 Difference]: Finished difference Result 424 states and 454 transitions. [2018-09-18 10:03:37,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-09-18 10:03:37,074 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 294 [2018-09-18 10:03:37,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:37,076 INFO L225 Difference]: With dead ends: 424 [2018-09-18 10:03:37,076 INFO L226 Difference]: Without dead ends: 299 [2018-09-18 10:03:37,077 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1265 GetRequests, 1060 SyntacticMatches, 116 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4494 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=1921, Invalid=6269, Unknown=0, NotChecked=0, Total=8190 [2018-09-18 10:03:37,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299 states. [2018-09-18 10:03:37,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299 to 299. [2018-09-18 10:03:37,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 299 states. [2018-09-18 10:03:37,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 300 transitions. [2018-09-18 10:03:37,089 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 300 transitions. Word has length 294 [2018-09-18 10:03:37,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:37,089 INFO L480 AbstractCegarLoop]: Abstraction has 299 states and 300 transitions. [2018-09-18 10:03:37,089 INFO L481 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-09-18 10:03:37,089 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 300 transitions. [2018-09-18 10:03:37,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 297 [2018-09-18 10:03:37,091 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:37,091 INFO L376 BasicCegarLoop]: trace histogram [30, 29, 29, 29, 29, 29, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:37,091 INFO L423 AbstractCegarLoop]: === Iteration 59 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:37,091 INFO L82 PathProgramCache]: Analyzing trace with hash -87076068, now seen corresponding path program 56 times [2018-09-18 10:03:37,091 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:37,092 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:37,092 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:37,092 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:37,092 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:37,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:37,984 INFO L134 CoverageAnalysis]: Checked inductivity of 4034 backedges. 925 proven. 1678 refuted. 0 times theorem prover too weak. 1431 trivial. 0 not checked. [2018-09-18 10:03:37,985 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:37,985 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:37,991 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:37,992 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:38,079 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:38,079 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:38,083 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:38,196 INFO L134 CoverageAnalysis]: Checked inductivity of 4034 backedges. 926 proven. 1596 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-18 10:03:38,197 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:38,962 INFO L134 CoverageAnalysis]: Checked inductivity of 4034 backedges. 926 proven. 1596 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-18 10:03:38,982 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:38,982 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:38,997 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:38,997 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:39,191 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:39,191 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:39,201 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:39,262 INFO L134 CoverageAnalysis]: Checked inductivity of 4034 backedges. 926 proven. 1596 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-18 10:03:39,262 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:40,275 INFO L134 CoverageAnalysis]: Checked inductivity of 4034 backedges. 926 proven. 1596 refuted. 0 times theorem prover too weak. 1512 trivial. 0 not checked. [2018-09-18 10:03:40,277 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:40,277 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 34, 34, 34, 34] total 37 [2018-09-18 10:03:40,277 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:40,278 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-09-18 10:03:40,278 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-09-18 10:03:40,278 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=508, Invalid=824, Unknown=0, NotChecked=0, Total=1332 [2018-09-18 10:03:40,278 INFO L87 Difference]: Start difference. First operand 299 states and 300 transitions. Second operand 37 states. [2018-09-18 10:03:40,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:40,722 INFO L93 Difference]: Finished difference Result 309 states and 310 transitions. [2018-09-18 10:03:40,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-09-18 10:03:40,723 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 296 [2018-09-18 10:03:40,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:40,725 INFO L225 Difference]: With dead ends: 309 [2018-09-18 10:03:40,725 INFO L226 Difference]: Without dead ends: 307 [2018-09-18 10:03:40,725 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1249 GetRequests, 1094 SyntacticMatches, 118 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1949 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=521, Invalid=961, Unknown=0, NotChecked=0, Total=1482 [2018-09-18 10:03:40,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307 states. [2018-09-18 10:03:40,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307 to 307. [2018-09-18 10:03:40,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307 states. [2018-09-18 10:03:40,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 308 transitions. [2018-09-18 10:03:40,736 INFO L78 Accepts]: Start accepts. Automaton has 307 states and 308 transitions. Word has length 296 [2018-09-18 10:03:40,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:40,737 INFO L480 AbstractCegarLoop]: Abstraction has 307 states and 308 transitions. [2018-09-18 10:03:40,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-09-18 10:03:40,737 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 308 transitions. [2018-09-18 10:03:40,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 305 [2018-09-18 10:03:40,738 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:40,739 INFO L376 BasicCegarLoop]: trace histogram [30, 30, 30, 30, 30, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:40,739 INFO L423 AbstractCegarLoop]: === Iteration 60 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:40,739 INFO L82 PathProgramCache]: Analyzing trace with hash 1106432351, now seen corresponding path program 57 times [2018-09-18 10:03:40,739 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:40,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:40,740 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:40,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:40,740 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:40,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:41,919 INFO L134 CoverageAnalysis]: Checked inductivity of 4263 backedges. 1769 proven. 870 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-18 10:03:41,919 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:41,919 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:41,928 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:41,928 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:42,054 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 30 check-sat command(s) [2018-09-18 10:03:42,054 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:42,059 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:42,137 INFO L134 CoverageAnalysis]: Checked inductivity of 4263 backedges. 1769 proven. 870 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-18 10:03:42,137 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:43,229 INFO L134 CoverageAnalysis]: Checked inductivity of 4263 backedges. 1769 proven. 870 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-18 10:03:43,250 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:43,251 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:43,266 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:43,266 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:44,245 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 30 check-sat command(s) [2018-09-18 10:03:44,245 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:44,255 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:44,315 INFO L134 CoverageAnalysis]: Checked inductivity of 4263 backedges. 1769 proven. 870 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-18 10:03:44,315 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:45,805 INFO L134 CoverageAnalysis]: Checked inductivity of 4263 backedges. 1769 proven. 870 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-18 10:03:45,807 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:45,807 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [63, 63, 63, 63, 63] total 63 [2018-09-18 10:03:45,807 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:45,808 INFO L459 AbstractCegarLoop]: Interpolant automaton has 63 states [2018-09-18 10:03:45,809 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2018-09-18 10:03:45,809 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=993, Invalid=2913, Unknown=0, NotChecked=0, Total=3906 [2018-09-18 10:03:45,809 INFO L87 Difference]: Start difference. First operand 307 states and 308 transitions. Second operand 63 states. [2018-09-18 10:03:47,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:47,609 INFO L93 Difference]: Finished difference Result 438 states and 469 transitions. [2018-09-18 10:03:47,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-09-18 10:03:47,609 INFO L78 Accepts]: Start accepts. Automaton has 63 states. Word has length 304 [2018-09-18 10:03:47,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:47,611 INFO L225 Difference]: With dead ends: 438 [2018-09-18 10:03:47,611 INFO L226 Difference]: Without dead ends: 309 [2018-09-18 10:03:47,612 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1308 GetRequests, 1096 SyntacticMatches, 120 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4814 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=2047, Invalid=6695, Unknown=0, NotChecked=0, Total=8742 [2018-09-18 10:03:47,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-09-18 10:03:47,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 309. [2018-09-18 10:03:47,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 309 states. [2018-09-18 10:03:47,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 309 states to 309 states and 310 transitions. [2018-09-18 10:03:47,630 INFO L78 Accepts]: Start accepts. Automaton has 309 states and 310 transitions. Word has length 304 [2018-09-18 10:03:47,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:47,631 INFO L480 AbstractCegarLoop]: Abstraction has 309 states and 310 transitions. [2018-09-18 10:03:47,631 INFO L481 AbstractCegarLoop]: Interpolant automaton has 63 states. [2018-09-18 10:03:47,631 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 310 transitions. [2018-09-18 10:03:47,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 307 [2018-09-18 10:03:47,632 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:47,633 INFO L376 BasicCegarLoop]: trace histogram [31, 30, 30, 30, 30, 30, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:47,633 INFO L423 AbstractCegarLoop]: === Iteration 61 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:47,633 INFO L82 PathProgramCache]: Analyzing trace with hash 1045637337, now seen corresponding path program 58 times [2018-09-18 10:03:47,633 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:47,634 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:47,634 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:47,634 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:47,634 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:47,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:48,450 INFO L134 CoverageAnalysis]: Checked inductivity of 4323 backedges. 987 proven. 1796 refuted. 0 times theorem prover too weak. 1540 trivial. 0 not checked. [2018-09-18 10:03:48,451 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:48,451 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:48,459 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:48,459 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:48,549 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:48,549 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:48,553 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:48,671 INFO L134 CoverageAnalysis]: Checked inductivity of 4323 backedges. 988 proven. 1711 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-18 10:03:48,671 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:49,501 INFO L134 CoverageAnalysis]: Checked inductivity of 4323 backedges. 988 proven. 1711 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-18 10:03:49,520 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:49,521 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:49,535 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:49,536 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:49,765 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:49,765 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:49,778 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:49,831 INFO L134 CoverageAnalysis]: Checked inductivity of 4323 backedges. 988 proven. 1711 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-18 10:03:49,831 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:50,947 INFO L134 CoverageAnalysis]: Checked inductivity of 4323 backedges. 988 proven. 1711 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-09-18 10:03:50,949 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:50,949 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 35, 35, 35, 35] total 38 [2018-09-18 10:03:50,949 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:50,950 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-18 10:03:50,950 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-18 10:03:50,951 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=540, Invalid=866, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:03:50,951 INFO L87 Difference]: Start difference. First operand 309 states and 310 transitions. Second operand 38 states. [2018-09-18 10:03:51,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:51,365 INFO L93 Difference]: Finished difference Result 319 states and 320 transitions. [2018-09-18 10:03:51,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-09-18 10:03:51,365 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 306 [2018-09-18 10:03:51,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:51,367 INFO L225 Difference]: With dead ends: 319 [2018-09-18 10:03:51,367 INFO L226 Difference]: Without dead ends: 317 [2018-09-18 10:03:51,368 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1291 GetRequests, 1131 SyntacticMatches, 122 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2076 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=553, Invalid=1007, Unknown=0, NotChecked=0, Total=1560 [2018-09-18 10:03:51,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-09-18 10:03:51,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 317. [2018-09-18 10:03:51,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2018-09-18 10:03:51,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 318 transitions. [2018-09-18 10:03:51,378 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 318 transitions. Word has length 306 [2018-09-18 10:03:51,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:51,378 INFO L480 AbstractCegarLoop]: Abstraction has 317 states and 318 transitions. [2018-09-18 10:03:51,378 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-18 10:03:51,379 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 318 transitions. [2018-09-18 10:03:51,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 315 [2018-09-18 10:03:51,380 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:51,380 INFO L376 BasicCegarLoop]: trace histogram [31, 31, 31, 31, 31, 30, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:51,380 INFO L423 AbstractCegarLoop]: === Iteration 62 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:51,381 INFO L82 PathProgramCache]: Analyzing trace with hash -1185441252, now seen corresponding path program 59 times [2018-09-18 10:03:51,381 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:51,381 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:51,381 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:51,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:51,382 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:51,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:52,866 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 1890 proven. 930 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-18 10:03:52,866 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:52,866 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:52,873 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:52,873 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:53,001 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 31 check-sat command(s) [2018-09-18 10:03:53,001 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:53,006 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:53,101 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 1890 proven. 930 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-18 10:03:53,101 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:54,376 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 1890 proven. 930 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-18 10:03:54,397 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:54,397 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:54,412 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:54,412 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:55,339 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 31 check-sat command(s) [2018-09-18 10:03:55,339 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:55,347 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:55,410 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 1890 proven. 930 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-18 10:03:55,410 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:56,647 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 1890 proven. 930 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-18 10:03:56,649 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:56,649 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65, 65, 65, 65] total 65 [2018-09-18 10:03:56,649 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:56,650 INFO L459 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-09-18 10:03:56,650 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-09-18 10:03:56,650 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1057, Invalid=3103, Unknown=0, NotChecked=0, Total=4160 [2018-09-18 10:03:56,651 INFO L87 Difference]: Start difference. First operand 317 states and 318 transitions. Second operand 65 states. [2018-09-18 10:03:58,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:58,527 INFO L93 Difference]: Finished difference Result 452 states and 484 transitions. [2018-09-18 10:03:58,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-09-18 10:03:58,527 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 314 [2018-09-18 10:03:58,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:58,529 INFO L225 Difference]: With dead ends: 452 [2018-09-18 10:03:58,529 INFO L226 Difference]: Without dead ends: 319 [2018-09-18 10:03:58,530 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1351 GetRequests, 1132 SyntacticMatches, 124 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5145 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=2177, Invalid=7135, Unknown=0, NotChecked=0, Total=9312 [2018-09-18 10:03:58,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states. [2018-09-18 10:03:58,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 319. [2018-09-18 10:03:58,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 319 states. [2018-09-18 10:03:58,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 319 states to 319 states and 320 transitions. [2018-09-18 10:03:58,541 INFO L78 Accepts]: Start accepts. Automaton has 319 states and 320 transitions. Word has length 314 [2018-09-18 10:03:58,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:58,542 INFO L480 AbstractCegarLoop]: Abstraction has 319 states and 320 transitions. [2018-09-18 10:03:58,542 INFO L481 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-09-18 10:03:58,542 INFO L276 IsEmpty]: Start isEmpty. Operand 319 states and 320 transitions. [2018-09-18 10:03:58,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 317 [2018-09-18 10:03:58,544 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:58,544 INFO L376 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 31, 31, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:58,544 INFO L423 AbstractCegarLoop]: === Iteration 63 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:58,544 INFO L82 PathProgramCache]: Analyzing trace with hash 1802789142, now seen corresponding path program 60 times [2018-09-18 10:03:58,544 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:58,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:58,545 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:58,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:58,545 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:58,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:59,261 INFO L134 CoverageAnalysis]: Checked inductivity of 4622 backedges. 1051 proven. 1918 refuted. 0 times theorem prover too weak. 1653 trivial. 0 not checked. [2018-09-18 10:03:59,261 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:59,261 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:59,268 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:59,268 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:59,493 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 32 check-sat command(s) [2018-09-18 10:03:59,494 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:59,498 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:59,615 INFO L134 CoverageAnalysis]: Checked inductivity of 4622 backedges. 1052 proven. 1830 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-18 10:03:59,616 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:00,704 INFO L134 CoverageAnalysis]: Checked inductivity of 4622 backedges. 1052 proven. 1830 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-18 10:04:00,724 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:00,724 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:00,739 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:00,739 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:01,706 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 32 check-sat command(s) [2018-09-18 10:04:01,706 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:01,717 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:01,781 INFO L134 CoverageAnalysis]: Checked inductivity of 4622 backedges. 1052 proven. 1830 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-18 10:04:01,782 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:02,655 INFO L134 CoverageAnalysis]: Checked inductivity of 4622 backedges. 1052 proven. 1830 refuted. 0 times theorem prover too weak. 1740 trivial. 0 not checked. [2018-09-18 10:04:02,657 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:02,657 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 36, 36, 36, 36] total 39 [2018-09-18 10:04:02,657 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:02,657 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-09-18 10:04:02,658 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-09-18 10:04:02,658 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=909, Unknown=0, NotChecked=0, Total=1482 [2018-09-18 10:04:02,658 INFO L87 Difference]: Start difference. First operand 319 states and 320 transitions. Second operand 39 states. [2018-09-18 10:04:03,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:03,158 INFO L93 Difference]: Finished difference Result 329 states and 330 transitions. [2018-09-18 10:04:03,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-09-18 10:04:03,159 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 316 [2018-09-18 10:04:03,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:03,161 INFO L225 Difference]: With dead ends: 329 [2018-09-18 10:04:03,161 INFO L226 Difference]: Without dead ends: 327 [2018-09-18 10:04:03,161 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1333 GetRequests, 1168 SyntacticMatches, 126 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2207 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=586, Invalid=1054, Unknown=0, NotChecked=0, Total=1640 [2018-09-18 10:04:03,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2018-09-18 10:04:03,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 327. [2018-09-18 10:04:03,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2018-09-18 10:04:03,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 328 transitions. [2018-09-18 10:04:03,171 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 328 transitions. Word has length 316 [2018-09-18 10:04:03,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:03,171 INFO L480 AbstractCegarLoop]: Abstraction has 327 states and 328 transitions. [2018-09-18 10:04:03,171 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-09-18 10:04:03,171 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 328 transitions. [2018-09-18 10:04:03,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2018-09-18 10:04:03,172 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:03,173 INFO L376 BasicCegarLoop]: trace histogram [32, 32, 32, 32, 32, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:03,173 INFO L423 AbstractCegarLoop]: === Iteration 64 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:03,173 INFO L82 PathProgramCache]: Analyzing trace with hash -2112928423, now seen corresponding path program 61 times [2018-09-18 10:04:03,173 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:03,174 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:03,174 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:03,174 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:03,174 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:03,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:04,637 INFO L134 CoverageAnalysis]: Checked inductivity of 4867 backedges. 2015 proven. 992 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-18 10:04:04,637 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:04,637 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:04,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:04,644 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:04,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:04,738 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:04,805 INFO L134 CoverageAnalysis]: Checked inductivity of 4867 backedges. 2015 proven. 992 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-18 10:04:04,805 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:06,402 INFO L134 CoverageAnalysis]: Checked inductivity of 4867 backedges. 2015 proven. 992 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-18 10:04:06,422 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:06,422 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:06,438 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:06,438 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:06,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:06,647 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:06,705 INFO L134 CoverageAnalysis]: Checked inductivity of 4867 backedges. 2015 proven. 992 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-18 10:04:06,705 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:07,990 INFO L134 CoverageAnalysis]: Checked inductivity of 4867 backedges. 2015 proven. 992 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-18 10:04:07,992 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:07,992 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 67, 67, 67, 67] total 67 [2018-09-18 10:04:07,992 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:07,993 INFO L459 AbstractCegarLoop]: Interpolant automaton has 67 states [2018-09-18 10:04:07,994 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2018-09-18 10:04:07,995 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1123, Invalid=3299, Unknown=0, NotChecked=0, Total=4422 [2018-09-18 10:04:07,995 INFO L87 Difference]: Start difference. First operand 327 states and 328 transitions. Second operand 67 states. [2018-09-18 10:04:10,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:10,222 INFO L93 Difference]: Finished difference Result 466 states and 499 transitions. [2018-09-18 10:04:10,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-09-18 10:04:10,223 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 324 [2018-09-18 10:04:10,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:10,224 INFO L225 Difference]: With dead ends: 466 [2018-09-18 10:04:10,224 INFO L226 Difference]: Without dead ends: 329 [2018-09-18 10:04:10,226 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1394 GetRequests, 1168 SyntacticMatches, 128 SemanticMatches, 98 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5487 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=2311, Invalid=7589, Unknown=0, NotChecked=0, Total=9900 [2018-09-18 10:04:10,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-09-18 10:04:10,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 329. [2018-09-18 10:04:10,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2018-09-18 10:04:10,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 330 transitions. [2018-09-18 10:04:10,240 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 330 transitions. Word has length 324 [2018-09-18 10:04:10,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:10,241 INFO L480 AbstractCegarLoop]: Abstraction has 329 states and 330 transitions. [2018-09-18 10:04:10,241 INFO L481 AbstractCegarLoop]: Interpolant automaton has 67 states. [2018-09-18 10:04:10,241 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 330 transitions. [2018-09-18 10:04:10,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327 [2018-09-18 10:04:10,243 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:10,243 INFO L376 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:10,243 INFO L423 AbstractCegarLoop]: === Iteration 65 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:10,243 INFO L82 PathProgramCache]: Analyzing trace with hash -1966924845, now seen corresponding path program 62 times [2018-09-18 10:04:10,244 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:10,244 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:10,244 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:10,244 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:10,244 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:10,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:11,167 INFO L134 CoverageAnalysis]: Checked inductivity of 4931 backedges. 1117 proven. 2044 refuted. 0 times theorem prover too weak. 1770 trivial. 0 not checked. [2018-09-18 10:04:11,168 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:11,168 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:11,177 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:11,178 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:11,264 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:11,264 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:11,268 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:11,523 INFO L134 CoverageAnalysis]: Checked inductivity of 4931 backedges. 1118 proven. 1953 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-18 10:04:11,524 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:12,437 INFO L134 CoverageAnalysis]: Checked inductivity of 4931 backedges. 1118 proven. 1953 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-18 10:04:12,457 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:12,457 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:12,472 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:12,472 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:12,681 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:12,681 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:12,691 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:12,759 INFO L134 CoverageAnalysis]: Checked inductivity of 4931 backedges. 1118 proven. 1953 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-18 10:04:12,759 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:13,683 INFO L134 CoverageAnalysis]: Checked inductivity of 4931 backedges. 1118 proven. 1953 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-09-18 10:04:13,685 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:13,685 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 37, 37, 37, 37] total 40 [2018-09-18 10:04:13,685 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:13,685 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-09-18 10:04:13,686 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-09-18 10:04:13,686 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=607, Invalid=953, Unknown=0, NotChecked=0, Total=1560 [2018-09-18 10:04:13,686 INFO L87 Difference]: Start difference. First operand 329 states and 330 transitions. Second operand 40 states. [2018-09-18 10:04:14,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:14,140 INFO L93 Difference]: Finished difference Result 339 states and 340 transitions. [2018-09-18 10:04:14,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-18 10:04:14,141 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 326 [2018-09-18 10:04:14,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:14,143 INFO L225 Difference]: With dead ends: 339 [2018-09-18 10:04:14,143 INFO L226 Difference]: Without dead ends: 337 [2018-09-18 10:04:14,144 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1375 GetRequests, 1205 SyntacticMatches, 130 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2342 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=620, Invalid=1102, Unknown=0, NotChecked=0, Total=1722 [2018-09-18 10:04:14,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337 states. [2018-09-18 10:04:14,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337 to 337. [2018-09-18 10:04:14,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2018-09-18 10:04:14,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 338 transitions. [2018-09-18 10:04:14,159 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 338 transitions. Word has length 326 [2018-09-18 10:04:14,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:14,160 INFO L480 AbstractCegarLoop]: Abstraction has 337 states and 338 transitions. [2018-09-18 10:04:14,160 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-09-18 10:04:14,160 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 338 transitions. [2018-09-18 10:04:14,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335 [2018-09-18 10:04:14,162 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:14,163 INFO L376 BasicCegarLoop]: trace histogram [33, 33, 33, 33, 33, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:14,163 INFO L423 AbstractCegarLoop]: === Iteration 66 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:14,163 INFO L82 PathProgramCache]: Analyzing trace with hash -1568017642, now seen corresponding path program 63 times [2018-09-18 10:04:14,163 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:14,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:14,164 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:14,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:14,164 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:14,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:15,872 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 2144 proven. 1056 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-18 10:04:15,873 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:15,873 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:15,881 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:15,881 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:16,018 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 33 check-sat command(s) [2018-09-18 10:04:16,018 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:16,022 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:16,108 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 2144 proven. 1056 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-18 10:04:16,108 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:17,439 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 2144 proven. 1056 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-18 10:04:17,459 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:17,460 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:17,474 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:17,475 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:18,548 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 33 check-sat command(s) [2018-09-18 10:04:18,548 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:18,561 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:18,633 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 2144 proven. 1056 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-18 10:04:18,634 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:19,957 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 2144 proven. 1056 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-18 10:04:19,959 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:19,959 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [69, 69, 69, 69, 69] total 69 [2018-09-18 10:04:19,959 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:19,960 INFO L459 AbstractCegarLoop]: Interpolant automaton has 69 states [2018-09-18 10:04:19,960 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2018-09-18 10:04:19,960 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1191, Invalid=3501, Unknown=0, NotChecked=0, Total=4692 [2018-09-18 10:04:19,960 INFO L87 Difference]: Start difference. First operand 337 states and 338 transitions. Second operand 69 states. [2018-09-18 10:04:22,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:22,575 INFO L93 Difference]: Finished difference Result 480 states and 514 transitions. [2018-09-18 10:04:22,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2018-09-18 10:04:22,575 INFO L78 Accepts]: Start accepts. Automaton has 69 states. Word has length 334 [2018-09-18 10:04:22,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:22,577 INFO L225 Difference]: With dead ends: 480 [2018-09-18 10:04:22,577 INFO L226 Difference]: Without dead ends: 339 [2018-09-18 10:04:22,578 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1437 GetRequests, 1204 SyntacticMatches, 132 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5840 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=2449, Invalid=8057, Unknown=0, NotChecked=0, Total=10506 [2018-09-18 10:04:22,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 339 states. [2018-09-18 10:04:22,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 339 to 339. [2018-09-18 10:04:22,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 339 states. [2018-09-18 10:04:22,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 339 states to 339 states and 340 transitions. [2018-09-18 10:04:22,589 INFO L78 Accepts]: Start accepts. Automaton has 339 states and 340 transitions. Word has length 334 [2018-09-18 10:04:22,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:22,589 INFO L480 AbstractCegarLoop]: Abstraction has 339 states and 340 transitions. [2018-09-18 10:04:22,589 INFO L481 AbstractCegarLoop]: Interpolant automaton has 69 states. [2018-09-18 10:04:22,589 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 340 transitions. [2018-09-18 10:04:22,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2018-09-18 10:04:22,590 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:22,591 INFO L376 BasicCegarLoop]: trace histogram [34, 33, 33, 33, 33, 33, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:22,591 INFO L423 AbstractCegarLoop]: === Iteration 67 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:22,591 INFO L82 PathProgramCache]: Analyzing trace with hash -907577072, now seen corresponding path program 64 times [2018-09-18 10:04:22,591 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:22,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:22,592 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:22,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:22,592 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:22,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:23,302 INFO L134 CoverageAnalysis]: Checked inductivity of 5250 backedges. 1185 proven. 2174 refuted. 0 times theorem prover too weak. 1891 trivial. 0 not checked. [2018-09-18 10:04:23,303 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:23,303 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:23,310 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:23,311 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:23,409 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:23,409 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:23,414 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:23,552 INFO L134 CoverageAnalysis]: Checked inductivity of 5250 backedges. 1186 proven. 2080 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-18 10:04:23,552 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:24,598 INFO L134 CoverageAnalysis]: Checked inductivity of 5250 backedges. 1186 proven. 2080 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-18 10:04:24,619 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:24,619 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 129 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 129 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:24,635 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:24,635 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:24,901 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:24,901 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:24,912 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:24,984 INFO L134 CoverageAnalysis]: Checked inductivity of 5250 backedges. 1186 proven. 2080 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-18 10:04:24,984 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:26,272 INFO L134 CoverageAnalysis]: Checked inductivity of 5250 backedges. 1186 proven. 2080 refuted. 0 times theorem prover too weak. 1984 trivial. 0 not checked. [2018-09-18 10:04:26,274 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:26,275 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 38, 38, 38, 38] total 41 [2018-09-18 10:04:26,275 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:26,275 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-09-18 10:04:26,275 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-09-18 10:04:26,276 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=642, Invalid=998, Unknown=0, NotChecked=0, Total=1640 [2018-09-18 10:04:26,276 INFO L87 Difference]: Start difference. First operand 339 states and 340 transitions. Second operand 41 states. [2018-09-18 10:04:26,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:26,806 INFO L93 Difference]: Finished difference Result 349 states and 350 transitions. [2018-09-18 10:04:26,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-09-18 10:04:26,807 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 336 [2018-09-18 10:04:26,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:26,809 INFO L225 Difference]: With dead ends: 349 [2018-09-18 10:04:26,809 INFO L226 Difference]: Without dead ends: 347 [2018-09-18 10:04:26,810 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1417 GetRequests, 1242 SyntacticMatches, 134 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2481 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=655, Invalid=1151, Unknown=0, NotChecked=0, Total=1806 [2018-09-18 10:04:26,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-09-18 10:04:26,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 347. [2018-09-18 10:04:26,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 347 states. [2018-09-18 10:04:26,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 347 states to 347 states and 348 transitions. [2018-09-18 10:04:26,820 INFO L78 Accepts]: Start accepts. Automaton has 347 states and 348 transitions. Word has length 336 [2018-09-18 10:04:26,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:26,820 INFO L480 AbstractCegarLoop]: Abstraction has 347 states and 348 transitions. [2018-09-18 10:04:26,821 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-09-18 10:04:26,821 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 348 transitions. [2018-09-18 10:04:26,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 345 [2018-09-18 10:04:26,822 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:26,823 INFO L376 BasicCegarLoop]: trace histogram [34, 34, 34, 34, 34, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:26,823 INFO L423 AbstractCegarLoop]: === Iteration 68 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:26,823 INFO L82 PathProgramCache]: Analyzing trace with hash -1370504365, now seen corresponding path program 65 times [2018-09-18 10:04:26,823 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:26,824 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:26,824 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:26,824 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:26,824 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:26,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:28,381 INFO L134 CoverageAnalysis]: Checked inductivity of 5511 backedges. 2277 proven. 1122 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-18 10:04:28,382 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:28,382 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 130 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 130 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:28,390 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:28,390 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:28,534 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2018-09-18 10:04:28,534 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:28,539 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:28,613 INFO L134 CoverageAnalysis]: Checked inductivity of 5511 backedges. 2277 proven. 1122 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-18 10:04:28,614 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:30,042 INFO L134 CoverageAnalysis]: Checked inductivity of 5511 backedges. 2277 proven. 1122 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-18 10:04:30,063 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:30,063 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 131 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 131 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:30,079 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:30,079 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:31,230 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2018-09-18 10:04:31,230 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:31,247 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:31,318 INFO L134 CoverageAnalysis]: Checked inductivity of 5511 backedges. 2277 proven. 1122 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-18 10:04:31,319 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:32,811 INFO L134 CoverageAnalysis]: Checked inductivity of 5511 backedges. 2277 proven. 1122 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-18 10:04:32,812 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:32,813 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [71, 71, 71, 71, 71] total 71 [2018-09-18 10:04:32,813 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:32,813 INFO L459 AbstractCegarLoop]: Interpolant automaton has 71 states [2018-09-18 10:04:32,814 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2018-09-18 10:04:32,814 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1261, Invalid=3709, Unknown=0, NotChecked=0, Total=4970 [2018-09-18 10:04:32,815 INFO L87 Difference]: Start difference. First operand 347 states and 348 transitions. Second operand 71 states. [2018-09-18 10:04:35,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:35,118 INFO L93 Difference]: Finished difference Result 494 states and 529 transitions. [2018-09-18 10:04:35,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-09-18 10:04:35,118 INFO L78 Accepts]: Start accepts. Automaton has 71 states. Word has length 344 [2018-09-18 10:04:35,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:35,119 INFO L225 Difference]: With dead ends: 494 [2018-09-18 10:04:35,119 INFO L226 Difference]: Without dead ends: 349 [2018-09-18 10:04:35,121 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1480 GetRequests, 1240 SyntacticMatches, 136 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6204 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=2591, Invalid=8539, Unknown=0, NotChecked=0, Total=11130 [2018-09-18 10:04:35,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349 states. [2018-09-18 10:04:35,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349 to 349. [2018-09-18 10:04:35,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 349 states. [2018-09-18 10:04:35,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 349 states and 350 transitions. [2018-09-18 10:04:35,133 INFO L78 Accepts]: Start accepts. Automaton has 349 states and 350 transitions. Word has length 344 [2018-09-18 10:04:35,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:35,133 INFO L480 AbstractCegarLoop]: Abstraction has 349 states and 350 transitions. [2018-09-18 10:04:35,134 INFO L481 AbstractCegarLoop]: Interpolant automaton has 71 states. [2018-09-18 10:04:35,134 INFO L276 IsEmpty]: Start isEmpty. Operand 349 states and 350 transitions. [2018-09-18 10:04:35,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 347 [2018-09-18 10:04:35,135 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:35,135 INFO L376 BasicCegarLoop]: trace histogram [35, 34, 34, 34, 34, 34, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:35,135 INFO L423 AbstractCegarLoop]: === Iteration 69 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:35,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1034000589, now seen corresponding path program 66 times [2018-09-18 10:04:35,136 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:35,136 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:35,136 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:35,136 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:35,136 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:35,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:35,858 INFO L134 CoverageAnalysis]: Checked inductivity of 5579 backedges. 1255 proven. 2308 refuted. 0 times theorem prover too weak. 2016 trivial. 0 not checked. [2018-09-18 10:04:35,858 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:35,858 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 132 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 132 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:35,866 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:35,866 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:36,017 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 35 check-sat command(s) [2018-09-18 10:04:36,018 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:36,022 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:36,180 INFO L134 CoverageAnalysis]: Checked inductivity of 5579 backedges. 1256 proven. 2211 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-18 10:04:36,180 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:37,301 INFO L134 CoverageAnalysis]: Checked inductivity of 5579 backedges. 1256 proven. 2211 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-18 10:04:37,324 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:37,324 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 133 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 133 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:37,355 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:37,355 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:38,494 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 35 check-sat command(s) [2018-09-18 10:04:38,495 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:38,505 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:38,581 INFO L134 CoverageAnalysis]: Checked inductivity of 5579 backedges. 1256 proven. 2211 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-18 10:04:38,581 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:39,586 INFO L134 CoverageAnalysis]: Checked inductivity of 5579 backedges. 1256 proven. 2211 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-09-18 10:04:39,588 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:39,588 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 39, 39, 39, 39] total 42 [2018-09-18 10:04:39,589 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:39,589 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-09-18 10:04:39,590 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-09-18 10:04:39,590 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=678, Invalid=1044, Unknown=0, NotChecked=0, Total=1722 [2018-09-18 10:04:39,590 INFO L87 Difference]: Start difference. First operand 349 states and 350 transitions. Second operand 42 states. [2018-09-18 10:04:40,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:40,012 INFO L93 Difference]: Finished difference Result 359 states and 360 transitions. [2018-09-18 10:04:40,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-09-18 10:04:40,013 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 346 [2018-09-18 10:04:40,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:40,015 INFO L225 Difference]: With dead ends: 359 [2018-09-18 10:04:40,015 INFO L226 Difference]: Without dead ends: 357 [2018-09-18 10:04:40,016 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1459 GetRequests, 1279 SyntacticMatches, 138 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2624 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=691, Invalid=1201, Unknown=0, NotChecked=0, Total=1892 [2018-09-18 10:04:40,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-09-18 10:04:40,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 357. [2018-09-18 10:04:40,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 357 states. [2018-09-18 10:04:40,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 358 transitions. [2018-09-18 10:04:40,030 INFO L78 Accepts]: Start accepts. Automaton has 357 states and 358 transitions. Word has length 346 [2018-09-18 10:04:40,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:40,030 INFO L480 AbstractCegarLoop]: Abstraction has 357 states and 358 transitions. [2018-09-18 10:04:40,030 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-09-18 10:04:40,030 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 358 transitions. [2018-09-18 10:04:40,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2018-09-18 10:04:40,032 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:40,033 INFO L376 BasicCegarLoop]: trace histogram [35, 35, 35, 35, 35, 34, 34, 34, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:40,033 INFO L423 AbstractCegarLoop]: === Iteration 70 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:40,033 INFO L82 PathProgramCache]: Analyzing trace with hash -2013211120, now seen corresponding path program 67 times [2018-09-18 10:04:40,033 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:40,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:40,034 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:40,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:40,034 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:40,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:41,954 INFO L134 CoverageAnalysis]: Checked inductivity of 5848 backedges. 2414 proven. 1190 refuted. 0 times theorem prover too weak. 2244 trivial. 0 not checked. [2018-09-18 10:04:41,954 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:41,954 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 134 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 134 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:41,961 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:41,961 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:42,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:42,062 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:42,141 INFO L134 CoverageAnalysis]: Checked inductivity of 5848 backedges. 2414 proven. 1190 refuted. 0 times theorem prover too weak. 2244 trivial. 0 not checked. [2018-09-18 10:04:42,142 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:43,667 INFO L134 CoverageAnalysis]: Checked inductivity of 5848 backedges. 2414 proven. 1190 refuted. 0 times theorem prover too weak. 2244 trivial. 0 not checked. [2018-09-18 10:04:43,687 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:43,687 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 135 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 135 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:43,702 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:43,702 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:43,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:43,930 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:44,009 INFO L134 CoverageAnalysis]: Checked inductivity of 5848 backedges. 2414 proven. 1190 refuted. 0 times theorem prover too weak. 2244 trivial. 0 not checked. [2018-09-18 10:04:44,010 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:45,502 INFO L134 CoverageAnalysis]: Checked inductivity of 5848 backedges. 2414 proven. 1190 refuted. 0 times theorem prover too weak. 2244 trivial. 0 not checked. [2018-09-18 10:04:45,504 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:45,504 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [73, 73, 73, 73, 73] total 73 [2018-09-18 10:04:45,504 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:45,505 INFO L459 AbstractCegarLoop]: Interpolant automaton has 73 states [2018-09-18 10:04:45,506 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2018-09-18 10:04:45,506 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1333, Invalid=3923, Unknown=0, NotChecked=0, Total=5256 [2018-09-18 10:04:45,506 INFO L87 Difference]: Start difference. First operand 357 states and 358 transitions. Second operand 73 states. [2018-09-18 10:04:48,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:48,194 INFO L93 Difference]: Finished difference Result 508 states and 544 transitions. [2018-09-18 10:04:48,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2018-09-18 10:04:48,195 INFO L78 Accepts]: Start accepts. Automaton has 73 states. Word has length 354 [2018-09-18 10:04:48,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:48,196 INFO L225 Difference]: With dead ends: 508 [2018-09-18 10:04:48,196 INFO L226 Difference]: Without dead ends: 359 [2018-09-18 10:04:48,197 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1523 GetRequests, 1276 SyntacticMatches, 140 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6579 ImplicationChecksByTransitivity, 5.6s TimeCoverageRelationStatistics Valid=2737, Invalid=9035, Unknown=0, NotChecked=0, Total=11772 [2018-09-18 10:04:48,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states. [2018-09-18 10:04:48,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 359. [2018-09-18 10:04:48,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 359 states. [2018-09-18 10:04:48,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 359 states to 359 states and 360 transitions. [2018-09-18 10:04:48,209 INFO L78 Accepts]: Start accepts. Automaton has 359 states and 360 transitions. Word has length 354 [2018-09-18 10:04:48,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:48,209 INFO L480 AbstractCegarLoop]: Abstraction has 359 states and 360 transitions. [2018-09-18 10:04:48,209 INFO L481 AbstractCegarLoop]: Interpolant automaton has 73 states. [2018-09-18 10:04:48,209 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 360 transitions. [2018-09-18 10:04:48,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2018-09-18 10:04:48,211 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:48,211 INFO L376 BasicCegarLoop]: trace histogram [36, 35, 35, 35, 35, 35, 34, 34, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:48,211 INFO L423 AbstractCegarLoop]: === Iteration 71 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:48,211 INFO L82 PathProgramCache]: Analyzing trace with hash 600414986, now seen corresponding path program 68 times [2018-09-18 10:04:48,211 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:48,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:48,212 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:48,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:48,212 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:48,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:48,901 INFO L134 CoverageAnalysis]: Checked inductivity of 5918 backedges. 1327 proven. 2446 refuted. 0 times theorem prover too weak. 2145 trivial. 0 not checked. [2018-09-18 10:04:48,902 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:48,902 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 136 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 136 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:48,908 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:48,909 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:49,010 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:49,010 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:49,015 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:49,157 INFO L134 CoverageAnalysis]: Checked inductivity of 5918 backedges. 1328 proven. 2346 refuted. 0 times theorem prover too weak. 2244 trivial. 0 not checked. [2018-09-18 10:04:49,158 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:50,277 INFO L134 CoverageAnalysis]: Checked inductivity of 5918 backedges. 1328 proven. 2346 refuted. 0 times theorem prover too weak. 2244 trivial. 0 not checked. [2018-09-18 10:04:50,297 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:50,297 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 137 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 137 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:50,314 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:50,314 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:50,541 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:50,541 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:50,558 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:50,628 INFO L134 CoverageAnalysis]: Checked inductivity of 5918 backedges. 1328 proven. 2346 refuted. 0 times theorem prover too weak. 2244 trivial. 0 not checked. [2018-09-18 10:04:50,628 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:51,959 INFO L134 CoverageAnalysis]: Checked inductivity of 5918 backedges. 1328 proven. 2346 refuted. 0 times theorem prover too weak. 2244 trivial. 0 not checked. [2018-09-18 10:04:51,961 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:51,961 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 40, 40, 40, 40] total 43 [2018-09-18 10:04:51,962 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:51,962 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-09-18 10:04:51,963 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-09-18 10:04:51,963 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=715, Invalid=1091, Unknown=0, NotChecked=0, Total=1806 [2018-09-18 10:04:51,963 INFO L87 Difference]: Start difference. First operand 359 states and 360 transitions. Second operand 43 states. [2018-09-18 10:04:52,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:52,547 INFO L93 Difference]: Finished difference Result 369 states and 370 transitions. [2018-09-18 10:04:52,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-09-18 10:04:52,548 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 356 [2018-09-18 10:04:52,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:52,550 INFO L225 Difference]: With dead ends: 369 [2018-09-18 10:04:52,550 INFO L226 Difference]: Without dead ends: 367 [2018-09-18 10:04:52,551 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1501 GetRequests, 1316 SyntacticMatches, 142 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2771 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=728, Invalid=1252, Unknown=0, NotChecked=0, Total=1980 [2018-09-18 10:04:52,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367 states. [2018-09-18 10:04:52,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367 to 367. [2018-09-18 10:04:52,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 367 states. [2018-09-18 10:04:52,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 367 states to 367 states and 368 transitions. [2018-09-18 10:04:52,565 INFO L78 Accepts]: Start accepts. Automaton has 367 states and 368 transitions. Word has length 356 [2018-09-18 10:04:52,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:52,566 INFO L480 AbstractCegarLoop]: Abstraction has 367 states and 368 transitions. [2018-09-18 10:04:52,566 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-09-18 10:04:52,566 INFO L276 IsEmpty]: Start isEmpty. Operand 367 states and 368 transitions. [2018-09-18 10:04:52,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 365 [2018-09-18 10:04:52,567 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:52,568 INFO L376 BasicCegarLoop]: trace histogram [36, 36, 36, 36, 36, 35, 35, 35, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:52,568 INFO L423 AbstractCegarLoop]: === Iteration 72 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:52,568 INFO L82 PathProgramCache]: Analyzing trace with hash -1554691251, now seen corresponding path program 69 times [2018-09-18 10:04:52,568 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:52,569 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:52,569 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:52,569 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:52,569 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:52,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:54,231 INFO L134 CoverageAnalysis]: Checked inductivity of 6195 backedges. 2555 proven. 1260 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-18 10:04:54,231 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:54,231 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 138 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 138 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:54,238 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:54,239 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:54,390 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 36 check-sat command(s) [2018-09-18 10:04:54,390 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:54,396 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:54,498 INFO L134 CoverageAnalysis]: Checked inductivity of 6195 backedges. 2555 proven. 1260 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-18 10:04:54,498 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:56,096 INFO L134 CoverageAnalysis]: Checked inductivity of 6195 backedges. 2555 proven. 1260 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-18 10:04:56,116 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:56,116 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 139 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 139 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:56,132 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:56,132 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:57,409 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 36 check-sat command(s) [2018-09-18 10:04:57,409 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:57,420 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:57,503 INFO L134 CoverageAnalysis]: Checked inductivity of 6195 backedges. 2555 proven. 1260 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-18 10:04:57,503 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:59,089 INFO L134 CoverageAnalysis]: Checked inductivity of 6195 backedges. 2555 proven. 1260 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-18 10:04:59,090 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:59,091 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [75, 75, 75, 75, 75] total 75 [2018-09-18 10:04:59,091 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:59,091 INFO L459 AbstractCegarLoop]: Interpolant automaton has 75 states [2018-09-18 10:04:59,092 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 75 interpolants. [2018-09-18 10:04:59,092 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1407, Invalid=4143, Unknown=0, NotChecked=0, Total=5550 [2018-09-18 10:04:59,092 INFO L87 Difference]: Start difference. First operand 367 states and 368 transitions. Second operand 75 states. [2018-09-18 10:05:01,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:01,118 INFO L93 Difference]: Finished difference Result 522 states and 559 transitions. [2018-09-18 10:05:01,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 75 states. [2018-09-18 10:05:01,118 INFO L78 Accepts]: Start accepts. Automaton has 75 states. Word has length 364 [2018-09-18 10:05:01,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:01,120 INFO L225 Difference]: With dead ends: 522 [2018-09-18 10:05:01,120 INFO L226 Difference]: Without dead ends: 369 [2018-09-18 10:05:01,122 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1566 GetRequests, 1312 SyntacticMatches, 144 SemanticMatches, 110 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6965 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=2887, Invalid=9545, Unknown=0, NotChecked=0, Total=12432 [2018-09-18 10:05:01,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 369 states. [2018-09-18 10:05:01,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 369 to 369. [2018-09-18 10:05:01,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 369 states. [2018-09-18 10:05:01,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 369 states to 369 states and 370 transitions. [2018-09-18 10:05:01,139 INFO L78 Accepts]: Start accepts. Automaton has 369 states and 370 transitions. Word has length 364 [2018-09-18 10:05:01,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:01,139 INFO L480 AbstractCegarLoop]: Abstraction has 369 states and 370 transitions. [2018-09-18 10:05:01,139 INFO L481 AbstractCegarLoop]: Interpolant automaton has 75 states. [2018-09-18 10:05:01,139 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 370 transitions. [2018-09-18 10:05:01,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 367 [2018-09-18 10:05:01,141 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:01,142 INFO L376 BasicCegarLoop]: trace histogram [37, 36, 36, 36, 36, 36, 35, 35, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:01,142 INFO L423 AbstractCegarLoop]: === Iteration 73 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:01,142 INFO L82 PathProgramCache]: Analyzing trace with hash -1521508409, now seen corresponding path program 70 times [2018-09-18 10:05:01,142 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:01,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:01,143 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:05:01,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:01,143 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:01,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:02,227 INFO L134 CoverageAnalysis]: Checked inductivity of 6267 backedges. 1401 proven. 2588 refuted. 0 times theorem prover too weak. 2278 trivial. 0 not checked. [2018-09-18 10:05:02,227 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:02,227 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 140 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 140 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:02,235 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:05:02,235 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:05:02,346 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:05:02,346 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:02,351 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:02,499 INFO L134 CoverageAnalysis]: Checked inductivity of 6267 backedges. 1402 proven. 2485 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-18 10:05:02,499 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:03,619 INFO L134 CoverageAnalysis]: Checked inductivity of 6267 backedges. 1402 proven. 2485 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-18 10:05:03,639 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:03,639 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 141 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 141 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:03,653 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:05:03,654 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:05:03,936 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:05:03,937 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:03,948 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:04,069 INFO L134 CoverageAnalysis]: Checked inductivity of 6267 backedges. 1402 proven. 2485 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-09-18 10:05:04,070 INFO L316 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-09-18 10:05:04,790 INFO L177 TraceCheckSpWp]: Timeout while computing interpolants [2018-09-18 10:05:04,991 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 141 cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:04,991 WARN L549 AbstractCegarLoop]: Verification canceled [2018-09-18 10:05:04,996 WARN L206 ceAbstractionStarter]: Timeout [2018-09-18 10:05:04,997 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.09 10:05:04 BoogieIcfgContainer [2018-09-18 10:05:04,997 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-18 10:05:04,997 INFO L168 Benchmark]: Toolchain (without parser) took 232252.10 ms. Allocated memory was 1.5 GB in the beginning and 2.5 GB in the end (delta: 911.7 MB). Free memory was 1.4 GB in the beginning and 1.8 GB in the end (delta: -372.5 MB). Peak memory consumption was 539.2 MB. Max. memory is 7.1 GB. [2018-09-18 10:05:04,999 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:05:04,999 INFO L168 Benchmark]: CACSL2BoogieTranslator took 238.08 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-09-18 10:05:04,999 INFO L168 Benchmark]: Boogie Procedure Inliner took 21.49 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:05:04,999 INFO L168 Benchmark]: Boogie Preprocessor took 21.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:05:05,000 INFO L168 Benchmark]: RCFGBuilder took 379.15 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 746.1 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -798.9 MB). Peak memory consumption was 26.6 MB. Max. memory is 7.1 GB. [2018-09-18 10:05:05,000 INFO L168 Benchmark]: TraceAbstraction took 231586.53 ms. Allocated memory was 2.3 GB in the beginning and 2.5 GB in the end (delta: 165.7 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 415.8 MB). Peak memory consumption was 581.5 MB. Max. memory is 7.1 GB. [2018-09-18 10:05:05,002 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 238.08 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 21.49 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 21.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 379.15 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 746.1 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -798.9 MB). Peak memory consumption was 26.6 MB. Max. memory is 7.1 GB. * TraceAbstraction took 231586.53 ms. Allocated memory was 2.3 GB in the beginning and 2.5 GB in the end (delta: 165.7 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 415.8 MB). Peak memory consumption was 581.5 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was analyzing trace of length 367 with TraceHistMax 37, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 44 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 23 locations, 1 error locations. TIMEOUT Result, 231.5s OverallTime, 73 OverallIterations, 37 TraceHistogramMax, 51.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3473 SDtfs, 2766 SDslu, 31504 SDs, 0 SdLazy, 39245 SolverSat, 3181 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 25.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 56713 GetRequests, 48493 SyntacticMatches, 5244 SemanticMatches, 2976 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121786 ImplicationChecksByTransitivity, 142.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=369occurred in iteration=72, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.7s AutomataMinimizationTime, 72 MinimizatonAttempts, 5 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.7s SsaConstructionTime, 25.0s SatisfiabilityAnalysisTime, 143.1s InterpolantComputationTime, 39895 NumberOfCodeBlocks, 39895 NumberOfCodeBlocksAsserted, 1514 NumberOfCheckSat, 66115 ConstructedInterpolants, 0 QuantifiedInterpolants, 35335883 SizeOfPredicates, 416 NumberOfNonLiveVariables, 56412 ConjunctsInSsa, 5724 ConjunctsInUnsatCore, 348 InterpolantComputations, 3 PerfectInterpolantSequences, 514175/733417 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/down_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-09-18_10-05-05-012.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/down_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-18_10-05-05-012.csv Completed graceful shutdown