java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-lit/gj2007_true-unreach-call_true-termination.c.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-69f5bdd-m [2018-09-18 10:02:18,273 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-18 10:02:18,276 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-18 10:02:18,294 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-18 10:02:18,294 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-18 10:02:18,296 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-18 10:02:18,297 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-18 10:02:18,299 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-18 10:02:18,302 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-18 10:02:18,306 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-18 10:02:18,310 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-18 10:02:18,310 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-18 10:02:18,311 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-18 10:02:18,313 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-18 10:02:18,316 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-18 10:02:18,317 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-18 10:02:18,318 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-18 10:02:18,328 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-18 10:02:18,330 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-18 10:02:18,335 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-18 10:02:18,336 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-18 10:02:18,339 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-18 10:02:18,341 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-18 10:02:18,342 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-18 10:02:18,343 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-18 10:02:18,344 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-18 10:02:18,345 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-18 10:02:18,346 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-18 10:02:18,347 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-18 10:02:18,350 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-18 10:02:18,350 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-18 10:02:18,351 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-09-18 10:02:18,355 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-18 10:02:18,381 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-18 10:02:18,382 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-18 10:02:18,383 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-18 10:02:18,383 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-18 10:02:18,383 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-18 10:02:18,383 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-18 10:02:18,384 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-18 10:02:18,384 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-18 10:02:18,384 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-18 10:02:18,384 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-18 10:02:18,385 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-09-18 10:02:18,385 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-18 10:02:18,386 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-18 10:02:18,386 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-18 10:02:18,386 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-18 10:02:18,387 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-18 10:02:18,387 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-18 10:02:18,387 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-18 10:02:18,387 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-18 10:02:18,389 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-18 10:02:18,389 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-18 10:02:18,389 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-18 10:02:18,390 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-18 10:02:18,390 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-18 10:02:18,390 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 10:02:18,390 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-18 10:02:18,391 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-18 10:02:18,391 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-18 10:02:18,391 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-18 10:02:18,391 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-18 10:02:18,392 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-18 10:02:18,392 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-18 10:02:18,392 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-18 10:02:18,392 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-18 10:02:18,454 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-18 10:02:18,468 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-18 10:02:18,475 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-18 10:02:18,477 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-18 10:02:18,478 INFO L276 PluginConnector]: CDTParser initialized [2018-09-18 10:02:18,479 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-lit/gj2007_true-unreach-call_true-termination.c.i [2018-09-18 10:02:18,841 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c59a0155c/e5e47778de534637840af0addd657f62/FLAG09bf04db5 [2018-09-18 10:02:18,986 INFO L277 CDTParser]: Found 1 translation units. [2018-09-18 10:02:18,986 INFO L159 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/gj2007_true-unreach-call_true-termination.c.i [2018-09-18 10:02:18,993 INFO L325 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c59a0155c/e5e47778de534637840af0addd657f62/FLAG09bf04db5 [2018-09-18 10:02:19,007 INFO L333 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c59a0155c/e5e47778de534637840af0addd657f62 [2018-09-18 10:02:19,020 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-18 10:02:19,027 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-18 10:02:19,028 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-18 10:02:19,028 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-18 10:02:19,037 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-18 10:02:19,038 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,041 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3e65d60 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19, skipping insertion in model container [2018-09-18 10:02:19,041 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,054 INFO L160 ieTranslatorObserver]: Starting translation in SV-COMP mode [2018-09-18 10:02:19,252 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 10:02:19,276 INFO L424 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-18 10:02:19,282 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 10:02:19,297 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19 WrapperNode [2018-09-18 10:02:19,297 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-18 10:02:19,298 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-18 10:02:19,298 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-18 10:02:19,299 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-18 10:02:19,309 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,316 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,322 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-18 10:02:19,323 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-18 10:02:19,323 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-18 10:02:19,324 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-18 10:02:19,334 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,335 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,336 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,336 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,337 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,346 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,347 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (1/1) ... [2018-09-18 10:02:19,349 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-18 10:02:19,349 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-18 10:02:19,349 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-18 10:02:19,350 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-18 10:02:19,352 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 10:02:19,422 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-18 10:02:19,423 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-18 10:02:19,423 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-18 10:02:19,423 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-18 10:02:19,423 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-18 10:02:19,423 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-18 10:02:19,423 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-09-18 10:02:19,424 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-09-18 10:02:19,719 INFO L356 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-18 10:02:19,720 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 10:02:19 BoogieIcfgContainer [2018-09-18 10:02:19,720 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-18 10:02:19,721 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-18 10:02:19,721 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-18 10:02:19,724 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-18 10:02:19,725 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.09 10:02:19" (1/3) ... [2018-09-18 10:02:19,725 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41f59a91 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 10:02:19, skipping insertion in model container [2018-09-18 10:02:19,726 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:02:19" (2/3) ... [2018-09-18 10:02:19,726 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41f59a91 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 10:02:19, skipping insertion in model container [2018-09-18 10:02:19,726 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 10:02:19" (3/3) ... [2018-09-18 10:02:19,728 INFO L112 eAbstractionObserver]: Analyzing ICFG gj2007_true-unreach-call_true-termination.c.i [2018-09-18 10:02:19,737 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-18 10:02:19,744 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-18 10:02:19,795 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-18 10:02:19,796 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-18 10:02:19,796 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-18 10:02:19,796 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-18 10:02:19,796 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-18 10:02:19,796 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-18 10:02:19,796 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-18 10:02:19,797 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-18 10:02:19,797 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-18 10:02:19,814 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states. [2018-09-18 10:02:19,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-09-18 10:02:19,821 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:19,822 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:19,823 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:19,828 INFO L82 PathProgramCache]: Analyzing trace with hash -147882559, now seen corresponding path program 1 times [2018-09-18 10:02:19,831 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:19,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:19,884 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:19,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:19,884 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:19,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:19,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:19,945 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:02:19,946 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-18 10:02:19,946 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:02:19,951 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-18 10:02:19,966 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-18 10:02:19,967 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 10:02:19,969 INFO L87 Difference]: Start difference. First operand 20 states. Second operand 2 states. [2018-09-18 10:02:19,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:19,994 INFO L93 Difference]: Finished difference Result 32 states and 36 transitions. [2018-09-18 10:02:19,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-18 10:02:19,995 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-09-18 10:02:19,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:20,004 INFO L225 Difference]: With dead ends: 32 [2018-09-18 10:02:20,005 INFO L226 Difference]: Without dead ends: 13 [2018-09-18 10:02:20,008 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 10:02:20,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-09-18 10:02:20,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-09-18 10:02:20,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-09-18 10:02:20,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2018-09-18 10:02:20,048 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 10 [2018-09-18 10:02:20,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:20,049 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2018-09-18 10:02:20,049 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-18 10:02:20,049 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2018-09-18 10:02:20,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-09-18 10:02:20,050 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:20,050 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:20,050 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:20,051 INFO L82 PathProgramCache]: Analyzing trace with hash -717461825, now seen corresponding path program 1 times [2018-09-18 10:02:20,051 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:20,052 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:20,052 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:20,052 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:20,053 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:20,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:20,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:20,139 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:02:20,139 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-09-18 10:02:20,140 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:02:20,142 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-18 10:02:20,143 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-18 10:02:20,143 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-18 10:02:20,143 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand 3 states. [2018-09-18 10:02:20,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:20,251 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2018-09-18 10:02:20,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-18 10:02:20,251 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-09-18 10:02:20,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:20,252 INFO L225 Difference]: With dead ends: 24 [2018-09-18 10:02:20,252 INFO L226 Difference]: Without dead ends: 16 [2018-09-18 10:02:20,253 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-18 10:02:20,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-09-18 10:02:20,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-09-18 10:02:20,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-09-18 10:02:20,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2018-09-18 10:02:20,263 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 17 transitions. Word has length 11 [2018-09-18 10:02:20,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:20,263 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 17 transitions. [2018-09-18 10:02:20,264 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-18 10:02:20,264 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 17 transitions. [2018-09-18 10:02:20,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-09-18 10:02:20,264 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:20,264 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:20,265 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:20,265 INFO L82 PathProgramCache]: Analyzing trace with hash 64649018, now seen corresponding path program 1 times [2018-09-18 10:02:20,265 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:20,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:20,266 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:20,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:20,267 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:20,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:20,350 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:20,351 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:20,351 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:20,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:20,363 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:20,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:20,397 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:20,441 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:20,441 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:20,486 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:20,511 INFO L313 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-09-18 10:02:20,511 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [4] total 6 [2018-09-18 10:02:20,511 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:02:20,512 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-18 10:02:20,512 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-18 10:02:20,512 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-09-18 10:02:20,513 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. Second operand 3 states. [2018-09-18 10:02:20,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:20,541 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2018-09-18 10:02:20,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-18 10:02:20,543 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-09-18 10:02:20,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:20,544 INFO L225 Difference]: With dead ends: 24 [2018-09-18 10:02:20,544 INFO L226 Difference]: Without dead ends: 19 [2018-09-18 10:02:20,545 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-09-18 10:02:20,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-09-18 10:02:20,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 18. [2018-09-18 10:02:20,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-09-18 10:02:20,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 19 transitions. [2018-09-18 10:02:20,551 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 19 transitions. Word has length 14 [2018-09-18 10:02:20,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:20,551 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 19 transitions. [2018-09-18 10:02:20,551 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-18 10:02:20,552 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2018-09-18 10:02:20,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-09-18 10:02:20,554 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:20,554 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:20,555 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:20,555 INFO L82 PathProgramCache]: Analyzing trace with hash 1506199393, now seen corresponding path program 1 times [2018-09-18 10:02:20,555 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:20,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:20,556 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:20,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:20,557 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:20,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:20,610 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:20,611 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:20,611 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:20,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:20,633 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:20,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:20,663 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:20,669 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:20,669 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:20,775 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:20,805 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:20,806 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:20,835 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:20,835 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:20,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:20,859 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:20,864 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:20,864 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:20,875 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:20,877 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:20,877 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-09-18 10:02:20,877 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:20,878 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-18 10:02:20,878 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-18 10:02:20,878 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-09-18 10:02:20,879 INFO L87 Difference]: Start difference. First operand 18 states and 19 transitions. Second operand 4 states. [2018-09-18 10:02:21,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:21,010 INFO L93 Difference]: Finished difference Result 31 states and 34 transitions. [2018-09-18 10:02:21,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-18 10:02:21,011 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-09-18 10:02:21,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:21,012 INFO L225 Difference]: With dead ends: 31 [2018-09-18 10:02:21,012 INFO L226 Difference]: Without dead ends: 21 [2018-09-18 10:02:21,012 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-09-18 10:02:21,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-09-18 10:02:21,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-09-18 10:02:21,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-09-18 10:02:21,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 22 transitions. [2018-09-18 10:02:21,017 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 22 transitions. Word has length 17 [2018-09-18 10:02:21,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:21,018 INFO L480 AbstractCegarLoop]: Abstraction has 21 states and 22 transitions. [2018-09-18 10:02:21,018 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-18 10:02:21,018 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 22 transitions. [2018-09-18 10:02:21,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-09-18 10:02:21,019 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:21,019 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:21,019 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:21,020 INFO L82 PathProgramCache]: Analyzing trace with hash 1748455324, now seen corresponding path program 2 times [2018-09-18 10:02:21,020 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:21,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:21,021 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:21,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:21,022 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:21,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:21,164 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:21,164 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:21,164 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:21,172 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:21,172 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:21,183 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:21,184 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:21,186 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:21,192 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:21,192 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:21,278 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:21,301 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:21,301 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:21,319 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:21,319 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:21,339 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:21,339 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:21,343 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:21,355 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:21,355 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:21,408 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:21,411 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:21,411 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-09-18 10:02:21,411 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:21,412 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-18 10:02:21,412 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-18 10:02:21,413 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-09-18 10:02:21,413 INFO L87 Difference]: Start difference. First operand 21 states and 22 transitions. Second operand 5 states. [2018-09-18 10:02:21,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:21,458 INFO L93 Difference]: Finished difference Result 34 states and 37 transitions. [2018-09-18 10:02:21,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-18 10:02:21,460 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-09-18 10:02:21,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:21,461 INFO L225 Difference]: With dead ends: 34 [2018-09-18 10:02:21,461 INFO L226 Difference]: Without dead ends: 24 [2018-09-18 10:02:21,462 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-09-18 10:02:21,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-09-18 10:02:21,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-09-18 10:02:21,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-09-18 10:02:21,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 25 transitions. [2018-09-18 10:02:21,467 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 25 transitions. Word has length 20 [2018-09-18 10:02:21,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:21,468 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 25 transitions. [2018-09-18 10:02:21,468 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-18 10:02:21,468 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 25 transitions. [2018-09-18 10:02:21,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-09-18 10:02:21,469 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:21,469 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:21,469 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:21,470 INFO L82 PathProgramCache]: Analyzing trace with hash -1045128831, now seen corresponding path program 3 times [2018-09-18 10:02:21,470 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:21,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:21,471 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:21,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:21,471 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:21,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:21,635 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:21,636 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:21,636 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:21,649 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:21,649 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:21,670 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-18 10:02:21,670 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:21,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:21,706 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 15 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-09-18 10:02:21,707 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:21,767 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 15 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-09-18 10:02:21,788 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:21,788 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:21,804 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:21,804 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:21,822 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-18 10:02:21,822 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:21,825 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:21,830 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 15 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-09-18 10:02:21,830 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:21,870 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 15 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-09-18 10:02:21,872 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:21,872 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 4, 4, 4] total 10 [2018-09-18 10:02:21,872 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:21,873 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-09-18 10:02:21,873 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-09-18 10:02:21,874 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-09-18 10:02:21,874 INFO L87 Difference]: Start difference. First operand 24 states and 25 transitions. Second operand 8 states. [2018-09-18 10:02:21,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:21,933 INFO L93 Difference]: Finished difference Result 41 states and 47 transitions. [2018-09-18 10:02:21,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-09-18 10:02:21,935 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 23 [2018-09-18 10:02:21,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:21,938 INFO L225 Difference]: With dead ends: 41 [2018-09-18 10:02:21,938 INFO L226 Difference]: Without dead ends: 31 [2018-09-18 10:02:21,939 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-09-18 10:02:21,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-09-18 10:02:21,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2018-09-18 10:02:21,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-09-18 10:02:21,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 32 transitions. [2018-09-18 10:02:21,946 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 32 transitions. Word has length 23 [2018-09-18 10:02:21,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:21,946 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 32 transitions. [2018-09-18 10:02:21,947 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-09-18 10:02:21,947 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 32 transitions. [2018-09-18 10:02:21,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-09-18 10:02:21,948 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:21,948 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:21,948 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:21,949 INFO L82 PathProgramCache]: Analyzing trace with hash 634861023, now seen corresponding path program 4 times [2018-09-18 10:02:21,949 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:21,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:21,950 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:21,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:21,950 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:21,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:22,127 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 30 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:22,128 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:22,128 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:22,144 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:22,145 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:22,185 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:22,186 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:22,188 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:22,204 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 30 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:22,204 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:22,456 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 30 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:22,476 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:22,476 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:22,492 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:22,492 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:22,512 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:22,513 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:22,516 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:22,523 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 30 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:22,523 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:22,551 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 30 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:22,553 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:22,553 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 12 [2018-09-18 10:02:22,553 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:22,553 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-09-18 10:02:22,554 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-09-18 10:02:22,554 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-09-18 10:02:22,554 INFO L87 Difference]: Start difference. First operand 30 states and 32 transitions. Second operand 7 states. [2018-09-18 10:02:22,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:22,604 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2018-09-18 10:02:22,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-18 10:02:22,605 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-09-18 10:02:22,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:22,606 INFO L225 Difference]: With dead ends: 46 [2018-09-18 10:02:22,606 INFO L226 Difference]: Without dead ends: 33 [2018-09-18 10:02:22,607 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-09-18 10:02:22,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-09-18 10:02:22,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-09-18 10:02:22,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-09-18 10:02:22,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 35 transitions. [2018-09-18 10:02:22,612 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 35 transitions. Word has length 29 [2018-09-18 10:02:22,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:22,613 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 35 transitions. [2018-09-18 10:02:22,613 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-09-18 10:02:22,613 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 35 transitions. [2018-09-18 10:02:22,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-09-18 10:02:22,614 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:22,614 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:22,615 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:22,615 INFO L82 PathProgramCache]: Analyzing trace with hash -1611776614, now seen corresponding path program 5 times [2018-09-18 10:02:22,615 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:22,616 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:22,616 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:22,616 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:22,617 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:22,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:22,751 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 30 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:22,752 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:22,752 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:22,763 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:22,763 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:22,781 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-09-18 10:02:22,781 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:22,784 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:22,791 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 30 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:22,792 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:23,034 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 30 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:23,054 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:23,054 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:23,069 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:23,070 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:23,108 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-09-18 10:02:23,108 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:23,112 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:23,119 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 30 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:23,119 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:23,179 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 30 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:23,183 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:23,183 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-09-18 10:02:23,183 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:23,184 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-09-18 10:02:23,184 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-09-18 10:02:23,185 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-09-18 10:02:23,185 INFO L87 Difference]: Start difference. First operand 33 states and 35 transitions. Second operand 8 states. [2018-09-18 10:02:23,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:23,394 INFO L93 Difference]: Finished difference Result 49 states and 54 transitions. [2018-09-18 10:02:23,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-09-18 10:02:23,396 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 32 [2018-09-18 10:02:23,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:23,397 INFO L225 Difference]: With dead ends: 49 [2018-09-18 10:02:23,397 INFO L226 Difference]: Without dead ends: 36 [2018-09-18 10:02:23,398 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-09-18 10:02:23,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-09-18 10:02:23,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-09-18 10:02:23,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-09-18 10:02:23,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2018-09-18 10:02:23,403 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 38 transitions. Word has length 32 [2018-09-18 10:02:23,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:23,403 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 38 transitions. [2018-09-18 10:02:23,404 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-09-18 10:02:23,404 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-09-18 10:02:23,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-09-18 10:02:23,405 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:23,405 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:23,405 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:23,405 INFO L82 PathProgramCache]: Analyzing trace with hash 1576720383, now seen corresponding path program 6 times [2018-09-18 10:02:23,406 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:23,406 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:23,407 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:23,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:23,407 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:23,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:23,528 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 10:02:23,528 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:23,528 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:23,537 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:23,537 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:23,552 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-18 10:02:23,552 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:23,555 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:23,767 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 23 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:23,768 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:24,008 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 23 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:24,028 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:24,029 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:24,044 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:24,044 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:24,094 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-18 10:02:24,094 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:24,098 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:24,107 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 23 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:24,107 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:24,142 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 23 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:02:24,144 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:24,144 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 10, 10, 10] total 25 [2018-09-18 10:02:24,144 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:24,145 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-18 10:02:24,145 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-18 10:02:24,146 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2018-09-18 10:02:24,146 INFO L87 Difference]: Start difference. First operand 36 states and 38 transitions. Second operand 17 states. [2018-09-18 10:02:24,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:24,390 INFO L93 Difference]: Finished difference Result 71 states and 89 transitions. [2018-09-18 10:02:24,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-18 10:02:24,390 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 35 [2018-09-18 10:02:24,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:24,391 INFO L225 Difference]: With dead ends: 71 [2018-09-18 10:02:24,392 INFO L226 Difference]: Without dead ends: 58 [2018-09-18 10:02:24,392 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2018-09-18 10:02:24,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-09-18 10:02:24,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 57. [2018-09-18 10:02:24,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-09-18 10:02:24,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 65 transitions. [2018-09-18 10:02:24,402 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 65 transitions. Word has length 35 [2018-09-18 10:02:24,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:24,402 INFO L480 AbstractCegarLoop]: Abstraction has 57 states and 65 transitions. [2018-09-18 10:02:24,402 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-18 10:02:24,403 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 65 transitions. [2018-09-18 10:02:24,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-09-18 10:02:24,404 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:24,405 INFO L376 BasicCegarLoop]: trace histogram [16, 15, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:24,405 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:24,405 INFO L82 PathProgramCache]: Analyzing trace with hash 1775771482, now seen corresponding path program 7 times [2018-09-18 10:02:24,405 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:24,406 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:24,406 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:24,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:24,407 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:24,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:24,567 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 184 proven. 84 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:24,568 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:24,568 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:24,578 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:24,578 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:24,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:24,600 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:24,613 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 184 proven. 84 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:24,613 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:24,798 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 184 proven. 84 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:24,822 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:24,822 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:24,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:24,839 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:24,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:24,874 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:24,885 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 184 proven. 84 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:24,885 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:24,949 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 184 proven. 84 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:24,950 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:24,951 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 18 [2018-09-18 10:02:24,951 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:24,951 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-09-18 10:02:24,951 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-09-18 10:02:24,952 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-09-18 10:02:24,952 INFO L87 Difference]: Start difference. First operand 57 states and 65 transitions. Second operand 10 states. [2018-09-18 10:02:25,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:25,019 INFO L93 Difference]: Finished difference Result 91 states and 108 transitions. [2018-09-18 10:02:25,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-18 10:02:25,020 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2018-09-18 10:02:25,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:25,022 INFO L225 Difference]: With dead ends: 91 [2018-09-18 10:02:25,022 INFO L226 Difference]: Without dead ends: 60 [2018-09-18 10:02:25,023 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 232 GetRequests, 216 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-09-18 10:02:25,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-09-18 10:02:25,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-09-18 10:02:25,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-09-18 10:02:25,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 68 transitions. [2018-09-18 10:02:25,030 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 68 transitions. Word has length 56 [2018-09-18 10:02:25,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:25,031 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 68 transitions. [2018-09-18 10:02:25,031 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-09-18 10:02:25,031 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 68 transitions. [2018-09-18 10:02:25,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-18 10:02:25,032 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:25,032 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:25,033 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:25,033 INFO L82 PathProgramCache]: Analyzing trace with hash -112911681, now seen corresponding path program 8 times [2018-09-18 10:02:25,033 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:25,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:25,034 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:25,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:25,034 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:25,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:25,172 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 207 proven. 108 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:25,173 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:25,173 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:25,183 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:25,183 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:25,207 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:25,207 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:25,209 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:25,217 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 207 proven. 108 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:25,218 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:25,402 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 207 proven. 108 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:25,422 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:25,422 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:25,438 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:25,438 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:25,473 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:25,474 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:25,477 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:25,487 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 207 proven. 108 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:25,487 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:25,552 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 207 proven. 108 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:25,556 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:25,556 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-09-18 10:02:25,556 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:25,557 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-18 10:02:25,557 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-18 10:02:25,558 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:02:25,558 INFO L87 Difference]: Start difference. First operand 60 states and 68 transitions. Second operand 11 states. [2018-09-18 10:02:25,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:25,632 INFO L93 Difference]: Finished difference Result 94 states and 111 transitions. [2018-09-18 10:02:25,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-18 10:02:25,636 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2018-09-18 10:02:25,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:25,637 INFO L225 Difference]: With dead ends: 94 [2018-09-18 10:02:25,637 INFO L226 Difference]: Without dead ends: 63 [2018-09-18 10:02:25,640 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 227 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:02:25,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-09-18 10:02:25,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-09-18 10:02:25,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-09-18 10:02:25,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 71 transitions. [2018-09-18 10:02:25,648 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 71 transitions. Word has length 59 [2018-09-18 10:02:25,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:25,649 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 71 transitions. [2018-09-18 10:02:25,649 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-18 10:02:25,649 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 71 transitions. [2018-09-18 10:02:25,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-09-18 10:02:25,650 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:25,650 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:25,652 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:25,652 INFO L82 PathProgramCache]: Analyzing trace with hash -1801443014, now seen corresponding path program 9 times [2018-09-18 10:02:25,652 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:25,653 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:25,653 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:25,653 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:25,653 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:25,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:26,097 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 230 proven. 135 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2018-09-18 10:02:26,097 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:26,097 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:26,105 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:26,106 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:26,130 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 14 check-sat command(s) [2018-09-18 10:02:26,130 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:26,133 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:26,633 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 234 proven. 100 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2018-09-18 10:02:26,633 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:27,018 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 234 proven. 100 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2018-09-18 10:02:27,038 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:27,038 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:27,054 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:27,055 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:27,141 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 14 check-sat command(s) [2018-09-18 10:02:27,141 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:27,145 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:27,152 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 234 proven. 100 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2018-09-18 10:02:27,153 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:27,205 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 234 proven. 100 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2018-09-18 10:02:27,207 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:27,207 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11, 11, 11] total 30 [2018-09-18 10:02:27,207 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:27,207 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-18 10:02:27,208 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-18 10:02:27,208 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-09-18 10:02:27,208 INFO L87 Difference]: Start difference. First operand 63 states and 71 transitions. Second operand 21 states. [2018-09-18 10:02:27,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:27,406 INFO L93 Difference]: Finished difference Result 101 states and 121 transitions. [2018-09-18 10:02:27,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-18 10:02:27,407 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 62 [2018-09-18 10:02:27,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:27,407 INFO L225 Difference]: With dead ends: 101 [2018-09-18 10:02:27,408 INFO L226 Difference]: Without dead ends: 70 [2018-09-18 10:02:27,409 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 230 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-09-18 10:02:27,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-09-18 10:02:27,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 69. [2018-09-18 10:02:27,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-09-18 10:02:27,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 78 transitions. [2018-09-18 10:02:27,415 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 78 transitions. Word has length 62 [2018-09-18 10:02:27,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:27,415 INFO L480 AbstractCegarLoop]: Abstraction has 69 states and 78 transitions. [2018-09-18 10:02:27,415 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-18 10:02:27,415 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 78 transitions. [2018-09-18 10:02:27,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-09-18 10:02:27,416 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:27,417 INFO L376 BasicCegarLoop]: trace histogram [20, 19, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:27,417 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:27,417 INFO L82 PathProgramCache]: Analyzing trace with hash 348314524, now seen corresponding path program 10 times [2018-09-18 10:02:27,417 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:27,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:27,418 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:27,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:27,418 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:27,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:27,605 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 286 proven. 165 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:27,606 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:27,606 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:27,614 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:27,614 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:27,633 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:27,633 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:27,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:27,647 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 286 proven. 165 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:27,647 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:27,866 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 286 proven. 165 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:27,887 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:27,887 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:27,903 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:27,903 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:27,943 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:27,944 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:27,948 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:27,962 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 286 proven. 165 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:27,963 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:28,011 INFO L134 CoverageAnalysis]: Checked inductivity of 551 backedges. 286 proven. 165 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:28,013 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:28,013 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 24 [2018-09-18 10:02:28,013 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:28,014 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-18 10:02:28,014 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-18 10:02:28,016 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-09-18 10:02:28,016 INFO L87 Difference]: Start difference. First operand 69 states and 78 transitions. Second operand 13 states. [2018-09-18 10:02:28,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:28,097 INFO L93 Difference]: Finished difference Result 106 states and 125 transitions. [2018-09-18 10:02:28,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-18 10:02:28,098 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 68 [2018-09-18 10:02:28,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:28,099 INFO L225 Difference]: With dead ends: 106 [2018-09-18 10:02:28,099 INFO L226 Difference]: Without dead ends: 72 [2018-09-18 10:02:28,100 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 283 GetRequests, 261 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-09-18 10:02:28,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-09-18 10:02:28,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2018-09-18 10:02:28,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-09-18 10:02:28,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 81 transitions. [2018-09-18 10:02:28,107 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 81 transitions. Word has length 68 [2018-09-18 10:02:28,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:28,108 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 81 transitions. [2018-09-18 10:02:28,108 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-18 10:02:28,108 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 81 transitions. [2018-09-18 10:02:28,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-09-18 10:02:28,109 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:28,110 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 11, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:28,110 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:28,110 INFO L82 PathProgramCache]: Analyzing trace with hash 1933633409, now seen corresponding path program 11 times [2018-09-18 10:02:28,110 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:28,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:28,111 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:28,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:28,112 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:28,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:28,275 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 312 proven. 198 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:28,276 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:28,276 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:28,286 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:28,286 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:28,349 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 21 check-sat command(s) [2018-09-18 10:02:28,349 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:28,351 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:28,364 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 312 proven. 198 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:28,364 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:28,625 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 312 proven. 198 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:28,645 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:28,645 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:28,659 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:28,660 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:28,824 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 21 check-sat command(s) [2018-09-18 10:02:28,824 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:28,827 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:28,837 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 312 proven. 198 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:28,837 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:28,863 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 312 proven. 198 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:28,864 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:28,864 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-09-18 10:02:28,864 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:28,865 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-18 10:02:28,865 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-18 10:02:28,866 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:02:28,866 INFO L87 Difference]: Start difference. First operand 72 states and 81 transitions. Second operand 14 states. [2018-09-18 10:02:28,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:28,937 INFO L93 Difference]: Finished difference Result 109 states and 128 transitions. [2018-09-18 10:02:28,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-18 10:02:28,938 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 71 [2018-09-18 10:02:28,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:28,939 INFO L225 Difference]: With dead ends: 109 [2018-09-18 10:02:28,939 INFO L226 Difference]: Without dead ends: 75 [2018-09-18 10:02:28,941 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 296 GetRequests, 272 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:02:28,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-09-18 10:02:28,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2018-09-18 10:02:28,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-09-18 10:02:28,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 84 transitions. [2018-09-18 10:02:28,948 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 84 transitions. Word has length 71 [2018-09-18 10:02:28,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:28,949 INFO L480 AbstractCegarLoop]: Abstraction has 75 states and 84 transitions. [2018-09-18 10:02:28,949 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-18 10:02:28,949 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 84 transitions. [2018-09-18 10:02:28,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-09-18 10:02:28,950 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:28,950 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 12, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:28,950 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:28,951 INFO L82 PathProgramCache]: Analyzing trace with hash -1586817668, now seen corresponding path program 12 times [2018-09-18 10:02:28,951 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:28,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:28,952 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:28,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:28,952 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:28,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:29,183 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 338 proven. 234 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:29,184 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:29,184 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:29,192 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:29,192 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:29,223 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 20 check-sat command(s) [2018-09-18 10:02:29,224 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:29,226 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:29,234 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 338 proven. 234 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:29,234 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:29,506 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 338 proven. 234 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:29,527 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:29,527 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:29,543 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:29,543 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:29,688 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 20 check-sat command(s) [2018-09-18 10:02:29,688 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:29,692 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:29,702 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 338 proven. 234 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:29,702 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:29,721 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 338 proven. 234 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:29,722 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:29,723 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-09-18 10:02:29,723 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:29,723 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-18 10:02:29,723 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-18 10:02:29,724 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-09-18 10:02:29,724 INFO L87 Difference]: Start difference. First operand 75 states and 84 transitions. Second operand 15 states. [2018-09-18 10:02:29,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:29,787 INFO L93 Difference]: Finished difference Result 112 states and 131 transitions. [2018-09-18 10:02:29,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-18 10:02:29,787 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 74 [2018-09-18 10:02:29,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:29,788 INFO L225 Difference]: With dead ends: 112 [2018-09-18 10:02:29,788 INFO L226 Difference]: Without dead ends: 78 [2018-09-18 10:02:29,789 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 309 GetRequests, 283 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-09-18 10:02:29,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-09-18 10:02:29,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-09-18 10:02:29,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-09-18 10:02:29,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 87 transitions. [2018-09-18 10:02:29,795 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 87 transitions. Word has length 74 [2018-09-18 10:02:29,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:29,795 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 87 transitions. [2018-09-18 10:02:29,795 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-18 10:02:29,795 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 87 transitions. [2018-09-18 10:02:29,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-09-18 10:02:29,796 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:29,797 INFO L376 BasicCegarLoop]: trace histogram [23, 22, 13, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:29,797 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:29,797 INFO L82 PathProgramCache]: Analyzing trace with hash -538451551, now seen corresponding path program 13 times [2018-09-18 10:02:29,797 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:29,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:29,798 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:29,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:29,798 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:29,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:29,992 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 364 proven. 273 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:29,993 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:29,993 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:30,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:30,003 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:30,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:30,021 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:30,034 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 364 proven. 273 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:30,034 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:30,326 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 364 proven. 273 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:30,346 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:30,347 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:30,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:30,363 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:30,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:30,406 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:30,416 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 364 proven. 273 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:30,416 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:30,462 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 364 proven. 273 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:30,463 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:30,464 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-09-18 10:02:30,464 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:30,464 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-18 10:02:30,464 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-18 10:02:30,465 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-09-18 10:02:30,465 INFO L87 Difference]: Start difference. First operand 78 states and 87 transitions. Second operand 16 states. [2018-09-18 10:02:30,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:30,550 INFO L93 Difference]: Finished difference Result 115 states and 134 transitions. [2018-09-18 10:02:30,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-18 10:02:30,551 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 77 [2018-09-18 10:02:30,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:30,552 INFO L225 Difference]: With dead ends: 115 [2018-09-18 10:02:30,552 INFO L226 Difference]: Without dead ends: 81 [2018-09-18 10:02:30,553 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 322 GetRequests, 294 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-09-18 10:02:30,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-09-18 10:02:30,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 81. [2018-09-18 10:02:30,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-09-18 10:02:30,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 90 transitions. [2018-09-18 10:02:30,558 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 90 transitions. Word has length 77 [2018-09-18 10:02:30,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:30,559 INFO L480 AbstractCegarLoop]: Abstraction has 81 states and 90 transitions. [2018-09-18 10:02:30,559 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-18 10:02:30,559 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 90 transitions. [2018-09-18 10:02:30,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-09-18 10:02:30,560 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:30,560 INFO L376 BasicCegarLoop]: trace histogram [24, 23, 14, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:30,560 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:30,560 INFO L82 PathProgramCache]: Analyzing trace with hash -1665636516, now seen corresponding path program 14 times [2018-09-18 10:02:30,561 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:30,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:30,561 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:30,562 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:30,562 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:30,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:30,736 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 390 proven. 315 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:30,736 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:30,736 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:30,745 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:30,745 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:30,765 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:30,765 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:30,768 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:30,779 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 390 proven. 315 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:30,779 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:31,272 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 390 proven. 315 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:31,295 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:31,296 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:31,312 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:31,312 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:31,358 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:31,358 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:31,362 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:31,375 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 390 proven. 315 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:31,375 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:31,398 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 390 proven. 315 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:31,399 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:31,400 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-09-18 10:02:31,400 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:31,400 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-18 10:02:31,400 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-18 10:02:31,401 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:02:31,401 INFO L87 Difference]: Start difference. First operand 81 states and 90 transitions. Second operand 17 states. [2018-09-18 10:02:31,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:31,479 INFO L93 Difference]: Finished difference Result 118 states and 137 transitions. [2018-09-18 10:02:31,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-18 10:02:31,481 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 80 [2018-09-18 10:02:31,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:31,482 INFO L225 Difference]: With dead ends: 118 [2018-09-18 10:02:31,482 INFO L226 Difference]: Without dead ends: 84 [2018-09-18 10:02:31,483 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 335 GetRequests, 305 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:02:31,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-09-18 10:02:31,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84. [2018-09-18 10:02:31,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-09-18 10:02:31,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 93 transitions. [2018-09-18 10:02:31,497 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 93 transitions. Word has length 80 [2018-09-18 10:02:31,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:31,497 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 93 transitions. [2018-09-18 10:02:31,497 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-18 10:02:31,497 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 93 transitions. [2018-09-18 10:02:31,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-09-18 10:02:31,499 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:31,500 INFO L376 BasicCegarLoop]: trace histogram [25, 24, 15, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:31,500 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:31,500 INFO L82 PathProgramCache]: Analyzing trace with hash 716358593, now seen corresponding path program 15 times [2018-09-18 10:02:31,500 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:31,506 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:31,506 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:31,506 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:31,507 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:31,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:31,782 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 416 proven. 360 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-09-18 10:02:31,782 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:31,782 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:31,792 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:31,792 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:31,816 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2018-09-18 10:02:31,816 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:31,818 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:32,338 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 435 proven. 126 refuted. 0 times theorem prover too weak. 315 trivial. 0 not checked. [2018-09-18 10:02:32,338 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:32,879 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 435 proven. 126 refuted. 0 times theorem prover too weak. 315 trivial. 0 not checked. [2018-09-18 10:02:32,899 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:32,899 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:32,914 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:32,914 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:33,012 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2018-09-18 10:02:33,012 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:33,015 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:33,026 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 435 proven. 126 refuted. 0 times theorem prover too weak. 315 trivial. 0 not checked. [2018-09-18 10:02:33,026 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:33,090 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 435 proven. 126 refuted. 0 times theorem prover too weak. 315 trivial. 0 not checked. [2018-09-18 10:02:33,092 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:33,092 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 12, 12, 12, 12] total 38 [2018-09-18 10:02:33,092 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:33,093 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-09-18 10:02:33,093 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-09-18 10:02:33,094 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:02:33,094 INFO L87 Difference]: Start difference. First operand 84 states and 93 transitions. Second operand 28 states. [2018-09-18 10:02:33,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:33,382 INFO L93 Difference]: Finished difference Result 125 states and 147 transitions. [2018-09-18 10:02:33,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-18 10:02:33,383 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 83 [2018-09-18 10:02:33,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:33,384 INFO L225 Difference]: With dead ends: 125 [2018-09-18 10:02:33,384 INFO L226 Difference]: Without dead ends: 91 [2018-09-18 10:02:33,386 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 348 GetRequests, 312 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:02:33,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-09-18 10:02:33,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 90. [2018-09-18 10:02:33,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-09-18 10:02:33,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 100 transitions. [2018-09-18 10:02:33,391 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 100 transitions. Word has length 83 [2018-09-18 10:02:33,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:33,391 INFO L480 AbstractCegarLoop]: Abstraction has 90 states and 100 transitions. [2018-09-18 10:02:33,391 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-09-18 10:02:33,391 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 100 transitions. [2018-09-18 10:02:33,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-18 10:02:33,392 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:33,392 INFO L376 BasicCegarLoop]: trace histogram [27, 26, 16, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:33,393 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:33,393 INFO L82 PathProgramCache]: Analyzing trace with hash 223548959, now seen corresponding path program 16 times [2018-09-18 10:02:33,393 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:33,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:33,394 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:33,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:33,394 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:33,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:34,186 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 493 proven. 408 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:34,186 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:34,187 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:34,194 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:34,194 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:34,217 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:34,218 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:34,220 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:34,233 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 493 proven. 408 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:34,234 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:35,184 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 493 proven. 408 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:35,205 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:35,205 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:35,220 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:35,220 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:35,268 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:35,269 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:35,272 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:35,285 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 493 proven. 408 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:35,285 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:35,337 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 493 proven. 408 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:35,339 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:35,339 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 36 [2018-09-18 10:02:35,339 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:35,339 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-18 10:02:35,339 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-18 10:02:35,340 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-09-18 10:02:35,340 INFO L87 Difference]: Start difference. First operand 90 states and 100 transitions. Second operand 19 states. [2018-09-18 10:02:35,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:35,402 INFO L93 Difference]: Finished difference Result 130 states and 151 transitions. [2018-09-18 10:02:35,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-18 10:02:35,403 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 89 [2018-09-18 10:02:35,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:35,404 INFO L225 Difference]: With dead ends: 130 [2018-09-18 10:02:35,404 INFO L226 Difference]: Without dead ends: 93 [2018-09-18 10:02:35,406 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 373 GetRequests, 339 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-09-18 10:02:35,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-09-18 10:02:35,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2018-09-18 10:02:35,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-09-18 10:02:35,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 103 transitions. [2018-09-18 10:02:35,409 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 103 transitions. Word has length 89 [2018-09-18 10:02:35,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:35,410 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 103 transitions. [2018-09-18 10:02:35,410 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-18 10:02:35,410 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 103 transitions. [2018-09-18 10:02:35,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-09-18 10:02:35,411 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:35,411 INFO L376 BasicCegarLoop]: trace histogram [28, 27, 17, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:35,411 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:35,411 INFO L82 PathProgramCache]: Analyzing trace with hash 1580850010, now seen corresponding path program 17 times [2018-09-18 10:02:35,411 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:35,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:35,412 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:35,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:35,412 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:35,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:35,621 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 522 proven. 459 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:35,622 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:35,622 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:35,629 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:35,629 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:35,669 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 28 check-sat command(s) [2018-09-18 10:02:35,670 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:35,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:35,684 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 522 proven. 459 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:35,685 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:36,082 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 522 proven. 459 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:36,102 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:36,102 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:36,120 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:36,120 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:36,311 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 28 check-sat command(s) [2018-09-18 10:02:36,311 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:36,315 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:36,327 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 522 proven. 459 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:36,328 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:36,346 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 522 proven. 459 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:36,347 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:36,347 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 38 [2018-09-18 10:02:36,347 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:36,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-18 10:02:36,348 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-18 10:02:36,348 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:02:36,348 INFO L87 Difference]: Start difference. First operand 93 states and 103 transitions. Second operand 20 states. [2018-09-18 10:02:36,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:36,438 INFO L93 Difference]: Finished difference Result 133 states and 154 transitions. [2018-09-18 10:02:36,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-18 10:02:36,439 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 92 [2018-09-18 10:02:36,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:36,440 INFO L225 Difference]: With dead ends: 133 [2018-09-18 10:02:36,440 INFO L226 Difference]: Without dead ends: 96 [2018-09-18 10:02:36,441 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 386 GetRequests, 350 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:02:36,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-09-18 10:02:36,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 96. [2018-09-18 10:02:36,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-09-18 10:02:36,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 106 transitions. [2018-09-18 10:02:36,446 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 106 transitions. Word has length 92 [2018-09-18 10:02:36,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:36,446 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 106 transitions. [2018-09-18 10:02:36,446 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-18 10:02:36,446 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 106 transitions. [2018-09-18 10:02:36,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-09-18 10:02:36,447 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:36,447 INFO L376 BasicCegarLoop]: trace histogram [29, 28, 18, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:36,447 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:36,448 INFO L82 PathProgramCache]: Analyzing trace with hash -180631489, now seen corresponding path program 18 times [2018-09-18 10:02:36,448 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:36,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:36,449 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:36,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:36,449 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:36,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:36,894 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 551 proven. 513 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:36,895 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:36,895 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:36,903 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:36,904 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:36,943 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 29 check-sat command(s) [2018-09-18 10:02:36,943 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:36,946 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:36,956 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 551 proven. 513 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:36,956 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:37,854 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 551 proven. 513 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:37,873 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:37,874 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:37,889 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:37,889 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:38,116 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 29 check-sat command(s) [2018-09-18 10:02:38,116 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:38,120 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:38,136 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 551 proven. 513 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:38,136 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:38,155 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 551 proven. 513 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:38,156 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:38,156 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 40 [2018-09-18 10:02:38,156 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:38,157 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-18 10:02:38,157 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-18 10:02:38,158 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-09-18 10:02:38,158 INFO L87 Difference]: Start difference. First operand 96 states and 106 transitions. Second operand 21 states. [2018-09-18 10:02:38,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:38,287 INFO L93 Difference]: Finished difference Result 136 states and 157 transitions. [2018-09-18 10:02:38,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-18 10:02:38,289 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 95 [2018-09-18 10:02:38,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:38,290 INFO L225 Difference]: With dead ends: 136 [2018-09-18 10:02:38,290 INFO L226 Difference]: Without dead ends: 99 [2018-09-18 10:02:38,291 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 399 GetRequests, 361 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-09-18 10:02:38,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-09-18 10:02:38,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-09-18 10:02:38,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-09-18 10:02:38,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 109 transitions. [2018-09-18 10:02:38,296 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 109 transitions. Word has length 95 [2018-09-18 10:02:38,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:38,296 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 109 transitions. [2018-09-18 10:02:38,296 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-18 10:02:38,296 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 109 transitions. [2018-09-18 10:02:38,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-09-18 10:02:38,297 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:38,297 INFO L376 BasicCegarLoop]: trace histogram [30, 29, 19, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:38,297 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:38,297 INFO L82 PathProgramCache]: Analyzing trace with hash -565545670, now seen corresponding path program 19 times [2018-09-18 10:02:38,297 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:38,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:38,298 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:38,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:38,298 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:38,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:38,829 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 580 proven. 570 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:38,829 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:38,829 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:38,837 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:38,837 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:38,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:38,860 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:38,873 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 580 proven. 570 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:38,873 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:39,338 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 580 proven. 570 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:39,357 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:39,357 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:39,372 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:39,372 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:39,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:39,422 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:39,435 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 580 proven. 570 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:39,435 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:39,453 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 580 proven. 570 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:39,455 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:39,455 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 42 [2018-09-18 10:02:39,455 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:39,455 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-18 10:02:39,456 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-18 10:02:39,456 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-09-18 10:02:39,457 INFO L87 Difference]: Start difference. First operand 99 states and 109 transitions. Second operand 22 states. [2018-09-18 10:02:39,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:39,541 INFO L93 Difference]: Finished difference Result 139 states and 160 transitions. [2018-09-18 10:02:39,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-18 10:02:39,543 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 98 [2018-09-18 10:02:39,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:39,543 INFO L225 Difference]: With dead ends: 139 [2018-09-18 10:02:39,543 INFO L226 Difference]: Without dead ends: 102 [2018-09-18 10:02:39,544 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 412 GetRequests, 372 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-09-18 10:02:39,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-09-18 10:02:39,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2018-09-18 10:02:39,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-09-18 10:02:39,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 112 transitions. [2018-09-18 10:02:39,549 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 112 transitions. Word has length 98 [2018-09-18 10:02:39,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:39,549 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 112 transitions. [2018-09-18 10:02:39,549 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-18 10:02:39,549 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 112 transitions. [2018-09-18 10:02:39,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-09-18 10:02:39,550 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:39,550 INFO L376 BasicCegarLoop]: trace histogram [31, 30, 20, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:39,550 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:39,550 INFO L82 PathProgramCache]: Analyzing trace with hash 18768479, now seen corresponding path program 20 times [2018-09-18 10:02:39,551 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:39,551 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:39,551 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:39,551 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:39,552 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:39,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:39,789 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 609 proven. 630 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:39,790 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:39,790 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:39,798 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:39,798 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:39,819 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:39,819 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:39,821 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:39,836 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 609 proven. 630 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:39,836 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:40,394 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 609 proven. 630 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:40,414 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:40,414 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:40,431 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:40,431 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:40,483 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:40,483 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:40,487 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:40,501 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 609 proven. 630 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:40,501 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:40,539 INFO L134 CoverageAnalysis]: Checked inductivity of 1365 backedges. 609 proven. 630 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:40,540 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:40,541 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 44 [2018-09-18 10:02:40,541 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:40,541 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-09-18 10:02:40,541 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-09-18 10:02:40,542 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-09-18 10:02:40,542 INFO L87 Difference]: Start difference. First operand 102 states and 112 transitions. Second operand 23 states. [2018-09-18 10:02:40,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:40,636 INFO L93 Difference]: Finished difference Result 142 states and 163 transitions. [2018-09-18 10:02:40,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-18 10:02:40,636 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 101 [2018-09-18 10:02:40,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:40,637 INFO L225 Difference]: With dead ends: 142 [2018-09-18 10:02:40,637 INFO L226 Difference]: Without dead ends: 105 [2018-09-18 10:02:40,638 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 425 GetRequests, 383 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-09-18 10:02:40,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-09-18 10:02:40,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-09-18 10:02:40,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-09-18 10:02:40,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 115 transitions. [2018-09-18 10:02:40,642 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 115 transitions. Word has length 101 [2018-09-18 10:02:40,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:40,643 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 115 transitions. [2018-09-18 10:02:40,643 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-09-18 10:02:40,643 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 115 transitions. [2018-09-18 10:02:40,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-09-18 10:02:40,644 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:40,644 INFO L376 BasicCegarLoop]: trace histogram [32, 31, 21, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:40,644 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:40,644 INFO L82 PathProgramCache]: Analyzing trace with hash -180869350, now seen corresponding path program 21 times [2018-09-18 10:02:40,644 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:40,645 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:40,645 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:40,645 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:40,645 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:40,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:40,938 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 638 proven. 693 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-09-18 10:02:40,938 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:40,938 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:40,947 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:40,947 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:40,974 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 17 check-sat command(s) [2018-09-18 10:02:40,974 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:40,977 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:41,218 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 672 proven. 155 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-18 10:02:41,218 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:41,598 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 672 proven. 155 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-18 10:02:41,629 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:41,629 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:41,648 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:41,648 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:41,755 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 17 check-sat command(s) [2018-09-18 10:02:41,755 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:41,758 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:41,769 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 672 proven. 155 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-18 10:02:41,769 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:41,825 INFO L134 CoverageAnalysis]: Checked inductivity of 1457 backedges. 672 proven. 155 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-09-18 10:02:41,828 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:41,829 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 13, 13, 13, 13] total 46 [2018-09-18 10:02:41,829 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:41,829 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-09-18 10:02:41,830 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-09-18 10:02:41,830 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-09-18 10:02:41,831 INFO L87 Difference]: Start difference. First operand 105 states and 115 transitions. Second operand 35 states. [2018-09-18 10:02:42,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:42,111 INFO L93 Difference]: Finished difference Result 149 states and 173 transitions. [2018-09-18 10:02:42,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-09-18 10:02:42,111 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 104 [2018-09-18 10:02:42,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:42,113 INFO L225 Difference]: With dead ends: 149 [2018-09-18 10:02:42,113 INFO L226 Difference]: Without dead ends: 112 [2018-09-18 10:02:42,114 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 438 GetRequests, 394 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-09-18 10:02:42,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-09-18 10:02:42,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 111. [2018-09-18 10:02:42,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-09-18 10:02:42,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 122 transitions. [2018-09-18 10:02:42,119 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 122 transitions. Word has length 104 [2018-09-18 10:02:42,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:42,119 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 122 transitions. [2018-09-18 10:02:42,119 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-09-18 10:02:42,120 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 122 transitions. [2018-09-18 10:02:42,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-09-18 10:02:42,120 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:42,120 INFO L376 BasicCegarLoop]: trace histogram [34, 33, 22, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:42,121 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:42,121 INFO L82 PathProgramCache]: Analyzing trace with hash 102799356, now seen corresponding path program 22 times [2018-09-18 10:02:42,121 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:42,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:42,122 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:42,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:42,122 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:42,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:42,461 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 736 proven. 759 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:42,462 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:42,462 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:42,469 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:42,469 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:42,495 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:42,495 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:42,497 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:42,526 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 736 proven. 759 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:42,526 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:43,259 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 736 proven. 759 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:43,279 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:43,279 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:43,294 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:43,294 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:43,348 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:43,349 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:43,353 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:43,368 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 736 proven. 759 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:43,369 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:43,394 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 736 proven. 759 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:43,395 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:43,396 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 48 [2018-09-18 10:02:43,396 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:43,396 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-18 10:02:43,396 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-18 10:02:43,397 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-09-18 10:02:43,397 INFO L87 Difference]: Start difference. First operand 111 states and 122 transitions. Second operand 25 states. [2018-09-18 10:02:43,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:43,524 INFO L93 Difference]: Finished difference Result 154 states and 177 transitions. [2018-09-18 10:02:43,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-18 10:02:43,525 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 110 [2018-09-18 10:02:43,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:43,526 INFO L225 Difference]: With dead ends: 154 [2018-09-18 10:02:43,526 INFO L226 Difference]: Without dead ends: 114 [2018-09-18 10:02:43,528 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 463 GetRequests, 417 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-09-18 10:02:43,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-09-18 10:02:43,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-09-18 10:02:43,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-09-18 10:02:43,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 125 transitions. [2018-09-18 10:02:43,532 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 125 transitions. Word has length 110 [2018-09-18 10:02:43,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:43,532 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 125 transitions. [2018-09-18 10:02:43,532 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-18 10:02:43,532 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 125 transitions. [2018-09-18 10:02:43,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-09-18 10:02:43,533 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:43,533 INFO L376 BasicCegarLoop]: trace histogram [35, 34, 23, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:43,533 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:43,534 INFO L82 PathProgramCache]: Analyzing trace with hash 1248392609, now seen corresponding path program 23 times [2018-09-18 10:02:43,534 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:43,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:43,534 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:43,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:43,535 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:43,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:43,928 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 768 proven. 828 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:43,928 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:43,929 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:43,938 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:43,939 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:43,993 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 35 check-sat command(s) [2018-09-18 10:02:43,993 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:43,995 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:44,013 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 768 proven. 828 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:44,013 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:44,724 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 768 proven. 828 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:44,744 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:44,744 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:44,762 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:44,762 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:45,015 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 35 check-sat command(s) [2018-09-18 10:02:45,016 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:45,020 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:45,037 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 768 proven. 828 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:45,037 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:45,096 INFO L134 CoverageAnalysis]: Checked inductivity of 1751 backedges. 768 proven. 828 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:45,099 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:45,100 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 50 [2018-09-18 10:02:45,100 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:45,100 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-18 10:02:45,101 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-18 10:02:45,104 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-09-18 10:02:45,104 INFO L87 Difference]: Start difference. First operand 114 states and 125 transitions. Second operand 26 states. [2018-09-18 10:02:46,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:46,279 INFO L93 Difference]: Finished difference Result 157 states and 180 transitions. [2018-09-18 10:02:46,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-09-18 10:02:46,279 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 113 [2018-09-18 10:02:46,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:46,280 INFO L225 Difference]: With dead ends: 157 [2018-09-18 10:02:46,280 INFO L226 Difference]: Without dead ends: 117 [2018-09-18 10:02:46,281 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 476 GetRequests, 428 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-09-18 10:02:46,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-09-18 10:02:46,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-09-18 10:02:46,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-09-18 10:02:46,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 128 transitions. [2018-09-18 10:02:46,285 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 128 transitions. Word has length 113 [2018-09-18 10:02:46,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:46,285 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 128 transitions. [2018-09-18 10:02:46,285 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-18 10:02:46,285 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 128 transitions. [2018-09-18 10:02:46,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-09-18 10:02:46,286 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:46,286 INFO L376 BasicCegarLoop]: trace histogram [36, 35, 24, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:46,286 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:46,286 INFO L82 PathProgramCache]: Analyzing trace with hash 1806858716, now seen corresponding path program 24 times [2018-09-18 10:02:46,286 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:46,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:46,287 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:46,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:46,287 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:46,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:46,621 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 800 proven. 900 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2018-09-18 10:02:46,621 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:46,621 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:46,630 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:46,631 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:46,688 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 35 check-sat command(s) [2018-09-18 10:02:46,688 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:46,692 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:47,349 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 852 proven. 805 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-09-18 10:02:47,349 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:48,915 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 852 proven. 805 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-09-18 10:02:48,936 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:48,936 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 50 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:48,951 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:48,952 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:49,349 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 35 check-sat command(s) [2018-09-18 10:02:49,349 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:49,353 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:49,366 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 884 proven. 737 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-09-18 10:02:49,366 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:49,433 INFO L134 CoverageAnalysis]: Checked inductivity of 1855 backedges. 884 proven. 737 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-09-18 10:02:49,435 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:49,435 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 26, 26, 25, 25] total 75 [2018-09-18 10:02:49,435 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:49,436 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-09-18 10:02:49,437 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-09-18 10:02:49,438 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=2775, Invalid=2775, Unknown=0, NotChecked=0, Total=5550 [2018-09-18 10:02:49,439 INFO L87 Difference]: Start difference. First operand 117 states and 128 transitions. Second operand 51 states. [2018-09-18 10:02:49,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:49,809 INFO L93 Difference]: Finished difference Result 200 states and 250 transitions. [2018-09-18 10:02:49,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-09-18 10:02:49,809 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 116 [2018-09-18 10:02:49,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:49,811 INFO L225 Difference]: With dead ends: 200 [2018-09-18 10:02:49,811 INFO L226 Difference]: Without dead ends: 160 [2018-09-18 10:02:49,813 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 489 GetRequests, 416 SyntacticMatches, 0 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=2775, Invalid=2775, Unknown=0, NotChecked=0, Total=5550 [2018-09-18 10:02:49,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-09-18 10:02:49,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 159. [2018-09-18 10:02:49,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-09-18 10:02:49,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 183 transitions. [2018-09-18 10:02:49,818 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 183 transitions. Word has length 116 [2018-09-18 10:02:49,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:49,819 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 183 transitions. [2018-09-18 10:02:49,819 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-09-18 10:02:49,819 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 183 transitions. [2018-09-18 10:02:49,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2018-09-18 10:02:49,820 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:49,820 INFO L376 BasicCegarLoop]: trace histogram [50, 49, 25, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:49,820 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:49,821 INFO L82 PathProgramCache]: Analyzing trace with hash -1028485830, now seen corresponding path program 25 times [2018-09-18 10:02:49,821 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:49,821 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:49,821 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:49,822 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:49,822 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:49,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:50,167 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 1846 proven. 975 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:50,167 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:50,167 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:50,175 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:50,176 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:50,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:50,215 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:50,236 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 1846 proven. 975 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:50,237 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:51,287 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 1846 proven. 975 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:51,307 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:51,308 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 52 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:51,324 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:51,324 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:51,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:51,410 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:51,431 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 1846 proven. 975 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:51,432 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:51,512 INFO L134 CoverageAnalysis]: Checked inductivity of 3626 backedges. 1846 proven. 975 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:51,514 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:51,514 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 52 [2018-09-18 10:02:51,514 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:51,514 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-09-18 10:02:51,515 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-09-18 10:02:51,515 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:02:51,516 INFO L87 Difference]: Start difference. First operand 159 states and 183 transitions. Second operand 28 states. [2018-09-18 10:02:51,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:51,649 INFO L93 Difference]: Finished difference Result 241 states and 290 transitions. [2018-09-18 10:02:51,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-09-18 10:02:51,649 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 158 [2018-09-18 10:02:51,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:51,650 INFO L225 Difference]: With dead ends: 241 [2018-09-18 10:02:51,650 INFO L226 Difference]: Without dead ends: 162 [2018-09-18 10:02:51,652 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 658 GetRequests, 604 SyntacticMatches, 4 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:02:51,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-09-18 10:02:51,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2018-09-18 10:02:51,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-09-18 10:02:51,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 186 transitions. [2018-09-18 10:02:51,658 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 186 transitions. Word has length 158 [2018-09-18 10:02:51,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:51,658 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 186 transitions. [2018-09-18 10:02:51,658 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-09-18 10:02:51,658 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 186 transitions. [2018-09-18 10:02:51,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2018-09-18 10:02:51,659 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:51,659 INFO L376 BasicCegarLoop]: trace histogram [51, 50, 26, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:51,660 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:51,660 INFO L82 PathProgramCache]: Analyzing trace with hash 127741151, now seen corresponding path program 26 times [2018-09-18 10:02:51,660 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:51,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:51,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:51,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:51,661 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:51,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:52,487 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 1917 proven. 1053 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:52,487 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:52,487 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:52,495 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:52,496 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:52,541 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:52,541 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:52,543 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:52,568 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 1917 proven. 1053 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:52,569 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:53,589 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 1917 proven. 1053 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:53,609 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:53,609 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 54 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:53,634 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:53,634 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:53,720 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:53,720 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:53,725 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:53,751 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 1917 proven. 1053 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:53,751 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:54,015 INFO L134 CoverageAnalysis]: Checked inductivity of 3775 backedges. 1917 proven. 1053 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:54,017 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:54,017 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 52 [2018-09-18 10:02:54,017 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:54,017 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-09-18 10:02:54,018 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-09-18 10:02:54,019 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:02:54,019 INFO L87 Difference]: Start difference. First operand 162 states and 186 transitions. Second operand 29 states. [2018-09-18 10:02:54,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:54,142 INFO L93 Difference]: Finished difference Result 244 states and 293 transitions. [2018-09-18 10:02:54,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-18 10:02:54,142 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 161 [2018-09-18 10:02:54,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:54,143 INFO L225 Difference]: With dead ends: 244 [2018-09-18 10:02:54,143 INFO L226 Difference]: Without dead ends: 165 [2018-09-18 10:02:54,144 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 671 GetRequests, 613 SyntacticMatches, 8 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:02:54,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-09-18 10:02:54,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-09-18 10:02:54,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-09-18 10:02:54,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 189 transitions. [2018-09-18 10:02:54,149 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 189 transitions. Word has length 161 [2018-09-18 10:02:54,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:54,150 INFO L480 AbstractCegarLoop]: Abstraction has 165 states and 189 transitions. [2018-09-18 10:02:54,150 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-09-18 10:02:54,150 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 189 transitions. [2018-09-18 10:02:54,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-09-18 10:02:54,151 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:54,151 INFO L376 BasicCegarLoop]: trace histogram [52, 51, 27, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:54,151 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:54,152 INFO L82 PathProgramCache]: Analyzing trace with hash -351981798, now seen corresponding path program 27 times [2018-09-18 10:02:54,152 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:54,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:54,152 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:54,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:54,153 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:54,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:54,629 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 1988 proven. 1134 refuted. 0 times theorem prover too weak. 805 trivial. 0 not checked. [2018-09-18 10:02:54,629 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:54,629 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:54,636 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:54,637 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:54,699 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 38 check-sat command(s) [2018-09-18 10:02:54,699 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:54,703 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:55,525 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 1998 proven. 876 refuted. 0 times theorem prover too weak. 1053 trivial. 0 not checked. [2018-09-18 10:02:55,525 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:56,669 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 1998 proven. 876 refuted. 0 times theorem prover too weak. 1053 trivial. 0 not checked. [2018-09-18 10:02:56,690 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:56,690 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 56 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:56,705 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:56,706 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:57,095 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 38 check-sat command(s) [2018-09-18 10:02:57,095 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:57,100 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:57,125 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 1998 proven. 876 refuted. 0 times theorem prover too weak. 1053 trivial. 0 not checked. [2018-09-18 10:02:57,125 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:57,202 INFO L134 CoverageAnalysis]: Checked inductivity of 3927 backedges. 1998 proven. 876 refuted. 0 times theorem prover too weak. 1053 trivial. 0 not checked. [2018-09-18 10:02:57,203 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:57,204 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 27, 27, 27, 27] total 80 [2018-09-18 10:02:57,204 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:57,205 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-09-18 10:02:57,205 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-09-18 10:02:57,206 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3160, Invalid=3160, Unknown=0, NotChecked=0, Total=6320 [2018-09-18 10:02:57,206 INFO L87 Difference]: Start difference. First operand 165 states and 189 transitions. Second operand 55 states. [2018-09-18 10:02:57,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:57,848 INFO L93 Difference]: Finished difference Result 251 states and 303 transitions. [2018-09-18 10:02:57,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-09-18 10:02:57,849 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 164 [2018-09-18 10:02:57,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:57,850 INFO L225 Difference]: With dead ends: 251 [2018-09-18 10:02:57,850 INFO L226 Difference]: Without dead ends: 172 [2018-09-18 10:02:57,852 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 684 GetRequests, 606 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=3160, Invalid=3160, Unknown=0, NotChecked=0, Total=6320 [2018-09-18 10:02:57,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-09-18 10:02:57,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 171. [2018-09-18 10:02:57,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-09-18 10:02:57,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 196 transitions. [2018-09-18 10:02:57,859 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 196 transitions. Word has length 164 [2018-09-18 10:02:57,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:57,859 INFO L480 AbstractCegarLoop]: Abstraction has 171 states and 196 transitions. [2018-09-18 10:02:57,859 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-09-18 10:02:57,859 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 196 transitions. [2018-09-18 10:02:57,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-09-18 10:02:57,860 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:57,861 INFO L376 BasicCegarLoop]: trace histogram [54, 53, 28, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:57,861 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:57,861 INFO L82 PathProgramCache]: Analyzing trace with hash 820030844, now seen corresponding path program 28 times [2018-09-18 10:02:57,861 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:57,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:57,862 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:57,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:57,862 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:57,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:59,250 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 2146 proven. 1218 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:02:59,251 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:59,251 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:59,259 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:59,259 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:59,298 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:59,298 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:59,301 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:59,336 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 2146 proven. 1218 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:02:59,336 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:00,244 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 2146 proven. 1218 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:00,264 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:00,264 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 58 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:00,279 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:00,279 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:00,369 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:00,369 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:00,374 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:00,403 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 2146 proven. 1218 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:00,403 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:00,681 INFO L134 CoverageAnalysis]: Checked inductivity of 4240 backedges. 2146 proven. 1218 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:00,682 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:00,682 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 52 [2018-09-18 10:03:00,682 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:00,683 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-18 10:03:00,683 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-18 10:03:00,683 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:00,683 INFO L87 Difference]: Start difference. First operand 171 states and 196 transitions. Second operand 31 states. [2018-09-18 10:03:00,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:00,788 INFO L93 Difference]: Finished difference Result 256 states and 307 transitions. [2018-09-18 10:03:00,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-09-18 10:03:00,788 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 170 [2018-09-18 10:03:00,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:00,790 INFO L225 Difference]: With dead ends: 256 [2018-09-18 10:03:00,790 INFO L226 Difference]: Without dead ends: 174 [2018-09-18 10:03:00,791 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 709 GetRequests, 643 SyntacticMatches, 16 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 392 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:00,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-09-18 10:03:00,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174. [2018-09-18 10:03:00,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-09-18 10:03:00,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 199 transitions. [2018-09-18 10:03:00,797 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 199 transitions. Word has length 170 [2018-09-18 10:03:00,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:00,797 INFO L480 AbstractCegarLoop]: Abstraction has 174 states and 199 transitions. [2018-09-18 10:03:00,797 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-18 10:03:00,797 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 199 transitions. [2018-09-18 10:03:00,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-09-18 10:03:00,798 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:00,798 INFO L376 BasicCegarLoop]: trace histogram [55, 54, 29, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:00,799 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:00,799 INFO L82 PathProgramCache]: Analyzing trace with hash -2109211231, now seen corresponding path program 29 times [2018-09-18 10:03:00,799 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:00,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:00,800 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:00,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:00,800 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:00,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:01,236 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 2220 proven. 1305 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:01,236 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:01,236 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:01,245 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:01,245 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:01,332 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 55 check-sat command(s) [2018-09-18 10:03:01,333 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:01,336 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:01,357 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 2220 proven. 1305 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:01,358 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:02,146 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 2220 proven. 1305 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:02,167 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:02,167 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 60 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:02,182 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:02,183 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:02,763 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 55 check-sat command(s) [2018-09-18 10:03:02,764 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:02,769 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:02,798 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 2220 proven. 1305 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:02,798 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:03,077 INFO L134 CoverageAnalysis]: Checked inductivity of 4401 backedges. 2220 proven. 1305 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:03,078 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:03,078 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 52 [2018-09-18 10:03:03,078 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:03,079 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-09-18 10:03:03,079 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-09-18 10:03:03,079 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:03,080 INFO L87 Difference]: Start difference. First operand 174 states and 199 transitions. Second operand 32 states. [2018-09-18 10:03:03,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:03,246 INFO L93 Difference]: Finished difference Result 259 states and 310 transitions. [2018-09-18 10:03:03,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-09-18 10:03:03,246 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 173 [2018-09-18 10:03:03,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:03,248 INFO L225 Difference]: With dead ends: 259 [2018-09-18 10:03:03,248 INFO L226 Difference]: Without dead ends: 177 [2018-09-18 10:03:03,249 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 722 GetRequests, 652 SyntacticMatches, 20 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 490 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:03,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-09-18 10:03:03,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2018-09-18 10:03:03,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-09-18 10:03:03,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 202 transitions. [2018-09-18 10:03:03,255 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 202 transitions. Word has length 173 [2018-09-18 10:03:03,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:03,256 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 202 transitions. [2018-09-18 10:03:03,256 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-09-18 10:03:03,256 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 202 transitions. [2018-09-18 10:03:03,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-09-18 10:03:03,257 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:03,257 INFO L376 BasicCegarLoop]: trace histogram [56, 55, 30, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:03,257 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:03,257 INFO L82 PathProgramCache]: Analyzing trace with hash -2014347428, now seen corresponding path program 30 times [2018-09-18 10:03:03,258 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:03,258 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:03,258 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:03,258 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:03,258 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:03,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:03,744 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 2294 proven. 1395 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:03,744 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:03,744 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:03,754 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:03,754 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:03,877 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 55 check-sat command(s) [2018-09-18 10:03:03,878 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:03,881 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:03,913 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 2294 proven. 1395 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:03,914 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:05,030 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 2294 proven. 1395 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:05,050 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:05,050 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 62 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:05,070 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:05,071 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:05,714 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 55 check-sat command(s) [2018-09-18 10:03:05,715 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:05,719 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:05,745 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 2294 proven. 1395 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:05,745 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:06,013 INFO L134 CoverageAnalysis]: Checked inductivity of 4565 backedges. 2294 proven. 1395 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:06,015 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:06,015 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 52 [2018-09-18 10:03:06,015 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:06,016 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-09-18 10:03:06,016 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-09-18 10:03:06,017 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:06,017 INFO L87 Difference]: Start difference. First operand 177 states and 202 transitions. Second operand 33 states. [2018-09-18 10:03:06,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:06,196 INFO L93 Difference]: Finished difference Result 262 states and 313 transitions. [2018-09-18 10:03:06,197 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-09-18 10:03:06,197 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 176 [2018-09-18 10:03:06,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:06,199 INFO L225 Difference]: With dead ends: 262 [2018-09-18 10:03:06,199 INFO L226 Difference]: Without dead ends: 180 [2018-09-18 10:03:06,200 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 735 GetRequests, 661 SyntacticMatches, 24 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 588 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:06,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-09-18 10:03:06,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2018-09-18 10:03:06,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-09-18 10:03:06,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 205 transitions. [2018-09-18 10:03:06,207 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 205 transitions. Word has length 176 [2018-09-18 10:03:06,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:06,207 INFO L480 AbstractCegarLoop]: Abstraction has 180 states and 205 transitions. [2018-09-18 10:03:06,207 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-09-18 10:03:06,207 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 205 transitions. [2018-09-18 10:03:06,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2018-09-18 10:03:06,208 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:06,209 INFO L376 BasicCegarLoop]: trace histogram [57, 56, 31, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:06,209 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:06,209 INFO L82 PathProgramCache]: Analyzing trace with hash -2015273023, now seen corresponding path program 31 times [2018-09-18 10:03:06,209 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:06,210 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:06,210 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:06,210 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:06,210 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:06,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:07,518 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 2368 proven. 1488 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:07,518 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:07,519 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:07,527 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:07,528 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:07,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:07,573 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:07,605 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 2368 proven. 1488 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:07,606 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:08,602 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 2368 proven. 1488 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:08,622 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:08,622 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 64 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:08,638 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:08,638 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:08,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:08,734 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:08,765 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 2368 proven. 1488 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:08,765 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:09,458 INFO L134 CoverageAnalysis]: Checked inductivity of 4732 backedges. 2368 proven. 1488 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:09,459 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:09,459 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 52 [2018-09-18 10:03:09,459 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:09,460 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-09-18 10:03:09,460 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-09-18 10:03:09,461 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:09,461 INFO L87 Difference]: Start difference. First operand 180 states and 205 transitions. Second operand 34 states. [2018-09-18 10:03:09,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:09,597 INFO L93 Difference]: Finished difference Result 265 states and 316 transitions. [2018-09-18 10:03:09,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-09-18 10:03:09,597 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 179 [2018-09-18 10:03:09,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:09,598 INFO L225 Difference]: With dead ends: 265 [2018-09-18 10:03:09,598 INFO L226 Difference]: Without dead ends: 183 [2018-09-18 10:03:09,599 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 748 GetRequests, 670 SyntacticMatches, 28 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 686 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:09,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-09-18 10:03:09,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 183. [2018-09-18 10:03:09,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-09-18 10:03:09,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 208 transitions. [2018-09-18 10:03:09,605 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 208 transitions. Word has length 179 [2018-09-18 10:03:09,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:09,605 INFO L480 AbstractCegarLoop]: Abstraction has 183 states and 208 transitions. [2018-09-18 10:03:09,605 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-09-18 10:03:09,605 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 208 transitions. [2018-09-18 10:03:09,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2018-09-18 10:03:09,606 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:09,607 INFO L376 BasicCegarLoop]: trace histogram [58, 57, 32, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:09,607 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:09,607 INFO L82 PathProgramCache]: Analyzing trace with hash 475097404, now seen corresponding path program 32 times [2018-09-18 10:03:09,607 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:09,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:09,608 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:09,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:09,608 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:09,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:10,196 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 2442 proven. 1584 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:10,197 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:10,197 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:10,204 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:10,204 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:10,245 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:10,245 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:10,247 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:10,294 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 2442 proven. 1584 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:10,294 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:11,537 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 2442 proven. 1584 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:11,558 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:11,558 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 66 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:11,573 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:11,573 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:11,666 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:11,666 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:11,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:11,705 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 2442 proven. 1584 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:11,705 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:12,126 INFO L134 CoverageAnalysis]: Checked inductivity of 4902 backedges. 2442 proven. 1584 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:12,127 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:12,128 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 52 [2018-09-18 10:03:12,128 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:12,128 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-09-18 10:03:12,128 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-09-18 10:03:12,129 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:12,129 INFO L87 Difference]: Start difference. First operand 183 states and 208 transitions. Second operand 35 states. [2018-09-18 10:03:12,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:12,258 INFO L93 Difference]: Finished difference Result 268 states and 319 transitions. [2018-09-18 10:03:12,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-09-18 10:03:12,258 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 182 [2018-09-18 10:03:12,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:12,260 INFO L225 Difference]: With dead ends: 268 [2018-09-18 10:03:12,260 INFO L226 Difference]: Without dead ends: 186 [2018-09-18 10:03:12,261 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 761 GetRequests, 679 SyntacticMatches, 32 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 784 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:12,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-09-18 10:03:12,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2018-09-18 10:03:12,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-09-18 10:03:12,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 211 transitions. [2018-09-18 10:03:12,266 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 211 transitions. Word has length 182 [2018-09-18 10:03:12,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:12,266 INFO L480 AbstractCegarLoop]: Abstraction has 186 states and 211 transitions. [2018-09-18 10:03:12,267 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-09-18 10:03:12,267 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 211 transitions. [2018-09-18 10:03:12,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-09-18 10:03:12,268 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:12,268 INFO L376 BasicCegarLoop]: trace histogram [59, 58, 33, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:12,268 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:12,268 INFO L82 PathProgramCache]: Analyzing trace with hash -164582943, now seen corresponding path program 33 times [2018-09-18 10:03:12,268 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:12,269 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:12,269 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:12,269 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:12,269 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:12,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:12,910 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 2516 proven. 1683 refuted. 0 times theorem prover too weak. 876 trivial. 0 not checked. [2018-09-18 10:03:12,910 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:12,911 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:12,918 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:12,918 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:12,981 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 39 check-sat command(s) [2018-09-18 10:03:12,982 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:12,985 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:13,882 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 2541 proven. 950 refuted. 0 times theorem prover too weak. 1584 trivial. 0 not checked. [2018-09-18 10:03:13,882 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:15,500 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 2541 proven. 950 refuted. 0 times theorem prover too weak. 1584 trivial. 0 not checked. [2018-09-18 10:03:15,520 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:15,520 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 68 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:15,535 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:15,535 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:15,939 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 39 check-sat command(s) [2018-09-18 10:03:15,939 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:15,944 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:15,972 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 2541 proven. 950 refuted. 0 times theorem prover too weak. 1584 trivial. 0 not checked. [2018-09-18 10:03:15,973 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:16,118 INFO L134 CoverageAnalysis]: Checked inductivity of 5075 backedges. 2541 proven. 950 refuted. 0 times theorem prover too weak. 1584 trivial. 0 not checked. [2018-09-18 10:03:16,120 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:16,120 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 28, 28, 28, 28] total 86 [2018-09-18 10:03:16,120 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:16,121 INFO L459 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-09-18 10:03:16,121 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-09-18 10:03:16,122 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3655, Invalid=3655, Unknown=0, NotChecked=0, Total=7310 [2018-09-18 10:03:16,122 INFO L87 Difference]: Start difference. First operand 186 states and 211 transitions. Second operand 62 states. [2018-09-18 10:03:16,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:16,580 INFO L93 Difference]: Finished difference Result 275 states and 329 transitions. [2018-09-18 10:03:16,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-09-18 10:03:16,581 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 185 [2018-09-18 10:03:16,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:16,582 INFO L225 Difference]: With dead ends: 275 [2018-09-18 10:03:16,582 INFO L226 Difference]: Without dead ends: 193 [2018-09-18 10:03:16,583 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 774 GetRequests, 686 SyntacticMatches, 4 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=3655, Invalid=3655, Unknown=0, NotChecked=0, Total=7310 [2018-09-18 10:03:16,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-09-18 10:03:16,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 192. [2018-09-18 10:03:16,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-09-18 10:03:16,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 218 transitions. [2018-09-18 10:03:16,588 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 218 transitions. Word has length 185 [2018-09-18 10:03:16,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:16,589 INFO L480 AbstractCegarLoop]: Abstraction has 192 states and 218 transitions. [2018-09-18 10:03:16,589 INFO L481 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-09-18 10:03:16,589 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 218 transitions. [2018-09-18 10:03:16,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-09-18 10:03:16,590 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:16,590 INFO L376 BasicCegarLoop]: trace histogram [61, 60, 34, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:16,591 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:16,591 INFO L82 PathProgramCache]: Analyzing trace with hash -1265979329, now seen corresponding path program 34 times [2018-09-18 10:03:16,591 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:16,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:16,592 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:16,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:16,592 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:16,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:17,184 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 2695 proven. 1785 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:17,184 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:17,184 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:17,192 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:17,192 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:17,248 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:17,248 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:17,250 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:17,284 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 2695 proven. 1785 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:17,284 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:18,431 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 2695 proven. 1785 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:18,450 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:18,450 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 70 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:18,465 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:18,465 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:18,561 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:18,561 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:18,566 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:18,589 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 2695 proven. 1785 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:18,589 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:18,988 INFO L134 CoverageAnalysis]: Checked inductivity of 5430 backedges. 2695 proven. 1785 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:18,989 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:18,990 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 52 [2018-09-18 10:03:18,990 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:18,990 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-09-18 10:03:18,991 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-09-18 10:03:18,991 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:18,991 INFO L87 Difference]: Start difference. First operand 192 states and 218 transitions. Second operand 37 states. [2018-09-18 10:03:19,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:19,116 INFO L93 Difference]: Finished difference Result 280 states and 333 transitions. [2018-09-18 10:03:19,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-09-18 10:03:19,118 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 191 [2018-09-18 10:03:19,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:19,119 INFO L225 Difference]: With dead ends: 280 [2018-09-18 10:03:19,119 INFO L226 Difference]: Without dead ends: 195 [2018-09-18 10:03:19,120 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 799 GetRequests, 709 SyntacticMatches, 40 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 980 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:19,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-09-18 10:03:19,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2018-09-18 10:03:19,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-09-18 10:03:19,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 221 transitions. [2018-09-18 10:03:19,125 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 221 transitions. Word has length 191 [2018-09-18 10:03:19,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:19,126 INFO L480 AbstractCegarLoop]: Abstraction has 195 states and 221 transitions. [2018-09-18 10:03:19,126 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-09-18 10:03:19,126 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 221 transitions. [2018-09-18 10:03:19,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2018-09-18 10:03:19,127 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:19,127 INFO L376 BasicCegarLoop]: trace histogram [62, 61, 35, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:19,127 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:19,128 INFO L82 PathProgramCache]: Analyzing trace with hash 1428773178, now seen corresponding path program 35 times [2018-09-18 10:03:19,128 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:19,128 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:19,128 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:19,129 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:19,129 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:19,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:19,945 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 2772 proven. 1890 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:19,945 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:19,945 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:19,953 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:19,953 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:20,052 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 62 check-sat command(s) [2018-09-18 10:03:20,052 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:20,056 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:20,082 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 2772 proven. 1890 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:20,082 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:21,035 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 2772 proven. 1890 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:21,056 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:21,056 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 72 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:21,071 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:21,071 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:21,779 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 62 check-sat command(s) [2018-09-18 10:03:21,779 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:21,785 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:21,815 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 2772 proven. 1890 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:21,815 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:22,252 INFO L134 CoverageAnalysis]: Checked inductivity of 5612 backedges. 2772 proven. 1890 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:22,253 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:22,253 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 52 [2018-09-18 10:03:22,253 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:22,254 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-18 10:03:22,254 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-18 10:03:22,254 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:22,255 INFO L87 Difference]: Start difference. First operand 195 states and 221 transitions. Second operand 38 states. [2018-09-18 10:03:22,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:22,399 INFO L93 Difference]: Finished difference Result 283 states and 336 transitions. [2018-09-18 10:03:22,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-09-18 10:03:22,401 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 194 [2018-09-18 10:03:22,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:22,402 INFO L225 Difference]: With dead ends: 283 [2018-09-18 10:03:22,403 INFO L226 Difference]: Without dead ends: 198 [2018-09-18 10:03:22,403 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 812 GetRequests, 718 SyntacticMatches, 44 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1078 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:22,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-09-18 10:03:22,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 198. [2018-09-18 10:03:22,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-09-18 10:03:22,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 224 transitions. [2018-09-18 10:03:22,409 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 224 transitions. Word has length 194 [2018-09-18 10:03:22,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:22,409 INFO L480 AbstractCegarLoop]: Abstraction has 198 states and 224 transitions. [2018-09-18 10:03:22,410 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-18 10:03:22,410 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 224 transitions. [2018-09-18 10:03:22,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-09-18 10:03:22,411 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:22,411 INFO L376 BasicCegarLoop]: trace histogram [63, 62, 36, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:22,411 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:22,411 INFO L82 PathProgramCache]: Analyzing trace with hash -727987617, now seen corresponding path program 36 times [2018-09-18 10:03:22,411 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:22,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:22,412 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:22,412 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:22,412 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:22,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:23,265 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 2849 proven. 1998 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:23,265 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:23,265 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:23,273 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:23,273 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:23,374 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 61 check-sat command(s) [2018-09-18 10:03:23,374 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:23,378 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:23,414 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 2849 proven. 1998 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:23,414 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:24,258 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 2849 proven. 1998 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:24,280 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:24,281 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 74 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:24,297 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:24,297 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:25,055 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 61 check-sat command(s) [2018-09-18 10:03:25,056 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:25,061 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:25,088 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 2849 proven. 1998 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:25,088 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:25,543 INFO L134 CoverageAnalysis]: Checked inductivity of 5797 backedges. 2849 proven. 1998 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:25,544 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:25,544 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 52 [2018-09-18 10:03:25,544 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:25,545 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-09-18 10:03:25,545 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-09-18 10:03:25,545 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:25,546 INFO L87 Difference]: Start difference. First operand 198 states and 224 transitions. Second operand 39 states. [2018-09-18 10:03:25,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:25,671 INFO L93 Difference]: Finished difference Result 286 states and 339 transitions. [2018-09-18 10:03:25,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-18 10:03:25,672 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 197 [2018-09-18 10:03:25,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:25,674 INFO L225 Difference]: With dead ends: 286 [2018-09-18 10:03:25,674 INFO L226 Difference]: Without dead ends: 201 [2018-09-18 10:03:25,675 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 825 GetRequests, 727 SyntacticMatches, 48 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1176 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:25,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-09-18 10:03:25,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 201. [2018-09-18 10:03:25,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-09-18 10:03:25,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 227 transitions. [2018-09-18 10:03:25,681 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 227 transitions. Word has length 197 [2018-09-18 10:03:25,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:25,682 INFO L480 AbstractCegarLoop]: Abstraction has 201 states and 227 transitions. [2018-09-18 10:03:25,682 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-09-18 10:03:25,682 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 227 transitions. [2018-09-18 10:03:25,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-09-18 10:03:25,683 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:25,683 INFO L376 BasicCegarLoop]: trace histogram [64, 63, 37, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:25,683 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:25,684 INFO L82 PathProgramCache]: Analyzing trace with hash -78083302, now seen corresponding path program 37 times [2018-09-18 10:03:25,684 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:25,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:25,684 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:25,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:25,685 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:25,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:26,541 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 2926 proven. 2109 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:26,541 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:26,541 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 75 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:26,549 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:26,549 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:26,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:26,598 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:26,626 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 2926 proven. 2109 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:26,626 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:27,505 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 2926 proven. 2109 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:27,525 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:27,525 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 76 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:27,540 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:27,540 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:27,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:27,640 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:27,668 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 2926 proven. 2109 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:27,668 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:28,157 INFO L134 CoverageAnalysis]: Checked inductivity of 5985 backedges. 2926 proven. 2109 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:28,159 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:28,159 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 52 [2018-09-18 10:03:28,159 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:28,159 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-09-18 10:03:28,160 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-09-18 10:03:28,160 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:28,160 INFO L87 Difference]: Start difference. First operand 201 states and 227 transitions. Second operand 40 states. [2018-09-18 10:03:28,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:28,276 INFO L93 Difference]: Finished difference Result 289 states and 342 transitions. [2018-09-18 10:03:28,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-09-18 10:03:28,276 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 200 [2018-09-18 10:03:28,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:28,278 INFO L225 Difference]: With dead ends: 289 [2018-09-18 10:03:28,278 INFO L226 Difference]: Without dead ends: 204 [2018-09-18 10:03:28,278 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 838 GetRequests, 736 SyntacticMatches, 52 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1274 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:28,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-09-18 10:03:28,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 204. [2018-09-18 10:03:28,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-09-18 10:03:28,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 230 transitions. [2018-09-18 10:03:28,284 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 230 transitions. Word has length 200 [2018-09-18 10:03:28,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:28,285 INFO L480 AbstractCegarLoop]: Abstraction has 204 states and 230 transitions. [2018-09-18 10:03:28,285 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-09-18 10:03:28,285 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 230 transitions. [2018-09-18 10:03:28,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-09-18 10:03:28,286 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:28,286 INFO L376 BasicCegarLoop]: trace histogram [65, 64, 38, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:28,286 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:28,286 INFO L82 PathProgramCache]: Analyzing trace with hash -491205505, now seen corresponding path program 38 times [2018-09-18 10:03:28,286 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:28,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:28,287 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:28,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:28,287 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:28,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:30,147 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 3003 proven. 2223 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:30,147 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:30,148 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 77 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:30,156 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:30,156 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:30,202 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:30,202 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:30,204 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:30,233 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 3003 proven. 2223 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:30,233 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:31,110 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 3003 proven. 2223 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:31,130 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:31,130 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 78 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:31,145 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:31,145 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:31,250 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:31,250 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:31,255 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:31,297 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 3003 proven. 2223 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:31,297 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:31,867 INFO L134 CoverageAnalysis]: Checked inductivity of 6176 backedges. 3003 proven. 2223 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:31,869 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:31,869 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 52 [2018-09-18 10:03:31,869 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:31,870 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-09-18 10:03:31,870 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-09-18 10:03:31,870 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:31,870 INFO L87 Difference]: Start difference. First operand 204 states and 230 transitions. Second operand 41 states. [2018-09-18 10:03:32,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:32,039 INFO L93 Difference]: Finished difference Result 292 states and 345 transitions. [2018-09-18 10:03:32,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-09-18 10:03:32,043 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 203 [2018-09-18 10:03:32,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:32,044 INFO L225 Difference]: With dead ends: 292 [2018-09-18 10:03:32,044 INFO L226 Difference]: Without dead ends: 207 [2018-09-18 10:03:32,045 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 851 GetRequests, 745 SyntacticMatches, 56 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1372 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:32,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-09-18 10:03:32,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2018-09-18 10:03:32,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-09-18 10:03:32,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 233 transitions. [2018-09-18 10:03:32,050 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 233 transitions. Word has length 203 [2018-09-18 10:03:32,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:32,050 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 233 transitions. [2018-09-18 10:03:32,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-09-18 10:03:32,050 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 233 transitions. [2018-09-18 10:03:32,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2018-09-18 10:03:32,052 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:32,052 INFO L376 BasicCegarLoop]: trace histogram [66, 65, 39, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:32,052 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:32,052 INFO L82 PathProgramCache]: Analyzing trace with hash 1561515258, now seen corresponding path program 39 times [2018-09-18 10:03:32,052 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:32,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:32,053 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:32,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:32,053 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:32,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:32,965 INFO L134 CoverageAnalysis]: Checked inductivity of 6370 backedges. 3080 proven. 2340 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2018-09-18 10:03:32,965 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:32,966 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 79 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:32,973 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:32,974 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:33,211 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 41 check-sat command(s) [2018-09-18 10:03:33,211 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:33,215 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:34,289 INFO L134 CoverageAnalysis]: Checked inductivity of 6370 backedges. 3120 proven. 1027 refuted. 0 times theorem prover too weak. 2223 trivial. 0 not checked. [2018-09-18 10:03:34,290 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:35,984 INFO L134 CoverageAnalysis]: Checked inductivity of 6370 backedges. 3120 proven. 1027 refuted. 0 times theorem prover too weak. 2223 trivial. 0 not checked. [2018-09-18 10:03:36,004 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:36,004 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 80 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:36,019 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:36,019 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:36,456 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 41 check-sat command(s) [2018-09-18 10:03:36,456 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:36,461 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:36,489 INFO L134 CoverageAnalysis]: Checked inductivity of 6370 backedges. 3120 proven. 1027 refuted. 0 times theorem prover too weak. 2223 trivial. 0 not checked. [2018-09-18 10:03:36,489 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:36,714 INFO L134 CoverageAnalysis]: Checked inductivity of 6370 backedges. 3120 proven. 1027 refuted. 0 times theorem prover too weak. 2223 trivial. 0 not checked. [2018-09-18 10:03:36,716 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:36,716 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 29, 29, 29, 29] total 92 [2018-09-18 10:03:36,716 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:36,716 INFO L459 AbstractCegarLoop]: Interpolant automaton has 69 states [2018-09-18 10:03:36,717 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2018-09-18 10:03:36,717 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=4186, Invalid=4186, Unknown=0, NotChecked=0, Total=8372 [2018-09-18 10:03:36,718 INFO L87 Difference]: Start difference. First operand 207 states and 233 transitions. Second operand 69 states. [2018-09-18 10:03:37,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:37,279 INFO L93 Difference]: Finished difference Result 299 states and 355 transitions. [2018-09-18 10:03:37,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2018-09-18 10:03:37,279 INFO L78 Accepts]: Start accepts. Automaton has 69 states. Word has length 206 [2018-09-18 10:03:37,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:37,281 INFO L225 Difference]: With dead ends: 299 [2018-09-18 10:03:37,281 INFO L226 Difference]: Without dead ends: 214 [2018-09-18 10:03:37,281 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 864 GetRequests, 766 SyntacticMatches, 8 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=4186, Invalid=4186, Unknown=0, NotChecked=0, Total=8372 [2018-09-18 10:03:37,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-09-18 10:03:37,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 213. [2018-09-18 10:03:37,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-09-18 10:03:37,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 240 transitions. [2018-09-18 10:03:37,287 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 240 transitions. Word has length 206 [2018-09-18 10:03:37,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:37,287 INFO L480 AbstractCegarLoop]: Abstraction has 213 states and 240 transitions. [2018-09-18 10:03:37,287 INFO L481 AbstractCegarLoop]: Interpolant automaton has 69 states. [2018-09-18 10:03:37,287 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 240 transitions. [2018-09-18 10:03:37,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2018-09-18 10:03:37,288 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:37,288 INFO L376 BasicCegarLoop]: trace histogram [68, 67, 40, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:37,289 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:37,289 INFO L82 PathProgramCache]: Analyzing trace with hash 1803489756, now seen corresponding path program 40 times [2018-09-18 10:03:37,289 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:37,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:37,291 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:37,292 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:37,292 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:37,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:39,213 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 3280 proven. 2460 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:39,213 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:39,213 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 81 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:39,220 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:39,220 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:39,270 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:39,270 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:39,272 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:39,304 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 3280 proven. 2460 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:39,304 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:40,451 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 3280 proven. 2460 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:40,471 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:40,471 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 82 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:40,486 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:40,486 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:40,595 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:40,595 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:40,601 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:40,632 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 3280 proven. 2460 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:40,633 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:41,236 INFO L134 CoverageAnalysis]: Checked inductivity of 6767 backedges. 3280 proven. 2460 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:41,238 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:41,238 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43, 43, 43] total 52 [2018-09-18 10:03:41,238 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:41,238 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-09-18 10:03:41,239 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-09-18 10:03:41,239 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:41,239 INFO L87 Difference]: Start difference. First operand 213 states and 240 transitions. Second operand 43 states. [2018-09-18 10:03:41,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:41,389 INFO L93 Difference]: Finished difference Result 304 states and 359 transitions. [2018-09-18 10:03:41,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-09-18 10:03:41,391 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 212 [2018-09-18 10:03:41,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:41,392 INFO L225 Difference]: With dead ends: 304 [2018-09-18 10:03:41,392 INFO L226 Difference]: Without dead ends: 216 [2018-09-18 10:03:41,393 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 889 GetRequests, 775 SyntacticMatches, 64 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1568 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:41,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-09-18 10:03:41,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 216. [2018-09-18 10:03:41,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2018-09-18 10:03:41,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 243 transitions. [2018-09-18 10:03:41,399 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 243 transitions. Word has length 212 [2018-09-18 10:03:41,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:41,399 INFO L480 AbstractCegarLoop]: Abstraction has 216 states and 243 transitions. [2018-09-18 10:03:41,399 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-09-18 10:03:41,399 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 243 transitions. [2018-09-18 10:03:41,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2018-09-18 10:03:41,400 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:41,400 INFO L376 BasicCegarLoop]: trace histogram [69, 68, 41, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:41,401 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:41,401 INFO L82 PathProgramCache]: Analyzing trace with hash -1590205503, now seen corresponding path program 41 times [2018-09-18 10:03:41,401 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:41,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:41,402 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:41,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:41,402 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:41,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:42,586 INFO L134 CoverageAnalysis]: Checked inductivity of 6970 backedges. 3360 proven. 2583 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:42,586 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:42,586 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:42,595 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:42,595 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:42,707 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 69 check-sat command(s) [2018-09-18 10:03:42,707 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:42,710 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:42,742 INFO L134 CoverageAnalysis]: Checked inductivity of 6970 backedges. 3360 proven. 2583 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:42,742 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:43,739 INFO L134 CoverageAnalysis]: Checked inductivity of 6970 backedges. 3360 proven. 2583 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:43,758 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:43,759 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 84 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:43,774 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:43,774 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:44,609 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 69 check-sat command(s) [2018-09-18 10:03:44,610 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:44,615 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:44,645 INFO L134 CoverageAnalysis]: Checked inductivity of 6970 backedges. 3360 proven. 2583 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:44,645 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:45,607 INFO L134 CoverageAnalysis]: Checked inductivity of 6970 backedges. 3360 proven. 2583 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:45,609 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:45,609 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44, 44, 44, 44] total 52 [2018-09-18 10:03:45,609 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:45,610 INFO L459 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-09-18 10:03:45,610 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-09-18 10:03:45,610 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:45,610 INFO L87 Difference]: Start difference. First operand 216 states and 243 transitions. Second operand 44 states. [2018-09-18 10:03:45,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:45,739 INFO L93 Difference]: Finished difference Result 307 states and 362 transitions. [2018-09-18 10:03:45,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-09-18 10:03:45,739 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 215 [2018-09-18 10:03:45,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:45,741 INFO L225 Difference]: With dead ends: 307 [2018-09-18 10:03:45,741 INFO L226 Difference]: Without dead ends: 219 [2018-09-18 10:03:45,742 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 902 GetRequests, 784 SyntacticMatches, 68 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1666 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:45,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-09-18 10:03:45,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 219. [2018-09-18 10:03:45,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219 states. [2018-09-18 10:03:45,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 246 transitions. [2018-09-18 10:03:45,748 INFO L78 Accepts]: Start accepts. Automaton has 219 states and 246 transitions. Word has length 215 [2018-09-18 10:03:45,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:45,748 INFO L480 AbstractCegarLoop]: Abstraction has 219 states and 246 transitions. [2018-09-18 10:03:45,748 INFO L481 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-09-18 10:03:45,748 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 246 transitions. [2018-09-18 10:03:45,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2018-09-18 10:03:45,749 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:45,749 INFO L376 BasicCegarLoop]: trace histogram [70, 69, 42, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:45,750 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:45,750 INFO L82 PathProgramCache]: Analyzing trace with hash 364481468, now seen corresponding path program 42 times [2018-09-18 10:03:45,750 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:45,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:45,751 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:45,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:45,751 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:45,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:46,568 INFO L134 CoverageAnalysis]: Checked inductivity of 7176 backedges. 3440 proven. 2709 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:46,568 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:46,568 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:46,578 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:46,578 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:46,698 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 68 check-sat command(s) [2018-09-18 10:03:46,698 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:46,702 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:46,748 INFO L134 CoverageAnalysis]: Checked inductivity of 7176 backedges. 3440 proven. 2709 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:46,748 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:47,680 INFO L134 CoverageAnalysis]: Checked inductivity of 7176 backedges. 3440 proven. 2709 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:47,700 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:47,700 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 86 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:47,715 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:47,715 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:48,639 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 68 check-sat command(s) [2018-09-18 10:03:48,639 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:48,644 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:48,674 INFO L134 CoverageAnalysis]: Checked inductivity of 7176 backedges. 3440 proven. 2709 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:48,674 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:49,375 INFO L134 CoverageAnalysis]: Checked inductivity of 7176 backedges. 3440 proven. 2709 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:49,376 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:49,376 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45, 45, 45, 45] total 52 [2018-09-18 10:03:49,376 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:49,377 INFO L459 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-09-18 10:03:49,377 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-09-18 10:03:49,377 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:49,378 INFO L87 Difference]: Start difference. First operand 219 states and 246 transitions. Second operand 45 states. [2018-09-18 10:03:49,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:49,522 INFO L93 Difference]: Finished difference Result 310 states and 365 transitions. [2018-09-18 10:03:49,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-09-18 10:03:49,522 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 218 [2018-09-18 10:03:49,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:49,524 INFO L225 Difference]: With dead ends: 310 [2018-09-18 10:03:49,524 INFO L226 Difference]: Without dead ends: 222 [2018-09-18 10:03:49,525 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 915 GetRequests, 793 SyntacticMatches, 72 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1764 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:49,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-09-18 10:03:49,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 222. [2018-09-18 10:03:49,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-09-18 10:03:49,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 249 transitions. [2018-09-18 10:03:49,530 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 249 transitions. Word has length 218 [2018-09-18 10:03:49,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:49,530 INFO L480 AbstractCegarLoop]: Abstraction has 222 states and 249 transitions. [2018-09-18 10:03:49,531 INFO L481 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-09-18 10:03:49,531 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 249 transitions. [2018-09-18 10:03:49,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2018-09-18 10:03:49,532 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:49,532 INFO L376 BasicCegarLoop]: trace histogram [71, 70, 43, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:49,532 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:49,532 INFO L82 PathProgramCache]: Analyzing trace with hash 1277435361, now seen corresponding path program 43 times [2018-09-18 10:03:49,533 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:49,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:49,533 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:49,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:49,533 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:49,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:50,825 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 3520 proven. 2838 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:50,825 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:50,825 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:50,835 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:50,835 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:50,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:50,885 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:50,918 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 3520 proven. 2838 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:50,918 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:51,840 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 3520 proven. 2838 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:51,859 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:51,859 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 88 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:51,874 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:51,874 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:51,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:51,983 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:52,017 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 3520 proven. 2838 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:52,018 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:52,725 INFO L134 CoverageAnalysis]: Checked inductivity of 7385 backedges. 3520 proven. 2838 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:52,727 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:52,727 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46, 46, 46, 46] total 52 [2018-09-18 10:03:52,727 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:52,727 INFO L459 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-09-18 10:03:52,728 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-09-18 10:03:52,728 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:52,728 INFO L87 Difference]: Start difference. First operand 222 states and 249 transitions. Second operand 46 states. [2018-09-18 10:03:52,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:52,864 INFO L93 Difference]: Finished difference Result 313 states and 368 transitions. [2018-09-18 10:03:52,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-09-18 10:03:52,864 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 221 [2018-09-18 10:03:52,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:52,865 INFO L225 Difference]: With dead ends: 313 [2018-09-18 10:03:52,866 INFO L226 Difference]: Without dead ends: 225 [2018-09-18 10:03:52,866 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 928 GetRequests, 802 SyntacticMatches, 76 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1862 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:52,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-09-18 10:03:52,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 225. [2018-09-18 10:03:52,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-09-18 10:03:52,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 252 transitions. [2018-09-18 10:03:52,872 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 252 transitions. Word has length 221 [2018-09-18 10:03:52,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:52,873 INFO L480 AbstractCegarLoop]: Abstraction has 225 states and 252 transitions. [2018-09-18 10:03:52,873 INFO L481 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-09-18 10:03:52,873 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 252 transitions. [2018-09-18 10:03:52,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2018-09-18 10:03:52,874 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:52,874 INFO L376 BasicCegarLoop]: trace histogram [72, 71, 44, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:52,874 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:52,875 INFO L82 PathProgramCache]: Analyzing trace with hash -941023844, now seen corresponding path program 44 times [2018-09-18 10:03:52,875 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:52,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:52,875 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:52,876 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:52,876 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:52,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:53,810 INFO L134 CoverageAnalysis]: Checked inductivity of 7597 backedges. 3600 proven. 2970 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:53,811 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:53,811 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:53,819 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:53,819 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:53,872 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:53,872 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:53,875 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:53,923 INFO L134 CoverageAnalysis]: Checked inductivity of 7597 backedges. 3600 proven. 2970 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:53,923 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:54,858 INFO L134 CoverageAnalysis]: Checked inductivity of 7597 backedges. 3600 proven. 2970 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:54,878 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:54,878 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 90 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:54,895 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:54,895 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:55,013 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:55,013 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:55,019 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:55,054 INFO L134 CoverageAnalysis]: Checked inductivity of 7597 backedges. 3600 proven. 2970 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:55,054 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:56,042 INFO L134 CoverageAnalysis]: Checked inductivity of 7597 backedges. 3600 proven. 2970 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:56,044 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:56,044 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47, 47, 47] total 52 [2018-09-18 10:03:56,044 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:56,044 INFO L459 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-09-18 10:03:56,045 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-09-18 10:03:56,045 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:56,045 INFO L87 Difference]: Start difference. First operand 225 states and 252 transitions. Second operand 47 states. [2018-09-18 10:03:56,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:56,194 INFO L93 Difference]: Finished difference Result 316 states and 371 transitions. [2018-09-18 10:03:56,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-09-18 10:03:56,194 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 224 [2018-09-18 10:03:56,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:56,196 INFO L225 Difference]: With dead ends: 316 [2018-09-18 10:03:56,196 INFO L226 Difference]: Without dead ends: 228 [2018-09-18 10:03:56,196 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 941 GetRequests, 811 SyntacticMatches, 80 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1960 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:03:56,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2018-09-18 10:03:56,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 228. [2018-09-18 10:03:56,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-09-18 10:03:56,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 255 transitions. [2018-09-18 10:03:56,202 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 255 transitions. Word has length 224 [2018-09-18 10:03:56,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:56,202 INFO L480 AbstractCegarLoop]: Abstraction has 228 states and 255 transitions. [2018-09-18 10:03:56,203 INFO L481 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-09-18 10:03:56,203 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 255 transitions. [2018-09-18 10:03:56,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2018-09-18 10:03:56,204 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:56,204 INFO L376 BasicCegarLoop]: trace histogram [73, 72, 45, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:56,204 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:56,205 INFO L82 PathProgramCache]: Analyzing trace with hash -102449151, now seen corresponding path program 45 times [2018-09-18 10:03:56,205 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:56,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:56,205 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:56,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:56,206 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:56,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:57,109 INFO L134 CoverageAnalysis]: Checked inductivity of 7812 backedges. 3680 proven. 3105 refuted. 0 times theorem prover too weak. 1027 trivial. 0 not checked. [2018-09-18 10:03:57,109 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:57,109 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:57,119 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:57,120 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:57,191 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 42 check-sat command(s) [2018-09-18 10:03:57,191 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:57,195 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:58,352 INFO L134 CoverageAnalysis]: Checked inductivity of 7812 backedges. 3735 proven. 1107 refuted. 0 times theorem prover too weak. 2970 trivial. 0 not checked. [2018-09-18 10:03:58,352 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:59,968 INFO L134 CoverageAnalysis]: Checked inductivity of 7812 backedges. 3735 proven. 1107 refuted. 0 times theorem prover too weak. 2970 trivial. 0 not checked. [2018-09-18 10:03:59,989 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:59,989 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 92 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:00,004 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:00,004 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:00,451 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 42 check-sat command(s) [2018-09-18 10:04:00,451 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:00,456 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:00,490 INFO L134 CoverageAnalysis]: Checked inductivity of 7812 backedges. 3735 proven. 1107 refuted. 0 times theorem prover too weak. 2970 trivial. 0 not checked. [2018-09-18 10:04:00,490 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:00,850 INFO L134 CoverageAnalysis]: Checked inductivity of 7812 backedges. 3735 proven. 1107 refuted. 0 times theorem prover too weak. 2970 trivial. 0 not checked. [2018-09-18 10:04:00,851 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:00,852 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 30, 30, 30, 30] total 98 [2018-09-18 10:04:00,852 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:00,852 INFO L459 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-09-18 10:04:00,853 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-09-18 10:04:00,853 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=4753, Invalid=4753, Unknown=0, NotChecked=0, Total=9506 [2018-09-18 10:04:00,853 INFO L87 Difference]: Start difference. First operand 228 states and 255 transitions. Second operand 76 states. [2018-09-18 10:04:01,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:01,446 INFO L93 Difference]: Finished difference Result 323 states and 381 transitions. [2018-09-18 10:04:01,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2018-09-18 10:04:01,447 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 227 [2018-09-18 10:04:01,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:01,448 INFO L225 Difference]: With dead ends: 323 [2018-09-18 10:04:01,448 INFO L226 Difference]: Without dead ends: 235 [2018-09-18 10:04:01,449 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 954 GetRequests, 846 SyntacticMatches, 12 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 294 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=4753, Invalid=4753, Unknown=0, NotChecked=0, Total=9506 [2018-09-18 10:04:01,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-09-18 10:04:01,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 234. [2018-09-18 10:04:01,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-09-18 10:04:01,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 262 transitions. [2018-09-18 10:04:01,454 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 262 transitions. Word has length 227 [2018-09-18 10:04:01,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:01,455 INFO L480 AbstractCegarLoop]: Abstraction has 234 states and 262 transitions. [2018-09-18 10:04:01,455 INFO L481 AbstractCegarLoop]: Interpolant automaton has 76 states. [2018-09-18 10:04:01,455 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 262 transitions. [2018-09-18 10:04:01,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2018-09-18 10:04:01,456 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:01,456 INFO L376 BasicCegarLoop]: trace histogram [75, 74, 46, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:01,457 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:01,457 INFO L82 PathProgramCache]: Analyzing trace with hash 1788966879, now seen corresponding path program 46 times [2018-09-18 10:04:01,457 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:01,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:01,458 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:01,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:01,458 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:01,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:02,653 INFO L134 CoverageAnalysis]: Checked inductivity of 8251 backedges. 3901 proven. 3243 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:02,654 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:02,654 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:02,661 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:02,662 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:02,716 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:02,716 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:02,719 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:02,755 INFO L134 CoverageAnalysis]: Checked inductivity of 8251 backedges. 3901 proven. 3243 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:02,755 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:03,742 INFO L134 CoverageAnalysis]: Checked inductivity of 8251 backedges. 3901 proven. 3243 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:03,761 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:03,762 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 94 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:03,776 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:03,777 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:03,892 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:03,892 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:03,898 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:03,935 INFO L134 CoverageAnalysis]: Checked inductivity of 8251 backedges. 3901 proven. 3243 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:03,935 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:04,767 INFO L134 CoverageAnalysis]: Checked inductivity of 8251 backedges. 3901 proven. 3243 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:04,769 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:04,769 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49, 49, 49] total 52 [2018-09-18 10:04:04,769 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:04,769 INFO L459 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-09-18 10:04:04,770 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-09-18 10:04:04,770 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:04,770 INFO L87 Difference]: Start difference. First operand 234 states and 262 transitions. Second operand 49 states. [2018-09-18 10:04:04,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:04,921 INFO L93 Difference]: Finished difference Result 328 states and 385 transitions. [2018-09-18 10:04:04,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-09-18 10:04:04,922 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 233 [2018-09-18 10:04:04,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:04,923 INFO L225 Difference]: With dead ends: 328 [2018-09-18 10:04:04,923 INFO L226 Difference]: Without dead ends: 237 [2018-09-18 10:04:04,924 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 979 GetRequests, 841 SyntacticMatches, 88 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2156 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:04,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-09-18 10:04:04,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 237. [2018-09-18 10:04:04,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-09-18 10:04:04,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 265 transitions. [2018-09-18 10:04:04,930 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 265 transitions. Word has length 233 [2018-09-18 10:04:04,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:04,931 INFO L480 AbstractCegarLoop]: Abstraction has 237 states and 265 transitions. [2018-09-18 10:04:04,931 INFO L481 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-09-18 10:04:04,931 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 265 transitions. [2018-09-18 10:04:04,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2018-09-18 10:04:04,932 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:04,932 INFO L376 BasicCegarLoop]: trace histogram [76, 75, 47, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:04,932 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:04,932 INFO L82 PathProgramCache]: Analyzing trace with hash 496351002, now seen corresponding path program 47 times [2018-09-18 10:04:04,932 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:04,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:04,933 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:04,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:04,933 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:04,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:06,224 INFO L134 CoverageAnalysis]: Checked inductivity of 8475 backedges. 3984 proven. 3384 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:06,225 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:06,225 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:06,232 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:06,232 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:06,359 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 76 check-sat command(s) [2018-09-18 10:04:06,359 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:06,362 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:06,400 INFO L134 CoverageAnalysis]: Checked inductivity of 8475 backedges. 3984 proven. 3384 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:06,400 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:07,313 INFO L134 CoverageAnalysis]: Checked inductivity of 8475 backedges. 3984 proven. 3384 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:07,333 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:07,333 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 96 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:07,348 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:07,348 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:08,518 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 76 check-sat command(s) [2018-09-18 10:04:08,518 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:08,524 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:08,563 INFO L134 CoverageAnalysis]: Checked inductivity of 8475 backedges. 3984 proven. 3384 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:08,563 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:09,407 INFO L134 CoverageAnalysis]: Checked inductivity of 8475 backedges. 3984 proven. 3384 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:09,409 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:09,409 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 52 [2018-09-18 10:04:09,409 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:09,409 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-09-18 10:04:09,410 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-09-18 10:04:09,410 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:09,410 INFO L87 Difference]: Start difference. First operand 237 states and 265 transitions. Second operand 50 states. [2018-09-18 10:04:09,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:09,611 INFO L93 Difference]: Finished difference Result 331 states and 388 transitions. [2018-09-18 10:04:09,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-09-18 10:04:09,612 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 236 [2018-09-18 10:04:09,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:09,613 INFO L225 Difference]: With dead ends: 331 [2018-09-18 10:04:09,613 INFO L226 Difference]: Without dead ends: 240 [2018-09-18 10:04:09,614 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 992 GetRequests, 850 SyntacticMatches, 92 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2254 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:09,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-09-18 10:04:09,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 240. [2018-09-18 10:04:09,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240 states. [2018-09-18 10:04:09,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 268 transitions. [2018-09-18 10:04:09,620 INFO L78 Accepts]: Start accepts. Automaton has 240 states and 268 transitions. Word has length 236 [2018-09-18 10:04:09,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:09,620 INFO L480 AbstractCegarLoop]: Abstraction has 240 states and 268 transitions. [2018-09-18 10:04:09,620 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-09-18 10:04:09,620 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 268 transitions. [2018-09-18 10:04:09,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2018-09-18 10:04:09,621 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:09,622 INFO L376 BasicCegarLoop]: trace histogram [77, 76, 48, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:09,622 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:09,622 INFO L82 PathProgramCache]: Analyzing trace with hash 853535231, now seen corresponding path program 48 times [2018-09-18 10:04:09,622 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:09,623 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:09,623 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:09,623 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:09,623 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:09,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:10,946 INFO L134 CoverageAnalysis]: Checked inductivity of 8702 backedges. 4067 proven. 3528 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:10,946 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:10,946 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:10,953 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:10,954 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:11,203 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 76 check-sat command(s) [2018-09-18 10:04:11,203 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:11,207 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:11,244 INFO L134 CoverageAnalysis]: Checked inductivity of 8702 backedges. 4067 proven. 3528 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:11,244 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:12,193 INFO L134 CoverageAnalysis]: Checked inductivity of 8702 backedges. 4067 proven. 3528 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:12,214 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:12,214 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 98 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:12,229 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:12,229 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:13,379 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 76 check-sat command(s) [2018-09-18 10:04:13,380 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:13,386 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:13,426 INFO L134 CoverageAnalysis]: Checked inductivity of 8702 backedges. 4067 proven. 3528 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:13,426 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:14,398 INFO L134 CoverageAnalysis]: Checked inductivity of 8702 backedges. 4067 proven. 3528 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:14,400 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:14,400 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 51, 51, 51, 51] total 52 [2018-09-18 10:04:14,400 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:14,401 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-09-18 10:04:14,401 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-09-18 10:04:14,402 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:14,402 INFO L87 Difference]: Start difference. First operand 240 states and 268 transitions. Second operand 51 states. [2018-09-18 10:04:14,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:14,581 INFO L93 Difference]: Finished difference Result 334 states and 391 transitions. [2018-09-18 10:04:14,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-09-18 10:04:14,582 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 239 [2018-09-18 10:04:14,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:14,584 INFO L225 Difference]: With dead ends: 334 [2018-09-18 10:04:14,584 INFO L226 Difference]: Without dead ends: 243 [2018-09-18 10:04:14,585 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1005 GetRequests, 859 SyntacticMatches, 96 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2352 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:14,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-09-18 10:04:14,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 243. [2018-09-18 10:04:14,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states. [2018-09-18 10:04:14,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 271 transitions. [2018-09-18 10:04:14,590 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 271 transitions. Word has length 239 [2018-09-18 10:04:14,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:14,590 INFO L480 AbstractCegarLoop]: Abstraction has 243 states and 271 transitions. [2018-09-18 10:04:14,590 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-09-18 10:04:14,591 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 271 transitions. [2018-09-18 10:04:14,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2018-09-18 10:04:14,592 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:14,592 INFO L376 BasicCegarLoop]: trace histogram [78, 77, 49, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:14,592 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:14,593 INFO L82 PathProgramCache]: Analyzing trace with hash -1200058118, now seen corresponding path program 49 times [2018-09-18 10:04:14,593 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:14,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:14,593 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:14,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:14,594 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:14,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:15,968 INFO L134 CoverageAnalysis]: Checked inductivity of 8932 backedges. 4150 proven. 3675 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:15,968 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:15,968 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 99 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:15,975 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:15,975 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:16,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:16,034 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:16,074 INFO L134 CoverageAnalysis]: Checked inductivity of 8932 backedges. 4150 proven. 3675 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:16,074 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:17,000 INFO L134 CoverageAnalysis]: Checked inductivity of 8932 backedges. 4150 proven. 3675 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:17,020 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:17,020 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 100 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:17,035 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:17,035 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:17,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:17,155 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:17,196 INFO L134 CoverageAnalysis]: Checked inductivity of 8932 backedges. 4150 proven. 3675 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:17,196 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:18,125 INFO L134 CoverageAnalysis]: Checked inductivity of 8932 backedges. 4150 proven. 3675 refuted. 0 times theorem prover too weak. 1107 trivial. 0 not checked. [2018-09-18 10:04:18,128 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:18,129 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52, 52, 52, 52] total 52 [2018-09-18 10:04:18,129 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:18,129 INFO L459 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-09-18 10:04:18,129 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-09-18 10:04:18,129 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:18,130 INFO L87 Difference]: Start difference. First operand 243 states and 271 transitions. Second operand 52 states. [2018-09-18 10:04:18,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:18,285 INFO L93 Difference]: Finished difference Result 337 states and 394 transitions. [2018-09-18 10:04:18,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-09-18 10:04:18,285 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 242 [2018-09-18 10:04:18,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:18,287 INFO L225 Difference]: With dead ends: 337 [2018-09-18 10:04:18,287 INFO L226 Difference]: Without dead ends: 246 [2018-09-18 10:04:18,288 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1018 GetRequests, 868 SyntacticMatches, 100 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2450 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:18,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-09-18 10:04:18,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 246. [2018-09-18 10:04:18,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-09-18 10:04:18,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 274 transitions. [2018-09-18 10:04:18,293 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 274 transitions. Word has length 242 [2018-09-18 10:04:18,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:18,293 INFO L480 AbstractCegarLoop]: Abstraction has 246 states and 274 transitions. [2018-09-18 10:04:18,293 INFO L481 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-09-18 10:04:18,293 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 274 transitions. [2018-09-18 10:04:18,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2018-09-18 10:04:18,294 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:18,295 INFO L376 BasicCegarLoop]: trace histogram [79, 78, 50, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:18,295 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:18,295 INFO L82 PathProgramCache]: Analyzing trace with hash 2009613343, now seen corresponding path program 50 times [2018-09-18 10:04:18,295 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:18,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:18,296 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:18,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:18,296 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:18,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:19,163 INFO L134 CoverageAnalysis]: Checked inductivity of 9165 backedges. 4416 proven. 1365 refuted. 0 times theorem prover too weak. 3384 trivial. 0 not checked. [2018-09-18 10:04:19,163 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:19,163 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 101 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:19,171 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:19,171 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:19,228 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:19,228 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:19,231 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:20,643 INFO L134 CoverageAnalysis]: Checked inductivity of 9165 backedges. 0 proven. 9165 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:20,644 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:22,700 INFO L134 CoverageAnalysis]: Checked inductivity of 9165 backedges. 0 proven. 9165 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:22,719 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:22,720 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 102 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 102 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:22,734 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:22,734 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:22,855 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:22,855 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:22,862 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:22,914 INFO L134 CoverageAnalysis]: Checked inductivity of 9165 backedges. 0 proven. 9165 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:22,914 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:24,092 INFO L134 CoverageAnalysis]: Checked inductivity of 9165 backedges. 0 proven. 9165 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:24,093 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:24,094 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 81, 81, 81, 81] total 102 [2018-09-18 10:04:24,094 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:24,094 INFO L459 AbstractCegarLoop]: Interpolant automaton has 83 states [2018-09-18 10:04:24,095 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2018-09-18 10:04:24,095 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=5151, Invalid=5151, Unknown=0, NotChecked=0, Total=10302 [2018-09-18 10:04:24,095 INFO L87 Difference]: Start difference. First operand 246 states and 274 transitions. Second operand 83 states. [2018-09-18 10:04:26,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:26,015 INFO L93 Difference]: Finished difference Result 261 states and 295 transitions. [2018-09-18 10:04:26,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 83 states. [2018-09-18 10:04:26,015 INFO L78 Accepts]: Start accepts. Automaton has 83 states. Word has length 245 [2018-09-18 10:04:26,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:26,016 INFO L225 Difference]: With dead ends: 261 [2018-09-18 10:04:26,016 INFO L226 Difference]: Without dead ends: 256 [2018-09-18 10:04:26,016 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1011 GetRequests, 791 SyntacticMatches, 120 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19604 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=5151, Invalid=5151, Unknown=0, NotChecked=0, Total=10302 [2018-09-18 10:04:26,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-09-18 10:04:26,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 255. [2018-09-18 10:04:26,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 255 states. [2018-09-18 10:04:26,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 286 transitions. [2018-09-18 10:04:26,022 INFO L78 Accepts]: Start accepts. Automaton has 255 states and 286 transitions. Word has length 245 [2018-09-18 10:04:26,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:26,022 INFO L480 AbstractCegarLoop]: Abstraction has 255 states and 286 transitions. [2018-09-18 10:04:26,022 INFO L481 AbstractCegarLoop]: Interpolant automaton has 83 states. [2018-09-18 10:04:26,023 INFO L276 IsEmpty]: Start isEmpty. Operand 255 states and 286 transitions. [2018-09-18 10:04:26,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2018-09-18 10:04:26,024 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:26,025 INFO L376 BasicCegarLoop]: trace histogram [82, 81, 50, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:26,025 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:26,025 INFO L82 PathProgramCache]: Analyzing trace with hash 970419580, now seen corresponding path program 51 times [2018-09-18 10:04:26,025 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:26,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:26,026 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:26,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:26,026 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:26,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:26,671 INFO L134 CoverageAnalysis]: Checked inductivity of 9882 backedges. 4848 proven. 1650 refuted. 0 times theorem prover too weak. 3384 trivial. 0 not checked. [2018-09-18 10:04:26,672 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:26,672 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 103 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 103 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:26,678 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:26,679 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:26,759 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 48 check-sat command(s) [2018-09-18 10:04:26,759 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:26,763 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:26,801 INFO L134 CoverageAnalysis]: Checked inductivity of 9882 backedges. 4750 proven. 1457 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-09-18 10:04:26,801 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:27,644 INFO L134 CoverageAnalysis]: Checked inductivity of 9882 backedges. 4750 proven. 1457 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-09-18 10:04:27,664 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:27,664 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 104 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 104 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:27,679 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:27,679 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:28,247 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 48 check-sat command(s) [2018-09-18 10:04:28,247 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:28,253 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:28,287 INFO L134 CoverageAnalysis]: Checked inductivity of 9882 backedges. 4750 proven. 1457 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-09-18 10:04:28,287 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:28,635 INFO L134 CoverageAnalysis]: Checked inductivity of 9882 backedges. 4750 proven. 1457 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-09-18 10:04:28,637 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:28,637 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 34, 34, 34, 34] total 52 [2018-09-18 10:04:28,637 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:28,638 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-09-18 10:04:28,638 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-09-18 10:04:28,638 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:28,638 INFO L87 Difference]: Start difference. First operand 255 states and 286 transitions. Second operand 36 states. [2018-09-18 10:04:28,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:28,837 INFO L93 Difference]: Finished difference Result 270 states and 307 transitions. [2018-09-18 10:04:28,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-09-18 10:04:28,837 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 254 [2018-09-18 10:04:28,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:28,838 INFO L225 Difference]: With dead ends: 270 [2018-09-18 10:04:28,838 INFO L226 Difference]: Without dead ends: 265 [2018-09-18 10:04:28,839 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1050 GetRequests, 968 SyntacticMatches, 32 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 752 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:28,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265 states. [2018-09-18 10:04:28,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265 to 264. [2018-09-18 10:04:28,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 264 states. [2018-09-18 10:04:28,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 264 states to 264 states and 298 transitions. [2018-09-18 10:04:28,844 INFO L78 Accepts]: Start accepts. Automaton has 264 states and 298 transitions. Word has length 254 [2018-09-18 10:04:28,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:28,845 INFO L480 AbstractCegarLoop]: Abstraction has 264 states and 298 transitions. [2018-09-18 10:04:28,845 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-09-18 10:04:28,845 INFO L276 IsEmpty]: Start isEmpty. Operand 264 states and 298 transitions. [2018-09-18 10:04:28,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2018-09-18 10:04:28,846 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:28,847 INFO L376 BasicCegarLoop]: trace histogram [85, 84, 50, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:28,847 INFO L423 AbstractCegarLoop]: === Iteration 55 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:28,847 INFO L82 PathProgramCache]: Analyzing trace with hash -629900097, now seen corresponding path program 52 times [2018-09-18 10:04:28,847 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:28,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:28,848 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:28,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:28,848 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:28,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:29,667 INFO L134 CoverageAnalysis]: Checked inductivity of 10626 backedges. 5280 proven. 1962 refuted. 0 times theorem prover too weak. 3384 trivial. 0 not checked. [2018-09-18 10:04:29,667 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:29,667 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 105 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 105 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:29,674 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:29,674 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:29,734 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:29,734 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:29,738 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:31,040 INFO L134 CoverageAnalysis]: Checked inductivity of 10626 backedges. 0 proven. 10626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:31,040 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:33,016 INFO L134 CoverageAnalysis]: Checked inductivity of 10626 backedges. 0 proven. 10626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:33,036 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:33,036 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 106 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 106 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:33,052 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:33,052 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:33,187 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:33,187 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:33,193 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:33,270 INFO L134 CoverageAnalysis]: Checked inductivity of 10626 backedges. 0 proven. 10626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:33,271 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:34,674 INFO L134 CoverageAnalysis]: Checked inductivity of 10626 backedges. 0 proven. 10626 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:34,677 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:34,678 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 87, 87, 87, 87] total 102 [2018-09-18 10:04:34,678 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:34,678 INFO L459 AbstractCegarLoop]: Interpolant automaton has 89 states [2018-09-18 10:04:34,679 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 89 interpolants. [2018-09-18 10:04:34,679 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=5151, Invalid=5151, Unknown=0, NotChecked=0, Total=10302 [2018-09-18 10:04:34,679 INFO L87 Difference]: Start difference. First operand 264 states and 298 transitions. Second operand 89 states. [2018-09-18 10:04:35,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:35,572 INFO L93 Difference]: Finished difference Result 279 states and 319 transitions. [2018-09-18 10:04:35,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2018-09-18 10:04:35,572 INFO L78 Accepts]: Start accepts. Automaton has 89 states. Word has length 263 [2018-09-18 10:04:35,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:35,574 INFO L225 Difference]: With dead ends: 279 [2018-09-18 10:04:35,574 INFO L226 Difference]: Without dead ends: 274 [2018-09-18 10:04:35,574 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1089 GetRequests, 845 SyntacticMatches, 144 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22544 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=5151, Invalid=5151, Unknown=0, NotChecked=0, Total=10302 [2018-09-18 10:04:35,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-09-18 10:04:35,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 273. [2018-09-18 10:04:35,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273 states. [2018-09-18 10:04:35,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 310 transitions. [2018-09-18 10:04:35,580 INFO L78 Accepts]: Start accepts. Automaton has 273 states and 310 transitions. Word has length 263 [2018-09-18 10:04:35,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:35,581 INFO L480 AbstractCegarLoop]: Abstraction has 273 states and 310 transitions. [2018-09-18 10:04:35,581 INFO L481 AbstractCegarLoop]: Interpolant automaton has 89 states. [2018-09-18 10:04:35,581 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 310 transitions. [2018-09-18 10:04:35,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2018-09-18 10:04:35,582 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:35,583 INFO L376 BasicCegarLoop]: trace histogram [88, 87, 50, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:35,583 INFO L423 AbstractCegarLoop]: === Iteration 56 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:35,583 INFO L82 PathProgramCache]: Analyzing trace with hash -682563364, now seen corresponding path program 53 times [2018-09-18 10:04:35,583 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:35,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:35,584 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:35,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:35,584 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:35,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:36,960 INFO L134 CoverageAnalysis]: Checked inductivity of 11397 backedges. 5712 proven. 2301 refuted. 0 times theorem prover too weak. 3384 trivial. 0 not checked. [2018-09-18 10:04:36,960 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:36,960 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 107 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 107 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:36,967 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:36,968 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:37,122 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 88 check-sat command(s) [2018-09-18 10:04:37,122 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:37,126 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:37,490 INFO L134 CoverageAnalysis]: Checked inductivity of 11397 backedges. 5662 proven. 3626 refuted. 0 times theorem prover too weak. 2109 trivial. 0 not checked. [2018-09-18 10:04:37,490 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:38,402 INFO L134 CoverageAnalysis]: Checked inductivity of 11397 backedges. 5662 proven. 3626 refuted. 0 times theorem prover too weak. 2109 trivial. 0 not checked. [2018-09-18 10:04:38,424 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:38,424 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 108 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 108 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:38,439 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:38,439 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:39,776 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 88 check-sat command(s) [2018-09-18 10:04:39,776 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:39,782 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:39,826 INFO L134 CoverageAnalysis]: Checked inductivity of 11397 backedges. 5650 proven. 2072 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-09-18 10:04:39,827 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:40,739 INFO L134 CoverageAnalysis]: Checked inductivity of 11397 backedges. 5650 proven. 2072 refuted. 0 times theorem prover too weak. 3675 trivial. 0 not checked. [2018-09-18 10:04:40,741 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:40,741 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 52, 52, 40, 40] total 52 [2018-09-18 10:04:40,741 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:40,742 INFO L459 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-09-18 10:04:40,742 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-09-18 10:04:40,742 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:40,742 INFO L87 Difference]: Start difference. First operand 273 states and 310 transitions. Second operand 52 states. [2018-09-18 10:04:41,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:41,112 INFO L93 Difference]: Finished difference Result 317 states and 379 transitions. [2018-09-18 10:04:41,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-09-18 10:04:41,112 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 272 [2018-09-18 10:04:41,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:41,113 INFO L225 Difference]: With dead ends: 317 [2018-09-18 10:04:41,113 INFO L226 Difference]: Without dead ends: 312 [2018-09-18 10:04:41,114 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1128 GetRequests, 990 SyntacticMatches, 88 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1928 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:41,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2018-09-18 10:04:41,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 312. [2018-09-18 10:04:41,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 312 states. [2018-09-18 10:04:41,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 312 states and 362 transitions. [2018-09-18 10:04:41,118 INFO L78 Accepts]: Start accepts. Automaton has 312 states and 362 transitions. Word has length 272 [2018-09-18 10:04:41,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:41,119 INFO L480 AbstractCegarLoop]: Abstraction has 312 states and 362 transitions. [2018-09-18 10:04:41,119 INFO L481 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-09-18 10:04:41,119 INFO L276 IsEmpty]: Start isEmpty. Operand 312 states and 362 transitions. [2018-09-18 10:04:41,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 312 [2018-09-18 10:04:41,120 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:41,121 INFO L376 BasicCegarLoop]: trace histogram [101, 100, 50, 50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:41,121 INFO L423 AbstractCegarLoop]: === Iteration 57 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:41,121 INFO L82 PathProgramCache]: Analyzing trace with hash -1819528257, now seen corresponding path program 54 times [2018-09-18 10:04:41,121 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:41,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:41,122 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:41,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:41,122 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:41,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:43,415 INFO L134 CoverageAnalysis]: Checked inductivity of 15050 backedges. 0 proven. 11225 refuted. 0 times theorem prover too weak. 3825 trivial. 0 not checked. [2018-09-18 10:04:43,415 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:43,415 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 109 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 109 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:43,422 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:43,422 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:43,621 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 101 check-sat command(s) [2018-09-18 10:04:43,621 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:43,628 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:43,985 INFO L134 CoverageAnalysis]: Checked inductivity of 15050 backedges. 0 proven. 11225 refuted. 0 times theorem prover too weak. 3825 trivial. 0 not checked. [2018-09-18 10:04:43,986 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:44,405 INFO L134 CoverageAnalysis]: Checked inductivity of 15050 backedges. 0 proven. 11225 refuted. 0 times theorem prover too weak. 3825 trivial. 0 not checked. [2018-09-18 10:04:44,425 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:44,425 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 110 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 110 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:44,440 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:44,440 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:46,423 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 101 check-sat command(s) [2018-09-18 10:04:46,423 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:46,433 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:46,830 INFO L134 CoverageAnalysis]: Checked inductivity of 15050 backedges. 0 proven. 11225 refuted. 0 times theorem prover too weak. 3825 trivial. 0 not checked. [2018-09-18 10:04:46,830 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:47,173 INFO L134 CoverageAnalysis]: Checked inductivity of 15050 backedges. 0 proven. 11225 refuted. 0 times theorem prover too weak. 3825 trivial. 0 not checked. [2018-09-18 10:04:47,174 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:47,175 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 55, 55, 55, 55] total 57 [2018-09-18 10:04:47,175 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:47,175 INFO L459 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-09-18 10:04:47,175 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-09-18 10:04:47,176 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=113, Invalid=3079, Unknown=0, NotChecked=0, Total=3192 [2018-09-18 10:04:47,176 INFO L87 Difference]: Start difference. First operand 312 states and 362 transitions. Second operand 55 states. [2018-09-18 10:04:49,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:49,388 INFO L93 Difference]: Finished difference Result 4294 states and 5669 transitions. [2018-09-18 10:04:49,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-09-18 10:04:49,388 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 311 [2018-09-18 10:04:49,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:49,406 INFO L225 Difference]: With dead ends: 4294 [2018-09-18 10:04:49,406 INFO L226 Difference]: Without dead ends: 4289 [2018-09-18 10:04:49,408 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1298 GetRequests, 1232 SyntacticMatches, 10 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=119, Invalid=3187, Unknown=0, NotChecked=0, Total=3306 [2018-09-18 10:04:49,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4289 states. [2018-09-18 10:04:49,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4289 to 315. [2018-09-18 10:04:49,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2018-09-18 10:04:49,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 366 transitions. [2018-09-18 10:04:49,480 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 366 transitions. Word has length 311 [2018-09-18 10:04:49,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:49,481 INFO L480 AbstractCegarLoop]: Abstraction has 315 states and 366 transitions. [2018-09-18 10:04:49,481 INFO L481 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-09-18 10:04:49,481 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 366 transitions. [2018-09-18 10:04:49,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 315 [2018-09-18 10:04:49,482 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:49,483 INFO L376 BasicCegarLoop]: trace histogram [102, 101, 51, 50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:49,483 INFO L423 AbstractCegarLoop]: === Iteration 58 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:49,483 INFO L82 PathProgramCache]: Analyzing trace with hash 908591292, now seen corresponding path program 55 times [2018-09-18 10:04:49,483 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:49,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:49,484 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:49,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:49,485 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:49,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:51,826 INFO L134 CoverageAnalysis]: Checked inductivity of 15352 backedges. 11527 proven. 0 refuted. 0 times theorem prover too weak. 3825 trivial. 0 not checked. [2018-09-18 10:04:51,826 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:04:51,826 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [52] imperfect sequences [] total 52 [2018-09-18 10:04:51,827 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:04:51,827 INFO L459 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-09-18 10:04:51,827 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-09-18 10:04:51,827 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:51,828 INFO L87 Difference]: Start difference. First operand 315 states and 366 transitions. Second operand 52 states. [2018-09-18 10:04:52,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:52,150 INFO L93 Difference]: Finished difference Result 464 states and 564 transitions. [2018-09-18 10:04:52,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-09-18 10:04:52,151 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 314 [2018-09-18 10:04:52,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:52,152 INFO L225 Difference]: With dead ends: 464 [2018-09-18 10:04:52,152 INFO L226 Difference]: Without dead ends: 0 [2018-09-18 10:04:52,153 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:04:52,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-09-18 10:04:52,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-09-18 10:04:52,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-09-18 10:04:52,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-09-18 10:04:52,154 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 314 [2018-09-18 10:04:52,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:52,155 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-09-18 10:04:52,155 INFO L481 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-09-18 10:04:52,155 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-09-18 10:04:52,155 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-09-18 10:04:52,160 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-09-18 10:04:52,978 WARN L178 SmtUtils]: Spent 800.00 ms on a formula simplification. DAG size of input: 1832 DAG size of output: 407 [2018-09-18 10:04:55,841 WARN L178 SmtUtils]: Spent 2.80 s on a formula simplification. DAG size of input: 407 DAG size of output: 357 [2018-09-18 10:04:55,851 INFO L429 ceAbstractionStarter]: At program point ULTIMATE.initFINAL(line -1) the Hoare annotation is: true [2018-09-18 10:04:55,852 INFO L426 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-09-18 10:04:55,852 INFO L426 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-09-18 10:04:55,852 INFO L429 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-09-18 10:04:55,852 INFO L429 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-09-18 10:04:55,852 INFO L426 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-09-18 10:04:55,852 INFO L429 ceAbstractionStarter]: At program point mainENTRY(lines 10 23) the Hoare annotation is: true [2018-09-18 10:04:55,852 INFO L426 ceAbstractionStarter]: For program point mainEXIT(lines 10 23) no Hoare annotation was computed. [2018-09-18 10:04:55,853 INFO L426 ceAbstractionStarter]: For program point L21(line 21) no Hoare annotation was computed. [2018-09-18 10:04:55,853 INFO L426 ceAbstractionStarter]: For program point L14(lines 14 19) no Hoare annotation was computed. [2018-09-18 10:04:55,853 INFO L426 ceAbstractionStarter]: For program point mainFINAL(lines 10 23) no Hoare annotation was computed. [2018-09-18 10:04:55,853 INFO L426 ceAbstractionStarter]: For program point L13-1(lines 13 20) no Hoare annotation was computed. [2018-09-18 10:04:55,855 INFO L422 ceAbstractionStarter]: At program point L14-2(lines 13 20) the Hoare annotation is: (or (and (and (<= main_~x~0 99) (<= 99 main_~y~0) (<= main_~y~0 99)) (<= 99 main_~x~0)) (and (and (<= main_~y~0 92) (<= 92 main_~y~0) (<= main_~x~0 92)) (<= 92 main_~x~0)) (and (<= 65 main_~x~0) (and (<= main_~y~0 65) (<= 65 main_~y~0) (<= main_~x~0 65))) (and (and (<= main_~y~0 100) (< 99 main_~y~0)) (<= 100 main_~x~0)) (and (<= 64 main_~x~0) (and (<= main_~x~0 64) (<= 64 main_~y~0) (<= main_~y~0 64))) (and (<= 76 main_~x~0) (and (<= main_~y~0 76) (<= main_~x~0 76) (<= 76 main_~y~0))) (and (<= 87 main_~x~0) (and (<= main_~x~0 87) (<= main_~y~0 87) (<= 87 main_~y~0))) (and (and (<= main_~y~0 78) (<= 78 main_~y~0) (<= main_~x~0 78)) (<= 78 main_~x~0)) (and (<= 72 main_~x~0) (and (<= main_~y~0 72) (<= main_~x~0 72) (<= 72 main_~y~0))) (and (and (<= main_~y~0 69) (<= 69 main_~y~0) (<= main_~x~0 69)) (<= 69 main_~x~0)) (and (<= 60 main_~x~0) (and (<= main_~x~0 60) (<= main_~y~0 60) (<= 60 main_~y~0))) (and (<= 67 main_~x~0) (and (<= main_~y~0 67) (<= main_~x~0 67) (<= 67 main_~y~0))) (and (and (<= main_~y~0 55) (<= 55 main_~y~0) (<= main_~x~0 55)) (<= 55 main_~x~0)) (and (and (<= 73 main_~y~0) (<= main_~x~0 73) (<= main_~y~0 73)) (<= 73 main_~x~0)) (and (<= 66 main_~x~0) (and (<= main_~y~0 66) (<= 66 main_~y~0) (<= main_~x~0 66))) (and (and (<= main_~x~0 70) (<= main_~y~0 70) (<= 70 main_~y~0)) (<= 70 main_~x~0)) (and (and (<= main_~x~0 95) (<= main_~y~0 95) (<= 95 main_~y~0)) (<= 95 main_~x~0)) (and (and (<= 90 main_~y~0) (<= main_~y~0 90) (<= main_~x~0 90)) (<= 90 main_~x~0)) (and (and (<= main_~y~0 59) (<= main_~x~0 59) (<= 59 main_~y~0)) (<= 59 main_~x~0)) (and (<= 85 main_~x~0) (and (<= 85 main_~y~0) (<= main_~x~0 85) (<= main_~y~0 85))) (and (<= 63 main_~x~0) (and (<= main_~y~0 63) (<= main_~x~0 63) (<= 63 main_~y~0))) (and (and (<= main_~y~0 77) (<= main_~x~0 77) (<= 77 main_~y~0)) (<= 77 main_~x~0)) (and (<= 53 main_~x~0) (and (<= main_~y~0 53) (<= main_~x~0 53) (<= 53 main_~y~0))) (and (and (<= main_~x~0 79) (<= main_~y~0 79) (<= 79 main_~y~0)) (<= 79 main_~x~0)) (and (<= 68 main_~x~0) (and (<= 68 main_~y~0) (<= main_~y~0 68) (<= main_~x~0 68))) (and (<= 51 main_~x~0) (and (<= 51 main_~y~0) (<= main_~x~0 51) (<= main_~y~0 51))) (and (<= 54 main_~x~0) (and (<= main_~x~0 54) (<= 54 main_~y~0) (<= main_~y~0 54))) (and (and (<= 56 main_~y~0) (<= main_~x~0 56) (<= main_~y~0 56)) (<= 56 main_~x~0)) (and (<= 61 main_~x~0) (and (<= main_~y~0 61) (<= 61 main_~y~0) (<= main_~x~0 61))) (and (<= 88 main_~x~0) (and (<= main_~x~0 88) (<= main_~y~0 88) (<= 88 main_~y~0))) (and (<= main_~y~0 50) (<= main_~x~0 50) (<= 50 main_~y~0)) (and (<= 80 main_~x~0) (and (<= main_~x~0 80) (<= 80 main_~y~0) (<= main_~y~0 80))) (and (<= 94 main_~x~0) (and (<= main_~x~0 94) (<= main_~y~0 94) (<= 94 main_~y~0))) (and (<= 89 main_~x~0) (and (<= 89 main_~y~0) (<= main_~y~0 89) (<= main_~x~0 89))) (and (and (<= 86 main_~y~0) (<= main_~x~0 86) (<= main_~y~0 86)) (<= 86 main_~x~0)) (and (<= 58 main_~x~0) (and (<= main_~x~0 58) (<= main_~y~0 58) (<= 58 main_~y~0))) (and (and (<= main_~x~0 91) (<= 91 main_~y~0) (<= main_~y~0 91)) (<= 91 main_~x~0)) (and (and (<= 52 main_~y~0) (<= main_~y~0 52) (<= main_~x~0 52)) (<= 52 main_~x~0)) (and (<= 93 main_~x~0) (and (<= main_~x~0 93) (<= 93 main_~y~0) (<= main_~y~0 93))) (and (<= 74 main_~x~0) (and (<= 74 main_~y~0) (<= main_~y~0 74) (<= main_~x~0 74))) (and (and (<= main_~y~0 71) (<= main_~x~0 71) (<= 71 main_~y~0)) (<= 71 main_~x~0)) (and (<= 57 main_~x~0) (and (<= 57 main_~y~0) (<= main_~x~0 57) (<= main_~y~0 57))) (and (<= 97 main_~x~0) (and (<= 97 main_~y~0) (<= main_~x~0 97) (<= main_~y~0 97))) (and (and (<= main_~x~0 81) (<= 81 main_~y~0) (<= main_~y~0 81)) (<= 81 main_~x~0)) (and (<= 84 main_~x~0) (and (<= main_~y~0 84) (<= 84 main_~y~0) (<= main_~x~0 84))) (and (and (<= 96 main_~y~0) (<= main_~x~0 96) (<= main_~y~0 96)) (<= 96 main_~x~0)) (and (<= 83 main_~x~0) (and (<= main_~y~0 83) (<= 83 main_~y~0) (<= main_~x~0 83))) (and (<= 62 main_~x~0) (and (<= main_~y~0 62) (<= main_~x~0 62) (<= 62 main_~y~0))) (and (and (<= main_~x~0 98) (<= main_~y~0 98) (<= 98 main_~y~0)) (<= 98 main_~x~0)) (and (and (<= 75 main_~y~0) (<= main_~x~0 75) (<= main_~y~0 75)) (<= 75 main_~x~0)) (and (and (<= 82 main_~y~0) (<= main_~y~0 82) (<= main_~x~0 82)) (<= 82 main_~x~0))) [2018-09-18 10:04:55,855 INFO L422 ceAbstractionStarter]: At program point L13-3(lines 13 20) the Hoare annotation is: (and (<= main_~y~0 100) (< 99 main_~y~0)) [2018-09-18 10:04:55,855 INFO L429 ceAbstractionStarter]: At program point __VERIFIER_assertENTRY(lines 3 8) the Hoare annotation is: true [2018-09-18 10:04:55,856 INFO L426 ceAbstractionStarter]: For program point __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION(line 5) no Hoare annotation was computed. [2018-09-18 10:04:55,856 INFO L426 ceAbstractionStarter]: For program point __VERIFIER_assertEXIT(lines 3 8) no Hoare annotation was computed. [2018-09-18 10:04:55,856 INFO L426 ceAbstractionStarter]: For program point L5(line 5) no Hoare annotation was computed. [2018-09-18 10:04:55,856 INFO L426 ceAbstractionStarter]: For program point L4(lines 4 6) no Hoare annotation was computed. [2018-09-18 10:04:55,856 INFO L426 ceAbstractionStarter]: For program point L4-2(lines 3 8) no Hoare annotation was computed. [2018-09-18 10:04:55,883 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.09 10:04:55 BoogieIcfgContainer [2018-09-18 10:04:55,883 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-18 10:04:55,884 INFO L168 Benchmark]: Toolchain (without parser) took 156862.30 ms. Allocated memory was 1.5 GB in the beginning and 2.6 GB in the end (delta: 1.1 GB). Free memory was 1.4 GB in the beginning and 2.0 GB in the end (delta: -605.4 MB). Peak memory consumption was 449.5 MB. Max. memory is 7.1 GB. [2018-09-18 10:04:55,885 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:04:55,885 INFO L168 Benchmark]: CACSL2BoogieTranslator took 269.61 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-09-18 10:04:55,885 INFO L168 Benchmark]: Boogie Procedure Inliner took 24.91 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:04:55,886 INFO L168 Benchmark]: Boogie Preprocessor took 25.54 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:04:55,886 INFO L168 Benchmark]: RCFGBuilder took 371.01 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 717.2 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -767.9 MB). Peak memory consumption was 26.7 MB. Max. memory is 7.1 GB. [2018-09-18 10:04:55,887 INFO L168 Benchmark]: TraceAbstraction took 156161.94 ms. Allocated memory was 2.2 GB in the beginning and 2.6 GB in the end (delta: 337.6 MB). Free memory was 2.2 GB in the beginning and 2.0 GB in the end (delta: 151.9 MB). Peak memory consumption was 489.6 MB. Max. memory is 7.1 GB. [2018-09-18 10:04:55,889 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 269.61 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 24.91 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 25.54 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 371.01 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 717.2 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -767.9 MB). Peak memory consumption was 26.7 MB. Max. memory is 7.1 GB. * TraceAbstraction took 156161.94 ms. Allocated memory was 2.2 GB in the beginning and 2.6 GB in the end (delta: 337.6 MB). Free memory was 2.2 GB in the beginning and 2.0 GB in the end (delta: 151.9 MB). Peak memory consumption was 489.6 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 5]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 13]: Loop Invariant Derived loop invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((x <= 99 && 99 <= y) && y <= 99) && 99 <= x) || (((y <= 92 && 92 <= y) && x <= 92) && 92 <= x)) || (65 <= x && (y <= 65 && 65 <= y) && x <= 65)) || ((y <= 100 && 99 < y) && 100 <= x)) || (64 <= x && (x <= 64 && 64 <= y) && y <= 64)) || (76 <= x && (y <= 76 && x <= 76) && 76 <= y)) || (87 <= x && (x <= 87 && y <= 87) && 87 <= y)) || (((y <= 78 && 78 <= y) && x <= 78) && 78 <= x)) || (72 <= x && (y <= 72 && x <= 72) && 72 <= y)) || (((y <= 69 && 69 <= y) && x <= 69) && 69 <= x)) || (60 <= x && (x <= 60 && y <= 60) && 60 <= y)) || (67 <= x && (y <= 67 && x <= 67) && 67 <= y)) || (((y <= 55 && 55 <= y) && x <= 55) && 55 <= x)) || (((73 <= y && x <= 73) && y <= 73) && 73 <= x)) || (66 <= x && (y <= 66 && 66 <= y) && x <= 66)) || (((x <= 70 && y <= 70) && 70 <= y) && 70 <= x)) || (((x <= 95 && y <= 95) && 95 <= y) && 95 <= x)) || (((90 <= y && y <= 90) && x <= 90) && 90 <= x)) || (((y <= 59 && x <= 59) && 59 <= y) && 59 <= x)) || (85 <= x && (85 <= y && x <= 85) && y <= 85)) || (63 <= x && (y <= 63 && x <= 63) && 63 <= y)) || (((y <= 77 && x <= 77) && 77 <= y) && 77 <= x)) || (53 <= x && (y <= 53 && x <= 53) && 53 <= y)) || (((x <= 79 && y <= 79) && 79 <= y) && 79 <= x)) || (68 <= x && (68 <= y && y <= 68) && x <= 68)) || (51 <= x && (51 <= y && x <= 51) && y <= 51)) || (54 <= x && (x <= 54 && 54 <= y) && y <= 54)) || (((56 <= y && x <= 56) && y <= 56) && 56 <= x)) || (61 <= x && (y <= 61 && 61 <= y) && x <= 61)) || (88 <= x && (x <= 88 && y <= 88) && 88 <= y)) || ((y <= 50 && x <= 50) && 50 <= y)) || (80 <= x && (x <= 80 && 80 <= y) && y <= 80)) || (94 <= x && (x <= 94 && y <= 94) && 94 <= y)) || (89 <= x && (89 <= y && y <= 89) && x <= 89)) || (((86 <= y && x <= 86) && y <= 86) && 86 <= x)) || (58 <= x && (x <= 58 && y <= 58) && 58 <= y)) || (((x <= 91 && 91 <= y) && y <= 91) && 91 <= x)) || (((52 <= y && y <= 52) && x <= 52) && 52 <= x)) || (93 <= x && (x <= 93 && 93 <= y) && y <= 93)) || (74 <= x && (74 <= y && y <= 74) && x <= 74)) || (((y <= 71 && x <= 71) && 71 <= y) && 71 <= x)) || (57 <= x && (57 <= y && x <= 57) && y <= 57)) || (97 <= x && (97 <= y && x <= 97) && y <= 97)) || (((x <= 81 && 81 <= y) && y <= 81) && 81 <= x)) || (84 <= x && (y <= 84 && 84 <= y) && x <= 84)) || (((96 <= y && x <= 96) && y <= 96) && 96 <= x)) || (83 <= x && (y <= 83 && 83 <= y) && x <= 83)) || (62 <= x && (y <= 62 && x <= 62) && 62 <= y)) || (((x <= 98 && y <= 98) && 98 <= y) && 98 <= x)) || (((75 <= y && x <= 75) && y <= 75) && 75 <= x)) || (((82 <= y && y <= 82) && x <= 82) && 82 <= x) - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 20 locations, 1 error locations. SAFE Result, 156.0s OverallTime, 58 OverallIterations, 102 TraceHistogramMax, 15.7s AutomataDifference, 0.0s DeadEndRemovalTime, 3.6s HoareAnnotationTime, HoareTripleCheckerStatistics: 887 SDtfs, 708 SDslu, 15252 SDs, 0 SdLazy, 7859 SolverSat, 1969 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 11.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 33778 GetRequests, 29751 SyntacticMatches, 1526 SemanticMatches, 2501 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72565 ImplicationChecksByTransitivity, 102.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=315occurred in iteration=57, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 58 MinimizatonAttempts, 3988 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 7 LocationsWithAnnotation, 64 PreInvPairs, 166 NumberOfFragments, 720 HoareAnnotationTreeSize, 64 FomulaSimplifications, 13400 FormulaSimplificationTreeSizeReduction, 0.8s HoareSimplificationTime, 7 FomulaSimplificationsInter, 200 FormulaSimplificationTreeSizeReductionInter, 2.8s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.5s SsaConstructionTime, 19.5s SatisfiabilityAnalysisTime, 111.9s InterpolantComputationTime, 24528 NumberOfCodeBlocks, 23544 NumberOfCodeBlocksAsserted, 2455 NumberOfCheckSat, 40376 ConstructedInterpolants, 0 QuantifiedInterpolants, 18639664 SizeOfPredicates, 58 NumberOfNonLiveVariables, 29976 ConjunctsInSsa, 3252 ConjunctsInUnsatCore, 276 InterpolantComputations, 5 PerfectInterpolantSequences, 700100/1151308 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/gj2007_true-unreach-call_true-termination.c.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-09-18_10-04-55-905.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/gj2007_true-unreach-call_true-termination.c.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-18_10-04-55-905.csv Received shutdown request...