java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-69f5bdd-m [2018-09-18 09:57:11,381 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-18 09:57:11,383 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-18 09:57:11,400 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-18 09:57:11,400 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-18 09:57:11,403 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-18 09:57:11,405 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-18 09:57:11,407 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-18 09:57:11,409 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-18 09:57:11,410 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-18 09:57:11,411 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-18 09:57:11,412 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-18 09:57:11,413 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-18 09:57:11,421 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-18 09:57:11,423 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-18 09:57:11,425 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-18 09:57:11,426 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-18 09:57:11,429 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-18 09:57:11,433 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-18 09:57:11,434 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-18 09:57:11,435 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-18 09:57:11,438 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-18 09:57:11,444 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-18 09:57:11,444 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-18 09:57:11,444 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-18 09:57:11,446 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-18 09:57:11,447 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-18 09:57:11,447 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-18 09:57:11,448 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-18 09:57:11,449 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-18 09:57:11,449 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-18 09:57:11,451 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-09-18 09:57:11,456 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-18 09:57:11,475 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-18 09:57:11,475 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-18 09:57:11,476 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-18 09:57:11,476 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-18 09:57:11,476 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-18 09:57:11,477 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-18 09:57:11,477 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-18 09:57:11,477 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-18 09:57:11,477 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-18 09:57:11,477 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-18 09:57:11,478 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-09-18 09:57:11,478 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-18 09:57:11,478 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-18 09:57:11,479 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-18 09:57:11,479 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-18 09:57:11,479 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-18 09:57:11,479 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-18 09:57:11,479 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-18 09:57:11,480 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-18 09:57:11,480 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-18 09:57:11,480 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-18 09:57:11,480 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-18 09:57:11,481 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-18 09:57:11,481 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-18 09:57:11,481 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 09:57:11,481 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-18 09:57:11,481 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-18 09:57:11,482 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-18 09:57:11,482 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-18 09:57:11,482 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-18 09:57:11,482 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-18 09:57:11,482 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-18 09:57:11,482 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-18 09:57:11,483 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-18 09:57:11,526 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-18 09:57:11,541 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-18 09:57:11,546 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-18 09:57:11,547 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-18 09:57:11,548 INFO L276 PluginConnector]: CDTParser initialized [2018-09-18 09:57:11,549 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i [2018-09-18 09:57:11,906 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2b6ad2d1d/f217ef83723d4addb1834bcbddbea8b2/FLAG6e677ec92 [2018-09-18 09:57:12,021 INFO L277 CDTParser]: Found 1 translation units. [2018-09-18 09:57:12,022 INFO L159 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/phases_true-unreach-call1.i [2018-09-18 09:57:12,028 INFO L325 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2b6ad2d1d/f217ef83723d4addb1834bcbddbea8b2/FLAG6e677ec92 [2018-09-18 09:57:12,043 INFO L333 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2b6ad2d1d/f217ef83723d4addb1834bcbddbea8b2 [2018-09-18 09:57:12,053 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-18 09:57:12,056 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-18 09:57:12,057 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-18 09:57:12,057 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-18 09:57:12,063 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-18 09:57:12,064 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,067 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@b8af73 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12, skipping insertion in model container [2018-09-18 09:57:12,067 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,078 INFO L160 ieTranslatorObserver]: Starting translation in SV-COMP mode [2018-09-18 09:57:12,317 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 09:57:12,336 INFO L424 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-18 09:57:12,340 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 09:57:12,355 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12 WrapperNode [2018-09-18 09:57:12,355 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-18 09:57:12,356 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-18 09:57:12,356 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-18 09:57:12,356 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-18 09:57:12,365 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,371 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,378 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-18 09:57:12,379 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-18 09:57:12,379 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-18 09:57:12,379 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-18 09:57:12,390 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,390 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,391 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,391 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,394 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,400 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,402 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (1/1) ... [2018-09-18 09:57:12,409 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-18 09:57:12,410 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-18 09:57:12,410 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-18 09:57:12,410 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-18 09:57:12,411 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 09:57:12,486 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-18 09:57:12,486 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-18 09:57:12,486 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-18 09:57:12,486 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-18 09:57:12,487 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-18 09:57:12,487 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-18 09:57:12,487 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-09-18 09:57:12,487 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-09-18 09:57:12,722 INFO L356 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-18 09:57:12,723 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 09:57:12 BoogieIcfgContainer [2018-09-18 09:57:12,723 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-18 09:57:12,724 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-18 09:57:12,724 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-18 09:57:12,727 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-18 09:57:12,727 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.09 09:57:12" (1/3) ... [2018-09-18 09:57:12,728 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5df62bcf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 09:57:12, skipping insertion in model container [2018-09-18 09:57:12,728 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 09:57:12" (2/3) ... [2018-09-18 09:57:12,729 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5df62bcf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 09:57:12, skipping insertion in model container [2018-09-18 09:57:12,729 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 09:57:12" (3/3) ... [2018-09-18 09:57:12,731 INFO L112 eAbstractionObserver]: Analyzing ICFG phases_true-unreach-call1.i [2018-09-18 09:57:12,740 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-18 09:57:12,747 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-18 09:57:12,796 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-18 09:57:12,797 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-18 09:57:12,797 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-18 09:57:12,797 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-18 09:57:12,797 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-18 09:57:12,797 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-18 09:57:12,797 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-18 09:57:12,797 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-18 09:57:12,798 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-18 09:57:12,815 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states. [2018-09-18 09:57:12,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-09-18 09:57:12,821 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:12,822 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:12,823 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:12,828 INFO L82 PathProgramCache]: Analyzing trace with hash 1713253442, now seen corresponding path program 1 times [2018-09-18 09:57:12,831 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:12,877 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:12,877 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:12,877 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:12,878 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:12,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:12,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:12,931 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 09:57:12,931 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-18 09:57:12,932 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 09:57:12,936 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-18 09:57:12,951 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-18 09:57:12,951 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 09:57:12,954 INFO L87 Difference]: Start difference. First operand 19 states. Second operand 2 states. [2018-09-18 09:57:12,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:12,972 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-09-18 09:57:12,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-18 09:57:12,974 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-09-18 09:57:12,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:12,984 INFO L225 Difference]: With dead ends: 30 [2018-09-18 09:57:12,984 INFO L226 Difference]: Without dead ends: 13 [2018-09-18 09:57:12,988 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 09:57:13,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2018-09-18 09:57:13,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-09-18 09:57:13,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-09-18 09:57:13,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2018-09-18 09:57:13,023 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 10 [2018-09-18 09:57:13,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:13,023 INFO L480 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2018-09-18 09:57:13,023 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-18 09:57:13,023 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2018-09-18 09:57:13,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-09-18 09:57:13,024 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:13,024 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:13,025 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:13,025 INFO L82 PathProgramCache]: Analyzing trace with hash 1144102878, now seen corresponding path program 1 times [2018-09-18 09:57:13,025 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:13,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:13,027 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:13,027 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:13,027 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:13,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:13,180 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:13,181 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 09:57:13,181 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-09-18 09:57:13,181 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 09:57:13,183 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-18 09:57:13,183 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-18 09:57:13,183 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-18 09:57:13,184 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand 3 states. [2018-09-18 09:57:13,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:13,272 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2018-09-18 09:57:13,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-18 09:57:13,272 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-09-18 09:57:13,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:13,273 INFO L225 Difference]: With dead ends: 24 [2018-09-18 09:57:13,274 INFO L226 Difference]: Without dead ends: 16 [2018-09-18 09:57:13,275 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-18 09:57:13,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-09-18 09:57:13,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-09-18 09:57:13,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-09-18 09:57:13,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2018-09-18 09:57:13,280 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 17 transitions. Word has length 11 [2018-09-18 09:57:13,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:13,280 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 17 transitions. [2018-09-18 09:57:13,280 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-18 09:57:13,280 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 17 transitions. [2018-09-18 09:57:13,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-09-18 09:57:13,281 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:13,281 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:13,281 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:13,282 INFO L82 PathProgramCache]: Analyzing trace with hash -2056921797, now seen corresponding path program 1 times [2018-09-18 09:57:13,282 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:13,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:13,283 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:13,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:13,284 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:13,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:13,387 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:13,388 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:13,388 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:13,403 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:13,404 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 09:57:13,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:13,436 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:13,492 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:13,492 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:13,549 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:13,572 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:13,572 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:13,592 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:13,592 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 09:57:13,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:13,614 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:13,629 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:13,630 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:13,688 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:13,691 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:13,691 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 6 [2018-09-18 09:57:13,691 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:13,692 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-18 09:57:13,692 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-18 09:57:13,692 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-09-18 09:57:13,693 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. Second operand 4 states. [2018-09-18 09:57:13,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:13,808 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2018-09-18 09:57:13,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-18 09:57:13,808 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-09-18 09:57:13,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:13,809 INFO L225 Difference]: With dead ends: 27 [2018-09-18 09:57:13,809 INFO L226 Difference]: Without dead ends: 19 [2018-09-18 09:57:13,810 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-09-18 09:57:13,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-09-18 09:57:13,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-09-18 09:57:13,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-09-18 09:57:13,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2018-09-18 09:57:13,818 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 14 [2018-09-18 09:57:13,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:13,818 INFO L480 AbstractCegarLoop]: Abstraction has 19 states and 20 transitions. [2018-09-18 09:57:13,818 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-18 09:57:13,818 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 20 transitions. [2018-09-18 09:57:13,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-09-18 09:57:13,819 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:13,819 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:13,820 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:13,820 INFO L82 PathProgramCache]: Analyzing trace with hash 1670825662, now seen corresponding path program 2 times [2018-09-18 09:57:13,820 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:13,821 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:13,821 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:13,821 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:13,822 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:13,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:14,033 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:14,033 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:14,033 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:14,050 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 09:57:14,051 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 09:57:14,082 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 09:57:14,082 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:14,084 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:14,154 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:14,154 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:14,302 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:14,325 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:14,325 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:14,342 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 09:57:14,342 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 09:57:14,366 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 09:57:14,367 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:14,371 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:14,399 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:14,399 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:14,443 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:14,446 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:14,446 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-09-18 09:57:14,446 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:14,446 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-18 09:57:14,447 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-18 09:57:14,447 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-09-18 09:57:14,447 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. Second operand 5 states. [2018-09-18 09:57:14,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:14,502 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-09-18 09:57:14,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-18 09:57:14,503 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-09-18 09:57:14,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:14,504 INFO L225 Difference]: With dead ends: 30 [2018-09-18 09:57:14,505 INFO L226 Difference]: Without dead ends: 22 [2018-09-18 09:57:14,505 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-09-18 09:57:14,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-09-18 09:57:14,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-09-18 09:57:14,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-09-18 09:57:14,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2018-09-18 09:57:14,511 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 23 transitions. Word has length 17 [2018-09-18 09:57:14,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:14,511 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 23 transitions. [2018-09-18 09:57:14,511 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-18 09:57:14,511 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2018-09-18 09:57:14,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-09-18 09:57:14,512 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:14,512 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:14,512 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:14,513 INFO L82 PathProgramCache]: Analyzing trace with hash 26004059, now seen corresponding path program 3 times [2018-09-18 09:57:14,513 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:14,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:14,514 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 09:57:14,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:14,514 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:14,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:14,746 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:14,746 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:14,746 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:14,755 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 09:57:14,756 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 09:57:14,764 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-09-18 09:57:14,765 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:14,766 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:14,796 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-09-18 09:57:14,796 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:14,823 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-09-18 09:57:14,844 INFO L313 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-09-18 09:57:14,844 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [6] total 8 [2018-09-18 09:57:14,844 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 09:57:14,845 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-18 09:57:14,845 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-18 09:57:14,845 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-09-18 09:57:14,846 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. Second operand 3 states. [2018-09-18 09:57:14,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:14,883 INFO L93 Difference]: Finished difference Result 30 states and 32 transitions. [2018-09-18 09:57:14,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-18 09:57:14,883 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2018-09-18 09:57:14,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:14,885 INFO L225 Difference]: With dead ends: 30 [2018-09-18 09:57:14,885 INFO L226 Difference]: Without dead ends: 25 [2018-09-18 09:57:14,886 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-09-18 09:57:14,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-09-18 09:57:14,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2018-09-18 09:57:14,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-09-18 09:57:14,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 25 transitions. [2018-09-18 09:57:14,891 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 25 transitions. Word has length 20 [2018-09-18 09:57:14,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:14,892 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 25 transitions. [2018-09-18 09:57:14,892 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-18 09:57:14,892 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 25 transitions. [2018-09-18 09:57:14,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-09-18 09:57:14,893 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:14,893 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:14,893 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:14,894 INFO L82 PathProgramCache]: Analyzing trace with hash -2092450784, now seen corresponding path program 1 times [2018-09-18 09:57:14,894 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:14,894 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:14,895 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 09:57:14,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:14,895 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:14,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:15,045 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:15,046 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:15,046 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:15,054 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:15,054 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 09:57:15,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:15,066 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:15,104 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:15,104 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:15,610 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:15,631 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:15,631 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:15,648 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:15,648 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 09:57:15,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:15,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:15,699 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:15,699 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:15,826 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 8 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:15,838 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:15,838 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 7, 6, 6] total 15 [2018-09-18 09:57:15,838 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:15,839 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-09-18 09:57:15,840 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-09-18 09:57:15,840 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=133, Unknown=0, NotChecked=0, Total=210 [2018-09-18 09:57:15,841 INFO L87 Difference]: Start difference. First operand 24 states and 25 transitions. Second operand 7 states. [2018-09-18 09:57:15,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:15,963 INFO L93 Difference]: Finished difference Result 37 states and 40 transitions. [2018-09-18 09:57:15,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-09-18 09:57:15,963 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-09-18 09:57:15,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:15,964 INFO L225 Difference]: With dead ends: 37 [2018-09-18 09:57:15,964 INFO L226 Difference]: Without dead ends: 27 [2018-09-18 09:57:15,965 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 81 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=77, Invalid=133, Unknown=0, NotChecked=0, Total=210 [2018-09-18 09:57:15,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-09-18 09:57:15,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-09-18 09:57:15,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-09-18 09:57:15,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2018-09-18 09:57:15,970 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 23 [2018-09-18 09:57:15,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:15,971 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2018-09-18 09:57:15,971 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-09-18 09:57:15,971 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2018-09-18 09:57:15,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-09-18 09:57:15,972 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:15,972 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:15,972 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:15,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1956763133, now seen corresponding path program 2 times [2018-09-18 09:57:15,973 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:15,973 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:15,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:15,974 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:15,974 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:15,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:16,415 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:16,415 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:16,415 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:16,424 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 09:57:16,424 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 09:57:16,435 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 09:57:16,435 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:16,440 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:16,465 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:16,465 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:16,655 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:16,676 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:16,676 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:16,702 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 09:57:16,702 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 09:57:16,726 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 09:57:16,727 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:16,730 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:16,765 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:16,765 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:16,784 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:16,785 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:16,786 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-09-18 09:57:16,786 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:16,786 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-09-18 09:57:16,786 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-09-18 09:57:16,787 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-18 09:57:16,787 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand 8 states. [2018-09-18 09:57:16,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:16,923 INFO L93 Difference]: Finished difference Result 40 states and 43 transitions. [2018-09-18 09:57:16,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-18 09:57:16,924 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-09-18 09:57:16,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:16,925 INFO L225 Difference]: With dead ends: 40 [2018-09-18 09:57:16,925 INFO L226 Difference]: Without dead ends: 30 [2018-09-18 09:57:16,925 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 96 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-18 09:57:16,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-09-18 09:57:16,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-09-18 09:57:16,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-09-18 09:57:16,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 31 transitions. [2018-09-18 09:57:16,930 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 31 transitions. Word has length 26 [2018-09-18 09:57:16,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:16,931 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 31 transitions. [2018-09-18 09:57:16,931 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-09-18 09:57:16,931 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2018-09-18 09:57:16,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-09-18 09:57:16,932 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:16,932 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:16,932 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:16,932 INFO L82 PathProgramCache]: Analyzing trace with hash -657878272, now seen corresponding path program 3 times [2018-09-18 09:57:16,933 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:16,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:16,933 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 09:57:16,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:16,934 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:16,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:17,121 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:17,122 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:17,122 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:17,132 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 09:57:17,132 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 09:57:17,150 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-18 09:57:17,151 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:17,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:17,217 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-18 09:57:17,217 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:17,275 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-18 09:57:17,295 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:17,296 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:17,313 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 09:57:17,313 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 09:57:17,353 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-18 09:57:17,353 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:17,357 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:17,375 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-09-18 09:57:17,375 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:17,432 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (12)] Exception during sending of exit command (exit): Broken pipe [2018-09-18 09:57:17,436 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:17,436 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 4, 4, 4, 4] total 13 [2018-09-18 09:57:17,436 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:17,437 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-18 09:57:17,437 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-18 09:57:17,437 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=105, Unknown=0, NotChecked=0, Total=156 [2018-09-18 09:57:17,438 INFO L87 Difference]: Start difference. First operand 30 states and 31 transitions. Second operand 11 states. [2018-09-18 09:57:17,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:17,842 INFO L93 Difference]: Finished difference Result 50 states and 57 transitions. [2018-09-18 09:57:17,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-18 09:57:17,843 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 29 [2018-09-18 09:57:17,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:17,844 INFO L225 Difference]: With dead ends: 50 [2018-09-18 09:57:17,844 INFO L226 Difference]: Without dead ends: 40 [2018-09-18 09:57:17,844 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 112 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-18 09:57:17,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-09-18 09:57:17,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 36. [2018-09-18 09:57:17,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-09-18 09:57:17,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2018-09-18 09:57:17,853 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 38 transitions. Word has length 29 [2018-09-18 09:57:17,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:17,853 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 38 transitions. [2018-09-18 09:57:17,853 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-18 09:57:17,853 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-09-18 09:57:17,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-09-18 09:57:17,854 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:17,854 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:17,855 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:17,855 INFO L82 PathProgramCache]: Analyzing trace with hash -249977826, now seen corresponding path program 4 times [2018-09-18 09:57:17,855 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:17,856 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:17,856 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 09:57:17,856 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:17,856 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:17,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:18,051 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:18,051 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:18,052 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:18,060 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 09:57:18,060 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 09:57:18,071 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 09:57:18,072 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:18,073 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:18,127 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 09:57:18,127 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:18,538 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 09:57:18,559 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:18,559 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:18,575 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 09:57:18,575 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 09:57:18,601 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 09:57:18,602 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:18,605 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:18,633 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 09:57:18,634 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:19,514 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 35 proven. 63 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 09:57:19,516 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:19,516 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10, 9, 9] total 25 [2018-09-18 09:57:19,516 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:19,517 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-18 09:57:19,517 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-18 09:57:19,517 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=201, Invalid=399, Unknown=0, NotChecked=0, Total=600 [2018-09-18 09:57:19,518 INFO L87 Difference]: Start difference. First operand 36 states and 38 transitions. Second operand 11 states. [2018-09-18 09:57:19,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:19,669 INFO L93 Difference]: Finished difference Result 52 states and 57 transitions. [2018-09-18 09:57:19,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-18 09:57:19,669 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-09-18 09:57:19,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:19,671 INFO L225 Difference]: With dead ends: 52 [2018-09-18 09:57:19,671 INFO L226 Difference]: Without dead ends: 39 [2018-09-18 09:57:19,672 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 123 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=201, Invalid=399, Unknown=0, NotChecked=0, Total=600 [2018-09-18 09:57:19,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-09-18 09:57:19,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-09-18 09:57:19,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-09-18 09:57:19,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 41 transitions. [2018-09-18 09:57:19,677 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 41 transitions. Word has length 35 [2018-09-18 09:57:19,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:19,678 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 41 transitions. [2018-09-18 09:57:19,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-18 09:57:19,678 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 41 transitions. [2018-09-18 09:57:19,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-09-18 09:57:19,679 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:19,679 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:19,680 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:19,680 INFO L82 PathProgramCache]: Analyzing trace with hash 1580391035, now seen corresponding path program 5 times [2018-09-18 09:57:19,680 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:19,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:19,681 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 09:57:19,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:19,682 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:19,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:19,848 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:19,849 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:19,849 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:19,860 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 09:57:19,860 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 09:57:38,655 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-18 09:57:38,656 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:38,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:38,856 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 09:57:38,857 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:39,482 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 09:57:39,502 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:39,502 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:39,520 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 09:57:39,520 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 09:57:39,622 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-18 09:57:39,622 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:39,627 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:39,658 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 09:57:39,658 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:40,058 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 40 proven. 84 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-09-18 09:57:40,059 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:40,060 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10, 11, 10, 10] total 28 [2018-09-18 09:57:40,060 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:40,060 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-09-18 09:57:40,060 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-09-18 09:57:40,061 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=507, Unknown=0, NotChecked=0, Total=756 [2018-09-18 09:57:40,061 INFO L87 Difference]: Start difference. First operand 39 states and 41 transitions. Second operand 12 states. [2018-09-18 09:57:40,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:40,403 INFO L93 Difference]: Finished difference Result 55 states and 60 transitions. [2018-09-18 09:57:40,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-18 09:57:40,403 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-09-18 09:57:40,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:40,404 INFO L225 Difference]: With dead ends: 55 [2018-09-18 09:57:40,405 INFO L226 Difference]: Without dead ends: 42 [2018-09-18 09:57:40,405 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 133 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=249, Invalid=507, Unknown=0, NotChecked=0, Total=756 [2018-09-18 09:57:40,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-09-18 09:57:40,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-09-18 09:57:40,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-09-18 09:57:40,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 44 transitions. [2018-09-18 09:57:40,413 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 44 transitions. Word has length 38 [2018-09-18 09:57:40,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:40,413 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 44 transitions. [2018-09-18 09:57:40,414 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-09-18 09:57:40,414 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 44 transitions. [2018-09-18 09:57:40,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-09-18 09:57:40,415 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:40,415 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 8, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:40,415 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:40,416 INFO L82 PathProgramCache]: Analyzing trace with hash 1194339070, now seen corresponding path program 6 times [2018-09-18 09:57:40,416 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:40,417 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:40,417 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 09:57:40,417 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:40,417 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:40,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:40,812 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:40,812 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:40,813 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-09-18 09:57:40,825 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 09:57:40,825 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:40,979 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-18 09:57:40,980 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:40,982 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:41,076 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 09:57:41,076 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:41,154 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 09:57:41,174 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:41,174 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:41,189 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 09:57:41,189 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 09:57:41,310 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-18 09:57:41,310 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:41,313 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:41,317 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 09:57:41,318 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:41,328 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 64 proven. 7 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 09:57:41,329 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:41,329 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 5, 5, 5, 5] total 19 [2018-09-18 09:57:41,329 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:41,330 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-18 09:57:41,330 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-18 09:57:41,331 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=241, Unknown=0, NotChecked=0, Total=342 [2018-09-18 09:57:41,331 INFO L87 Difference]: Start difference. First operand 42 states and 44 transitions. Second operand 16 states. [2018-09-18 09:57:41,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:41,993 INFO L93 Difference]: Finished difference Result 65 states and 74 transitions. [2018-09-18 09:57:41,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-18 09:57:41,993 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 41 [2018-09-18 09:57:41,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:41,996 INFO L225 Difference]: With dead ends: 65 [2018-09-18 09:57:41,996 INFO L226 Difference]: Without dead ends: 52 [2018-09-18 09:57:41,996 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 159 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=129, Invalid=291, Unknown=0, NotChecked=0, Total=420 [2018-09-18 09:57:41,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-09-18 09:57:42,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 48. [2018-09-18 09:57:42,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-09-18 09:57:42,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 51 transitions. [2018-09-18 09:57:42,001 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 51 transitions. Word has length 41 [2018-09-18 09:57:42,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:42,002 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 51 transitions. [2018-09-18 09:57:42,002 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-18 09:57:42,002 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 51 transitions. [2018-09-18 09:57:42,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-09-18 09:57:42,003 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:42,003 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 9, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:42,003 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:42,004 INFO L82 PathProgramCache]: Analyzing trace with hash -565963040, now seen corresponding path program 7 times [2018-09-18 09:57:42,004 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:42,004 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:42,005 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 09:57:42,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:42,005 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:42,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:42,605 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:42,605 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:42,605 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:42,617 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:42,617 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 09:57:42,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:42,632 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:42,659 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-18 09:57:42,659 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:43,309 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-18 09:57:43,330 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:43,330 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:43,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:43,347 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 09:57:43,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:43,382 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:43,393 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-18 09:57:43,393 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:44,059 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 80 proven. 135 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-09-18 09:57:44,061 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:44,062 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12, 13, 12, 12] total 35 [2018-09-18 09:57:44,062 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:44,062 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-18 09:57:44,063 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-18 09:57:44,063 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=382, Invalid=808, Unknown=0, NotChecked=0, Total=1190 [2018-09-18 09:57:44,064 INFO L87 Difference]: Start difference. First operand 48 states and 51 transitions. Second operand 15 states. [2018-09-18 09:57:44,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:44,325 INFO L93 Difference]: Finished difference Result 67 states and 74 transitions. [2018-09-18 09:57:44,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-18 09:57:44,327 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2018-09-18 09:57:44,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:44,328 INFO L225 Difference]: With dead ends: 67 [2018-09-18 09:57:44,328 INFO L226 Difference]: Without dead ends: 51 [2018-09-18 09:57:44,329 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 165 SyntacticMatches, 4 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=382, Invalid=808, Unknown=0, NotChecked=0, Total=1190 [2018-09-18 09:57:44,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-09-18 09:57:44,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-09-18 09:57:44,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-09-18 09:57:44,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 54 transitions. [2018-09-18 09:57:44,336 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 54 transitions. Word has length 47 [2018-09-18 09:57:44,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:44,337 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 54 transitions. [2018-09-18 09:57:44,337 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-18 09:57:44,337 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 54 transitions. [2018-09-18 09:57:44,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-09-18 09:57:44,338 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:44,338 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 10, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:44,338 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:44,338 INFO L82 PathProgramCache]: Analyzing trace with hash -1227511363, now seen corresponding path program 8 times [2018-09-18 09:57:44,339 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:44,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:44,340 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 09:57:44,340 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:44,340 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:44,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:45,260 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:45,261 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:45,261 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:45,268 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 09:57:45,268 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 09:57:45,282 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 09:57:45,282 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:45,284 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:45,316 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:45,316 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:45,964 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:45,989 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:45,989 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:46,005 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 09:57:46,005 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 09:57:46,040 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 09:57:46,040 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:46,044 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:46,070 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:46,071 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:46,131 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:46,134 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:46,134 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-09-18 09:57:46,135 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:46,135 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-18 09:57:46,135 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-18 09:57:46,136 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-09-18 09:57:46,136 INFO L87 Difference]: Start difference. First operand 51 states and 54 transitions. Second operand 16 states. [2018-09-18 09:57:46,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:46,511 INFO L93 Difference]: Finished difference Result 70 states and 77 transitions. [2018-09-18 09:57:46,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-18 09:57:46,512 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-09-18 09:57:46,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:46,513 INFO L225 Difference]: With dead ends: 70 [2018-09-18 09:57:46,513 INFO L226 Difference]: Without dead ends: 54 [2018-09-18 09:57:46,514 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 184 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-09-18 09:57:46,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-09-18 09:57:46,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-09-18 09:57:46,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-09-18 09:57:46,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 57 transitions. [2018-09-18 09:57:46,523 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 57 transitions. Word has length 50 [2018-09-18 09:57:46,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:46,524 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 57 transitions. [2018-09-18 09:57:46,525 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-18 09:57:46,525 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 57 transitions. [2018-09-18 09:57:46,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-09-18 09:57:46,526 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:46,526 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 11, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:46,526 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:46,526 INFO L82 PathProgramCache]: Analyzing trace with hash 191319488, now seen corresponding path program 9 times [2018-09-18 09:57:46,526 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:46,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:46,527 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 09:57:46,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:46,527 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:46,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:46,850 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:46,850 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:46,850 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:46,864 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 09:57:46,865 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 09:57:46,878 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-18 09:57:46,879 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:46,880 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:47,012 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-18 09:57:47,012 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:47,146 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-18 09:57:47,167 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:47,167 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:47,182 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 09:57:47,183 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 09:57:47,255 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-18 09:57:47,255 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:47,258 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:47,265 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-18 09:57:47,265 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:47,283 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 121 proven. 15 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2018-09-18 09:57:47,285 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:47,285 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 6, 6, 6, 6] total 25 [2018-09-18 09:57:47,285 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:47,285 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-18 09:57:47,286 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-18 09:57:47,286 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=433, Unknown=0, NotChecked=0, Total=600 [2018-09-18 09:57:47,286 INFO L87 Difference]: Start difference. First operand 54 states and 57 transitions. Second operand 21 states. [2018-09-18 09:57:48,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:48,097 INFO L93 Difference]: Finished difference Result 80 states and 91 transitions. [2018-09-18 09:57:48,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-18 09:57:48,097 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 53 [2018-09-18 09:57:48,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:48,098 INFO L225 Difference]: With dead ends: 80 [2018-09-18 09:57:48,098 INFO L226 Difference]: Without dead ends: 64 [2018-09-18 09:57:48,099 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 233 GetRequests, 206 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=221, Invalid=535, Unknown=0, NotChecked=0, Total=756 [2018-09-18 09:57:48,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-09-18 09:57:48,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 60. [2018-09-18 09:57:48,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-09-18 09:57:48,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 64 transitions. [2018-09-18 09:57:48,105 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 64 transitions. Word has length 53 [2018-09-18 09:57:48,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:48,106 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 64 transitions. [2018-09-18 09:57:48,106 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-18 09:57:48,106 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 64 transitions. [2018-09-18 09:57:48,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-18 09:57:48,107 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:48,107 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 12, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:48,107 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:48,108 INFO L82 PathProgramCache]: Analyzing trace with hash 794925150, now seen corresponding path program 10 times [2018-09-18 09:57:48,108 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:48,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:48,109 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 09:57:48,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:48,109 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:48,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:48,444 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:48,445 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:48,445 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:48,453 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 09:57:48,453 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 09:57:48,485 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 09:57:48,485 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:48,487 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:48,568 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-18 09:57:48,568 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:49,749 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-18 09:57:49,770 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:49,770 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 09:57:49,786 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 09:57:49,786 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 09:57:49,824 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 09:57:49,824 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 09:57:49,827 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 09:57:49,843 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-18 09:57:49,843 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 09:57:50,783 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 143 proven. 234 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-18 09:57:50,790 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 09:57:50,791 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 15, 16, 15, 15] total 45 [2018-09-18 09:57:50,791 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 09:57:50,791 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-18 09:57:50,792 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-18 09:57:50,792 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=620, Invalid=1360, Unknown=0, NotChecked=0, Total=1980 [2018-09-18 09:57:50,793 INFO L87 Difference]: Start difference. First operand 60 states and 64 transitions. Second operand 19 states. [2018-09-18 09:57:51,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 09:57:51,243 INFO L93 Difference]: Finished difference Result 82 states and 91 transitions. [2018-09-18 09:57:51,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-18 09:57:51,244 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2018-09-18 09:57:51,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 09:57:51,245 INFO L225 Difference]: With dead ends: 82 [2018-09-18 09:57:51,245 INFO L226 Difference]: Without dead ends: 63 [2018-09-18 09:57:51,247 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 254 GetRequests, 207 SyntacticMatches, 4 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=620, Invalid=1360, Unknown=0, NotChecked=0, Total=1980 [2018-09-18 09:57:51,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-09-18 09:57:51,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-09-18 09:57:51,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-09-18 09:57:51,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 67 transitions. [2018-09-18 09:57:51,253 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 67 transitions. Word has length 59 [2018-09-18 09:57:51,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 09:57:51,253 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 67 transitions. [2018-09-18 09:57:51,254 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-18 09:57:51,254 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 67 transitions. [2018-09-18 09:57:51,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-09-18 09:57:51,255 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 09:57:51,255 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 13, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 09:57:51,255 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 09:57:51,255 INFO L82 PathProgramCache]: Analyzing trace with hash 1464125371, now seen corresponding path program 11 times [2018-09-18 09:57:51,255 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 09:57:51,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:51,256 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 09:57:51,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 09:57:51,257 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 09:57:51,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 09:57:51,646 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 0 proven. 442 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 09:57:51,647 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 09:57:51,647 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 09:57:51,654 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 09:57:51,654 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:00:08,007 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-18 10:00:08,007 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:09,803 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:09,847 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 154 proven. 273 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-18 10:00:09,847 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:10,966 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 154 proven. 273 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-18 10:00:10,987 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:10,988 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:11,005 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:00:11,005 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:00:11,365 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-09-18 10:00:11,365 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:11,369 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:11,388 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 154 proven. 273 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-18 10:00:11,388 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:12,461 INFO L134 CoverageAnalysis]: Checked inductivity of 442 backedges. 154 proven. 273 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-18 10:00:12,462 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:12,463 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 16, 17, 16, 16] total 48 [2018-09-18 10:00:12,463 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:12,463 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-18 10:00:12,464 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-18 10:00:12,464 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=702, Invalid=1554, Unknown=0, NotChecked=0, Total=2256 [2018-09-18 10:00:12,465 INFO L87 Difference]: Start difference. First operand 63 states and 67 transitions. Second operand 20 states. [2018-09-18 10:00:13,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:13,572 INFO L93 Difference]: Finished difference Result 85 states and 94 transitions. [2018-09-18 10:00:13,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-18 10:00:13,573 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 62 [2018-09-18 10:00:13,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:13,574 INFO L225 Difference]: With dead ends: 85 [2018-09-18 10:00:13,574 INFO L226 Difference]: Without dead ends: 66 [2018-09-18 10:00:13,576 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 217 SyntacticMatches, 4 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=702, Invalid=1554, Unknown=0, NotChecked=0, Total=2256 [2018-09-18 10:00:13,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-09-18 10:00:13,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-09-18 10:00:13,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-09-18 10:00:13,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-09-18 10:00:13,582 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 62 [2018-09-18 10:00:13,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:13,583 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-09-18 10:00:13,583 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-18 10:00:13,583 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-09-18 10:00:13,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-09-18 10:00:13,584 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:13,584 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 14, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:13,584 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:13,584 INFO L82 PathProgramCache]: Analyzing trace with hash 369721150, now seen corresponding path program 12 times [2018-09-18 10:00:13,584 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:13,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:13,585 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:13,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:13,585 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:13,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:14,098 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:14,098 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:14,098 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:14,106 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:00:14,106 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:00:16,628 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-09-18 10:00:16,628 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:16,669 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:16,859 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-18 10:00:16,860 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:17,072 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-18 10:00:17,092 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:17,092 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:17,107 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:00:17,107 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:00:17,420 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-09-18 10:00:17,420 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:17,424 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:17,431 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-18 10:00:17,431 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:17,513 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 196 proven. 26 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-09-18 10:00:17,515 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:17,515 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 7, 7, 7, 7] total 31 [2018-09-18 10:00:17,515 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:17,516 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-18 10:00:17,516 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-18 10:00:17,517 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=681, Unknown=0, NotChecked=0, Total=930 [2018-09-18 10:00:17,517 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 26 states. [2018-09-18 10:00:22,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:22,371 INFO L93 Difference]: Finished difference Result 98 states and 112 transitions. [2018-09-18 10:00:22,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-18 10:00:22,372 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 65 [2018-09-18 10:00:22,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:22,373 INFO L225 Difference]: With dead ends: 98 [2018-09-18 10:00:22,373 INFO L226 Difference]: Without dead ends: 79 [2018-09-18 10:00:22,374 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 288 GetRequests, 253 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=361, Invalid=899, Unknown=0, NotChecked=0, Total=1260 [2018-09-18 10:00:22,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-09-18 10:00:22,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 72. [2018-09-18 10:00:22,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-09-18 10:00:22,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 77 transitions. [2018-09-18 10:00:22,383 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 77 transitions. Word has length 65 [2018-09-18 10:00:22,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:22,384 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 77 transitions. [2018-09-18 10:00:22,384 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-18 10:00:22,384 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 77 transitions. [2018-09-18 10:00:22,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-09-18 10:00:22,385 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:22,385 INFO L376 BasicCegarLoop]: trace histogram [21, 20, 15, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:22,385 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:22,386 INFO L82 PathProgramCache]: Analyzing trace with hash -512392800, now seen corresponding path program 13 times [2018-09-18 10:00:22,386 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:22,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:22,387 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:22,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:22,387 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:22,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:23,796 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 610 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:23,797 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:23,797 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:23,812 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:23,813 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:00:23,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:23,831 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:23,893 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-18 10:00:23,894 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:25,746 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-18 10:00:25,766 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:25,766 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:25,781 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:25,781 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:00:25,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:25,826 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:25,859 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-18 10:00:25,859 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:27,367 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 224 proven. 360 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-09-18 10:00:27,368 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:27,368 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 18, 19, 18, 18] total 55 [2018-09-18 10:00:27,368 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:27,369 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-09-18 10:00:27,369 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-09-18 10:00:27,370 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=915, Invalid=2055, Unknown=0, NotChecked=0, Total=2970 [2018-09-18 10:00:27,370 INFO L87 Difference]: Start difference. First operand 72 states and 77 transitions. Second operand 23 states. [2018-09-18 10:00:28,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:28,212 INFO L93 Difference]: Finished difference Result 97 states and 108 transitions. [2018-09-18 10:00:28,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-18 10:00:28,219 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 71 [2018-09-18 10:00:28,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:28,219 INFO L225 Difference]: With dead ends: 97 [2018-09-18 10:00:28,219 INFO L226 Difference]: Without dead ends: 75 [2018-09-18 10:00:28,221 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 306 GetRequests, 249 SyntacticMatches, 4 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=915, Invalid=2055, Unknown=0, NotChecked=0, Total=2970 [2018-09-18 10:00:28,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-09-18 10:00:28,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2018-09-18 10:00:28,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-09-18 10:00:28,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 80 transitions. [2018-09-18 10:00:28,227 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 80 transitions. Word has length 71 [2018-09-18 10:00:28,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:28,227 INFO L480 AbstractCegarLoop]: Abstraction has 75 states and 80 transitions. [2018-09-18 10:00:28,227 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-09-18 10:00:28,228 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 80 transitions. [2018-09-18 10:00:28,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-09-18 10:00:28,228 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:28,228 INFO L376 BasicCegarLoop]: trace histogram [22, 21, 16, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:28,229 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:28,229 INFO L82 PathProgramCache]: Analyzing trace with hash 10718589, now seen corresponding path program 14 times [2018-09-18 10:00:28,229 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:28,230 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:28,230 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:28,230 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:28,230 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:28,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:28,843 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:28,843 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:28,843 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:28,851 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:00:28,851 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:00:28,871 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:00:28,871 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:28,872 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:28,902 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:28,903 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:30,381 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:30,402 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:30,402 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:30,417 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:00:30,418 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:00:30,466 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:00:30,466 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:30,470 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:30,513 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:30,513 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:30,561 INFO L134 CoverageAnalysis]: Checked inductivity of 672 backedges. 0 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:30,562 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:30,562 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 46 [2018-09-18 10:00:30,562 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:30,563 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-18 10:00:30,563 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-18 10:00:30,564 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-09-18 10:00:30,564 INFO L87 Difference]: Start difference. First operand 75 states and 80 transitions. Second operand 24 states. [2018-09-18 10:00:31,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:31,108 INFO L93 Difference]: Finished difference Result 100 states and 111 transitions. [2018-09-18 10:00:31,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-18 10:00:31,108 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-09-18 10:00:31,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:31,109 INFO L225 Difference]: With dead ends: 100 [2018-09-18 10:00:31,109 INFO L226 Difference]: Without dead ends: 78 [2018-09-18 10:00:31,110 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 319 GetRequests, 272 SyntacticMatches, 3 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-09-18 10:00:31,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-09-18 10:00:31,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-09-18 10:00:31,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-09-18 10:00:31,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 83 transitions. [2018-09-18 10:00:31,126 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 83 transitions. Word has length 74 [2018-09-18 10:00:31,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:31,126 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 83 transitions. [2018-09-18 10:00:31,126 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-18 10:00:31,126 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2018-09-18 10:00:31,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-09-18 10:00:31,127 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:31,127 INFO L376 BasicCegarLoop]: trace histogram [23, 22, 17, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:31,127 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:31,128 INFO L82 PathProgramCache]: Analyzing trace with hash 1880758400, now seen corresponding path program 15 times [2018-09-18 10:00:31,128 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:31,131 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:31,131 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:31,131 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:31,131 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:31,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:31,848 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:31,848 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:31,848 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:31,857 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:00:31,857 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:00:31,891 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-18 10:00:31,891 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:31,892 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:32,179 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-18 10:00:32,179 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:32,483 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-18 10:00:32,504 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:32,504 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:32,528 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:00:32,528 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:00:32,686 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-18 10:00:32,686 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:32,691 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:32,701 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-18 10:00:32,701 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:32,712 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 289 proven. 40 refuted. 0 times theorem prover too weak. 408 trivial. 0 not checked. [2018-09-18 10:00:32,713 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:32,714 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 8, 8, 8, 8] total 37 [2018-09-18 10:00:32,714 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:32,714 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-18 10:00:32,714 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-18 10:00:32,715 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=347, Invalid=985, Unknown=0, NotChecked=0, Total=1332 [2018-09-18 10:00:32,715 INFO L87 Difference]: Start difference. First operand 78 states and 83 transitions. Second operand 31 states. [2018-09-18 10:00:37,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:37,312 INFO L93 Difference]: Finished difference Result 110 states and 125 transitions. [2018-09-18 10:00:37,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-18 10:00:37,313 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 77 [2018-09-18 10:00:37,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:37,314 INFO L225 Difference]: With dead ends: 110 [2018-09-18 10:00:37,314 INFO L226 Difference]: Without dead ends: 88 [2018-09-18 10:00:37,315 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 342 GetRequests, 300 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=477, Invalid=1245, Unknown=0, NotChecked=0, Total=1722 [2018-09-18 10:00:37,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-09-18 10:00:37,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 84. [2018-09-18 10:00:37,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-09-18 10:00:37,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 90 transitions. [2018-09-18 10:00:37,322 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 90 transitions. Word has length 77 [2018-09-18 10:00:37,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:37,322 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 90 transitions. [2018-09-18 10:00:37,322 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-18 10:00:37,322 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 90 transitions. [2018-09-18 10:00:37,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-09-18 10:00:37,323 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:37,323 INFO L376 BasicCegarLoop]: trace histogram [25, 24, 18, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:37,323 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:37,323 INFO L82 PathProgramCache]: Analyzing trace with hash -1326089058, now seen corresponding path program 16 times [2018-09-18 10:00:37,323 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:37,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:37,324 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:37,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:37,324 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:37,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:38,031 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 48 proven. 828 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:38,031 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:38,032 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:38,041 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:00:38,041 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:00:38,063 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:00:38,063 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:38,065 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:38,124 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:00:38,124 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:40,009 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:00:40,030 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:40,030 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:40,047 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:00:40,047 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:00:40,098 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:00:40,098 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:40,102 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:40,122 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:00:40,123 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:43,704 INFO L134 CoverageAnalysis]: Checked inductivity of 876 backedges. 323 proven. 513 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:00:43,707 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:43,708 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 21, 22, 21, 21] total 65 [2018-09-18 10:00:43,708 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:43,708 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-18 10:00:43,709 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-18 10:00:43,711 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1291, Invalid=2869, Unknown=0, NotChecked=0, Total=4160 [2018-09-18 10:00:43,711 INFO L87 Difference]: Start difference. First operand 84 states and 90 transitions. Second operand 27 states. [2018-09-18 10:00:44,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:44,371 INFO L93 Difference]: Finished difference Result 115 states and 129 transitions. [2018-09-18 10:00:44,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-09-18 10:00:44,372 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 83 [2018-09-18 10:00:44,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:44,373 INFO L225 Difference]: With dead ends: 115 [2018-09-18 10:00:44,373 INFO L226 Difference]: Without dead ends: 90 [2018-09-18 10:00:44,375 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 357 GetRequests, 291 SyntacticMatches, 3 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=1291, Invalid=2869, Unknown=0, NotChecked=0, Total=4160 [2018-09-18 10:00:44,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-09-18 10:00:44,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2018-09-18 10:00:44,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-09-18 10:00:44,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 96 transitions. [2018-09-18 10:00:44,390 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 96 transitions. Word has length 83 [2018-09-18 10:00:44,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:44,390 INFO L480 AbstractCegarLoop]: Abstraction has 90 states and 96 transitions. [2018-09-18 10:00:44,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-18 10:00:44,391 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 96 transitions. [2018-09-18 10:00:44,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-18 10:00:44,391 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:44,392 INFO L376 BasicCegarLoop]: trace histogram [27, 26, 20, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:44,392 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:44,392 INFO L82 PathProgramCache]: Analyzing trace with hash -502348930, now seen corresponding path program 17 times [2018-09-18 10:00:44,392 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:44,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:44,393 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:44,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:44,394 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:44,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:45,426 INFO L134 CoverageAnalysis]: Checked inductivity of 1027 backedges. 52 proven. 975 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:45,427 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:45,427 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:45,435 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:00:45,436 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown