java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-invgen/seq_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-69f5bdd-m [2018-09-18 10:01:32,552 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-18 10:01:32,554 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-18 10:01:32,567 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-18 10:01:32,567 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-18 10:01:32,568 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-18 10:01:32,569 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-18 10:01:32,571 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-18 10:01:32,573 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-18 10:01:32,573 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-18 10:01:32,574 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-18 10:01:32,575 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-18 10:01:32,576 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-18 10:01:32,577 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-18 10:01:32,578 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-18 10:01:32,578 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-18 10:01:32,579 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-18 10:01:32,581 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-18 10:01:32,583 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-18 10:01:32,585 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-18 10:01:32,586 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-18 10:01:32,587 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-18 10:01:32,589 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-09-18 10:01:32,598 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-18 10:01:32,624 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-18 10:01:32,625 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-18 10:01:32,626 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-18 10:01:32,626 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-18 10:01:32,626 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-18 10:01:32,627 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-18 10:01:32,627 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-18 10:01:32,627 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-18 10:01:32,627 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-18 10:01:32,627 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-18 10:01:32,628 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-09-18 10:01:32,628 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-18 10:01:32,628 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-18 10:01:32,629 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-18 10:01:32,629 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-18 10:01:32,629 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-18 10:01:32,629 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-18 10:01:32,629 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-18 10:01:32,632 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-18 10:01:32,632 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-18 10:01:32,633 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-18 10:01:32,633 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-18 10:01:32,633 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-18 10:01:32,633 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-18 10:01:32,633 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 10:01:32,633 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-18 10:01:32,633 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-18 10:01:32,634 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-18 10:01:32,634 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-18 10:01:32,634 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-18 10:01:32,634 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-18 10:01:32,634 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-18 10:01:32,635 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-18 10:01:32,635 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-18 10:01:32,692 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-18 10:01:32,708 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-18 10:01:32,711 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-18 10:01:32,713 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-18 10:01:32,713 INFO L276 PluginConnector]: CDTParser initialized [2018-09-18 10:01:32,714 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-invgen/seq_true-unreach-call_true-termination.i [2018-09-18 10:01:33,046 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6195335c9/3973c998f43a4223bddb6165d9860e7e/FLAG7ed4e2c1d [2018-09-18 10:01:33,191 INFO L277 CDTParser]: Found 1 translation units. [2018-09-18 10:01:33,191 INFO L159 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-invgen/seq_true-unreach-call_true-termination.i [2018-09-18 10:01:33,197 INFO L325 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6195335c9/3973c998f43a4223bddb6165d9860e7e/FLAG7ed4e2c1d [2018-09-18 10:01:33,210 INFO L333 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6195335c9/3973c998f43a4223bddb6165d9860e7e [2018-09-18 10:01:33,219 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-18 10:01:33,222 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-18 10:01:33,224 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-18 10:01:33,224 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-18 10:01:33,231 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-18 10:01:33,233 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,236 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6beab7ee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33, skipping insertion in model container [2018-09-18 10:01:33,236 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,248 INFO L160 ieTranslatorObserver]: Starting translation in SV-COMP mode [2018-09-18 10:01:33,495 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 10:01:33,512 INFO L424 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-18 10:01:33,519 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 10:01:33,532 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33 WrapperNode [2018-09-18 10:01:33,532 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-18 10:01:33,533 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-18 10:01:33,533 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-18 10:01:33,533 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-18 10:01:33,542 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,548 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,554 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-18 10:01:33,555 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-18 10:01:33,555 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-18 10:01:33,555 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-18 10:01:33,565 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,565 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,566 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,566 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,568 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,574 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,575 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (1/1) ... [2018-09-18 10:01:33,578 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-18 10:01:33,579 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-18 10:01:33,579 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-18 10:01:33,579 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-18 10:01:33,580 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 10:01:33,647 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-18 10:01:33,647 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-18 10:01:33,647 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-18 10:01:33,647 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-18 10:01:33,648 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-18 10:01:33,648 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-18 10:01:33,648 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-09-18 10:01:33,648 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-09-18 10:01:34,094 INFO L356 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-18 10:01:34,094 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 10:01:34 BoogieIcfgContainer [2018-09-18 10:01:34,094 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-18 10:01:34,102 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-18 10:01:34,102 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-18 10:01:34,107 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-18 10:01:34,107 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.09 10:01:33" (1/3) ... [2018-09-18 10:01:34,108 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@16bbed73 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 10:01:34, skipping insertion in model container [2018-09-18 10:01:34,108 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:01:33" (2/3) ... [2018-09-18 10:01:34,109 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@16bbed73 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 10:01:34, skipping insertion in model container [2018-09-18 10:01:34,109 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 10:01:34" (3/3) ... [2018-09-18 10:01:34,112 INFO L112 eAbstractionObserver]: Analyzing ICFG seq_true-unreach-call_true-termination.i [2018-09-18 10:01:34,123 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-18 10:01:34,134 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-18 10:01:34,184 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-18 10:01:34,185 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-18 10:01:34,185 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-18 10:01:34,186 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-18 10:01:34,186 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-18 10:01:34,186 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-18 10:01:34,186 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-18 10:01:34,186 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-18 10:01:34,187 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-18 10:01:34,205 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states. [2018-09-18 10:01:34,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-09-18 10:01:34,212 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:34,213 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:34,214 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:34,220 INFO L82 PathProgramCache]: Analyzing trace with hash 301890663, now seen corresponding path program 1 times [2018-09-18 10:01:34,223 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:34,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:34,279 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:34,279 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:34,279 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:34,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:34,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:34,376 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:01:34,376 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-18 10:01:34,377 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:01:34,382 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-18 10:01:34,398 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-18 10:01:34,399 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 10:01:34,403 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 2 states. [2018-09-18 10:01:34,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:34,440 INFO L93 Difference]: Finished difference Result 45 states and 58 transitions. [2018-09-18 10:01:34,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-18 10:01:34,443 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-09-18 10:01:34,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:34,453 INFO L225 Difference]: With dead ends: 45 [2018-09-18 10:01:34,453 INFO L226 Difference]: Without dead ends: 23 [2018-09-18 10:01:34,457 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 10:01:34,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-09-18 10:01:34,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-09-18 10:01:34,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-09-18 10:01:34,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2018-09-18 10:01:34,497 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 25 transitions. Word has length 17 [2018-09-18 10:01:34,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:34,498 INFO L480 AbstractCegarLoop]: Abstraction has 23 states and 25 transitions. [2018-09-18 10:01:34,498 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-18 10:01:34,498 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2018-09-18 10:01:34,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-09-18 10:01:34,499 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:34,500 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:34,500 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:34,500 INFO L82 PathProgramCache]: Analyzing trace with hash 1130037681, now seen corresponding path program 1 times [2018-09-18 10:01:34,501 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:34,502 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:34,502 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:34,502 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:34,502 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:34,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:34,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:34,683 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:01:34,683 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-09-18 10:01:34,683 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:01:34,685 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-09-18 10:01:34,685 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-09-18 10:01:34,686 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-09-18 10:01:34,686 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. Second operand 7 states. [2018-09-18 10:01:35,133 WARN L178 SmtUtils]: Spent 125.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-09-18 10:01:35,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:35,180 INFO L93 Difference]: Finished difference Result 48 states and 54 transitions. [2018-09-18 10:01:35,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-18 10:01:35,181 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-09-18 10:01:35,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:35,184 INFO L225 Difference]: With dead ends: 48 [2018-09-18 10:01:35,184 INFO L226 Difference]: Without dead ends: 35 [2018-09-18 10:01:35,186 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2018-09-18 10:01:35,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-09-18 10:01:35,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 28. [2018-09-18 10:01:35,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-09-18 10:01:35,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 31 transitions. [2018-09-18 10:01:35,196 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 31 transitions. Word has length 19 [2018-09-18 10:01:35,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:35,197 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 31 transitions. [2018-09-18 10:01:35,197 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-09-18 10:01:35,197 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 31 transitions. [2018-09-18 10:01:35,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-09-18 10:01:35,198 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:35,200 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:35,200 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:35,200 INFO L82 PathProgramCache]: Analyzing trace with hash -1499928661, now seen corresponding path program 1 times [2018-09-18 10:01:35,200 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:35,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:35,202 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:35,202 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:35,202 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:35,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:35,326 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:35,327 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:01:35,327 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-09-18 10:01:35,327 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:01:35,328 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-09-18 10:01:35,328 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-09-18 10:01:35,328 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-09-18 10:01:35,329 INFO L87 Difference]: Start difference. First operand 28 states and 31 transitions. Second operand 6 states. [2018-09-18 10:01:35,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:35,426 INFO L93 Difference]: Finished difference Result 42 states and 46 transitions. [2018-09-18 10:01:35,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-09-18 10:01:35,429 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2018-09-18 10:01:35,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:35,430 INFO L225 Difference]: With dead ends: 42 [2018-09-18 10:01:35,431 INFO L226 Difference]: Without dead ends: 40 [2018-09-18 10:01:35,431 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-09-18 10:01:35,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-09-18 10:01:35,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 35. [2018-09-18 10:01:35,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-09-18 10:01:35,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 38 transitions. [2018-09-18 10:01:35,439 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 38 transitions. Word has length 21 [2018-09-18 10:01:35,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:35,439 INFO L480 AbstractCegarLoop]: Abstraction has 35 states and 38 transitions. [2018-09-18 10:01:35,440 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-09-18 10:01:35,440 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 38 transitions. [2018-09-18 10:01:35,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-09-18 10:01:35,441 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:35,441 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:35,441 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:35,442 INFO L82 PathProgramCache]: Analyzing trace with hash -1355895601, now seen corresponding path program 1 times [2018-09-18 10:01:35,442 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:35,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:35,443 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:35,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:35,443 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:35,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:35,674 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:35,674 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:35,674 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:35,683 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:35,683 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:35,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:35,709 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:36,137 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:36,138 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:36,397 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:36,427 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:36,427 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:36,446 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:36,446 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:36,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:36,471 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:36,482 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:36,482 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:36,567 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:36,569 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:36,569 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 14 [2018-09-18 10:01:36,569 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:36,570 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-18 10:01:36,571 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-18 10:01:36,572 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2018-09-18 10:01:36,572 INFO L87 Difference]: Start difference. First operand 35 states and 38 transitions. Second operand 14 states. [2018-09-18 10:01:36,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:36,973 INFO L93 Difference]: Finished difference Result 64 states and 72 transitions. [2018-09-18 10:01:36,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-18 10:01:36,973 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 29 [2018-09-18 10:01:36,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:36,977 INFO L225 Difference]: With dead ends: 64 [2018-09-18 10:01:36,977 INFO L226 Difference]: Without dead ends: 47 [2018-09-18 10:01:36,978 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 99 SyntacticMatches, 12 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=105, Invalid=275, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:01:36,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-09-18 10:01:36,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 37. [2018-09-18 10:01:36,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-09-18 10:01:36,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 40 transitions. [2018-09-18 10:01:36,986 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 40 transitions. Word has length 29 [2018-09-18 10:01:36,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:36,986 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 40 transitions. [2018-09-18 10:01:36,987 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-18 10:01:36,987 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 40 transitions. [2018-09-18 10:01:36,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-09-18 10:01:36,988 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:36,988 INFO L376 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:36,989 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:36,989 INFO L82 PathProgramCache]: Analyzing trace with hash 95654235, now seen corresponding path program 1 times [2018-09-18 10:01:36,989 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:36,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:36,990 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:36,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:36,990 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:37,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:37,154 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:37,154 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:37,154 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:37,170 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:37,171 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:37,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:37,193 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:37,371 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:37,372 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:37,479 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:37,499 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:37,499 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:37,516 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:37,516 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:37,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:37,542 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:37,551 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:37,551 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:37,720 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:37,722 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:37,722 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 13 [2018-09-18 10:01:37,722 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:37,723 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-18 10:01:37,723 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-18 10:01:37,723 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2018-09-18 10:01:37,724 INFO L87 Difference]: Start difference. First operand 37 states and 40 transitions. Second operand 13 states. [2018-09-18 10:01:38,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:38,172 INFO L93 Difference]: Finished difference Result 79 states and 91 transitions. [2018-09-18 10:01:38,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-18 10:01:38,173 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 29 [2018-09-18 10:01:38,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:38,174 INFO L225 Difference]: With dead ends: 79 [2018-09-18 10:01:38,175 INFO L226 Difference]: Without dead ends: 62 [2018-09-18 10:01:38,175 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 100 SyntacticMatches, 12 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=105, Invalid=275, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:01:38,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-09-18 10:01:38,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 40. [2018-09-18 10:01:38,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-09-18 10:01:38,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 44 transitions. [2018-09-18 10:01:38,185 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 44 transitions. Word has length 29 [2018-09-18 10:01:38,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:38,185 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 44 transitions. [2018-09-18 10:01:38,185 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-18 10:01:38,186 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 44 transitions. [2018-09-18 10:01:38,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-09-18 10:01:38,187 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:38,187 INFO L376 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:38,187 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:38,187 INFO L82 PathProgramCache]: Analyzing trace with hash -446111159, now seen corresponding path program 2 times [2018-09-18 10:01:38,188 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:38,188 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:38,189 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:38,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:38,189 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:38,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:38,390 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:38,390 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:38,390 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:38,398 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:38,398 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:38,411 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:38,411 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:38,414 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:38,450 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:38,450 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:38,483 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:38,504 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:38,504 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:38,521 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:38,521 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:38,549 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:38,550 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:38,554 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:38,563 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:38,563 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:38,637 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:38,638 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:38,638 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7, 7, 7] total 10 [2018-09-18 10:01:38,638 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:38,639 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-09-18 10:01:38,639 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-09-18 10:01:38,639 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-09-18 10:01:38,640 INFO L87 Difference]: Start difference. First operand 40 states and 44 transitions. Second operand 10 states. [2018-09-18 10:01:38,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:38,779 INFO L93 Difference]: Finished difference Result 50 states and 54 transitions. [2018-09-18 10:01:38,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-18 10:01:38,780 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-09-18 10:01:38,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:38,782 INFO L225 Difference]: With dead ends: 50 [2018-09-18 10:01:38,782 INFO L226 Difference]: Without dead ends: 48 [2018-09-18 10:01:38,783 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 115 SyntacticMatches, 10 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2018-09-18 10:01:38,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-09-18 10:01:38,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-09-18 10:01:38,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-09-18 10:01:38,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 52 transitions. [2018-09-18 10:01:38,792 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 52 transitions. Word has length 31 [2018-09-18 10:01:38,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:38,793 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 52 transitions. [2018-09-18 10:01:38,793 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-09-18 10:01:38,793 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 52 transitions. [2018-09-18 10:01:38,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-09-18 10:01:38,794 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:38,795 INFO L376 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:38,795 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:38,795 INFO L82 PathProgramCache]: Analyzing trace with hash 94447981, now seen corresponding path program 3 times [2018-09-18 10:01:38,795 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:38,796 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:38,796 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:38,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:38,797 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:38,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:38,942 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:38,943 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:38,943 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:38,952 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:38,952 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:38,974 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-18 10:01:38,974 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:38,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:39,214 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:39,215 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:39,290 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:39,311 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:39,311 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:39,326 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:39,326 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:39,360 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-09-18 10:01:39,361 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:39,365 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:39,377 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:39,377 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:39,478 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:39,480 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:39,480 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 18 [2018-09-18 10:01:39,481 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:39,481 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-18 10:01:39,482 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-18 10:01:39,482 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=235, Unknown=0, NotChecked=0, Total=306 [2018-09-18 10:01:39,482 INFO L87 Difference]: Start difference. First operand 48 states and 52 transitions. Second operand 18 states. [2018-09-18 10:01:40,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:40,115 INFO L93 Difference]: Finished difference Result 87 states and 98 transitions. [2018-09-18 10:01:40,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-18 10:01:40,117 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 39 [2018-09-18 10:01:40,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:40,118 INFO L225 Difference]: With dead ends: 87 [2018-09-18 10:01:40,118 INFO L226 Difference]: Without dead ends: 66 [2018-09-18 10:01:40,119 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 133 SyntacticMatches, 16 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 267 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=163, Invalid=487, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:01:40,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-09-18 10:01:40,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 50. [2018-09-18 10:01:40,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-09-18 10:01:40,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-09-18 10:01:40,128 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 39 [2018-09-18 10:01:40,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:40,129 INFO L480 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-09-18 10:01:40,129 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-18 10:01:40,129 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-09-18 10:01:40,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-09-18 10:01:40,130 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:40,130 INFO L376 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:40,131 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:40,131 INFO L82 PathProgramCache]: Analyzing trace with hash 594202361, now seen corresponding path program 1 times [2018-09-18 10:01:40,131 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:40,132 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:40,132 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:40,132 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:40,132 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:40,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:40,430 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:40,430 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:40,430 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:40,442 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:40,442 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:40,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:40,460 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:40,612 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:40,612 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:40,745 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:40,765 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:40,766 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:40,784 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:40,784 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:40,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:40,812 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:40,821 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:40,821 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:41,043 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (11)] Exception during sending of exit command (exit): Broken pipe [2018-09-18 10:01:41,046 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:41,047 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 17 [2018-09-18 10:01:41,047 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:41,048 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-18 10:01:41,048 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-18 10:01:41,048 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-09-18 10:01:41,049 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 17 states. [2018-09-18 10:01:41,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:41,441 INFO L93 Difference]: Finished difference Result 103 states and 118 transitions. [2018-09-18 10:01:41,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-18 10:01:41,443 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 39 [2018-09-18 10:01:41,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:41,444 INFO L225 Difference]: With dead ends: 103 [2018-09-18 10:01:41,444 INFO L226 Difference]: Without dead ends: 82 [2018-09-18 10:01:41,445 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 134 SyntacticMatches, 16 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 251 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=171, Invalid=531, Unknown=0, NotChecked=0, Total=702 [2018-09-18 10:01:41,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-09-18 10:01:41,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 50. [2018-09-18 10:01:41,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-09-18 10:01:41,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-09-18 10:01:41,456 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 39 [2018-09-18 10:01:41,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:41,456 INFO L480 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-09-18 10:01:41,456 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-18 10:01:41,456 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-09-18 10:01:41,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-09-18 10:01:41,458 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:41,458 INFO L376 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:41,458 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:41,458 INFO L82 PathProgramCache]: Analyzing trace with hash -1103599739, now seen corresponding path program 2 times [2018-09-18 10:01:41,458 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:41,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:41,459 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:41,460 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:41,460 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:41,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:41,588 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:41,588 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:41,588 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:41,596 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:41,596 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:41,609 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:41,609 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:41,612 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:41,823 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:41,823 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:41,992 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:42,012 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:42,012 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:42,030 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:42,030 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:42,059 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:42,059 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:42,063 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:42,079 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:42,079 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:42,236 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:42,238 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:42,238 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 16 [2018-09-18 10:01:42,238 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:42,238 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-18 10:01:42,239 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-18 10:01:42,239 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2018-09-18 10:01:42,239 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 16 states. [2018-09-18 10:01:42,603 WARN L178 SmtUtils]: Spent 125.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-09-18 10:01:42,915 WARN L178 SmtUtils]: Spent 148.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-09-18 10:01:43,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:43,416 INFO L93 Difference]: Finished difference Result 122 states and 142 transitions. [2018-09-18 10:01:43,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-18 10:01:43,416 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 39 [2018-09-18 10:01:43,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:43,418 INFO L225 Difference]: With dead ends: 122 [2018-09-18 10:01:43,418 INFO L226 Difference]: Without dead ends: 101 [2018-09-18 10:01:43,419 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 135 SyntacticMatches, 16 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=163, Invalid=487, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:01:43,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-09-18 10:01:43,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 53. [2018-09-18 10:01:43,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-09-18 10:01:43,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2018-09-18 10:01:43,434 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 39 [2018-09-18 10:01:43,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:43,434 INFO L480 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2018-09-18 10:01:43,434 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-18 10:01:43,434 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2018-09-18 10:01:43,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-09-18 10:01:43,435 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:43,436 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:43,436 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:43,436 INFO L82 PathProgramCache]: Analyzing trace with hash -1990570393, now seen corresponding path program 4 times [2018-09-18 10:01:43,438 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:43,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:43,439 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:43,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:43,443 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:43,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:43,553 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 14 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-09-18 10:01:43,554 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:43,554 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:43,562 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:43,562 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:43,603 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:43,604 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:43,606 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:43,824 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:43,824 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:43,887 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:43,910 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:43,911 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:43,927 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:43,927 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:43,963 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:43,963 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:43,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:43,974 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:43,974 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:44,038 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-09-18 10:01:44,040 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:44,041 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8, 8, 8] total 11 [2018-09-18 10:01:44,041 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:44,042 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-18 10:01:44,042 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-18 10:01:44,042 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-09-18 10:01:44,043 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand 11 states. [2018-09-18 10:01:44,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:44,346 INFO L93 Difference]: Finished difference Result 63 states and 68 transitions. [2018-09-18 10:01:44,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-18 10:01:44,347 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 41 [2018-09-18 10:01:44,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:44,348 INFO L225 Difference]: With dead ends: 63 [2018-09-18 10:01:44,348 INFO L226 Difference]: Without dead ends: 61 [2018-09-18 10:01:44,348 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 152 SyntacticMatches, 14 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-09-18 10:01:44,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-09-18 10:01:44,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-09-18 10:01:44,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-09-18 10:01:44,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 66 transitions. [2018-09-18 10:01:44,357 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 66 transitions. Word has length 41 [2018-09-18 10:01:44,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:44,357 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 66 transitions. [2018-09-18 10:01:44,357 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-18 10:01:44,358 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 66 transitions. [2018-09-18 10:01:44,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-09-18 10:01:44,359 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:44,359 INFO L376 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:44,359 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:44,359 INFO L82 PathProgramCache]: Analyzing trace with hash 1735104395, now seen corresponding path program 5 times [2018-09-18 10:01:44,359 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:44,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:44,360 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:44,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:44,361 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:44,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:44,539 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:44,539 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:44,539 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:44,548 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:44,548 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:44,565 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-09-18 10:01:44,566 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:44,568 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:45,021 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:45,021 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:45,123 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:45,146 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:45,146 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:45,161 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:45,161 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:45,214 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-09-18 10:01:45,214 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:45,218 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:45,233 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:45,233 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:45,486 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:45,487 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:45,487 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 22 [2018-09-18 10:01:45,487 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:45,488 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-18 10:01:45,488 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-18 10:01:45,489 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=359, Unknown=0, NotChecked=0, Total=462 [2018-09-18 10:01:45,489 INFO L87 Difference]: Start difference. First operand 61 states and 66 transitions. Second operand 22 states. [2018-09-18 10:01:45,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:45,814 INFO L93 Difference]: Finished difference Result 110 states and 124 transitions. [2018-09-18 10:01:45,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-18 10:01:45,815 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 49 [2018-09-18 10:01:45,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:45,816 INFO L225 Difference]: With dead ends: 110 [2018-09-18 10:01:45,817 INFO L226 Difference]: Without dead ends: 85 [2018-09-18 10:01:45,818 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 167 SyntacticMatches, 20 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 467 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=233, Invalid=759, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:01:45,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-09-18 10:01:45,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 63. [2018-09-18 10:01:45,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-09-18 10:01:45,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 68 transitions. [2018-09-18 10:01:45,830 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 68 transitions. Word has length 49 [2018-09-18 10:01:45,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:45,831 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 68 transitions. [2018-09-18 10:01:45,831 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-18 10:01:45,831 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 68 transitions. [2018-09-18 10:01:45,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-09-18 10:01:45,832 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:45,832 INFO L376 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:45,832 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:45,832 INFO L82 PathProgramCache]: Analyzing trace with hash 1916583447, now seen corresponding path program 2 times [2018-09-18 10:01:45,833 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:45,833 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:45,834 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:45,834 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:45,834 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:45,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:46,027 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:46,027 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:46,028 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:46,035 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:46,036 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:46,053 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:46,054 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:46,056 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:46,181 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:46,181 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:46,237 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:46,258 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:46,258 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:46,275 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:46,275 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:46,310 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:46,310 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:46,313 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:46,324 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:46,325 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:46,410 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:46,412 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:46,412 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 21 [2018-09-18 10:01:46,412 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:46,412 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-18 10:01:46,412 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-18 10:01:46,413 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=329, Unknown=0, NotChecked=0, Total=420 [2018-09-18 10:01:46,413 INFO L87 Difference]: Start difference. First operand 63 states and 68 transitions. Second operand 21 states. [2018-09-18 10:01:46,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:46,812 INFO L93 Difference]: Finished difference Result 132 states and 151 transitions. [2018-09-18 10:01:46,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-18 10:01:46,813 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 49 [2018-09-18 10:01:46,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:46,814 INFO L225 Difference]: With dead ends: 132 [2018-09-18 10:01:46,814 INFO L226 Difference]: Without dead ends: 107 [2018-09-18 10:01:46,815 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 168 SyntacticMatches, 20 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 464 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=253, Invalid=869, Unknown=0, NotChecked=0, Total=1122 [2018-09-18 10:01:46,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-09-18 10:01:46,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 63. [2018-09-18 10:01:46,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-09-18 10:01:46,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 68 transitions. [2018-09-18 10:01:46,827 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 68 transitions. Word has length 49 [2018-09-18 10:01:46,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:46,828 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 68 transitions. [2018-09-18 10:01:46,828 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-18 10:01:46,828 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 68 transitions. [2018-09-18 10:01:46,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-09-18 10:01:46,829 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:46,829 INFO L376 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:46,829 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:46,830 INFO L82 PathProgramCache]: Analyzing trace with hash -402778205, now seen corresponding path program 3 times [2018-09-18 10:01:46,830 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:46,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:46,831 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:46,831 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:46,831 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:46,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:46,977 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:46,978 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:46,978 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:46,986 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:46,986 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:47,002 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-18 10:01:47,002 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:47,004 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:47,273 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:47,273 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:47,434 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:47,454 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:47,454 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:47,470 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:47,470 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:47,518 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-18 10:01:47,518 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:47,521 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:47,530 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:47,530 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:47,611 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:47,613 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:47,613 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 20 [2018-09-18 10:01:47,613 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:47,613 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-18 10:01:47,613 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-18 10:01:47,614 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=297, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:01:47,614 INFO L87 Difference]: Start difference. First operand 63 states and 68 transitions. Second operand 20 states. [2018-09-18 10:01:48,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:48,037 INFO L93 Difference]: Finished difference Result 152 states and 176 transitions. [2018-09-18 10:01:48,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-18 10:01:48,037 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 49 [2018-09-18 10:01:48,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:48,039 INFO L225 Difference]: With dead ends: 152 [2018-09-18 10:01:48,039 INFO L226 Difference]: Without dead ends: 127 [2018-09-18 10:01:48,040 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 169 SyntacticMatches, 20 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 430 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=253, Invalid=869, Unknown=0, NotChecked=0, Total=1122 [2018-09-18 10:01:48,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-09-18 10:01:48,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 63. [2018-09-18 10:01:48,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-09-18 10:01:48,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 68 transitions. [2018-09-18 10:01:48,053 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 68 transitions. Word has length 49 [2018-09-18 10:01:48,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:48,053 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 68 transitions. [2018-09-18 10:01:48,053 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-18 10:01:48,053 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 68 transitions. [2018-09-18 10:01:48,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-09-18 10:01:48,054 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:48,054 INFO L376 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:48,055 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:48,055 INFO L82 PathProgramCache]: Analyzing trace with hash 488662063, now seen corresponding path program 3 times [2018-09-18 10:01:48,055 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:48,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:48,056 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:48,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:48,056 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:48,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:48,168 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:48,168 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:48,168 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:48,177 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:48,177 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:48,195 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-18 10:01:48,196 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:48,198 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:48,645 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:48,645 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:48,715 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:48,734 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:48,735 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:48,750 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:48,750 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:48,795 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-09-18 10:01:48,796 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:48,799 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:48,809 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:48,810 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:48,906 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:48,908 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:48,908 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 19 [2018-09-18 10:01:48,908 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:48,908 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-18 10:01:48,909 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-18 10:01:48,909 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=263, Unknown=0, NotChecked=0, Total=342 [2018-09-18 10:01:48,909 INFO L87 Difference]: Start difference. First operand 63 states and 68 transitions. Second operand 19 states. [2018-09-18 10:01:49,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:49,433 INFO L93 Difference]: Finished difference Result 175 states and 205 transitions. [2018-09-18 10:01:49,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-18 10:01:49,434 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 49 [2018-09-18 10:01:49,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:49,435 INFO L225 Difference]: With dead ends: 175 [2018-09-18 10:01:49,435 INFO L226 Difference]: Without dead ends: 150 [2018-09-18 10:01:49,436 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 170 SyntacticMatches, 20 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 359 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=233, Invalid=759, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:01:49,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-09-18 10:01:49,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 66. [2018-09-18 10:01:49,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-09-18 10:01:49,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 72 transitions. [2018-09-18 10:01:49,453 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 72 transitions. Word has length 49 [2018-09-18 10:01:49,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:49,453 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 72 transitions. [2018-09-18 10:01:49,453 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-18 10:01:49,453 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 72 transitions. [2018-09-18 10:01:49,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-09-18 10:01:49,454 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:49,455 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:49,455 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:49,455 INFO L82 PathProgramCache]: Analyzing trace with hash -396473339, now seen corresponding path program 6 times [2018-09-18 10:01:49,455 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:49,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:49,456 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:49,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:49,456 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:49,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:49,557 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 25 proven. 28 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-09-18 10:01:49,557 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:49,558 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:49,581 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:49,582 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:49,596 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-09-18 10:01:49,597 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:49,598 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:49,634 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:49,634 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:49,729 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:49,749 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:49,749 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:49,765 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:49,765 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:49,817 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-09-18 10:01:49,817 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:49,820 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:49,825 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:49,825 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:49,915 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-09-18 10:01:49,917 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:49,917 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9, 9, 9] total 12 [2018-09-18 10:01:49,917 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:49,917 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-09-18 10:01:49,917 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-09-18 10:01:49,917 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-09-18 10:01:49,918 INFO L87 Difference]: Start difference. First operand 66 states and 72 transitions. Second operand 12 states. [2018-09-18 10:01:50,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:50,094 INFO L93 Difference]: Finished difference Result 76 states and 82 transitions. [2018-09-18 10:01:50,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-18 10:01:50,095 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 51 [2018-09-18 10:01:50,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:50,097 INFO L225 Difference]: With dead ends: 76 [2018-09-18 10:01:50,097 INFO L226 Difference]: Without dead ends: 74 [2018-09-18 10:01:50,097 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 189 SyntacticMatches, 18 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2018-09-18 10:01:50,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-09-18 10:01:50,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2018-09-18 10:01:50,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-09-18 10:01:50,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 80 transitions. [2018-09-18 10:01:50,110 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 80 transitions. Word has length 51 [2018-09-18 10:01:50,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:50,110 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 80 transitions. [2018-09-18 10:01:50,110 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-09-18 10:01:50,110 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 80 transitions. [2018-09-18 10:01:50,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-18 10:01:50,111 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:50,111 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:50,111 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:50,112 INFO L82 PathProgramCache]: Analyzing trace with hash 928978729, now seen corresponding path program 7 times [2018-09-18 10:01:50,112 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:50,112 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:50,112 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:50,113 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:50,113 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:50,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:50,361 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:50,362 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:50,362 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:50,370 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:50,370 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:50,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:50,386 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:50,578 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:50,579 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:50,654 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:50,675 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:50,675 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:50,691 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:50,691 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:50,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:50,726 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:50,735 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:50,735 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:50,845 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:50,847 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:50,847 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 26 [2018-09-18 10:01:50,847 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:50,848 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-18 10:01:50,848 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-18 10:01:50,848 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=509, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:01:50,848 INFO L87 Difference]: Start difference. First operand 74 states and 80 transitions. Second operand 26 states. [2018-09-18 10:01:51,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:51,215 INFO L93 Difference]: Finished difference Result 133 states and 150 transitions. [2018-09-18 10:01:51,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-18 10:01:51,216 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 59 [2018-09-18 10:01:51,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:51,217 INFO L225 Difference]: With dead ends: 133 [2018-09-18 10:01:51,217 INFO L226 Difference]: Without dead ends: 104 [2018-09-18 10:01:51,218 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 201 SyntacticMatches, 24 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 722 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=315, Invalid=1091, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:01:51,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-09-18 10:01:51,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 76. [2018-09-18 10:01:51,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-09-18 10:01:51,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 82 transitions. [2018-09-18 10:01:51,231 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 82 transitions. Word has length 59 [2018-09-18 10:01:51,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:51,232 INFO L480 AbstractCegarLoop]: Abstraction has 76 states and 82 transitions. [2018-09-18 10:01:51,232 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-18 10:01:51,232 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 82 transitions. [2018-09-18 10:01:51,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-18 10:01:51,233 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:51,233 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 4, 4, 4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:51,233 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:51,233 INFO L82 PathProgramCache]: Analyzing trace with hash 277511861, now seen corresponding path program 4 times [2018-09-18 10:01:51,233 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:51,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:51,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:51,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:51,234 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:51,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:51,395 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:51,396 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:51,396 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:51,404 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:51,404 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:51,422 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:51,422 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:51,423 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:51,689 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:51,690 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:51,802 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:51,824 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:51,824 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:51,839 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:51,839 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:51,883 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:51,883 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:51,887 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:51,896 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:51,896 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:52,082 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:52,084 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:52,084 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 25 [2018-09-18 10:01:52,084 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:52,084 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-18 10:01:52,085 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-18 10:01:52,085 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=474, Unknown=0, NotChecked=0, Total=600 [2018-09-18 10:01:52,085 INFO L87 Difference]: Start difference. First operand 76 states and 82 transitions. Second operand 25 states. [2018-09-18 10:01:52,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:52,925 INFO L93 Difference]: Finished difference Result 161 states and 184 transitions. [2018-09-18 10:01:52,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-18 10:01:52,925 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 59 [2018-09-18 10:01:52,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:52,926 INFO L225 Difference]: With dead ends: 161 [2018-09-18 10:01:52,927 INFO L226 Difference]: Without dead ends: 132 [2018-09-18 10:01:52,928 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 202 SyntacticMatches, 24 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 742 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=351, Invalid=1289, Unknown=0, NotChecked=0, Total=1640 [2018-09-18 10:01:52,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-09-18 10:01:52,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 76. [2018-09-18 10:01:52,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-09-18 10:01:52,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 82 transitions. [2018-09-18 10:01:52,948 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 82 transitions. Word has length 59 [2018-09-18 10:01:52,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:52,948 INFO L480 AbstractCegarLoop]: Abstraction has 76 states and 82 transitions. [2018-09-18 10:01:52,948 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-18 10:01:52,948 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 82 transitions. [2018-09-18 10:01:52,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-18 10:01:52,949 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:52,949 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 4, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:52,949 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:52,949 INFO L82 PathProgramCache]: Analyzing trace with hash -129869503, now seen corresponding path program 5 times [2018-09-18 10:01:52,949 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:52,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:52,950 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:52,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:52,950 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:52,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:53,151 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 44 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:53,152 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:53,152 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:53,159 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:53,159 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:53,178 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2018-09-18 10:01:53,178 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:53,180 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:53,325 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 44 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:53,325 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:53,394 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 44 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:53,415 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:53,415 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:53,429 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:53,430 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:53,482 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2018-09-18 10:01:53,482 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:53,485 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:53,496 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 44 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:53,496 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:53,715 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 44 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (31)] Exception during sending of exit command (exit): Broken pipe [2018-09-18 10:01:53,718 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:53,718 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 24 [2018-09-18 10:01:53,718 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:53,718 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-09-18 10:01:53,719 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-09-18 10:01:53,719 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=437, Unknown=0, NotChecked=0, Total=552 [2018-09-18 10:01:53,719 INFO L87 Difference]: Start difference. First operand 76 states and 82 transitions. Second operand 24 states. [2018-09-18 10:01:54,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:54,541 INFO L93 Difference]: Finished difference Result 187 states and 216 transitions. [2018-09-18 10:01:54,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-18 10:01:54,542 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 59 [2018-09-18 10:01:54,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:54,543 INFO L225 Difference]: With dead ends: 187 [2018-09-18 10:01:54,543 INFO L226 Difference]: Without dead ends: 158 [2018-09-18 10:01:54,544 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 203 SyntacticMatches, 24 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 724 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=364, Invalid=1358, Unknown=0, NotChecked=0, Total=1722 [2018-09-18 10:01:54,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-09-18 10:01:54,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 76. [2018-09-18 10:01:54,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-09-18 10:01:54,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 82 transitions. [2018-09-18 10:01:54,564 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 82 transitions. Word has length 59 [2018-09-18 10:01:54,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:54,564 INFO L480 AbstractCegarLoop]: Abstraction has 76 states and 82 transitions. [2018-09-18 10:01:54,564 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-09-18 10:01:54,564 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 82 transitions. [2018-09-18 10:01:54,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-18 10:01:54,565 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:54,565 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 4, 4, 4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:54,566 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:54,566 INFO L82 PathProgramCache]: Analyzing trace with hash -49846579, now seen corresponding path program 6 times [2018-09-18 10:01:54,566 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:54,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:54,567 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:54,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:54,567 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:54,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:55,279 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:55,279 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:55,279 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:55,289 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:55,289 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:55,314 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-09-18 10:01:55,314 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:55,317 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:55,466 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:55,466 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:55,591 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:55,611 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:55,611 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:55,630 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:55,630 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:55,693 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-09-18 10:01:55,693 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:55,697 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:55,710 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:55,710 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:55,933 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:55,934 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:55,934 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 23 [2018-09-18 10:01:55,934 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:55,935 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-09-18 10:01:55,935 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-09-18 10:01:55,935 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=398, Unknown=0, NotChecked=0, Total=506 [2018-09-18 10:01:55,936 INFO L87 Difference]: Start difference. First operand 76 states and 82 transitions. Second operand 23 states. [2018-09-18 10:01:56,416 WARN L178 SmtUtils]: Spent 128.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-09-18 10:01:56,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:56,738 INFO L93 Difference]: Finished difference Result 211 states and 246 transitions. [2018-09-18 10:01:56,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-09-18 10:01:56,738 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 59 [2018-09-18 10:01:56,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:56,739 INFO L225 Difference]: With dead ends: 211 [2018-09-18 10:01:56,740 INFO L226 Difference]: Without dead ends: 182 [2018-09-18 10:01:56,740 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 204 SyntacticMatches, 24 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 659 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=351, Invalid=1289, Unknown=0, NotChecked=0, Total=1640 [2018-09-18 10:01:56,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-09-18 10:01:56,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 76. [2018-09-18 10:01:56,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-09-18 10:01:56,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 82 transitions. [2018-09-18 10:01:56,759 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 82 transitions. Word has length 59 [2018-09-18 10:01:56,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:56,759 INFO L480 AbstractCegarLoop]: Abstraction has 76 states and 82 transitions. [2018-09-18 10:01:56,759 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-09-18 10:01:56,759 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 82 transitions. [2018-09-18 10:01:56,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-09-18 10:01:56,759 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:56,760 INFO L376 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:56,760 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:56,760 INFO L82 PathProgramCache]: Analyzing trace with hash 1451911001, now seen corresponding path program 4 times [2018-09-18 10:01:56,760 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:56,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:56,761 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:56,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:56,761 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:56,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:56,896 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:56,896 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:56,896 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:56,904 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:56,904 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:56,919 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:56,919 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:56,920 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:57,045 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:57,045 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:57,126 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:57,145 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:57,146 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:57,162 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:57,162 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:57,207 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:57,207 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:57,210 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:57,221 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:57,221 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:57,468 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:57,470 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:57,471 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 22 [2018-09-18 10:01:57,471 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:57,471 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-09-18 10:01:57,472 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-09-18 10:01:57,472 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=357, Unknown=0, NotChecked=0, Total=462 [2018-09-18 10:01:57,472 INFO L87 Difference]: Start difference. First operand 76 states and 82 transitions. Second operand 22 states. [2018-09-18 10:01:57,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:57,964 INFO L93 Difference]: Finished difference Result 238 states and 280 transitions. [2018-09-18 10:01:57,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-18 10:01:57,964 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 59 [2018-09-18 10:01:57,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:57,966 INFO L225 Difference]: With dead ends: 238 [2018-09-18 10:01:57,966 INFO L226 Difference]: Without dead ends: 209 [2018-09-18 10:01:57,967 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 205 SyntacticMatches, 24 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 544 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=315, Invalid=1091, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:01:57,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-09-18 10:01:57,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 79. [2018-09-18 10:01:57,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-09-18 10:01:57,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 86 transitions. [2018-09-18 10:01:57,991 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 86 transitions. Word has length 59 [2018-09-18 10:01:57,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:57,991 INFO L480 AbstractCegarLoop]: Abstraction has 79 states and 86 transitions. [2018-09-18 10:01:57,991 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-09-18 10:01:57,991 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 86 transitions. [2018-09-18 10:01:57,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-09-18 10:01:57,992 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:57,992 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:57,992 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:57,992 INFO L82 PathProgramCache]: Analyzing trace with hash 1954413347, now seen corresponding path program 8 times [2018-09-18 10:01:57,993 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:57,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:57,993 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:57,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:57,994 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:57,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:58,282 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 37 proven. 46 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-09-18 10:01:58,282 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:58,282 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:58,289 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:58,289 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:58,308 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:58,308 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:58,309 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:58,328 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:58,329 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:58,382 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:58,401 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:58,401 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:58,417 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:58,417 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:58,461 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:58,462 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:58,465 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:58,470 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:58,471 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:58,539 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-09-18 10:01:58,540 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:58,540 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10, 10, 10] total 13 [2018-09-18 10:01:58,540 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:58,541 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-18 10:01:58,541 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-18 10:01:58,541 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-09-18 10:01:58,541 INFO L87 Difference]: Start difference. First operand 79 states and 86 transitions. Second operand 13 states. [2018-09-18 10:01:58,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:58,675 INFO L93 Difference]: Finished difference Result 89 states and 96 transitions. [2018-09-18 10:01:58,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-18 10:01:58,676 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 61 [2018-09-18 10:01:58,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:58,677 INFO L225 Difference]: With dead ends: 89 [2018-09-18 10:01:58,677 INFO L226 Difference]: Without dead ends: 87 [2018-09-18 10:01:58,678 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 226 SyntacticMatches, 22 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2018-09-18 10:01:58,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-09-18 10:01:58,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2018-09-18 10:01:58,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-09-18 10:01:58,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 94 transitions. [2018-09-18 10:01:58,700 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 94 transitions. Word has length 61 [2018-09-18 10:01:58,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:58,700 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 94 transitions. [2018-09-18 10:01:58,700 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-18 10:01:58,700 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 94 transitions. [2018-09-18 10:01:58,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-09-18 10:01:58,701 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:58,701 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:58,701 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:58,702 INFO L82 PathProgramCache]: Analyzing trace with hash 1550108743, now seen corresponding path program 9 times [2018-09-18 10:01:58,702 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:58,702 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:58,702 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:58,703 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:58,703 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:58,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:59,006 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:59,006 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:59,006 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:59,014 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:59,014 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:59,040 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-18 10:01:59,041 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:59,042 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:59,652 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:59,652 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:59,786 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:59,805 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:59,806 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:59,820 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:59,821 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:59,891 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-18 10:01:59,891 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:59,894 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:59,908 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:01:59,908 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:00,103 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:00,104 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:00,104 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 30 [2018-09-18 10:02:00,104 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:00,105 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-09-18 10:02:00,105 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-09-18 10:02:00,105 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=185, Invalid=685, Unknown=0, NotChecked=0, Total=870 [2018-09-18 10:02:00,105 INFO L87 Difference]: Start difference. First operand 87 states and 94 transitions. Second operand 30 states. [2018-09-18 10:02:00,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:00,544 INFO L93 Difference]: Finished difference Result 156 states and 176 transitions. [2018-09-18 10:02:00,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-18 10:02:00,546 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 69 [2018-09-18 10:02:00,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:00,547 INFO L225 Difference]: With dead ends: 156 [2018-09-18 10:02:00,547 INFO L226 Difference]: Without dead ends: 123 [2018-09-18 10:02:00,549 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 305 GetRequests, 235 SyntacticMatches, 28 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1032 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=409, Invalid=1483, Unknown=0, NotChecked=0, Total=1892 [2018-09-18 10:02:00,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-09-18 10:02:00,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 89. [2018-09-18 10:02:00,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-09-18 10:02:00,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-09-18 10:02:00,570 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 69 [2018-09-18 10:02:00,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:00,571 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-09-18 10:02:00,571 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-09-18 10:02:00,571 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-09-18 10:02:00,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-09-18 10:02:00,571 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:00,572 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:00,572 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:00,572 INFO L82 PathProgramCache]: Analyzing trace with hash 1825386707, now seen corresponding path program 7 times [2018-09-18 10:02:00,572 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:00,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:00,573 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:00,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:00,573 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:00,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:00,841 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:00,841 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:00,841 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:00,848 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:00,848 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:00,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:00,869 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:01,503 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:01,503 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:01,594 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:01,616 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:01,617 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:01,631 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:01,632 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:01,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:01,679 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:01,689 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:01,689 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:01,804 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:01,805 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:01,805 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 29 [2018-09-18 10:02:01,805 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:01,805 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-09-18 10:02:01,806 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-09-18 10:02:01,806 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=645, Unknown=0, NotChecked=0, Total=812 [2018-09-18 10:02:01,806 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 29 states. [2018-09-18 10:02:02,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:02,339 INFO L93 Difference]: Finished difference Result 190 states and 217 transitions. [2018-09-18 10:02:02,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-18 10:02:02,340 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 69 [2018-09-18 10:02:02,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:02,341 INFO L225 Difference]: With dead ends: 190 [2018-09-18 10:02:02,341 INFO L226 Difference]: Without dead ends: 157 [2018-09-18 10:02:02,342 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 310 GetRequests, 236 SyntacticMatches, 28 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1085 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=465, Invalid=1791, Unknown=0, NotChecked=0, Total=2256 [2018-09-18 10:02:02,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-09-18 10:02:02,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 89. [2018-09-18 10:02:02,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-09-18 10:02:02,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-09-18 10:02:02,371 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 69 [2018-09-18 10:02:02,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:02,372 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-09-18 10:02:02,372 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-09-18 10:02:02,372 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-09-18 10:02:02,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-09-18 10:02:02,372 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:02,372 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:02,373 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:02,373 INFO L82 PathProgramCache]: Analyzing trace with hash -1995551649, now seen corresponding path program 8 times [2018-09-18 10:02:02,373 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:02,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:02,374 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:02,374 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:02,374 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:02,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:02,816 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:02,816 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:02,816 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:02,824 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:02,824 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:02,843 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:02,843 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:02,845 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:03,084 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:03,085 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:03,176 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:03,195 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:03,195 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:03,210 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:03,210 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:03,255 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:03,255 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:03,258 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:03,271 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:03,271 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:03,434 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:03,435 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:03,435 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 28 [2018-09-18 10:02:03,436 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:03,436 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-09-18 10:02:03,436 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-09-18 10:02:03,437 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=603, Unknown=0, NotChecked=0, Total=756 [2018-09-18 10:02:03,437 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 28 states. [2018-09-18 10:02:03,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:03,944 INFO L93 Difference]: Finished difference Result 222 states and 256 transitions. [2018-09-18 10:02:03,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-18 10:02:03,944 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 69 [2018-09-18 10:02:03,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:03,945 INFO L225 Difference]: With dead ends: 222 [2018-09-18 10:02:03,946 INFO L226 Difference]: Without dead ends: 189 [2018-09-18 10:02:03,947 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 313 GetRequests, 237 SyntacticMatches, 28 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1095 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=496, Invalid=1954, Unknown=0, NotChecked=0, Total=2450 [2018-09-18 10:02:03,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-09-18 10:02:03,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 89. [2018-09-18 10:02:03,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-09-18 10:02:03,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-09-18 10:02:03,977 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 69 [2018-09-18 10:02:03,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:03,977 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-09-18 10:02:03,977 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-09-18 10:02:03,977 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-09-18 10:02:03,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-09-18 10:02:03,978 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:03,978 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:03,978 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:03,978 INFO L82 PathProgramCache]: Analyzing trace with hash 632871659, now seen corresponding path program 9 times [2018-09-18 10:02:03,978 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:03,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:03,979 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:03,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:03,979 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:03,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:04,156 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:04,156 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:04,157 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:04,163 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:04,163 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:04,184 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-18 10:02:04,184 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:04,186 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:04,353 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:04,353 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:04,448 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:04,467 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:04,467 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:04,483 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:04,483 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:04,558 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-09-18 10:02:04,558 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:04,561 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:04,574 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:04,574 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:04,700 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:04,701 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:04,702 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 27 [2018-09-18 10:02:04,702 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:04,702 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-09-18 10:02:04,702 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-09-18 10:02:04,703 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=559, Unknown=0, NotChecked=0, Total=702 [2018-09-18 10:02:04,703 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 27 states. [2018-09-18 10:02:05,602 WARN L178 SmtUtils]: Spent 136.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-09-18 10:02:05,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:05,706 INFO L93 Difference]: Finished difference Result 252 states and 293 transitions. [2018-09-18 10:02:05,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-18 10:02:05,708 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 69 [2018-09-18 10:02:05,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:05,709 INFO L225 Difference]: With dead ends: 252 [2018-09-18 10:02:05,709 INFO L226 Difference]: Without dead ends: 219 [2018-09-18 10:02:05,710 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 314 GetRequests, 238 SyntacticMatches, 28 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1048 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=496, Invalid=1954, Unknown=0, NotChecked=0, Total=2450 [2018-09-18 10:02:05,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-09-18 10:02:05,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 89. [2018-09-18 10:02:05,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-09-18 10:02:05,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-09-18 10:02:05,745 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 69 [2018-09-18 10:02:05,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:05,745 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-09-18 10:02:05,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-09-18 10:02:05,746 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-09-18 10:02:05,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-09-18 10:02:05,746 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:05,746 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:05,746 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:05,747 INFO L82 PathProgramCache]: Analyzing trace with hash 613260407, now seen corresponding path program 10 times [2018-09-18 10:02:05,747 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:05,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:05,747 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:05,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:05,748 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:05,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:06,112 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:06,112 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:06,112 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:06,120 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:06,120 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:06,140 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:06,140 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:06,142 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:06,395 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:06,395 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:06,498 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:06,518 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:06,518 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:06,533 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:06,534 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:06,582 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:06,582 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:06,586 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:06,599 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:06,600 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:06,733 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:06,734 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:06,734 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 26 [2018-09-18 10:02:06,734 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:06,735 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-09-18 10:02:06,735 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-09-18 10:02:06,735 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=513, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:02:06,735 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 26 states. [2018-09-18 10:02:07,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:07,297 INFO L93 Difference]: Finished difference Result 280 states and 328 transitions. [2018-09-18 10:02:07,297 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-18 10:02:07,297 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 69 [2018-09-18 10:02:07,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:07,299 INFO L225 Difference]: With dead ends: 280 [2018-09-18 10:02:07,299 INFO L226 Difference]: Without dead ends: 247 [2018-09-18 10:02:07,300 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 313 GetRequests, 239 SyntacticMatches, 28 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 938 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=465, Invalid=1791, Unknown=0, NotChecked=0, Total=2256 [2018-09-18 10:02:07,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2018-09-18 10:02:07,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 89. [2018-09-18 10:02:07,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-09-18 10:02:07,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-09-18 10:02:07,341 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 69 [2018-09-18 10:02:07,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:07,341 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-09-18 10:02:07,341 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-09-18 10:02:07,341 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-09-18 10:02:07,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-09-18 10:02:07,342 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:07,342 INFO L376 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:07,342 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:07,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1618825475, now seen corresponding path program 5 times [2018-09-18 10:02:07,343 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:07,343 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:07,343 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:07,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:07,344 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:07,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:07,569 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:07,569 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:07,569 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:07,578 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:07,578 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:07,606 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-09-18 10:02:07,607 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:07,608 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:07,969 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:07,969 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:08,058 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:08,078 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:08,078 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:08,093 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:08,093 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:08,166 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-09-18 10:02:08,166 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:08,169 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:08,181 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:08,182 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:08,344 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:08,345 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:08,345 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 25 [2018-09-18 10:02:08,345 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:08,346 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-09-18 10:02:08,346 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-09-18 10:02:08,346 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=465, Unknown=0, NotChecked=0, Total=600 [2018-09-18 10:02:08,346 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 25 states. [2018-09-18 10:02:08,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:08,894 INFO L93 Difference]: Finished difference Result 311 states and 367 transitions. [2018-09-18 10:02:08,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-18 10:02:08,894 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 69 [2018-09-18 10:02:08,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:08,896 INFO L225 Difference]: With dead ends: 311 [2018-09-18 10:02:08,896 INFO L226 Difference]: Without dead ends: 278 [2018-09-18 10:02:08,897 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 310 GetRequests, 240 SyntacticMatches, 28 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 767 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=409, Invalid=1483, Unknown=0, NotChecked=0, Total=1892 [2018-09-18 10:02:08,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2018-09-18 10:02:08,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 92. [2018-09-18 10:02:08,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-09-18 10:02:08,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 100 transitions. [2018-09-18 10:02:08,933 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 100 transitions. Word has length 69 [2018-09-18 10:02:08,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:08,933 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 100 transitions. [2018-09-18 10:02:08,933 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-09-18 10:02:08,933 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 100 transitions. [2018-09-18 10:02:08,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-09-18 10:02:08,934 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:08,934 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:08,934 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:08,935 INFO L82 PathProgramCache]: Analyzing trace with hash 2111470529, now seen corresponding path program 10 times [2018-09-18 10:02:08,935 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:08,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:08,935 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:08,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:08,936 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:08,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:09,677 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 51 proven. 68 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-09-18 10:02:09,677 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:09,677 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:09,687 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:09,687 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:09,731 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:09,732 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:09,734 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:09,806 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:09,806 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:09,863 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:09,883 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:09,884 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:09,899 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:09,899 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:09,957 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:09,957 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:09,962 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:09,970 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:09,970 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:10,099 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-09-18 10:02:10,100 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:10,101 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11, 11, 11] total 14 [2018-09-18 10:02:10,101 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:10,101 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-18 10:02:10,101 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-18 10:02:10,101 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=134, Unknown=0, NotChecked=0, Total=182 [2018-09-18 10:02:10,102 INFO L87 Difference]: Start difference. First operand 92 states and 100 transitions. Second operand 14 states. [2018-09-18 10:02:10,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:10,849 INFO L93 Difference]: Finished difference Result 102 states and 110 transitions. [2018-09-18 10:02:10,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-18 10:02:10,850 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 71 [2018-09-18 10:02:10,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:10,851 INFO L225 Difference]: With dead ends: 102 [2018-09-18 10:02:10,851 INFO L226 Difference]: Without dead ends: 100 [2018-09-18 10:02:10,851 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 303 GetRequests, 263 SyntacticMatches, 26 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 132 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=61, Invalid=179, Unknown=0, NotChecked=0, Total=240 [2018-09-18 10:02:10,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-09-18 10:02:10,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2018-09-18 10:02:10,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-09-18 10:02:10,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 108 transitions. [2018-09-18 10:02:10,890 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 108 transitions. Word has length 71 [2018-09-18 10:02:10,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:10,891 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 108 transitions. [2018-09-18 10:02:10,891 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-18 10:02:10,891 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 108 transitions. [2018-09-18 10:02:10,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-09-18 10:02:10,892 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:10,892 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:10,892 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:10,892 INFO L82 PathProgramCache]: Analyzing trace with hash 58575589, now seen corresponding path program 11 times [2018-09-18 10:02:10,892 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:10,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:10,893 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:10,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:10,893 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:10,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:11,143 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:11,143 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:11,143 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:11,153 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:11,153 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:11,183 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-18 10:02:11,184 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:11,186 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:11,431 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:11,431 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:11,546 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:11,565 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:11,566 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:11,583 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:11,583 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:11,670 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-18 10:02:11,670 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:11,674 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:11,691 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:11,692 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:12,522 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:12,524 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:12,524 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 34 [2018-09-18 10:02:12,524 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:12,524 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-09-18 10:02:12,524 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-09-18 10:02:12,525 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=235, Invalid=887, Unknown=0, NotChecked=0, Total=1122 [2018-09-18 10:02:12,525 INFO L87 Difference]: Start difference. First operand 100 states and 108 transitions. Second operand 34 states. [2018-09-18 10:02:13,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:13,311 INFO L93 Difference]: Finished difference Result 179 states and 202 transitions. [2018-09-18 10:02:13,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-18 10:02:13,311 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 79 [2018-09-18 10:02:13,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:13,312 INFO L225 Difference]: With dead ends: 179 [2018-09-18 10:02:13,312 INFO L226 Difference]: Without dead ends: 142 [2018-09-18 10:02:13,313 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 349 GetRequests, 269 SyntacticMatches, 32 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1397 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=515, Invalid=1935, Unknown=0, NotChecked=0, Total=2450 [2018-09-18 10:02:13,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-09-18 10:02:13,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 102. [2018-09-18 10:02:13,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-09-18 10:02:13,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-09-18 10:02:13,347 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-09-18 10:02:13,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:13,348 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-09-18 10:02:13,348 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-09-18 10:02:13,348 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-09-18 10:02:13,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-09-18 10:02:13,348 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:13,348 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:13,349 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:13,349 INFO L82 PathProgramCache]: Analyzing trace with hash 127267953, now seen corresponding path program 11 times [2018-09-18 10:02:13,349 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:13,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:13,350 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:13,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:13,350 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:13,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:13,526 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:13,526 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:13,526 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:13,533 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:13,533 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:13,649 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-18 10:02:13,650 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:13,653 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:14,126 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:14,126 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:14,421 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:14,441 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:14,441 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:14,458 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:14,458 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:14,541 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-18 10:02:14,541 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:14,544 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:14,560 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:14,560 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:14,709 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:14,711 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:14,711 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 33 [2018-09-18 10:02:14,711 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:14,711 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-09-18 10:02:14,712 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-09-18 10:02:14,712 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=214, Invalid=842, Unknown=0, NotChecked=0, Total=1056 [2018-09-18 10:02:14,712 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 33 states. [2018-09-18 10:02:15,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:15,430 INFO L93 Difference]: Finished difference Result 219 states and 250 transitions. [2018-09-18 10:02:15,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-09-18 10:02:15,431 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 79 [2018-09-18 10:02:15,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:15,432 INFO L225 Difference]: With dead ends: 219 [2018-09-18 10:02:15,432 INFO L226 Difference]: Without dead ends: 182 [2018-09-18 10:02:15,434 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 270 SyntacticMatches, 32 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1493 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=595, Invalid=2375, Unknown=0, NotChecked=0, Total=2970 [2018-09-18 10:02:15,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-09-18 10:02:15,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 102. [2018-09-18 10:02:15,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-09-18 10:02:15,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-09-18 10:02:15,478 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-09-18 10:02:15,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:15,478 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-09-18 10:02:15,478 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-09-18 10:02:15,478 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-09-18 10:02:15,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-09-18 10:02:15,478 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:15,479 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 5, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:15,479 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:15,479 INFO L82 PathProgramCache]: Analyzing trace with hash 310579453, now seen corresponding path program 12 times [2018-09-18 10:02:15,479 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:15,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:15,480 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:15,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:15,480 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:15,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:15,719 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:15,719 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:15,719 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:15,726 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:15,727 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:15,749 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-09-18 10:02:15,750 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:15,751 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:16,020 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:16,020 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:16,390 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:16,411 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:16,411 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:16,426 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:16,426 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:16,513 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-09-18 10:02:16,514 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:16,517 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:16,530 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:16,530 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:16,696 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:16,698 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:16,698 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 32 [2018-09-18 10:02:16,698 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:16,698 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-09-18 10:02:16,698 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-09-18 10:02:16,699 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=795, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:02:16,699 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 32 states. [2018-09-18 10:02:18,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:18,066 INFO L93 Difference]: Finished difference Result 257 states and 296 transitions. [2018-09-18 10:02:18,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-09-18 10:02:18,067 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 79 [2018-09-18 10:02:18,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:18,069 INFO L225 Difference]: With dead ends: 257 [2018-09-18 10:02:18,069 INFO L226 Difference]: Without dead ends: 220 [2018-09-18 10:02:18,071 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 359 GetRequests, 271 SyntacticMatches, 32 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1543 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=649, Invalid=2657, Unknown=0, NotChecked=0, Total=3306 [2018-09-18 10:02:18,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-09-18 10:02:18,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 102. [2018-09-18 10:02:18,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-09-18 10:02:18,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-09-18 10:02:18,140 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-09-18 10:02:18,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:18,140 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-09-18 10:02:18,140 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-09-18 10:02:18,140 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-09-18 10:02:18,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-09-18 10:02:18,141 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:18,141 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:18,141 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:18,142 INFO L82 PathProgramCache]: Analyzing trace with hash -1427775351, now seen corresponding path program 13 times [2018-09-18 10:02:18,142 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:18,142 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:18,143 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:18,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:18,143 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:18,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:19,474 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 90 proven. 24 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:19,475 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:19,475 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:19,483 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:19,483 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:19,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:19,506 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:19,735 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 90 proven. 24 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:19,735 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:19,920 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 90 proven. 24 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:19,939 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:19,940 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:19,955 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:19,955 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:20,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:20,008 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:20,019 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 90 proven. 24 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:20,019 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:20,212 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 90 proven. 24 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:20,213 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:20,213 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 31 [2018-09-18 10:02:20,213 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:20,214 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-18 10:02:20,214 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-18 10:02:20,214 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=184, Invalid=746, Unknown=0, NotChecked=0, Total=930 [2018-09-18 10:02:20,215 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 31 states. [2018-09-18 10:02:20,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:20,965 INFO L93 Difference]: Finished difference Result 293 states and 340 transitions. [2018-09-18 10:02:20,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-09-18 10:02:20,965 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 79 [2018-09-18 10:02:20,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:20,967 INFO L225 Difference]: With dead ends: 293 [2018-09-18 10:02:20,967 INFO L226 Difference]: Without dead ends: 256 [2018-09-18 10:02:20,968 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 361 GetRequests, 272 SyntacticMatches, 32 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1527 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=668, Invalid=2754, Unknown=0, NotChecked=0, Total=3422 [2018-09-18 10:02:20,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-09-18 10:02:21,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 102. [2018-09-18 10:02:21,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-09-18 10:02:21,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-09-18 10:02:21,011 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-09-18 10:02:21,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:21,011 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-09-18 10:02:21,011 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-18 10:02:21,011 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-09-18 10:02:21,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-09-18 10:02:21,012 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:21,012 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 5, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:21,012 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:21,012 INFO L82 PathProgramCache]: Analyzing trace with hash 143598357, now seen corresponding path program 14 times [2018-09-18 10:02:21,013 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:21,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:21,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:21,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:21,013 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:21,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:21,380 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:21,380 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:21,380 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:21,388 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:21,388 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:21,420 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:21,421 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:21,423 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:21,725 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:21,725 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:21,833 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:21,854 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:21,854 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:21,869 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:21,870 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:21,929 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:21,929 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:21,934 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:21,957 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:21,957 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:22,437 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:22,438 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:22,439 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 30 [2018-09-18 10:02:22,439 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:22,439 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-09-18 10:02:22,440 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-09-18 10:02:22,440 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=175, Invalid=695, Unknown=0, NotChecked=0, Total=870 [2018-09-18 10:02:22,440 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 30 states. [2018-09-18 10:02:23,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:23,481 INFO L93 Difference]: Finished difference Result 327 states and 382 transitions. [2018-09-18 10:02:23,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-09-18 10:02:23,482 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 79 [2018-09-18 10:02:23,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:23,483 INFO L225 Difference]: With dead ends: 327 [2018-09-18 10:02:23,483 INFO L226 Difference]: Without dead ends: 290 [2018-09-18 10:02:23,485 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 361 GetRequests, 273 SyntacticMatches, 32 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1436 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=649, Invalid=2657, Unknown=0, NotChecked=0, Total=3306 [2018-09-18 10:02:23,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2018-09-18 10:02:23,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 102. [2018-09-18 10:02:23,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-09-18 10:02:23,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-09-18 10:02:23,542 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-09-18 10:02:23,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:23,542 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-09-18 10:02:23,543 INFO L481 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-09-18 10:02:23,543 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-09-18 10:02:23,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-09-18 10:02:23,543 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:23,543 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:23,543 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:23,543 INFO L82 PathProgramCache]: Analyzing trace with hash -1602250591, now seen corresponding path program 15 times [2018-09-18 10:02:23,544 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:23,544 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:23,544 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:23,544 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:23,545 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:23,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:23,724 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:23,725 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:23,725 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:23,732 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:23,733 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:23,760 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-09-18 10:02:23,761 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:23,764 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:24,119 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:24,119 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:24,233 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:24,252 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:24,252 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:24,267 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:24,267 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:24,356 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-09-18 10:02:24,356 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:24,360 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:24,375 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:24,376 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:24,564 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:24,565 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:24,565 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 29 [2018-09-18 10:02:24,566 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:24,566 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-09-18 10:02:24,566 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-09-18 10:02:24,566 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=170, Invalid=642, Unknown=0, NotChecked=0, Total=812 [2018-09-18 10:02:24,567 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 29 states. [2018-09-18 10:02:25,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:25,464 INFO L93 Difference]: Finished difference Result 359 states and 422 transitions. [2018-09-18 10:02:25,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-09-18 10:02:25,466 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 79 [2018-09-18 10:02:25,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:25,468 INFO L225 Difference]: With dead ends: 359 [2018-09-18 10:02:25,468 INFO L226 Difference]: Without dead ends: 322 [2018-09-18 10:02:25,469 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 359 GetRequests, 274 SyntacticMatches, 32 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1267 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=595, Invalid=2375, Unknown=0, NotChecked=0, Total=2970 [2018-09-18 10:02:25,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states. [2018-09-18 10:02:25,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 102. [2018-09-18 10:02:25,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-09-18 10:02:25,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-09-18 10:02:25,535 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-09-18 10:02:25,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:25,535 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-09-18 10:02:25,535 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-09-18 10:02:25,535 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-09-18 10:02:25,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-09-18 10:02:25,536 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:25,536 INFO L376 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:25,536 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:25,536 INFO L82 PathProgramCache]: Analyzing trace with hash -1326972627, now seen corresponding path program 6 times [2018-09-18 10:02:25,537 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:25,537 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:25,537 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:25,537 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:25,538 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:25,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:26,328 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:26,329 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:26,329 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:26,337 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:26,337 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:26,360 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-09-18 10:02:26,360 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:26,363 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:26,709 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:26,709 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:26,817 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:26,837 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:26,837 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:26,852 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:26,852 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:26,940 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-09-18 10:02:26,940 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:26,944 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:26,954 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:26,955 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:27,088 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:27,089 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:27,089 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 28 [2018-09-18 10:02:27,089 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:27,089 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-09-18 10:02:27,090 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-09-18 10:02:27,090 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=587, Unknown=0, NotChecked=0, Total=756 [2018-09-18 10:02:27,090 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 28 states. [2018-09-18 10:02:27,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:27,890 INFO L93 Difference]: Finished difference Result 394 states and 466 transitions. [2018-09-18 10:02:27,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-09-18 10:02:27,890 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 79 [2018-09-18 10:02:27,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:27,892 INFO L225 Difference]: With dead ends: 394 [2018-09-18 10:02:27,892 INFO L226 Difference]: Without dead ends: 357 [2018-09-18 10:02:27,893 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 275 SyntacticMatches, 32 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1028 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=515, Invalid=1935, Unknown=0, NotChecked=0, Total=2450 [2018-09-18 10:02:27,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-09-18 10:02:27,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 105. [2018-09-18 10:02:27,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-09-18 10:02:27,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 114 transitions. [2018-09-18 10:02:27,963 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 114 transitions. Word has length 79 [2018-09-18 10:02:27,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:27,964 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 114 transitions. [2018-09-18 10:02:27,964 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-09-18 10:02:27,964 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 114 transitions. [2018-09-18 10:02:27,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-09-18 10:02:27,965 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:27,965 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:27,965 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:27,966 INFO L82 PathProgramCache]: Analyzing trace with hash 1957490143, now seen corresponding path program 12 times [2018-09-18 10:02:27,966 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:27,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:27,967 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:27,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:27,967 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:27,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:28,487 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 67 proven. 94 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-09-18 10:02:28,487 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:28,487 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:28,494 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:28,494 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:28,520 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-18 10:02:28,520 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:28,522 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:28,548 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:28,549 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:28,631 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:28,650 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:28,650 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:28,666 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:28,666 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:28,757 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-18 10:02:28,757 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:28,760 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:28,767 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:28,767 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:28,862 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-09-18 10:02:28,863 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:28,863 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12, 12, 12] total 15 [2018-09-18 10:02:28,863 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:28,863 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-18 10:02:28,864 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-18 10:02:28,864 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-09-18 10:02:28,864 INFO L87 Difference]: Start difference. First operand 105 states and 114 transitions. Second operand 15 states. [2018-09-18 10:02:29,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:29,128 INFO L93 Difference]: Finished difference Result 115 states and 124 transitions. [2018-09-18 10:02:29,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-18 10:02:29,128 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 81 [2018-09-18 10:02:29,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:29,130 INFO L225 Difference]: With dead ends: 115 [2018-09-18 10:02:29,130 INFO L226 Difference]: Without dead ends: 113 [2018-09-18 10:02:29,130 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 300 SyntacticMatches, 30 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2018-09-18 10:02:29,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-09-18 10:02:29,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-09-18 10:02:29,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-09-18 10:02:29,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 122 transitions. [2018-09-18 10:02:29,179 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 122 transitions. Word has length 81 [2018-09-18 10:02:29,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:29,180 INFO L480 AbstractCegarLoop]: Abstraction has 113 states and 122 transitions. [2018-09-18 10:02:29,180 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-18 10:02:29,180 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 122 transitions. [2018-09-18 10:02:29,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-18 10:02:29,180 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:29,180 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:29,180 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:29,181 INFO L82 PathProgramCache]: Analyzing trace with hash -507298045, now seen corresponding path program 13 times [2018-09-18 10:02:29,181 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:29,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:29,181 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:29,181 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:29,182 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:29,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:29,625 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:29,626 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:29,626 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:29,633 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:29,633 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:29,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:29,660 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:29,976 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:29,976 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:30,116 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:30,137 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:30,137 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:30,152 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:30,152 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:30,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:30,208 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:30,224 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:30,225 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:30,392 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:30,393 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:30,393 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 38 [2018-09-18 10:02:30,393 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:30,394 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-18 10:02:30,394 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-18 10:02:30,394 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=291, Invalid=1115, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:02:30,394 INFO L87 Difference]: Start difference. First operand 113 states and 122 transitions. Second operand 38 states. [2018-09-18 10:02:31,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:31,021 INFO L93 Difference]: Finished difference Result 202 states and 228 transitions. [2018-09-18 10:02:31,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-18 10:02:31,021 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 89 [2018-09-18 10:02:31,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:31,022 INFO L225 Difference]: With dead ends: 202 [2018-09-18 10:02:31,022 INFO L226 Difference]: Without dead ends: 161 [2018-09-18 10:02:31,023 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 393 GetRequests, 303 SyntacticMatches, 36 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1817 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=633, Invalid=2447, Unknown=0, NotChecked=0, Total=3080 [2018-09-18 10:02:31,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-09-18 10:02:31,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 115. [2018-09-18 10:02:31,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-09-18 10:02:31,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-09-18 10:02:31,103 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-09-18 10:02:31,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:31,104 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-09-18 10:02:31,104 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-18 10:02:31,104 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-09-18 10:02:31,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-18 10:02:31,104 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:31,105 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 7, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:31,105 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:31,105 INFO L82 PathProgramCache]: Analyzing trace with hash -1248990833, now seen corresponding path program 16 times [2018-09-18 10:02:31,105 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:31,106 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:31,106 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:31,106 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:31,106 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:31,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:31,354 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:31,354 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:31,354 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:31,361 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:31,362 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:31,386 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:31,386 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:31,388 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:31,674 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:31,674 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:31,813 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:31,833 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:31,833 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:31,848 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:31,848 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:31,906 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:31,906 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:31,909 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:31,930 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:31,930 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:32,153 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:32,154 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:32,155 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 37 [2018-09-18 10:02:32,155 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:32,155 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-09-18 10:02:32,155 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-09-18 10:02:32,155 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=267, Invalid=1065, Unknown=0, NotChecked=0, Total=1332 [2018-09-18 10:02:32,156 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 37 states. [2018-09-18 10:02:32,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:32,856 INFO L93 Difference]: Finished difference Result 248 states and 283 transitions. [2018-09-18 10:02:32,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-18 10:02:32,857 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 89 [2018-09-18 10:02:32,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:32,858 INFO L225 Difference]: With dead ends: 248 [2018-09-18 10:02:32,858 INFO L226 Difference]: Without dead ends: 207 [2018-09-18 10:02:32,859 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 400 GetRequests, 304 SyntacticMatches, 36 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1966 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=741, Invalid=3041, Unknown=0, NotChecked=0, Total=3782 [2018-09-18 10:02:32,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-09-18 10:02:32,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 115. [2018-09-18 10:02:32,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-09-18 10:02:32,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-09-18 10:02:32,947 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-09-18 10:02:32,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:32,948 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-09-18 10:02:32,948 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-09-18 10:02:32,948 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-09-18 10:02:32,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-18 10:02:32,948 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:32,949 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 6, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:32,949 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:32,949 INFO L82 PathProgramCache]: Analyzing trace with hash 752469787, now seen corresponding path program 17 times [2018-09-18 10:02:32,949 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:32,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:32,950 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:32,950 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:32,950 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:32,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:33,988 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:33,989 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:33,989 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:33,997 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:33,997 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:34,134 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-09-18 10:02:34,135 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:34,137 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:34,697 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:34,697 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:34,847 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:34,867 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:34,867 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:34,896 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:34,897 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:34,995 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-09-18 10:02:34,995 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:34,999 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:35,013 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:35,014 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:35,170 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:35,171 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:35,172 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 36 [2018-09-18 10:02:35,172 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:35,172 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-09-18 10:02:35,172 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-09-18 10:02:35,172 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=247, Invalid=1013, Unknown=0, NotChecked=0, Total=1260 [2018-09-18 10:02:35,173 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 36 states. [2018-09-18 10:02:36,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:36,035 INFO L93 Difference]: Finished difference Result 292 states and 336 transitions. [2018-09-18 10:02:36,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-09-18 10:02:36,035 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 89 [2018-09-18 10:02:36,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:36,036 INFO L225 Difference]: With dead ends: 292 [2018-09-18 10:02:36,037 INFO L226 Difference]: Without dead ends: 251 [2018-09-18 10:02:36,037 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 305 SyntacticMatches, 36 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2068 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=823, Invalid=3467, Unknown=0, NotChecked=0, Total=4290 [2018-09-18 10:02:36,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2018-09-18 10:02:36,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 115. [2018-09-18 10:02:36,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-09-18 10:02:36,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-09-18 10:02:36,103 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-09-18 10:02:36,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:36,103 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-09-18 10:02:36,103 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-09-18 10:02:36,103 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-09-18 10:02:36,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-18 10:02:36,104 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:36,104 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:36,104 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:36,104 INFO L82 PathProgramCache]: Analyzing trace with hash -1940416601, now seen corresponding path program 18 times [2018-09-18 10:02:36,104 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:36,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:36,105 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:36,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:36,105 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:36,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:36,425 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:36,425 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:36,425 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:36,435 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:36,435 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:36,463 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-18 10:02:36,463 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:36,466 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:36,741 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:36,741 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:36,880 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:36,900 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:36,900 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:36,915 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:02:36,915 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:02:37,019 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-18 10:02:37,020 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:37,023 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:37,037 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:37,037 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:37,228 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:37,229 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:37,230 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 35 [2018-09-18 10:02:37,230 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:37,230 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-09-18 10:02:37,230 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-09-18 10:02:37,230 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=959, Unknown=0, NotChecked=0, Total=1190 [2018-09-18 10:02:37,231 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 35 states. [2018-09-18 10:02:38,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:38,567 INFO L93 Difference]: Finished difference Result 334 states and 387 transitions. [2018-09-18 10:02:38,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-18 10:02:38,567 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 89 [2018-09-18 10:02:38,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:38,569 INFO L225 Difference]: With dead ends: 334 [2018-09-18 10:02:38,569 INFO L226 Difference]: Without dead ends: 293 [2018-09-18 10:02:38,569 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 408 GetRequests, 306 SyntacticMatches, 36 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2097 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=867, Invalid=3689, Unknown=0, NotChecked=0, Total=4556 [2018-09-18 10:02:38,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2018-09-18 10:02:38,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 115. [2018-09-18 10:02:38,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-09-18 10:02:38,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-09-18 10:02:38,636 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-09-18 10:02:38,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:38,636 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-09-18 10:02:38,636 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-09-18 10:02:38,636 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-09-18 10:02:38,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-18 10:02:38,637 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:38,637 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:38,637 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:38,637 INFO L82 PathProgramCache]: Analyzing trace with hash 233315123, now seen corresponding path program 19 times [2018-09-18 10:02:38,637 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:38,638 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:38,638 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:38,638 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:38,638 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:38,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:39,187 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:39,187 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:39,187 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:39,197 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:39,197 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:39,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:39,223 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:39,482 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:39,482 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:39,615 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:39,635 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:39,636 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:39,650 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:39,650 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:39,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:39,707 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:39,725 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:39,725 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:39,900 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:39,901 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:39,901 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 34 [2018-09-18 10:02:39,901 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:39,901 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-09-18 10:02:39,902 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-09-18 10:02:39,902 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=903, Unknown=0, NotChecked=0, Total=1122 [2018-09-18 10:02:39,902 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 34 states. [2018-09-18 10:02:41,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:41,011 INFO L93 Difference]: Finished difference Result 374 states and 436 transitions. [2018-09-18 10:02:41,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-09-18 10:02:41,011 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 89 [2018-09-18 10:02:41,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:41,013 INFO L225 Difference]: With dead ends: 374 [2018-09-18 10:02:41,013 INFO L226 Difference]: Without dead ends: 333 [2018-09-18 10:02:41,014 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 409 GetRequests, 307 SyntacticMatches, 36 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2039 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=867, Invalid=3689, Unknown=0, NotChecked=0, Total=4556 [2018-09-18 10:02:41,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-09-18 10:02:41,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 115. [2018-09-18 10:02:41,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-09-18 10:02:41,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-09-18 10:02:41,084 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-09-18 10:02:41,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:41,085 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-09-18 10:02:41,085 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-09-18 10:02:41,085 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-09-18 10:02:41,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-18 10:02:41,085 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:41,085 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 6, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:41,086 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:41,086 INFO L82 PathProgramCache]: Analyzing trace with hash 1822167487, now seen corresponding path program 20 times [2018-09-18 10:02:41,086 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:41,086 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:41,086 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:41,086 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:41,087 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:41,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:41,376 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:41,376 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:41,376 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:41,384 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:41,384 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:41,408 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:41,408 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:41,409 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:41,647 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:41,648 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:41,775 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:41,795 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:41,796 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:41,810 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:41,810 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:41,864 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:41,864 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:41,869 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:41,886 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:41,886 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:43,152 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:43,153 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:43,154 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 33 [2018-09-18 10:02:43,154 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:43,154 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-09-18 10:02:43,154 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-09-18 10:02:43,154 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=211, Invalid=845, Unknown=0, NotChecked=0, Total=1056 [2018-09-18 10:02:43,155 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 33 states. [2018-09-18 10:02:44,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:44,373 INFO L93 Difference]: Finished difference Result 412 states and 483 transitions. [2018-09-18 10:02:44,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-09-18 10:02:44,373 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 89 [2018-09-18 10:02:44,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:44,375 INFO L225 Difference]: With dead ends: 412 [2018-09-18 10:02:44,375 INFO L226 Difference]: Without dead ends: 371 [2018-09-18 10:02:44,376 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 408 GetRequests, 308 SyntacticMatches, 36 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1888 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=823, Invalid=3467, Unknown=0, NotChecked=0, Total=4290 [2018-09-18 10:02:44,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2018-09-18 10:02:44,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 115. [2018-09-18 10:02:44,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-09-18 10:02:44,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-09-18 10:02:44,467 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-09-18 10:02:44,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:44,467 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-09-18 10:02:44,468 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-09-18 10:02:44,468 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-09-18 10:02:44,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-18 10:02:44,468 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:44,469 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 7, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:44,469 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:44,469 INFO L82 PathProgramCache]: Analyzing trace with hash 1890859851, now seen corresponding path program 21 times [2018-09-18 10:02:44,469 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:44,470 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:44,470 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:44,470 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:44,470 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:44,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:44,820 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:44,820 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:44,820 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:44,827 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:44,827 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:44,857 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-09-18 10:02:44,857 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:44,859 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:45,093 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:45,094 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:45,258 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:45,278 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:45,278 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:45,293 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:45,293 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:45,401 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-09-18 10:02:45,402 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:45,405 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:45,424 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:45,424 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:45,591 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:45,593 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:45,593 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 32 [2018-09-18 10:02:45,593 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:45,593 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-09-18 10:02:45,594 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-09-18 10:02:45,594 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=785, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:02:45,594 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 32 states. [2018-09-18 10:02:47,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:47,157 INFO L93 Difference]: Finished difference Result 448 states and 528 transitions. [2018-09-18 10:02:47,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-18 10:02:47,158 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 89 [2018-09-18 10:02:47,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:47,159 INFO L225 Difference]: With dead ends: 448 [2018-09-18 10:02:47,160 INFO L226 Difference]: Without dead ends: 407 [2018-09-18 10:02:47,160 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 309 SyntacticMatches, 36 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1646 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=741, Invalid=3041, Unknown=0, NotChecked=0, Total=3782 [2018-09-18 10:02:47,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 407 states. [2018-09-18 10:02:47,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 407 to 115. [2018-09-18 10:02:47,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-09-18 10:02:47,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-09-18 10:02:47,249 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-09-18 10:02:47,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:47,249 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-09-18 10:02:47,249 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-09-18 10:02:47,249 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-09-18 10:02:47,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-09-18 10:02:47,250 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:47,250 INFO L376 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:47,250 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:47,250 INFO L82 PathProgramCache]: Analyzing trace with hash 2074171351, now seen corresponding path program 7 times [2018-09-18 10:02:47,250 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:47,251 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:47,251 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:47,251 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:47,251 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:47,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:47,461 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:47,461 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:47,461 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:47,468 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:47,468 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:47,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:47,495 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:47,702 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:47,703 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:47,833 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:47,853 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:47,853 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:47,868 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:47,868 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:02:47,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:47,924 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:47,937 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:47,938 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:48,090 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:48,091 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:48,091 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 31 [2018-09-18 10:02:48,091 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:48,092 INFO L459 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-09-18 10:02:48,092 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-09-18 10:02:48,092 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=723, Unknown=0, NotChecked=0, Total=930 [2018-09-18 10:02:48,092 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 31 states. [2018-09-18 10:02:49,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:49,291 INFO L93 Difference]: Finished difference Result 487 states and 577 transitions. [2018-09-18 10:02:49,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-09-18 10:02:49,291 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 89 [2018-09-18 10:02:49,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:49,293 INFO L225 Difference]: With dead ends: 487 [2018-09-18 10:02:49,293 INFO L226 Difference]: Without dead ends: 446 [2018-09-18 10:02:49,294 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 400 GetRequests, 310 SyntacticMatches, 36 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1327 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=633, Invalid=2447, Unknown=0, NotChecked=0, Total=3080 [2018-09-18 10:02:49,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 446 states. [2018-09-18 10:02:49,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 446 to 118. [2018-09-18 10:02:49,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-09-18 10:02:49,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 128 transitions. [2018-09-18 10:02:49,404 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 128 transitions. Word has length 89 [2018-09-18 10:02:49,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:49,405 INFO L480 AbstractCegarLoop]: Abstraction has 118 states and 128 transitions. [2018-09-18 10:02:49,405 INFO L481 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-09-18 10:02:49,405 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 128 transitions. [2018-09-18 10:02:49,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-09-18 10:02:49,405 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:49,406 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:49,406 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:49,406 INFO L82 PathProgramCache]: Analyzing trace with hash -1421446787, now seen corresponding path program 14 times [2018-09-18 10:02:49,406 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:49,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:49,407 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:02:49,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:49,407 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:49,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:49,985 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 85 proven. 124 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-09-18 10:02:49,985 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:49,985 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:49,994 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:49,994 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:50,025 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:50,025 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:50,027 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:50,083 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:50,083 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:50,191 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:50,211 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:50,211 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:50,226 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:02:50,226 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:50,282 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:02:50,282 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:50,286 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:50,298 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:50,298 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:50,583 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-09-18 10:02:50,584 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:50,584 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13, 13, 13] total 16 [2018-09-18 10:02:50,584 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:50,585 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-18 10:02:50,585 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-18 10:02:50,585 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=173, Unknown=0, NotChecked=0, Total=240 [2018-09-18 10:02:50,585 INFO L87 Difference]: Start difference. First operand 118 states and 128 transitions. Second operand 16 states. [2018-09-18 10:02:51,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:51,158 INFO L93 Difference]: Finished difference Result 128 states and 138 transitions. [2018-09-18 10:02:51,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-18 10:02:51,159 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 91 [2018-09-18 10:02:51,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:51,160 INFO L225 Difference]: With dead ends: 128 [2018-09-18 10:02:51,160 INFO L226 Difference]: Without dead ends: 126 [2018-09-18 10:02:51,161 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 387 GetRequests, 337 SyntacticMatches, 34 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=80, Invalid=226, Unknown=0, NotChecked=0, Total=306 [2018-09-18 10:02:51,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-09-18 10:02:51,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-09-18 10:02:51,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-09-18 10:02:51,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 136 transitions. [2018-09-18 10:02:51,233 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 136 transitions. Word has length 91 [2018-09-18 10:02:51,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:51,233 INFO L480 AbstractCegarLoop]: Abstraction has 126 states and 136 transitions. [2018-09-18 10:02:51,233 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-18 10:02:51,234 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 136 transitions. [2018-09-18 10:02:51,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-18 10:02:51,234 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:51,234 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:51,234 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:51,235 INFO L82 PathProgramCache]: Analyzing trace with hash -161069919, now seen corresponding path program 15 times [2018-09-18 10:02:51,235 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:51,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:51,235 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:51,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:51,236 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:51,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:51,583 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:51,583 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:51,583 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:51,590 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:51,591 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:51,619 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-18 10:02:51,619 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:51,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:51,991 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:51,991 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:52,438 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:52,458 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:52,458 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:52,474 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:02:52,474 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:02:52,594 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-18 10:02:52,595 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:52,598 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:52,620 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:52,620 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:53,464 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:53,466 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:53,466 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 42 [2018-09-18 10:02:53,466 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:53,467 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-09-18 10:02:53,467 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-09-18 10:02:53,467 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=353, Invalid=1369, Unknown=0, NotChecked=0, Total=1722 [2018-09-18 10:02:53,468 INFO L87 Difference]: Start difference. First operand 126 states and 136 transitions. Second operand 42 states. [2018-09-18 10:02:54,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:54,362 INFO L93 Difference]: Finished difference Result 225 states and 254 transitions. [2018-09-18 10:02:54,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-09-18 10:02:54,363 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 99 [2018-09-18 10:02:54,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:54,364 INFO L225 Difference]: With dead ends: 225 [2018-09-18 10:02:54,364 INFO L226 Difference]: Without dead ends: 180 [2018-09-18 10:02:54,365 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 437 GetRequests, 337 SyntacticMatches, 40 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2292 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=763, Invalid=3019, Unknown=0, NotChecked=0, Total=3782 [2018-09-18 10:02:54,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-09-18 10:02:54,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 128. [2018-09-18 10:02:54,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-09-18 10:02:54,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-09-18 10:02:54,482 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-09-18 10:02:54,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:54,482 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-09-18 10:02:54,482 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-09-18 10:02:54,482 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-09-18 10:02:54,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-18 10:02:54,483 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:54,483 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 8, 7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:54,483 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:54,484 INFO L82 PathProgramCache]: Analyzing trace with hash 1635135533, now seen corresponding path program 22 times [2018-09-18 10:02:54,484 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:54,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:54,484 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:54,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:54,485 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:54,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:54,949 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:54,949 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:54,949 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:54,956 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:54,956 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:54,985 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:54,985 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:54,986 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:55,376 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:55,376 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:55,644 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:55,663 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:55,664 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:55,678 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:02:55,678 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:02:55,750 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:02:55,751 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:55,754 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:55,771 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:55,771 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:55,953 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:55,955 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:55,955 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 41 [2018-09-18 10:02:55,955 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:55,956 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-09-18 10:02:55,956 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-09-18 10:02:55,956 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=326, Invalid=1314, Unknown=0, NotChecked=0, Total=1640 [2018-09-18 10:02:55,957 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 41 states. [2018-09-18 10:02:57,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:57,009 INFO L93 Difference]: Finished difference Result 277 states and 316 transitions. [2018-09-18 10:02:57,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-09-18 10:02:57,009 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 99 [2018-09-18 10:02:57,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:57,010 INFO L225 Difference]: With dead ends: 277 [2018-09-18 10:02:57,010 INFO L226 Difference]: Without dead ends: 232 [2018-09-18 10:02:57,011 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 445 GetRequests, 338 SyntacticMatches, 40 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2504 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=903, Invalid=3789, Unknown=0, NotChecked=0, Total=4692 [2018-09-18 10:02:57,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-09-18 10:02:57,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 128. [2018-09-18 10:02:57,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-09-18 10:02:57,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-09-18 10:02:57,160 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-09-18 10:02:57,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:02:57,160 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-09-18 10:02:57,161 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-09-18 10:02:57,161 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-09-18 10:02:57,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-18 10:02:57,161 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:02:57,162 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 7, 6, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:02:57,162 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:02:57,162 INFO L82 PathProgramCache]: Analyzing trace with hash 1382256313, now seen corresponding path program 23 times [2018-09-18 10:02:57,162 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:02:57,163 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:57,163 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:02:57,163 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:02:57,163 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:02:57,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:02:57,593 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:57,593 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:57,594 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:02:57,603 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:57,603 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:57,635 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-09-18 10:02:57,636 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:57,638 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:57,987 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:57,987 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:58,146 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:58,165 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:02:58,166 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:02:58,183 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:02:58,183 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:02:58,296 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-09-18 10:02:58,296 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:02:58,300 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:02:58,317 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:58,317 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:02:58,550 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:02:58,551 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:02:58,551 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 40 [2018-09-18 10:02:58,551 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:02:58,552 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-09-18 10:02:58,552 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-09-18 10:02:58,552 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=303, Invalid=1257, Unknown=0, NotChecked=0, Total=1560 [2018-09-18 10:02:58,552 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 40 states. [2018-09-18 10:02:59,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:02:59,931 INFO L93 Difference]: Finished difference Result 327 states and 376 transitions. [2018-09-18 10:02:59,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-18 10:02:59,932 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 99 [2018-09-18 10:02:59,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:02:59,933 INFO L225 Difference]: With dead ends: 327 [2018-09-18 10:02:59,933 INFO L226 Difference]: Without dead ends: 282 [2018-09-18 10:02:59,934 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 339 SyntacticMatches, 40 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2670 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1018, Invalid=4384, Unknown=0, NotChecked=0, Total=5402 [2018-09-18 10:02:59,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-09-18 10:03:00,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 128. [2018-09-18 10:03:00,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-09-18 10:03:00,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-09-18 10:03:00,026 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-09-18 10:03:00,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:00,027 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-09-18 10:03:00,027 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-09-18 10:03:00,027 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-09-18 10:03:00,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-18 10:03:00,027 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:00,027 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 6, 5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:00,028 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:00,028 INFO L82 PathProgramCache]: Analyzing trace with hash 2012160069, now seen corresponding path program 24 times [2018-09-18 10:03:00,028 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:00,028 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:00,028 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:00,029 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:00,029 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:00,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:00,289 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:00,290 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:00,290 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:00,297 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:00,297 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:00,330 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-18 10:03:00,330 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:00,333 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:00,654 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:00,654 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:00,818 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:00,839 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:00,839 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:00,854 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:00,854 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:00,976 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-09-18 10:03:00,976 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:00,980 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:00,996 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:00,996 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:01,725 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:01,727 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:01,727 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 39 [2018-09-18 10:03:01,727 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:01,727 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-09-18 10:03:01,728 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-09-18 10:03:01,728 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=284, Invalid=1198, Unknown=0, NotChecked=0, Total=1482 [2018-09-18 10:03:01,728 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 39 states. [2018-09-18 10:03:03,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:03,244 INFO L93 Difference]: Finished difference Result 375 states and 434 transitions. [2018-09-18 10:03:03,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-09-18 10:03:03,244 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 99 [2018-09-18 10:03:03,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:03,246 INFO L225 Difference]: With dead ends: 375 [2018-09-18 10:03:03,246 INFO L226 Difference]: Without dead ends: 330 [2018-09-18 10:03:03,247 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 455 GetRequests, 340 SyntacticMatches, 40 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2758 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1093, Invalid=4759, Unknown=0, NotChecked=0, Total=5852 [2018-09-18 10:03:03,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2018-09-18 10:03:03,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 128. [2018-09-18 10:03:03,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-09-18 10:03:03,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-09-18 10:03:03,348 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-09-18 10:03:03,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:03,348 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-09-18 10:03:03,349 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-09-18 10:03:03,349 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-09-18 10:03:03,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-18 10:03:03,349 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:03,349 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 5, 5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:03,349 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:03,350 INFO L82 PathProgramCache]: Analyzing trace with hash -1173773103, now seen corresponding path program 25 times [2018-09-18 10:03:03,350 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:03,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:03,350 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:03,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:03,350 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:03,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:03,739 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 152 proven. 40 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:03,739 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:03,739 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:03,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:03,747 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:03,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:03,776 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:04,316 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 152 proven. 40 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:04,316 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:04,475 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 152 proven. 40 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:04,504 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:04,505 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:04,531 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:04,531 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:04,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:04,591 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:04,611 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 152 proven. 40 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:04,611 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:04,801 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 152 proven. 40 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:04,802 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:04,803 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 38 [2018-09-18 10:03:04,803 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:04,803 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-18 10:03:04,803 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-18 10:03:04,803 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=269, Invalid=1137, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:03:04,804 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 38 states. [2018-09-18 10:03:06,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:06,311 INFO L93 Difference]: Finished difference Result 421 states and 490 transitions. [2018-09-18 10:03:06,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-09-18 10:03:06,311 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 99 [2018-09-18 10:03:06,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:06,313 INFO L225 Difference]: With dead ends: 421 [2018-09-18 10:03:06,313 INFO L226 Difference]: Without dead ends: 376 [2018-09-18 10:03:06,314 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 457 GetRequests, 341 SyntacticMatches, 40 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2748 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1119, Invalid=4887, Unknown=0, NotChecked=0, Total=6006 [2018-09-18 10:03:06,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 376 states. [2018-09-18 10:03:06,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 376 to 128. [2018-09-18 10:03:06,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-09-18 10:03:06,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-09-18 10:03:06,442 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-09-18 10:03:06,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:06,442 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-09-18 10:03:06,442 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-18 10:03:06,443 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-09-18 10:03:06,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-18 10:03:06,443 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:06,443 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 6, 5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:06,444 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:06,444 INFO L82 PathProgramCache]: Analyzing trace with hash -975971235, now seen corresponding path program 26 times [2018-09-18 10:03:06,444 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:06,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:06,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:06,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:06,445 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:06,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:06,692 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:06,692 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:06,692 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:06,699 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:06,699 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:06,726 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:06,726 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:06,727 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:07,013 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:07,014 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:07,172 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:07,192 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:07,192 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:07,207 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:07,207 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:07,268 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:07,268 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:07,271 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:07,288 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:07,288 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:07,526 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:07,528 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:07,528 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 37 [2018-09-18 10:03:07,528 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:07,529 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-09-18 10:03:07,529 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-09-18 10:03:07,529 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=258, Invalid=1074, Unknown=0, NotChecked=0, Total=1332 [2018-09-18 10:03:07,530 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 37 states. [2018-09-18 10:03:09,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:09,358 INFO L93 Difference]: Finished difference Result 465 states and 544 transitions. [2018-09-18 10:03:09,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-09-18 10:03:09,358 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 99 [2018-09-18 10:03:09,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:09,360 INFO L225 Difference]: With dead ends: 465 [2018-09-18 10:03:09,360 INFO L226 Difference]: Without dead ends: 420 [2018-09-18 10:03:09,362 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 457 GetRequests, 342 SyntacticMatches, 40 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2631 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1093, Invalid=4759, Unknown=0, NotChecked=0, Total=5852 [2018-09-18 10:03:09,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420 states. [2018-09-18 10:03:09,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420 to 128. [2018-09-18 10:03:09,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-09-18 10:03:09,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-09-18 10:03:09,487 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-09-18 10:03:09,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:09,487 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-09-18 10:03:09,487 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-09-18 10:03:09,487 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-09-18 10:03:09,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-18 10:03:09,488 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:09,488 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 7, 6, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:09,488 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:09,488 INFO L82 PathProgramCache]: Analyzing trace with hash -1717664023, now seen corresponding path program 27 times [2018-09-18 10:03:09,488 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:09,489 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:09,489 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:09,489 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:09,489 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:09,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:11,978 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:11,978 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:11,978 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:11,985 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:11,985 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:12,021 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-18 10:03:12,021 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:12,024 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:12,306 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:12,306 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:13,102 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:13,122 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:13,122 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:13,136 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:13,137 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:13,269 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-09-18 10:03:13,270 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:13,294 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:13,309 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:13,309 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:13,478 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:13,479 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:13,480 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 36 [2018-09-18 10:03:13,480 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:13,482 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-09-18 10:03:13,483 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-09-18 10:03:13,483 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=251, Invalid=1009, Unknown=0, NotChecked=0, Total=1260 [2018-09-18 10:03:13,483 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 36 states. [2018-09-18 10:03:15,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:15,336 INFO L93 Difference]: Finished difference Result 507 states and 596 transitions. [2018-09-18 10:03:15,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-09-18 10:03:15,336 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 99 [2018-09-18 10:03:15,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:15,338 INFO L225 Difference]: With dead ends: 507 [2018-09-18 10:03:15,338 INFO L226 Difference]: Without dead ends: 462 [2018-09-18 10:03:15,339 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 455 GetRequests, 343 SyntacticMatches, 40 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2404 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=1018, Invalid=4384, Unknown=0, NotChecked=0, Total=5402 [2018-09-18 10:03:15,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 462 states. [2018-09-18 10:03:15,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 462 to 128. [2018-09-18 10:03:15,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-09-18 10:03:15,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-09-18 10:03:15,466 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-09-18 10:03:15,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:15,466 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-09-18 10:03:15,466 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-09-18 10:03:15,467 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-09-18 10:03:15,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-18 10:03:15,467 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:15,467 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 8, 7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:15,467 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:15,467 INFO L82 PathProgramCache]: Analyzing trace with hash 283796597, now seen corresponding path program 28 times [2018-09-18 10:03:15,468 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:15,468 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:15,468 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:15,468 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:15,468 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:15,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:15,800 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:15,800 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:15,800 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:15,807 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:15,807 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:15,835 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:15,835 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:15,837 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:16,091 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:16,091 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:16,252 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:16,273 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:16,273 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:16,288 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:16,288 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:16,361 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:16,361 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:16,364 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:16,384 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:16,384 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:16,643 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:16,644 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:16,645 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 35 [2018-09-18 10:03:16,645 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:16,645 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-09-18 10:03:16,645 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-09-18 10:03:16,645 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=248, Invalid=942, Unknown=0, NotChecked=0, Total=1190 [2018-09-18 10:03:16,646 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 35 states. [2018-09-18 10:03:18,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:18,283 INFO L93 Difference]: Finished difference Result 547 states and 646 transitions. [2018-09-18 10:03:18,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-09-18 10:03:18,284 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 99 [2018-09-18 10:03:18,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:18,286 INFO L225 Difference]: With dead ends: 547 [2018-09-18 10:03:18,286 INFO L226 Difference]: Without dead ends: 502 [2018-09-18 10:03:18,287 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 344 SyntacticMatches, 40 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2075 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=903, Invalid=3789, Unknown=0, NotChecked=0, Total=4692 [2018-09-18 10:03:18,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 502 states. [2018-09-18 10:03:18,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 502 to 128. [2018-09-18 10:03:18,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-09-18 10:03:18,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-09-18 10:03:18,420 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-09-18 10:03:18,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:18,420 INFO L480 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-09-18 10:03:18,421 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-09-18 10:03:18,421 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-09-18 10:03:18,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-09-18 10:03:18,421 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:18,421 INFO L376 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:18,421 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:18,422 INFO L82 PathProgramCache]: Analyzing trace with hash 1885877505, now seen corresponding path program 8 times [2018-09-18 10:03:18,422 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:18,422 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:18,423 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:18,423 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:18,423 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:18,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:18,747 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:18,747 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:18,748 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:18,755 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:18,756 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:18,782 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:18,782 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:18,784 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:19,039 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:19,040 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:19,340 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:19,359 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:19,359 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:19,374 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:19,375 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:19,437 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:19,437 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:19,442 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:19,459 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:19,459 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:19,705 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:19,707 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:19,707 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 34 [2018-09-18 10:03:19,707 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:19,707 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-09-18 10:03:19,707 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-09-18 10:03:19,708 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=873, Unknown=0, NotChecked=0, Total=1122 [2018-09-18 10:03:19,708 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 34 states. [2018-09-18 10:03:21,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:21,396 INFO L93 Difference]: Finished difference Result 590 states and 700 transitions. [2018-09-18 10:03:21,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-09-18 10:03:21,397 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 99 [2018-09-18 10:03:21,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:21,399 INFO L225 Difference]: With dead ends: 590 [2018-09-18 10:03:21,399 INFO L226 Difference]: Without dead ends: 545 [2018-09-18 10:03:21,400 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 445 GetRequests, 345 SyntacticMatches, 40 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1664 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=763, Invalid=3019, Unknown=0, NotChecked=0, Total=3782 [2018-09-18 10:03:21,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states. [2018-09-18 10:03:21,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 131. [2018-09-18 10:03:21,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-09-18 10:03:21,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 142 transitions. [2018-09-18 10:03:21,536 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 142 transitions. Word has length 99 [2018-09-18 10:03:21,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:21,537 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 142 transitions. [2018-09-18 10:03:21,537 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-09-18 10:03:21,537 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 142 transitions. [2018-09-18 10:03:21,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-09-18 10:03:21,538 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:21,538 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:21,538 INFO L423 AbstractCegarLoop]: === Iteration 55 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:21,538 INFO L82 PathProgramCache]: Analyzing trace with hash -1743772005, now seen corresponding path program 16 times [2018-09-18 10:03:21,538 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:21,539 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:21,539 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:21,539 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:21,539 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:21,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:21,682 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 105 proven. 158 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-09-18 10:03:21,683 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:21,683 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:21,690 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:21,690 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:21,721 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:21,722 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:21,723 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:21,759 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:21,760 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:21,871 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:21,891 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:21,891 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:21,906 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:21,906 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:21,981 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:21,982 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:21,985 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:21,994 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:21,995 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:22,140 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-09-18 10:03:22,141 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:22,141 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14, 14, 14] total 17 [2018-09-18 10:03:22,142 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:22,142 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-18 10:03:22,142 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-18 10:03:22,142 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2018-09-18 10:03:22,142 INFO L87 Difference]: Start difference. First operand 131 states and 142 transitions. Second operand 17 states. [2018-09-18 10:03:22,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:22,465 INFO L93 Difference]: Finished difference Result 141 states and 152 transitions. [2018-09-18 10:03:22,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-18 10:03:22,465 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 101 [2018-09-18 10:03:22,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:22,466 INFO L225 Difference]: With dead ends: 141 [2018-09-18 10:03:22,467 INFO L226 Difference]: Without dead ends: 139 [2018-09-18 10:03:22,467 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 429 GetRequests, 374 SyntacticMatches, 38 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 249 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2018-09-18 10:03:22,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-09-18 10:03:22,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-09-18 10:03:22,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-09-18 10:03:22,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 150 transitions. [2018-09-18 10:03:22,594 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 150 transitions. Word has length 101 [2018-09-18 10:03:22,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:22,594 INFO L480 AbstractCegarLoop]: Abstraction has 139 states and 150 transitions. [2018-09-18 10:03:22,594 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-18 10:03:22,594 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 150 transitions. [2018-09-18 10:03:22,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-18 10:03:22,595 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:22,595 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:22,595 INFO L423 AbstractCegarLoop]: === Iteration 56 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:22,595 INFO L82 PathProgramCache]: Analyzing trace with hash -860881985, now seen corresponding path program 17 times [2018-09-18 10:03:22,595 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:22,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:22,596 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:22,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:22,596 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:22,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:24,870 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:24,871 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:24,871 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:24,878 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:24,878 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:24,917 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-18 10:03:24,917 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:24,920 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:25,335 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:25,336 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:25,539 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:25,559 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:25,559 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:25,574 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:25,574 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:25,714 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-18 10:03:25,714 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:25,718 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:25,737 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:25,738 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:25,962 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:25,964 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:25,964 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 46 [2018-09-18 10:03:25,964 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:25,964 INFO L459 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-09-18 10:03:25,965 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-09-18 10:03:25,965 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=421, Invalid=1649, Unknown=0, NotChecked=0, Total=2070 [2018-09-18 10:03:25,965 INFO L87 Difference]: Start difference. First operand 139 states and 150 transitions. Second operand 46 states. [2018-09-18 10:03:26,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:26,915 INFO L93 Difference]: Finished difference Result 248 states and 280 transitions. [2018-09-18 10:03:26,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-09-18 10:03:26,915 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 109 [2018-09-18 10:03:26,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:26,916 INFO L225 Difference]: With dead ends: 248 [2018-09-18 10:03:26,916 INFO L226 Difference]: Without dead ends: 199 [2018-09-18 10:03:26,917 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 481 GetRequests, 371 SyntacticMatches, 44 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2822 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=905, Invalid=3651, Unknown=0, NotChecked=0, Total=4556 [2018-09-18 10:03:26,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-09-18 10:03:27,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 141. [2018-09-18 10:03:27,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-09-18 10:03:27,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-09-18 10:03:27,052 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-09-18 10:03:27,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:27,052 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-09-18 10:03:27,052 INFO L481 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-09-18 10:03:27,052 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-09-18 10:03:27,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-18 10:03:27,053 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:27,053 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 9, 8, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:27,053 INFO L423 AbstractCegarLoop]: === Iteration 57 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:27,053 INFO L82 PathProgramCache]: Analyzing trace with hash 1311238219, now seen corresponding path program 29 times [2018-09-18 10:03:27,053 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:27,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:27,054 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:27,054 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:27,054 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:27,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:27,844 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:27,844 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:27,844 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:27,855 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:27,855 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:27,889 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-18 10:03:27,889 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:27,891 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:28,308 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:28,308 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:28,525 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:28,546 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:28,546 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:28,561 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:28,561 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:28,693 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-18 10:03:28,693 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:28,697 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:28,719 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:28,719 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:28,989 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:28,992 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:28,992 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 45 [2018-09-18 10:03:28,992 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:28,992 INFO L459 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-09-18 10:03:28,993 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-09-18 10:03:28,993 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=391, Invalid=1589, Unknown=0, NotChecked=0, Total=1980 [2018-09-18 10:03:28,993 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 45 states. [2018-09-18 10:03:30,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:30,514 INFO L93 Difference]: Finished difference Result 306 states and 349 transitions. [2018-09-18 10:03:30,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-09-18 10:03:30,517 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 109 [2018-09-18 10:03:30,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:30,518 INFO L225 Difference]: With dead ends: 306 [2018-09-18 10:03:30,518 INFO L226 Difference]: Without dead ends: 257 [2018-09-18 10:03:30,519 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 372 SyntacticMatches, 44 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3107 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1081, Invalid=4619, Unknown=0, NotChecked=0, Total=5700 [2018-09-18 10:03:30,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-09-18 10:03:30,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 141. [2018-09-18 10:03:30,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-09-18 10:03:30,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-09-18 10:03:30,665 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-09-18 10:03:30,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:30,665 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-09-18 10:03:30,665 INFO L481 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-09-18 10:03:30,665 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-09-18 10:03:30,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-18 10:03:30,666 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:30,666 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 8, 7, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:30,666 INFO L423 AbstractCegarLoop]: === Iteration 58 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:30,666 INFO L82 PathProgramCache]: Analyzing trace with hash 562661335, now seen corresponding path program 30 times [2018-09-18 10:03:30,667 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:30,667 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:30,667 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:30,667 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:30,667 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:30,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:33,280 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:33,280 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:33,281 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:33,287 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:33,287 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:33,324 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-09-18 10:03:33,324 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:33,327 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:33,727 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:33,728 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:33,936 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:33,956 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:33,956 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:33,971 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:33,971 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:34,110 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-09-18 10:03:34,110 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:34,114 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:34,134 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:34,134 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:34,351 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:34,353 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:34,353 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 44 [2018-09-18 10:03:34,353 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:34,353 INFO L459 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-09-18 10:03:34,353 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-09-18 10:03:34,354 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=365, Invalid=1527, Unknown=0, NotChecked=0, Total=1892 [2018-09-18 10:03:34,354 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 44 states. [2018-09-18 10:03:36,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:36,171 INFO L93 Difference]: Finished difference Result 362 states and 416 transitions. [2018-09-18 10:03:36,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-09-18 10:03:36,171 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 109 [2018-09-18 10:03:36,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:36,173 INFO L225 Difference]: With dead ends: 362 [2018-09-18 10:03:36,173 INFO L226 Difference]: Without dead ends: 313 [2018-09-18 10:03:36,174 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 497 GetRequests, 373 SyntacticMatches, 44 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3349 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=1234, Invalid=5408, Unknown=0, NotChecked=0, Total=6642 [2018-09-18 10:03:36,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2018-09-18 10:03:36,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 141. [2018-09-18 10:03:36,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-09-18 10:03:36,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-09-18 10:03:36,376 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-09-18 10:03:36,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:36,376 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-09-18 10:03:36,377 INFO L481 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-09-18 10:03:36,377 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-09-18 10:03:36,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-18 10:03:36,377 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:36,377 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 7, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:36,378 INFO L423 AbstractCegarLoop]: === Iteration 59 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:36,378 INFO L82 PathProgramCache]: Analyzing trace with hash 195402339, now seen corresponding path program 31 times [2018-09-18 10:03:36,378 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:36,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:36,379 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:36,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:36,379 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:36,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:36,878 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:36,879 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:36,879 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:36,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:36,886 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:36,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:36,918 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:37,320 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:37,320 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:37,504 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:37,524 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:37,524 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:37,538 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:37,539 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:03:37,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:37,606 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:37,623 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:37,623 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:37,857 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:37,858 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:37,858 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 43 [2018-09-18 10:03:37,858 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:37,858 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-09-18 10:03:37,859 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-09-18 10:03:37,859 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=343, Invalid=1463, Unknown=0, NotChecked=0, Total=1806 [2018-09-18 10:03:37,859 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 43 states. [2018-09-18 10:03:39,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:39,632 INFO L93 Difference]: Finished difference Result 416 states and 481 transitions. [2018-09-18 10:03:39,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-09-18 10:03:39,633 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 109 [2018-09-18 10:03:39,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:39,634 INFO L225 Difference]: With dead ends: 416 [2018-09-18 10:03:39,634 INFO L226 Difference]: Without dead ends: 367 [2018-09-18 10:03:39,635 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 502 GetRequests, 374 SyntacticMatches, 44 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3510 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1346, Invalid=5964, Unknown=0, NotChecked=0, Total=7310 [2018-09-18 10:03:39,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367 states. [2018-09-18 10:03:39,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367 to 141. [2018-09-18 10:03:39,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-09-18 10:03:39,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-09-18 10:03:39,857 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-09-18 10:03:39,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:39,858 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-09-18 10:03:39,858 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-09-18 10:03:39,858 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-09-18 10:03:39,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-18 10:03:39,859 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:39,859 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:39,859 INFO L423 AbstractCegarLoop]: === Iteration 60 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:39,859 INFO L82 PathProgramCache]: Analyzing trace with hash 1316806639, now seen corresponding path program 32 times [2018-09-18 10:03:39,859 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:39,860 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:39,860 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:03:39,860 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:39,860 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:39,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:40,995 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:40,995 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:40,995 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:41,004 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:41,004 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:41,040 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:41,040 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:41,042 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:41,419 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:41,419 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:41,613 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:41,632 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:41,632 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:41,647 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:03:41,647 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:41,717 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:03:41,717 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:41,721 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:41,739 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:41,739 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:42,046 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:42,048 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:42,048 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 42 [2018-09-18 10:03:42,048 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:42,048 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-09-18 10:03:42,048 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-09-18 10:03:42,049 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=1397, Unknown=0, NotChecked=0, Total=1722 [2018-09-18 10:03:42,049 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 42 states. [2018-09-18 10:03:44,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:44,036 INFO L93 Difference]: Finished difference Result 468 states and 544 transitions. [2018-09-18 10:03:44,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-09-18 10:03:44,036 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 109 [2018-09-18 10:03:44,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:44,038 INFO L225 Difference]: With dead ends: 468 [2018-09-18 10:03:44,038 INFO L226 Difference]: Without dead ends: 419 [2018-09-18 10:03:44,039 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 505 GetRequests, 375 SyntacticMatches, 44 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3564 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1405, Invalid=6251, Unknown=0, NotChecked=0, Total=7656 [2018-09-18 10:03:44,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 419 states. [2018-09-18 10:03:44,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 419 to 141. [2018-09-18 10:03:44,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-09-18 10:03:44,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-09-18 10:03:44,180 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-09-18 10:03:44,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:44,180 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-09-18 10:03:44,181 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-09-18 10:03:44,181 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-09-18 10:03:44,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-18 10:03:44,181 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:44,181 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:44,182 INFO L423 AbstractCegarLoop]: === Iteration 61 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:44,182 INFO L82 PathProgramCache]: Analyzing trace with hash 893393019, now seen corresponding path program 33 times [2018-09-18 10:03:44,182 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:44,183 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:44,183 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:44,183 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:44,183 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:44,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:44,439 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:44,439 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:44,439 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:44,446 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:44,446 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:44,486 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-09-18 10:03:44,486 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:44,489 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:45,083 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:45,083 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:45,533 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:45,553 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:45,553 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:45,567 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:03:45,568 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:45,714 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-09-18 10:03:45,715 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:45,719 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:45,739 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:45,739 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:45,948 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:45,950 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:45,950 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 41 [2018-09-18 10:03:45,950 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:45,950 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-09-18 10:03:45,951 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-09-18 10:03:45,951 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=311, Invalid=1329, Unknown=0, NotChecked=0, Total=1640 [2018-09-18 10:03:45,951 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 41 states. [2018-09-18 10:03:48,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:48,042 INFO L93 Difference]: Finished difference Result 518 states and 605 transitions. [2018-09-18 10:03:48,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-09-18 10:03:48,043 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 109 [2018-09-18 10:03:48,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:48,044 INFO L225 Difference]: With dead ends: 518 [2018-09-18 10:03:48,044 INFO L226 Difference]: Without dead ends: 469 [2018-09-18 10:03:48,045 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 506 GetRequests, 376 SyntacticMatches, 44 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3497 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1405, Invalid=6251, Unknown=0, NotChecked=0, Total=7656 [2018-09-18 10:03:48,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 469 states. [2018-09-18 10:03:48,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 469 to 141. [2018-09-18 10:03:48,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-09-18 10:03:48,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-09-18 10:03:48,199 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-09-18 10:03:48,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:48,199 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-09-18 10:03:48,199 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-09-18 10:03:48,199 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-09-18 10:03:48,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-18 10:03:48,200 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:48,200 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 7, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:48,200 INFO L423 AbstractCegarLoop]: === Iteration 62 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:48,200 INFO L82 PathProgramCache]: Analyzing trace with hash -1605368825, now seen corresponding path program 34 times [2018-09-18 10:03:48,200 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:48,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:48,201 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:48,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:48,201 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:48,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:48,508 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:48,508 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:48,508 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:48,517 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:48,517 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:48,549 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:48,549 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:48,551 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:48,923 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:48,923 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:49,112 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:49,132 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:49,132 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:49,147 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:49,147 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:49,229 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:49,230 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:49,233 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:49,251 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:49,251 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:49,511 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:49,512 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:49,513 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 40 [2018-09-18 10:03:49,513 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:49,513 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-09-18 10:03:49,513 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-09-18 10:03:49,513 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=301, Invalid=1259, Unknown=0, NotChecked=0, Total=1560 [2018-09-18 10:03:49,514 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 40 states. [2018-09-18 10:03:51,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:51,931 INFO L93 Difference]: Finished difference Result 566 states and 664 transitions. [2018-09-18 10:03:51,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-09-18 10:03:51,931 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 109 [2018-09-18 10:03:51,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:51,933 INFO L225 Difference]: With dead ends: 566 [2018-09-18 10:03:51,933 INFO L226 Difference]: Without dead ends: 517 [2018-09-18 10:03:51,934 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 505 GetRequests, 377 SyntacticMatches, 44 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3303 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1346, Invalid=5964, Unknown=0, NotChecked=0, Total=7310 [2018-09-18 10:03:51,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2018-09-18 10:03:52,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 141. [2018-09-18 10:03:52,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-09-18 10:03:52,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-09-18 10:03:52,102 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-09-18 10:03:52,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:52,102 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-09-18 10:03:52,102 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-09-18 10:03:52,102 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-09-18 10:03:52,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-18 10:03:52,103 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:52,103 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 8, 7, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:52,103 INFO L423 AbstractCegarLoop]: === Iteration 63 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:52,103 INFO L82 PathProgramCache]: Analyzing trace with hash -1858248045, now seen corresponding path program 35 times [2018-09-18 10:03:52,103 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:52,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:52,104 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:52,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:52,104 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:52,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:52,395 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:52,395 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:52,395 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:52,404 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:52,405 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:52,441 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-18 10:03:52,441 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:52,443 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:52,767 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:52,767 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:52,952 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:52,971 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:52,972 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:52,989 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:52,989 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:53,120 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-09-18 10:03:53,120 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:53,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:53,142 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:53,142 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:53,368 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:53,370 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:53,370 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 39 [2018-09-18 10:03:53,370 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:53,370 INFO L459 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-09-18 10:03:53,370 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-09-18 10:03:53,371 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=295, Invalid=1187, Unknown=0, NotChecked=0, Total=1482 [2018-09-18 10:03:53,371 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 39 states. [2018-09-18 10:03:55,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:55,860 INFO L93 Difference]: Finished difference Result 612 states and 721 transitions. [2018-09-18 10:03:55,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-09-18 10:03:55,861 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 109 [2018-09-18 10:03:55,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:55,863 INFO L225 Difference]: With dead ends: 612 [2018-09-18 10:03:55,863 INFO L226 Difference]: Without dead ends: 563 [2018-09-18 10:03:55,864 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 502 GetRequests, 378 SyntacticMatches, 44 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2984 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1234, Invalid=5408, Unknown=0, NotChecked=0, Total=6642 [2018-09-18 10:03:55,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2018-09-18 10:03:56,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 141. [2018-09-18 10:03:56,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-09-18 10:03:56,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-09-18 10:03:56,025 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-09-18 10:03:56,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:56,026 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-09-18 10:03:56,026 INFO L481 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-09-18 10:03:56,026 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-09-18 10:03:56,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-18 10:03:56,026 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:56,026 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 9, 8, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:56,027 INFO L423 AbstractCegarLoop]: === Iteration 64 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:56,027 INFO L82 PathProgramCache]: Analyzing trace with hash -1228344289, now seen corresponding path program 36 times [2018-09-18 10:03:56,027 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:56,028 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:56,028 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:56,028 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:56,028 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:56,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:56,305 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:56,306 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:56,306 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:56,312 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:56,312 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:56,350 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-09-18 10:03:56,351 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:56,353 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:56,652 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:56,652 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:56,842 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:56,862 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:56,862 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:56,878 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:56,879 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:57,017 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-09-18 10:03:57,018 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:57,021 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:57,039 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:57,039 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:57,247 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:03:57,248 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:57,249 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 38 [2018-09-18 10:03:57,249 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:57,249 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-09-18 10:03:57,249 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-09-18 10:03:57,250 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=293, Invalid=1113, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:03:57,250 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 38 states. [2018-09-18 10:03:59,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:59,611 INFO L93 Difference]: Finished difference Result 656 states and 776 transitions. [2018-09-18 10:03:59,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-09-18 10:03:59,611 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 109 [2018-09-18 10:03:59,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:59,614 INFO L225 Difference]: With dead ends: 656 [2018-09-18 10:03:59,614 INFO L226 Difference]: Without dead ends: 607 [2018-09-18 10:03:59,615 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 497 GetRequests, 379 SyntacticMatches, 44 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2554 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1081, Invalid=4619, Unknown=0, NotChecked=0, Total=5700 [2018-09-18 10:03:59,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 607 states. [2018-09-18 10:03:59,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 607 to 141. [2018-09-18 10:03:59,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-09-18 10:03:59,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-09-18 10:03:59,786 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-09-18 10:03:59,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:59,786 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-09-18 10:03:59,786 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-09-18 10:03:59,786 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-09-18 10:03:59,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-09-18 10:03:59,787 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:59,787 INFO L376 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:59,787 INFO L423 AbstractCegarLoop]: === Iteration 65 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:59,788 INFO L82 PathProgramCache]: Analyzing trace with hash -119310165, now seen corresponding path program 9 times [2018-09-18 10:03:59,788 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:59,788 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:59,789 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:59,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:59,789 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:59,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:00,113 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:04:00,113 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:00,113 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:00,121 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:00,122 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:00,206 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-09-18 10:04:00,206 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:00,209 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:00,652 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:04:00,652 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:00,839 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:04:00,859 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:00,859 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:00,874 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:00,874 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:01,013 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-09-18 10:04:01,013 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:01,017 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:01,033 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:04:01,034 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:01,245 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:04:01,246 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:01,247 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 37 [2018-09-18 10:04:01,247 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:01,247 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-09-18 10:04:01,247 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-09-18 10:04:01,247 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=295, Invalid=1037, Unknown=0, NotChecked=0, Total=1332 [2018-09-18 10:04:01,248 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 37 states. [2018-09-18 10:04:03,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:03,524 INFO L93 Difference]: Finished difference Result 703 states and 835 transitions. [2018-09-18 10:04:03,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-09-18 10:04:03,533 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 109 [2018-09-18 10:04:03,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:03,536 INFO L225 Difference]: With dead ends: 703 [2018-09-18 10:04:03,536 INFO L226 Difference]: Without dead ends: 654 [2018-09-18 10:04:03,536 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 380 SyntacticMatches, 44 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2039 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=905, Invalid=3651, Unknown=0, NotChecked=0, Total=4556 [2018-09-18 10:04:03,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 654 states. [2018-09-18 10:04:03,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 654 to 144. [2018-09-18 10:04:03,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-09-18 10:04:03,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 156 transitions. [2018-09-18 10:04:03,707 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 156 transitions. Word has length 109 [2018-09-18 10:04:03,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:03,707 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 156 transitions. [2018-09-18 10:04:03,707 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-09-18 10:04:03,707 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 156 transitions. [2018-09-18 10:04:03,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-09-18 10:04:03,708 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:03,708 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:03,708 INFO L423 AbstractCegarLoop]: === Iteration 66 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:03,708 INFO L82 PathProgramCache]: Analyzing trace with hash -1752486599, now seen corresponding path program 18 times [2018-09-18 10:04:03,709 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:03,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:03,709 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:03,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:03,709 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:03,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:03,913 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 127 proven. 196 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-09-18 10:04:03,914 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:03,914 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:03,921 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:03,921 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:03,956 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-09-18 10:04:03,957 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:03,958 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:04,021 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:04:04,022 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:04,148 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:04:04,170 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:04,170 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:04,185 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:04,185 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:04,336 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-09-18 10:04:04,337 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:04,341 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:04,352 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:04:04,352 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:04,533 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-09-18 10:04:04,534 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:04,534 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15, 15, 15] total 18 [2018-09-18 10:04:04,534 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:04,535 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-18 10:04:04,535 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-18 10:04:04,535 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=216, Unknown=0, NotChecked=0, Total=306 [2018-09-18 10:04:04,535 INFO L87 Difference]: Start difference. First operand 144 states and 156 transitions. Second operand 18 states. [2018-09-18 10:04:04,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:04,998 INFO L93 Difference]: Finished difference Result 154 states and 166 transitions. [2018-09-18 10:04:04,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-18 10:04:04,999 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 111 [2018-09-18 10:04:04,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:05,000 INFO L225 Difference]: With dead ends: 154 [2018-09-18 10:04:05,000 INFO L226 Difference]: Without dead ends: 152 [2018-09-18 10:04:05,001 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 471 GetRequests, 411 SyntacticMatches, 42 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:04:05,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-09-18 10:04:05,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-09-18 10:04:05,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-09-18 10:04:05,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 164 transitions. [2018-09-18 10:04:05,163 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 164 transitions. Word has length 111 [2018-09-18 10:04:05,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:05,163 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 164 transitions. [2018-09-18 10:04:05,163 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-18 10:04:05,163 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 164 transitions. [2018-09-18 10:04:05,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:05,164 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:05,164 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 11, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:05,164 INFO L423 AbstractCegarLoop]: === Iteration 67 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:05,165 INFO L82 PathProgramCache]: Analyzing trace with hash 1040286813, now seen corresponding path program 19 times [2018-09-18 10:04:05,165 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:05,165 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:05,166 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:05,166 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:05,166 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:05,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:05,757 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:05,757 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:05,757 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:05,765 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:05,765 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:05,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:05,799 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:06,308 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:06,309 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:06,585 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:06,605 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:06,605 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 129 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 129 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:06,620 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:06,620 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:06,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:06,695 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:06,715 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:06,715 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:06,988 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:06,989 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:06,990 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 50 [2018-09-18 10:04:06,990 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:06,990 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-09-18 10:04:06,990 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-09-18 10:04:06,991 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=495, Invalid=1955, Unknown=0, NotChecked=0, Total=2450 [2018-09-18 10:04:06,991 INFO L87 Difference]: Start difference. First operand 152 states and 164 transitions. Second operand 50 states. [2018-09-18 10:04:08,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:08,277 INFO L93 Difference]: Finished difference Result 271 states and 306 transitions. [2018-09-18 10:04:08,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-09-18 10:04:08,277 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 119 [2018-09-18 10:04:08,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:08,278 INFO L225 Difference]: With dead ends: 271 [2018-09-18 10:04:08,278 INFO L226 Difference]: Without dead ends: 218 [2018-09-18 10:04:08,279 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 525 GetRequests, 405 SyntacticMatches, 48 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3407 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1059, Invalid=4343, Unknown=0, NotChecked=0, Total=5402 [2018-09-18 10:04:08,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-09-18 10:04:08,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 154. [2018-09-18 10:04:08,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-18 10:04:08,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-09-18 10:04:08,469 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-09-18 10:04:08,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:08,469 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-09-18 10:04:08,469 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-09-18 10:04:08,469 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-09-18 10:04:08,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:08,470 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:08,470 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 10, 9, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:08,470 INFO L423 AbstractCegarLoop]: === Iteration 68 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:08,470 INFO L82 PathProgramCache]: Analyzing trace with hash -661376535, now seen corresponding path program 37 times [2018-09-18 10:04:08,471 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:08,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:08,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:08,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:08,471 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:08,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:08,804 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:08,805 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:08,805 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 130 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 130 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:08,812 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:08,812 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:08,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:08,847 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:09,322 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:09,323 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:09,572 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:09,594 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:09,595 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 131 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 131 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:09,609 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:09,609 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:09,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:09,684 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:09,706 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:09,706 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:10,066 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:10,068 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:10,068 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 49 [2018-09-18 10:04:10,068 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:10,069 INFO L459 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-09-18 10:04:10,069 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-09-18 10:04:10,069 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=462, Invalid=1890, Unknown=0, NotChecked=0, Total=2352 [2018-09-18 10:04:10,069 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 49 states. [2018-09-18 10:04:12,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:12,097 INFO L93 Difference]: Finished difference Result 335 states and 382 transitions. [2018-09-18 10:04:12,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-09-18 10:04:12,097 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 119 [2018-09-18 10:04:12,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:12,098 INFO L225 Difference]: With dead ends: 335 [2018-09-18 10:04:12,098 INFO L226 Difference]: Without dead ends: 282 [2018-09-18 10:04:12,099 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 535 GetRequests, 406 SyntacticMatches, 48 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3775 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1275, Invalid=5531, Unknown=0, NotChecked=0, Total=6806 [2018-09-18 10:04:12,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-09-18 10:04:12,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 154. [2018-09-18 10:04:12,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-18 10:04:12,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-09-18 10:04:12,323 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-09-18 10:04:12,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:12,324 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-09-18 10:04:12,324 INFO L481 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-09-18 10:04:12,324 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-09-18 10:04:12,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:12,324 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:12,324 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 9, 8, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:12,325 INFO L423 AbstractCegarLoop]: === Iteration 69 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:12,325 INFO L82 PathProgramCache]: Analyzing trace with hash 516739701, now seen corresponding path program 38 times [2018-09-18 10:04:12,325 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:12,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:12,325 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:12,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:12,325 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:12,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:12,607 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:12,607 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:12,607 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 132 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 132 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:12,615 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:12,615 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:12,652 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:12,653 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:12,654 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:13,132 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:13,133 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:13,426 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:13,446 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:13,446 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 133 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 133 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:13,462 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:13,462 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:13,538 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:13,538 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:13,543 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:13,569 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:13,569 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:13,817 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:13,819 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:13,819 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 48 [2018-09-18 10:04:13,819 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:13,820 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-09-18 10:04:13,820 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-09-18 10:04:13,820 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=433, Invalid=1823, Unknown=0, NotChecked=0, Total=2256 [2018-09-18 10:04:13,820 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 48 states. [2018-09-18 10:04:16,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:16,335 INFO L93 Difference]: Finished difference Result 397 states and 456 transitions. [2018-09-18 10:04:16,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-09-18 10:04:16,335 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 119 [2018-09-18 10:04:16,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:16,337 INFO L225 Difference]: With dead ends: 397 [2018-09-18 10:04:16,337 INFO L226 Difference]: Without dead ends: 344 [2018-09-18 10:04:16,338 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 543 GetRequests, 407 SyntacticMatches, 48 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4105 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1471, Invalid=6539, Unknown=0, NotChecked=0, Total=8010 [2018-09-18 10:04:16,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-09-18 10:04:16,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 154. [2018-09-18 10:04:16,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-18 10:04:16,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-09-18 10:04:16,556 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-09-18 10:04:16,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:16,556 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-09-18 10:04:16,556 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-09-18 10:04:16,556 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-09-18 10:04:16,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:16,557 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:16,557 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 8, 7, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:16,557 INFO L423 AbstractCegarLoop]: === Iteration 70 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:16,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1752422911, now seen corresponding path program 39 times [2018-09-18 10:04:16,557 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:16,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:16,558 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:16,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:16,558 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:16,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:16,848 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:16,849 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:16,849 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 134 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 134 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:16,857 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:16,857 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:16,900 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-09-18 10:04:16,900 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:16,902 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:17,390 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:17,390 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:17,614 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:17,635 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:17,635 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 135 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 135 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:17,650 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:17,650 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:17,828 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-09-18 10:04:17,828 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:17,833 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:17,855 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:17,855 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:18,107 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:18,109 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:18,109 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 47 [2018-09-18 10:04:18,109 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:18,110 INFO L459 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-09-18 10:04:18,110 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-09-18 10:04:18,110 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=408, Invalid=1754, Unknown=0, NotChecked=0, Total=2162 [2018-09-18 10:04:18,110 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 47 states. [2018-09-18 10:04:20,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:20,593 INFO L93 Difference]: Finished difference Result 457 states and 528 transitions. [2018-09-18 10:04:20,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-09-18 10:04:20,594 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 119 [2018-09-18 10:04:20,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:20,595 INFO L225 Difference]: With dead ends: 457 [2018-09-18 10:04:20,595 INFO L226 Difference]: Without dead ends: 404 [2018-09-18 10:04:20,596 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 549 GetRequests, 408 SyntacticMatches, 48 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4353 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1626, Invalid=7304, Unknown=0, NotChecked=0, Total=8930 [2018-09-18 10:04:20,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states. [2018-09-18 10:04:20,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 154. [2018-09-18 10:04:20,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-18 10:04:20,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-09-18 10:04:20,810 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-09-18 10:04:20,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:20,810 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-09-18 10:04:20,810 INFO L481 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-09-18 10:04:20,811 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-09-18 10:04:20,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:20,811 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:20,811 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 7, 6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:20,811 INFO L423 AbstractCegarLoop]: === Iteration 71 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:20,812 INFO L82 PathProgramCache]: Analyzing trace with hash -1964839795, now seen corresponding path program 40 times [2018-09-18 10:04:20,812 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:20,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:20,812 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:20,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:20,812 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:20,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:21,207 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:21,208 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:21,208 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 136 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 136 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:21,216 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:21,216 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:21,250 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:21,250 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:21,252 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:21,684 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:21,684 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:21,906 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:21,926 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:21,926 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 137 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 137 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:21,941 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:21,941 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:22,030 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:22,030 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:22,035 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:22,056 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:22,056 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:22,359 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:22,361 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:22,361 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 46 [2018-09-18 10:04:22,361 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:22,361 INFO L459 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-09-18 10:04:22,361 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-09-18 10:04:22,362 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=387, Invalid=1683, Unknown=0, NotChecked=0, Total=2070 [2018-09-18 10:04:22,362 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 46 states. [2018-09-18 10:04:25,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:25,155 INFO L93 Difference]: Finished difference Result 515 states and 598 transitions. [2018-09-18 10:04:25,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-09-18 10:04:25,155 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 119 [2018-09-18 10:04:25,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:25,157 INFO L225 Difference]: With dead ends: 515 [2018-09-18 10:04:25,157 INFO L226 Difference]: Without dead ends: 462 [2018-09-18 10:04:25,158 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 553 GetRequests, 409 SyntacticMatches, 48 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4487 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1725, Invalid=7781, Unknown=0, NotChecked=0, Total=9506 [2018-09-18 10:04:25,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 462 states. [2018-09-18 10:04:25,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 462 to 154. [2018-09-18 10:04:25,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-18 10:04:25,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-09-18 10:04:25,380 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-09-18 10:04:25,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:25,381 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-09-18 10:04:25,381 INFO L481 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-09-18 10:04:25,381 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-09-18 10:04:25,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:25,381 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:25,381 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 6, 6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:25,382 INFO L423 AbstractCegarLoop]: === Iteration 72 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:25,382 INFO L82 PathProgramCache]: Analyzing trace with hash -1911429607, now seen corresponding path program 41 times [2018-09-18 10:04:25,382 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:25,383 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:25,383 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:25,383 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:25,383 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:25,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:26,208 INFO L134 CoverageAnalysis]: Checked inductivity of 470 backedges. 230 proven. 60 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:26,208 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:26,209 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 138 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 138 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:26,216 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:26,216 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:26,259 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-09-18 10:04:26,260 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:26,262 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:26,701 INFO L134 CoverageAnalysis]: Checked inductivity of 470 backedges. 230 proven. 60 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:26,701 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:26,922 INFO L134 CoverageAnalysis]: Checked inductivity of 470 backedges. 230 proven. 60 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:26,942 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:26,942 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 139 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 139 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:26,958 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:04:26,958 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:27,113 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-09-18 10:04:27,114 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:27,118 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:27,139 INFO L134 CoverageAnalysis]: Checked inductivity of 470 backedges. 230 proven. 60 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:27,139 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:27,380 INFO L134 CoverageAnalysis]: Checked inductivity of 470 backedges. 230 proven. 60 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:27,382 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:27,382 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 45 [2018-09-18 10:04:27,382 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:27,382 INFO L459 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-09-18 10:04:27,383 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-09-18 10:04:27,383 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=370, Invalid=1610, Unknown=0, NotChecked=0, Total=1980 [2018-09-18 10:04:27,383 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 45 states. [2018-09-18 10:04:30,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:30,296 INFO L93 Difference]: Finished difference Result 571 states and 666 transitions. [2018-09-18 10:04:30,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-09-18 10:04:30,296 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 119 [2018-09-18 10:04:30,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:30,299 INFO L225 Difference]: With dead ends: 571 [2018-09-18 10:04:30,299 INFO L226 Difference]: Without dead ends: 518 [2018-09-18 10:04:30,300 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 555 GetRequests, 410 SyntacticMatches, 48 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4487 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1759, Invalid=7943, Unknown=0, NotChecked=0, Total=9702 [2018-09-18 10:04:30,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 518 states. [2018-09-18 10:04:30,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 518 to 154. [2018-09-18 10:04:30,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-18 10:04:30,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-09-18 10:04:30,534 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-09-18 10:04:30,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:30,534 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-09-18 10:04:30,534 INFO L481 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-09-18 10:04:30,534 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-09-18 10:04:30,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:30,535 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:30,535 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 7, 6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:30,535 INFO L423 AbstractCegarLoop]: === Iteration 73 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:30,535 INFO L82 PathProgramCache]: Analyzing trace with hash 260690597, now seen corresponding path program 42 times [2018-09-18 10:04:30,535 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:30,535 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:30,536 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:30,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:30,536 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:30,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:30,811 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:30,812 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:30,812 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 140 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 140 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:30,819 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:30,819 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:30,861 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-09-18 10:04:30,862 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:30,863 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:31,503 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:31,503 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:31,723 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:31,743 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:31,743 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 141 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 141 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:31,757 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:31,758 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:04:31,926 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-09-18 10:04:31,926 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:31,931 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:31,953 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:31,953 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:32,215 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:32,217 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:32,217 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 44 [2018-09-18 10:04:32,217 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:32,217 INFO L459 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-09-18 10:04:32,218 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-09-18 10:04:32,218 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=1535, Unknown=0, NotChecked=0, Total=1892 [2018-09-18 10:04:32,218 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 44 states. [2018-09-18 10:04:35,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:35,364 INFO L93 Difference]: Finished difference Result 625 states and 732 transitions. [2018-09-18 10:04:35,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-09-18 10:04:35,364 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 119 [2018-09-18 10:04:35,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:35,367 INFO L225 Difference]: With dead ends: 625 [2018-09-18 10:04:35,367 INFO L226 Difference]: Without dead ends: 572 [2018-09-18 10:04:35,368 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 555 GetRequests, 411 SyntacticMatches, 48 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4344 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1725, Invalid=7781, Unknown=0, NotChecked=0, Total=9506 [2018-09-18 10:04:35,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2018-09-18 10:04:35,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 154. [2018-09-18 10:04:35,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-18 10:04:35,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-09-18 10:04:35,602 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-09-18 10:04:35,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:35,602 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-09-18 10:04:35,602 INFO L481 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-09-18 10:04:35,602 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-09-18 10:04:35,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:35,603 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:35,603 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 8, 7, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:35,603 INFO L423 AbstractCegarLoop]: === Iteration 74 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:35,604 INFO L82 PathProgramCache]: Analyzing trace with hash -487886287, now seen corresponding path program 43 times [2018-09-18 10:04:35,604 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:35,604 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:35,604 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:35,604 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:35,605 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:35,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:35,887 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:35,888 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:35,888 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 142 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 142 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:35,894 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:35,894 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:35,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:35,928 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:36,572 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:36,572 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:36,811 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:36,831 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:36,831 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 143 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 143 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:36,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:36,846 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:04:36,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:36,919 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:36,940 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:36,940 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:37,177 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:37,179 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:37,179 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 43 [2018-09-18 10:04:37,179 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:37,180 INFO L459 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-09-18 10:04:37,180 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-09-18 10:04:37,180 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=348, Invalid=1458, Unknown=0, NotChecked=0, Total=1806 [2018-09-18 10:04:37,181 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 43 states. [2018-09-18 10:04:40,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:40,463 INFO L93 Difference]: Finished difference Result 677 states and 796 transitions. [2018-09-18 10:04:40,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-09-18 10:04:40,463 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 119 [2018-09-18 10:04:40,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:40,466 INFO L225 Difference]: With dead ends: 677 [2018-09-18 10:04:40,466 INFO L226 Difference]: Without dead ends: 624 [2018-09-18 10:04:40,467 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 553 GetRequests, 412 SyntacticMatches, 48 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4055 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1626, Invalid=7304, Unknown=0, NotChecked=0, Total=8930 [2018-09-18 10:04:40,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 624 states. [2018-09-18 10:04:40,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 624 to 154. [2018-09-18 10:04:40,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-18 10:04:40,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-09-18 10:04:40,710 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-09-18 10:04:40,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:40,710 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-09-18 10:04:40,710 INFO L481 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-09-18 10:04:40,711 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-09-18 10:04:40,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:40,711 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:40,711 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 9, 8, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:40,712 INFO L423 AbstractCegarLoop]: === Iteration 75 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:40,712 INFO L82 PathProgramCache]: Analyzing trace with hash -855145283, now seen corresponding path program 44 times [2018-09-18 10:04:40,712 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:40,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:40,713 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:04:40,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:40,713 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:40,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:40,999 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:40,999 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:40,999 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 144 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 144 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:41,007 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:41,007 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:41,042 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:41,043 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:41,044 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:41,716 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:41,716 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:41,934 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:41,953 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:41,954 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 145 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 145 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:41,968 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:41,968 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:42,045 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:42,045 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:42,049 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:42,068 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:42,068 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:42,307 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:42,308 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:42,308 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 42 [2018-09-18 10:04:42,308 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:42,309 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-09-18 10:04:42,309 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-09-18 10:04:42,309 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=343, Invalid=1379, Unknown=0, NotChecked=0, Total=1722 [2018-09-18 10:04:42,309 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 42 states. [2018-09-18 10:04:45,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:45,539 INFO L93 Difference]: Finished difference Result 727 states and 858 transitions. [2018-09-18 10:04:45,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-09-18 10:04:45,539 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 119 [2018-09-18 10:04:45,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:45,542 INFO L225 Difference]: With dead ends: 727 [2018-09-18 10:04:45,543 INFO L226 Difference]: Without dead ends: 674 [2018-09-18 10:04:45,544 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 549 GetRequests, 413 SyntacticMatches, 48 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3628 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1471, Invalid=6539, Unknown=0, NotChecked=0, Total=8010 [2018-09-18 10:04:45,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 674 states. [2018-09-18 10:04:45,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 674 to 154. [2018-09-18 10:04:45,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-18 10:04:45,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-09-18 10:04:45,799 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-09-18 10:04:45,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:45,799 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-09-18 10:04:45,799 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-09-18 10:04:45,799 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-09-18 10:04:45,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:45,800 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:45,800 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 10, 9, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:45,800 INFO L423 AbstractCegarLoop]: === Iteration 76 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:45,800 INFO L82 PathProgramCache]: Analyzing trace with hash 266259017, now seen corresponding path program 45 times [2018-09-18 10:04:45,800 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:45,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:45,801 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:45,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:45,801 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:45,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:46,084 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:46,085 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:46,085 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 146 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 146 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:46,091 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:46,092 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:46,129 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-09-18 10:04:46,130 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:46,132 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:46,787 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:46,787 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:47,002 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:47,022 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:47,022 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 147 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 147 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:47,037 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:47,037 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:47,213 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-09-18 10:04:47,214 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:47,218 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:47,237 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:47,238 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:47,482 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:47,483 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:47,484 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 41 [2018-09-18 10:04:47,484 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:47,484 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-09-18 10:04:47,484 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-09-18 10:04:47,485 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=342, Invalid=1298, Unknown=0, NotChecked=0, Total=1640 [2018-09-18 10:04:47,485 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 41 states. [2018-09-18 10:04:50,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:50,807 INFO L93 Difference]: Finished difference Result 775 states and 918 transitions. [2018-09-18 10:04:50,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-09-18 10:04:50,807 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 119 [2018-09-18 10:04:50,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:50,810 INFO L225 Difference]: With dead ends: 775 [2018-09-18 10:04:50,810 INFO L226 Difference]: Without dead ends: 722 [2018-09-18 10:04:50,811 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 543 GetRequests, 414 SyntacticMatches, 48 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3083 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1275, Invalid=5531, Unknown=0, NotChecked=0, Total=6806 [2018-09-18 10:04:50,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 722 states. [2018-09-18 10:04:51,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 722 to 154. [2018-09-18 10:04:51,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-09-18 10:04:51,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-09-18 10:04:51,050 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-09-18 10:04:51,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:51,050 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-09-18 10:04:51,050 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-09-18 10:04:51,050 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-09-18 10:04:51,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-09-18 10:04:51,050 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:51,050 INFO L376 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 11, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:51,051 INFO L423 AbstractCegarLoop]: === Iteration 77 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:51,051 INFO L82 PathProgramCache]: Analyzing trace with hash -157154603, now seen corresponding path program 10 times [2018-09-18 10:04:51,051 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:51,051 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:51,051 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:51,051 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:51,051 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:51,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:51,632 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:51,632 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:51,632 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 148 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 148 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:51,639 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:51,639 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:51,673 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:51,673 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:51,675 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:52,011 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:52,011 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:52,260 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:52,280 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:52,280 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 149 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 149 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:52,294 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:04:52,295 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:04:52,383 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:04:52,383 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:52,387 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:52,407 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:52,407 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:52,647 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:52,649 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:52,649 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 40 [2018-09-18 10:04:52,649 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:52,649 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-09-18 10:04:52,650 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-09-18 10:04:52,650 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=345, Invalid=1215, Unknown=0, NotChecked=0, Total=1560 [2018-09-18 10:04:52,650 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 40 states. [2018-09-18 10:04:55,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:55,843 INFO L93 Difference]: Finished difference Result 826 states and 982 transitions. [2018-09-18 10:04:55,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-09-18 10:04:55,844 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 119 [2018-09-18 10:04:55,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:55,847 INFO L225 Difference]: With dead ends: 826 [2018-09-18 10:04:55,847 INFO L226 Difference]: Without dead ends: 773 [2018-09-18 10:04:55,847 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 535 GetRequests, 415 SyntacticMatches, 48 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2452 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1059, Invalid=4343, Unknown=0, NotChecked=0, Total=5402 [2018-09-18 10:04:55,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 773 states. [2018-09-18 10:04:56,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 773 to 157. [2018-09-18 10:04:56,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-09-18 10:04:56,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 170 transitions. [2018-09-18 10:04:56,109 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 170 transitions. Word has length 119 [2018-09-18 10:04:56,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:56,109 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 170 transitions. [2018-09-18 10:04:56,109 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-09-18 10:04:56,109 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 170 transitions. [2018-09-18 10:04:56,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-09-18 10:04:56,110 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:56,110 INFO L376 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:56,110 INFO L423 AbstractCegarLoop]: === Iteration 78 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:56,110 INFO L82 PathProgramCache]: Analyzing trace with hash 777037143, now seen corresponding path program 20 times [2018-09-18 10:04:56,110 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:56,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:56,111 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:56,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:56,111 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:56,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:56,602 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 151 proven. 238 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-09-18 10:04:56,602 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:56,602 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 150 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 150 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:56,609 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:56,609 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:56,646 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:56,646 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:56,648 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:56,751 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:56,751 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:56,908 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:56,930 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:56,930 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 151 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 151 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:56,944 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:04:56,945 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:04:57,022 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:04:57,023 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:57,027 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:57,037 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:57,037 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:57,198 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-09-18 10:04:57,199 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:04:57,199 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16, 16, 16] total 19 [2018-09-18 10:04:57,199 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:04:57,200 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-18 10:04:57,200 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-18 10:04:57,200 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=239, Unknown=0, NotChecked=0, Total=342 [2018-09-18 10:04:57,200 INFO L87 Difference]: Start difference. First operand 157 states and 170 transitions. Second operand 19 states. [2018-09-18 10:04:57,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:04:57,788 INFO L93 Difference]: Finished difference Result 167 states and 180 transitions. [2018-09-18 10:04:57,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-18 10:04:57,788 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 121 [2018-09-18 10:04:57,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:04:57,790 INFO L225 Difference]: With dead ends: 167 [2018-09-18 10:04:57,790 INFO L226 Difference]: Without dead ends: 165 [2018-09-18 10:04:57,790 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 513 GetRequests, 448 SyntacticMatches, 46 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 347 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=116, Invalid=304, Unknown=0, NotChecked=0, Total=420 [2018-09-18 10:04:57,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-09-18 10:04:58,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-09-18 10:04:58,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-09-18 10:04:58,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 178 transitions. [2018-09-18 10:04:58,035 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 178 transitions. Word has length 121 [2018-09-18 10:04:58,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:04:58,035 INFO L480 AbstractCegarLoop]: Abstraction has 165 states and 178 transitions. [2018-09-18 10:04:58,035 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-18 10:04:58,035 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 178 transitions. [2018-09-18 10:04:58,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-09-18 10:04:58,036 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:04:58,036 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:04:58,036 INFO L423 AbstractCegarLoop]: === Iteration 79 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:04:58,036 INFO L82 PathProgramCache]: Analyzing trace with hash -1277952389, now seen corresponding path program 21 times [2018-09-18 10:04:58,036 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:04:58,037 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:58,037 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:04:58,037 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:04:58,037 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:04:58,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:04:58,558 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:04:58,558 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:58,558 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 152 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 152 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:04:58,566 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:58,566 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:58,608 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-09-18 10:04:58,609 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:58,612 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:59,203 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:04:59,204 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:59,497 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:04:59,517 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:59,518 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 153 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 153 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:59,532 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:04:59,533 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:04:59,731 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-09-18 10:04:59,731 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:04:59,736 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:04:59,758 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:04:59,759 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:00,051 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:00,052 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:00,053 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 54 [2018-09-18 10:05:00,053 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:00,053 INFO L459 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-09-18 10:05:00,053 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-09-18 10:05:00,054 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=575, Invalid=2287, Unknown=0, NotChecked=0, Total=2862 [2018-09-18 10:05:00,054 INFO L87 Difference]: Start difference. First operand 165 states and 178 transitions. Second operand 54 states. [2018-09-18 10:05:02,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:02,059 INFO L93 Difference]: Finished difference Result 294 states and 332 transitions. [2018-09-18 10:05:02,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-09-18 10:05:02,060 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 129 [2018-09-18 10:05:02,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:02,061 INFO L225 Difference]: With dead ends: 294 [2018-09-18 10:05:02,061 INFO L226 Difference]: Without dead ends: 237 [2018-09-18 10:05:02,062 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 569 GetRequests, 439 SyntacticMatches, 52 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4047 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1225, Invalid=5095, Unknown=0, NotChecked=0, Total=6320 [2018-09-18 10:05:02,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-09-18 10:05:02,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 167. [2018-09-18 10:05:02,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-09-18 10:05:02,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-09-18 10:05:02,339 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-09-18 10:05:02,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:02,339 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-09-18 10:05:02,339 INFO L481 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-09-18 10:05:02,339 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-09-18 10:05:02,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-09-18 10:05:02,339 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:02,340 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 11, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:02,340 INFO L423 AbstractCegarLoop]: === Iteration 80 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:02,340 INFO L82 PathProgramCache]: Analyzing trace with hash -1178325753, now seen corresponding path program 46 times [2018-09-18 10:05:02,340 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:02,341 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:02,341 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:05:02,341 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:02,341 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:02,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:02,668 INFO L134 CoverageAnalysis]: Checked inductivity of 607 backedges. 275 proven. 112 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:02,669 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:02,669 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 154 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 154 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:02,676 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:05:02,677 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:05:02,713 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:05:02,713 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:02,715 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:03,284 INFO L134 CoverageAnalysis]: Checked inductivity of 607 backedges. 275 proven. 112 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:03,284 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:03,578 INFO L134 CoverageAnalysis]: Checked inductivity of 607 backedges. 275 proven. 112 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:03,598 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:03,599 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 155 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 155 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:03,614 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:05:03,615 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:05:03,710 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:05:03,711 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:03,715 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:03,740 INFO L134 CoverageAnalysis]: Checked inductivity of 607 backedges. 275 proven. 112 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:03,741 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:04,025 INFO L134 CoverageAnalysis]: Checked inductivity of 607 backedges. 275 proven. 112 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:04,026 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:04,026 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 53 [2018-09-18 10:05:04,026 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:04,027 INFO L459 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-09-18 10:05:04,027 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-09-18 10:05:04,027 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=539, Invalid=2217, Unknown=0, NotChecked=0, Total=2756 [2018-09-18 10:05:04,027 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 53 states. [2018-09-18 10:05:06,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:06,402 INFO L93 Difference]: Finished difference Result 364 states and 415 transitions. [2018-09-18 10:05:06,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-09-18 10:05:06,402 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 129 [2018-09-18 10:05:06,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:06,403 INFO L225 Difference]: With dead ends: 364 [2018-09-18 10:05:06,403 INFO L226 Difference]: Without dead ends: 307 [2018-09-18 10:05:06,404 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 580 GetRequests, 440 SyntacticMatches, 52 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4508 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1485, Invalid=6525, Unknown=0, NotChecked=0, Total=8010 [2018-09-18 10:05:06,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307 states. [2018-09-18 10:05:06,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307 to 167. [2018-09-18 10:05:06,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-09-18 10:05:06,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-09-18 10:05:06,702 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-09-18 10:05:06,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:06,703 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-09-18 10:05:06,703 INFO L481 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-09-18 10:05:06,703 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-09-18 10:05:06,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-09-18 10:05:06,703 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:06,703 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 10, 9, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:06,704 INFO L423 AbstractCegarLoop]: === Iteration 81 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:06,704 INFO L82 PathProgramCache]: Analyzing trace with hash -154759533, now seen corresponding path program 47 times [2018-09-18 10:05:06,704 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:06,704 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:06,704 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:05:06,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:06,705 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:06,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:07,220 INFO L134 CoverageAnalysis]: Checked inductivity of 591 backedges. 275 proven. 96 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:07,221 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:07,221 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 156 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 156 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:07,229 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:05:07,229 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:05:07,273 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-09-18 10:05:07,273 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:07,276 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:07,792 INFO L134 CoverageAnalysis]: Checked inductivity of 591 backedges. 275 proven. 96 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:07,793 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:08,050 INFO L134 CoverageAnalysis]: Checked inductivity of 591 backedges. 275 proven. 96 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:08,070 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:08,070 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 157 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 157 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:08,085 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:05:08,085 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:05:08,267 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-09-18 10:05:08,267 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:08,272 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:08,296 INFO L134 CoverageAnalysis]: Checked inductivity of 591 backedges. 275 proven. 96 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:08,297 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:08,613 INFO L134 CoverageAnalysis]: Checked inductivity of 591 backedges. 275 proven. 96 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:08,614 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:08,614 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 52 [2018-09-18 10:05:08,614 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:08,615 INFO L459 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-09-18 10:05:08,615 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-09-18 10:05:08,615 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=507, Invalid=2145, Unknown=0, NotChecked=0, Total=2652 [2018-09-18 10:05:08,615 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 52 states. [2018-09-18 10:05:11,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:11,539 INFO L93 Difference]: Finished difference Result 432 states and 496 transitions. [2018-09-18 10:05:11,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-09-18 10:05:11,540 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 129 [2018-09-18 10:05:11,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:11,541 INFO L225 Difference]: With dead ends: 432 [2018-09-18 10:05:11,541 INFO L226 Difference]: Without dead ends: 375 [2018-09-18 10:05:11,542 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 589 GetRequests, 441 SyntacticMatches, 52 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4938 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1729, Invalid=7777, Unknown=0, NotChecked=0, Total=9506 [2018-09-18 10:05:11,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 375 states. [2018-09-18 10:05:11,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 375 to 167. [2018-09-18 10:05:11,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-09-18 10:05:11,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-09-18 10:05:11,848 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-09-18 10:05:11,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:11,848 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-09-18 10:05:11,848 INFO L481 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-09-18 10:05:11,848 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-09-18 10:05:11,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-09-18 10:05:11,849 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:11,849 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 9, 8, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:11,850 INFO L423 AbstractCegarLoop]: === Iteration 82 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:11,850 INFO L82 PathProgramCache]: Analyzing trace with hash 1607197471, now seen corresponding path program 48 times [2018-09-18 10:05:11,850 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:11,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:11,851 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:05:11,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:11,851 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:11,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:12,418 INFO L134 CoverageAnalysis]: Checked inductivity of 579 backedges. 275 proven. 84 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:12,419 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:12,419 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 158 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 158 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:12,426 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:05:12,426 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:05:12,485 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-09-18 10:05:12,485 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:12,488 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:13,024 INFO L134 CoverageAnalysis]: Checked inductivity of 579 backedges. 275 proven. 84 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:13,025 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:13,288 INFO L134 CoverageAnalysis]: Checked inductivity of 579 backedges. 275 proven. 84 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:13,307 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:13,308 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 159 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 159 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:13,322 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:05:13,322 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:05:13,511 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-09-18 10:05:13,511 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:13,516 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:13,540 INFO L134 CoverageAnalysis]: Checked inductivity of 579 backedges. 275 proven. 84 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:13,540 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:13,856 INFO L134 CoverageAnalysis]: Checked inductivity of 579 backedges. 275 proven. 84 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:13,857 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:13,857 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 51 [2018-09-18 10:05:13,857 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:13,858 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-09-18 10:05:13,858 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-09-18 10:05:13,858 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=479, Invalid=2071, Unknown=0, NotChecked=0, Total=2550 [2018-09-18 10:05:13,858 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 51 states. [2018-09-18 10:05:17,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:17,279 INFO L93 Difference]: Finished difference Result 498 states and 575 transitions. [2018-09-18 10:05:17,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-09-18 10:05:17,280 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 129 [2018-09-18 10:05:17,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:17,281 INFO L225 Difference]: With dead ends: 498 [2018-09-18 10:05:17,281 INFO L226 Difference]: Without dead ends: 441 [2018-09-18 10:05:17,282 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 596 GetRequests, 442 SyntacticMatches, 52 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5287 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1933, Invalid=8779, Unknown=0, NotChecked=0, Total=10712 [2018-09-18 10:05:17,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states. [2018-09-18 10:05:17,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 167. [2018-09-18 10:05:17,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-09-18 10:05:17,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-09-18 10:05:17,596 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-09-18 10:05:17,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:17,596 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-09-18 10:05:17,597 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-09-18 10:05:17,597 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-09-18 10:05:17,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-09-18 10:05:17,597 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:17,597 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 8, 7, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:17,597 INFO L423 AbstractCegarLoop]: === Iteration 83 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:17,598 INFO L82 PathProgramCache]: Analyzing trace with hash -285939029, now seen corresponding path program 49 times [2018-09-18 10:05:17,598 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:17,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:17,598 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:05:17,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:17,599 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:17,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:17,905 INFO L134 CoverageAnalysis]: Checked inductivity of 571 backedges. 275 proven. 76 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:17,905 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:17,905 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 160 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 160 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:17,913 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:05:17,913 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:05:17,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:17,950 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:18,449 INFO L134 CoverageAnalysis]: Checked inductivity of 571 backedges. 275 proven. 76 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:18,449 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:18,713 INFO L134 CoverageAnalysis]: Checked inductivity of 571 backedges. 275 proven. 76 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:18,733 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:18,733 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 161 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 161 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:18,748 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:05:18,748 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:05:18,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:18,832 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:18,857 INFO L134 CoverageAnalysis]: Checked inductivity of 571 backedges. 275 proven. 76 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:18,857 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:19,131 INFO L134 CoverageAnalysis]: Checked inductivity of 571 backedges. 275 proven. 76 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:19,132 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:19,133 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 50 [2018-09-18 10:05:19,133 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:19,133 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-09-18 10:05:19,133 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-09-18 10:05:19,134 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=455, Invalid=1995, Unknown=0, NotChecked=0, Total=2450 [2018-09-18 10:05:19,134 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 50 states. [2018-09-18 10:05:22,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:05:22,967 INFO L93 Difference]: Finished difference Result 562 states and 652 transitions. [2018-09-18 10:05:22,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-09-18 10:05:22,967 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 129 [2018-09-18 10:05:22,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:05:22,969 INFO L225 Difference]: With dead ends: 562 [2018-09-18 10:05:22,969 INFO L226 Difference]: Without dead ends: 505 [2018-09-18 10:05:22,970 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 601 GetRequests, 443 SyntacticMatches, 52 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5517 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=2079, Invalid=9477, Unknown=0, NotChecked=0, Total=11556 [2018-09-18 10:05:22,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 505 states. [2018-09-18 10:05:23,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 505 to 167. [2018-09-18 10:05:23,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-09-18 10:05:23,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-09-18 10:05:23,279 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-09-18 10:05:23,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:05:23,279 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-09-18 10:05:23,279 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-09-18 10:05:23,279 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-09-18 10:05:23,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-09-18 10:05:23,280 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:05:23,280 INFO L376 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 7, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:05:23,280 INFO L423 AbstractCegarLoop]: === Iteration 84 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:05:23,280 INFO L82 PathProgramCache]: Analyzing trace with hash 798123319, now seen corresponding path program 50 times [2018-09-18 10:05:23,280 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:05:23,281 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:23,281 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:05:23,281 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:05:23,281 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:05:23,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:05:23,653 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:23,654 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:23,654 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 162 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 162 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:05:23,661 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:05:23,661 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:05:23,698 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:05:23,699 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:23,700 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:24,189 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:24,189 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:05:24,446 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:24,466 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:05:24,466 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 163 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 163 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:05:24,481 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:05:24,481 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:05:24,563 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:05:24,563 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:05:24,569 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:05:24,593 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:24,593 INFO L316 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-09-18 10:05:24,887 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-09-18 10:05:24,888 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:05:24,889 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 49 [2018-09-18 10:05:24,889 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:05:24,889 INFO L459 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-09-18 10:05:24,890 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-09-18 10:05:24,890 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1917, Unknown=0, NotChecked=0, Total=2352 [2018-09-18 10:05:24,890 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 49 states. [2018-09-18 10:05:24,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-18 10:05:24,891 WARN L549 AbstractCegarLoop]: Verification canceled [2018-09-18 10:05:24,897 WARN L206 ceAbstractionStarter]: Timeout [2018-09-18 10:05:24,897 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.09 10:05:24 BoogieIcfgContainer [2018-09-18 10:05:24,898 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-18 10:05:24,898 INFO L168 Benchmark]: Toolchain (without parser) took 231678.71 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 705.7 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -733.6 MB). There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:05:24,899 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:05:24,899 INFO L168 Benchmark]: CACSL2BoogieTranslator took 308.58 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-09-18 10:05:24,900 INFO L168 Benchmark]: Boogie Procedure Inliner took 21.74 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:05:24,900 INFO L168 Benchmark]: Boogie Preprocessor took 23.69 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-18 10:05:24,900 INFO L168 Benchmark]: RCFGBuilder took 515.61 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 750.3 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -799.6 MB). Peak memory consumption was 26.8 MB. Max. memory is 7.1 GB. [2018-09-18 10:05:24,901 INFO L168 Benchmark]: TraceAbstraction took 230796.12 ms. Allocated memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: -44.6 MB). Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: 55.4 MB). Peak memory consumption was 10.8 MB. Max. memory is 7.1 GB. [2018-09-18 10:05:24,903 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 308.58 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 21.74 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 23.69 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 515.61 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 750.3 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -799.6 MB). Peak memory consumption was 26.8 MB. Max. memory is 7.1 GB. * TraceAbstraction took 230796.12 ms. Allocated memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: -44.6 MB). Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: 55.4 MB). Peak memory consumption was 10.8 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and FLOYD_HOARE automaton (currently 2 states, 49 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 27 locations, 1 error locations. TIMEOUT Result, 230.7s OverallTime, 84 OverallIterations, 12 TraceHistogramMax, 109.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3894 SDtfs, 9926 SDslu, 33791 SDs, 0 SdLazy, 30548 SolverSat, 6441 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 29.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 32338 GetRequests, 24875 SyntacticMatches, 2872 SemanticMatches, 4591 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159517 ImplicationChecksByTransitivity, 123.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=167occurred in iteration=79, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 9.0s AutomataMinimizationTime, 83 MinimizatonAttempts, 14082 StatesRemovedByMinimization, 72 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.7s SsaConstructionTime, 9.0s SatisfiabilityAnalysisTime, 97.8s InterpolantComputationTime, 21564 NumberOfCodeBlocks, 21564 NumberOfCodeBlocksAsserted, 850 NumberOfCheckSat, 35494 ConstructedInterpolants, 0 QuantifiedInterpolants, 14039772 SizeOfPredicates, 1034 NumberOfNonLiveVariables, 30972 ConjunctsInSsa, 3256 ConjunctsInUnsatCore, 408 InterpolantComputations, 3 PerfectInterpolantSequences, 91807/113237 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/seq_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-Benchmark-0-2018-09-18_10-05-24-913.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/seq_true-unreach-call_true-termination.i_svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf_AutomizerCInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-18_10-05-24-913.csv Completed graceful shutdown