java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf -i ../../../trunk/examples/svcomp/loop-crafted/simple_array_index_value_true-unreach-call3_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-69f5bdd-m [2018-09-18 10:00:46,107 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-18 10:00:46,109 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-18 10:00:46,122 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-18 10:00:46,122 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-18 10:00:46,123 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-18 10:00:46,124 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-18 10:00:46,126 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-18 10:00:46,128 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-18 10:00:46,129 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-18 10:00:46,130 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-18 10:00:46,130 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-18 10:00:46,131 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-18 10:00:46,132 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-18 10:00:46,133 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-18 10:00:46,134 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-18 10:00:46,135 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-18 10:00:46,136 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-18 10:00:46,138 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-18 10:00:46,140 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-18 10:00:46,141 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-18 10:00:46,142 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-18 10:00:46,145 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-18 10:00:46,145 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-18 10:00:46,145 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-18 10:00:46,146 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-18 10:00:46,147 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-18 10:00:46,148 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-18 10:00:46,149 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-18 10:00:46,150 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-18 10:00:46,150 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-18 10:00:46,151 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-09-18 10:00:46,151 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-09-18 10:00:46,151 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-09-18 10:00:46,153 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-09-18 10:00:46,153 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-09-18 10:00:46,154 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/taipanbench/svcomp-Reach-64bit-RubberTaipan_Default-OldIcfg.epf [2018-09-18 10:00:46,171 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-18 10:00:46,171 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-18 10:00:46,173 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-18 10:00:46,173 INFO L133 SettingsManager]: * User list type=DISABLED [2018-09-18 10:00:46,173 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-09-18 10:00:46,173 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-09-18 10:00:46,173 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-09-18 10:00:46,174 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-09-18 10:00:46,174 INFO L133 SettingsManager]: * Log string format=TERM [2018-09-18 10:00:46,174 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-09-18 10:00:46,174 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-09-18 10:00:46,177 INFO L133 SettingsManager]: * Interval Domain=false [2018-09-18 10:00:46,178 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-18 10:00:46,178 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-18 10:00:46,178 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-18 10:00:46,178 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-18 10:00:46,179 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-18 10:00:46,179 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-18 10:00:46,180 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-18 10:00:46,180 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-18 10:00:46,180 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-18 10:00:46,180 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-18 10:00:46,181 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-18 10:00:46,181 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-18 10:00:46,181 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 10:00:46,181 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-18 10:00:46,182 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-18 10:00:46,182 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-18 10:00:46,182 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-09-18 10:00:46,182 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-18 10:00:46,183 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-18 10:00:46,183 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-18 10:00:46,183 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-09-18 10:00:46,183 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-09-18 10:00:46,245 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-18 10:00:46,262 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-18 10:00:46,267 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-18 10:00:46,269 INFO L271 PluginConnector]: Initializing CDTParser... [2018-09-18 10:00:46,269 INFO L276 PluginConnector]: CDTParser initialized [2018-09-18 10:00:46,270 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-crafted/simple_array_index_value_true-unreach-call3_true-termination.i [2018-09-18 10:00:46,624 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/959d0f186/b30f4bf1e25247aaa7091999bdf93b04/FLAGa297c2f5a [2018-09-18 10:00:46,785 INFO L277 CDTParser]: Found 1 translation units. [2018-09-18 10:00:46,786 INFO L159 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-crafted/simple_array_index_value_true-unreach-call3_true-termination.i [2018-09-18 10:00:46,792 INFO L325 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/959d0f186/b30f4bf1e25247aaa7091999bdf93b04/FLAGa297c2f5a [2018-09-18 10:00:46,806 INFO L333 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/959d0f186/b30f4bf1e25247aaa7091999bdf93b04 [2018-09-18 10:00:46,820 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-18 10:00:46,823 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-09-18 10:00:46,825 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-09-18 10:00:46,825 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-09-18 10:00:46,835 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-09-18 10:00:46,835 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 10:00:46" (1/1) ... [2018-09-18 10:00:46,838 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@560f8b24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:46, skipping insertion in model container [2018-09-18 10:00:46,839 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.09 10:00:46" (1/1) ... [2018-09-18 10:00:46,850 INFO L160 ieTranslatorObserver]: Starting translation in SV-COMP mode [2018-09-18 10:00:47,044 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 10:00:47,061 INFO L424 MainDispatcher]: Starting main dispatcher in SV-COMP mode [2018-09-18 10:00:47,067 INFO L170 PostProcessor]: Settings: Checked method=main [2018-09-18 10:00:47,079 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47 WrapperNode [2018-09-18 10:00:47,080 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-09-18 10:00:47,081 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-18 10:00:47,081 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-18 10:00:47,081 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-18 10:00:47,090 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (1/1) ... [2018-09-18 10:00:47,097 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (1/1) ... [2018-09-18 10:00:47,103 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-18 10:00:47,103 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-18 10:00:47,103 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-18 10:00:47,104 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-18 10:00:47,113 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (1/1) ... [2018-09-18 10:00:47,113 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (1/1) ... [2018-09-18 10:00:47,114 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (1/1) ... [2018-09-18 10:00:47,115 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (1/1) ... [2018-09-18 10:00:47,116 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (1/1) ... [2018-09-18 10:00:47,122 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (1/1) ... [2018-09-18 10:00:47,123 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (1/1) ... [2018-09-18 10:00:47,125 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-18 10:00:47,125 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-18 10:00:47,125 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-18 10:00:47,125 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-18 10:00:47,126 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-18 10:00:47,197 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-09-18 10:00:47,197 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-09-18 10:00:47,197 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-09-18 10:00:47,197 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-09-18 10:00:47,198 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-09-18 10:00:47,198 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-09-18 10:00:47,198 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-09-18 10:00:47,198 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-09-18 10:00:47,536 INFO L356 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-09-18 10:00:47,537 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 10:00:47 BoogieIcfgContainer [2018-09-18 10:00:47,537 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-18 10:00:47,538 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-18 10:00:47,538 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-18 10:00:47,541 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-18 10:00:47,542 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.09 10:00:46" (1/3) ... [2018-09-18 10:00:47,542 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@16961b4c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 10:00:47, skipping insertion in model container [2018-09-18 10:00:47,543 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.09 10:00:47" (2/3) ... [2018-09-18 10:00:47,543 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@16961b4c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.09 10:00:47, skipping insertion in model container [2018-09-18 10:00:47,543 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.09 10:00:47" (3/3) ... [2018-09-18 10:00:47,545 INFO L112 eAbstractionObserver]: Analyzing ICFG simple_array_index_value_true-unreach-call3_true-termination.i [2018-09-18 10:00:47,554 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-18 10:00:47,560 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-09-18 10:00:47,605 INFO L130 ementStrategyFactory]: Using default assertion order modulation [2018-09-18 10:00:47,605 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-18 10:00:47,605 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-18 10:00:47,606 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-18 10:00:47,606 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-18 10:00:47,606 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-18 10:00:47,606 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-18 10:00:47,606 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-18 10:00:47,607 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-18 10:00:47,624 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-09-18 10:00:47,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-09-18 10:00:47,631 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:47,632 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:47,633 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:47,638 INFO L82 PathProgramCache]: Analyzing trace with hash -1885467766, now seen corresponding path program 1 times [2018-09-18 10:00:47,641 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:47,687 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:47,687 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:47,687 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:47,687 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:47,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:47,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:47,748 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:00:47,748 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-18 10:00:47,748 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:00:47,753 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-09-18 10:00:47,768 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-09-18 10:00:47,768 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 10:00:47,771 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 2 states. [2018-09-18 10:00:47,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:47,794 INFO L93 Difference]: Finished difference Result 37 states and 44 transitions. [2018-09-18 10:00:47,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-09-18 10:00:47,796 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 13 [2018-09-18 10:00:47,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:47,805 INFO L225 Difference]: With dead ends: 37 [2018-09-18 10:00:47,805 INFO L226 Difference]: Without dead ends: 18 [2018-09-18 10:00:47,809 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-09-18 10:00:47,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-09-18 10:00:47,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-09-18 10:00:47,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-09-18 10:00:47,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 19 transitions. [2018-09-18 10:00:47,848 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 19 transitions. Word has length 13 [2018-09-18 10:00:47,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:47,849 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 19 transitions. [2018-09-18 10:00:47,849 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-09-18 10:00:47,849 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2018-09-18 10:00:47,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-09-18 10:00:47,850 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:47,850 INFO L376 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:47,851 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:47,851 INFO L82 PathProgramCache]: Analyzing trace with hash 1968857590, now seen corresponding path program 1 times [2018-09-18 10:00:47,851 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:47,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:47,853 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:47,853 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:47,853 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:47,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:47,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:47,962 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-18 10:00:47,963 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-09-18 10:00:47,963 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-09-18 10:00:47,964 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-18 10:00:47,965 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-18 10:00:47,965 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-18 10:00:47,965 INFO L87 Difference]: Start difference. First operand 18 states and 19 transitions. Second operand 3 states. [2018-09-18 10:00:48,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:48,092 INFO L93 Difference]: Finished difference Result 35 states and 38 transitions. [2018-09-18 10:00:48,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-18 10:00:48,093 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2018-09-18 10:00:48,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:48,096 INFO L225 Difference]: With dead ends: 35 [2018-09-18 10:00:48,096 INFO L226 Difference]: Without dead ends: 24 [2018-09-18 10:00:48,097 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-18 10:00:48,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-09-18 10:00:48,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 20. [2018-09-18 10:00:48,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-09-18 10:00:48,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 21 transitions. [2018-09-18 10:00:48,106 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 21 transitions. Word has length 14 [2018-09-18 10:00:48,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:48,107 INFO L480 AbstractCegarLoop]: Abstraction has 20 states and 21 transitions. [2018-09-18 10:00:48,107 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-18 10:00:48,107 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2018-09-18 10:00:48,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-09-18 10:00:48,108 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:48,108 INFO L376 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:48,108 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:48,109 INFO L82 PathProgramCache]: Analyzing trace with hash -1961268304, now seen corresponding path program 1 times [2018-09-18 10:00:48,109 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:48,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:48,110 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:48,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:48,110 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:48,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:48,254 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:48,254 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:48,255 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:48,266 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:48,266 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:00:48,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:48,301 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:48,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-09-18 10:00:48,382 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:00:48,385 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-18 10:00:48,385 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-09-18 10:00:48,595 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:48,596 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:49,001 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-09-18 10:00:49,004 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:00:49,013 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:00:49,014 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-09-18 10:00:49,062 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:49,084 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:49,085 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:49,103 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:49,104 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:00:49,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:49,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:49,133 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:49,133 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:49,336 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:49,340 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:49,340 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 7, 7, 4, 4] total 16 [2018-09-18 10:00:49,340 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:49,341 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-09-18 10:00:49,341 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-09-18 10:00:49,342 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-09-18 10:00:49,342 INFO L87 Difference]: Start difference. First operand 20 states and 21 transitions. Second operand 9 states. [2018-09-18 10:00:49,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:49,579 INFO L93 Difference]: Finished difference Result 60 states and 68 transitions. [2018-09-18 10:00:49,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-18 10:00:49,581 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 16 [2018-09-18 10:00:49,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:49,582 INFO L225 Difference]: With dead ends: 60 [2018-09-18 10:00:49,583 INFO L226 Difference]: Without dead ends: 49 [2018-09-18 10:00:49,584 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 51 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=61, Invalid=245, Unknown=0, NotChecked=0, Total=306 [2018-09-18 10:00:49,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-09-18 10:00:49,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 32. [2018-09-18 10:00:49,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-09-18 10:00:49,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 34 transitions. [2018-09-18 10:00:49,593 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 34 transitions. Word has length 16 [2018-09-18 10:00:49,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:49,594 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 34 transitions. [2018-09-18 10:00:49,594 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-09-18 10:00:49,594 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 34 transitions. [2018-09-18 10:00:49,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-09-18 10:00:49,595 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:49,595 INFO L376 BasicCegarLoop]: trace histogram [4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:49,596 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:49,596 INFO L82 PathProgramCache]: Analyzing trace with hash -728986716, now seen corresponding path program 2 times [2018-09-18 10:00:49,596 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:49,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:49,597 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:49,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:49,597 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:49,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:50,015 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:50,016 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:50,016 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:50,034 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:00:50,034 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:00:50,050 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:00:50,051 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:50,053 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:50,071 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:50,071 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:50,204 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:50,225 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:50,225 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:50,241 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:00:50,241 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:00:50,270 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:00:50,271 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:50,274 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:50,291 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:50,292 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:50,300 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:50,301 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:50,302 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 10 [2018-09-18 10:00:50,302 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:50,302 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-09-18 10:00:50,303 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-09-18 10:00:50,303 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-09-18 10:00:50,303 INFO L87 Difference]: Start difference. First operand 32 states and 34 transitions. Second operand 6 states. [2018-09-18 10:00:50,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:50,488 INFO L93 Difference]: Finished difference Result 61 states and 68 transitions. [2018-09-18 10:00:50,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-09-18 10:00:50,491 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-09-18 10:00:50,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:50,492 INFO L225 Difference]: With dead ends: 61 [2018-09-18 10:00:50,492 INFO L226 Difference]: Without dead ends: 42 [2018-09-18 10:00:50,493 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 74 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-09-18 10:00:50,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-09-18 10:00:50,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 26. [2018-09-18 10:00:50,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-09-18 10:00:50,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 27 transitions. [2018-09-18 10:00:50,499 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 27 transitions. Word has length 20 [2018-09-18 10:00:50,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:50,499 INFO L480 AbstractCegarLoop]: Abstraction has 26 states and 27 transitions. [2018-09-18 10:00:50,499 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-09-18 10:00:50,499 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 27 transitions. [2018-09-18 10:00:50,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-09-18 10:00:50,500 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:50,500 INFO L376 BasicCegarLoop]: trace histogram [5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:50,501 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:50,501 INFO L82 PathProgramCache]: Analyzing trace with hash -429399586, now seen corresponding path program 3 times [2018-09-18 10:00:50,501 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:50,502 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:50,502 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:50,502 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:50,502 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:50,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:50,661 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:50,662 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:50,662 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:50,672 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:00:50,672 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:00:50,699 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-09-18 10:00:50,700 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:50,702 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:50,717 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:50,717 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:50,903 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:50,923 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:50,923 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:50,940 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:00:50,940 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:00:51,014 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-09-18 10:00:51,014 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:51,018 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:51,041 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:51,041 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:51,056 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:51,059 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:51,059 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 12 [2018-09-18 10:00:51,059 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:51,059 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-09-18 10:00:51,060 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-09-18 10:00:51,060 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-09-18 10:00:51,060 INFO L87 Difference]: Start difference. First operand 26 states and 27 transitions. Second operand 7 states. [2018-09-18 10:00:51,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:51,312 INFO L93 Difference]: Finished difference Result 59 states and 66 transitions. [2018-09-18 10:00:51,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-09-18 10:00:51,313 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2018-09-18 10:00:51,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:51,315 INFO L225 Difference]: With dead ends: 59 [2018-09-18 10:00:51,315 INFO L226 Difference]: Without dead ends: 48 [2018-09-18 10:00:51,316 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-09-18 10:00:51,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-09-18 10:00:51,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 28. [2018-09-18 10:00:51,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-09-18 10:00:51,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2018-09-18 10:00:51,323 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 29 transitions. Word has length 22 [2018-09-18 10:00:51,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:51,323 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 29 transitions. [2018-09-18 10:00:51,323 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-09-18 10:00:51,323 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 29 transitions. [2018-09-18 10:00:51,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-09-18 10:00:51,324 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:51,325 INFO L376 BasicCegarLoop]: trace histogram [6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:51,325 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:51,325 INFO L82 PathProgramCache]: Analyzing trace with hash -288976488, now seen corresponding path program 4 times [2018-09-18 10:00:51,325 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:51,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:51,326 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:51,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:51,326 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:51,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:51,479 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:51,480 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:51,480 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-09-18 10:00:51,502 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:00:51,503 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:51,518 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:00:51,519 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:51,520 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:51,535 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:51,535 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:51,693 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:51,713 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:51,713 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:51,729 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:00:51,729 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:00:51,768 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:00:51,768 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:51,772 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:51,797 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:51,797 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:51,851 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:51,853 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:51,854 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-09-18 10:00:51,854 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:51,854 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-09-18 10:00:51,855 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-09-18 10:00:51,855 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-18 10:00:51,855 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. Second operand 8 states. [2018-09-18 10:00:52,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:52,183 INFO L93 Difference]: Finished difference Result 65 states and 73 transitions. [2018-09-18 10:00:52,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-09-18 10:00:52,184 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 24 [2018-09-18 10:00:52,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:52,185 INFO L225 Difference]: With dead ends: 65 [2018-09-18 10:00:52,185 INFO L226 Difference]: Without dead ends: 54 [2018-09-18 10:00:52,186 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-09-18 10:00:52,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-09-18 10:00:52,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 30. [2018-09-18 10:00:52,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-09-18 10:00:52,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 31 transitions. [2018-09-18 10:00:52,192 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 31 transitions. Word has length 24 [2018-09-18 10:00:52,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:52,193 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 31 transitions. [2018-09-18 10:00:52,193 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-09-18 10:00:52,193 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2018-09-18 10:00:52,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-09-18 10:00:52,194 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:52,194 INFO L376 BasicCegarLoop]: trace histogram [7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:52,195 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:52,195 INFO L82 PathProgramCache]: Analyzing trace with hash 1513634514, now seen corresponding path program 5 times [2018-09-18 10:00:52,195 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:52,196 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:52,196 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:52,196 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:52,196 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:52,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:52,492 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:52,492 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:52,492 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:52,501 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:00:52,502 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:00:52,540 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-18 10:00:52,540 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:52,542 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:52,570 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:52,570 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:52,980 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:53,001 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:53,001 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:53,020 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:00:53,020 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:00:53,135 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-09-18 10:00:53,135 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:53,140 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:53,170 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:53,170 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:53,183 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:53,184 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:53,185 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 16 [2018-09-18 10:00:53,185 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:53,186 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-09-18 10:00:53,186 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-09-18 10:00:53,187 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-09-18 10:00:53,188 INFO L87 Difference]: Start difference. First operand 30 states and 31 transitions. Second operand 9 states. [2018-09-18 10:00:53,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:53,413 INFO L93 Difference]: Finished difference Result 71 states and 80 transitions. [2018-09-18 10:00:53,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-09-18 10:00:53,416 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 26 [2018-09-18 10:00:53,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:53,417 INFO L225 Difference]: With dead ends: 71 [2018-09-18 10:00:53,418 INFO L226 Difference]: Without dead ends: 60 [2018-09-18 10:00:53,418 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 95 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-09-18 10:00:53,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-09-18 10:00:53,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 32. [2018-09-18 10:00:53,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-09-18 10:00:53,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 33 transitions. [2018-09-18 10:00:53,425 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 33 transitions. Word has length 26 [2018-09-18 10:00:53,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:53,426 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 33 transitions. [2018-09-18 10:00:53,426 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-09-18 10:00:53,426 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 33 transitions. [2018-09-18 10:00:53,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-09-18 10:00:53,427 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:53,427 INFO L376 BasicCegarLoop]: trace histogram [8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:53,427 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:53,427 INFO L82 PathProgramCache]: Analyzing trace with hash -1343980148, now seen corresponding path program 6 times [2018-09-18 10:00:53,427 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:53,429 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:53,429 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:53,430 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:53,430 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:53,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:53,587 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:53,587 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:53,587 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:53,595 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:00:53,595 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:00:53,653 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-18 10:00:53,653 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:53,657 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:53,683 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:53,684 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:53,904 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:53,925 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:53,925 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:53,945 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:00:53,945 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:00:54,142 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-09-18 10:00:54,142 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:54,146 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:54,183 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:54,183 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:54,222 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:54,224 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:54,224 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 18 [2018-09-18 10:00:54,224 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:54,225 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-09-18 10:00:54,225 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-09-18 10:00:54,226 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-09-18 10:00:54,226 INFO L87 Difference]: Start difference. First operand 32 states and 33 transitions. Second operand 10 states. [2018-09-18 10:00:54,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:54,533 INFO L93 Difference]: Finished difference Result 77 states and 87 transitions. [2018-09-18 10:00:54,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-09-18 10:00:54,534 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 28 [2018-09-18 10:00:54,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:54,535 INFO L225 Difference]: With dead ends: 77 [2018-09-18 10:00:54,535 INFO L226 Difference]: Without dead ends: 66 [2018-09-18 10:00:54,536 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-09-18 10:00:54,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-09-18 10:00:54,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 34. [2018-09-18 10:00:54,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-09-18 10:00:54,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 35 transitions. [2018-09-18 10:00:54,543 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 35 transitions. Word has length 28 [2018-09-18 10:00:54,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:54,544 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 35 transitions. [2018-09-18 10:00:54,544 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-09-18 10:00:54,544 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 35 transitions. [2018-09-18 10:00:54,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-09-18 10:00:54,545 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:54,545 INFO L376 BasicCegarLoop]: trace histogram [9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:54,545 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:54,546 INFO L82 PathProgramCache]: Analyzing trace with hash 1267399110, now seen corresponding path program 7 times [2018-09-18 10:00:54,546 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:54,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:54,547 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:54,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:54,547 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:54,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:54,711 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:54,711 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:54,711 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:54,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:54,719 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:00:54,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:54,748 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:54,800 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:54,800 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:55,365 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:55,385 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:55,386 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:55,401 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:55,401 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:00:55,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:55,456 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:55,471 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:55,471 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:55,492 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:55,494 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:55,494 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-09-18 10:00:55,494 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:55,494 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-09-18 10:00:55,495 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-09-18 10:00:55,495 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:00:55,495 INFO L87 Difference]: Start difference. First operand 34 states and 35 transitions. Second operand 11 states. [2018-09-18 10:00:55,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:55,877 INFO L93 Difference]: Finished difference Result 83 states and 94 transitions. [2018-09-18 10:00:55,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-09-18 10:00:55,879 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 30 [2018-09-18 10:00:55,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:55,881 INFO L225 Difference]: With dead ends: 83 [2018-09-18 10:00:55,881 INFO L226 Difference]: Without dead ends: 72 [2018-09-18 10:00:55,882 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 109 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-09-18 10:00:55,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-09-18 10:00:55,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 36. [2018-09-18 10:00:55,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-09-18 10:00:55,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 37 transitions. [2018-09-18 10:00:55,888 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 37 transitions. Word has length 30 [2018-09-18 10:00:55,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:55,889 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 37 transitions. [2018-09-18 10:00:55,889 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-09-18 10:00:55,889 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 37 transitions. [2018-09-18 10:00:55,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-09-18 10:00:55,890 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:55,890 INFO L376 BasicCegarLoop]: trace histogram [10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:55,890 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:55,891 INFO L82 PathProgramCache]: Analyzing trace with hash -1753002112, now seen corresponding path program 8 times [2018-09-18 10:00:55,891 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:55,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:55,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:00:55,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:55,892 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:55,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:00:56,213 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:56,213 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:56,213 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:00:56,236 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:00:56,236 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:00:56,278 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:00:56,279 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:56,281 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:56,349 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:56,349 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:56,889 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:56,909 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:00:56,909 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:00:56,925 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:00:56,925 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:00:56,975 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:00:56,975 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:00:56,979 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:00:56,994 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:56,994 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:00:57,047 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:00:57,051 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:00:57,051 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 22 [2018-09-18 10:00:57,051 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:00:57,052 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-09-18 10:00:57,052 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-09-18 10:00:57,053 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-09-18 10:00:57,053 INFO L87 Difference]: Start difference. First operand 36 states and 37 transitions. Second operand 12 states. [2018-09-18 10:00:59,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:00:59,719 INFO L93 Difference]: Finished difference Result 89 states and 101 transitions. [2018-09-18 10:00:59,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-09-18 10:00:59,720 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 32 [2018-09-18 10:00:59,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:00:59,722 INFO L225 Difference]: With dead ends: 89 [2018-09-18 10:00:59,722 INFO L226 Difference]: Without dead ends: 78 [2018-09-18 10:00:59,723 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 116 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-09-18 10:00:59,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-09-18 10:00:59,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 38. [2018-09-18 10:00:59,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-09-18 10:00:59,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 39 transitions. [2018-09-18 10:00:59,731 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 39 transitions. Word has length 32 [2018-09-18 10:00:59,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:00:59,732 INFO L480 AbstractCegarLoop]: Abstraction has 38 states and 39 transitions. [2018-09-18 10:00:59,732 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-09-18 10:00:59,732 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 39 transitions. [2018-09-18 10:00:59,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-09-18 10:00:59,733 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:00:59,733 INFO L376 BasicCegarLoop]: trace histogram [11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:00:59,733 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:00:59,734 INFO L82 PathProgramCache]: Analyzing trace with hash -960684358, now seen corresponding path program 9 times [2018-09-18 10:00:59,734 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:00:59,734 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:59,735 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:00:59,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:00:59,735 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:00:59,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:00,037 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:00,037 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:00,037 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:00,047 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:00,047 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:00,165 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-09-18 10:01:00,165 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:00,167 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:00,187 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:00,187 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:00,663 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:00,683 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:00,683 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:00,698 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:00,698 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:14,028 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-09-18 10:01:14,028 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:14,033 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:14,047 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:14,047 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:14,058 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:14,060 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:14,060 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 24 [2018-09-18 10:01:14,061 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:14,061 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-09-18 10:01:14,062 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-09-18 10:01:14,062 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-09-18 10:01:14,063 INFO L87 Difference]: Start difference. First operand 38 states and 39 transitions. Second operand 13 states. [2018-09-18 10:01:14,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:14,598 INFO L93 Difference]: Finished difference Result 95 states and 108 transitions. [2018-09-18 10:01:14,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-09-18 10:01:14,599 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 34 [2018-09-18 10:01:14,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:14,600 INFO L225 Difference]: With dead ends: 95 [2018-09-18 10:01:14,600 INFO L226 Difference]: Without dead ends: 84 [2018-09-18 10:01:14,602 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-09-18 10:01:14,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-09-18 10:01:14,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 40. [2018-09-18 10:01:14,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-09-18 10:01:14,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 41 transitions. [2018-09-18 10:01:14,610 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 41 transitions. Word has length 34 [2018-09-18 10:01:14,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:14,611 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 41 transitions. [2018-09-18 10:01:14,611 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-09-18 10:01:14,611 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2018-09-18 10:01:14,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-09-18 10:01:14,612 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:14,612 INFO L376 BasicCegarLoop]: trace histogram [12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:14,612 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:14,612 INFO L82 PathProgramCache]: Analyzing trace with hash 247465844, now seen corresponding path program 10 times [2018-09-18 10:01:14,613 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:14,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:14,613 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:14,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:14,614 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:14,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:14,942 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:14,942 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:14,942 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:14,959 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:14,960 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:14,986 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:14,986 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:14,988 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:15,046 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:15,046 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:15,440 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:15,461 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:15,461 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:15,477 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:01:15,477 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:01:15,576 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:01:15,576 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:15,581 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:15,605 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:15,606 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:15,657 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:15,660 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:15,660 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-09-18 10:01:15,660 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:15,660 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-09-18 10:01:15,661 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-09-18 10:01:15,661 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:01:15,661 INFO L87 Difference]: Start difference. First operand 40 states and 41 transitions. Second operand 14 states. [2018-09-18 10:01:16,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:16,453 INFO L93 Difference]: Finished difference Result 101 states and 115 transitions. [2018-09-18 10:01:16,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-09-18 10:01:16,454 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 36 [2018-09-18 10:01:16,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:16,455 INFO L225 Difference]: With dead ends: 101 [2018-09-18 10:01:16,455 INFO L226 Difference]: Without dead ends: 90 [2018-09-18 10:01:16,456 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-09-18 10:01:16,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-09-18 10:01:16,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 42. [2018-09-18 10:01:16,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-09-18 10:01:16,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 43 transitions. [2018-09-18 10:01:16,463 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 43 transitions. Word has length 36 [2018-09-18 10:01:16,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:16,463 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 43 transitions. [2018-09-18 10:01:16,463 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-09-18 10:01:16,464 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2018-09-18 10:01:16,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-09-18 10:01:16,464 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:16,464 INFO L376 BasicCegarLoop]: trace histogram [13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:16,465 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:16,465 INFO L82 PathProgramCache]: Analyzing trace with hash 1638640046, now seen corresponding path program 11 times [2018-09-18 10:01:16,465 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:16,466 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:16,466 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:16,466 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:16,466 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:16,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:16,759 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:16,759 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:16,759 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:16,766 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:16,767 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:16,981 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2018-09-18 10:01:16,982 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:16,984 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:16,996 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:16,997 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:17,453 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:17,474 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:17,474 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:17,488 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:01:17,489 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:18,574 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2018-09-18 10:01:18,574 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:18,579 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:18,592 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:18,592 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:18,632 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:18,634 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:18,634 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-09-18 10:01:18,634 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:18,634 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-09-18 10:01:18,634 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-09-18 10:01:18,635 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-09-18 10:01:18,635 INFO L87 Difference]: Start difference. First operand 42 states and 43 transitions. Second operand 15 states. [2018-09-18 10:01:19,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:19,445 INFO L93 Difference]: Finished difference Result 107 states and 122 transitions. [2018-09-18 10:01:19,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-09-18 10:01:19,446 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 38 [2018-09-18 10:01:19,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:19,447 INFO L225 Difference]: With dead ends: 107 [2018-09-18 10:01:19,447 INFO L226 Difference]: Without dead ends: 96 [2018-09-18 10:01:19,448 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 137 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-09-18 10:01:19,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-09-18 10:01:19,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 44. [2018-09-18 10:01:19,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-09-18 10:01:19,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 45 transitions. [2018-09-18 10:01:19,455 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 45 transitions. Word has length 38 [2018-09-18 10:01:19,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:19,455 INFO L480 AbstractCegarLoop]: Abstraction has 44 states and 45 transitions. [2018-09-18 10:01:19,455 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-09-18 10:01:19,455 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 45 transitions. [2018-09-18 10:01:19,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-09-18 10:01:19,456 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:19,456 INFO L376 BasicCegarLoop]: trace histogram [14, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:19,457 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:19,457 INFO L82 PathProgramCache]: Analyzing trace with hash -1472748184, now seen corresponding path program 12 times [2018-09-18 10:01:19,457 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:19,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:19,459 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:19,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:19,459 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:19,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:20,195 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:20,195 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:20,195 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:20,203 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:20,204 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:20,486 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-09-18 10:01:20,486 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:20,490 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:20,506 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:20,507 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:21,120 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:21,141 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:21,141 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:21,156 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:01:21,157 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:01:36,147 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-09-18 10:01:36,148 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:36,155 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:36,177 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:36,177 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:36,223 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:36,226 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:36,226 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 30 [2018-09-18 10:01:36,226 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:36,227 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-09-18 10:01:36,227 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-09-18 10:01:36,227 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-09-18 10:01:36,228 INFO L87 Difference]: Start difference. First operand 44 states and 45 transitions. Second operand 16 states. [2018-09-18 10:01:36,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:36,915 INFO L93 Difference]: Finished difference Result 113 states and 129 transitions. [2018-09-18 10:01:36,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-09-18 10:01:36,917 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 40 [2018-09-18 10:01:36,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:36,919 INFO L225 Difference]: With dead ends: 113 [2018-09-18 10:01:36,919 INFO L226 Difference]: Without dead ends: 102 [2018-09-18 10:01:36,919 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-09-18 10:01:36,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-09-18 10:01:36,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 46. [2018-09-18 10:01:36,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-09-18 10:01:36,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 47 transitions. [2018-09-18 10:01:36,926 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 47 transitions. Word has length 40 [2018-09-18 10:01:36,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:36,926 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 47 transitions. [2018-09-18 10:01:36,926 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-09-18 10:01:36,926 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 47 transitions. [2018-09-18 10:01:36,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-09-18 10:01:36,927 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:36,927 INFO L376 BasicCegarLoop]: trace histogram [15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:36,928 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:36,928 INFO L82 PathProgramCache]: Analyzing trace with hash 2075368098, now seen corresponding path program 13 times [2018-09-18 10:01:36,928 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:36,929 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:36,929 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:36,929 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:36,929 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:36,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:37,894 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:37,895 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:37,895 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:37,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:37,904 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:37,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:37,923 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:37,931 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:37,931 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:38,595 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:38,615 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:38,616 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:38,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:38,632 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-09-18 10:01:38,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:38,739 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:38,756 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:38,756 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:38,764 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:38,766 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:38,766 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-09-18 10:01:38,766 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:38,766 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-09-18 10:01:38,767 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-09-18 10:01:38,767 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:01:38,767 INFO L87 Difference]: Start difference. First operand 46 states and 47 transitions. Second operand 17 states. [2018-09-18 10:01:39,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:39,594 INFO L93 Difference]: Finished difference Result 119 states and 136 transitions. [2018-09-18 10:01:39,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-09-18 10:01:39,595 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 42 [2018-09-18 10:01:39,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:39,597 INFO L225 Difference]: With dead ends: 119 [2018-09-18 10:01:39,597 INFO L226 Difference]: Without dead ends: 108 [2018-09-18 10:01:39,599 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 151 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-09-18 10:01:39,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-09-18 10:01:39,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 48. [2018-09-18 10:01:39,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-09-18 10:01:39,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 49 transitions. [2018-09-18 10:01:39,605 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 49 transitions. Word has length 42 [2018-09-18 10:01:39,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:39,606 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 49 transitions. [2018-09-18 10:01:39,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-09-18 10:01:39,606 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 49 transitions. [2018-09-18 10:01:39,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-09-18 10:01:39,606 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:39,607 INFO L376 BasicCegarLoop]: trace histogram [16, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:39,607 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:39,607 INFO L82 PathProgramCache]: Analyzing trace with hash 1611082076, now seen corresponding path program 14 times [2018-09-18 10:01:39,607 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:39,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:39,608 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-18 10:01:39,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:39,608 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:39,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:39,946 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:39,946 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:39,946 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:39,958 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:39,959 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:39,985 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:39,985 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:39,987 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:40,009 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:40,009 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:40,774 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:40,794 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:40,795 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:40,809 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-09-18 10:01:40,810 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:01:40,904 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-09-18 10:01:40,904 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:40,908 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:40,941 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:40,941 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:40,995 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:41,000 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:01:41,000 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 34 [2018-09-18 10:01:41,000 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:01:41,000 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-09-18 10:01:41,001 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-09-18 10:01:41,001 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-09-18 10:01:41,001 INFO L87 Difference]: Start difference. First operand 48 states and 49 transitions. Second operand 18 states. [2018-09-18 10:01:41,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:01:41,980 INFO L93 Difference]: Finished difference Result 125 states and 143 transitions. [2018-09-18 10:01:41,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-09-18 10:01:41,980 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 44 [2018-09-18 10:01:41,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:01:41,981 INFO L225 Difference]: With dead ends: 125 [2018-09-18 10:01:41,982 INFO L226 Difference]: Without dead ends: 114 [2018-09-18 10:01:41,983 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 158 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-09-18 10:01:41,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-09-18 10:01:41,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 50. [2018-09-18 10:01:41,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-09-18 10:01:41,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 51 transitions. [2018-09-18 10:01:41,990 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 51 transitions. Word has length 44 [2018-09-18 10:01:41,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:01:41,990 INFO L480 AbstractCegarLoop]: Abstraction has 50 states and 51 transitions. [2018-09-18 10:01:41,991 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-09-18 10:01:41,991 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 51 transitions. [2018-09-18 10:01:41,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-09-18 10:01:41,991 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:01:41,992 INFO L376 BasicCegarLoop]: trace histogram [17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:01:41,992 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:01:41,992 INFO L82 PathProgramCache]: Analyzing trace with hash 2108813718, now seen corresponding path program 15 times [2018-09-18 10:01:41,992 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:01:41,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:41,993 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:01:41,993 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:01:41,993 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:01:42,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:01:42,735 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:42,736 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:42,736 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:01:42,744 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:42,744 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:01:52,091 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 17 check-sat command(s) [2018-09-18 10:01:52,092 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:01:52,120 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:01:52,145 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:52,146 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:01:53,131 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:01:53,151 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:01:53,152 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:01:53,167 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-09-18 10:01:53,167 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-09-18 10:03:12,117 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 17 check-sat command(s) [2018-09-18 10:03:12,118 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:12,125 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:12,151 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:12,151 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:12,160 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:12,163 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:12,163 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 36 [2018-09-18 10:03:12,163 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:12,164 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-09-18 10:03:12,164 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-09-18 10:03:12,165 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-09-18 10:03:12,165 INFO L87 Difference]: Start difference. First operand 50 states and 51 transitions. Second operand 19 states. [2018-09-18 10:03:13,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:13,154 INFO L93 Difference]: Finished difference Result 131 states and 150 transitions. [2018-09-18 10:03:13,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-09-18 10:03:13,155 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 46 [2018-09-18 10:03:13,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:13,157 INFO L225 Difference]: With dead ends: 131 [2018-09-18 10:03:13,157 INFO L226 Difference]: Without dead ends: 120 [2018-09-18 10:03:13,159 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-09-18 10:03:13,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-09-18 10:03:13,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 52. [2018-09-18 10:03:13,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-09-18 10:03:13,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2018-09-18 10:03:13,169 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 53 transitions. Word has length 46 [2018-09-18 10:03:13,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:13,169 INFO L480 AbstractCegarLoop]: Abstraction has 52 states and 53 transitions. [2018-09-18 10:03:13,170 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-09-18 10:03:13,170 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 53 transitions. [2018-09-18 10:03:13,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-09-18 10:03:13,171 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:13,171 INFO L376 BasicCegarLoop]: trace histogram [18, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:13,174 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:13,174 INFO L82 PathProgramCache]: Analyzing trace with hash -607415472, now seen corresponding path program 16 times [2018-09-18 10:03:13,174 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:13,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:13,175 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:13,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:13,175 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:13,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:13,648 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:13,648 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:13,648 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:13,655 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:13,656 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:13,679 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:13,679 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:13,681 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:13,690 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:13,690 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:14,731 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:14,753 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:14,753 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:14,770 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-09-18 10:03:14,771 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-09-18 10:03:14,915 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-09-18 10:03:14,915 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:14,920 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:14,936 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:14,937 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:14,976 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:14,978 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:14,978 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 38 [2018-09-18 10:03:14,978 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:14,978 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-09-18 10:03:14,979 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-09-18 10:03:14,979 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:03:14,979 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. Second operand 20 states. [2018-09-18 10:03:16,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:16,171 INFO L93 Difference]: Finished difference Result 137 states and 157 transitions. [2018-09-18 10:03:16,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-09-18 10:03:16,172 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 48 [2018-09-18 10:03:16,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:16,173 INFO L225 Difference]: With dead ends: 137 [2018-09-18 10:03:16,173 INFO L226 Difference]: Without dead ends: 126 [2018-09-18 10:03:16,175 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 172 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-09-18 10:03:16,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-09-18 10:03:16,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 54. [2018-09-18 10:03:16,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-09-18 10:03:16,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 55 transitions. [2018-09-18 10:03:16,181 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 55 transitions. Word has length 48 [2018-09-18 10:03:16,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:16,182 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 55 transitions. [2018-09-18 10:03:16,182 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-09-18 10:03:16,182 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 55 transitions. [2018-09-18 10:03:16,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-09-18 10:03:16,182 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:16,183 INFO L376 BasicCegarLoop]: trace histogram [19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:16,183 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:16,183 INFO L82 PathProgramCache]: Analyzing trace with hash 436448906, now seen corresponding path program 17 times [2018-09-18 10:03:16,183 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:16,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:16,184 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:16,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:16,184 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:16,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:16,525 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:16,525 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:16,525 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:16,533 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:16,533 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:17,954 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2018-09-18 10:03:17,954 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:17,957 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:17,967 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:17,967 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:19,223 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:19,243 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:19,243 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:03:19,258 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-09-18 10:03:19,258 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-09-18 10:03:26,191 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2018-09-18 10:03:26,192 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:26,198 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:26,241 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:26,241 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:03:26,248 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:26,250 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-09-18 10:03:26,251 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 40 [2018-09-18 10:03:26,251 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-09-18 10:03:26,251 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-09-18 10:03:26,252 INFO L147 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-09-18 10:03:26,252 INFO L148 InterpolantAutomaton]: CoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-09-18 10:03:26,252 INFO L87 Difference]: Start difference. First operand 54 states and 55 transitions. Second operand 21 states. [2018-09-18 10:03:27,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-18 10:03:27,376 INFO L93 Difference]: Finished difference Result 143 states and 164 transitions. [2018-09-18 10:03:27,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-09-18 10:03:27,376 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 50 [2018-09-18 10:03:27,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-18 10:03:27,378 INFO L225 Difference]: With dead ends: 143 [2018-09-18 10:03:27,378 INFO L226 Difference]: Without dead ends: 132 [2018-09-18 10:03:27,379 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 179 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-09-18 10:03:27,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-09-18 10:03:27,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 56. [2018-09-18 10:03:27,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-09-18 10:03:27,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 57 transitions. [2018-09-18 10:03:27,384 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 57 transitions. Word has length 50 [2018-09-18 10:03:27,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-18 10:03:27,384 INFO L480 AbstractCegarLoop]: Abstraction has 56 states and 57 transitions. [2018-09-18 10:03:27,384 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-09-18 10:03:27,385 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 57 transitions. [2018-09-18 10:03:27,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-09-18 10:03:27,385 INFO L368 BasicCegarLoop]: Found error trace [2018-09-18 10:03:27,385 INFO L376 BasicCegarLoop]: trace histogram [20, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-09-18 10:03:27,386 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-09-18 10:03:27,386 INFO L82 PathProgramCache]: Analyzing trace with hash -1432231100, now seen corresponding path program 18 times [2018-09-18 10:03:27,386 INFO L69 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-09-18 10:03:27,386 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:27,387 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-09-18 10:03:27,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-18 10:03:27,387 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-09-18 10:03:27,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-18 10:03:27,819 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 380 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:03:27,819 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:03:27,819 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-09-18 10:03:27,827 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:03:27,827 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-09-18 10:03:52,833 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 20 check-sat command(s) [2018-09-18 10:03:52,833 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-09-18 10:03:52,852 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-09-18 10:03:52,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-09-18 10:03:52,893 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:52,897 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-18 10:03:52,897 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-09-18 10:03:52,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-18 10:03:52,948 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:52,953 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-18 10:03:52,953 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-09-18 10:03:52,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-18 10:03:52,995 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:52,999 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-18 10:03:52,999 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-09-18 10:03:53,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-18 10:03:53,028 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:53,033 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-18 10:03:53,033 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-09-18 10:03:53,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-09-18 10:03:53,063 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:53,066 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-09-18 10:03:53,066 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-09-18 10:03:53,438 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 23 [2018-09-18 10:03:53,439 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-09-18 10:03:53,467 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:03:53,467 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:29 [2018-09-18 10:03:53,590 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-09-18 10:03:53,591 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:53,623 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:03:53,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 37 [2018-09-18 10:03:53,626 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:53,681 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:03:53,681 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:56, output treesize:29 [2018-09-18 10:03:53,755 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:03:53,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 45 [2018-09-18 10:03:53,757 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:53,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:03:53,794 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:53,818 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:03:53,819 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:64, output treesize:37 [2018-09-18 10:03:54,013 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:03:54,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 53 [2018-09-18 10:03:54,016 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:54,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:03:54,067 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:54,109 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:03:54,109 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:72, output treesize:45 [2018-09-18 10:03:54,296 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:03:54,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 61 [2018-09-18 10:03:54,299 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:54,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:03:54,367 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:54,435 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:03:54,436 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:80, output treesize:53 [2018-09-18 10:03:54,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-09-18 10:03:54,652 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:54,752 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:03:54,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 69 [2018-09-18 10:03:54,757 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:54,871 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:03:54,872 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:88, output treesize:61 [2018-09-18 10:03:55,173 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:03:55,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 77 [2018-09-18 10:03:55,178 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:55,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:03:55,319 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:55,447 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:03:55,447 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:96, output treesize:69 [2018-09-18 10:03:55,797 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:03:55,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 85 [2018-09-18 10:03:55,805 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:56,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:03:56,047 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:56,214 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:03:56,215 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:104, output treesize:77 [2018-09-18 10:03:56,866 WARN L178 SmtUtils]: Spent 146.00 ms on a formula simplification that was a NOOP. DAG size: 49 [2018-09-18 10:03:56,882 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:03:56,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 86 [2018-09-18 10:03:56,891 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:57,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:03:57,138 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:57,396 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:03:57,397 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:98, output treesize:77 [2018-09-18 10:03:58,005 WARN L178 SmtUtils]: Spent 157.00 ms on a formula simplification that was a NOOP. DAG size: 49 [2018-09-18 10:03:58,022 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:03:58,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 86 [2018-09-18 10:03:58,033 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:58,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:03:58,256 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:03:59,242 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:03:59,243 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:98, output treesize:77 [2018-09-18 10:04:01,808 WARN L178 SmtUtils]: Spent 127.00 ms on a formula simplification that was a NOOP. DAG size: 49 [2018-09-18 10:04:01,823 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:04:01,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 86 [2018-09-18 10:04:01,837 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:04:02,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:04:02,086 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:04:02,288 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:04:02,289 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:98, output treesize:77 [2018-09-18 10:04:05,723 WARN L178 SmtUtils]: Spent 137.00 ms on a formula simplification that was a NOOP. DAG size: 49 [2018-09-18 10:04:05,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:04:05,748 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:04:05,970 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:04:05,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 86 [2018-09-18 10:04:05,976 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:04:06,167 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:04:06,168 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:98, output treesize:77 [2018-09-18 10:04:06,730 WARN L178 SmtUtils]: Spent 217.00 ms on a formula simplification that was a NOOP. DAG size: 49 [2018-09-18 10:04:06,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:04:06,751 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:04:07,047 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:04:07,055 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 86 [2018-09-18 10:04:07,056 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:04:07,283 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:04:07,283 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:98, output treesize:77 [2018-09-18 10:04:08,336 WARN L178 SmtUtils]: Spent 133.00 ms on a formula simplification that was a NOOP. DAG size: 49 [2018-09-18 10:04:08,352 INFO L700 Elim1Store]: detected not equals via solver [2018-09-18 10:04:08,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 86 [2018-09-18 10:04:08,361 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-09-18 10:04:08,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-09-18 10:04:08,608 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-09-18 10:04:08,884 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-09-18 10:04:08,884 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:98, output treesize:77 [2018-09-18 10:04:09,559 WARN L178 SmtUtils]: Spent 153.00 ms on a formula simplification that was a NOOP. DAG size: 49 [2018-09-18 10:04:09,803 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 378 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:09,803 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-09-18 10:04:13,942 WARN L178 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 58 [2018-09-18 10:04:14,628 WARN L178 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 63 [2018-09-18 10:04:17,607 WARN L178 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 68 [2018-09-18 10:04:18,554 WARN L178 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 73 [2018-09-18 10:04:19,784 WARN L178 SmtUtils]: Spent 215.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 78 [2018-09-18 10:04:22,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 44 [2018-09-18 10:04:22,353 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 56 [2018-09-18 10:04:22,387 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,388 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 79 [2018-09-18 10:04:22,399 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,401 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,402 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 113 [2018-09-18 10:04:22,522 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,523 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,523 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,525 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,532 INFO L682 Elim1Store]: detected equality via solver [2018-09-18 10:04:22,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 8 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 102 [2018-09-18 10:04:22,572 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 4 xjuncts. [2018-09-18 10:04:22,576 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-09-18 10:04:22,576 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-09-18 10:04:22,713 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-09-18 10:04:22,743 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-09-18 10:04:22,769 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-09-18 10:04:22,791 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-09-18 10:04:22,823 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-09-18 10:04:22,823 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:55, output treesize:75 [2018-09-18 10:04:23,252 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 10 proven. 370 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-18 10:04:23,273 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-09-18 10:04:23,274 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-09-18 10:04:23,289 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-09-18 10:04:23,289 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown