java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/taipan/svcomp-Reach-64bit-Taipan_Default.epf -i ../../../trunk/examples/svcomp/loop-invgen/fragtest_simple_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-8c3fbe1 [2018-10-22 16:06:35,407 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-22 16:06:35,414 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-22 16:06:35,433 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-22 16:06:35,433 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-22 16:06:35,434 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-22 16:06:35,438 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-22 16:06:35,440 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-22 16:06:35,442 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-22 16:06:35,443 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-22 16:06:35,445 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-22 16:06:35,445 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-22 16:06:35,447 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-22 16:06:35,448 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-22 16:06:35,451 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-22 16:06:35,452 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-22 16:06:35,453 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-22 16:06:35,455 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-22 16:06:35,457 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-22 16:06:35,458 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-22 16:06:35,459 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-22 16:06:35,461 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-22 16:06:35,463 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-22 16:06:35,463 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-22 16:06:35,463 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-22 16:06:35,464 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-22 16:06:35,465 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-22 16:06:35,466 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-22 16:06:35,467 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-22 16:06:35,468 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-22 16:06:35,468 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-22 16:06:35,469 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-10-22 16:06:35,471 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/../../../trunk/examples/settings/default/taipan/svcomp-Reach-64bit-Taipan_Default.epf [2018-10-22 16:06:35,486 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-22 16:06:35,487 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-22 16:06:35,487 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-22 16:06:35,488 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-22 16:06:35,488 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-22 16:06:35,488 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-22 16:06:35,488 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-10-22 16:06:35,488 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-22 16:06:35,489 INFO L133 SettingsManager]: * Log string format=TERM [2018-10-22 16:06:35,489 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-10-22 16:06:35,489 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-10-22 16:06:35,489 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-22 16:06:35,490 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-22 16:06:35,490 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-22 16:06:35,490 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-22 16:06:35,490 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-10-22 16:06:35,491 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-22 16:06:35,491 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-10-22 16:06:35,491 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-10-22 16:06:35,491 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-10-22 16:06:35,491 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-22 16:06:35,492 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-22 16:06:35,492 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-22 16:06:35,492 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-22 16:06:35,492 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-22 16:06:35,492 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-22 16:06:35,493 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-22 16:06:35,493 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-10-22 16:06:35,493 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-10-22 16:06:35,493 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-22 16:06:35,494 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-22 16:06:35,494 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-10-22 16:06:35,494 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-10-22 16:06:35,494 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-10-22 16:06:35,557 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-22 16:06:35,570 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-22 16:06:35,574 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-22 16:06:35,575 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-22 16:06:35,576 INFO L276 PluginConnector]: CDTParser initialized [2018-10-22 16:06:35,577 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/../../../trunk/examples/svcomp/loop-invgen/fragtest_simple_true-unreach-call_true-termination.i [2018-10-22 16:06:35,631 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data/e784ebbec/daf8387734424bbd8fe83b25c1c7da53/FLAG225517b6b [2018-10-22 16:06:36,097 INFO L298 CDTParser]: Found 1 translation units. [2018-10-22 16:06:36,098 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-invgen/fragtest_simple_true-unreach-call_true-termination.i [2018-10-22 16:06:36,108 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data/e784ebbec/daf8387734424bbd8fe83b25c1c7da53/FLAG225517b6b [2018-10-22 16:06:36,128 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data/e784ebbec/daf8387734424bbd8fe83b25c1c7da53 [2018-10-22 16:06:36,142 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-22 16:06:36,144 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-10-22 16:06:36,145 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-22 16:06:36,145 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-22 16:06:36,153 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-22 16:06:36,154 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,158 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1307beea and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36, skipping insertion in model container [2018-10-22 16:06:36,158 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,169 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-22 16:06:36,201 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-22 16:06:36,363 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-22 16:06:36,367 INFO L189 MainTranslator]: Completed pre-run [2018-10-22 16:06:36,385 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-22 16:06:36,400 INFO L193 MainTranslator]: Completed translation [2018-10-22 16:06:36,401 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36 WrapperNode [2018-10-22 16:06:36,401 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-22 16:06:36,402 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-22 16:06:36,402 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-22 16:06:36,402 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-22 16:06:36,412 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,419 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,425 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-22 16:06:36,425 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-22 16:06:36,426 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-22 16:06:36,426 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-22 16:06:36,436 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,437 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,438 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,438 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,442 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,449 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,450 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (1/1) ... [2018-10-22 16:06:36,457 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-22 16:06:36,458 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-22 16:06:36,458 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-22 16:06:36,458 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-22 16:06:36,462 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-22 16:06:36,600 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-22 16:06:36,600 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-22 16:06:36,600 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-22 16:06:36,601 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-22 16:06:36,601 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-22 16:06:36,601 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-22 16:06:36,601 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-10-22 16:06:36,601 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-10-22 16:06:36,985 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-22 16:06:36,986 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.10 04:06:36 BoogieIcfgContainer [2018-10-22 16:06:36,986 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-22 16:06:36,988 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-22 16:06:36,988 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-22 16:06:36,991 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-22 16:06:36,992 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 22.10 04:06:36" (1/3) ... [2018-10-22 16:06:36,992 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@e11c76a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.10 04:06:36, skipping insertion in model container [2018-10-22 16:06:36,993 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:06:36" (2/3) ... [2018-10-22 16:06:36,993 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@e11c76a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.10 04:06:36, skipping insertion in model container [2018-10-22 16:06:36,993 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.10 04:06:36" (3/3) ... [2018-10-22 16:06:36,995 INFO L112 eAbstractionObserver]: Analyzing ICFG fragtest_simple_true-unreach-call_true-termination.i [2018-10-22 16:06:37,007 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-22 16:06:37,016 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-10-22 16:06:37,031 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-10-22 16:06:37,067 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-10-22 16:06:37,068 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-22 16:06:37,068 INFO L383 AbstractCegarLoop]: Hoare is true [2018-10-22 16:06:37,068 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-22 16:06:37,068 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-22 16:06:37,068 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-22 16:06:37,069 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-22 16:06:37,069 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-22 16:06:37,069 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-22 16:06:37,091 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states. [2018-10-22 16:06:37,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-10-22 16:06:37,098 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:37,100 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:37,102 INFO L424 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:37,109 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:37,109 INFO L82 PathProgramCache]: Analyzing trace with hash 62896836, now seen corresponding path program 1 times [2018-10-22 16:06:37,112 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:37,166 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:37,167 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:37,167 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:37,167 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:37,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:37,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:06:37,230 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-22 16:06:37,230 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-22 16:06:37,230 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-22 16:06:37,235 INFO L460 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-10-22 16:06:37,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-10-22 16:06:37,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-10-22 16:06:37,252 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 2 states. [2018-10-22 16:06:37,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:37,279 INFO L93 Difference]: Finished difference Result 52 states and 67 transitions. [2018-10-22 16:06:37,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-10-22 16:06:37,281 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 16 [2018-10-22 16:06:37,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:37,291 INFO L225 Difference]: With dead ends: 52 [2018-10-22 16:06:37,291 INFO L226 Difference]: Without dead ends: 25 [2018-10-22 16:06:37,295 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-10-22 16:06:37,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-10-22 16:06:37,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-10-22 16:06:37,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-10-22 16:06:37,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 28 transitions. [2018-10-22 16:06:37,337 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 28 transitions. Word has length 16 [2018-10-22 16:06:37,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:37,338 INFO L481 AbstractCegarLoop]: Abstraction has 25 states and 28 transitions. [2018-10-22 16:06:37,338 INFO L482 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-10-22 16:06:37,338 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2018-10-22 16:06:37,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-10-22 16:06:37,339 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:37,339 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:37,340 INFO L424 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:37,340 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:37,340 INFO L82 PathProgramCache]: Analyzing trace with hash -111227420, now seen corresponding path program 1 times [2018-10-22 16:06:37,340 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:37,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:37,342 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:37,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:37,342 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:37,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:37,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:06:37,680 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-22 16:06:37,680 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-22 16:06:37,680 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-22 16:06:37,682 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-22 16:06:37,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-22 16:06:37,683 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-22 16:06:37,683 INFO L87 Difference]: Start difference. First operand 25 states and 28 transitions. Second operand 5 states. [2018-10-22 16:06:37,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:37,827 INFO L93 Difference]: Finished difference Result 35 states and 38 transitions. [2018-10-22 16:06:37,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-22 16:06:37,828 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-10-22 16:06:37,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:37,829 INFO L225 Difference]: With dead ends: 35 [2018-10-22 16:06:37,829 INFO L226 Difference]: Without dead ends: 33 [2018-10-22 16:06:37,831 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-22 16:06:37,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-10-22 16:06:37,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2018-10-22 16:06:37,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-10-22 16:06:37,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 35 transitions. [2018-10-22 16:06:37,840 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 35 transitions. Word has length 20 [2018-10-22 16:06:37,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:37,840 INFO L481 AbstractCegarLoop]: Abstraction has 32 states and 35 transitions. [2018-10-22 16:06:37,841 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-22 16:06:37,841 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 35 transitions. [2018-10-22 16:06:37,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-22 16:06:37,842 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:37,842 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:37,843 INFO L424 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:37,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:37,843 INFO L82 PathProgramCache]: Analyzing trace with hash -1352658359, now seen corresponding path program 1 times [2018-10-22 16:06:37,843 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:37,844 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:37,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:37,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:37,845 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:37,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:37,940 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:06:37,941 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-22 16:06:37,941 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-22 16:06:37,941 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-22 16:06:37,942 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-22 16:06:37,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-22 16:06:37,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-22 16:06:37,943 INFO L87 Difference]: Start difference. First operand 32 states and 35 transitions. Second operand 5 states. [2018-10-22 16:06:38,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:38,338 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2018-10-22 16:06:38,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-22 16:06:38,340 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-10-22 16:06:38,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:38,345 INFO L225 Difference]: With dead ends: 57 [2018-10-22 16:06:38,346 INFO L226 Difference]: Without dead ends: 40 [2018-10-22 16:06:38,347 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-10-22 16:06:38,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-10-22 16:06:38,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 35. [2018-10-22 16:06:38,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-10-22 16:06:38,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 38 transitions. [2018-10-22 16:06:38,365 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 38 transitions. Word has length 29 [2018-10-22 16:06:38,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:38,365 INFO L481 AbstractCegarLoop]: Abstraction has 35 states and 38 transitions. [2018-10-22 16:06:38,365 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-22 16:06:38,367 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 38 transitions. [2018-10-22 16:06:38,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-10-22 16:06:38,368 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:38,368 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:38,368 INFO L424 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:38,370 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:38,371 INFO L82 PathProgramCache]: Analyzing trace with hash -38707475, now seen corresponding path program 1 times [2018-10-22 16:06:38,371 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:38,372 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:38,372 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:38,372 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:38,372 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:38,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:38,532 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:06:38,533 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:38,533 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:38,534 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 33 with the following transitions: [2018-10-22 16:06:38,536 INFO L202 CegarAbsIntRunner]: [0], [4], [8], [10], [13], [21], [25], [29], [31], [34], [36], [40], [44], [50], [52], [57], [63], [66], [68], [71], [73], [74], [75], [76], [78], [79] [2018-10-22 16:06:38,587 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-22 16:06:38,587 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-22 16:06:39,257 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-22 16:06:39,258 INFO L272 AbstractInterpreter]: Visited 26 different actions 215 times. Merged at 10 different actions 103 times. Widened at 3 different actions 14 times. Found 7 fixpoints after 2 different actions. Largest state had 9 variables. [2018-10-22 16:06:39,311 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:39,313 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-22 16:06:39,314 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:39,314 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:39,328 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:39,329 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:06:39,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:39,374 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:39,645 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:06:39,646 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:39,833 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:06:39,861 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:39,862 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:39,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:39,879 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:06:39,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:39,910 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:39,929 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:06:39,929 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:39,985 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:06:39,986 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:39,987 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6, 6, 6] total 13 [2018-10-22 16:06:39,987 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:39,988 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-22 16:06:39,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-22 16:06:39,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2018-10-22 16:06:39,992 INFO L87 Difference]: Start difference. First operand 35 states and 38 transitions. Second operand 11 states. [2018-10-22 16:06:40,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:40,705 INFO L93 Difference]: Finished difference Result 72 states and 83 transitions. [2018-10-22 16:06:40,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-22 16:06:40,706 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-10-22 16:06:40,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:40,709 INFO L225 Difference]: With dead ends: 72 [2018-10-22 16:06:40,709 INFO L226 Difference]: Without dead ends: 55 [2018-10-22 16:06:40,710 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 123 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=71, Invalid=271, Unknown=0, NotChecked=0, Total=342 [2018-10-22 16:06:40,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-10-22 16:06:40,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 45. [2018-10-22 16:06:40,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-10-22 16:06:40,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 49 transitions. [2018-10-22 16:06:40,720 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 49 transitions. Word has length 32 [2018-10-22 16:06:40,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:40,720 INFO L481 AbstractCegarLoop]: Abstraction has 45 states and 49 transitions. [2018-10-22 16:06:40,721 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-22 16:06:40,721 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 49 transitions. [2018-10-22 16:06:40,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-10-22 16:06:40,724 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:40,724 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:40,724 INFO L424 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:40,724 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:40,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1515908604, now seen corresponding path program 2 times [2018-10-22 16:06:40,725 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:40,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:40,726 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:40,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:40,726 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:40,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:40,889 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 12 proven. 15 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-22 16:06:40,889 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:40,889 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:40,890 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:40,890 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:40,890 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:40,890 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:40,902 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:06:40,902 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:06:40,939 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:06:40,939 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:40,942 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:41,161 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:06:41,162 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:41,377 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:06:41,397 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:41,397 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:41,413 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:06:41,413 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:06:41,461 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:06:41,462 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:41,471 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:41,494 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:06:41,495 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:41,627 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:06:41,629 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:41,629 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 17 [2018-10-22 16:06:41,630 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:41,630 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-22 16:06:41,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-22 16:06:41,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2018-10-22 16:06:41,631 INFO L87 Difference]: Start difference. First operand 45 states and 49 transitions. Second operand 14 states. [2018-10-22 16:06:42,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:42,071 INFO L93 Difference]: Finished difference Result 92 states and 107 transitions. [2018-10-22 16:06:42,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-22 16:06:42,072 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-10-22 16:06:42,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:42,075 INFO L225 Difference]: With dead ends: 92 [2018-10-22 16:06:42,075 INFO L226 Difference]: Without dead ends: 70 [2018-10-22 16:06:42,077 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 168 SyntacticMatches, 6 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=125, Invalid=525, Unknown=0, NotChecked=0, Total=650 [2018-10-22 16:06:42,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-10-22 16:06:42,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 53. [2018-10-22 16:06:42,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-10-22 16:06:42,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2018-10-22 16:06:42,087 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 44 [2018-10-22 16:06:42,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:42,087 INFO L481 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2018-10-22 16:06:42,087 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-22 16:06:42,088 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2018-10-22 16:06:42,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-10-22 16:06:42,089 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:42,089 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:42,090 INFO L424 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:42,090 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:42,090 INFO L82 PathProgramCache]: Analyzing trace with hash 775099085, now seen corresponding path program 3 times [2018-10-22 16:06:42,090 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:42,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:42,092 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:06:42,092 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:42,092 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:42,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:42,241 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:06:42,241 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:42,241 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:42,241 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:42,242 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:42,242 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:42,242 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:42,251 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:06:42,251 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:06:42,323 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-10-22 16:06:42,323 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:42,330 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:42,442 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:06:42,443 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:42,533 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:06:42,554 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:42,554 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:42,570 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:06:42,571 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:06:42,632 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-10-22 16:06:42,632 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:42,638 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:42,655 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:06:42,656 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:42,768 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 30 proven. 18 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:06:42,769 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:42,769 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 14 [2018-10-22 16:06:42,770 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:42,770 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-22 16:06:42,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-22 16:06:42,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2018-10-22 16:06:42,771 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand 14 states. [2018-10-22 16:06:43,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:43,093 INFO L93 Difference]: Finished difference Result 103 states and 120 transitions. [2018-10-22 16:06:43,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-22 16:06:43,093 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 56 [2018-10-22 16:06:43,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:43,095 INFO L225 Difference]: With dead ends: 103 [2018-10-22 16:06:43,095 INFO L226 Difference]: Without dead ends: 76 [2018-10-22 16:06:43,096 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 206 SyntacticMatches, 14 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-10-22 16:06:43,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-10-22 16:06:43,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 56. [2018-10-22 16:06:43,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-10-22 16:06:43,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 61 transitions. [2018-10-22 16:06:43,106 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 61 transitions. Word has length 56 [2018-10-22 16:06:43,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:43,106 INFO L481 AbstractCegarLoop]: Abstraction has 56 states and 61 transitions. [2018-10-22 16:06:43,106 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-22 16:06:43,106 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 61 transitions. [2018-10-22 16:06:43,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-10-22 16:06:43,109 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:43,109 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:43,109 INFO L424 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:43,109 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:43,110 INFO L82 PathProgramCache]: Analyzing trace with hash -916783191, now seen corresponding path program 4 times [2018-10-22 16:06:43,110 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:43,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:43,111 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:06:43,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:43,111 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:43,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:43,253 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 35 proven. 31 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-22 16:06:43,254 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:43,254 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:43,254 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:43,254 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:43,254 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:43,254 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:43,262 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:06:43,262 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:06:43,286 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:06:43,286 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:43,291 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:43,377 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:06:43,378 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:44,157 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:06:44,179 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:44,179 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:44,197 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:06:44,197 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:06:44,250 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:06:44,250 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:44,255 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:44,265 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:06:44,266 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:44,340 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 36 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:06:44,342 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:44,343 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 9, 9, 9] total 14 [2018-10-22 16:06:44,343 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:44,344 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-22 16:06:44,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-22 16:06:44,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2018-10-22 16:06:44,347 INFO L87 Difference]: Start difference. First operand 56 states and 61 transitions. Second operand 13 states. [2018-10-22 16:06:44,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:44,632 INFO L93 Difference]: Finished difference Result 77 states and 85 transitions. [2018-10-22 16:06:44,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-22 16:06:44,632 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 59 [2018-10-22 16:06:44,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:44,634 INFO L225 Difference]: With dead ends: 77 [2018-10-22 16:06:44,634 INFO L226 Difference]: Without dead ends: 75 [2018-10-22 16:06:44,635 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 223 SyntacticMatches, 14 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2018-10-22 16:06:44,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-10-22 16:06:44,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 68. [2018-10-22 16:06:44,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-10-22 16:06:44,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 74 transitions. [2018-10-22 16:06:44,645 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 74 transitions. Word has length 59 [2018-10-22 16:06:44,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:44,646 INFO L481 AbstractCegarLoop]: Abstraction has 68 states and 74 transitions. [2018-10-22 16:06:44,646 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-22 16:06:44,646 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 74 transitions. [2018-10-22 16:06:44,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-10-22 16:06:44,648 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:44,648 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:44,648 INFO L424 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:44,648 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:44,649 INFO L82 PathProgramCache]: Analyzing trace with hash 928258569, now seen corresponding path program 5 times [2018-10-22 16:06:44,649 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:44,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:44,650 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:06:44,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:44,650 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:44,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:44,983 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 75 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:44,984 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:44,984 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:44,984 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:44,984 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:44,984 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:44,984 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:44,992 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:06:44,992 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:06:45,088 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-10-22 16:06:45,089 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:45,092 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:45,537 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 75 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:45,537 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:45,820 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 75 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:45,846 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:45,846 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:45,866 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:06:45,866 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:06:45,949 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-10-22 16:06:45,950 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:45,955 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:45,970 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 86 proven. 30 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-10-22 16:06:45,971 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:46,116 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 72 proven. 30 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-10-22 16:06:46,119 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:46,120 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 12, 12] total 21 [2018-10-22 16:06:46,120 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:46,121 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-22 16:06:46,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-22 16:06:46,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2018-10-22 16:06:46,121 INFO L87 Difference]: Start difference. First operand 68 states and 74 transitions. Second operand 19 states. [2018-10-22 16:06:46,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:46,726 INFO L93 Difference]: Finished difference Result 135 states and 156 transitions. [2018-10-22 16:06:46,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-22 16:06:46,726 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 77 [2018-10-22 16:06:46,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:46,728 INFO L225 Difference]: With dead ends: 135 [2018-10-22 16:06:46,728 INFO L226 Difference]: Without dead ends: 96 [2018-10-22 16:06:46,729 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 324 GetRequests, 283 SyntacticMatches, 17 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 253 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=192, Invalid=458, Unknown=0, NotChecked=0, Total=650 [2018-10-22 16:06:46,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-10-22 16:06:46,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 71. [2018-10-22 16:06:46,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-10-22 16:06:46,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 77 transitions. [2018-10-22 16:06:46,738 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 77 transitions. Word has length 77 [2018-10-22 16:06:46,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:46,739 INFO L481 AbstractCegarLoop]: Abstraction has 71 states and 77 transitions. [2018-10-22 16:06:46,739 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-22 16:06:46,739 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 77 transitions. [2018-10-22 16:06:46,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-10-22 16:06:46,740 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:46,741 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:46,741 INFO L424 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:46,741 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:46,741 INFO L82 PathProgramCache]: Analyzing trace with hash -846983507, now seen corresponding path program 6 times [2018-10-22 16:06:46,741 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:46,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:46,742 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:06:46,743 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:46,743 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:46,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:46,985 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:46,986 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:46,986 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:46,986 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:46,986 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:46,986 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:46,986 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:46,994 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:06:46,994 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:06:47,052 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2018-10-22 16:06:47,052 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:47,056 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:47,264 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:47,264 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:47,363 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:47,384 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:47,385 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:47,400 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:06:47,401 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:06:47,505 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2018-10-22 16:06:47,505 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:47,511 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:47,538 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:47,538 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:47,682 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 75 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:47,684 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:47,684 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 20 [2018-10-22 16:06:47,684 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:47,685 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-10-22 16:06:47,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-10-22 16:06:47,686 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2018-10-22 16:06:47,686 INFO L87 Difference]: Start difference. First operand 71 states and 77 transitions. Second operand 20 states. [2018-10-22 16:06:48,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:48,055 INFO L93 Difference]: Finished difference Result 141 states and 165 transitions. [2018-10-22 16:06:48,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-22 16:06:48,056 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 80 [2018-10-22 16:06:48,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:48,057 INFO L225 Difference]: With dead ends: 141 [2018-10-22 16:06:48,057 INFO L226 Difference]: Without dead ends: 104 [2018-10-22 16:06:48,058 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 338 GetRequests, 292 SyntacticMatches, 22 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 245 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-10-22 16:06:48,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-10-22 16:06:48,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 74. [2018-10-22 16:06:48,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-10-22 16:06:48,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 80 transitions. [2018-10-22 16:06:48,068 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 80 transitions. Word has length 80 [2018-10-22 16:06:48,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:48,069 INFO L481 AbstractCegarLoop]: Abstraction has 74 states and 80 transitions. [2018-10-22 16:06:48,069 INFO L482 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-10-22 16:06:48,069 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 80 transitions. [2018-10-22 16:06:48,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-10-22 16:06:48,071 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:48,071 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:48,071 INFO L424 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:48,071 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:48,071 INFO L82 PathProgramCache]: Analyzing trace with hash 1143613321, now seen corresponding path program 7 times [2018-10-22 16:06:48,071 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:48,072 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:48,072 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:06:48,073 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:48,073 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:48,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:48,321 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 72 proven. 78 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-10-22 16:06:48,321 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:48,321 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:48,322 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:48,322 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:48,322 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:48,322 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:48,334 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:48,334 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:06:48,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:48,372 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:48,546 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:48,546 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:48,694 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:48,715 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:48,715 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:48,730 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:48,730 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:06:48,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:48,797 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:48,809 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:48,809 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:48,913 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 73 proven. 65 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:06:48,914 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:48,914 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11, 11, 11] total 15 [2018-10-22 16:06:48,914 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:48,915 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-22 16:06:48,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-22 16:06:48,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-10-22 16:06:48,916 INFO L87 Difference]: Start difference. First operand 74 states and 80 transitions. Second operand 14 states. [2018-10-22 16:06:49,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:49,094 INFO L93 Difference]: Finished difference Result 90 states and 97 transitions. [2018-10-22 16:06:49,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-22 16:06:49,095 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 83 [2018-10-22 16:06:49,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:49,099 INFO L225 Difference]: With dead ends: 90 [2018-10-22 16:06:49,099 INFO L226 Difference]: Without dead ends: 88 [2018-10-22 16:06:49,099 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 351 GetRequests, 314 SyntacticMatches, 22 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2018-10-22 16:06:49,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-10-22 16:06:49,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-10-22 16:06:49,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-10-22 16:06:49,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 95 transitions. [2018-10-22 16:06:49,109 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 95 transitions. Word has length 83 [2018-10-22 16:06:49,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:49,109 INFO L481 AbstractCegarLoop]: Abstraction has 88 states and 95 transitions. [2018-10-22 16:06:49,109 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-22 16:06:49,110 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 95 transitions. [2018-10-22 16:06:49,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-10-22 16:06:49,111 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:49,111 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:49,112 INFO L424 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:49,112 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:49,112 INFO L82 PathProgramCache]: Analyzing trace with hash 643631593, now seen corresponding path program 8 times [2018-10-22 16:06:49,112 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:49,113 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:49,113 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:49,113 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:49,113 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:49,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:50,043 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 140 proven. 63 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:06:50,043 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:50,043 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:50,043 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:50,044 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:50,044 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:50,044 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:50,052 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:06:50,052 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:06:50,085 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:06:50,085 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:50,087 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:50,291 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 159 proven. 63 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2018-10-22 16:06:50,291 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:50,398 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 137 proven. 63 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-10-22 16:06:50,418 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:50,418 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:50,437 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:06:50,437 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:06:50,508 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:06:50,508 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:50,513 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:50,535 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 159 proven. 63 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2018-10-22 16:06:50,535 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:50,746 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 137 proven. 63 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-10-22 16:06:50,749 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:50,750 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16, 16, 16] total 24 [2018-10-22 16:06:50,750 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:50,751 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-10-22 16:06:50,751 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-10-22 16:06:50,751 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2018-10-22 16:06:50,752 INFO L87 Difference]: Start difference. First operand 88 states and 95 transitions. Second operand 24 states. [2018-10-22 16:06:51,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:51,180 INFO L93 Difference]: Finished difference Result 175 states and 203 transitions. [2018-10-22 16:06:51,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-22 16:06:51,180 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 101 [2018-10-22 16:06:51,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:51,182 INFO L225 Difference]: With dead ends: 175 [2018-10-22 16:06:51,182 INFO L226 Difference]: Without dead ends: 126 [2018-10-22 16:06:51,184 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 426 GetRequests, 371 SyntacticMatches, 26 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 375 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=262, Invalid=668, Unknown=0, NotChecked=0, Total=930 [2018-10-22 16:06:51,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-10-22 16:06:51,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 91. [2018-10-22 16:06:51,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-10-22 16:06:51,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 98 transitions. [2018-10-22 16:06:51,197 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 98 transitions. Word has length 101 [2018-10-22 16:06:51,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:51,197 INFO L481 AbstractCegarLoop]: Abstraction has 91 states and 98 transitions. [2018-10-22 16:06:51,197 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-10-22 16:06:51,200 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 98 transitions. [2018-10-22 16:06:51,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-10-22 16:06:51,205 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:51,205 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:51,205 INFO L424 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:51,206 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:51,206 INFO L82 PathProgramCache]: Analyzing trace with hash -1746775411, now seen corresponding path program 9 times [2018-10-22 16:06:51,206 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:51,210 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:51,210 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:06:51,210 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:51,211 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:51,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:51,522 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:06:51,522 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:51,522 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:51,523 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:51,523 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:51,523 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:51,523 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:51,533 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:06:51,533 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:06:51,571 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-10-22 16:06:51,571 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:51,575 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:51,781 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:06:51,782 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:51,941 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:06:51,961 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:51,961 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:51,977 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:06:51,977 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:06:52,109 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-10-22 16:06:52,109 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:52,114 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:52,131 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:06:52,131 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:52,270 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 140 proven. 84 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:06:52,272 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:52,272 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 26 [2018-10-22 16:06:52,272 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:52,273 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-10-22 16:06:52,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-10-22 16:06:52,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=481, Unknown=0, NotChecked=0, Total=650 [2018-10-22 16:06:52,274 INFO L87 Difference]: Start difference. First operand 91 states and 98 transitions. Second operand 26 states. [2018-10-22 16:06:52,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:52,583 INFO L93 Difference]: Finished difference Result 181 states and 212 transitions. [2018-10-22 16:06:52,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-10-22 16:06:52,583 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 104 [2018-10-22 16:06:52,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:52,585 INFO L225 Difference]: With dead ends: 181 [2018-10-22 16:06:52,585 INFO L226 Difference]: Without dead ends: 134 [2018-10-22 16:06:52,586 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 440 GetRequests, 378 SyntacticMatches, 30 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 462 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-10-22 16:06:52,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-10-22 16:06:52,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 94. [2018-10-22 16:06:52,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-10-22 16:06:52,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 101 transitions. [2018-10-22 16:06:52,597 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 101 transitions. Word has length 104 [2018-10-22 16:06:52,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:52,597 INFO L481 AbstractCegarLoop]: Abstraction has 94 states and 101 transitions. [2018-10-22 16:06:52,598 INFO L482 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-10-22 16:06:52,598 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 101 transitions. [2018-10-22 16:06:52,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-10-22 16:06:52,599 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:52,599 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:52,599 INFO L424 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:52,600 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:52,600 INFO L82 PathProgramCache]: Analyzing trace with hash 490903401, now seen corresponding path program 10 times [2018-10-22 16:06:52,600 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:52,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:52,601 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:06:52,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:52,601 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:52,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:52,911 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 121 proven. 145 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-10-22 16:06:52,911 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:52,911 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:52,911 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:52,911 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:52,911 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:52,911 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:52,919 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:06:52,919 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:06:52,954 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:06:52,954 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:52,956 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:53,015 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:06:53,016 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:53,232 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:06:53,252 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:53,253 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:53,269 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:06:53,269 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:06:53,355 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:06:53,355 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:53,361 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:53,379 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:06:53,379 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:53,565 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 122 proven. 126 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:06:53,567 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:53,567 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 13, 13, 13] total 18 [2018-10-22 16:06:53,567 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:53,567 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-22 16:06:53,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-22 16:06:53,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=224, Unknown=0, NotChecked=0, Total=306 [2018-10-22 16:06:53,568 INFO L87 Difference]: Start difference. First operand 94 states and 101 transitions. Second operand 17 states. [2018-10-22 16:06:53,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:53,786 INFO L93 Difference]: Finished difference Result 115 states and 125 transitions. [2018-10-22 16:06:53,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-22 16:06:53,787 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 107 [2018-10-22 16:06:53,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:53,789 INFO L225 Difference]: With dead ends: 115 [2018-10-22 16:06:53,789 INFO L226 Difference]: Without dead ends: 113 [2018-10-22 16:06:53,790 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 403 SyntacticMatches, 30 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 267 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2018-10-22 16:06:53,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-10-22 16:06:53,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 108. [2018-10-22 16:06:53,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-10-22 16:06:53,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 116 transitions. [2018-10-22 16:06:53,798 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 116 transitions. Word has length 107 [2018-10-22 16:06:53,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:53,799 INFO L481 AbstractCegarLoop]: Abstraction has 108 states and 116 transitions. [2018-10-22 16:06:53,799 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-22 16:06:53,799 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 116 transitions. [2018-10-22 16:06:53,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-10-22 16:06:53,800 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:53,800 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:53,801 INFO L424 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:53,801 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:53,801 INFO L82 PathProgramCache]: Analyzing trace with hash -1091747383, now seen corresponding path program 11 times [2018-10-22 16:06:53,801 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:53,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:53,802 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:06:53,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:53,802 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:53,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:54,064 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 225 proven. 108 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:54,064 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:54,064 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:54,064 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:54,064 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:54,064 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:54,065 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:54,073 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:06:54,074 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:06:54,120 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-10-22 16:06:54,120 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:54,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:54,438 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 225 proven. 108 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:54,438 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:54,826 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 225 proven. 108 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:54,846 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:54,847 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:54,862 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:06:54,862 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:06:55,040 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-10-22 16:06:55,040 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:55,045 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:55,065 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 252 proven. 108 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2018-10-22 16:06:55,065 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:55,287 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 222 proven. 108 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2018-10-22 16:06:55,289 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:55,289 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 20, 20] total 33 [2018-10-22 16:06:55,289 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:55,290 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-10-22 16:06:55,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-10-22 16:06:55,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=273, Invalid=783, Unknown=0, NotChecked=0, Total=1056 [2018-10-22 16:06:55,291 INFO L87 Difference]: Start difference. First operand 108 states and 116 transitions. Second operand 31 states. [2018-10-22 16:06:55,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:55,739 INFO L93 Difference]: Finished difference Result 215 states and 250 transitions. [2018-10-22 16:06:55,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-22 16:06:55,740 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 125 [2018-10-22 16:06:55,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:55,742 INFO L225 Difference]: With dead ends: 215 [2018-10-22 16:06:55,742 INFO L226 Difference]: Without dead ends: 156 [2018-10-22 16:06:55,743 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 528 GetRequests, 455 SyntacticMatches, 33 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 767 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=480, Invalid=1242, Unknown=0, NotChecked=0, Total=1722 [2018-10-22 16:06:55,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-10-22 16:06:55,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 111. [2018-10-22 16:06:55,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-10-22 16:06:55,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 119 transitions. [2018-10-22 16:06:55,752 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 119 transitions. Word has length 125 [2018-10-22 16:06:55,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:55,752 INFO L481 AbstractCegarLoop]: Abstraction has 111 states and 119 transitions. [2018-10-22 16:06:55,752 INFO L482 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-10-22 16:06:55,753 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 119 transitions. [2018-10-22 16:06:55,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-10-22 16:06:55,754 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:55,754 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:55,754 INFO L424 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:55,755 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:55,755 INFO L82 PathProgramCache]: Analyzing trace with hash 1980489325, now seen corresponding path program 12 times [2018-10-22 16:06:55,755 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:55,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:55,756 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:06:55,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:55,756 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:55,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:56,111 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:56,112 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:56,112 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:56,112 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:56,112 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:56,112 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:56,112 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:56,120 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:06:56,120 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:06:56,174 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-10-22 16:06:56,175 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:56,178 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:56,448 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:56,449 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:56,705 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:56,725 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:56,726 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:56,741 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:06:56,741 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:06:56,933 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-10-22 16:06:56,933 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:06:56,939 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:56,967 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:56,967 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:58,070 INFO L134 CoverageAnalysis]: Checked inductivity of 504 backedges. 225 proven. 135 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:58,071 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:58,071 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 32 [2018-10-22 16:06:58,071 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:58,072 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-10-22 16:06:58,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-10-22 16:06:58,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=251, Invalid=741, Unknown=0, NotChecked=0, Total=992 [2018-10-22 16:06:58,073 INFO L87 Difference]: Start difference. First operand 111 states and 119 transitions. Second operand 32 states. [2018-10-22 16:06:58,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:58,507 INFO L93 Difference]: Finished difference Result 221 states and 259 transitions. [2018-10-22 16:06:58,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-10-22 16:06:58,507 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 128 [2018-10-22 16:06:58,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:58,509 INFO L225 Difference]: With dead ends: 221 [2018-10-22 16:06:58,509 INFO L226 Difference]: Without dead ends: 164 [2018-10-22 16:06:58,510 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 542 GetRequests, 464 SyntacticMatches, 38 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 747 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-10-22 16:06:58,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-10-22 16:06:58,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 114. [2018-10-22 16:06:58,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-10-22 16:06:58,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 122 transitions. [2018-10-22 16:06:58,519 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 122 transitions. Word has length 128 [2018-10-22 16:06:58,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:58,519 INFO L481 AbstractCegarLoop]: Abstraction has 114 states and 122 transitions. [2018-10-22 16:06:58,519 INFO L482 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-10-22 16:06:58,520 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 122 transitions. [2018-10-22 16:06:58,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-10-22 16:06:58,520 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:58,521 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:58,521 INFO L424 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:58,521 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:58,521 INFO L82 PathProgramCache]: Analyzing trace with hash 1231179593, now seen corresponding path program 13 times [2018-10-22 16:06:58,521 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:58,522 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:58,522 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:06:58,522 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:58,522 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:58,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:58,897 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 182 proven. 232 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-10-22 16:06:58,897 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:58,897 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:06:58,897 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:06:58,898 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:06:58,898 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:58,898 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:06:58,910 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:58,910 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:06:58,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:58,949 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:59,008 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:59,008 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:59,128 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:59,149 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:06:59,149 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:06:59,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:59,164 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:06:59,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:06:59,259 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:06:59,281 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:59,281 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:06:59,416 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 183 proven. 207 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:06:59,418 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:06:59,418 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15, 15, 15] total 19 [2018-10-22 16:06:59,418 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:06:59,419 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-22 16:06:59,419 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-22 16:06:59,419 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=239, Unknown=0, NotChecked=0, Total=342 [2018-10-22 16:06:59,419 INFO L87 Difference]: Start difference. First operand 114 states and 122 transitions. Second operand 18 states. [2018-10-22 16:06:59,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:06:59,589 INFO L93 Difference]: Finished difference Result 130 states and 139 transitions. [2018-10-22 16:06:59,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-22 16:06:59,589 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 131 [2018-10-22 16:06:59,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:06:59,591 INFO L225 Difference]: With dead ends: 130 [2018-10-22 16:06:59,592 INFO L226 Difference]: Without dead ends: 128 [2018-10-22 16:06:59,592 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 551 GetRequests, 494 SyntacticMatches, 38 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 352 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=116, Invalid=304, Unknown=0, NotChecked=0, Total=420 [2018-10-22 16:06:59,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-10-22 16:06:59,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-10-22 16:06:59,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-22 16:06:59,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-10-22 16:06:59,601 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 131 [2018-10-22 16:06:59,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:06:59,601 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-10-22 16:06:59,601 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-22 16:06:59,602 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-10-22 16:06:59,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-10-22 16:06:59,603 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:06:59,603 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:06:59,603 INFO L424 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:06:59,603 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:06:59,603 INFO L82 PathProgramCache]: Analyzing trace with hash -2109554263, now seen corresponding path program 14 times [2018-10-22 16:06:59,604 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:06:59,604 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:59,604 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:06:59,604 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:06:59,605 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:06:59,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:00,326 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 330 proven. 165 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:07:00,327 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:00,327 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:00,327 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:00,327 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:00,327 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:00,327 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:00,335 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:00,335 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:00,381 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:00,381 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:00,384 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:00,700 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 365 proven. 165 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2018-10-22 16:07:00,700 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:01,314 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 327 proven. 165 refuted. 0 times theorem prover too weak. 223 trivial. 0 not checked. [2018-10-22 16:07:01,334 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:01,334 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:01,350 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:01,350 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:01,459 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:01,459 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:01,466 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:01,505 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 365 proven. 165 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2018-10-22 16:07:01,506 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:01,911 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 327 proven. 165 refuted. 0 times theorem prover too weak. 223 trivial. 0 not checked. [2018-10-22 16:07:01,913 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:01,913 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 24, 24, 24, 24] total 36 [2018-10-22 16:07:01,913 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:01,913 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-10-22 16:07:01,914 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-10-22 16:07:01,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=311, Invalid=949, Unknown=0, NotChecked=0, Total=1260 [2018-10-22 16:07:01,914 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 36 states. [2018-10-22 16:07:02,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:02,667 INFO L93 Difference]: Finished difference Result 255 states and 297 transitions. [2018-10-22 16:07:02,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-10-22 16:07:02,668 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 149 [2018-10-22 16:07:02,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:02,670 INFO L225 Difference]: With dead ends: 255 [2018-10-22 16:07:02,670 INFO L226 Difference]: Without dead ends: 186 [2018-10-22 16:07:02,672 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 630 GetRequests, 543 SyntacticMatches, 42 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 965 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=586, Invalid=1576, Unknown=0, NotChecked=0, Total=2162 [2018-10-22 16:07:02,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-10-22 16:07:02,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 131. [2018-10-22 16:07:02,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-10-22 16:07:02,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 140 transitions. [2018-10-22 16:07:02,682 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 140 transitions. Word has length 149 [2018-10-22 16:07:02,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:02,682 INFO L481 AbstractCegarLoop]: Abstraction has 131 states and 140 transitions. [2018-10-22 16:07:02,682 INFO L482 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-10-22 16:07:02,682 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 140 transitions. [2018-10-22 16:07:02,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-10-22 16:07:02,683 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:02,683 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:02,684 INFO L424 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:02,684 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:02,684 INFO L82 PathProgramCache]: Analyzing trace with hash 1564389965, now seen corresponding path program 15 times [2018-10-22 16:07:02,684 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:02,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:02,685 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:02,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:02,685 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:02,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:03,012 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:07:03,012 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:03,012 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:03,012 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:03,012 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:03,012 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:03,012 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:03,020 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:03,020 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:03,084 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-10-22 16:07:03,084 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:03,088 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:03,560 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:07:03,560 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:03,795 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:07:03,816 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:03,816 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:03,831 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:03,831 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:04,083 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-10-22 16:07:04,084 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:04,091 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:04,126 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:07:04,126 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:04,346 INFO L134 CoverageAnalysis]: Checked inductivity of 748 backedges. 330 proven. 198 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:07:04,348 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:04,348 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 38 [2018-10-22 16:07:04,348 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:04,349 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-10-22 16:07:04,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-10-22 16:07:04,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=349, Invalid=1057, Unknown=0, NotChecked=0, Total=1406 [2018-10-22 16:07:04,350 INFO L87 Difference]: Start difference. First operand 131 states and 140 transitions. Second operand 38 states. [2018-10-22 16:07:04,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:04,910 INFO L93 Difference]: Finished difference Result 261 states and 306 transitions. [2018-10-22 16:07:04,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-10-22 16:07:04,910 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 152 [2018-10-22 16:07:04,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:04,912 INFO L225 Difference]: With dead ends: 261 [2018-10-22 16:07:04,912 INFO L226 Difference]: Without dead ends: 194 [2018-10-22 16:07:04,913 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 644 GetRequests, 550 SyntacticMatches, 46 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1100 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-10-22 16:07:04,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-10-22 16:07:04,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 134. [2018-10-22 16:07:04,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-10-22 16:07:04,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 143 transitions. [2018-10-22 16:07:04,923 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 143 transitions. Word has length 152 [2018-10-22 16:07:04,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:04,923 INFO L481 AbstractCegarLoop]: Abstraction has 134 states and 143 transitions. [2018-10-22 16:07:04,924 INFO L482 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-10-22 16:07:04,924 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 143 transitions. [2018-10-22 16:07:04,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-10-22 16:07:04,925 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:04,925 INFO L375 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:04,925 INFO L424 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:04,925 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:04,926 INFO L82 PathProgramCache]: Analyzing trace with hash -909684951, now seen corresponding path program 16 times [2018-10-22 16:07:04,926 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:04,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:04,927 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:04,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:04,927 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:04,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:05,463 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 255 proven. 339 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-10-22 16:07:05,463 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:05,463 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:05,464 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:05,464 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:05,464 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:05,464 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:05,472 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:05,472 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:05,539 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:05,539 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:05,544 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:06,470 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:07:06,470 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:06,845 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:07:06,866 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:06,866 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:06,884 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:06,884 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:07,010 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:07,010 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:07,017 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:07,042 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:07:07,043 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:07,219 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 256 proven. 308 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:07:07,221 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:07,221 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 17, 17, 17] total 22 [2018-10-22 16:07:07,221 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:07,222 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-10-22 16:07:07,222 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-10-22 16:07:07,222 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=326, Unknown=0, NotChecked=0, Total=462 [2018-10-22 16:07:07,223 INFO L87 Difference]: Start difference. First operand 134 states and 143 transitions. Second operand 21 states. [2018-10-22 16:07:07,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:07,760 INFO L93 Difference]: Finished difference Result 155 states and 167 transitions. [2018-10-22 16:07:07,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-22 16:07:07,760 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 155 [2018-10-22 16:07:07,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:07,762 INFO L225 Difference]: With dead ends: 155 [2018-10-22 16:07:07,763 INFO L226 Difference]: Without dead ends: 153 [2018-10-22 16:07:07,763 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 651 GetRequests, 583 SyntacticMatches, 46 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 491 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=149, Invalid=403, Unknown=0, NotChecked=0, Total=552 [2018-10-22 16:07:07,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-10-22 16:07:07,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 148. [2018-10-22 16:07:07,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-10-22 16:07:07,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 158 transitions. [2018-10-22 16:07:07,775 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 158 transitions. Word has length 155 [2018-10-22 16:07:07,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:07,775 INFO L481 AbstractCegarLoop]: Abstraction has 148 states and 158 transitions. [2018-10-22 16:07:07,776 INFO L482 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-10-22 16:07:07,776 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 158 transitions. [2018-10-22 16:07:07,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-10-22 16:07:07,777 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:07,777 INFO L375 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 13, 13, 13, 13, 13, 13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:07,778 INFO L424 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:07,778 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:07,778 INFO L82 PathProgramCache]: Analyzing trace with hash -568620663, now seen corresponding path program 17 times [2018-10-22 16:07:07,778 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:07,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:07,779 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:07,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:07,779 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:07,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:08,400 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:08,400 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:08,400 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:08,400 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:08,400 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:08,400 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:08,401 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:08,408 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:08,409 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:08,487 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-10-22 16:07:08,487 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:08,492 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:09,071 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:09,071 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:09,373 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:09,394 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:09,394 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:09,409 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:09,409 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:09,708 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-10-22 16:07:09,708 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:09,715 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:09,760 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:09,761 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:10,045 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 455 proven. 234 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:10,054 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:10,054 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 45 [2018-10-22 16:07:10,054 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:10,055 INFO L460 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-10-22 16:07:10,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-10-22 16:07:10,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=493, Invalid=1487, Unknown=0, NotChecked=0, Total=1980 [2018-10-22 16:07:10,056 INFO L87 Difference]: Start difference. First operand 148 states and 158 transitions. Second operand 43 states. [2018-10-22 16:07:10,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:10,817 INFO L93 Difference]: Finished difference Result 295 states and 344 transitions. [2018-10-22 16:07:10,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-10-22 16:07:10,818 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 173 [2018-10-22 16:07:10,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:10,819 INFO L225 Difference]: With dead ends: 295 [2018-10-22 16:07:10,819 INFO L226 Difference]: Without dead ends: 216 [2018-10-22 16:07:10,821 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 732 GetRequests, 628 SyntacticMatches, 48 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1540 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=896, Invalid=2410, Unknown=0, NotChecked=0, Total=3306 [2018-10-22 16:07:10,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-10-22 16:07:10,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 151. [2018-10-22 16:07:10,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-10-22 16:07:10,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 161 transitions. [2018-10-22 16:07:10,831 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 161 transitions. Word has length 173 [2018-10-22 16:07:10,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:10,831 INFO L481 AbstractCegarLoop]: Abstraction has 151 states and 161 transitions. [2018-10-22 16:07:10,831 INFO L482 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-10-22 16:07:10,831 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 161 transitions. [2018-10-22 16:07:10,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-10-22 16:07:10,832 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:10,832 INFO L375 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 14, 14, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:10,833 INFO L424 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:10,833 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:10,833 INFO L82 PathProgramCache]: Analyzing trace with hash 792251949, now seen corresponding path program 18 times [2018-10-22 16:07:10,833 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:10,834 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:10,834 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:10,834 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:10,834 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:10,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:11,249 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:11,250 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:11,250 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:11,250 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:11,250 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:11,250 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:11,250 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:11,257 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:07:11,257 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:07:11,332 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-10-22 16:07:11,333 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:11,337 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:11,817 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:11,818 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:12,103 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:12,124 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:12,124 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:12,140 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:07:12,141 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:07:12,498 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-10-22 16:07:12,498 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:12,508 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:12,591 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:12,592 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:13,068 INFO L134 CoverageAnalysis]: Checked inductivity of 1040 backedges. 455 proven. 273 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:13,070 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:13,070 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 44 [2018-10-22 16:07:13,070 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:13,071 INFO L460 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-10-22 16:07:13,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-10-22 16:07:13,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=463, Invalid=1429, Unknown=0, NotChecked=0, Total=1892 [2018-10-22 16:07:13,073 INFO L87 Difference]: Start difference. First operand 151 states and 161 transitions. Second operand 44 states. [2018-10-22 16:07:14,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:14,127 INFO L93 Difference]: Finished difference Result 301 states and 353 transitions. [2018-10-22 16:07:14,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-10-22 16:07:14,127 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 176 [2018-10-22 16:07:14,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:14,129 INFO L225 Difference]: With dead ends: 301 [2018-10-22 16:07:14,129 INFO L226 Difference]: Without dead ends: 224 [2018-10-22 16:07:14,130 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 746 GetRequests, 636 SyntacticMatches, 54 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1521 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=897, Invalid=2409, Unknown=0, NotChecked=0, Total=3306 [2018-10-22 16:07:14,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-10-22 16:07:14,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 154. [2018-10-22 16:07:14,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:07:14,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 164 transitions. [2018-10-22 16:07:14,139 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 164 transitions. Word has length 176 [2018-10-22 16:07:14,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:14,140 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 164 transitions. [2018-10-22 16:07:14,140 INFO L482 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-10-22 16:07:14,140 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 164 transitions. [2018-10-22 16:07:14,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2018-10-22 16:07:14,141 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:14,141 INFO L375 BasicCegarLoop]: trace histogram [15, 15, 14, 14, 14, 14, 14, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:14,142 INFO L424 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:14,142 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:14,142 INFO L82 PathProgramCache]: Analyzing trace with hash -1943038199, now seen corresponding path program 19 times [2018-10-22 16:07:14,142 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:14,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:14,143 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:14,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:14,143 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:14,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:14,499 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 340 proven. 466 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-10-22 16:07:14,500 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:14,500 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:14,500 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:14,500 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:14,500 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:14,500 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:14,507 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:14,507 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:14,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:14,564 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:14,631 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:14,632 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:14,897 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:14,918 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:14,918 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:14,933 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:14,934 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:15,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:15,056 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:15,092 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:15,092 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:15,712 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 341 proven. 429 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2018-10-22 16:07:15,713 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:15,713 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19, 19, 19] total 23 [2018-10-22 16:07:15,713 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:15,714 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-10-22 16:07:15,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-10-22 16:07:15,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=341, Unknown=0, NotChecked=0, Total=506 [2018-10-22 16:07:15,715 INFO L87 Difference]: Start difference. First operand 154 states and 164 transitions. Second operand 22 states. [2018-10-22 16:07:15,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:15,928 INFO L93 Difference]: Finished difference Result 170 states and 181 transitions. [2018-10-22 16:07:15,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-10-22 16:07:15,931 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 179 [2018-10-22 16:07:15,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:15,932 INFO L225 Difference]: With dead ends: 170 [2018-10-22 16:07:15,932 INFO L226 Difference]: Without dead ends: 168 [2018-10-22 16:07:15,933 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 751 GetRequests, 674 SyntacticMatches, 54 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 604 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=178, Invalid=422, Unknown=0, NotChecked=0, Total=600 [2018-10-22 16:07:15,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-10-22 16:07:15,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2018-10-22 16:07:15,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-10-22 16:07:15,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 179 transitions. [2018-10-22 16:07:15,944 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 179 transitions. Word has length 179 [2018-10-22 16:07:15,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:15,944 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 179 transitions. [2018-10-22 16:07:15,945 INFO L482 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-10-22 16:07:15,945 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 179 transitions. [2018-10-22 16:07:15,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-10-22 16:07:15,946 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:15,946 INFO L375 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:15,946 INFO L424 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:15,947 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:15,947 INFO L82 PathProgramCache]: Analyzing trace with hash 213227881, now seen corresponding path program 20 times [2018-10-22 16:07:15,947 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:15,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:15,948 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:15,948 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:15,948 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:15,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:16,676 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 600 proven. 315 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-10-22 16:07:16,677 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:16,677 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:16,677 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:16,677 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:16,677 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:16,677 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:16,684 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:16,684 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:16,761 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:16,761 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:16,765 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:17,302 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 651 proven. 315 refuted. 0 times theorem prover too weak. 369 trivial. 0 not checked. [2018-10-22 16:07:17,302 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:17,823 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 597 proven. 315 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2018-10-22 16:07:17,844 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:17,844 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:17,859 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:17,859 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:18,009 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:18,010 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:18,020 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:18,083 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 651 proven. 315 refuted. 0 times theorem prover too weak. 369 trivial. 0 not checked. [2018-10-22 16:07:18,083 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:18,641 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 597 proven. 315 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2018-10-22 16:07:18,643 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:18,643 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 32, 32, 32, 32] total 48 [2018-10-22 16:07:18,643 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:18,644 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-10-22 16:07:18,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-10-22 16:07:18,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=543, Invalid=1713, Unknown=0, NotChecked=0, Total=2256 [2018-10-22 16:07:18,646 INFO L87 Difference]: Start difference. First operand 168 states and 179 transitions. Second operand 48 states. [2018-10-22 16:07:20,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:20,104 INFO L93 Difference]: Finished difference Result 335 states and 391 transitions. [2018-10-22 16:07:20,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-10-22 16:07:20,104 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 197 [2018-10-22 16:07:20,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:20,107 INFO L225 Difference]: With dead ends: 335 [2018-10-22 16:07:20,107 INFO L226 Difference]: Without dead ends: 246 [2018-10-22 16:07:20,109 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 834 GetRequests, 715 SyntacticMatches, 58 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1827 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1038, Invalid=2868, Unknown=0, NotChecked=0, Total=3906 [2018-10-22 16:07:20,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-10-22 16:07:20,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 171. [2018-10-22 16:07:20,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-10-22 16:07:20,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 182 transitions. [2018-10-22 16:07:20,121 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 182 transitions. Word has length 197 [2018-10-22 16:07:20,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:20,122 INFO L481 AbstractCegarLoop]: Abstraction has 171 states and 182 transitions. [2018-10-22 16:07:20,122 INFO L482 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-10-22 16:07:20,122 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 182 transitions. [2018-10-22 16:07:20,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-10-22 16:07:20,123 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:20,123 INFO L375 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:20,124 INFO L424 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:20,124 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:20,124 INFO L82 PathProgramCache]: Analyzing trace with hash -1707593203, now seen corresponding path program 21 times [2018-10-22 16:07:20,124 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:20,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:20,125 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:20,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:20,125 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:20,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:21,062 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-10-22 16:07:21,062 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:21,062 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:21,062 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:21,062 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:21,062 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:21,062 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:21,069 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:21,070 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:21,143 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-10-22 16:07:21,143 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:21,148 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:21,662 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-10-22 16:07:21,663 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:22,047 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-10-22 16:07:22,068 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:22,068 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:22,083 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:22,083 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:22,485 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-10-22 16:07:22,485 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:22,494 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:22,535 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-10-22 16:07:22,536 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:22,909 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 600 proven. 360 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-10-22 16:07:22,910 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:22,911 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 50 [2018-10-22 16:07:22,911 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:22,911 INFO L460 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-10-22 16:07:22,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-10-22 16:07:22,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=593, Invalid=1857, Unknown=0, NotChecked=0, Total=2450 [2018-10-22 16:07:22,912 INFO L87 Difference]: Start difference. First operand 171 states and 182 transitions. Second operand 50 states. [2018-10-22 16:07:24,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:24,403 INFO L93 Difference]: Finished difference Result 341 states and 400 transitions. [2018-10-22 16:07:24,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-10-22 16:07:24,403 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 200 [2018-10-22 16:07:24,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:24,405 INFO L225 Difference]: With dead ends: 341 [2018-10-22 16:07:24,405 INFO L226 Difference]: Without dead ends: 254 [2018-10-22 16:07:24,407 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 848 GetRequests, 722 SyntacticMatches, 62 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2010 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1153, Invalid=3137, Unknown=0, NotChecked=0, Total=4290 [2018-10-22 16:07:24,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-10-22 16:07:24,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 174. [2018-10-22 16:07:24,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-10-22 16:07:24,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 185 transitions. [2018-10-22 16:07:24,420 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 185 transitions. Word has length 200 [2018-10-22 16:07:24,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:24,420 INFO L481 AbstractCegarLoop]: Abstraction has 174 states and 185 transitions. [2018-10-22 16:07:24,420 INFO L482 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-10-22 16:07:24,420 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 185 transitions. [2018-10-22 16:07:24,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-10-22 16:07:24,422 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:24,422 INFO L375 BasicCegarLoop]: trace histogram [17, 17, 16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:24,422 INFO L424 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:24,422 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:24,422 INFO L82 PathProgramCache]: Analyzing trace with hash 1255745257, now seen corresponding path program 22 times [2018-10-22 16:07:24,422 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:24,423 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:24,423 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:24,423 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:24,423 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:24,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:25,590 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 437 proven. 613 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-10-22 16:07:25,590 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:25,590 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:25,590 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:25,590 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:25,590 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:25,590 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:25,599 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:25,599 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:25,665 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:25,665 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:25,669 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:25,836 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-10-22 16:07:25,836 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:26,139 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-10-22 16:07:26,160 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:26,161 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:26,175 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:26,175 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:26,335 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:26,336 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:26,344 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:26,385 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-10-22 16:07:26,385 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:26,721 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 438 proven. 570 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-10-22 16:07:26,722 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:26,723 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 21, 21, 21] total 26 [2018-10-22 16:07:26,723 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:26,723 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-10-22 16:07:26,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-10-22 16:07:26,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=444, Unknown=0, NotChecked=0, Total=650 [2018-10-22 16:07:26,724 INFO L87 Difference]: Start difference. First operand 174 states and 185 transitions. Second operand 25 states. [2018-10-22 16:07:27,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:27,260 INFO L93 Difference]: Finished difference Result 195 states and 209 transitions. [2018-10-22 16:07:27,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-10-22 16:07:27,261 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 203 [2018-10-22 16:07:27,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:27,263 INFO L225 Difference]: With dead ends: 195 [2018-10-22 16:07:27,264 INFO L226 Difference]: Without dead ends: 193 [2018-10-22 16:07:27,264 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 851 GetRequests, 763 SyntacticMatches, 62 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 779 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=219, Invalid=537, Unknown=0, NotChecked=0, Total=756 [2018-10-22 16:07:27,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-10-22 16:07:27,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 188. [2018-10-22 16:07:27,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-10-22 16:07:27,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 200 transitions. [2018-10-22 16:07:27,275 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 200 transitions. Word has length 203 [2018-10-22 16:07:27,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:27,276 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 200 transitions. [2018-10-22 16:07:27,276 INFO L482 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-10-22 16:07:27,276 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 200 transitions. [2018-10-22 16:07:27,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2018-10-22 16:07:27,277 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:27,278 INFO L375 BasicCegarLoop]: trace histogram [18, 18, 18, 18, 17, 17, 17, 17, 17, 17, 17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:27,278 INFO L424 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:27,278 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:27,278 INFO L82 PathProgramCache]: Analyzing trace with hash -187764407, now seen corresponding path program 23 times [2018-10-22 16:07:27,278 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:27,279 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:27,279 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:27,279 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:27,279 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:27,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:27,842 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:27,843 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:27,843 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:27,843 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:27,843 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:27,843 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:27,843 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:27,851 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:27,851 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:27,937 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-10-22 16:07:27,937 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:27,941 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:29,000 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:29,000 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:29,532 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:29,553 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:29,553 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:29,569 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:29,569 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:30,032 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-10-22 16:07:30,032 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:30,041 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:30,091 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:30,091 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:30,523 INFO L134 CoverageAnalysis]: Checked inductivity of 1717 backedges. 765 proven. 408 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:30,525 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:30,525 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 57 [2018-10-22 16:07:30,525 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:30,526 INFO L460 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-10-22 16:07:30,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-10-22 16:07:30,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=777, Invalid=2415, Unknown=0, NotChecked=0, Total=3192 [2018-10-22 16:07:30,528 INFO L87 Difference]: Start difference. First operand 188 states and 200 transitions. Second operand 55 states. [2018-10-22 16:07:31,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:31,557 INFO L93 Difference]: Finished difference Result 375 states and 438 transitions. [2018-10-22 16:07:31,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-10-22 16:07:31,557 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 221 [2018-10-22 16:07:31,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:31,559 INFO L225 Difference]: With dead ends: 375 [2018-10-22 16:07:31,559 INFO L226 Difference]: Without dead ends: 276 [2018-10-22 16:07:31,562 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 936 GetRequests, 800 SyntacticMatches, 64 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2594 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1440, Invalid=3962, Unknown=0, NotChecked=0, Total=5402 [2018-10-22 16:07:31,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2018-10-22 16:07:31,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 191. [2018-10-22 16:07:31,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-10-22 16:07:31,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 203 transitions. [2018-10-22 16:07:31,576 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 203 transitions. Word has length 221 [2018-10-22 16:07:31,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:31,576 INFO L481 AbstractCegarLoop]: Abstraction has 191 states and 203 transitions. [2018-10-22 16:07:31,576 INFO L482 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-10-22 16:07:31,576 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 203 transitions. [2018-10-22 16:07:31,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2018-10-22 16:07:31,578 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:31,578 INFO L375 BasicCegarLoop]: trace histogram [18, 18, 18, 18, 18, 18, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:31,578 INFO L424 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:31,578 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:31,578 INFO L82 PathProgramCache]: Analyzing trace with hash -117776915, now seen corresponding path program 24 times [2018-10-22 16:07:31,579 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:31,579 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:31,579 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:31,579 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:31,579 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:31,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:32,214 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:32,215 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:32,215 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:32,215 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:32,215 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:32,215 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:32,215 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:32,222 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:07:32,223 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:07:32,313 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 18 check-sat command(s) [2018-10-22 16:07:32,313 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:32,317 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:32,924 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:32,924 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:33,420 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:33,441 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:33,441 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:33,458 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:07:33,459 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:07:33,947 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 18 check-sat command(s) [2018-10-22 16:07:33,947 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:33,955 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:34,039 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:34,039 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:34,575 INFO L134 CoverageAnalysis]: Checked inductivity of 1768 backedges. 765 proven. 459 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:34,577 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:34,577 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 56 [2018-10-22 16:07:34,577 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:34,578 INFO L460 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-10-22 16:07:34,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-10-22 16:07:34,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=739, Invalid=2341, Unknown=0, NotChecked=0, Total=3080 [2018-10-22 16:07:34,580 INFO L87 Difference]: Start difference. First operand 191 states and 203 transitions. Second operand 56 states. [2018-10-22 16:07:36,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:36,434 INFO L93 Difference]: Finished difference Result 381 states and 447 transitions. [2018-10-22 16:07:36,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-10-22 16:07:36,434 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 224 [2018-10-22 16:07:36,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:36,437 INFO L225 Difference]: With dead ends: 381 [2018-10-22 16:07:36,437 INFO L226 Difference]: Without dead ends: 284 [2018-10-22 16:07:36,438 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 950 GetRequests, 808 SyntacticMatches, 70 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2567 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1441, Invalid=3961, Unknown=0, NotChecked=0, Total=5402 [2018-10-22 16:07:36,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284 states. [2018-10-22 16:07:36,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284 to 194. [2018-10-22 16:07:36,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-10-22 16:07:36,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 206 transitions. [2018-10-22 16:07:36,451 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 206 transitions. Word has length 224 [2018-10-22 16:07:36,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:36,452 INFO L481 AbstractCegarLoop]: Abstraction has 194 states and 206 transitions. [2018-10-22 16:07:36,452 INFO L482 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-10-22 16:07:36,452 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 206 transitions. [2018-10-22 16:07:36,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2018-10-22 16:07:36,453 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:36,453 INFO L375 BasicCegarLoop]: trace histogram [19, 19, 18, 18, 18, 18, 18, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:36,454 INFO L424 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:36,454 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:36,454 INFO L82 PathProgramCache]: Analyzing trace with hash 1820458697, now seen corresponding path program 25 times [2018-10-22 16:07:36,454 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:36,455 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:36,455 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:36,455 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:36,455 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:36,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:37,380 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 546 proven. 780 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-10-22 16:07:37,381 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:37,381 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:37,381 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:37,381 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:37,381 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:37,381 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:37,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:37,388 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:37,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:37,460 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:37,564 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:37,565 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:37,958 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:37,993 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:37,993 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:38,018 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:38,018 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:38,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:38,183 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:38,235 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:38,236 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:39,195 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 547 proven. 731 refuted. 0 times theorem prover too weak. 544 trivial. 0 not checked. [2018-10-22 16:07:39,197 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:39,197 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 23, 23, 23] total 27 [2018-10-22 16:07:39,197 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:39,198 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-10-22 16:07:39,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-10-22 16:07:39,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=243, Invalid=459, Unknown=0, NotChecked=0, Total=702 [2018-10-22 16:07:39,198 INFO L87 Difference]: Start difference. First operand 194 states and 206 transitions. Second operand 26 states. [2018-10-22 16:07:39,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:39,498 INFO L93 Difference]: Finished difference Result 210 states and 223 transitions. [2018-10-22 16:07:39,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-10-22 16:07:39,498 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 227 [2018-10-22 16:07:39,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:39,500 INFO L225 Difference]: With dead ends: 210 [2018-10-22 16:07:39,501 INFO L226 Difference]: Without dead ends: 208 [2018-10-22 16:07:39,501 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 951 GetRequests, 854 SyntacticMatches, 70 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 920 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=256, Invalid=556, Unknown=0, NotChecked=0, Total=812 [2018-10-22 16:07:39,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-10-22 16:07:39,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 208. [2018-10-22 16:07:39,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-10-22 16:07:39,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 221 transitions. [2018-10-22 16:07:39,515 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 221 transitions. Word has length 227 [2018-10-22 16:07:39,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:39,515 INFO L481 AbstractCegarLoop]: Abstraction has 208 states and 221 transitions. [2018-10-22 16:07:39,515 INFO L482 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-10-22 16:07:39,516 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 221 transitions. [2018-10-22 16:07:39,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2018-10-22 16:07:39,517 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:39,517 INFO L375 BasicCegarLoop]: trace histogram [20, 20, 20, 20, 19, 19, 19, 19, 19, 19, 19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:39,517 INFO L424 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:39,518 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:39,518 INFO L82 PathProgramCache]: Analyzing trace with hash 161845545, now seen corresponding path program 26 times [2018-10-22 16:07:39,518 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:39,519 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:39,519 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:39,519 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:39,519 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:39,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:40,564 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 950 proven. 513 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-10-22 16:07:40,564 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:40,564 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:40,564 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:40,565 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:40,565 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:40,565 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:40,574 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:40,574 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:40,649 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:40,649 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:40,653 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:41,587 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 1017 proven. 513 refuted. 0 times theorem prover too weak. 617 trivial. 0 not checked. [2018-10-22 16:07:41,587 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:42,635 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 947 proven. 513 refuted. 0 times theorem prover too weak. 687 trivial. 0 not checked. [2018-10-22 16:07:42,656 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:42,656 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:42,671 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:42,671 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:42,834 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:42,834 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:42,843 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:42,901 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 1017 proven. 513 refuted. 0 times theorem prover too weak. 617 trivial. 0 not checked. [2018-10-22 16:07:42,901 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:43,535 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 947 proven. 513 refuted. 0 times theorem prover too weak. 687 trivial. 0 not checked. [2018-10-22 16:07:43,537 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:43,537 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 40, 40, 40, 40] total 60 [2018-10-22 16:07:43,537 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:43,538 INFO L460 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-10-22 16:07:43,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-10-22 16:07:43,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=839, Invalid=2701, Unknown=0, NotChecked=0, Total=3540 [2018-10-22 16:07:43,539 INFO L87 Difference]: Start difference. First operand 208 states and 221 transitions. Second operand 60 states. [2018-10-22 16:07:44,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:44,600 INFO L93 Difference]: Finished difference Result 415 states and 485 transitions. [2018-10-22 16:07:44,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-10-22 16:07:44,600 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 245 [2018-10-22 16:07:44,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:44,602 INFO L225 Difference]: With dead ends: 415 [2018-10-22 16:07:44,602 INFO L226 Difference]: Without dead ends: 306 [2018-10-22 16:07:44,603 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1038 GetRequests, 887 SyntacticMatches, 74 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2961 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=1618, Invalid=4544, Unknown=0, NotChecked=0, Total=6162 [2018-10-22 16:07:44,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-10-22 16:07:44,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 211. [2018-10-22 16:07:44,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-10-22 16:07:44,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 224 transitions. [2018-10-22 16:07:44,618 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 224 transitions. Word has length 245 [2018-10-22 16:07:44,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:44,618 INFO L481 AbstractCegarLoop]: Abstraction has 211 states and 224 transitions. [2018-10-22 16:07:44,618 INFO L482 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-10-22 16:07:44,618 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 224 transitions. [2018-10-22 16:07:44,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2018-10-22 16:07:44,620 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:44,620 INFO L375 BasicCegarLoop]: trace histogram [20, 20, 20, 20, 20, 20, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:44,621 INFO L424 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:44,621 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:44,621 INFO L82 PathProgramCache]: Analyzing trace with hash 851366349, now seen corresponding path program 27 times [2018-10-22 16:07:44,621 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:44,622 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:44,622 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:44,622 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:44,622 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:44,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:45,517 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-10-22 16:07:45,518 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:45,518 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:45,518 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:45,518 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:45,518 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:45,518 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:45,549 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:45,549 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:45,644 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2018-10-22 16:07:45,644 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:45,648 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:46,687 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-10-22 16:07:46,687 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:47,226 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-10-22 16:07:47,246 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:47,246 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:47,262 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:47,263 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:47,842 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2018-10-22 16:07:47,842 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:47,853 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:47,915 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-10-22 16:07:47,915 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:48,476 INFO L134 CoverageAnalysis]: Checked inductivity of 2204 backedges. 950 proven. 570 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-10-22 16:07:48,477 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:48,477 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 62 [2018-10-22 16:07:48,478 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:48,478 INFO L460 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-10-22 16:07:48,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-10-22 16:07:48,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=901, Invalid=2881, Unknown=0, NotChecked=0, Total=3782 [2018-10-22 16:07:48,480 INFO L87 Difference]: Start difference. First operand 211 states and 224 transitions. Second operand 62 states. [2018-10-22 16:07:49,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:49,545 INFO L93 Difference]: Finished difference Result 421 states and 494 transitions. [2018-10-22 16:07:49,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-10-22 16:07:49,546 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 248 [2018-10-22 16:07:49,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:49,547 INFO L225 Difference]: With dead ends: 421 [2018-10-22 16:07:49,547 INFO L226 Difference]: Without dead ends: 314 [2018-10-22 16:07:49,549 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1052 GetRequests, 894 SyntacticMatches, 78 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3192 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=1761, Invalid=4881, Unknown=0, NotChecked=0, Total=6642 [2018-10-22 16:07:49,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-10-22 16:07:49,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 214. [2018-10-22 16:07:49,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-10-22 16:07:49,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 227 transitions. [2018-10-22 16:07:49,564 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 227 transitions. Word has length 248 [2018-10-22 16:07:49,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:49,565 INFO L481 AbstractCegarLoop]: Abstraction has 214 states and 227 transitions. [2018-10-22 16:07:49,565 INFO L482 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-10-22 16:07:49,565 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 227 transitions. [2018-10-22 16:07:49,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2018-10-22 16:07:49,566 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:49,567 INFO L375 BasicCegarLoop]: trace histogram [21, 21, 20, 20, 20, 20, 20, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:49,567 INFO L424 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:49,567 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:49,567 INFO L82 PathProgramCache]: Analyzing trace with hash -462938455, now seen corresponding path program 28 times [2018-10-22 16:07:49,567 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:49,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:49,568 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:49,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:49,568 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:49,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:50,131 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 667 proven. 967 refuted. 0 times theorem prover too weak. 630 trivial. 0 not checked. [2018-10-22 16:07:50,131 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:50,131 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:50,131 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:50,131 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:50,132 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:50,132 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:50,140 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:50,140 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:50,217 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:50,217 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:50,221 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:50,355 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-10-22 16:07:50,355 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:50,824 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-10-22 16:07:50,844 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:50,844 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:50,859 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:50,859 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:51,054 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:51,055 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:51,065 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:51,111 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-10-22 16:07:51,111 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:51,803 INFO L134 CoverageAnalysis]: Checked inductivity of 2264 backedges. 668 proven. 912 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2018-10-22 16:07:51,804 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:51,804 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 25, 25, 25] total 30 [2018-10-22 16:07:51,805 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:51,805 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-10-22 16:07:51,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-10-22 16:07:51,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=292, Invalid=578, Unknown=0, NotChecked=0, Total=870 [2018-10-22 16:07:51,806 INFO L87 Difference]: Start difference. First operand 214 states and 227 transitions. Second operand 29 states. [2018-10-22 16:07:52,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:52,152 INFO L93 Difference]: Finished difference Result 235 states and 251 transitions. [2018-10-22 16:07:52,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-10-22 16:07:52,153 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 251 [2018-10-22 16:07:52,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:52,155 INFO L225 Difference]: With dead ends: 235 [2018-10-22 16:07:52,155 INFO L226 Difference]: Without dead ends: 233 [2018-10-22 16:07:52,156 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1051 GetRequests, 943 SyntacticMatches, 78 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1131 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=305, Invalid=687, Unknown=0, NotChecked=0, Total=992 [2018-10-22 16:07:52,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-10-22 16:07:52,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 228. [2018-10-22 16:07:52,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-10-22 16:07:52,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 242 transitions. [2018-10-22 16:07:52,171 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 242 transitions. Word has length 251 [2018-10-22 16:07:52,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:52,171 INFO L481 AbstractCegarLoop]: Abstraction has 228 states and 242 transitions. [2018-10-22 16:07:52,171 INFO L482 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-10-22 16:07:52,171 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 242 transitions. [2018-10-22 16:07:52,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2018-10-22 16:07:52,173 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:52,173 INFO L375 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 21, 21, 21, 21, 21, 21, 21, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:52,174 INFO L424 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:52,174 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:52,174 INFO L82 PathProgramCache]: Analyzing trace with hash 720861449, now seen corresponding path program 29 times [2018-10-22 16:07:52,174 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:52,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:52,175 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:52,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:52,175 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:52,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:53,193 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1155 proven. 630 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:07:53,194 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:53,194 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:53,194 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:53,194 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:53,194 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:53,194 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:53,204 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:53,204 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:53,307 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-10-22 16:07:53,307 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:53,312 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:54,225 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1155 proven. 630 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:07:54,225 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:55,008 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1155 proven. 630 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:07:55,029 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:55,030 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:55,048 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:55,048 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:55,702 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2018-10-22 16:07:55,702 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:55,712 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:55,782 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1230 proven. 630 refuted. 0 times theorem prover too weak. 765 trivial. 0 not checked. [2018-10-22 16:07:55,783 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:56,773 INFO L134 CoverageAnalysis]: Checked inductivity of 2625 backedges. 1152 proven. 630 refuted. 0 times theorem prover too weak. 843 trivial. 0 not checked. [2018-10-22 16:07:56,774 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:56,775 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45, 45, 44, 44] total 69 [2018-10-22 16:07:56,775 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:56,775 INFO L460 AbstractCegarLoop]: Interpolant automaton has 67 states [2018-10-22 16:07:56,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2018-10-22 16:07:56,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1125, Invalid=3567, Unknown=0, NotChecked=0, Total=4692 [2018-10-22 16:07:56,776 INFO L87 Difference]: Start difference. First operand 228 states and 242 transitions. Second operand 67 states. [2018-10-22 16:07:57,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:57,997 INFO L93 Difference]: Finished difference Result 455 states and 532 transitions. [2018-10-22 16:07:57,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-10-22 16:07:57,997 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 269 [2018-10-22 16:07:57,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:57,999 INFO L225 Difference]: With dead ends: 455 [2018-10-22 16:07:57,999 INFO L226 Difference]: Without dead ends: 336 [2018-10-22 16:07:58,001 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1140 GetRequests, 971 SyntacticMatches, 81 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3941 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=2112, Invalid=5898, Unknown=0, NotChecked=0, Total=8010 [2018-10-22 16:07:58,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states. [2018-10-22 16:07:58,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 231. [2018-10-22 16:07:58,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states. [2018-10-22 16:07:58,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 245 transitions. [2018-10-22 16:07:58,016 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 245 transitions. Word has length 269 [2018-10-22 16:07:58,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:58,016 INFO L481 AbstractCegarLoop]: Abstraction has 231 states and 245 transitions. [2018-10-22 16:07:58,016 INFO L482 AbstractCegarLoop]: Interpolant automaton has 67 states. [2018-10-22 16:07:58,016 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 245 transitions. [2018-10-22 16:07:58,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2018-10-22 16:07:58,018 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:58,018 INFO L375 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:58,018 INFO L424 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:58,018 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:58,018 INFO L82 PathProgramCache]: Analyzing trace with hash -1690169939, now seen corresponding path program 30 times [2018-10-22 16:07:58,018 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:58,019 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:58,019 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:58,019 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:58,019 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:58,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:58,912 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:07:58,912 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:58,913 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:58,913 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:58,913 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:58,913 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:58,913 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:58,921 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:07:58,922 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:07:59,027 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 22 check-sat command(s) [2018-10-22 16:07:59,027 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:59,031 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:59,928 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:07:59,929 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:00,732 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:08:00,752 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:00,753 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:00,768 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:00,768 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:01,453 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 22 check-sat command(s) [2018-10-22 16:08:01,453 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:01,463 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:01,535 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:08:01,535 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:02,283 INFO L134 CoverageAnalysis]: Checked inductivity of 2688 backedges. 1155 proven. 693 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:08:02,285 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:02,285 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46, 46, 46, 46] total 68 [2018-10-22 16:08:02,285 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:02,287 INFO L460 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-10-22 16:08:02,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-10-22 16:08:02,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1079, Invalid=3477, Unknown=0, NotChecked=0, Total=4556 [2018-10-22 16:08:02,288 INFO L87 Difference]: Start difference. First operand 231 states and 245 transitions. Second operand 68 states. [2018-10-22 16:08:03,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:03,467 INFO L93 Difference]: Finished difference Result 461 states and 541 transitions. [2018-10-22 16:08:03,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-10-22 16:08:03,467 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 272 [2018-10-22 16:08:03,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:03,469 INFO L225 Difference]: With dead ends: 461 [2018-10-22 16:08:03,469 INFO L226 Difference]: Without dead ends: 344 [2018-10-22 16:08:03,471 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1154 GetRequests, 980 SyntacticMatches, 86 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3885 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=2113, Invalid=5897, Unknown=0, NotChecked=0, Total=8010 [2018-10-22 16:08:03,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-10-22 16:08:03,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 234. [2018-10-22 16:08:03,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-10-22 16:08:03,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 248 transitions. [2018-10-22 16:08:03,488 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 248 transitions. Word has length 272 [2018-10-22 16:08:03,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:03,488 INFO L481 AbstractCegarLoop]: Abstraction has 234 states and 248 transitions. [2018-10-22 16:08:03,488 INFO L482 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-10-22 16:08:03,488 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 248 transitions. [2018-10-22 16:08:03,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-10-22 16:08:03,490 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:03,490 INFO L375 BasicCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:03,490 INFO L424 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:03,491 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:03,491 INFO L82 PathProgramCache]: Analyzing trace with hash 306808457, now seen corresponding path program 31 times [2018-10-22 16:08:03,491 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:03,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:03,492 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:03,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:03,492 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:03,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:03,950 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 800 proven. 1174 refuted. 0 times theorem prover too weak. 780 trivial. 0 not checked. [2018-10-22 16:08:03,951 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:03,951 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:03,951 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:03,951 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:03,951 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:03,951 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:03,958 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:03,958 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:04,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:04,045 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:04,142 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:08:04,143 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:04,584 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:08:04,606 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:04,606 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:04,621 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:04,621 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:04,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:04,814 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:04,888 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:08:04,888 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:05,366 INFO L134 CoverageAnalysis]: Checked inductivity of 2754 backedges. 801 proven. 1113 refuted. 0 times theorem prover too weak. 840 trivial. 0 not checked. [2018-10-22 16:08:05,367 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:05,368 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 27, 27, 27, 27] total 31 [2018-10-22 16:08:05,368 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:05,368 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-10-22 16:08:05,369 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-10-22 16:08:05,369 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=337, Invalid=593, Unknown=0, NotChecked=0, Total=930 [2018-10-22 16:08:05,369 INFO L87 Difference]: Start difference. First operand 234 states and 248 transitions. Second operand 30 states. [2018-10-22 16:08:05,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:05,712 INFO L93 Difference]: Finished difference Result 250 states and 265 transitions. [2018-10-22 16:08:05,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-10-22 16:08:05,712 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 275 [2018-10-22 16:08:05,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:05,714 INFO L225 Difference]: With dead ends: 250 [2018-10-22 16:08:05,714 INFO L226 Difference]: Without dead ends: 248 [2018-10-22 16:08:05,715 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1151 GetRequests, 1034 SyntacticMatches, 86 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1300 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=350, Invalid=706, Unknown=0, NotChecked=0, Total=1056 [2018-10-22 16:08:05,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-10-22 16:08:05,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248. [2018-10-22 16:08:05,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-10-22 16:08:05,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 263 transitions. [2018-10-22 16:08:05,730 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 263 transitions. Word has length 275 [2018-10-22 16:08:05,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:05,731 INFO L481 AbstractCegarLoop]: Abstraction has 248 states and 263 transitions. [2018-10-22 16:08:05,731 INFO L482 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-10-22 16:08:05,731 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 263 transitions. [2018-10-22 16:08:05,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2018-10-22 16:08:05,733 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:05,733 INFO L375 BasicCegarLoop]: trace histogram [24, 24, 24, 24, 23, 23, 23, 23, 23, 23, 23, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:05,734 INFO L424 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:05,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:05,734 INFO L82 PathProgramCache]: Analyzing trace with hash -2063423255, now seen corresponding path program 32 times [2018-10-22 16:08:05,734 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:05,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:05,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:05,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:05,735 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:05,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:07,474 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1380 proven. 759 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-10-22 16:08:07,474 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:07,474 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:07,474 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:07,475 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:07,475 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:07,475 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:07,483 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:07,483 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:07,572 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:07,572 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:07,576 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:08,533 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1463 proven. 759 refuted. 0 times theorem prover too weak. 929 trivial. 0 not checked. [2018-10-22 16:08:08,533 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:09,245 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1377 proven. 759 refuted. 0 times theorem prover too weak. 1015 trivial. 0 not checked. [2018-10-22 16:08:09,265 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:09,265 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:09,280 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:09,280 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:09,484 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:09,484 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:09,493 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:09,576 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1463 proven. 759 refuted. 0 times theorem prover too weak. 929 trivial. 0 not checked. [2018-10-22 16:08:09,576 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:10,402 INFO L134 CoverageAnalysis]: Checked inductivity of 3151 backedges. 1377 proven. 759 refuted. 0 times theorem prover too weak. 1015 trivial. 0 not checked. [2018-10-22 16:08:10,403 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:10,404 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 48, 48, 48, 48] total 72 [2018-10-22 16:08:10,404 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:10,404 INFO L460 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-10-22 16:08:10,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-10-22 16:08:10,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1199, Invalid=3913, Unknown=0, NotChecked=0, Total=5112 [2018-10-22 16:08:10,405 INFO L87 Difference]: Start difference. First operand 248 states and 263 transitions. Second operand 72 states. [2018-10-22 16:08:11,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:11,731 INFO L93 Difference]: Finished difference Result 495 states and 579 transitions. [2018-10-22 16:08:11,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-10-22 16:08:11,731 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 293 [2018-10-22 16:08:11,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:11,733 INFO L225 Difference]: With dead ends: 495 [2018-10-22 16:08:11,733 INFO L226 Difference]: Without dead ends: 366 [2018-10-22 16:08:11,734 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1242 GetRequests, 1059 SyntacticMatches, 90 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4367 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=2326, Invalid=6604, Unknown=0, NotChecked=0, Total=8930 [2018-10-22 16:08:11,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2018-10-22 16:08:11,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 251. [2018-10-22 16:08:11,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 251 states. [2018-10-22 16:08:11,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 266 transitions. [2018-10-22 16:08:11,751 INFO L78 Accepts]: Start accepts. Automaton has 251 states and 266 transitions. Word has length 293 [2018-10-22 16:08:11,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:11,752 INFO L481 AbstractCegarLoop]: Abstraction has 251 states and 266 transitions. [2018-10-22 16:08:11,752 INFO L482 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-10-22 16:08:11,752 INFO L276 IsEmpty]: Start isEmpty. Operand 251 states and 266 transitions. [2018-10-22 16:08:11,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 297 [2018-10-22 16:08:11,754 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:11,754 INFO L375 BasicCegarLoop]: trace histogram [24, 24, 24, 24, 24, 24, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:11,754 INFO L424 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:11,755 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:11,755 INFO L82 PathProgramCache]: Analyzing trace with hash -759000691, now seen corresponding path program 33 times [2018-10-22 16:08:11,755 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:11,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:11,756 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:11,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:11,756 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:11,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:13,592 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-10-22 16:08:13,592 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:13,592 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:13,592 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:13,593 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:13,593 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:13,593 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:13,600 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:13,600 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:13,722 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-10-22 16:08:13,722 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:13,727 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:14,708 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-10-22 16:08:14,708 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:15,592 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-10-22 16:08:15,613 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:15,613 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:15,646 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:15,646 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:16,453 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-10-22 16:08:16,453 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:16,465 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:16,549 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-10-22 16:08:16,549 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:17,634 INFO L134 CoverageAnalysis]: Checked inductivity of 3220 backedges. 1380 proven. 828 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-10-22 16:08:17,636 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:17,637 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50, 50, 50] total 74 [2018-10-22 16:08:17,637 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:17,637 INFO L460 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-10-22 16:08:17,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-10-22 16:08:17,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1273, Invalid=4129, Unknown=0, NotChecked=0, Total=5402 [2018-10-22 16:08:17,638 INFO L87 Difference]: Start difference. First operand 251 states and 266 transitions. Second operand 74 states. [2018-10-22 16:08:18,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:18,980 INFO L93 Difference]: Finished difference Result 501 states and 588 transitions. [2018-10-22 16:08:18,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-10-22 16:08:18,981 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 296 [2018-10-22 16:08:18,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:18,983 INFO L225 Difference]: With dead ends: 501 [2018-10-22 16:08:18,983 INFO L226 Difference]: Without dead ends: 374 [2018-10-22 16:08:18,984 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1256 GetRequests, 1066 SyntacticMatches, 94 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4646 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=2497, Invalid=7009, Unknown=0, NotChecked=0, Total=9506 [2018-10-22 16:08:18,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states. [2018-10-22 16:08:19,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 254. [2018-10-22 16:08:19,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-10-22 16:08:19,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 269 transitions. [2018-10-22 16:08:19,001 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 269 transitions. Word has length 296 [2018-10-22 16:08:19,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:19,001 INFO L481 AbstractCegarLoop]: Abstraction has 254 states and 269 transitions. [2018-10-22 16:08:19,002 INFO L482 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-10-22 16:08:19,002 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 269 transitions. [2018-10-22 16:08:19,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 300 [2018-10-22 16:08:19,004 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:19,004 INFO L375 BasicCegarLoop]: trace histogram [25, 25, 24, 24, 24, 24, 24, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:19,004 INFO L424 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:19,004 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:19,004 INFO L82 PathProgramCache]: Analyzing trace with hash -1570490775, now seen corresponding path program 34 times [2018-10-22 16:08:19,004 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:19,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:19,005 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:19,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:19,005 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:19,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:19,492 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 945 proven. 1401 refuted. 0 times theorem prover too weak. 946 trivial. 0 not checked. [2018-10-22 16:08:19,492 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:19,492 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:19,492 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:19,493 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:19,493 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:19,493 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:19,500 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:08:19,501 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:08:19,594 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:08:19,595 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:19,599 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:19,736 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-10-22 16:08:19,736 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:20,289 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-10-22 16:08:20,312 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:20,313 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:20,328 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:08:20,328 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:08:20,563 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:08:20,564 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:20,584 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:20,665 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-10-22 16:08:20,666 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:21,231 INFO L134 CoverageAnalysis]: Checked inductivity of 3292 backedges. 946 proven. 1334 refuted. 0 times theorem prover too weak. 1012 trivial. 0 not checked. [2018-10-22 16:08:21,232 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:21,233 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 29, 29, 29] total 34 [2018-10-22 16:08:21,233 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:21,234 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-10-22 16:08:21,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-10-22 16:08:21,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=394, Invalid=728, Unknown=0, NotChecked=0, Total=1122 [2018-10-22 16:08:21,235 INFO L87 Difference]: Start difference. First operand 254 states and 269 transitions. Second operand 33 states. [2018-10-22 16:08:21,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:21,659 INFO L93 Difference]: Finished difference Result 275 states and 293 transitions. [2018-10-22 16:08:21,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-10-22 16:08:21,660 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 299 [2018-10-22 16:08:21,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:21,662 INFO L225 Difference]: With dead ends: 275 [2018-10-22 16:08:21,662 INFO L226 Difference]: Without dead ends: 273 [2018-10-22 16:08:21,663 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1251 GetRequests, 1123 SyntacticMatches, 94 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1547 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=407, Invalid=853, Unknown=0, NotChecked=0, Total=1260 [2018-10-22 16:08:21,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states. [2018-10-22 16:08:21,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 268. [2018-10-22 16:08:21,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 268 states. [2018-10-22 16:08:21,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 284 transitions. [2018-10-22 16:08:21,681 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 284 transitions. Word has length 299 [2018-10-22 16:08:21,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:21,682 INFO L481 AbstractCegarLoop]: Abstraction has 268 states and 284 transitions. [2018-10-22 16:08:21,682 INFO L482 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-10-22 16:08:21,682 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 284 transitions. [2018-10-22 16:08:21,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 318 [2018-10-22 16:08:21,684 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:21,684 INFO L375 BasicCegarLoop]: trace histogram [26, 26, 26, 26, 25, 25, 25, 25, 25, 25, 25, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:21,685 INFO L424 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:21,685 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:21,685 INFO L82 PathProgramCache]: Analyzing trace with hash 1887772873, now seen corresponding path program 35 times [2018-10-22 16:08:21,685 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:21,686 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:21,686 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:21,686 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:21,686 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:21,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:23,859 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1625 proven. 900 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:23,859 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:23,859 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:23,860 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:23,860 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:23,860 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:23,860 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:23,867 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:08:23,867 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:23,996 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2018-10-22 16:08:23,997 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:24,001 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:25,141 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1625 proven. 900 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:25,141 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:26,197 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1625 proven. 900 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:26,218 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:26,218 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:26,233 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:08:26,233 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:27,112 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2018-10-22 16:08:27,113 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:27,124 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:27,248 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1716 proven. 900 refuted. 0 times theorem prover too weak. 1109 trivial. 0 not checked. [2018-10-22 16:08:27,248 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:28,381 INFO L134 CoverageAnalysis]: Checked inductivity of 3725 backedges. 1622 proven. 900 refuted. 0 times theorem prover too weak. 1203 trivial. 0 not checked. [2018-10-22 16:08:28,382 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:28,383 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53, 53, 52, 52] total 81 [2018-10-22 16:08:28,383 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:28,383 INFO L460 AbstractCegarLoop]: Interpolant automaton has 79 states [2018-10-22 16:08:28,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2018-10-22 16:08:28,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1537, Invalid=4943, Unknown=0, NotChecked=0, Total=6480 [2018-10-22 16:08:28,384 INFO L87 Difference]: Start difference. First operand 268 states and 284 transitions. Second operand 79 states. [2018-10-22 16:08:29,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:29,890 INFO L93 Difference]: Finished difference Result 535 states and 626 transitions. [2018-10-22 16:08:29,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-10-22 16:08:29,891 INFO L78 Accepts]: Start accepts. Automaton has 79 states. Word has length 317 [2018-10-22 16:08:29,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:29,892 INFO L225 Difference]: With dead ends: 535 [2018-10-22 16:08:29,892 INFO L226 Difference]: Without dead ends: 396 [2018-10-22 16:08:29,894 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1344 GetRequests, 1143 SyntacticMatches, 97 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5543 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=2912, Invalid=8218, Unknown=0, NotChecked=0, Total=11130 [2018-10-22 16:08:29,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2018-10-22 16:08:29,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 271. [2018-10-22 16:08:29,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 271 states. [2018-10-22 16:08:29,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 287 transitions. [2018-10-22 16:08:29,909 INFO L78 Accepts]: Start accepts. Automaton has 271 states and 287 transitions. Word has length 317 [2018-10-22 16:08:29,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:29,909 INFO L481 AbstractCegarLoop]: Abstraction has 271 states and 287 transitions. [2018-10-22 16:08:29,909 INFO L482 AbstractCegarLoop]: Interpolant automaton has 79 states. [2018-10-22 16:08:29,909 INFO L276 IsEmpty]: Start isEmpty. Operand 271 states and 287 transitions. [2018-10-22 16:08:29,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 321 [2018-10-22 16:08:29,911 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:29,911 INFO L375 BasicCegarLoop]: trace histogram [26, 26, 26, 26, 26, 26, 25, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:29,911 INFO L424 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:29,911 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:29,912 INFO L82 PathProgramCache]: Analyzing trace with hash -1510056595, now seen corresponding path program 36 times [2018-10-22 16:08:29,912 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:29,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:29,912 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:29,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:29,912 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:29,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:31,064 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:31,064 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:31,064 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:31,064 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:31,064 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:31,064 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:31,064 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:31,074 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:31,074 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:31,203 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2018-10-22 16:08:31,204 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:31,209 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:32,717 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:32,717 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:33,646 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:33,667 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:33,667 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:33,681 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:33,682 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:34,618 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2018-10-22 16:08:34,619 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:34,631 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:34,746 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:34,746 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:35,672 INFO L134 CoverageAnalysis]: Checked inductivity of 3800 backedges. 1625 proven. 975 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:35,674 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:35,674 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54, 54, 54, 54] total 80 [2018-10-22 16:08:35,674 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:35,675 INFO L460 AbstractCegarLoop]: Interpolant automaton has 80 states [2018-10-22 16:08:35,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 80 interpolants. [2018-10-22 16:08:35,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1483, Invalid=4837, Unknown=0, NotChecked=0, Total=6320 [2018-10-22 16:08:35,676 INFO L87 Difference]: Start difference. First operand 271 states and 287 transitions. Second operand 80 states. [2018-10-22 16:08:37,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:37,561 INFO L93 Difference]: Finished difference Result 541 states and 635 transitions. [2018-10-22 16:08:37,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-10-22 16:08:37,561 INFO L78 Accepts]: Start accepts. Automaton has 80 states. Word has length 320 [2018-10-22 16:08:37,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:37,563 INFO L225 Difference]: With dead ends: 541 [2018-10-22 16:08:37,563 INFO L226 Difference]: Without dead ends: 404 [2018-10-22 16:08:37,564 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1358 GetRequests, 1152 SyntacticMatches, 102 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5475 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=2913, Invalid=8217, Unknown=0, NotChecked=0, Total=11130 [2018-10-22 16:08:37,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states. [2018-10-22 16:08:37,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 274. [2018-10-22 16:08:37,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 274 states. [2018-10-22 16:08:37,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 274 states to 274 states and 290 transitions. [2018-10-22 16:08:37,583 INFO L78 Accepts]: Start accepts. Automaton has 274 states and 290 transitions. Word has length 320 [2018-10-22 16:08:37,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:37,583 INFO L481 AbstractCegarLoop]: Abstraction has 274 states and 290 transitions. [2018-10-22 16:08:37,583 INFO L482 AbstractCegarLoop]: Interpolant automaton has 80 states. [2018-10-22 16:08:37,584 INFO L276 IsEmpty]: Start isEmpty. Operand 274 states and 290 transitions. [2018-10-22 16:08:37,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324 [2018-10-22 16:08:37,585 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:37,586 INFO L375 BasicCegarLoop]: trace histogram [27, 27, 26, 26, 26, 26, 26, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:37,586 INFO L424 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:37,586 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:37,586 INFO L82 PathProgramCache]: Analyzing trace with hash 1836461641, now seen corresponding path program 37 times [2018-10-22 16:08:37,586 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:37,587 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:37,587 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:37,587 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:37,587 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:37,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:38,138 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1102 proven. 1648 refuted. 0 times theorem prover too weak. 1128 trivial. 0 not checked. [2018-10-22 16:08:38,138 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:38,138 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:38,138 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:38,138 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:38,138 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:38,138 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:38,147 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:38,147 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:38,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:38,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:38,370 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:38,370 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:38,968 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:38,988 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:38,988 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:39,004 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:39,004 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:39,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:39,238 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:39,307 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:39,307 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:39,945 INFO L134 CoverageAnalysis]: Checked inductivity of 3878 backedges. 1103 proven. 1575 refuted. 0 times theorem prover too weak. 1200 trivial. 0 not checked. [2018-10-22 16:08:39,946 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:39,947 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 31, 31, 31, 31] total 35 [2018-10-22 16:08:39,947 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:39,947 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-10-22 16:08:39,947 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-10-22 16:08:39,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=447, Invalid=743, Unknown=0, NotChecked=0, Total=1190 [2018-10-22 16:08:39,948 INFO L87 Difference]: Start difference. First operand 274 states and 290 transitions. Second operand 34 states. [2018-10-22 16:08:40,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:40,343 INFO L93 Difference]: Finished difference Result 290 states and 307 transitions. [2018-10-22 16:08:40,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-10-22 16:08:40,343 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 323 [2018-10-22 16:08:40,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:40,345 INFO L225 Difference]: With dead ends: 290 [2018-10-22 16:08:40,345 INFO L226 Difference]: Without dead ends: 288 [2018-10-22 16:08:40,346 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1351 GetRequests, 1214 SyntacticMatches, 102 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1744 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=460, Invalid=872, Unknown=0, NotChecked=0, Total=1332 [2018-10-22 16:08:40,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-10-22 16:08:40,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 288. [2018-10-22 16:08:40,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-10-22 16:08:40,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 305 transitions. [2018-10-22 16:08:40,360 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 305 transitions. Word has length 323 [2018-10-22 16:08:40,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:40,361 INFO L481 AbstractCegarLoop]: Abstraction has 288 states and 305 transitions. [2018-10-22 16:08:40,361 INFO L482 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-10-22 16:08:40,361 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 305 transitions. [2018-10-22 16:08:40,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2018-10-22 16:08:40,364 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:40,364 INFO L375 BasicCegarLoop]: trace histogram [28, 28, 28, 28, 27, 27, 27, 27, 27, 27, 27, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:40,364 INFO L424 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:40,364 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:40,364 INFO L82 PathProgramCache]: Analyzing trace with hash 1388109993, now seen corresponding path program 38 times [2018-10-22 16:08:40,365 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:40,365 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:40,365 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:40,366 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:40,366 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:40,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:42,091 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1890 proven. 1053 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-10-22 16:08:42,091 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:42,091 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:42,091 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:42,091 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:42,091 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:42,091 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:42,099 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:42,099 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:42,201 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:42,201 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:42,207 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:43,735 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1989 proven. 1053 refuted. 0 times theorem prover too weak. 1305 trivial. 0 not checked. [2018-10-22 16:08:43,735 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:44,716 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1887 proven. 1053 refuted. 0 times theorem prover too weak. 1407 trivial. 0 not checked. [2018-10-22 16:08:44,737 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:44,738 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:44,752 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:44,752 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:44,985 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:44,985 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:45,003 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:45,099 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1989 proven. 1053 refuted. 0 times theorem prover too weak. 1305 trivial. 0 not checked. [2018-10-22 16:08:45,099 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:46,065 INFO L134 CoverageAnalysis]: Checked inductivity of 4347 backedges. 1887 proven. 1053 refuted. 0 times theorem prover too weak. 1407 trivial. 0 not checked. [2018-10-22 16:08:46,066 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:46,067 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 56, 56, 56, 56] total 84 [2018-10-22 16:08:46,067 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:46,067 INFO L460 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-10-22 16:08:46,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-10-22 16:08:46,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1623, Invalid=5349, Unknown=0, NotChecked=0, Total=6972 [2018-10-22 16:08:46,069 INFO L87 Difference]: Start difference. First operand 288 states and 305 transitions. Second operand 84 states. [2018-10-22 16:08:47,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:47,884 INFO L93 Difference]: Finished difference Result 575 states and 673 transitions. [2018-10-22 16:08:47,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-10-22 16:08:47,884 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 341 [2018-10-22 16:08:47,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:47,886 INFO L225 Difference]: With dead ends: 575 [2018-10-22 16:08:47,886 INFO L226 Difference]: Without dead ends: 426 [2018-10-22 16:08:47,888 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1446 GetRequests, 1231 SyntacticMatches, 106 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6045 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=3162, Invalid=9048, Unknown=0, NotChecked=0, Total=12210 [2018-10-22 16:08:47,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2018-10-22 16:08:47,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 291. [2018-10-22 16:08:47,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2018-10-22 16:08:47,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 308 transitions. [2018-10-22 16:08:47,909 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 308 transitions. Word has length 341 [2018-10-22 16:08:47,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:47,909 INFO L481 AbstractCegarLoop]: Abstraction has 291 states and 308 transitions. [2018-10-22 16:08:47,909 INFO L482 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-10-22 16:08:47,909 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 308 transitions. [2018-10-22 16:08:47,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 345 [2018-10-22 16:08:47,911 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:47,912 INFO L375 BasicCegarLoop]: trace histogram [28, 28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:47,912 INFO L424 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:47,912 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:47,912 INFO L82 PathProgramCache]: Analyzing trace with hash -298618547, now seen corresponding path program 39 times [2018-10-22 16:08:47,912 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:47,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:47,913 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:47,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:47,913 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:47,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:49,682 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-10-22 16:08:49,682 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:49,683 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:49,683 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:49,683 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:49,683 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:49,683 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:49,692 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:49,693 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:49,835 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-10-22 16:08:49,836 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:49,842 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:51,179 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-10-22 16:08:51,179 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:52,228 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-10-22 16:08:52,249 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:52,249 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:52,264 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:52,264 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:53,324 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-10-22 16:08:53,324 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:53,345 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:53,457 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-10-22 16:08:53,458 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:54,526 INFO L134 CoverageAnalysis]: Checked inductivity of 4428 backedges. 1890 proven. 1134 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-10-22 16:08:54,527 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:54,528 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58, 58, 58, 58] total 86 [2018-10-22 16:08:54,528 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:54,528 INFO L460 AbstractCegarLoop]: Interpolant automaton has 86 states [2018-10-22 16:08:54,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2018-10-22 16:08:54,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1709, Invalid=5601, Unknown=0, NotChecked=0, Total=7310 [2018-10-22 16:08:54,529 INFO L87 Difference]: Start difference. First operand 291 states and 308 transitions. Second operand 86 states. [2018-10-22 16:08:56,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:56,528 INFO L93 Difference]: Finished difference Result 581 states and 682 transitions. [2018-10-22 16:08:56,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-10-22 16:08:56,528 INFO L78 Accepts]: Start accepts. Automaton has 86 states. Word has length 344 [2018-10-22 16:08:56,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:56,530 INFO L225 Difference]: With dead ends: 581 [2018-10-22 16:08:56,530 INFO L226 Difference]: Without dead ends: 434 [2018-10-22 16:08:56,531 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1460 GetRequests, 1238 SyntacticMatches, 110 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6372 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=3361, Invalid=9521, Unknown=0, NotChecked=0, Total=12882 [2018-10-22 16:08:56,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2018-10-22 16:08:56,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 294. [2018-10-22 16:08:56,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-10-22 16:08:56,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 311 transitions. [2018-10-22 16:08:56,552 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 311 transitions. Word has length 344 [2018-10-22 16:08:56,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:56,552 INFO L481 AbstractCegarLoop]: Abstraction has 294 states and 311 transitions. [2018-10-22 16:08:56,552 INFO L482 AbstractCegarLoop]: Interpolant automaton has 86 states. [2018-10-22 16:08:56,553 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 311 transitions. [2018-10-22 16:08:56,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 348 [2018-10-22 16:08:56,555 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:56,555 INFO L375 BasicCegarLoop]: trace histogram [29, 29, 28, 28, 28, 28, 28, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:56,555 INFO L424 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:56,555 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:56,556 INFO L82 PathProgramCache]: Analyzing trace with hash 1488809513, now seen corresponding path program 40 times [2018-10-22 16:08:56,556 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:56,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:56,556 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:56,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:56,557 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:56,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:57,313 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1271 proven. 1915 refuted. 0 times theorem prover too weak. 1326 trivial. 0 not checked. [2018-10-22 16:08:57,313 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:57,313 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:57,313 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:57,313 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:57,314 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:57,314 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:57,320 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:08:57,320 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:08:57,421 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:08:57,422 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:57,427 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:57,585 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-10-22 16:08:57,586 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:58,563 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-10-22 16:08:58,586 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:58,586 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:58,601 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:08:58,601 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:08:58,883 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:08:58,884 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:58,895 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:58,968 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-10-22 16:08:58,969 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:59,700 INFO L134 CoverageAnalysis]: Checked inductivity of 4512 backedges. 1272 proven. 1836 refuted. 0 times theorem prover too weak. 1404 trivial. 0 not checked. [2018-10-22 16:08:59,702 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:59,702 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 33, 33, 33] total 38 [2018-10-22 16:08:59,702 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:59,703 INFO L460 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-10-22 16:08:59,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-10-22 16:08:59,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=512, Invalid=894, Unknown=0, NotChecked=0, Total=1406 [2018-10-22 16:08:59,704 INFO L87 Difference]: Start difference. First operand 294 states and 311 transitions. Second operand 37 states. [2018-10-22 16:09:00,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:00,184 INFO L93 Difference]: Finished difference Result 315 states and 335 transitions. [2018-10-22 16:09:00,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-10-22 16:09:00,185 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 347 [2018-10-22 16:09:00,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:00,187 INFO L225 Difference]: With dead ends: 315 [2018-10-22 16:09:00,187 INFO L226 Difference]: Without dead ends: 313 [2018-10-22 16:09:00,188 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1451 GetRequests, 1303 SyntacticMatches, 110 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2027 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=525, Invalid=1035, Unknown=0, NotChecked=0, Total=1560 [2018-10-22 16:09:00,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2018-10-22 16:09:00,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 308. [2018-10-22 16:09:00,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2018-10-22 16:09:00,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 326 transitions. [2018-10-22 16:09:00,211 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 326 transitions. Word has length 347 [2018-10-22 16:09:00,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:00,211 INFO L481 AbstractCegarLoop]: Abstraction has 308 states and 326 transitions. [2018-10-22 16:09:00,211 INFO L482 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-10-22 16:09:00,212 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 326 transitions. [2018-10-22 16:09:00,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 366 [2018-10-22 16:09:00,214 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:00,214 INFO L375 BasicCegarLoop]: trace histogram [30, 30, 30, 30, 29, 29, 29, 29, 29, 29, 29, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:00,214 INFO L424 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:00,215 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:00,215 INFO L82 PathProgramCache]: Analyzing trace with hash 2103961737, now seen corresponding path program 41 times [2018-10-22 16:09:00,215 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:00,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:00,216 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:00,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:00,216 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:00,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:01,504 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:01,505 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:01,505 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:01,505 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:01,505 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:01,505 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:01,505 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:01,513 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:09:01,513 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:01,668 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-10-22 16:09:01,668 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:01,674 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:03,448 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:03,448 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:04,656 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:04,678 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:04,679 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:04,694 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:09:04,695 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:05,875 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-10-22 16:09:05,875 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:05,895 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:06,018 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:06,019 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:07,198 INFO L134 CoverageAnalysis]: Checked inductivity of 5017 backedges. 2175 proven. 1218 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:07,199 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:07,200 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61, 61, 61, 61] total 93 [2018-10-22 16:09:07,200 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:07,201 INFO L460 AbstractCegarLoop]: Interpolant automaton has 91 states [2018-10-22 16:09:07,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 91 interpolants. [2018-10-22 16:09:07,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2013, Invalid=6543, Unknown=0, NotChecked=0, Total=8556 [2018-10-22 16:09:07,203 INFO L87 Difference]: Start difference. First operand 308 states and 326 transitions. Second operand 91 states. [2018-10-22 16:09:09,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:09,388 INFO L93 Difference]: Finished difference Result 615 states and 720 transitions. [2018-10-22 16:09:09,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-10-22 16:09:09,389 INFO L78 Accepts]: Start accepts. Automaton has 91 states. Word has length 365 [2018-10-22 16:09:09,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:09,391 INFO L225 Difference]: With dead ends: 615 [2018-10-22 16:09:09,391 INFO L226 Difference]: Without dead ends: 456 [2018-10-22 16:09:09,393 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1548 GetRequests, 1316 SyntacticMatches, 112 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7388 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=3840, Invalid=10922, Unknown=0, NotChecked=0, Total=14762 [2018-10-22 16:09:09,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 456 states. [2018-10-22 16:09:09,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 456 to 311. [2018-10-22 16:09:09,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 311 states. [2018-10-22 16:09:09,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311 states to 311 states and 329 transitions. [2018-10-22 16:09:09,416 INFO L78 Accepts]: Start accepts. Automaton has 311 states and 329 transitions. Word has length 365 [2018-10-22 16:09:09,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:09,416 INFO L481 AbstractCegarLoop]: Abstraction has 311 states and 329 transitions. [2018-10-22 16:09:09,416 INFO L482 AbstractCegarLoop]: Interpolant automaton has 91 states. [2018-10-22 16:09:09,416 INFO L276 IsEmpty]: Start isEmpty. Operand 311 states and 329 transitions. [2018-10-22 16:09:09,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 369 [2018-10-22 16:09:09,419 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:09,419 INFO L375 BasicCegarLoop]: trace histogram [30, 30, 30, 30, 30, 30, 29, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:09,419 INFO L424 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:09,420 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:09,420 INFO L82 PathProgramCache]: Analyzing trace with hash 1897909549, now seen corresponding path program 42 times [2018-10-22 16:09:09,420 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:09,421 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:09,421 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:09,421 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:09,421 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:09,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:11,224 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:11,224 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:11,225 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:11,225 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:11,225 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:11,225 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:11,225 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:11,233 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:09:11,233 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:09:11,385 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 30 check-sat command(s) [2018-10-22 16:09:11,385 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:11,391 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:12,926 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:12,926 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:14,344 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:14,364 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:14,364 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:14,382 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:09:14,382 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:09:15,607 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 30 check-sat command(s) [2018-10-22 16:09:15,607 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:15,622 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:15,755 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:15,756 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:16,961 INFO L134 CoverageAnalysis]: Checked inductivity of 5104 backedges. 2175 proven. 1305 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:16,962 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:16,963 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62, 62, 62, 62] total 92 [2018-10-22 16:09:16,963 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:16,963 INFO L460 AbstractCegarLoop]: Interpolant automaton has 92 states [2018-10-22 16:09:16,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2018-10-22 16:09:16,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1951, Invalid=6421, Unknown=0, NotChecked=0, Total=8372 [2018-10-22 16:09:16,965 INFO L87 Difference]: Start difference. First operand 311 states and 329 transitions. Second operand 92 states. [2018-10-22 16:09:19,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:19,266 INFO L93 Difference]: Finished difference Result 621 states and 729 transitions. [2018-10-22 16:09:19,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-10-22 16:09:19,266 INFO L78 Accepts]: Start accepts. Automaton has 92 states. Word has length 368 [2018-10-22 16:09:19,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:19,268 INFO L225 Difference]: With dead ends: 621 [2018-10-22 16:09:19,268 INFO L226 Difference]: Without dead ends: 464 [2018-10-22 16:09:19,270 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1562 GetRequests, 1324 SyntacticMatches, 118 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7337 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=3841, Invalid=10921, Unknown=0, NotChecked=0, Total=14762 [2018-10-22 16:09:19,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 464 states. [2018-10-22 16:09:19,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 314. [2018-10-22 16:09:19,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314 states. [2018-10-22 16:09:19,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 332 transitions. [2018-10-22 16:09:19,293 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 332 transitions. Word has length 368 [2018-10-22 16:09:19,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:19,293 INFO L481 AbstractCegarLoop]: Abstraction has 314 states and 332 transitions. [2018-10-22 16:09:19,293 INFO L482 AbstractCegarLoop]: Interpolant automaton has 92 states. [2018-10-22 16:09:19,293 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 332 transitions. [2018-10-22 16:09:19,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 372 [2018-10-22 16:09:19,296 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:19,296 INFO L375 BasicCegarLoop]: trace histogram [31, 31, 30, 30, 30, 30, 30, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:19,296 INFO L424 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:19,296 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:19,296 INFO L82 PathProgramCache]: Analyzing trace with hash 905442825, now seen corresponding path program 43 times [2018-10-22 16:09:19,297 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:19,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:19,297 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:19,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:19,298 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:19,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:19,967 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1452 proven. 2202 refuted. 0 times theorem prover too weak. 1540 trivial. 0 not checked. [2018-10-22 16:09:19,968 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:19,968 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:19,968 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:19,968 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:19,968 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:19,968 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:19,976 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:19,976 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:09:20,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:20,089 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:20,232 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:20,232 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:21,012 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:21,033 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:21,033 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:21,049 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:21,049 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:09:21,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:21,314 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:21,391 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:21,391 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:22,195 INFO L134 CoverageAnalysis]: Checked inductivity of 5194 backedges. 1453 proven. 2117 refuted. 0 times theorem prover too weak. 1624 trivial. 0 not checked. [2018-10-22 16:09:22,197 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:22,197 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 35, 35, 35, 35] total 39 [2018-10-22 16:09:22,197 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:22,198 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-10-22 16:09:22,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-10-22 16:09:22,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=909, Unknown=0, NotChecked=0, Total=1482 [2018-10-22 16:09:22,199 INFO L87 Difference]: Start difference. First operand 314 states and 332 transitions. Second operand 38 states. [2018-10-22 16:09:22,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:22,657 INFO L93 Difference]: Finished difference Result 330 states and 349 transitions. [2018-10-22 16:09:22,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-10-22 16:09:22,658 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 371 [2018-10-22 16:09:22,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:22,660 INFO L225 Difference]: With dead ends: 330 [2018-10-22 16:09:22,660 INFO L226 Difference]: Without dead ends: 328 [2018-10-22 16:09:22,661 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1551 GetRequests, 1394 SyntacticMatches, 118 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2252 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=586, Invalid=1054, Unknown=0, NotChecked=0, Total=1640 [2018-10-22 16:09:22,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2018-10-22 16:09:22,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 328. [2018-10-22 16:09:22,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2018-10-22 16:09:22,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 347 transitions. [2018-10-22 16:09:22,684 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 347 transitions. Word has length 371 [2018-10-22 16:09:22,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:22,684 INFO L481 AbstractCegarLoop]: Abstraction has 328 states and 347 transitions. [2018-10-22 16:09:22,685 INFO L482 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-10-22 16:09:22,685 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 347 transitions. [2018-10-22 16:09:22,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 390 [2018-10-22 16:09:22,687 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:22,687 INFO L375 BasicCegarLoop]: trace histogram [32, 32, 32, 32, 31, 31, 31, 31, 31, 31, 31, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:22,688 INFO L424 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:22,688 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:22,688 INFO L82 PathProgramCache]: Analyzing trace with hash 247740521, now seen corresponding path program 44 times [2018-10-22 16:09:22,688 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:22,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:22,689 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:22,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:22,689 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:22,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:24,509 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2480 proven. 1395 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-10-22 16:09:24,509 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:24,510 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:24,510 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:24,510 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:24,510 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:24,510 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:24,518 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:09:24,518 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:24,644 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:09:24,644 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:24,652 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:26,388 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2595 proven. 1395 refuted. 0 times theorem prover too weak. 1745 trivial. 0 not checked. [2018-10-22 16:09:26,389 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:27,634 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2477 proven. 1395 refuted. 0 times theorem prover too weak. 1863 trivial. 0 not checked. [2018-10-22 16:09:27,656 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:27,656 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:27,671 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:09:27,671 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:27,931 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:09:27,932 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:27,950 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:28,097 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2595 proven. 1395 refuted. 0 times theorem prover too weak. 1745 trivial. 0 not checked. [2018-10-22 16:09:28,097 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:29,696 INFO L134 CoverageAnalysis]: Checked inductivity of 5735 backedges. 2477 proven. 1395 refuted. 0 times theorem prover too weak. 1863 trivial. 0 not checked. [2018-10-22 16:09:29,698 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:29,698 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 64, 64, 64, 64] total 96 [2018-10-22 16:09:29,698 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:29,699 INFO L460 AbstractCegarLoop]: Interpolant automaton has 96 states [2018-10-22 16:09:29,699 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2018-10-22 16:09:29,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2111, Invalid=7009, Unknown=0, NotChecked=0, Total=9120 [2018-10-22 16:09:29,700 INFO L87 Difference]: Start difference. First operand 328 states and 347 transitions. Second operand 96 states. [2018-10-22 16:09:35,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:35,139 INFO L93 Difference]: Finished difference Result 655 states and 767 transitions. [2018-10-22 16:09:35,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-10-22 16:09:35,139 INFO L78 Accepts]: Start accepts. Automaton has 96 states. Word has length 389 [2018-10-22 16:09:35,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:35,141 INFO L225 Difference]: With dead ends: 655 [2018-10-22 16:09:35,142 INFO L226 Difference]: Without dead ends: 486 [2018-10-22 16:09:35,143 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1650 GetRequests, 1403 SyntacticMatches, 122 SemanticMatches, 125 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7995 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=4126, Invalid=11876, Unknown=0, NotChecked=0, Total=16002 [2018-10-22 16:09:35,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 486 states. [2018-10-22 16:09:35,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 486 to 331. [2018-10-22 16:09:35,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2018-10-22 16:09:35,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 350 transitions. [2018-10-22 16:09:35,167 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 350 transitions. Word has length 389 [2018-10-22 16:09:35,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:35,167 INFO L481 AbstractCegarLoop]: Abstraction has 331 states and 350 transitions. [2018-10-22 16:09:35,167 INFO L482 AbstractCegarLoop]: Interpolant automaton has 96 states. [2018-10-22 16:09:35,167 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 350 transitions. [2018-10-22 16:09:35,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 393 [2018-10-22 16:09:35,170 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:35,170 INFO L375 BasicCegarLoop]: trace histogram [32, 32, 32, 32, 32, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:35,170 INFO L424 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:35,170 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:35,171 INFO L82 PathProgramCache]: Analyzing trace with hash -1056870131, now seen corresponding path program 45 times [2018-10-22 16:09:35,171 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:35,171 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:35,171 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:35,171 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:35,172 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:35,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:36,792 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-10-22 16:09:36,792 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:36,792 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:36,792 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:36,792 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:36,792 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:36,792 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:36,802 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:09:36,803 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:09:36,974 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 32 check-sat command(s) [2018-10-22 16:09:36,974 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:36,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:38,680 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-10-22 16:09:38,681 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:40,227 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-10-22 16:09:40,249 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:40,249 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:40,263 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:09:40,264 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:09:41,648 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 32 check-sat command(s) [2018-10-22 16:09:41,648 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:41,662 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:41,813 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-10-22 16:09:41,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:43,213 INFO L134 CoverageAnalysis]: Checked inductivity of 5828 backedges. 2480 proven. 1488 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-10-22 16:09:43,215 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:43,216 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 66, 66, 66, 66] total 98 [2018-10-22 16:09:43,216 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:43,217 INFO L460 AbstractCegarLoop]: Interpolant automaton has 98 states [2018-10-22 16:09:43,218 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2018-10-22 16:09:43,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2209, Invalid=7297, Unknown=0, NotChecked=0, Total=9506 [2018-10-22 16:09:43,219 INFO L87 Difference]: Start difference. First operand 331 states and 350 transitions. Second operand 98 states. [2018-10-22 16:09:45,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:45,519 INFO L93 Difference]: Finished difference Result 661 states and 776 transitions. [2018-10-22 16:09:45,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-10-22 16:09:45,520 INFO L78 Accepts]: Start accepts. Automaton has 98 states. Word has length 392 [2018-10-22 16:09:45,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:45,522 INFO L225 Difference]: With dead ends: 661 [2018-10-22 16:09:45,522 INFO L226 Difference]: Without dead ends: 494 [2018-10-22 16:09:45,523 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1664 GetRequests, 1410 SyntacticMatches, 126 SemanticMatches, 128 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8370 ImplicationChecksByTransitivity, 6.2s TimeCoverageRelationStatistics Valid=4353, Invalid=12417, Unknown=0, NotChecked=0, Total=16770 [2018-10-22 16:09:45,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states. [2018-10-22 16:09:45,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 334. [2018-10-22 16:09:45,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 334 states. [2018-10-22 16:09:45,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 334 states to 334 states and 353 transitions. [2018-10-22 16:09:45,547 INFO L78 Accepts]: Start accepts. Automaton has 334 states and 353 transitions. Word has length 392 [2018-10-22 16:09:45,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:45,548 INFO L481 AbstractCegarLoop]: Abstraction has 334 states and 353 transitions. [2018-10-22 16:09:45,548 INFO L482 AbstractCegarLoop]: Interpolant automaton has 98 states. [2018-10-22 16:09:45,548 INFO L276 IsEmpty]: Start isEmpty. Operand 334 states and 353 transitions. [2018-10-22 16:09:45,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 396 [2018-10-22 16:09:45,550 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:45,550 INFO L375 BasicCegarLoop]: trace histogram [33, 33, 32, 32, 32, 32, 32, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:45,551 INFO L424 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:45,551 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:45,551 INFO L82 PathProgramCache]: Analyzing trace with hash -1553742359, now seen corresponding path program 46 times [2018-10-22 16:09:45,551 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:45,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:45,552 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:45,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:45,552 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:45,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:46,472 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1645 proven. 2509 refuted. 0 times theorem prover too weak. 1770 trivial. 0 not checked. [2018-10-22 16:09:46,473 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:46,473 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:46,473 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:46,473 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:46,473 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:46,473 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:46,481 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:09:46,481 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:09:46,600 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:09:46,601 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:46,607 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:46,796 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-10-22 16:09:46,797 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:47,726 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-10-22 16:09:47,747 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:47,747 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:47,762 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:09:47,762 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:09:48,116 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:09:48,117 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:48,138 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:48,249 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-10-22 16:09:48,249 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:49,453 INFO L134 CoverageAnalysis]: Checked inductivity of 5924 backedges. 1646 proven. 2418 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2018-10-22 16:09:49,455 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:49,456 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 37, 37, 37] total 42 [2018-10-22 16:09:49,456 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:49,456 INFO L460 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-10-22 16:09:49,457 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-10-22 16:09:49,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=646, Invalid=1076, Unknown=0, NotChecked=0, Total=1722 [2018-10-22 16:09:49,457 INFO L87 Difference]: Start difference. First operand 334 states and 353 transitions. Second operand 41 states. [2018-10-22 16:09:50,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:50,050 INFO L93 Difference]: Finished difference Result 355 states and 377 transitions. [2018-10-22 16:09:50,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-10-22 16:09:50,051 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 395 [2018-10-22 16:09:50,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:50,053 INFO L225 Difference]: With dead ends: 355 [2018-10-22 16:09:50,053 INFO L226 Difference]: Without dead ends: 353 [2018-10-22 16:09:50,054 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1651 GetRequests, 1483 SyntacticMatches, 126 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2571 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=659, Invalid=1233, Unknown=0, NotChecked=0, Total=1892 [2018-10-22 16:09:50,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 353 states. [2018-10-22 16:09:50,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 353 to 348. [2018-10-22 16:09:50,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2018-10-22 16:09:50,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 368 transitions. [2018-10-22 16:09:50,079 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 368 transitions. Word has length 395 [2018-10-22 16:09:50,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:50,079 INFO L481 AbstractCegarLoop]: Abstraction has 348 states and 368 transitions. [2018-10-22 16:09:50,079 INFO L482 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-10-22 16:09:50,080 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 368 transitions. [2018-10-22 16:09:50,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 414 [2018-10-22 16:09:50,082 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:50,082 INFO L375 BasicCegarLoop]: trace histogram [34, 34, 34, 34, 33, 33, 33, 33, 33, 33, 33, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:50,083 INFO L424 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:50,083 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:50,083 INFO L82 PathProgramCache]: Analyzing trace with hash -779104183, now seen corresponding path program 47 times [2018-10-22 16:09:50,083 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:50,084 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:50,084 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:50,084 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:50,084 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:50,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:51,783 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:09:51,783 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:51,783 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:51,783 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:51,784 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:51,784 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:51,784 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:51,792 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:09:51,792 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:51,964 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2018-10-22 16:09:51,964 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:51,970 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:53,922 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:09:53,922 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:55,656 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:09:55,677 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:55,677 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:55,692 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:09:55,692 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:57,238 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2018-10-22 16:09:57,238 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:57,254 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:57,413 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:09:57,413 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:58,826 INFO L134 CoverageAnalysis]: Checked inductivity of 6501 backedges. 2805 proven. 1584 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:09:58,828 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:58,828 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [69, 69, 69, 69, 69] total 105 [2018-10-22 16:09:58,828 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:58,829 INFO L460 AbstractCegarLoop]: Interpolant automaton has 103 states [2018-10-22 16:09:58,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2018-10-22 16:09:58,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2553, Invalid=8367, Unknown=0, NotChecked=0, Total=10920 [2018-10-22 16:09:58,830 INFO L87 Difference]: Start difference. First operand 348 states and 368 transitions. Second operand 103 states. [2018-10-22 16:10:01,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:01,081 INFO L93 Difference]: Finished difference Result 695 states and 814 transitions. [2018-10-22 16:10:01,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-10-22 16:10:01,081 INFO L78 Accepts]: Start accepts. Automaton has 103 states. Word has length 413 [2018-10-22 16:10:01,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:01,084 INFO L225 Difference]: With dead ends: 695 [2018-10-22 16:10:01,084 INFO L226 Difference]: Without dead ends: 516 [2018-10-22 16:10:01,086 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1752 GetRequests, 1488 SyntacticMatches, 128 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9530 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=4896, Invalid=14010, Unknown=0, NotChecked=0, Total=18906 [2018-10-22 16:10:01,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 516 states. [2018-10-22 16:10:01,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 516 to 351. [2018-10-22 16:10:01,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 351 states. [2018-10-22 16:10:01,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 351 states to 351 states and 371 transitions. [2018-10-22 16:10:01,114 INFO L78 Accepts]: Start accepts. Automaton has 351 states and 371 transitions. Word has length 413 [2018-10-22 16:10:01,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:01,114 INFO L481 AbstractCegarLoop]: Abstraction has 351 states and 371 transitions. [2018-10-22 16:10:01,114 INFO L482 AbstractCegarLoop]: Interpolant automaton has 103 states. [2018-10-22 16:10:01,114 INFO L276 IsEmpty]: Start isEmpty. Operand 351 states and 371 transitions. [2018-10-22 16:10:01,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 417 [2018-10-22 16:10:01,117 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:01,117 INFO L375 BasicCegarLoop]: trace histogram [34, 34, 34, 34, 34, 34, 33, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:01,117 INFO L424 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:01,117 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:01,118 INFO L82 PathProgramCache]: Analyzing trace with hash 479616237, now seen corresponding path program 48 times [2018-10-22 16:10:01,118 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:01,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:01,118 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:01,119 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:01,119 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:01,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:02,947 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:10:02,947 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:02,947 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:02,947 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:02,947 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:02,947 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:02,948 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:02,955 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:10:02,955 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:10:03,128 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 34 check-sat command(s) [2018-10-22 16:10:03,128 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:03,136 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:05,333 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:10:05,333 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:06,864 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:10:06,885 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:06,885 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:06,900 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:10:06,900 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:10:08,468 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 34 check-sat command(s) [2018-10-22 16:10:08,468 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:08,484 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:08,647 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:10:08,647 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:10,375 INFO L134 CoverageAnalysis]: Checked inductivity of 6600 backedges. 2805 proven. 1683 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:10:10,378 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:10,378 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [70, 70, 70, 70, 70] total 104 [2018-10-22 16:10:10,378 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:10,379 INFO L460 AbstractCegarLoop]: Interpolant automaton has 104 states [2018-10-22 16:10:10,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2018-10-22 16:10:10,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2483, Invalid=8229, Unknown=0, NotChecked=0, Total=10712 [2018-10-22 16:10:10,381 INFO L87 Difference]: Start difference. First operand 351 states and 371 transitions. Second operand 104 states. [2018-10-22 16:10:12,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:12,829 INFO L93 Difference]: Finished difference Result 701 states and 823 transitions. [2018-10-22 16:10:12,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-10-22 16:10:12,829 INFO L78 Accepts]: Start accepts. Automaton has 104 states. Word has length 416 [2018-10-22 16:10:12,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:12,832 INFO L225 Difference]: With dead ends: 701 [2018-10-22 16:10:12,833 INFO L226 Difference]: Without dead ends: 524 [2018-10-22 16:10:12,835 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1766 GetRequests, 1496 SyntacticMatches, 134 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9471 ImplicationChecksByTransitivity, 7.1s TimeCoverageRelationStatistics Valid=4897, Invalid=14009, Unknown=0, NotChecked=0, Total=18906 [2018-10-22 16:10:12,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 524 states. [2018-10-22 16:10:12,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 524 to 354. [2018-10-22 16:10:12,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 354 states. [2018-10-22 16:10:12,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 374 transitions. [2018-10-22 16:10:12,862 INFO L78 Accepts]: Start accepts. Automaton has 354 states and 374 transitions. Word has length 416 [2018-10-22 16:10:12,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:12,863 INFO L481 AbstractCegarLoop]: Abstraction has 354 states and 374 transitions. [2018-10-22 16:10:12,863 INFO L482 AbstractCegarLoop]: Interpolant automaton has 104 states. [2018-10-22 16:10:12,863 INFO L276 IsEmpty]: Start isEmpty. Operand 354 states and 374 transitions. [2018-10-22 16:10:12,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 420 [2018-10-22 16:10:12,866 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:12,866 INFO L375 BasicCegarLoop]: trace histogram [35, 35, 34, 34, 34, 34, 34, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:12,866 INFO L424 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:12,866 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:12,867 INFO L82 PathProgramCache]: Analyzing trace with hash -339812919, now seen corresponding path program 49 times [2018-10-22 16:10:12,867 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:12,867 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:12,867 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:12,868 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:12,868 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:12,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:14,206 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1850 proven. 2836 refuted. 0 times theorem prover too weak. 2016 trivial. 0 not checked. [2018-10-22 16:10:14,206 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:14,206 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:14,206 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:14,206 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:14,207 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:14,207 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:14,214 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:10:14,215 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:10:14,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:14,350 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:14,545 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:10:14,546 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:15,771 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:10:15,792 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:15,792 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:15,807 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:10:15,807 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:10:16,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:16,114 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:16,279 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:10:16,279 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:17,343 INFO L134 CoverageAnalysis]: Checked inductivity of 6702 backedges. 1851 proven. 2739 refuted. 0 times theorem prover too weak. 2112 trivial. 0 not checked. [2018-10-22 16:10:17,345 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:17,345 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 39, 39, 39, 39] total 43 [2018-10-22 16:10:17,345 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:17,346 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-10-22 16:10:17,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-10-22 16:10:17,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=715, Invalid=1091, Unknown=0, NotChecked=0, Total=1806 [2018-10-22 16:10:17,347 INFO L87 Difference]: Start difference. First operand 354 states and 374 transitions. Second operand 42 states. [2018-10-22 16:10:17,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:17,890 INFO L93 Difference]: Finished difference Result 370 states and 391 transitions. [2018-10-22 16:10:17,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-10-22 16:10:17,890 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 419 [2018-10-22 16:10:17,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:17,893 INFO L225 Difference]: With dead ends: 370 [2018-10-22 16:10:17,893 INFO L226 Difference]: Without dead ends: 368 [2018-10-22 16:10:17,893 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1751 GetRequests, 1574 SyntacticMatches, 134 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2824 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=728, Invalid=1252, Unknown=0, NotChecked=0, Total=1980 [2018-10-22 16:10:17,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states. [2018-10-22 16:10:17,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 368. [2018-10-22 16:10:17,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 368 states. [2018-10-22 16:10:17,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 389 transitions. [2018-10-22 16:10:17,910 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 389 transitions. Word has length 419 [2018-10-22 16:10:17,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:17,911 INFO L481 AbstractCegarLoop]: Abstraction has 368 states and 389 transitions. [2018-10-22 16:10:17,911 INFO L482 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-10-22 16:10:17,911 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 389 transitions. [2018-10-22 16:10:17,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 438 [2018-10-22 16:10:17,914 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:17,914 INFO L375 BasicCegarLoop]: trace histogram [36, 36, 36, 36, 35, 35, 35, 35, 35, 35, 35, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:17,914 INFO L424 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:17,914 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:17,914 INFO L82 PathProgramCache]: Analyzing trace with hash 487108649, now seen corresponding path program 50 times [2018-10-22 16:10:17,915 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:17,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:17,915 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:10:17,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:17,915 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:17,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:19,984 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3150 proven. 1785 refuted. 0 times theorem prover too weak. 2380 trivial. 0 not checked. [2018-10-22 16:10:19,985 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:19,985 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:19,985 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:19,985 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:19,985 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:19,985 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:19,993 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:10:19,993 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:10:20,120 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:10:20,120 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:20,126 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:22,191 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3281 proven. 1785 refuted. 0 times theorem prover too weak. 2249 trivial. 0 not checked. [2018-10-22 16:10:22,191 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:23,821 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3147 proven. 1785 refuted. 0 times theorem prover too weak. 2383 trivial. 0 not checked. [2018-10-22 16:10:23,842 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:23,842 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:23,857 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:10:23,857 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:10:24,152 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:10:24,152 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:24,174 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:24,347 INFO L134 CoverageAnalysis]: Checked inductivity of 7315 backedges. 3281 proven. 1785 refuted. 0 times theorem prover too weak. 2249 trivial. 0 not checked. [2018-10-22 16:10:24,347 INFO L316 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-10-22 16:10:25,137 INFO L177 TraceCheckSpWp]: Timeout while computing interpolants [2018-10-22 16:10:25,338 WARN L522 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 101 cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:25,338 WARN L550 AbstractCegarLoop]: Verification canceled [2018-10-22 16:10:25,344 WARN L205 ceAbstractionStarter]: Timeout [2018-10-22 16:10:25,344 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.10 04:10:25 BoogieIcfgContainer [2018-10-22 16:10:25,344 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-22 16:10:25,345 INFO L168 Benchmark]: Toolchain (without parser) took 229202.78 ms. Allocated memory was 1.5 GB in the beginning and 2.6 GB in the end (delta: 1.1 GB). Free memory was 1.4 GB in the beginning and 2.4 GB in the end (delta: -987.2 MB). Peak memory consumption was 107.0 MB. Max. memory is 7.1 GB. [2018-10-22 16:10:25,346 INFO L168 Benchmark]: CDTParser took 0.40 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-22 16:10:25,346 INFO L168 Benchmark]: CACSL2BoogieTranslator took 256.20 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-10-22 16:10:25,347 INFO L168 Benchmark]: Boogie Procedure Inliner took 23.26 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-22 16:10:25,347 INFO L168 Benchmark]: Boogie Preprocessor took 32.28 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-22 16:10:25,347 INFO L168 Benchmark]: RCFGBuilder took 528.40 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 757.6 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -810.4 MB). Peak memory consumption was 26.6 MB. Max. memory is 7.1 GB. [2018-10-22 16:10:25,348 INFO L168 Benchmark]: TraceAbstraction took 228356.76 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 336.6 MB). Free memory was 2.2 GB in the beginning and 2.4 GB in the end (delta: -187.3 MB). Peak memory consumption was 149.3 MB. Max. memory is 7.1 GB. [2018-10-22 16:10:25,351 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.40 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 256.20 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 23.26 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 32.28 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 528.40 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 757.6 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -810.4 MB). Peak memory consumption was 26.6 MB. Max. memory is 7.1 GB. * TraceAbstraction took 228356.76 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 336.6 MB). Free memory was 2.2 GB in the beginning and 2.4 GB in the end (delta: -187.3 MB). Peak memory consumption was 149.3 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while BasicCegarLoop was analyzing trace of length 438 with TraceHistMax 36,while TraceCheckSpWp was constructing backward predicates,while PredicateComparison was comparing new predicate (quantifier-free) to 108 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 30 locations, 1 error locations. TIMEOUT Result, 228.2s OverallTime, 53 OverallIterations, 36 TraceHistogramMax, 51.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3774 SDtfs, 7889 SDslu, 35103 SDs, 0 SdLazy, 28430 SolverSat, 4484 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 27.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 47959 GetRequests, 41582 SyntacticMatches, 3476 SemanticMatches, 2901 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 132816 ImplicationChecksByTransitivity, 130.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=368occurred in iteration=52, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.7s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.7s AutomataMinimizationTime, 52 MinimizatonAttempts, 3020 StatesRemovedByMinimization, 43 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.2s SsaConstructionTime, 23.7s SatisfiabilityAnalysisTime, 137.9s InterpolantComputationTime, 34118 NumberOfCodeBlocks, 34118 NumberOfCodeBlocksAsserted, 1062 NumberOfCheckSat, 56572 ConstructedInterpolants, 0 QuantifiedInterpolants, 48808072 SizeOfPredicates, 278 NumberOfNonLiveVariables, 54642 ConjunctsInSsa, 3960 ConjunctsInUnsatCore, 248 InterpolantComputations, 3 PerfectInterpolantSequences, 416236/597770 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Completed graceful shutdown