java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/taipan/svcomp-Reach-64bit-Taipan_Default.epf -i ../../../trunk/examples/svcomp/loop-invgen/seq_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-8c3fbe1 [2018-10-22 16:07:16,666 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-22 16:07:16,668 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-22 16:07:16,679 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-22 16:07:16,680 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-22 16:07:16,681 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-22 16:07:16,682 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-22 16:07:16,684 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-22 16:07:16,686 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-22 16:07:16,688 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-22 16:07:16,689 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-22 16:07:16,690 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-22 16:07:16,690 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-22 16:07:16,693 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-22 16:07:16,695 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-22 16:07:16,699 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-22 16:07:16,700 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-22 16:07:16,702 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-22 16:07:16,704 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-22 16:07:16,706 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-22 16:07:16,707 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-22 16:07:16,708 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-22 16:07:16,714 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-10-22 16:07:16,730 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/../../../trunk/examples/settings/default/taipan/svcomp-Reach-64bit-Taipan_Default.epf [2018-10-22 16:07:16,759 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-22 16:07:16,760 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-22 16:07:16,761 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-22 16:07:16,764 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-22 16:07:16,764 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-22 16:07:16,764 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-22 16:07:16,764 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-10-22 16:07:16,765 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-22 16:07:16,765 INFO L133 SettingsManager]: * Log string format=TERM [2018-10-22 16:07:16,765 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-10-22 16:07:16,765 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-10-22 16:07:16,765 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-22 16:07:16,766 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-22 16:07:16,766 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-22 16:07:16,767 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-22 16:07:16,767 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-10-22 16:07:16,767 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-22 16:07:16,767 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-10-22 16:07:16,767 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-10-22 16:07:16,767 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-10-22 16:07:16,769 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-22 16:07:16,770 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-22 16:07:16,770 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-22 16:07:16,770 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-22 16:07:16,770 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-22 16:07:16,770 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-22 16:07:16,771 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-22 16:07:16,771 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-10-22 16:07:16,771 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-10-22 16:07:16,771 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-22 16:07:16,771 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-22 16:07:16,772 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-10-22 16:07:16,772 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-10-22 16:07:16,772 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-10-22 16:07:16,821 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-22 16:07:16,838 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-22 16:07:16,844 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-22 16:07:16,846 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-22 16:07:16,846 INFO L276 PluginConnector]: CDTParser initialized [2018-10-22 16:07:16,847 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/../../../trunk/examples/svcomp/loop-invgen/seq_true-unreach-call_true-termination.i [2018-10-22 16:07:16,926 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data/1289b2e9b/45ff111b6a0e46a58b51fff7de36079d/FLAG3d56fad71 [2018-10-22 16:07:17,369 INFO L298 CDTParser]: Found 1 translation units. [2018-10-22 16:07:17,370 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-invgen/seq_true-unreach-call_true-termination.i [2018-10-22 16:07:17,376 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data/1289b2e9b/45ff111b6a0e46a58b51fff7de36079d/FLAG3d56fad71 [2018-10-22 16:07:17,394 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data/1289b2e9b/45ff111b6a0e46a58b51fff7de36079d [2018-10-22 16:07:17,404 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-22 16:07:17,406 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-10-22 16:07:17,407 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-22 16:07:17,407 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-22 16:07:17,411 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-22 16:07:17,412 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,415 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3e15d72a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17, skipping insertion in model container [2018-10-22 16:07:17,415 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,425 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-22 16:07:17,447 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-22 16:07:17,616 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-22 16:07:17,621 INFO L189 MainTranslator]: Completed pre-run [2018-10-22 16:07:17,638 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-22 16:07:17,651 INFO L193 MainTranslator]: Completed translation [2018-10-22 16:07:17,652 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17 WrapperNode [2018-10-22 16:07:17,652 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-22 16:07:17,653 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-22 16:07:17,653 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-22 16:07:17,653 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-22 16:07:17,660 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,665 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,671 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-22 16:07:17,672 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-22 16:07:17,672 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-22 16:07:17,672 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-22 16:07:17,680 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,680 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,681 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,682 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,685 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,691 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,692 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (1/1) ... [2018-10-22 16:07:17,694 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-22 16:07:17,695 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-22 16:07:17,695 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-22 16:07:17,695 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-22 16:07:17,700 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-22 16:07:17,827 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-22 16:07:17,828 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-22 16:07:17,828 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-22 16:07:17,828 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-22 16:07:17,828 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-22 16:07:17,829 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-22 16:07:17,831 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-10-22 16:07:17,831 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-10-22 16:07:18,197 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-22 16:07:18,197 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.10 04:07:18 BoogieIcfgContainer [2018-10-22 16:07:18,197 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-22 16:07:18,198 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-22 16:07:18,199 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-22 16:07:18,205 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-22 16:07:18,205 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 22.10 04:07:17" (1/3) ... [2018-10-22 16:07:18,206 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ad2d114 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.10 04:07:18, skipping insertion in model container [2018-10-22 16:07:18,206 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.10 04:07:17" (2/3) ... [2018-10-22 16:07:18,207 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ad2d114 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.10 04:07:18, skipping insertion in model container [2018-10-22 16:07:18,207 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.10 04:07:18" (3/3) ... [2018-10-22 16:07:18,209 INFO L112 eAbstractionObserver]: Analyzing ICFG seq_true-unreach-call_true-termination.i [2018-10-22 16:07:18,220 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-22 16:07:18,227 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-10-22 16:07:18,241 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-10-22 16:07:18,275 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-10-22 16:07:18,276 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-22 16:07:18,276 INFO L383 AbstractCegarLoop]: Hoare is true [2018-10-22 16:07:18,276 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-22 16:07:18,277 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-22 16:07:18,277 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-22 16:07:18,277 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-22 16:07:18,277 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-22 16:07:18,277 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-22 16:07:18,297 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states. [2018-10-22 16:07:18,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-10-22 16:07:18,304 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:18,305 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:18,307 INFO L424 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:18,313 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:18,313 INFO L82 PathProgramCache]: Analyzing trace with hash 301890663, now seen corresponding path program 1 times [2018-10-22 16:07:18,315 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:18,362 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:18,362 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:18,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:18,363 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:18,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:18,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:18,431 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-22 16:07:18,431 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-22 16:07:18,431 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-22 16:07:18,436 INFO L460 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-10-22 16:07:18,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-10-22 16:07:18,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-10-22 16:07:18,452 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 2 states. [2018-10-22 16:07:18,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:18,478 INFO L93 Difference]: Finished difference Result 45 states and 58 transitions. [2018-10-22 16:07:18,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-10-22 16:07:18,479 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-10-22 16:07:18,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:18,488 INFO L225 Difference]: With dead ends: 45 [2018-10-22 16:07:18,489 INFO L226 Difference]: Without dead ends: 23 [2018-10-22 16:07:18,493 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-10-22 16:07:18,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-10-22 16:07:18,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-10-22 16:07:18,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-10-22 16:07:18,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2018-10-22 16:07:18,532 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 25 transitions. Word has length 17 [2018-10-22 16:07:18,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:18,533 INFO L481 AbstractCegarLoop]: Abstraction has 23 states and 25 transitions. [2018-10-22 16:07:18,533 INFO L482 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-10-22 16:07:18,533 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2018-10-22 16:07:18,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-22 16:07:18,534 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:18,534 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:18,535 INFO L424 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:18,535 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:18,535 INFO L82 PathProgramCache]: Analyzing trace with hash 1130037681, now seen corresponding path program 1 times [2018-10-22 16:07:18,535 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:18,537 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:18,537 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:18,537 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:18,537 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:18,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:18,984 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:18,985 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-22 16:07:18,985 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-22 16:07:18,985 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-22 16:07:18,987 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-22 16:07:18,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-22 16:07:18,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-22 16:07:18,988 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. Second operand 7 states. [2018-10-22 16:07:19,433 WARN L179 SmtUtils]: Spent 114.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-10-22 16:07:19,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:19,500 INFO L93 Difference]: Finished difference Result 48 states and 54 transitions. [2018-10-22 16:07:19,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-22 16:07:19,501 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-10-22 16:07:19,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:19,504 INFO L225 Difference]: With dead ends: 48 [2018-10-22 16:07:19,504 INFO L226 Difference]: Without dead ends: 35 [2018-10-22 16:07:19,505 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2018-10-22 16:07:19,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-10-22 16:07:19,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 28. [2018-10-22 16:07:19,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-10-22 16:07:19,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 31 transitions. [2018-10-22 16:07:19,518 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 31 transitions. Word has length 19 [2018-10-22 16:07:19,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:19,519 INFO L481 AbstractCegarLoop]: Abstraction has 28 states and 31 transitions. [2018-10-22 16:07:19,519 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-22 16:07:19,519 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 31 transitions. [2018-10-22 16:07:19,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-22 16:07:19,520 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:19,520 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:19,520 INFO L424 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:19,521 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:19,521 INFO L82 PathProgramCache]: Analyzing trace with hash -1499928661, now seen corresponding path program 1 times [2018-10-22 16:07:19,521 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:19,522 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:19,522 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:19,522 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:19,523 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:19,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:19,607 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:19,608 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-22 16:07:19,608 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-22 16:07:19,609 INFO L265 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-22 16:07:19,609 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-22 16:07:19,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-22 16:07:19,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-22 16:07:19,610 INFO L87 Difference]: Start difference. First operand 28 states and 31 transitions. Second operand 6 states. [2018-10-22 16:07:19,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:19,726 INFO L93 Difference]: Finished difference Result 42 states and 46 transitions. [2018-10-22 16:07:19,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-22 16:07:19,727 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2018-10-22 16:07:19,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:19,729 INFO L225 Difference]: With dead ends: 42 [2018-10-22 16:07:19,729 INFO L226 Difference]: Without dead ends: 40 [2018-10-22 16:07:19,730 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-10-22 16:07:19,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-10-22 16:07:19,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 35. [2018-10-22 16:07:19,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-10-22 16:07:19,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 38 transitions. [2018-10-22 16:07:19,738 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 38 transitions. Word has length 21 [2018-10-22 16:07:19,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:19,739 INFO L481 AbstractCegarLoop]: Abstraction has 35 states and 38 transitions. [2018-10-22 16:07:19,739 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-22 16:07:19,739 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 38 transitions. [2018-10-22 16:07:19,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-22 16:07:19,740 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:19,740 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:19,741 INFO L424 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:19,741 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:19,741 INFO L82 PathProgramCache]: Analyzing trace with hash -1355895601, now seen corresponding path program 1 times [2018-10-22 16:07:19,741 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:19,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:19,743 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:19,743 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:19,743 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:19,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:19,989 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:19,989 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:19,990 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:19,990 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 30 with the following transitions: [2018-10-22 16:07:19,992 INFO L202 CegarAbsIntRunner]: [0], [4], [8], [12], [16], [20], [26], [30], [34], [36], [40], [44], [50], [52], [57], [60], [62], [65], [67], [68], [69], [70], [72], [73] [2018-10-22 16:07:20,040 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-22 16:07:20,040 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-22 16:07:20,685 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-22 16:07:20,686 INFO L272 AbstractInterpreter]: Visited 24 different actions 235 times. Merged at 8 different actions 93 times. Widened at 3 different actions 17 times. Found 7 fixpoints after 2 different actions. Largest state had 12 variables. [2018-10-22 16:07:20,699 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:20,700 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-22 16:07:20,700 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:20,700 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:20,710 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:20,711 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:20,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:20,754 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:21,234 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:21,235 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:21,479 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:21,511 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:21,512 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:21,529 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:21,529 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:21,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:21,563 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:21,580 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:21,580 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:21,681 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:21,684 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:21,684 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 14 [2018-10-22 16:07:21,684 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:21,685 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-22 16:07:21,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-22 16:07:21,686 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2018-10-22 16:07:21,686 INFO L87 Difference]: Start difference. First operand 35 states and 38 transitions. Second operand 14 states. [2018-10-22 16:07:22,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:22,037 INFO L93 Difference]: Finished difference Result 64 states and 72 transitions. [2018-10-22 16:07:22,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-22 16:07:22,041 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 29 [2018-10-22 16:07:22,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:22,044 INFO L225 Difference]: With dead ends: 64 [2018-10-22 16:07:22,044 INFO L226 Difference]: Without dead ends: 47 [2018-10-22 16:07:22,045 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 99 SyntacticMatches, 12 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=105, Invalid=275, Unknown=0, NotChecked=0, Total=380 [2018-10-22 16:07:22,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-10-22 16:07:22,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 37. [2018-10-22 16:07:22,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-10-22 16:07:22,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 40 transitions. [2018-10-22 16:07:22,054 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 40 transitions. Word has length 29 [2018-10-22 16:07:22,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:22,055 INFO L481 AbstractCegarLoop]: Abstraction has 37 states and 40 transitions. [2018-10-22 16:07:22,055 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-22 16:07:22,055 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 40 transitions. [2018-10-22 16:07:22,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-22 16:07:22,058 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:22,058 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:22,058 INFO L424 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:22,058 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:22,059 INFO L82 PathProgramCache]: Analyzing trace with hash 95654235, now seen corresponding path program 1 times [2018-10-22 16:07:22,059 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:22,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:22,060 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:22,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:22,060 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:22,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:22,198 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:22,199 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:22,199 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:22,200 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 30 with the following transitions: [2018-10-22 16:07:22,200 INFO L202 CegarAbsIntRunner]: [0], [4], [8], [12], [16], [20], [22], [26], [30], [34], [40], [44], [50], [52], [57], [60], [62], [65], [67], [68], [69], [70], [72], [73] [2018-10-22 16:07:22,203 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-22 16:07:22,203 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-22 16:07:22,522 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-22 16:07:22,522 INFO L272 AbstractInterpreter]: Visited 24 different actions 253 times. Merged at 11 different actions 111 times. Widened at 4 different actions 19 times. Found 7 fixpoints after 2 different actions. Largest state had 12 variables. [2018-10-22 16:07:22,542 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:22,542 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-22 16:07:22,542 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:22,542 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:22,551 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:22,552 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:22,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:22,573 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:22,768 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:22,769 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:22,840 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:22,860 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:22,860 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:22,877 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:22,877 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:22,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:22,902 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:22,910 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:22,911 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:23,064 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:23,067 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:23,067 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 13 [2018-10-22 16:07:23,067 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:23,068 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-22 16:07:23,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-22 16:07:23,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2018-10-22 16:07:23,068 INFO L87 Difference]: Start difference. First operand 37 states and 40 transitions. Second operand 13 states. [2018-10-22 16:07:23,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:23,582 INFO L93 Difference]: Finished difference Result 79 states and 91 transitions. [2018-10-22 16:07:23,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-22 16:07:23,584 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 29 [2018-10-22 16:07:23,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:23,585 INFO L225 Difference]: With dead ends: 79 [2018-10-22 16:07:23,585 INFO L226 Difference]: Without dead ends: 62 [2018-10-22 16:07:23,586 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 100 SyntacticMatches, 12 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=105, Invalid=275, Unknown=0, NotChecked=0, Total=380 [2018-10-22 16:07:23,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-10-22 16:07:23,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 40. [2018-10-22 16:07:23,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-10-22 16:07:23,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 44 transitions. [2018-10-22 16:07:23,596 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 44 transitions. Word has length 29 [2018-10-22 16:07:23,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:23,597 INFO L481 AbstractCegarLoop]: Abstraction has 40 states and 44 transitions. [2018-10-22 16:07:23,597 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-22 16:07:23,597 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 44 transitions. [2018-10-22 16:07:23,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-10-22 16:07:23,598 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:23,598 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:23,599 INFO L424 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:23,599 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:23,599 INFO L82 PathProgramCache]: Analyzing trace with hash -446111159, now seen corresponding path program 2 times [2018-10-22 16:07:23,599 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:23,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:23,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:23,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:23,600 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:23,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:23,717 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:23,717 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:23,718 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:23,718 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:23,718 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:23,718 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:23,718 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:23,727 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:23,727 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:23,746 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:23,746 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:23,749 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:23,790 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:23,790 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:23,830 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:23,850 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:23,850 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:23,866 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:23,866 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:23,891 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:23,891 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:23,898 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:23,905 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:23,905 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:23,976 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-22 16:07:23,978 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:23,978 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7, 7, 7] total 10 [2018-10-22 16:07:23,978 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:23,978 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-22 16:07:23,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-22 16:07:23,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-10-22 16:07:23,979 INFO L87 Difference]: Start difference. First operand 40 states and 44 transitions. Second operand 10 states. [2018-10-22 16:07:24,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:24,136 INFO L93 Difference]: Finished difference Result 50 states and 54 transitions. [2018-10-22 16:07:24,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-22 16:07:24,137 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-10-22 16:07:24,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:24,139 INFO L225 Difference]: With dead ends: 50 [2018-10-22 16:07:24,139 INFO L226 Difference]: Without dead ends: 48 [2018-10-22 16:07:24,139 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 115 SyntacticMatches, 10 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2018-10-22 16:07:24,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-10-22 16:07:24,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-10-22 16:07:24,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-10-22 16:07:24,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 52 transitions. [2018-10-22 16:07:24,148 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 52 transitions. Word has length 31 [2018-10-22 16:07:24,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:24,148 INFO L481 AbstractCegarLoop]: Abstraction has 48 states and 52 transitions. [2018-10-22 16:07:24,148 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-22 16:07:24,149 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 52 transitions. [2018-10-22 16:07:24,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-10-22 16:07:24,150 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:24,150 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:24,150 INFO L424 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:24,151 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:24,151 INFO L82 PathProgramCache]: Analyzing trace with hash 94447981, now seen corresponding path program 3 times [2018-10-22 16:07:24,151 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:24,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:24,152 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:24,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:24,152 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:24,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:24,290 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:24,291 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:24,291 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:24,291 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:24,291 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:24,292 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:24,292 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:24,301 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:24,301 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:24,329 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-10-22 16:07:24,329 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:24,331 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:24,536 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:24,537 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:24,679 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:24,701 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:24,701 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:24,719 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:24,720 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:24,756 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-10-22 16:07:24,756 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:24,761 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:24,773 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:24,774 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:24,889 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:24,891 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:24,891 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 18 [2018-10-22 16:07:24,891 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:24,892 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-22 16:07:24,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-22 16:07:24,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=235, Unknown=0, NotChecked=0, Total=306 [2018-10-22 16:07:24,893 INFO L87 Difference]: Start difference. First operand 48 states and 52 transitions. Second operand 18 states. [2018-10-22 16:07:25,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:25,392 INFO L93 Difference]: Finished difference Result 87 states and 98 transitions. [2018-10-22 16:07:25,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-22 16:07:25,392 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 39 [2018-10-22 16:07:25,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:25,394 INFO L225 Difference]: With dead ends: 87 [2018-10-22 16:07:25,395 INFO L226 Difference]: Without dead ends: 66 [2018-10-22 16:07:25,396 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 133 SyntacticMatches, 16 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 267 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=163, Invalid=487, Unknown=0, NotChecked=0, Total=650 [2018-10-22 16:07:25,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-10-22 16:07:25,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 50. [2018-10-22 16:07:25,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-10-22 16:07:25,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-10-22 16:07:25,405 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 39 [2018-10-22 16:07:25,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:25,406 INFO L481 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-10-22 16:07:25,406 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-22 16:07:25,406 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-10-22 16:07:25,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-10-22 16:07:25,407 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:25,407 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:25,408 INFO L424 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:25,408 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:25,408 INFO L82 PathProgramCache]: Analyzing trace with hash 594202361, now seen corresponding path program 1 times [2018-10-22 16:07:25,408 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:25,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:25,409 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:25,410 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:25,410 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:25,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:25,624 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:25,625 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:25,625 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:25,625 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 40 with the following transitions: [2018-10-22 16:07:25,626 INFO L202 CegarAbsIntRunner]: [0], [4], [8], [12], [16], [20], [22], [26], [30], [34], [36], [40], [44], [50], [52], [57], [60], [62], [65], [67], [68], [69], [70], [72], [73] [2018-10-22 16:07:25,628 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-22 16:07:25,628 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-22 16:07:25,997 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-22 16:07:25,997 INFO L272 AbstractInterpreter]: Visited 25 different actions 368 times. Merged at 12 different actions 164 times. Widened at 5 different actions 32 times. Found 21 fixpoints after 4 different actions. Largest state had 14 variables. [2018-10-22 16:07:26,034 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:26,034 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-22 16:07:26,034 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:26,034 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:26,049 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:26,049 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:26,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:26,063 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:26,182 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:26,183 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:26,355 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:26,376 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:26,376 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:26,393 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:26,393 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:26,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:26,420 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:26,429 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:26,430 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:26,615 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:26,616 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:26,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 17 [2018-10-22 16:07:26,616 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:26,619 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-22 16:07:26,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-22 16:07:26,621 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-10-22 16:07:26,621 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 17 states. [2018-10-22 16:07:26,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:26,994 INFO L93 Difference]: Finished difference Result 103 states and 118 transitions. [2018-10-22 16:07:26,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-22 16:07:26,994 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 39 [2018-10-22 16:07:26,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:26,995 INFO L225 Difference]: With dead ends: 103 [2018-10-22 16:07:26,995 INFO L226 Difference]: Without dead ends: 82 [2018-10-22 16:07:26,996 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 134 SyntacticMatches, 16 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 251 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=171, Invalid=531, Unknown=0, NotChecked=0, Total=702 [2018-10-22 16:07:26,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-10-22 16:07:27,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 50. [2018-10-22 16:07:27,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-10-22 16:07:27,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-10-22 16:07:27,006 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 39 [2018-10-22 16:07:27,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:27,007 INFO L481 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-10-22 16:07:27,007 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-22 16:07:27,007 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-10-22 16:07:27,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-10-22 16:07:27,008 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:27,008 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:27,008 INFO L424 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:27,009 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:27,009 INFO L82 PathProgramCache]: Analyzing trace with hash -1103599739, now seen corresponding path program 2 times [2018-10-22 16:07:27,009 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:27,010 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:27,010 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:27,010 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:27,010 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:27,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:27,133 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:27,133 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:27,133 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:27,134 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:27,134 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:27,134 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:27,134 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:27,141 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:27,141 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:27,154 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:27,155 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:27,157 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:27,353 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:27,354 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:27,478 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:27,499 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:27,499 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:27,515 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:27,515 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:27,546 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:27,546 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:27,550 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:27,557 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:27,558 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:27,667 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:27,669 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:27,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 16 [2018-10-22 16:07:27,669 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:27,670 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-22 16:07:27,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-22 16:07:27,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2018-10-22 16:07:27,671 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 16 states. [2018-10-22 16:07:27,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:27,992 INFO L93 Difference]: Finished difference Result 122 states and 142 transitions. [2018-10-22 16:07:27,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-22 16:07:27,993 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 39 [2018-10-22 16:07:27,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:27,995 INFO L225 Difference]: With dead ends: 122 [2018-10-22 16:07:27,995 INFO L226 Difference]: Without dead ends: 101 [2018-10-22 16:07:27,995 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 135 SyntacticMatches, 16 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=163, Invalid=487, Unknown=0, NotChecked=0, Total=650 [2018-10-22 16:07:27,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-10-22 16:07:28,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 53. [2018-10-22 16:07:28,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-10-22 16:07:28,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2018-10-22 16:07:28,007 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 39 [2018-10-22 16:07:28,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:28,008 INFO L481 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2018-10-22 16:07:28,008 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-22 16:07:28,008 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2018-10-22 16:07:28,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-10-22 16:07:28,009 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:28,009 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:28,010 INFO L424 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:28,010 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:28,010 INFO L82 PathProgramCache]: Analyzing trace with hash -1990570393, now seen corresponding path program 4 times [2018-10-22 16:07:28,010 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:28,011 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:28,011 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:28,011 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:28,011 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:28,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:28,095 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 14 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-22 16:07:28,095 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:28,095 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:28,095 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:28,096 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:28,096 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:28,096 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:28,112 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:28,112 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:28,151 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:28,151 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:28,153 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:28,512 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:28,513 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:28,651 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:28,672 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:28,672 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:28,688 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:28,689 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:28,721 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:28,721 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:28,725 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:28,731 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:28,731 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:28,807 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 16 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-22 16:07:28,809 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:28,810 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8, 8, 8] total 11 [2018-10-22 16:07:28,810 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:28,810 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-22 16:07:28,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-22 16:07:28,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-10-22 16:07:28,812 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand 11 states. [2018-10-22 16:07:29,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:29,141 INFO L93 Difference]: Finished difference Result 63 states and 68 transitions. [2018-10-22 16:07:29,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-22 16:07:29,142 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 41 [2018-10-22 16:07:29,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:29,143 INFO L225 Difference]: With dead ends: 63 [2018-10-22 16:07:29,143 INFO L226 Difference]: Without dead ends: 61 [2018-10-22 16:07:29,143 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 152 SyntacticMatches, 14 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-10-22 16:07:29,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-10-22 16:07:29,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-10-22 16:07:29,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-10-22 16:07:29,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 66 transitions. [2018-10-22 16:07:29,153 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 66 transitions. Word has length 41 [2018-10-22 16:07:29,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:29,154 INFO L481 AbstractCegarLoop]: Abstraction has 61 states and 66 transitions. [2018-10-22 16:07:29,154 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-22 16:07:29,154 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 66 transitions. [2018-10-22 16:07:29,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-10-22 16:07:29,160 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:29,160 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:29,160 INFO L424 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:29,160 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:29,161 INFO L82 PathProgramCache]: Analyzing trace with hash 1735104395, now seen corresponding path program 5 times [2018-10-22 16:07:29,161 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:29,161 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:29,161 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:29,162 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:29,162 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:29,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:29,440 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:29,441 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:29,441 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:29,441 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:29,441 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:29,441 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:29,441 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:29,448 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:29,449 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:29,466 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-10-22 16:07:29,466 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:29,469 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:29,633 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:29,633 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:29,778 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:29,798 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:29,798 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:29,813 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:29,813 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:29,865 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-10-22 16:07:29,866 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:29,870 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:29,881 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:29,881 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:30,134 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:30,136 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:30,136 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 22 [2018-10-22 16:07:30,136 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:30,137 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-10-22 16:07:30,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-10-22 16:07:30,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=359, Unknown=0, NotChecked=0, Total=462 [2018-10-22 16:07:30,138 INFO L87 Difference]: Start difference. First operand 61 states and 66 transitions. Second operand 22 states. [2018-10-22 16:07:30,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:30,497 INFO L93 Difference]: Finished difference Result 110 states and 124 transitions. [2018-10-22 16:07:30,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-22 16:07:30,498 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 49 [2018-10-22 16:07:30,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:30,499 INFO L225 Difference]: With dead ends: 110 [2018-10-22 16:07:30,499 INFO L226 Difference]: Without dead ends: 85 [2018-10-22 16:07:30,500 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 167 SyntacticMatches, 20 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 467 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=233, Invalid=759, Unknown=0, NotChecked=0, Total=992 [2018-10-22 16:07:30,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-10-22 16:07:30,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 63. [2018-10-22 16:07:30,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-10-22 16:07:30,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 68 transitions. [2018-10-22 16:07:30,511 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 68 transitions. Word has length 49 [2018-10-22 16:07:30,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:30,511 INFO L481 AbstractCegarLoop]: Abstraction has 63 states and 68 transitions. [2018-10-22 16:07:30,511 INFO L482 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-10-22 16:07:30,511 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 68 transitions. [2018-10-22 16:07:30,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-10-22 16:07:30,515 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:30,515 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:30,515 INFO L424 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:30,515 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:30,515 INFO L82 PathProgramCache]: Analyzing trace with hash 1916583447, now seen corresponding path program 2 times [2018-10-22 16:07:30,515 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:30,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:30,516 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:30,517 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:30,517 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:30,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:30,856 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:30,856 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:30,856 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:30,857 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:30,857 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:30,857 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:30,857 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:30,865 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:30,865 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:30,880 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:30,880 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:30,882 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:31,008 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:31,008 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:31,074 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:31,094 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:31,094 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:31,109 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:31,109 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:31,144 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:31,144 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:31,147 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:31,159 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:31,159 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:31,309 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:31,311 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:31,311 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 21 [2018-10-22 16:07:31,311 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:31,312 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-10-22 16:07:31,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-10-22 16:07:31,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=329, Unknown=0, NotChecked=0, Total=420 [2018-10-22 16:07:31,313 INFO L87 Difference]: Start difference. First operand 63 states and 68 transitions. Second operand 21 states. [2018-10-22 16:07:31,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:31,704 INFO L93 Difference]: Finished difference Result 132 states and 151 transitions. [2018-10-22 16:07:31,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-22 16:07:31,705 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 49 [2018-10-22 16:07:31,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:31,706 INFO L225 Difference]: With dead ends: 132 [2018-10-22 16:07:31,706 INFO L226 Difference]: Without dead ends: 107 [2018-10-22 16:07:31,707 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 168 SyntacticMatches, 20 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 464 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=253, Invalid=869, Unknown=0, NotChecked=0, Total=1122 [2018-10-22 16:07:31,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-10-22 16:07:31,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 63. [2018-10-22 16:07:31,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-10-22 16:07:31,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 68 transitions. [2018-10-22 16:07:31,723 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 68 transitions. Word has length 49 [2018-10-22 16:07:31,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:31,723 INFO L481 AbstractCegarLoop]: Abstraction has 63 states and 68 transitions. [2018-10-22 16:07:31,723 INFO L482 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-10-22 16:07:31,723 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 68 transitions. [2018-10-22 16:07:31,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-10-22 16:07:31,724 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:31,725 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:31,725 INFO L424 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:31,725 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:31,725 INFO L82 PathProgramCache]: Analyzing trace with hash -402778205, now seen corresponding path program 3 times [2018-10-22 16:07:31,725 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:31,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:31,726 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:31,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:31,727 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:31,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:31,877 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:31,877 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:31,877 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:31,878 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:31,878 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:31,878 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:31,878 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:31,886 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:31,886 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:31,905 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-10-22 16:07:31,906 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:31,908 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:32,071 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:32,072 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:32,148 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:32,168 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:32,168 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:32,185 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:32,186 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:32,230 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-10-22 16:07:32,230 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:32,233 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:32,242 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:32,242 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:32,326 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 27 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:32,328 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:32,328 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 20 [2018-10-22 16:07:32,328 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:32,328 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-10-22 16:07:32,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-10-22 16:07:32,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=297, Unknown=0, NotChecked=0, Total=380 [2018-10-22 16:07:32,329 INFO L87 Difference]: Start difference. First operand 63 states and 68 transitions. Second operand 20 states. [2018-10-22 16:07:32,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:32,693 INFO L93 Difference]: Finished difference Result 152 states and 176 transitions. [2018-10-22 16:07:32,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-22 16:07:32,693 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 49 [2018-10-22 16:07:32,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:32,695 INFO L225 Difference]: With dead ends: 152 [2018-10-22 16:07:32,695 INFO L226 Difference]: Without dead ends: 127 [2018-10-22 16:07:32,696 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 169 SyntacticMatches, 20 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 430 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=253, Invalid=869, Unknown=0, NotChecked=0, Total=1122 [2018-10-22 16:07:32,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-10-22 16:07:32,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 63. [2018-10-22 16:07:32,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-10-22 16:07:32,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 68 transitions. [2018-10-22 16:07:32,709 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 68 transitions. Word has length 49 [2018-10-22 16:07:32,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:32,710 INFO L481 AbstractCegarLoop]: Abstraction has 63 states and 68 transitions. [2018-10-22 16:07:32,710 INFO L482 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-10-22 16:07:32,710 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 68 transitions. [2018-10-22 16:07:32,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-10-22 16:07:32,711 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:32,711 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:32,711 INFO L424 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:32,711 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:32,712 INFO L82 PathProgramCache]: Analyzing trace with hash 488662063, now seen corresponding path program 3 times [2018-10-22 16:07:32,712 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:32,712 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:32,713 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:32,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:32,713 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:32,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:33,158 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:33,159 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:33,159 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:33,159 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:33,159 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:33,159 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:33,159 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:33,171 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:33,171 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:33,188 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-10-22 16:07:33,189 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:33,191 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:33,284 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:33,284 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:33,335 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:33,356 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:33,356 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:33,371 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:33,372 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:33,415 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-10-22 16:07:33,415 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:33,418 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:33,426 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:33,426 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:33,498 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 27 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:33,499 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:33,499 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 19 [2018-10-22 16:07:33,499 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:33,500 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-22 16:07:33,500 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-22 16:07:33,500 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=263, Unknown=0, NotChecked=0, Total=342 [2018-10-22 16:07:33,500 INFO L87 Difference]: Start difference. First operand 63 states and 68 transitions. Second operand 19 states. [2018-10-22 16:07:34,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:34,096 INFO L93 Difference]: Finished difference Result 175 states and 205 transitions. [2018-10-22 16:07:34,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-22 16:07:34,097 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 49 [2018-10-22 16:07:34,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:34,099 INFO L225 Difference]: With dead ends: 175 [2018-10-22 16:07:34,099 INFO L226 Difference]: Without dead ends: 150 [2018-10-22 16:07:34,100 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 170 SyntacticMatches, 20 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 359 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=233, Invalid=759, Unknown=0, NotChecked=0, Total=992 [2018-10-22 16:07:34,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-10-22 16:07:34,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 66. [2018-10-22 16:07:34,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-10-22 16:07:34,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 72 transitions. [2018-10-22 16:07:34,115 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 72 transitions. Word has length 49 [2018-10-22 16:07:34,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:34,115 INFO L481 AbstractCegarLoop]: Abstraction has 66 states and 72 transitions. [2018-10-22 16:07:34,115 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-22 16:07:34,115 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 72 transitions. [2018-10-22 16:07:34,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-10-22 16:07:34,116 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:34,116 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:34,116 INFO L424 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:34,116 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:34,117 INFO L82 PathProgramCache]: Analyzing trace with hash -396473339, now seen corresponding path program 6 times [2018-10-22 16:07:34,117 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:34,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:34,118 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:34,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:34,118 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:34,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:34,248 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 25 proven. 28 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-22 16:07:34,248 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:34,248 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:34,248 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:34,248 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:34,249 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:34,249 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:34,256 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:07:34,256 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:07:34,272 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-10-22 16:07:34,272 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:34,274 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:34,305 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:34,305 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:34,362 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:34,381 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:34,382 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:34,396 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:07:34,397 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:07:34,444 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-10-22 16:07:34,445 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:34,448 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:34,452 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:34,452 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:34,553 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 26 proven. 21 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-10-22 16:07:34,554 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:34,555 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9, 9, 9] total 12 [2018-10-22 16:07:34,555 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:34,555 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-22 16:07:34,555 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-22 16:07:34,555 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-10-22 16:07:34,555 INFO L87 Difference]: Start difference. First operand 66 states and 72 transitions. Second operand 12 states. [2018-10-22 16:07:34,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:34,714 INFO L93 Difference]: Finished difference Result 76 states and 82 transitions. [2018-10-22 16:07:34,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-22 16:07:34,714 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 51 [2018-10-22 16:07:34,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:34,715 INFO L225 Difference]: With dead ends: 76 [2018-10-22 16:07:34,716 INFO L226 Difference]: Without dead ends: 74 [2018-10-22 16:07:34,717 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 189 SyntacticMatches, 18 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2018-10-22 16:07:34,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-10-22 16:07:34,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2018-10-22 16:07:34,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-10-22 16:07:34,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 80 transitions. [2018-10-22 16:07:34,730 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 80 transitions. Word has length 51 [2018-10-22 16:07:34,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:34,730 INFO L481 AbstractCegarLoop]: Abstraction has 74 states and 80 transitions. [2018-10-22 16:07:34,730 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-22 16:07:34,731 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 80 transitions. [2018-10-22 16:07:34,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-10-22 16:07:34,731 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:34,732 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:34,732 INFO L424 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:34,732 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:34,732 INFO L82 PathProgramCache]: Analyzing trace with hash 928978729, now seen corresponding path program 7 times [2018-10-22 16:07:34,732 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:34,733 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:34,733 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:34,733 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:34,733 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:34,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:34,916 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:34,917 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:34,917 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:34,917 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:34,917 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:34,917 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:34,917 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:34,929 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:34,929 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:34,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:34,945 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:35,141 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:35,141 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:35,269 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:35,289 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:35,289 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:35,304 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:35,304 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:35,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:35,345 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:35,357 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:35,357 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:35,457 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:35,458 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:35,458 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 26 [2018-10-22 16:07:35,458 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:35,458 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-10-22 16:07:35,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-10-22 16:07:35,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=509, Unknown=0, NotChecked=0, Total=650 [2018-10-22 16:07:35,459 INFO L87 Difference]: Start difference. First operand 74 states and 80 transitions. Second operand 26 states. [2018-10-22 16:07:35,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:35,933 INFO L93 Difference]: Finished difference Result 133 states and 150 transitions. [2018-10-22 16:07:35,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-22 16:07:35,934 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 59 [2018-10-22 16:07:35,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:35,935 INFO L225 Difference]: With dead ends: 133 [2018-10-22 16:07:35,935 INFO L226 Difference]: Without dead ends: 104 [2018-10-22 16:07:35,936 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 201 SyntacticMatches, 24 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 722 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=315, Invalid=1091, Unknown=0, NotChecked=0, Total=1406 [2018-10-22 16:07:35,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-10-22 16:07:35,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 76. [2018-10-22 16:07:35,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-10-22 16:07:35,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 82 transitions. [2018-10-22 16:07:35,949 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 82 transitions. Word has length 59 [2018-10-22 16:07:35,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:35,949 INFO L481 AbstractCegarLoop]: Abstraction has 76 states and 82 transitions. [2018-10-22 16:07:35,949 INFO L482 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-10-22 16:07:35,949 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 82 transitions. [2018-10-22 16:07:35,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-10-22 16:07:35,950 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:35,950 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 4, 4, 4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:35,950 INFO L424 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:35,950 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:35,950 INFO L82 PathProgramCache]: Analyzing trace with hash 277511861, now seen corresponding path program 4 times [2018-10-22 16:07:35,950 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:35,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:35,951 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:35,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:35,951 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:35,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:36,173 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:36,174 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:36,174 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:36,174 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:36,174 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:36,174 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:36,174 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:36,188 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:36,188 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:36,229 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:36,229 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:36,231 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:36,436 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:36,436 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:36,555 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:36,576 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:36,576 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:36,592 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:36,592 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:36,635 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:36,635 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:36,638 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:36,648 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:36,648 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:36,735 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:36,737 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:36,737 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 25 [2018-10-22 16:07:36,737 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:36,737 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-10-22 16:07:36,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-10-22 16:07:36,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=474, Unknown=0, NotChecked=0, Total=600 [2018-10-22 16:07:36,738 INFO L87 Difference]: Start difference. First operand 76 states and 82 transitions. Second operand 25 states. [2018-10-22 16:07:37,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:37,377 INFO L93 Difference]: Finished difference Result 161 states and 184 transitions. [2018-10-22 16:07:37,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-22 16:07:37,377 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 59 [2018-10-22 16:07:37,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:37,379 INFO L225 Difference]: With dead ends: 161 [2018-10-22 16:07:37,379 INFO L226 Difference]: Without dead ends: 132 [2018-10-22 16:07:37,380 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 202 SyntacticMatches, 24 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 742 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=351, Invalid=1289, Unknown=0, NotChecked=0, Total=1640 [2018-10-22 16:07:37,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-10-22 16:07:37,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 76. [2018-10-22 16:07:37,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-10-22 16:07:37,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 82 transitions. [2018-10-22 16:07:37,397 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 82 transitions. Word has length 59 [2018-10-22 16:07:37,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:37,398 INFO L481 AbstractCegarLoop]: Abstraction has 76 states and 82 transitions. [2018-10-22 16:07:37,398 INFO L482 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-10-22 16:07:37,398 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 82 transitions. [2018-10-22 16:07:37,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-10-22 16:07:37,398 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:37,398 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 4, 4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:37,399 INFO L424 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:37,399 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:37,399 INFO L82 PathProgramCache]: Analyzing trace with hash -129869503, now seen corresponding path program 5 times [2018-10-22 16:07:37,399 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:37,400 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:37,400 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:37,400 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:37,400 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:37,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:37,583 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 44 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:37,583 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:37,583 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:37,583 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:37,584 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:37,584 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:37,584 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:37,592 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:37,592 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:37,613 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2018-10-22 16:07:37,613 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:37,616 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:37,839 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 44 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:37,839 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:37,926 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 44 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:37,948 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:37,948 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:37,975 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:37,975 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:38,028 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2018-10-22 16:07:38,028 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:38,032 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:38,042 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 44 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:38,043 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:38,268 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 44 proven. 12 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:38,271 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:38,271 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 24 [2018-10-22 16:07:38,271 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:38,271 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-10-22 16:07:38,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-10-22 16:07:38,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=437, Unknown=0, NotChecked=0, Total=552 [2018-10-22 16:07:38,272 INFO L87 Difference]: Start difference. First operand 76 states and 82 transitions. Second operand 24 states. [2018-10-22 16:07:39,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:39,737 INFO L93 Difference]: Finished difference Result 187 states and 216 transitions. [2018-10-22 16:07:39,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-22 16:07:39,737 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 59 [2018-10-22 16:07:39,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:39,738 INFO L225 Difference]: With dead ends: 187 [2018-10-22 16:07:39,738 INFO L226 Difference]: Without dead ends: 158 [2018-10-22 16:07:39,739 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 203 SyntacticMatches, 24 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 724 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=364, Invalid=1358, Unknown=0, NotChecked=0, Total=1722 [2018-10-22 16:07:39,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-10-22 16:07:39,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 76. [2018-10-22 16:07:39,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-10-22 16:07:39,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 82 transitions. [2018-10-22 16:07:39,756 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 82 transitions. Word has length 59 [2018-10-22 16:07:39,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:39,756 INFO L481 AbstractCegarLoop]: Abstraction has 76 states and 82 transitions. [2018-10-22 16:07:39,756 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-10-22 16:07:39,757 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 82 transitions. [2018-10-22 16:07:39,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-10-22 16:07:39,757 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:39,757 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 4, 4, 4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:39,758 INFO L424 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:39,758 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:39,758 INFO L82 PathProgramCache]: Analyzing trace with hash -49846579, now seen corresponding path program 6 times [2018-10-22 16:07:39,758 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:39,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:39,759 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:39,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:39,759 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:39,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:39,978 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:39,979 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:39,979 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:39,979 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:39,979 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:39,979 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:39,979 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:39,987 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:07:39,988 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:07:40,007 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-10-22 16:07:40,008 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:40,010 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:40,166 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:40,166 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:40,289 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:40,309 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:40,309 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:40,326 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:07:40,327 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:07:40,384 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-10-22 16:07:40,384 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:40,387 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:40,396 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:40,396 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:40,594 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 44 proven. 14 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:40,595 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:40,595 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 23 [2018-10-22 16:07:40,595 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:40,596 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-10-22 16:07:40,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-10-22 16:07:40,596 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=398, Unknown=0, NotChecked=0, Total=506 [2018-10-22 16:07:40,597 INFO L87 Difference]: Start difference. First operand 76 states and 82 transitions. Second operand 23 states. [2018-10-22 16:07:41,064 WARN L179 SmtUtils]: Spent 133.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-10-22 16:07:41,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:41,240 INFO L93 Difference]: Finished difference Result 211 states and 246 transitions. [2018-10-22 16:07:41,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-10-22 16:07:41,241 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 59 [2018-10-22 16:07:41,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:41,242 INFO L225 Difference]: With dead ends: 211 [2018-10-22 16:07:41,242 INFO L226 Difference]: Without dead ends: 182 [2018-10-22 16:07:41,243 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 204 SyntacticMatches, 24 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 659 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=351, Invalid=1289, Unknown=0, NotChecked=0, Total=1640 [2018-10-22 16:07:41,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-10-22 16:07:41,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 76. [2018-10-22 16:07:41,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-10-22 16:07:41,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 82 transitions. [2018-10-22 16:07:41,263 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 82 transitions. Word has length 59 [2018-10-22 16:07:41,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:41,263 INFO L481 AbstractCegarLoop]: Abstraction has 76 states and 82 transitions. [2018-10-22 16:07:41,263 INFO L482 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-10-22 16:07:41,263 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 82 transitions. [2018-10-22 16:07:41,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-10-22 16:07:41,264 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:41,264 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:41,264 INFO L424 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:41,264 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:41,264 INFO L82 PathProgramCache]: Analyzing trace with hash 1451911001, now seen corresponding path program 4 times [2018-10-22 16:07:41,265 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:41,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:41,265 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:41,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:41,265 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:41,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:42,255 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:42,255 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:42,255 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:42,256 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:42,256 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:42,256 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:42,256 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:42,263 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:42,263 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:42,281 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:42,281 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:42,282 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:42,389 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:42,389 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:42,456 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:42,476 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:42,476 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:42,491 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:42,491 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:42,535 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:42,536 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:42,539 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:42,549 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:42,549 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:42,658 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 44 proven. 20 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:42,660 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:42,660 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 22 [2018-10-22 16:07:42,660 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:42,661 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-10-22 16:07:42,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-10-22 16:07:42,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=357, Unknown=0, NotChecked=0, Total=462 [2018-10-22 16:07:42,661 INFO L87 Difference]: Start difference. First operand 76 states and 82 transitions. Second operand 22 states. [2018-10-22 16:07:43,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:43,053 INFO L93 Difference]: Finished difference Result 238 states and 280 transitions. [2018-10-22 16:07:43,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-22 16:07:43,053 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 59 [2018-10-22 16:07:43,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:43,055 INFO L225 Difference]: With dead ends: 238 [2018-10-22 16:07:43,055 INFO L226 Difference]: Without dead ends: 209 [2018-10-22 16:07:43,056 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 205 SyntacticMatches, 24 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 544 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=315, Invalid=1091, Unknown=0, NotChecked=0, Total=1406 [2018-10-22 16:07:43,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-10-22 16:07:43,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 79. [2018-10-22 16:07:43,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-10-22 16:07:43,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 86 transitions. [2018-10-22 16:07:43,080 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 86 transitions. Word has length 59 [2018-10-22 16:07:43,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:43,080 INFO L481 AbstractCegarLoop]: Abstraction has 79 states and 86 transitions. [2018-10-22 16:07:43,080 INFO L482 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-10-22 16:07:43,080 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 86 transitions. [2018-10-22 16:07:43,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-10-22 16:07:43,081 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:43,081 INFO L375 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:43,081 INFO L424 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:43,082 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:43,082 INFO L82 PathProgramCache]: Analyzing trace with hash 1954413347, now seen corresponding path program 8 times [2018-10-22 16:07:43,082 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:43,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:43,083 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:43,083 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:43,083 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:43,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:43,381 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 37 proven. 46 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-10-22 16:07:43,382 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:43,382 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:43,382 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:43,382 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:43,382 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:43,382 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:43,389 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:43,389 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:43,409 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:43,409 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:43,411 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:43,443 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:43,443 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:43,501 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:43,520 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:43,520 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:43,536 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:43,536 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:43,578 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:43,578 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:43,581 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:43,588 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:43,588 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:43,664 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 38 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-10-22 16:07:43,665 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:43,665 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10, 10, 10] total 13 [2018-10-22 16:07:43,665 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:43,666 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-22 16:07:43,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-22 16:07:43,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-10-22 16:07:43,666 INFO L87 Difference]: Start difference. First operand 79 states and 86 transitions. Second operand 13 states. [2018-10-22 16:07:43,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:43,812 INFO L93 Difference]: Finished difference Result 89 states and 96 transitions. [2018-10-22 16:07:43,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-22 16:07:43,813 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 61 [2018-10-22 16:07:43,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:43,814 INFO L225 Difference]: With dead ends: 89 [2018-10-22 16:07:43,814 INFO L226 Difference]: Without dead ends: 87 [2018-10-22 16:07:43,815 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 226 SyntacticMatches, 22 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2018-10-22 16:07:43,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-10-22 16:07:43,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2018-10-22 16:07:43,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-10-22 16:07:43,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 94 transitions. [2018-10-22 16:07:43,837 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 94 transitions. Word has length 61 [2018-10-22 16:07:43,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:43,837 INFO L481 AbstractCegarLoop]: Abstraction has 87 states and 94 transitions. [2018-10-22 16:07:43,837 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-22 16:07:43,837 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 94 transitions. [2018-10-22 16:07:43,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-10-22 16:07:43,838 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:43,838 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:43,838 INFO L424 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:43,838 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:43,838 INFO L82 PathProgramCache]: Analyzing trace with hash 1550108743, now seen corresponding path program 9 times [2018-10-22 16:07:43,838 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:43,839 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:43,839 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:43,839 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:43,839 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:43,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:44,600 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:44,600 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:44,600 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:44,601 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:44,601 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:44,601 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:44,601 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:44,608 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:44,609 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:44,628 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-10-22 16:07:44,628 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:44,630 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:45,012 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:45,012 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:45,107 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:45,127 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:45,127 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:45,142 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:45,142 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:45,214 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-10-22 16:07:45,214 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:45,218 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:45,231 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:45,231 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:45,347 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:45,348 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:45,348 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 30 [2018-10-22 16:07:45,348 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:45,348 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-10-22 16:07:45,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-10-22 16:07:45,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=185, Invalid=685, Unknown=0, NotChecked=0, Total=870 [2018-10-22 16:07:45,349 INFO L87 Difference]: Start difference. First operand 87 states and 94 transitions. Second operand 30 states. [2018-10-22 16:07:45,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:45,810 INFO L93 Difference]: Finished difference Result 156 states and 176 transitions. [2018-10-22 16:07:45,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-22 16:07:45,812 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 69 [2018-10-22 16:07:45,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:45,813 INFO L225 Difference]: With dead ends: 156 [2018-10-22 16:07:45,813 INFO L226 Difference]: Without dead ends: 123 [2018-10-22 16:07:45,814 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 305 GetRequests, 235 SyntacticMatches, 28 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1032 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=409, Invalid=1483, Unknown=0, NotChecked=0, Total=1892 [2018-10-22 16:07:45,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-10-22 16:07:45,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 89. [2018-10-22 16:07:45,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-10-22 16:07:45,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-10-22 16:07:45,840 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 69 [2018-10-22 16:07:45,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:45,840 INFO L481 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-10-22 16:07:45,840 INFO L482 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-10-22 16:07:45,840 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-10-22 16:07:45,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-10-22 16:07:45,841 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:45,841 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:45,841 INFO L424 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:45,841 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:45,842 INFO L82 PathProgramCache]: Analyzing trace with hash 1825386707, now seen corresponding path program 7 times [2018-10-22 16:07:45,842 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:45,842 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:45,842 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:45,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:45,843 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:45,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:46,150 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:46,151 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:46,151 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:46,151 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:46,151 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:46,151 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:46,151 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:46,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:46,158 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:46,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:46,180 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:46,790 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:46,790 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:46,878 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:46,899 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:46,899 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:46,914 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:46,914 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:07:46,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:46,960 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:46,972 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:46,972 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:47,079 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:47,080 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:47,080 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 29 [2018-10-22 16:07:47,080 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:47,081 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-10-22 16:07:47,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-10-22 16:07:47,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=645, Unknown=0, NotChecked=0, Total=812 [2018-10-22 16:07:47,081 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 29 states. [2018-10-22 16:07:47,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:47,582 INFO L93 Difference]: Finished difference Result 190 states and 217 transitions. [2018-10-22 16:07:47,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-22 16:07:47,583 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 69 [2018-10-22 16:07:47,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:47,584 INFO L225 Difference]: With dead ends: 190 [2018-10-22 16:07:47,584 INFO L226 Difference]: Without dead ends: 157 [2018-10-22 16:07:47,585 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 310 GetRequests, 236 SyntacticMatches, 28 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1085 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=465, Invalid=1791, Unknown=0, NotChecked=0, Total=2256 [2018-10-22 16:07:47,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-10-22 16:07:47,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 89. [2018-10-22 16:07:47,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-10-22 16:07:47,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-10-22 16:07:47,611 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 69 [2018-10-22 16:07:47,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:47,612 INFO L481 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-10-22 16:07:47,612 INFO L482 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-10-22 16:07:47,612 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-10-22 16:07:47,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-10-22 16:07:47,612 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:47,613 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:47,613 INFO L424 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:47,613 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:47,613 INFO L82 PathProgramCache]: Analyzing trace with hash -1995551649, now seen corresponding path program 8 times [2018-10-22 16:07:47,613 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:47,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:47,614 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:07:47,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:47,614 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:47,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:47,781 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:47,781 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:47,781 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:47,782 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:47,782 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:47,782 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:47,782 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:47,791 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:47,792 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:47,812 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:47,813 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:47,815 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:48,057 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:48,058 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:48,150 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:48,170 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:48,170 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:48,186 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:07:48,186 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:48,232 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:07:48,233 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:48,236 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:48,248 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:48,249 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:48,369 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:48,370 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:48,370 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 28 [2018-10-22 16:07:48,370 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:48,370 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-10-22 16:07:48,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-10-22 16:07:48,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=603, Unknown=0, NotChecked=0, Total=756 [2018-10-22 16:07:48,371 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 28 states. [2018-10-22 16:07:48,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:48,899 INFO L93 Difference]: Finished difference Result 222 states and 256 transitions. [2018-10-22 16:07:48,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-10-22 16:07:48,899 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 69 [2018-10-22 16:07:48,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:48,900 INFO L225 Difference]: With dead ends: 222 [2018-10-22 16:07:48,900 INFO L226 Difference]: Without dead ends: 189 [2018-10-22 16:07:48,901 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 313 GetRequests, 237 SyntacticMatches, 28 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1095 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=496, Invalid=1954, Unknown=0, NotChecked=0, Total=2450 [2018-10-22 16:07:48,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-10-22 16:07:48,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 89. [2018-10-22 16:07:48,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-10-22 16:07:48,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-10-22 16:07:48,932 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 69 [2018-10-22 16:07:48,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:48,932 INFO L481 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-10-22 16:07:48,932 INFO L482 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-10-22 16:07:48,932 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-10-22 16:07:48,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-10-22 16:07:48,933 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:48,933 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:48,933 INFO L424 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:48,933 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:48,933 INFO L82 PathProgramCache]: Analyzing trace with hash 632871659, now seen corresponding path program 9 times [2018-10-22 16:07:48,933 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:48,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:48,934 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:48,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:48,934 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:48,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:49,109 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:49,110 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:49,110 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:49,110 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:49,110 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:49,110 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:49,110 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:49,118 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:49,118 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:49,138 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-10-22 16:07:49,139 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:49,140 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:49,302 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:49,302 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:49,392 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:49,412 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:49,412 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:49,427 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:07:49,427 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:07:49,500 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-10-22 16:07:49,501 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:49,504 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:49,518 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:49,518 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:49,668 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 65 proven. 18 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:49,669 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:49,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 27 [2018-10-22 16:07:49,669 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:49,670 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-10-22 16:07:49,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-10-22 16:07:49,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=559, Unknown=0, NotChecked=0, Total=702 [2018-10-22 16:07:49,670 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 27 states. [2018-10-22 16:07:50,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:50,635 INFO L93 Difference]: Finished difference Result 252 states and 293 transitions. [2018-10-22 16:07:50,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-10-22 16:07:50,636 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 69 [2018-10-22 16:07:50,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:50,637 INFO L225 Difference]: With dead ends: 252 [2018-10-22 16:07:50,638 INFO L226 Difference]: Without dead ends: 219 [2018-10-22 16:07:50,639 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 314 GetRequests, 238 SyntacticMatches, 28 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1048 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=496, Invalid=1954, Unknown=0, NotChecked=0, Total=2450 [2018-10-22 16:07:50,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-10-22 16:07:50,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 89. [2018-10-22 16:07:50,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-10-22 16:07:50,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-10-22 16:07:50,678 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 69 [2018-10-22 16:07:50,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:50,678 INFO L481 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-10-22 16:07:50,678 INFO L482 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-10-22 16:07:50,678 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-10-22 16:07:50,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-10-22 16:07:50,679 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:50,679 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:50,679 INFO L424 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:50,679 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:50,679 INFO L82 PathProgramCache]: Analyzing trace with hash 613260407, now seen corresponding path program 10 times [2018-10-22 16:07:50,679 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:50,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:50,680 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:50,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:50,680 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:50,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:50,894 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:50,895 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:50,895 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:50,895 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:50,895 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:50,895 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:50,895 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:50,902 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:50,902 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:50,926 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:50,927 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:50,929 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:51,378 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:51,379 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:51,499 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:51,519 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:51,519 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:51,534 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:51,534 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:51,586 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:51,587 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:51,590 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:51,603 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:51,604 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:51,728 INFO L134 CoverageAnalysis]: Checked inductivity of 127 backedges. 65 proven. 22 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:51,729 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:51,730 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 26 [2018-10-22 16:07:51,730 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:51,730 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-10-22 16:07:51,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-10-22 16:07:51,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=513, Unknown=0, NotChecked=0, Total=650 [2018-10-22 16:07:51,731 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 26 states. [2018-10-22 16:07:52,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:52,283 INFO L93 Difference]: Finished difference Result 280 states and 328 transitions. [2018-10-22 16:07:52,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-10-22 16:07:52,284 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 69 [2018-10-22 16:07:52,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:52,285 INFO L225 Difference]: With dead ends: 280 [2018-10-22 16:07:52,285 INFO L226 Difference]: Without dead ends: 247 [2018-10-22 16:07:52,286 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 313 GetRequests, 239 SyntacticMatches, 28 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 938 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=465, Invalid=1791, Unknown=0, NotChecked=0, Total=2256 [2018-10-22 16:07:52,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2018-10-22 16:07:52,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 89. [2018-10-22 16:07:52,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-10-22 16:07:52,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-10-22 16:07:52,318 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 69 [2018-10-22 16:07:52,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:52,318 INFO L481 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-10-22 16:07:52,318 INFO L482 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-10-22 16:07:52,318 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-10-22 16:07:52,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-10-22 16:07:52,319 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:52,319 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:52,319 INFO L424 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:52,319 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:52,320 INFO L82 PathProgramCache]: Analyzing trace with hash 1618825475, now seen corresponding path program 5 times [2018-10-22 16:07:52,320 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:52,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:52,320 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:52,321 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:52,321 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:52,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:52,482 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:52,482 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:52,482 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:52,482 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:52,483 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:52,483 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:52,483 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:52,489 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:52,490 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:52,512 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-10-22 16:07:52,512 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:52,514 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:52,830 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:52,830 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:52,920 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:52,939 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:52,939 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:52,956 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:52,956 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:53,028 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-10-22 16:07:53,028 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:53,031 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:53,044 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:53,044 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:53,210 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 65 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:53,211 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:53,211 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 25 [2018-10-22 16:07:53,211 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:53,212 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-10-22 16:07:53,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-10-22 16:07:53,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=465, Unknown=0, NotChecked=0, Total=600 [2018-10-22 16:07:53,212 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 25 states. [2018-10-22 16:07:53,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:53,786 INFO L93 Difference]: Finished difference Result 311 states and 367 transitions. [2018-10-22 16:07:53,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-10-22 16:07:53,789 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 69 [2018-10-22 16:07:53,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:53,791 INFO L225 Difference]: With dead ends: 311 [2018-10-22 16:07:53,791 INFO L226 Difference]: Without dead ends: 278 [2018-10-22 16:07:53,792 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 310 GetRequests, 240 SyntacticMatches, 28 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 767 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=409, Invalid=1483, Unknown=0, NotChecked=0, Total=1892 [2018-10-22 16:07:53,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2018-10-22 16:07:53,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 92. [2018-10-22 16:07:53,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-10-22 16:07:53,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 100 transitions. [2018-10-22 16:07:53,834 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 100 transitions. Word has length 69 [2018-10-22 16:07:53,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:53,834 INFO L481 AbstractCegarLoop]: Abstraction has 92 states and 100 transitions. [2018-10-22 16:07:53,834 INFO L482 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-10-22 16:07:53,834 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 100 transitions. [2018-10-22 16:07:53,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-10-22 16:07:53,835 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:53,835 INFO L375 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:53,835 INFO L424 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:53,836 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:53,836 INFO L82 PathProgramCache]: Analyzing trace with hash 2111470529, now seen corresponding path program 10 times [2018-10-22 16:07:53,836 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:53,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:53,836 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:53,837 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:53,837 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:53,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:54,983 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 51 proven. 68 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-10-22 16:07:54,983 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:54,983 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:54,984 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:54,984 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:54,984 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:54,984 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:54,998 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:54,998 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:55,044 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:55,044 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:55,046 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:55,141 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:55,141 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:55,206 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:55,227 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:55,227 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:55,242 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:07:55,242 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:07:55,301 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:07:55,301 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:55,306 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:55,315 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:55,315 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:55,392 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 52 proven. 55 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-10-22 16:07:55,393 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:55,393 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11, 11, 11] total 14 [2018-10-22 16:07:55,393 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:55,394 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-22 16:07:55,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-22 16:07:55,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=134, Unknown=0, NotChecked=0, Total=182 [2018-10-22 16:07:55,394 INFO L87 Difference]: Start difference. First operand 92 states and 100 transitions. Second operand 14 states. [2018-10-22 16:07:56,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:56,115 INFO L93 Difference]: Finished difference Result 102 states and 110 transitions. [2018-10-22 16:07:56,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-22 16:07:56,115 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 71 [2018-10-22 16:07:56,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:56,117 INFO L225 Difference]: With dead ends: 102 [2018-10-22 16:07:56,117 INFO L226 Difference]: Without dead ends: 100 [2018-10-22 16:07:56,117 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 303 GetRequests, 263 SyntacticMatches, 26 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 132 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=61, Invalid=179, Unknown=0, NotChecked=0, Total=240 [2018-10-22 16:07:56,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-10-22 16:07:56,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2018-10-22 16:07:56,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-10-22 16:07:56,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 108 transitions. [2018-10-22 16:07:56,146 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 108 transitions. Word has length 71 [2018-10-22 16:07:56,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:56,147 INFO L481 AbstractCegarLoop]: Abstraction has 100 states and 108 transitions. [2018-10-22 16:07:56,147 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-22 16:07:56,147 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 108 transitions. [2018-10-22 16:07:56,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-10-22 16:07:56,148 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:56,148 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:56,148 INFO L424 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:56,148 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:56,148 INFO L82 PathProgramCache]: Analyzing trace with hash 58575589, now seen corresponding path program 11 times [2018-10-22 16:07:56,148 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:56,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:56,149 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:56,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:56,149 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:56,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:56,432 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:07:56,432 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:56,432 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:56,432 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:56,432 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:56,432 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:56,433 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:56,441 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:56,441 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:56,468 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-10-22 16:07:56,468 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:56,471 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:57,451 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:07:57,451 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:57,577 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:07:57,597 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:57,597 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:57,612 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:57,612 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:57,701 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-10-22 16:07:57,702 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:57,706 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:57,724 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:07:57,725 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:57,914 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:07:57,915 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:57,915 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 34 [2018-10-22 16:07:57,915 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:57,916 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-10-22 16:07:57,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-10-22 16:07:57,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=235, Invalid=887, Unknown=0, NotChecked=0, Total=1122 [2018-10-22 16:07:57,916 INFO L87 Difference]: Start difference. First operand 100 states and 108 transitions. Second operand 34 states. [2018-10-22 16:07:58,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:07:58,439 INFO L93 Difference]: Finished difference Result 179 states and 202 transitions. [2018-10-22 16:07:58,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-22 16:07:58,445 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 79 [2018-10-22 16:07:58,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:07:58,446 INFO L225 Difference]: With dead ends: 179 [2018-10-22 16:07:58,446 INFO L226 Difference]: Without dead ends: 142 [2018-10-22 16:07:58,447 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 349 GetRequests, 269 SyntacticMatches, 32 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1397 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=515, Invalid=1935, Unknown=0, NotChecked=0, Total=2450 [2018-10-22 16:07:58,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-10-22 16:07:58,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 102. [2018-10-22 16:07:58,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-10-22 16:07:58,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-10-22 16:07:58,494 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-10-22 16:07:58,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:07:58,494 INFO L481 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-10-22 16:07:58,495 INFO L482 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-10-22 16:07:58,495 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-10-22 16:07:58,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-10-22 16:07:58,495 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:07:58,495 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:07:58,496 INFO L424 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:07:58,496 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:07:58,496 INFO L82 PathProgramCache]: Analyzing trace with hash 127267953, now seen corresponding path program 11 times [2018-10-22 16:07:58,496 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:07:58,497 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:58,497 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:07:58,497 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:07:58,497 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:07:58,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:07:58,765 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:07:58,766 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:58,766 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:07:58,766 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:07:58,766 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:07:58,766 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:58,766 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:07:58,773 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:58,773 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:58,889 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-10-22 16:07:58,889 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:58,892 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:59,353 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:07:59,354 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:59,473 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:07:59,494 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:07:59,494 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:07:59,509 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:07:59,509 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:07:59,588 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-10-22 16:07:59,588 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:07:59,592 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:07:59,607 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:07:59,608 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:07:59,864 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:07:59,866 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:07:59,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 33 [2018-10-22 16:07:59,866 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:07:59,867 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-10-22 16:07:59,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-10-22 16:07:59,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=214, Invalid=842, Unknown=0, NotChecked=0, Total=1056 [2018-10-22 16:07:59,868 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 33 states. [2018-10-22 16:08:00,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:00,650 INFO L93 Difference]: Finished difference Result 219 states and 250 transitions. [2018-10-22 16:08:00,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-10-22 16:08:00,650 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 79 [2018-10-22 16:08:00,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:00,651 INFO L225 Difference]: With dead ends: 219 [2018-10-22 16:08:00,652 INFO L226 Difference]: Without dead ends: 182 [2018-10-22 16:08:00,653 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 270 SyntacticMatches, 32 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1493 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=595, Invalid=2375, Unknown=0, NotChecked=0, Total=2970 [2018-10-22 16:08:00,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-10-22 16:08:00,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 102. [2018-10-22 16:08:00,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-10-22 16:08:00,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-10-22 16:08:00,704 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-10-22 16:08:00,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:00,704 INFO L481 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-10-22 16:08:00,705 INFO L482 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-10-22 16:08:00,705 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-10-22 16:08:00,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-10-22 16:08:00,705 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:00,705 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 5, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:00,706 INFO L424 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:00,706 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:00,706 INFO L82 PathProgramCache]: Analyzing trace with hash 310579453, now seen corresponding path program 12 times [2018-10-22 16:08:00,706 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:00,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:00,707 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:00,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:00,707 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:00,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:01,158 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:01,158 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:01,159 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:01,159 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:01,159 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:01,159 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:01,159 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:01,166 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:01,166 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:01,191 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-10-22 16:08:01,191 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:01,194 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:01,711 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:01,711 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:01,822 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:01,842 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:01,842 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:01,857 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:01,857 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:01,942 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-10-22 16:08:01,942 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:01,946 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:01,964 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:01,964 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:02,127 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:02,128 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:02,128 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 32 [2018-10-22 16:08:02,128 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:02,129 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-10-22 16:08:02,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-10-22 16:08:02,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=795, Unknown=0, NotChecked=0, Total=992 [2018-10-22 16:08:02,130 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 32 states. [2018-10-22 16:08:03,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:03,484 INFO L93 Difference]: Finished difference Result 257 states and 296 transitions. [2018-10-22 16:08:03,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-10-22 16:08:03,485 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 79 [2018-10-22 16:08:03,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:03,487 INFO L225 Difference]: With dead ends: 257 [2018-10-22 16:08:03,487 INFO L226 Difference]: Without dead ends: 220 [2018-10-22 16:08:03,489 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 359 GetRequests, 271 SyntacticMatches, 32 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1543 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=649, Invalid=2657, Unknown=0, NotChecked=0, Total=3306 [2018-10-22 16:08:03,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-10-22 16:08:03,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 102. [2018-10-22 16:08:03,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-10-22 16:08:03,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-10-22 16:08:03,538 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-10-22 16:08:03,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:03,538 INFO L481 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-10-22 16:08:03,538 INFO L482 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-10-22 16:08:03,539 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-10-22 16:08:03,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-10-22 16:08:03,539 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:03,539 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:03,540 INFO L424 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:03,540 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:03,540 INFO L82 PathProgramCache]: Analyzing trace with hash -1427775351, now seen corresponding path program 13 times [2018-10-22 16:08:03,540 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:03,541 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:03,541 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:03,541 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:03,541 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:03,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:03,771 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 90 proven. 24 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:03,772 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:03,772 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:03,772 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:03,772 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:03,772 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:03,772 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:03,780 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:03,780 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:03,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:03,803 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:04,035 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 90 proven. 24 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:04,035 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:04,141 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 90 proven. 24 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:04,162 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:04,163 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:04,178 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:04,178 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:04,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:04,231 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:04,246 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 90 proven. 24 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:04,247 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:04,540 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 90 proven. 24 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:04,541 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:04,541 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 31 [2018-10-22 16:08:04,541 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:04,541 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-10-22 16:08:04,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-10-22 16:08:04,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=184, Invalid=746, Unknown=0, NotChecked=0, Total=930 [2018-10-22 16:08:04,542 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 31 states. [2018-10-22 16:08:05,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:05,573 INFO L93 Difference]: Finished difference Result 293 states and 340 transitions. [2018-10-22 16:08:05,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-10-22 16:08:05,574 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 79 [2018-10-22 16:08:05,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:05,575 INFO L225 Difference]: With dead ends: 293 [2018-10-22 16:08:05,575 INFO L226 Difference]: Without dead ends: 256 [2018-10-22 16:08:05,576 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 361 GetRequests, 272 SyntacticMatches, 32 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1527 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=668, Invalid=2754, Unknown=0, NotChecked=0, Total=3422 [2018-10-22 16:08:05,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-10-22 16:08:05,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 102. [2018-10-22 16:08:05,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-10-22 16:08:05,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-10-22 16:08:05,619 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-10-22 16:08:05,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:05,619 INFO L481 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-10-22 16:08:05,619 INFO L482 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-10-22 16:08:05,620 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-10-22 16:08:05,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-10-22 16:08:05,620 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:05,620 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 5, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:05,620 INFO L424 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:05,620 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:05,621 INFO L82 PathProgramCache]: Analyzing trace with hash 143598357, now seen corresponding path program 14 times [2018-10-22 16:08:05,621 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:05,621 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:05,621 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:05,622 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:05,622 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:05,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:05,799 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:05,799 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:05,799 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:05,799 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:05,799 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:05,800 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:05,800 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:05,807 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:05,807 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:05,829 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:05,829 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:05,831 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:06,165 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:06,165 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:06,271 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:06,291 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:06,291 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:06,306 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:06,306 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:06,355 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:06,355 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:06,359 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:06,375 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:06,375 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:06,649 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 90 proven. 26 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:06,650 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:06,651 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 30 [2018-10-22 16:08:06,651 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:06,651 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-10-22 16:08:06,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-10-22 16:08:06,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=175, Invalid=695, Unknown=0, NotChecked=0, Total=870 [2018-10-22 16:08:06,652 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 30 states. [2018-10-22 16:08:07,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:07,549 INFO L93 Difference]: Finished difference Result 327 states and 382 transitions. [2018-10-22 16:08:07,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-10-22 16:08:07,549 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 79 [2018-10-22 16:08:07,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:07,550 INFO L225 Difference]: With dead ends: 327 [2018-10-22 16:08:07,551 INFO L226 Difference]: Without dead ends: 290 [2018-10-22 16:08:07,552 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 361 GetRequests, 273 SyntacticMatches, 32 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1436 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=649, Invalid=2657, Unknown=0, NotChecked=0, Total=3306 [2018-10-22 16:08:07,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2018-10-22 16:08:07,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 102. [2018-10-22 16:08:07,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-10-22 16:08:07,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-10-22 16:08:07,604 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-10-22 16:08:07,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:07,604 INFO L481 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-10-22 16:08:07,604 INFO L482 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-10-22 16:08:07,604 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-10-22 16:08:07,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-10-22 16:08:07,605 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:07,605 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:07,605 INFO L424 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:07,605 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:07,605 INFO L82 PathProgramCache]: Analyzing trace with hash -1602250591, now seen corresponding path program 15 times [2018-10-22 16:08:07,605 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:07,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:07,606 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:07,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:07,606 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:07,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:07,821 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:07,821 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:07,821 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:07,821 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:07,821 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:07,821 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:07,821 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:07,828 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:07,828 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:07,854 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-10-22 16:08:07,854 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:07,856 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:08,118 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:08,118 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:08,225 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:08,246 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:08,246 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:08,260 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:08,260 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:08,350 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-10-22 16:08:08,350 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:08,354 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:08,370 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:08,371 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:08,611 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 90 proven. 32 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:08,612 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:08,613 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 29 [2018-10-22 16:08:08,613 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:08,613 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-10-22 16:08:08,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-10-22 16:08:08,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=170, Invalid=642, Unknown=0, NotChecked=0, Total=812 [2018-10-22 16:08:08,614 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 29 states. [2018-10-22 16:08:09,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:09,510 INFO L93 Difference]: Finished difference Result 359 states and 422 transitions. [2018-10-22 16:08:09,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-10-22 16:08:09,511 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 79 [2018-10-22 16:08:09,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:09,512 INFO L225 Difference]: With dead ends: 359 [2018-10-22 16:08:09,512 INFO L226 Difference]: Without dead ends: 322 [2018-10-22 16:08:09,513 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 359 GetRequests, 274 SyntacticMatches, 32 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1267 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=595, Invalid=2375, Unknown=0, NotChecked=0, Total=2970 [2018-10-22 16:08:09,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states. [2018-10-22 16:08:09,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 102. [2018-10-22 16:08:09,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-10-22 16:08:09,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-10-22 16:08:09,583 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 79 [2018-10-22 16:08:09,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:09,584 INFO L481 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-10-22 16:08:09,584 INFO L482 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-10-22 16:08:09,584 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-10-22 16:08:09,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-10-22 16:08:09,585 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:09,585 INFO L375 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:09,585 INFO L424 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:09,585 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:09,585 INFO L82 PathProgramCache]: Analyzing trace with hash -1326972627, now seen corresponding path program 6 times [2018-10-22 16:08:09,585 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:09,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:09,586 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:09,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:09,586 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:09,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:10,074 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:10,074 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:10,075 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:10,075 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:10,075 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:10,075 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:10,075 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:10,082 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:10,082 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:10,107 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-10-22 16:08:10,107 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:10,109 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:10,313 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:10,313 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:10,422 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:10,441 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:10,441 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:10,456 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:10,456 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:10,545 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-10-22 16:08:10,546 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:10,549 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:10,562 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:10,562 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:10,699 INFO L134 CoverageAnalysis]: Checked inductivity of 192 backedges. 90 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:10,700 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:10,700 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 28 [2018-10-22 16:08:10,700 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:10,700 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-10-22 16:08:10,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-10-22 16:08:10,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=587, Unknown=0, NotChecked=0, Total=756 [2018-10-22 16:08:10,701 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 28 states. [2018-10-22 16:08:11,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:11,531 INFO L93 Difference]: Finished difference Result 394 states and 466 transitions. [2018-10-22 16:08:11,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-10-22 16:08:11,531 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 79 [2018-10-22 16:08:11,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:11,533 INFO L225 Difference]: With dead ends: 394 [2018-10-22 16:08:11,533 INFO L226 Difference]: Without dead ends: 357 [2018-10-22 16:08:11,534 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 275 SyntacticMatches, 32 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1028 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=515, Invalid=1935, Unknown=0, NotChecked=0, Total=2450 [2018-10-22 16:08:11,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-10-22 16:08:11,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 105. [2018-10-22 16:08:11,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-10-22 16:08:11,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 114 transitions. [2018-10-22 16:08:11,586 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 114 transitions. Word has length 79 [2018-10-22 16:08:11,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:11,586 INFO L481 AbstractCegarLoop]: Abstraction has 105 states and 114 transitions. [2018-10-22 16:08:11,586 INFO L482 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-10-22 16:08:11,586 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 114 transitions. [2018-10-22 16:08:11,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-10-22 16:08:11,587 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:11,587 INFO L375 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:11,587 INFO L424 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:11,587 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:11,587 INFO L82 PathProgramCache]: Analyzing trace with hash 1957490143, now seen corresponding path program 12 times [2018-10-22 16:08:11,587 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:11,588 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:11,588 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:11,588 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:11,588 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:11,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:11,906 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 67 proven. 94 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-10-22 16:08:11,906 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:11,906 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:11,906 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:11,906 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:11,906 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:11,906 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:11,914 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:11,915 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:11,943 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-10-22 16:08:11,943 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:11,945 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:11,995 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:11,995 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:12,064 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:12,084 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:12,084 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:12,099 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:12,099 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:12,194 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-10-22 16:08:12,194 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:12,199 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:12,207 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:12,207 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:12,295 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 68 proven. 78 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-10-22 16:08:12,296 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:12,297 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12, 12, 12] total 15 [2018-10-22 16:08:12,297 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:12,297 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-22 16:08:12,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-22 16:08:12,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-10-22 16:08:12,297 INFO L87 Difference]: Start difference. First operand 105 states and 114 transitions. Second operand 15 states. [2018-10-22 16:08:12,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:12,556 INFO L93 Difference]: Finished difference Result 115 states and 124 transitions. [2018-10-22 16:08:12,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-22 16:08:12,556 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 81 [2018-10-22 16:08:12,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:12,558 INFO L225 Difference]: With dead ends: 115 [2018-10-22 16:08:12,558 INFO L226 Difference]: Without dead ends: 113 [2018-10-22 16:08:12,558 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 300 SyntacticMatches, 30 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2018-10-22 16:08:12,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-10-22 16:08:12,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-10-22 16:08:12,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-10-22 16:08:12,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 122 transitions. [2018-10-22 16:08:12,615 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 122 transitions. Word has length 81 [2018-10-22 16:08:12,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:12,616 INFO L481 AbstractCegarLoop]: Abstraction has 113 states and 122 transitions. [2018-10-22 16:08:12,616 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-22 16:08:12,616 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 122 transitions. [2018-10-22 16:08:12,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-10-22 16:08:12,617 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:12,617 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:12,617 INFO L424 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:12,617 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:12,617 INFO L82 PathProgramCache]: Analyzing trace with hash -507298045, now seen corresponding path program 13 times [2018-10-22 16:08:12,617 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:12,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:12,618 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:12,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:12,618 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:12,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:12,911 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:12,911 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:12,912 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:12,912 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:12,912 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:12,912 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:12,912 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:12,919 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:12,919 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:12,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:12,941 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:13,234 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:13,234 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:13,374 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:13,396 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:13,397 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:13,411 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:13,411 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:13,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:13,468 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:13,486 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:13,486 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:13,648 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:13,649 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:13,650 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 38 [2018-10-22 16:08:13,650 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:13,650 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-10-22 16:08:13,650 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-10-22 16:08:13,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=291, Invalid=1115, Unknown=0, NotChecked=0, Total=1406 [2018-10-22 16:08:13,651 INFO L87 Difference]: Start difference. First operand 113 states and 122 transitions. Second operand 38 states. [2018-10-22 16:08:14,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:14,264 INFO L93 Difference]: Finished difference Result 202 states and 228 transitions. [2018-10-22 16:08:14,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-10-22 16:08:14,264 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 89 [2018-10-22 16:08:14,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:14,265 INFO L225 Difference]: With dead ends: 202 [2018-10-22 16:08:14,265 INFO L226 Difference]: Without dead ends: 161 [2018-10-22 16:08:14,266 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 393 GetRequests, 303 SyntacticMatches, 36 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1817 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=633, Invalid=2447, Unknown=0, NotChecked=0, Total=3080 [2018-10-22 16:08:14,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-10-22 16:08:14,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 115. [2018-10-22 16:08:14,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-10-22 16:08:14,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-10-22 16:08:14,325 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-10-22 16:08:14,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:14,325 INFO L481 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-10-22 16:08:14,325 INFO L482 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-10-22 16:08:14,326 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-10-22 16:08:14,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-10-22 16:08:14,326 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:14,326 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 7, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:14,327 INFO L424 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:14,327 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:14,327 INFO L82 PathProgramCache]: Analyzing trace with hash -1248990833, now seen corresponding path program 16 times [2018-10-22 16:08:14,327 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:14,328 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:14,328 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:14,328 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:14,328 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:14,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:14,573 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:14,573 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:14,573 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:14,573 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:14,574 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:14,574 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:14,574 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:14,580 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:08:14,581 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:08:14,605 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:08:14,606 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:14,608 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:14,958 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:14,959 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:15,100 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:15,120 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:15,120 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:15,135 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:08:15,135 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:08:15,195 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:08:15,195 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:15,200 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:15,218 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:15,218 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:15,378 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:15,381 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:15,381 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 37 [2018-10-22 16:08:15,381 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:15,381 INFO L460 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-10-22 16:08:15,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-10-22 16:08:15,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=267, Invalid=1065, Unknown=0, NotChecked=0, Total=1332 [2018-10-22 16:08:15,382 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 37 states. [2018-10-22 16:08:16,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:16,103 INFO L93 Difference]: Finished difference Result 248 states and 283 transitions. [2018-10-22 16:08:16,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-10-22 16:08:16,104 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 89 [2018-10-22 16:08:16,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:16,105 INFO L225 Difference]: With dead ends: 248 [2018-10-22 16:08:16,105 INFO L226 Difference]: Without dead ends: 207 [2018-10-22 16:08:16,105 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 400 GetRequests, 304 SyntacticMatches, 36 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1966 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=741, Invalid=3041, Unknown=0, NotChecked=0, Total=3782 [2018-10-22 16:08:16,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-10-22 16:08:16,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 115. [2018-10-22 16:08:16,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-10-22 16:08:16,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-10-22 16:08:16,189 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-10-22 16:08:16,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:16,190 INFO L481 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-10-22 16:08:16,190 INFO L482 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-10-22 16:08:16,190 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-10-22 16:08:16,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-10-22 16:08:16,190 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:16,190 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 6, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:16,191 INFO L424 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:16,191 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:16,191 INFO L82 PathProgramCache]: Analyzing trace with hash 752469787, now seen corresponding path program 17 times [2018-10-22 16:08:16,191 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:16,191 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:16,192 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:16,192 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:16,192 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:16,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:17,144 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:17,145 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:17,145 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:17,145 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:17,145 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:17,145 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:17,145 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:17,152 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:08:17,152 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:17,279 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-10-22 16:08:17,279 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:17,281 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:17,777 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:17,778 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:17,922 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:17,942 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:17,942 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:17,957 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:08:17,957 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:18,061 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-10-22 16:08:18,061 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:18,065 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:18,081 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:18,081 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:18,243 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:18,244 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:18,244 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 36 [2018-10-22 16:08:18,244 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:18,245 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-10-22 16:08:18,245 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-10-22 16:08:18,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=247, Invalid=1013, Unknown=0, NotChecked=0, Total=1260 [2018-10-22 16:08:18,245 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 36 states. [2018-10-22 16:08:19,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:19,136 INFO L93 Difference]: Finished difference Result 292 states and 336 transitions. [2018-10-22 16:08:19,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-10-22 16:08:19,136 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 89 [2018-10-22 16:08:19,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:19,137 INFO L225 Difference]: With dead ends: 292 [2018-10-22 16:08:19,137 INFO L226 Difference]: Without dead ends: 251 [2018-10-22 16:08:19,138 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 305 SyntacticMatches, 36 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2068 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=823, Invalid=3467, Unknown=0, NotChecked=0, Total=4290 [2018-10-22 16:08:19,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2018-10-22 16:08:19,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 115. [2018-10-22 16:08:19,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-10-22 16:08:19,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-10-22 16:08:19,232 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-10-22 16:08:19,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:19,232 INFO L481 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-10-22 16:08:19,232 INFO L482 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-10-22 16:08:19,233 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-10-22 16:08:19,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-10-22 16:08:19,233 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:19,233 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:19,234 INFO L424 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:19,234 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:19,234 INFO L82 PathProgramCache]: Analyzing trace with hash -1940416601, now seen corresponding path program 18 times [2018-10-22 16:08:19,234 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:19,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:19,235 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:19,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:19,235 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:19,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:19,810 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:19,811 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:19,811 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:19,811 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:19,811 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:19,811 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:19,811 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:19,819 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:19,819 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:19,851 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-10-22 16:08:19,852 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:19,854 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:20,134 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:20,135 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:20,278 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:20,298 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:20,299 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:20,314 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:20,314 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:20,422 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-10-22 16:08:20,422 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:20,427 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:20,442 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:20,442 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:20,609 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:20,610 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:20,610 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 35 [2018-10-22 16:08:20,611 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:20,611 INFO L460 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-10-22 16:08:20,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-10-22 16:08:20,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=959, Unknown=0, NotChecked=0, Total=1190 [2018-10-22 16:08:20,614 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 35 states. [2018-10-22 16:08:21,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:21,808 INFO L93 Difference]: Finished difference Result 334 states and 387 transitions. [2018-10-22 16:08:21,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-10-22 16:08:21,808 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 89 [2018-10-22 16:08:21,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:21,809 INFO L225 Difference]: With dead ends: 334 [2018-10-22 16:08:21,809 INFO L226 Difference]: Without dead ends: 293 [2018-10-22 16:08:21,810 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 408 GetRequests, 306 SyntacticMatches, 36 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2097 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=867, Invalid=3689, Unknown=0, NotChecked=0, Total=4556 [2018-10-22 16:08:21,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2018-10-22 16:08:21,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 115. [2018-10-22 16:08:21,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-10-22 16:08:21,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-10-22 16:08:21,882 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-10-22 16:08:21,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:21,882 INFO L481 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-10-22 16:08:21,883 INFO L482 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-10-22 16:08:21,883 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-10-22 16:08:21,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-10-22 16:08:21,883 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:21,883 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:21,883 INFO L424 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:21,884 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:21,884 INFO L82 PathProgramCache]: Analyzing trace with hash 233315123, now seen corresponding path program 19 times [2018-10-22 16:08:21,884 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:21,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:21,884 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:21,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:21,885 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:21,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:22,267 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:22,267 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:22,267 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:22,268 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:22,268 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:22,268 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:22,268 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:22,275 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:22,275 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:22,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:22,303 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:22,572 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:22,573 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:22,704 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:22,724 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:22,724 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:22,739 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:22,739 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:22,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:22,797 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:22,815 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:22,816 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:22,991 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 119 proven. 32 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:22,992 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:22,992 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 34 [2018-10-22 16:08:22,992 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:22,993 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-10-22 16:08:22,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-10-22 16:08:22,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=903, Unknown=0, NotChecked=0, Total=1122 [2018-10-22 16:08:22,993 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 34 states. [2018-10-22 16:08:24,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:24,084 INFO L93 Difference]: Finished difference Result 374 states and 436 transitions. [2018-10-22 16:08:24,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-10-22 16:08:24,084 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 89 [2018-10-22 16:08:24,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:24,086 INFO L225 Difference]: With dead ends: 374 [2018-10-22 16:08:24,086 INFO L226 Difference]: Without dead ends: 333 [2018-10-22 16:08:24,087 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 409 GetRequests, 307 SyntacticMatches, 36 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2039 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=867, Invalid=3689, Unknown=0, NotChecked=0, Total=4556 [2018-10-22 16:08:24,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-10-22 16:08:24,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 115. [2018-10-22 16:08:24,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-10-22 16:08:24,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-10-22 16:08:24,157 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-10-22 16:08:24,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:24,157 INFO L481 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-10-22 16:08:24,157 INFO L482 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-10-22 16:08:24,157 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-10-22 16:08:24,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-10-22 16:08:24,158 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:24,158 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 6, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:24,158 INFO L424 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:24,158 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:24,158 INFO L82 PathProgramCache]: Analyzing trace with hash 1822167487, now seen corresponding path program 20 times [2018-10-22 16:08:24,158 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:24,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:24,159 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:24,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:24,159 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:24,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:24,451 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:24,451 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:24,451 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:24,452 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:24,452 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:24,452 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:24,452 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:24,459 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:24,459 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:24,485 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:24,485 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:24,487 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:24,759 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:24,759 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:24,890 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:24,910 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:24,910 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:24,925 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:24,925 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:24,982 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:24,982 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:24,986 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:25,004 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:25,004 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:26,238 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 119 proven. 36 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:26,239 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:26,239 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 33 [2018-10-22 16:08:26,239 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:26,239 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-10-22 16:08:26,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-10-22 16:08:26,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=211, Invalid=845, Unknown=0, NotChecked=0, Total=1056 [2018-10-22 16:08:26,240 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 33 states. [2018-10-22 16:08:27,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:27,578 INFO L93 Difference]: Finished difference Result 412 states and 483 transitions. [2018-10-22 16:08:27,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-10-22 16:08:27,578 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 89 [2018-10-22 16:08:27,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:27,580 INFO L225 Difference]: With dead ends: 412 [2018-10-22 16:08:27,581 INFO L226 Difference]: Without dead ends: 371 [2018-10-22 16:08:27,582 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 408 GetRequests, 308 SyntacticMatches, 36 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1888 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=823, Invalid=3467, Unknown=0, NotChecked=0, Total=4290 [2018-10-22 16:08:27,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2018-10-22 16:08:27,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 115. [2018-10-22 16:08:27,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-10-22 16:08:27,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-10-22 16:08:27,657 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-10-22 16:08:27,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:27,657 INFO L481 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-10-22 16:08:27,657 INFO L482 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-10-22 16:08:27,658 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-10-22 16:08:27,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-10-22 16:08:27,658 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:27,658 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 7, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:27,658 INFO L424 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:27,658 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:27,659 INFO L82 PathProgramCache]: Analyzing trace with hash 1890859851, now seen corresponding path program 21 times [2018-10-22 16:08:27,659 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:27,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:27,659 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:27,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:27,660 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:27,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:28,047 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:28,047 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:28,047 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:28,048 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:28,048 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:28,048 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:28,048 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:28,057 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:28,057 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:28,088 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-10-22 16:08:28,088 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:28,091 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:28,323 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:28,323 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:28,454 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:28,474 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:28,475 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:28,489 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:28,490 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:28,596 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-10-22 16:08:28,597 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:28,600 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:28,619 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:28,619 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:28,810 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 119 proven. 44 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:28,811 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:28,811 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 32 [2018-10-22 16:08:28,812 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:28,812 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-10-22 16:08:28,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-10-22 16:08:28,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=785, Unknown=0, NotChecked=0, Total=992 [2018-10-22 16:08:28,813 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 32 states. [2018-10-22 16:08:30,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:30,378 INFO L93 Difference]: Finished difference Result 448 states and 528 transitions. [2018-10-22 16:08:30,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-10-22 16:08:30,378 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 89 [2018-10-22 16:08:30,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:30,380 INFO L225 Difference]: With dead ends: 448 [2018-10-22 16:08:30,380 INFO L226 Difference]: Without dead ends: 407 [2018-10-22 16:08:30,381 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 405 GetRequests, 309 SyntacticMatches, 36 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1646 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=741, Invalid=3041, Unknown=0, NotChecked=0, Total=3782 [2018-10-22 16:08:30,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 407 states. [2018-10-22 16:08:30,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 407 to 115. [2018-10-22 16:08:30,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-10-22 16:08:30,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 124 transitions. [2018-10-22 16:08:30,467 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 124 transitions. Word has length 89 [2018-10-22 16:08:30,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:30,467 INFO L481 AbstractCegarLoop]: Abstraction has 115 states and 124 transitions. [2018-10-22 16:08:30,468 INFO L482 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-10-22 16:08:30,468 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 124 transitions. [2018-10-22 16:08:30,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-10-22 16:08:30,468 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:30,468 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:30,468 INFO L424 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:30,468 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:30,469 INFO L82 PathProgramCache]: Analyzing trace with hash 2074171351, now seen corresponding path program 7 times [2018-10-22 16:08:30,469 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:30,469 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:30,469 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:30,469 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:30,469 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:30,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:30,660 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:30,660 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:30,661 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:30,661 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:30,661 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:30,661 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:30,661 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:30,669 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:30,669 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:30,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:30,696 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:30,932 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:30,932 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:31,067 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:31,087 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:31,087 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:31,102 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:31,103 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:31,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:31,163 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:31,177 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:31,177 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:31,328 INFO L134 CoverageAnalysis]: Checked inductivity of 259 backedges. 119 proven. 56 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:31,329 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:31,330 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 31 [2018-10-22 16:08:31,330 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:31,330 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-10-22 16:08:31,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-10-22 16:08:31,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=723, Unknown=0, NotChecked=0, Total=930 [2018-10-22 16:08:31,331 INFO L87 Difference]: Start difference. First operand 115 states and 124 transitions. Second operand 31 states. [2018-10-22 16:08:32,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:32,743 INFO L93 Difference]: Finished difference Result 487 states and 577 transitions. [2018-10-22 16:08:32,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-10-22 16:08:32,743 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 89 [2018-10-22 16:08:32,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:32,745 INFO L225 Difference]: With dead ends: 487 [2018-10-22 16:08:32,745 INFO L226 Difference]: Without dead ends: 446 [2018-10-22 16:08:32,746 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 400 GetRequests, 310 SyntacticMatches, 36 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1327 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=633, Invalid=2447, Unknown=0, NotChecked=0, Total=3080 [2018-10-22 16:08:32,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 446 states. [2018-10-22 16:08:32,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 446 to 118. [2018-10-22 16:08:32,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-10-22 16:08:32,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 128 transitions. [2018-10-22 16:08:32,875 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 128 transitions. Word has length 89 [2018-10-22 16:08:32,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:32,876 INFO L481 AbstractCegarLoop]: Abstraction has 118 states and 128 transitions. [2018-10-22 16:08:32,876 INFO L482 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-10-22 16:08:32,876 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 128 transitions. [2018-10-22 16:08:32,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-10-22 16:08:32,877 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:32,877 INFO L375 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:32,877 INFO L424 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:32,877 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:32,877 INFO L82 PathProgramCache]: Analyzing trace with hash -1421446787, now seen corresponding path program 14 times [2018-10-22 16:08:32,877 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:32,878 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:32,878 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:32,878 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:32,878 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:32,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:33,326 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 85 proven. 124 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-10-22 16:08:33,327 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:33,327 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:33,327 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:33,327 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:33,327 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:33,327 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:33,334 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:33,334 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:33,360 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:33,361 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:33,362 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:33,400 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:33,400 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:33,522 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:33,542 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:33,542 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:33,557 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:33,558 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:33,619 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:33,619 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:33,623 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:33,636 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:33,636 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:33,874 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 86 proven. 105 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-10-22 16:08:33,875 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:33,875 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13, 13, 13] total 16 [2018-10-22 16:08:33,875 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:33,876 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-22 16:08:33,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-22 16:08:33,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=173, Unknown=0, NotChecked=0, Total=240 [2018-10-22 16:08:33,876 INFO L87 Difference]: Start difference. First operand 118 states and 128 transitions. Second operand 16 states. [2018-10-22 16:08:34,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:34,201 INFO L93 Difference]: Finished difference Result 128 states and 138 transitions. [2018-10-22 16:08:34,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-22 16:08:34,201 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 91 [2018-10-22 16:08:34,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:34,202 INFO L225 Difference]: With dead ends: 128 [2018-10-22 16:08:34,203 INFO L226 Difference]: Without dead ends: 126 [2018-10-22 16:08:34,203 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 387 GetRequests, 337 SyntacticMatches, 34 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=80, Invalid=226, Unknown=0, NotChecked=0, Total=306 [2018-10-22 16:08:34,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-10-22 16:08:34,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-10-22 16:08:34,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-10-22 16:08:34,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 136 transitions. [2018-10-22 16:08:34,318 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 136 transitions. Word has length 91 [2018-10-22 16:08:34,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:34,319 INFO L481 AbstractCegarLoop]: Abstraction has 126 states and 136 transitions. [2018-10-22 16:08:34,319 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-22 16:08:34,319 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 136 transitions. [2018-10-22 16:08:34,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-10-22 16:08:34,320 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:34,320 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:34,320 INFO L424 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:34,320 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:34,320 INFO L82 PathProgramCache]: Analyzing trace with hash -161069919, now seen corresponding path program 15 times [2018-10-22 16:08:34,320 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:34,321 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:34,321 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:34,321 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:34,321 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:34,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:34,939 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:34,939 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:34,939 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:34,939 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:34,939 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:34,940 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:34,940 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:34,947 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:34,947 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:34,975 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-10-22 16:08:34,975 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:34,978 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:35,355 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:35,355 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:35,797 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:35,818 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:35,818 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:35,834 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:35,834 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:35,963 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-10-22 16:08:35,963 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:35,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:35,992 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:35,992 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:36,348 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:36,351 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:36,351 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 42 [2018-10-22 16:08:36,351 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:36,351 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-10-22 16:08:36,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-10-22 16:08:36,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=353, Invalid=1369, Unknown=0, NotChecked=0, Total=1722 [2018-10-22 16:08:36,352 INFO L87 Difference]: Start difference. First operand 126 states and 136 transitions. Second operand 42 states. [2018-10-22 16:08:37,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:37,132 INFO L93 Difference]: Finished difference Result 225 states and 254 transitions. [2018-10-22 16:08:37,132 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-22 16:08:37,132 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 99 [2018-10-22 16:08:37,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:37,133 INFO L225 Difference]: With dead ends: 225 [2018-10-22 16:08:37,133 INFO L226 Difference]: Without dead ends: 180 [2018-10-22 16:08:37,134 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 437 GetRequests, 337 SyntacticMatches, 40 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2292 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=763, Invalid=3019, Unknown=0, NotChecked=0, Total=3782 [2018-10-22 16:08:37,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-10-22 16:08:37,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 128. [2018-10-22 16:08:37,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-22 16:08:37,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-10-22 16:08:37,228 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-10-22 16:08:37,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:37,228 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-10-22 16:08:37,228 INFO L482 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-10-22 16:08:37,228 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-10-22 16:08:37,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-10-22 16:08:37,229 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:37,229 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 8, 7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:37,229 INFO L424 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:37,230 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:37,230 INFO L82 PathProgramCache]: Analyzing trace with hash 1635135533, now seen corresponding path program 22 times [2018-10-22 16:08:37,230 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:37,230 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:37,231 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:37,231 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:37,231 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:37,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:37,737 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:37,737 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:37,738 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:37,738 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:37,738 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:37,738 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:37,738 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:37,746 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:08:37,746 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:08:37,776 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:08:37,776 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:37,778 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:38,174 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:38,174 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:38,427 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:38,447 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:38,447 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:38,462 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:08:38,462 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:08:38,535 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:08:38,535 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:38,540 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:38,555 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:38,556 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:38,740 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:38,741 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:38,742 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 41 [2018-10-22 16:08:38,742 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:38,742 INFO L460 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-10-22 16:08:38,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-10-22 16:08:38,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=326, Invalid=1314, Unknown=0, NotChecked=0, Total=1640 [2018-10-22 16:08:38,743 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 41 states. [2018-10-22 16:08:39,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:39,807 INFO L93 Difference]: Finished difference Result 277 states and 316 transitions. [2018-10-22 16:08:39,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-10-22 16:08:39,807 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 99 [2018-10-22 16:08:39,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:39,809 INFO L225 Difference]: With dead ends: 277 [2018-10-22 16:08:39,809 INFO L226 Difference]: Without dead ends: 232 [2018-10-22 16:08:39,809 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 445 GetRequests, 338 SyntacticMatches, 40 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2504 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=903, Invalid=3789, Unknown=0, NotChecked=0, Total=4692 [2018-10-22 16:08:39,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-10-22 16:08:39,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 128. [2018-10-22 16:08:39,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-22 16:08:39,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-10-22 16:08:39,962 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-10-22 16:08:39,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:39,962 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-10-22 16:08:39,962 INFO L482 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-10-22 16:08:39,962 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-10-22 16:08:39,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-10-22 16:08:39,963 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:39,963 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 7, 6, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:39,964 INFO L424 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:39,964 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:39,964 INFO L82 PathProgramCache]: Analyzing trace with hash 1382256313, now seen corresponding path program 23 times [2018-10-22 16:08:39,964 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:39,965 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:39,966 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:39,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:39,966 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:39,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:40,416 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:40,416 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:40,417 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:40,417 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:40,417 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:40,417 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:40,417 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:40,425 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:08:40,425 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:40,457 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-10-22 16:08:40,457 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:40,459 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:40,805 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:40,805 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:40,971 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:40,990 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:40,991 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:41,005 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:08:41,005 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:41,126 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-10-22 16:08:41,126 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:41,130 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:41,148 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:41,148 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:41,404 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:41,405 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:41,406 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 40 [2018-10-22 16:08:41,406 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:41,406 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-10-22 16:08:41,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-10-22 16:08:41,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=303, Invalid=1257, Unknown=0, NotChecked=0, Total=1560 [2018-10-22 16:08:41,407 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 40 states. [2018-10-22 16:08:42,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:42,859 INFO L93 Difference]: Finished difference Result 327 states and 376 transitions. [2018-10-22 16:08:42,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-10-22 16:08:42,859 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 99 [2018-10-22 16:08:42,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:42,860 INFO L225 Difference]: With dead ends: 327 [2018-10-22 16:08:42,861 INFO L226 Difference]: Without dead ends: 282 [2018-10-22 16:08:42,861 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 339 SyntacticMatches, 40 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2670 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1018, Invalid=4384, Unknown=0, NotChecked=0, Total=5402 [2018-10-22 16:08:42,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-10-22 16:08:42,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 128. [2018-10-22 16:08:42,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-22 16:08:42,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-10-22 16:08:42,966 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-10-22 16:08:42,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:42,966 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-10-22 16:08:42,966 INFO L482 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-10-22 16:08:42,966 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-10-22 16:08:42,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-10-22 16:08:42,966 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:42,967 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 6, 5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:42,967 INFO L424 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:42,967 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:42,967 INFO L82 PathProgramCache]: Analyzing trace with hash 2012160069, now seen corresponding path program 24 times [2018-10-22 16:08:42,967 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:42,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:42,968 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:42,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:42,968 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:42,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:43,502 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:43,503 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:43,503 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:43,503 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:43,503 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:43,503 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:43,503 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:43,519 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:43,519 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:43,550 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-10-22 16:08:43,551 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:43,553 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:43,872 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:43,872 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:44,032 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:44,052 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:44,052 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:44,066 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:08:44,066 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:08:44,191 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-10-22 16:08:44,192 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:44,196 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:44,215 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:44,216 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:44,892 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:44,893 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:44,893 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 39 [2018-10-22 16:08:44,893 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:44,894 INFO L460 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-10-22 16:08:44,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-10-22 16:08:44,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=284, Invalid=1198, Unknown=0, NotChecked=0, Total=1482 [2018-10-22 16:08:44,894 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 39 states. [2018-10-22 16:08:46,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:46,433 INFO L93 Difference]: Finished difference Result 375 states and 434 transitions. [2018-10-22 16:08:46,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-10-22 16:08:46,434 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 99 [2018-10-22 16:08:46,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:46,435 INFO L225 Difference]: With dead ends: 375 [2018-10-22 16:08:46,435 INFO L226 Difference]: Without dead ends: 330 [2018-10-22 16:08:46,437 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 455 GetRequests, 340 SyntacticMatches, 40 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2758 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1093, Invalid=4759, Unknown=0, NotChecked=0, Total=5852 [2018-10-22 16:08:46,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2018-10-22 16:08:46,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 128. [2018-10-22 16:08:46,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-22 16:08:46,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-10-22 16:08:46,568 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-10-22 16:08:46,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:46,568 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-10-22 16:08:46,568 INFO L482 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-10-22 16:08:46,569 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-10-22 16:08:46,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-10-22 16:08:46,569 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:46,569 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 5, 5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:46,570 INFO L424 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:46,570 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:46,570 INFO L82 PathProgramCache]: Analyzing trace with hash -1173773103, now seen corresponding path program 25 times [2018-10-22 16:08:46,570 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:46,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:46,571 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:46,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:46,571 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:46,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:46,806 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 152 proven. 40 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:46,807 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:46,807 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:46,807 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:46,807 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:46,807 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:46,807 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:46,815 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:46,816 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:46,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:46,844 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:47,187 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 152 proven. 40 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:47,187 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:47,373 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 152 proven. 40 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:47,404 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:47,404 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:47,431 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:47,431 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:08:47,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:47,490 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:47,511 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 152 proven. 40 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:47,511 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:47,804 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 152 proven. 40 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:47,805 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:47,806 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 38 [2018-10-22 16:08:47,806 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:47,806 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-10-22 16:08:47,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-10-22 16:08:47,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=269, Invalid=1137, Unknown=0, NotChecked=0, Total=1406 [2018-10-22 16:08:47,807 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 38 states. [2018-10-22 16:08:49,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:49,310 INFO L93 Difference]: Finished difference Result 421 states and 490 transitions. [2018-10-22 16:08:49,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-10-22 16:08:49,310 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 99 [2018-10-22 16:08:49,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:49,312 INFO L225 Difference]: With dead ends: 421 [2018-10-22 16:08:49,312 INFO L226 Difference]: Without dead ends: 376 [2018-10-22 16:08:49,313 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 457 GetRequests, 341 SyntacticMatches, 40 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2748 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1119, Invalid=4887, Unknown=0, NotChecked=0, Total=6006 [2018-10-22 16:08:49,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 376 states. [2018-10-22 16:08:49,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 376 to 128. [2018-10-22 16:08:49,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-22 16:08:49,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-10-22 16:08:49,431 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-10-22 16:08:49,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:49,431 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-10-22 16:08:49,431 INFO L482 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-10-22 16:08:49,432 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-10-22 16:08:49,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-10-22 16:08:49,432 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:49,432 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 6, 5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:49,433 INFO L424 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:49,433 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:49,433 INFO L82 PathProgramCache]: Analyzing trace with hash -975971235, now seen corresponding path program 26 times [2018-10-22 16:08:49,433 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:49,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:49,433 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:08:49,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:49,434 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:49,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:49,714 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:49,714 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:49,714 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:49,714 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:49,714 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:49,714 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:49,714 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:49,721 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:49,721 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:49,750 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:49,750 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:49,752 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:50,056 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:50,057 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:50,214 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:50,234 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:50,234 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:50,249 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:08:50,249 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:08:50,314 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:08:50,314 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:50,318 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:50,333 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:50,333 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:50,573 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 152 proven. 42 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:50,575 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:50,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 37 [2018-10-22 16:08:50,575 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:50,575 INFO L460 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-10-22 16:08:50,576 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-10-22 16:08:50,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=258, Invalid=1074, Unknown=0, NotChecked=0, Total=1332 [2018-10-22 16:08:50,576 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 37 states. [2018-10-22 16:08:52,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:52,171 INFO L93 Difference]: Finished difference Result 465 states and 544 transitions. [2018-10-22 16:08:52,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-10-22 16:08:52,173 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 99 [2018-10-22 16:08:52,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:52,175 INFO L225 Difference]: With dead ends: 465 [2018-10-22 16:08:52,175 INFO L226 Difference]: Without dead ends: 420 [2018-10-22 16:08:52,176 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 457 GetRequests, 342 SyntacticMatches, 40 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2631 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1093, Invalid=4759, Unknown=0, NotChecked=0, Total=5852 [2018-10-22 16:08:52,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420 states. [2018-10-22 16:08:52,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420 to 128. [2018-10-22 16:08:52,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-22 16:08:52,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-10-22 16:08:52,289 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-10-22 16:08:52,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:52,290 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-10-22 16:08:52,290 INFO L482 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-10-22 16:08:52,290 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-10-22 16:08:52,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-10-22 16:08:52,291 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:52,291 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 7, 6, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:52,291 INFO L424 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:52,291 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:52,291 INFO L82 PathProgramCache]: Analyzing trace with hash -1717664023, now seen corresponding path program 27 times [2018-10-22 16:08:52,291 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:52,292 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:52,292 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:52,292 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:52,292 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:52,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:52,946 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:52,946 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:52,946 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:52,946 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:52,946 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:52,946 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:52,946 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:52,953 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:52,954 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:52,985 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-10-22 16:08:52,985 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:52,986 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:53,750 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:53,751 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:53,906 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:53,926 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:53,927 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:53,961 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:08:53,962 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:08:54,093 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-10-22 16:08:54,094 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:54,099 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:54,117 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:54,117 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:54,295 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 152 proven. 48 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:54,296 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:54,296 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 36 [2018-10-22 16:08:54,296 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:54,296 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-10-22 16:08:54,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-10-22 16:08:54,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=251, Invalid=1009, Unknown=0, NotChecked=0, Total=1260 [2018-10-22 16:08:54,297 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 36 states. [2018-10-22 16:08:56,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:56,058 INFO L93 Difference]: Finished difference Result 507 states and 596 transitions. [2018-10-22 16:08:56,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-10-22 16:08:56,058 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 99 [2018-10-22 16:08:56,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:56,060 INFO L225 Difference]: With dead ends: 507 [2018-10-22 16:08:56,060 INFO L226 Difference]: Without dead ends: 462 [2018-10-22 16:08:56,061 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 455 GetRequests, 343 SyntacticMatches, 40 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2404 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1018, Invalid=4384, Unknown=0, NotChecked=0, Total=5402 [2018-10-22 16:08:56,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 462 states. [2018-10-22 16:08:56,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 462 to 128. [2018-10-22 16:08:56,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-22 16:08:56,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-10-22 16:08:56,182 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-10-22 16:08:56,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:56,182 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-10-22 16:08:56,182 INFO L482 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-10-22 16:08:56,182 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-10-22 16:08:56,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-10-22 16:08:56,183 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:56,183 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 8, 7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:56,183 INFO L424 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:56,183 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:56,183 INFO L82 PathProgramCache]: Analyzing trace with hash 283796597, now seen corresponding path program 28 times [2018-10-22 16:08:56,183 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:56,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:56,184 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:56,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:56,184 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:56,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:08:56,449 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:56,449 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:56,449 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:08:56,449 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:08:56,449 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:08:56,449 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:56,449 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:08:56,457 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:08:56,458 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:08:56,485 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:08:56,485 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:56,487 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:56,749 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:56,749 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:56,906 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:56,925 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:08:56,926 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:08:56,940 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:08:56,940 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:08:57,015 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:08:57,015 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:08:57,019 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:08:57,039 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:57,039 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:08:57,288 INFO L134 CoverageAnalysis]: Checked inductivity of 322 backedges. 152 proven. 58 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:08:57,289 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:08:57,290 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 35 [2018-10-22 16:08:57,290 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:08:57,290 INFO L460 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-10-22 16:08:57,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-10-22 16:08:57,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=248, Invalid=942, Unknown=0, NotChecked=0, Total=1190 [2018-10-22 16:08:57,291 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 35 states. [2018-10-22 16:08:59,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:08:59,054 INFO L93 Difference]: Finished difference Result 547 states and 646 transitions. [2018-10-22 16:08:59,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-10-22 16:08:59,055 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 99 [2018-10-22 16:08:59,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:08:59,057 INFO L225 Difference]: With dead ends: 547 [2018-10-22 16:08:59,057 INFO L226 Difference]: Without dead ends: 502 [2018-10-22 16:08:59,058 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 344 SyntacticMatches, 40 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2075 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=903, Invalid=3789, Unknown=0, NotChecked=0, Total=4692 [2018-10-22 16:08:59,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 502 states. [2018-10-22 16:08:59,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 502 to 128. [2018-10-22 16:08:59,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-22 16:08:59,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 138 transitions. [2018-10-22 16:08:59,214 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 138 transitions. Word has length 99 [2018-10-22 16:08:59,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:08:59,214 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 138 transitions. [2018-10-22 16:08:59,214 INFO L482 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-10-22 16:08:59,214 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 138 transitions. [2018-10-22 16:08:59,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-10-22 16:08:59,215 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:08:59,215 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:08:59,215 INFO L424 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:08:59,215 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:08:59,215 INFO L82 PathProgramCache]: Analyzing trace with hash 1885877505, now seen corresponding path program 8 times [2018-10-22 16:08:59,215 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:08:59,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:59,216 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:08:59,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:08:59,216 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:08:59,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:00,176 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:09:00,176 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:00,176 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:00,177 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:00,177 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:00,177 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:00,177 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:00,184 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:09:00,184 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:00,213 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:09:00,214 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:00,216 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:00,454 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:09:00,455 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:00,618 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:09:00,638 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:00,638 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 103 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:00,653 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:09:00,653 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:00,722 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:09:00,723 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:00,728 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:00,746 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:09:00,746 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:00,936 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 152 proven. 72 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:09:00,937 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:00,937 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 34 [2018-10-22 16:09:00,937 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:00,937 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-10-22 16:09:00,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-10-22 16:09:00,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=873, Unknown=0, NotChecked=0, Total=1122 [2018-10-22 16:09:00,938 INFO L87 Difference]: Start difference. First operand 128 states and 138 transitions. Second operand 34 states. [2018-10-22 16:09:02,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:02,620 INFO L93 Difference]: Finished difference Result 590 states and 700 transitions. [2018-10-22 16:09:02,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-10-22 16:09:02,621 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 99 [2018-10-22 16:09:02,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:02,623 INFO L225 Difference]: With dead ends: 590 [2018-10-22 16:09:02,623 INFO L226 Difference]: Without dead ends: 545 [2018-10-22 16:09:02,624 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 445 GetRequests, 345 SyntacticMatches, 40 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1664 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=763, Invalid=3019, Unknown=0, NotChecked=0, Total=3782 [2018-10-22 16:09:02,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states. [2018-10-22 16:09:02,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 131. [2018-10-22 16:09:02,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-10-22 16:09:02,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 142 transitions. [2018-10-22 16:09:02,763 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 142 transitions. Word has length 99 [2018-10-22 16:09:02,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:02,764 INFO L481 AbstractCegarLoop]: Abstraction has 131 states and 142 transitions. [2018-10-22 16:09:02,764 INFO L482 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-10-22 16:09:02,764 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 142 transitions. [2018-10-22 16:09:02,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-10-22 16:09:02,765 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:02,765 INFO L375 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:02,765 INFO L424 AbstractCegarLoop]: === Iteration 55 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:02,766 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:02,770 INFO L82 PathProgramCache]: Analyzing trace with hash -1743772005, now seen corresponding path program 16 times [2018-10-22 16:09:02,771 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:02,771 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:02,771 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:02,771 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:02,771 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:02,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:03,138 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 105 proven. 158 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-10-22 16:09:03,139 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:03,139 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:03,139 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:03,139 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:03,139 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:03,139 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 104 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:03,147 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:09:03,147 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:09:03,173 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:09:03,173 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:03,174 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:03,211 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:09:03,212 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:03,319 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:09:03,339 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:03,339 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 105 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:03,354 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:09:03,354 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:09:03,428 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:09:03,428 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:03,432 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:03,442 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:09:03,442 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:03,589 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 106 proven. 136 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-10-22 16:09:03,590 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:03,591 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14, 14, 14] total 17 [2018-10-22 16:09:03,591 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:03,591 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-22 16:09:03,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-22 16:09:03,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2018-10-22 16:09:03,591 INFO L87 Difference]: Start difference. First operand 131 states and 142 transitions. Second operand 17 states. [2018-10-22 16:09:03,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:03,916 INFO L93 Difference]: Finished difference Result 141 states and 152 transitions. [2018-10-22 16:09:03,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-22 16:09:03,916 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 101 [2018-10-22 16:09:03,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:03,917 INFO L225 Difference]: With dead ends: 141 [2018-10-22 16:09:03,918 INFO L226 Difference]: Without dead ends: 139 [2018-10-22 16:09:03,918 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 429 GetRequests, 374 SyntacticMatches, 38 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 249 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2018-10-22 16:09:03,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-10-22 16:09:04,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-10-22 16:09:04,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-10-22 16:09:04,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 150 transitions. [2018-10-22 16:09:04,044 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 150 transitions. Word has length 101 [2018-10-22 16:09:04,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:04,044 INFO L481 AbstractCegarLoop]: Abstraction has 139 states and 150 transitions. [2018-10-22 16:09:04,044 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-22 16:09:04,044 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 150 transitions. [2018-10-22 16:09:04,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-10-22 16:09:04,045 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:04,045 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:04,045 INFO L424 AbstractCegarLoop]: === Iteration 56 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:04,045 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:04,046 INFO L82 PathProgramCache]: Analyzing trace with hash -860881985, now seen corresponding path program 17 times [2018-10-22 16:09:04,046 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:04,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:04,046 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:04,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:04,047 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:04,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:06,161 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:06,161 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:06,161 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:06,161 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:06,161 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:06,161 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:06,161 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 106 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:06,184 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:09:06,184 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:06,223 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-10-22 16:09:06,223 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:06,225 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:06,656 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:06,656 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:06,856 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:06,876 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:06,876 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 107 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:06,890 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:09:06,890 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:07,029 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-10-22 16:09:07,029 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:07,033 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:07,054 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:07,054 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:07,281 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:07,282 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:07,282 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 46 [2018-10-22 16:09:07,282 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:07,282 INFO L460 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-10-22 16:09:07,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-10-22 16:09:07,283 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=421, Invalid=1649, Unknown=0, NotChecked=0, Total=2070 [2018-10-22 16:09:07,283 INFO L87 Difference]: Start difference. First operand 139 states and 150 transitions. Second operand 46 states. [2018-10-22 16:09:08,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:08,393 INFO L93 Difference]: Finished difference Result 248 states and 280 transitions. [2018-10-22 16:09:08,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-10-22 16:09:08,393 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 109 [2018-10-22 16:09:08,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:08,394 INFO L225 Difference]: With dead ends: 248 [2018-10-22 16:09:08,394 INFO L226 Difference]: Without dead ends: 199 [2018-10-22 16:09:08,395 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 481 GetRequests, 371 SyntacticMatches, 44 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2822 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=905, Invalid=3651, Unknown=0, NotChecked=0, Total=4556 [2018-10-22 16:09:08,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-10-22 16:09:08,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 141. [2018-10-22 16:09:08,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-10-22 16:09:08,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-10-22 16:09:08,537 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-10-22 16:09:08,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:08,537 INFO L481 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-10-22 16:09:08,537 INFO L482 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-10-22 16:09:08,537 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-10-22 16:09:08,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-10-22 16:09:08,538 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:08,538 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 9, 8, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:08,538 INFO L424 AbstractCegarLoop]: === Iteration 57 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:08,538 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:08,538 INFO L82 PathProgramCache]: Analyzing trace with hash 1311238219, now seen corresponding path program 29 times [2018-10-22 16:09:08,538 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:08,539 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:08,539 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:08,539 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:08,539 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:08,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:08,951 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:08,951 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:08,951 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:08,951 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:08,951 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:08,951 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:08,951 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 108 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:08,960 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:09:08,960 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:08,991 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-10-22 16:09:08,992 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:08,994 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:09,401 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:09,401 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:09,615 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:09,635 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:09,635 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 109 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:09,650 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:09:09,650 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:09,791 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-10-22 16:09:09,791 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:09,795 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:09,819 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:09,819 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:10,077 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (109)] Exception during sending of exit command (exit): Broken pipe [2018-10-22 16:09:10,080 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:10,080 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 45 [2018-10-22 16:09:10,080 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:10,081 INFO L460 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-10-22 16:09:10,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-10-22 16:09:10,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=391, Invalid=1589, Unknown=0, NotChecked=0, Total=1980 [2018-10-22 16:09:10,082 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 45 states. [2018-10-22 16:09:11,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:11,448 INFO L93 Difference]: Finished difference Result 306 states and 349 transitions. [2018-10-22 16:09:11,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-10-22 16:09:11,449 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 109 [2018-10-22 16:09:11,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:11,450 INFO L225 Difference]: With dead ends: 306 [2018-10-22 16:09:11,450 INFO L226 Difference]: Without dead ends: 257 [2018-10-22 16:09:11,450 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 372 SyntacticMatches, 44 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3107 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1081, Invalid=4619, Unknown=0, NotChecked=0, Total=5700 [2018-10-22 16:09:11,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-10-22 16:09:11,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 141. [2018-10-22 16:09:11,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-10-22 16:09:11,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-10-22 16:09:11,591 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-10-22 16:09:11,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:11,592 INFO L481 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-10-22 16:09:11,592 INFO L482 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-10-22 16:09:11,592 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-10-22 16:09:11,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-10-22 16:09:11,593 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:11,593 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 8, 7, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:11,593 INFO L424 AbstractCegarLoop]: === Iteration 58 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:11,593 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:11,593 INFO L82 PathProgramCache]: Analyzing trace with hash 562661335, now seen corresponding path program 30 times [2018-10-22 16:09:11,593 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:11,594 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:11,594 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:11,594 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:11,594 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:11,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:12,696 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:12,696 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:12,697 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:12,697 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:12,697 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:12,697 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:12,697 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 110 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:12,704 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:09:12,704 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:09:12,738 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-10-22 16:09:12,739 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:12,740 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:13,398 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:13,399 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:13,630 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:13,650 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:13,650 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 111 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:13,668 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:09:13,668 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:09:13,809 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-10-22 16:09:13,809 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:13,813 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:13,835 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:13,835 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:14,051 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:14,052 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:14,052 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 44 [2018-10-22 16:09:14,052 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:14,052 INFO L460 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-10-22 16:09:14,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-10-22 16:09:14,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=365, Invalid=1527, Unknown=0, NotChecked=0, Total=1892 [2018-10-22 16:09:14,053 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 44 states. [2018-10-22 16:09:15,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:15,866 INFO L93 Difference]: Finished difference Result 362 states and 416 transitions. [2018-10-22 16:09:15,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-10-22 16:09:15,867 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 109 [2018-10-22 16:09:15,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:15,868 INFO L225 Difference]: With dead ends: 362 [2018-10-22 16:09:15,868 INFO L226 Difference]: Without dead ends: 313 [2018-10-22 16:09:15,869 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 497 GetRequests, 373 SyntacticMatches, 44 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3349 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1234, Invalid=5408, Unknown=0, NotChecked=0, Total=6642 [2018-10-22 16:09:15,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2018-10-22 16:09:16,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 141. [2018-10-22 16:09:16,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-10-22 16:09:16,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-10-22 16:09:16,027 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-10-22 16:09:16,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:16,027 INFO L481 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-10-22 16:09:16,027 INFO L482 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-10-22 16:09:16,027 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-10-22 16:09:16,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-10-22 16:09:16,028 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:16,028 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 7, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:16,028 INFO L424 AbstractCegarLoop]: === Iteration 59 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:16,028 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:16,028 INFO L82 PathProgramCache]: Analyzing trace with hash 195402339, now seen corresponding path program 31 times [2018-10-22 16:09:16,028 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:16,029 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:16,029 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:16,029 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:16,029 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:16,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:16,400 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:16,400 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:16,400 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:16,400 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:16,401 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:16,401 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:16,401 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 112 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:16,408 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:16,408 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:09:16,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:16,439 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:16,821 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:16,821 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:17,039 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:17,059 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:17,059 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 113 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:17,073 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:17,073 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:09:17,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:17,144 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:17,164 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:17,164 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:17,377 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:17,378 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:17,378 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 43 [2018-10-22 16:09:17,378 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:17,378 INFO L460 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-10-22 16:09:17,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-10-22 16:09:17,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=343, Invalid=1463, Unknown=0, NotChecked=0, Total=1806 [2018-10-22 16:09:17,379 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 43 states. [2018-10-22 16:09:19,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:19,347 INFO L93 Difference]: Finished difference Result 416 states and 481 transitions. [2018-10-22 16:09:19,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-10-22 16:09:19,347 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 109 [2018-10-22 16:09:19,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:19,349 INFO L225 Difference]: With dead ends: 416 [2018-10-22 16:09:19,349 INFO L226 Difference]: Without dead ends: 367 [2018-10-22 16:09:19,350 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 502 GetRequests, 374 SyntacticMatches, 44 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3510 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1346, Invalid=5964, Unknown=0, NotChecked=0, Total=7310 [2018-10-22 16:09:19,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367 states. [2018-10-22 16:09:19,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367 to 141. [2018-10-22 16:09:19,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-10-22 16:09:19,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-10-22 16:09:19,549 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-10-22 16:09:19,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:19,550 INFO L481 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-10-22 16:09:19,550 INFO L482 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-10-22 16:09:19,550 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-10-22 16:09:19,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-10-22 16:09:19,551 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:19,551 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:19,551 INFO L424 AbstractCegarLoop]: === Iteration 60 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:19,551 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:19,551 INFO L82 PathProgramCache]: Analyzing trace with hash 1316806639, now seen corresponding path program 32 times [2018-10-22 16:09:19,551 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:19,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:19,552 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:19,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:19,552 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:19,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:19,848 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:19,848 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:19,848 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:19,848 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:19,849 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:19,849 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:19,849 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 114 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:19,858 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:09:19,858 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:19,888 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:09:19,888 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:19,890 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:20,255 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:20,255 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:20,444 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:20,463 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:20,464 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 115 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:20,478 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:09:20,478 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:20,549 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:09:20,549 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:20,554 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:20,574 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:20,574 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:20,889 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:20,891 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:20,891 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 42 [2018-10-22 16:09:20,891 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:20,891 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-10-22 16:09:20,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-10-22 16:09:20,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=1397, Unknown=0, NotChecked=0, Total=1722 [2018-10-22 16:09:20,892 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 42 states. [2018-10-22 16:09:22,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:22,907 INFO L93 Difference]: Finished difference Result 468 states and 544 transitions. [2018-10-22 16:09:22,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-10-22 16:09:22,907 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 109 [2018-10-22 16:09:22,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:22,909 INFO L225 Difference]: With dead ends: 468 [2018-10-22 16:09:22,909 INFO L226 Difference]: Without dead ends: 419 [2018-10-22 16:09:22,910 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 505 GetRequests, 375 SyntacticMatches, 44 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3564 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1405, Invalid=6251, Unknown=0, NotChecked=0, Total=7656 [2018-10-22 16:09:22,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 419 states. [2018-10-22 16:09:23,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 419 to 141. [2018-10-22 16:09:23,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-10-22 16:09:23,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-10-22 16:09:23,107 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-10-22 16:09:23,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:23,107 INFO L481 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-10-22 16:09:23,107 INFO L482 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-10-22 16:09:23,107 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-10-22 16:09:23,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-10-22 16:09:23,108 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:23,108 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:23,108 INFO L424 AbstractCegarLoop]: === Iteration 61 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:23,109 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:23,109 INFO L82 PathProgramCache]: Analyzing trace with hash 893393019, now seen corresponding path program 33 times [2018-10-22 16:09:23,109 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:23,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:23,110 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:23,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:23,110 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:23,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:23,671 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:23,672 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:23,672 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:23,672 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:23,672 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:23,672 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:23,672 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 116 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:23,680 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:09:23,680 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:09:23,717 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-10-22 16:09:23,718 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:23,719 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:24,111 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:24,111 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:24,585 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:24,606 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:24,606 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 117 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:24,621 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:09:24,621 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:09:24,776 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-10-22 16:09:24,776 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:24,780 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:24,801 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:24,801 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:25,015 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 189 proven. 50 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:25,016 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:25,017 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 41 [2018-10-22 16:09:25,017 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:25,017 INFO L460 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-10-22 16:09:25,017 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-10-22 16:09:25,017 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=311, Invalid=1329, Unknown=0, NotChecked=0, Total=1640 [2018-10-22 16:09:25,018 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 41 states. [2018-10-22 16:09:27,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:27,143 INFO L93 Difference]: Finished difference Result 518 states and 605 transitions. [2018-10-22 16:09:27,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-10-22 16:09:27,143 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 109 [2018-10-22 16:09:27,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:27,145 INFO L225 Difference]: With dead ends: 518 [2018-10-22 16:09:27,145 INFO L226 Difference]: Without dead ends: 469 [2018-10-22 16:09:27,146 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 506 GetRequests, 376 SyntacticMatches, 44 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3497 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1405, Invalid=6251, Unknown=0, NotChecked=0, Total=7656 [2018-10-22 16:09:27,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 469 states. [2018-10-22 16:09:27,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 469 to 141. [2018-10-22 16:09:27,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-10-22 16:09:27,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-10-22 16:09:27,313 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-10-22 16:09:27,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:27,313 INFO L481 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-10-22 16:09:27,313 INFO L482 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-10-22 16:09:27,313 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-10-22 16:09:27,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-10-22 16:09:27,314 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:27,314 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 7, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:27,314 INFO L424 AbstractCegarLoop]: === Iteration 62 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:27,315 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:27,315 INFO L82 PathProgramCache]: Analyzing trace with hash -1605368825, now seen corresponding path program 34 times [2018-10-22 16:09:27,315 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:27,315 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:27,316 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:27,316 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:27,316 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:27,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:27,611 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:27,611 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:27,611 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:27,611 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:27,612 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:27,612 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:27,612 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 118 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:27,619 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:09:27,619 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:09:27,648 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:09:27,648 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:27,650 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:28,024 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:28,024 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:28,235 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:28,256 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:28,256 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 119 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:28,270 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:09:28,270 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:09:28,351 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:09:28,351 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:28,356 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:28,376 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:28,377 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:28,878 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 189 proven. 54 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:28,879 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:28,879 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 40 [2018-10-22 16:09:28,879 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:28,880 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-10-22 16:09:28,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-10-22 16:09:28,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=301, Invalid=1259, Unknown=0, NotChecked=0, Total=1560 [2018-10-22 16:09:28,880 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 40 states. [2018-10-22 16:09:31,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:31,243 INFO L93 Difference]: Finished difference Result 566 states and 664 transitions. [2018-10-22 16:09:31,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-10-22 16:09:31,243 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 109 [2018-10-22 16:09:31,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:31,245 INFO L225 Difference]: With dead ends: 566 [2018-10-22 16:09:31,246 INFO L226 Difference]: Without dead ends: 517 [2018-10-22 16:09:31,246 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 505 GetRequests, 377 SyntacticMatches, 44 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3303 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1346, Invalid=5964, Unknown=0, NotChecked=0, Total=7310 [2018-10-22 16:09:31,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2018-10-22 16:09:31,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 141. [2018-10-22 16:09:31,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-10-22 16:09:31,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-10-22 16:09:31,416 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-10-22 16:09:31,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:31,416 INFO L481 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-10-22 16:09:31,416 INFO L482 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-10-22 16:09:31,416 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-10-22 16:09:31,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-10-22 16:09:31,417 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:31,417 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 8, 7, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:31,417 INFO L424 AbstractCegarLoop]: === Iteration 63 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:31,417 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:31,418 INFO L82 PathProgramCache]: Analyzing trace with hash -1858248045, now seen corresponding path program 35 times [2018-10-22 16:09:31,418 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:31,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:31,418 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:31,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:31,418 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:31,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:31,687 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:31,687 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:31,687 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:31,687 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:31,687 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:31,687 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:31,687 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 120 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:31,695 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:09:31,696 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:31,728 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-10-22 16:09:31,729 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:31,730 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:32,061 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:32,062 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:32,248 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:32,268 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:32,268 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 121 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:32,283 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:09:32,283 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:32,418 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2018-10-22 16:09:32,418 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:32,422 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:32,443 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:32,443 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:32,646 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 189 proven. 62 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:32,647 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:32,647 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 39 [2018-10-22 16:09:32,647 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:32,647 INFO L460 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-10-22 16:09:32,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-10-22 16:09:32,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=295, Invalid=1187, Unknown=0, NotChecked=0, Total=1482 [2018-10-22 16:09:32,648 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 39 states. [2018-10-22 16:09:35,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:35,081 INFO L93 Difference]: Finished difference Result 612 states and 721 transitions. [2018-10-22 16:09:35,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-10-22 16:09:35,081 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 109 [2018-10-22 16:09:35,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:35,084 INFO L225 Difference]: With dead ends: 612 [2018-10-22 16:09:35,084 INFO L226 Difference]: Without dead ends: 563 [2018-10-22 16:09:35,085 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 502 GetRequests, 378 SyntacticMatches, 44 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2984 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1234, Invalid=5408, Unknown=0, NotChecked=0, Total=6642 [2018-10-22 16:09:35,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2018-10-22 16:09:35,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 141. [2018-10-22 16:09:35,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-10-22 16:09:35,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-10-22 16:09:35,283 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-10-22 16:09:35,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:35,283 INFO L481 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-10-22 16:09:35,283 INFO L482 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-10-22 16:09:35,283 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-10-22 16:09:35,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-10-22 16:09:35,284 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:35,284 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 9, 8, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:35,284 INFO L424 AbstractCegarLoop]: === Iteration 64 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:35,284 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:35,284 INFO L82 PathProgramCache]: Analyzing trace with hash -1228344289, now seen corresponding path program 36 times [2018-10-22 16:09:35,284 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:35,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:35,285 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:35,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:35,285 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:35,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:35,526 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:35,526 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:35,526 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:35,526 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:35,527 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:35,527 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:35,527 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 122 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:35,533 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:09:35,534 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:09:35,571 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-10-22 16:09:35,571 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:35,574 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:35,887 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:35,887 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:36,095 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:36,114 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:36,114 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 123 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:36,131 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:09:36,131 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:09:36,273 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2018-10-22 16:09:36,273 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:36,277 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:36,296 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:36,296 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:36,510 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 189 proven. 74 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:36,512 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:36,512 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 38 [2018-10-22 16:09:36,512 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:36,512 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-10-22 16:09:36,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-10-22 16:09:36,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=293, Invalid=1113, Unknown=0, NotChecked=0, Total=1406 [2018-10-22 16:09:36,513 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 38 states. [2018-10-22 16:09:38,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:38,885 INFO L93 Difference]: Finished difference Result 656 states and 776 transitions. [2018-10-22 16:09:38,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-10-22 16:09:38,885 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 109 [2018-10-22 16:09:38,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:38,887 INFO L225 Difference]: With dead ends: 656 [2018-10-22 16:09:38,887 INFO L226 Difference]: Without dead ends: 607 [2018-10-22 16:09:38,888 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 497 GetRequests, 379 SyntacticMatches, 44 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2554 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1081, Invalid=4619, Unknown=0, NotChecked=0, Total=5700 [2018-10-22 16:09:38,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 607 states. [2018-10-22 16:09:39,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 607 to 141. [2018-10-22 16:09:39,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-10-22 16:09:39,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 152 transitions. [2018-10-22 16:09:39,052 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 152 transitions. Word has length 109 [2018-10-22 16:09:39,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:39,052 INFO L481 AbstractCegarLoop]: Abstraction has 141 states and 152 transitions. [2018-10-22 16:09:39,053 INFO L482 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-10-22 16:09:39,053 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 152 transitions. [2018-10-22 16:09:39,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-10-22 16:09:39,053 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:39,054 INFO L375 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:39,054 INFO L424 AbstractCegarLoop]: === Iteration 65 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:39,054 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:39,054 INFO L82 PathProgramCache]: Analyzing trace with hash -119310165, now seen corresponding path program 9 times [2018-10-22 16:09:39,054 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:39,054 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:39,055 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:39,055 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:39,055 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:39,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:39,324 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:39,325 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:39,325 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:39,325 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:39,325 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:39,325 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:39,325 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 124 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:39,334 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:09:39,334 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:09:39,369 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-10-22 16:09:39,369 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:39,371 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:39,682 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:39,682 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:39,866 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:39,886 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:39,886 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 125 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:39,902 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:09:39,903 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:09:40,044 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-10-22 16:09:40,044 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:40,049 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:40,068 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:40,068 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:40,332 INFO L134 CoverageAnalysis]: Checked inductivity of 423 backedges. 189 proven. 90 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:40,334 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:40,334 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 37 [2018-10-22 16:09:40,334 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:40,334 INFO L460 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-10-22 16:09:40,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-10-22 16:09:40,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=295, Invalid=1037, Unknown=0, NotChecked=0, Total=1332 [2018-10-22 16:09:40,335 INFO L87 Difference]: Start difference. First operand 141 states and 152 transitions. Second operand 37 states. [2018-10-22 16:09:42,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:42,624 INFO L93 Difference]: Finished difference Result 703 states and 835 transitions. [2018-10-22 16:09:42,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-10-22 16:09:42,624 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 109 [2018-10-22 16:09:42,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:42,627 INFO L225 Difference]: With dead ends: 703 [2018-10-22 16:09:42,627 INFO L226 Difference]: Without dead ends: 654 [2018-10-22 16:09:42,628 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 380 SyntacticMatches, 44 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2039 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=905, Invalid=3651, Unknown=0, NotChecked=0, Total=4556 [2018-10-22 16:09:42,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 654 states. [2018-10-22 16:09:42,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 654 to 144. [2018-10-22 16:09:42,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-10-22 16:09:42,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 156 transitions. [2018-10-22 16:09:42,813 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 156 transitions. Word has length 109 [2018-10-22 16:09:42,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:42,814 INFO L481 AbstractCegarLoop]: Abstraction has 144 states and 156 transitions. [2018-10-22 16:09:42,814 INFO L482 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-10-22 16:09:42,814 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 156 transitions. [2018-10-22 16:09:42,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-10-22 16:09:42,814 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:42,815 INFO L375 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:42,815 INFO L424 AbstractCegarLoop]: === Iteration 66 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:42,815 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:42,815 INFO L82 PathProgramCache]: Analyzing trace with hash -1752486599, now seen corresponding path program 18 times [2018-10-22 16:09:42,815 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:42,815 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:42,815 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:42,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:42,816 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:42,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:42,969 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 127 proven. 196 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-10-22 16:09:42,970 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:42,970 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:42,970 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:42,970 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:42,970 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:42,970 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 126 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:42,977 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:09:42,977 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:09:43,012 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-10-22 16:09:43,013 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:43,015 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:43,071 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:43,071 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:43,196 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:43,215 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:43,216 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 127 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:43,231 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:09:43,231 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:09:43,387 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-10-22 16:09:43,387 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:43,391 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:43,403 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:43,403 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:43,537 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 128 proven. 171 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-10-22 16:09:43,538 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:43,539 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15, 15, 15] total 18 [2018-10-22 16:09:43,539 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:43,539 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-22 16:09:43,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-22 16:09:43,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=216, Unknown=0, NotChecked=0, Total=306 [2018-10-22 16:09:43,540 INFO L87 Difference]: Start difference. First operand 144 states and 156 transitions. Second operand 18 states. [2018-10-22 16:09:44,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:44,067 INFO L93 Difference]: Finished difference Result 154 states and 166 transitions. [2018-10-22 16:09:44,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-22 16:09:44,068 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 111 [2018-10-22 16:09:44,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:44,069 INFO L225 Difference]: With dead ends: 154 [2018-10-22 16:09:44,069 INFO L226 Difference]: Without dead ends: 152 [2018-10-22 16:09:44,069 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 471 GetRequests, 411 SyntacticMatches, 42 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2018-10-22 16:09:44,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-10-22 16:09:44,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-10-22 16:09:44,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-10-22 16:09:44,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 164 transitions. [2018-10-22 16:09:44,249 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 164 transitions. Word has length 111 [2018-10-22 16:09:44,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:44,250 INFO L481 AbstractCegarLoop]: Abstraction has 152 states and 164 transitions. [2018-10-22 16:09:44,250 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-22 16:09:44,250 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 164 transitions. [2018-10-22 16:09:44,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:09:44,251 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:44,251 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 11, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:44,251 INFO L424 AbstractCegarLoop]: === Iteration 67 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:44,251 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:44,251 INFO L82 PathProgramCache]: Analyzing trace with hash 1040286813, now seen corresponding path program 19 times [2018-10-22 16:09:44,252 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:44,252 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:44,252 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:44,252 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:44,252 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:44,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:44,549 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:44,550 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:44,550 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:44,550 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:44,550 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:44,550 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:44,550 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 128 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:44,560 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:44,560 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:09:44,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:44,594 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:45,088 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:45,089 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:45,322 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:45,342 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:45,342 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 129 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 129 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:45,357 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:45,358 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:09:45,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:45,434 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:45,458 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:45,458 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:45,741 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:45,743 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:45,743 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 50 [2018-10-22 16:09:45,743 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:45,744 INFO L460 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-10-22 16:09:45,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-10-22 16:09:45,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=495, Invalid=1955, Unknown=0, NotChecked=0, Total=2450 [2018-10-22 16:09:45,745 INFO L87 Difference]: Start difference. First operand 152 states and 164 transitions. Second operand 50 states. [2018-10-22 16:09:47,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:47,059 INFO L93 Difference]: Finished difference Result 271 states and 306 transitions. [2018-10-22 16:09:47,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-10-22 16:09:47,059 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 119 [2018-10-22 16:09:47,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:47,060 INFO L225 Difference]: With dead ends: 271 [2018-10-22 16:09:47,060 INFO L226 Difference]: Without dead ends: 218 [2018-10-22 16:09:47,061 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 525 GetRequests, 405 SyntacticMatches, 48 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3407 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1059, Invalid=4343, Unknown=0, NotChecked=0, Total=5402 [2018-10-22 16:09:47,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-10-22 16:09:47,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 154. [2018-10-22 16:09:47,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:09:47,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-10-22 16:09:47,268 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-10-22 16:09:47,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:47,268 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-10-22 16:09:47,268 INFO L482 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-10-22 16:09:47,268 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-10-22 16:09:47,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:09:47,269 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:47,269 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 10, 9, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:47,269 INFO L424 AbstractCegarLoop]: === Iteration 68 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:47,269 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:47,269 INFO L82 PathProgramCache]: Analyzing trace with hash -661376535, now seen corresponding path program 37 times [2018-10-22 16:09:47,269 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:47,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:47,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:47,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:47,270 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:47,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:47,566 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:47,567 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:47,567 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:47,567 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:47,567 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:47,567 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:47,567 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 130 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 130 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:47,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:47,575 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:09:47,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:47,609 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:48,099 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:48,100 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:48,329 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:48,348 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:48,349 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 131 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 131 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:48,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:48,363 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:09:48,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:48,440 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:48,464 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:48,464 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:48,714 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:48,715 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:48,715 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 49 [2018-10-22 16:09:48,716 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:48,716 INFO L460 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-10-22 16:09:48,716 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-10-22 16:09:48,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=462, Invalid=1890, Unknown=0, NotChecked=0, Total=2352 [2018-10-22 16:09:48,717 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 49 states. [2018-10-22 16:09:50,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:50,722 INFO L93 Difference]: Finished difference Result 335 states and 382 transitions. [2018-10-22 16:09:50,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-10-22 16:09:50,723 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 119 [2018-10-22 16:09:50,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:50,724 INFO L225 Difference]: With dead ends: 335 [2018-10-22 16:09:50,724 INFO L226 Difference]: Without dead ends: 282 [2018-10-22 16:09:50,725 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 535 GetRequests, 406 SyntacticMatches, 48 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3775 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1275, Invalid=5531, Unknown=0, NotChecked=0, Total=6806 [2018-10-22 16:09:50,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-10-22 16:09:50,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 154. [2018-10-22 16:09:50,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:09:50,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-10-22 16:09:50,951 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-10-22 16:09:50,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:50,951 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-10-22 16:09:50,951 INFO L482 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-10-22 16:09:50,952 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-10-22 16:09:50,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:09:50,952 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:50,952 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 9, 8, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:50,952 INFO L424 AbstractCegarLoop]: === Iteration 69 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:50,953 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:50,953 INFO L82 PathProgramCache]: Analyzing trace with hash 516739701, now seen corresponding path program 38 times [2018-10-22 16:09:50,953 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:50,953 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:50,953 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:09:50,953 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:50,953 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:50,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:51,259 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:51,260 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:51,260 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:51,260 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:51,260 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:51,260 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:51,260 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 132 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 132 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:51,267 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:09:51,267 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:51,301 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:09:51,301 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:51,303 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:51,773 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:51,773 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:52,042 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:52,062 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:52,062 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 133 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 133 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:52,076 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:09:52,076 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:09:52,153 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:09:52,153 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:52,157 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:52,184 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:52,184 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:52,432 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:52,434 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:52,434 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 48 [2018-10-22 16:09:52,434 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:52,434 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-10-22 16:09:52,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-10-22 16:09:52,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=433, Invalid=1823, Unknown=0, NotChecked=0, Total=2256 [2018-10-22 16:09:52,435 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 48 states. [2018-10-22 16:09:54,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:54,861 INFO L93 Difference]: Finished difference Result 397 states and 456 transitions. [2018-10-22 16:09:54,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-10-22 16:09:54,862 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 119 [2018-10-22 16:09:54,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:54,863 INFO L225 Difference]: With dead ends: 397 [2018-10-22 16:09:54,863 INFO L226 Difference]: Without dead ends: 344 [2018-10-22 16:09:54,864 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 543 GetRequests, 407 SyntacticMatches, 48 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4105 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1471, Invalid=6539, Unknown=0, NotChecked=0, Total=8010 [2018-10-22 16:09:54,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-10-22 16:09:55,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 154. [2018-10-22 16:09:55,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:09:55,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-10-22 16:09:55,071 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-10-22 16:09:55,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:55,072 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-10-22 16:09:55,072 INFO L482 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-10-22 16:09:55,072 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-10-22 16:09:55,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:09:55,072 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:55,072 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 8, 7, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:55,072 INFO L424 AbstractCegarLoop]: === Iteration 70 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:55,073 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:55,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1752422911, now seen corresponding path program 39 times [2018-10-22 16:09:55,073 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:55,073 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:55,074 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:55,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:55,074 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:55,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:55,408 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:55,408 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:55,408 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:55,409 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:55,409 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:55,409 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:55,409 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 134 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 134 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:55,416 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:09:55,417 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:09:55,454 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-10-22 16:09:55,454 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:55,456 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:55,914 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:55,914 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:56,136 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:56,156 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:56,157 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 135 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 135 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:09:56,171 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:09:56,171 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:09:56,346 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-10-22 16:09:56,346 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:56,350 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:09:56,374 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:56,374 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:09:56,617 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:56,618 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:09:56,618 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 47 [2018-10-22 16:09:56,618 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:09:56,619 INFO L460 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-10-22 16:09:56,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-10-22 16:09:56,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=408, Invalid=1754, Unknown=0, NotChecked=0, Total=2162 [2018-10-22 16:09:56,620 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 47 states. [2018-10-22 16:09:59,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:09:59,078 INFO L93 Difference]: Finished difference Result 457 states and 528 transitions. [2018-10-22 16:09:59,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-10-22 16:09:59,078 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 119 [2018-10-22 16:09:59,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:09:59,080 INFO L225 Difference]: With dead ends: 457 [2018-10-22 16:09:59,080 INFO L226 Difference]: Without dead ends: 404 [2018-10-22 16:09:59,081 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 549 GetRequests, 408 SyntacticMatches, 48 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4353 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1626, Invalid=7304, Unknown=0, NotChecked=0, Total=8930 [2018-10-22 16:09:59,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states. [2018-10-22 16:09:59,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 154. [2018-10-22 16:09:59,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:09:59,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-10-22 16:09:59,328 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-10-22 16:09:59,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:09:59,328 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-10-22 16:09:59,328 INFO L482 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-10-22 16:09:59,328 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-10-22 16:09:59,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:09:59,329 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:09:59,329 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 7, 6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:09:59,329 INFO L424 AbstractCegarLoop]: === Iteration 71 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:09:59,329 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:09:59,329 INFO L82 PathProgramCache]: Analyzing trace with hash -1964839795, now seen corresponding path program 40 times [2018-10-22 16:09:59,330 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:09:59,330 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:59,330 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:09:59,330 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:09:59,330 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:09:59,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:09:59,680 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:09:59,680 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:59,680 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:09:59,680 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:09:59,680 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:09:59,681 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:09:59,681 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 136 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 136 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:09:59,687 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:09:59,687 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:09:59,721 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:09:59,721 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:09:59,723 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:00,174 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:00,174 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:00,396 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:00,415 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:00,415 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 137 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 137 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:00,430 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:10:00,430 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:10:00,516 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:10:00,517 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:00,521 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:00,544 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:00,544 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:00,794 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:00,795 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:00,795 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 46 [2018-10-22 16:10:00,795 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:00,796 INFO L460 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-10-22 16:10:00,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-10-22 16:10:00,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=387, Invalid=1683, Unknown=0, NotChecked=0, Total=2070 [2018-10-22 16:10:00,796 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 46 states. [2018-10-22 16:10:03,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:03,635 INFO L93 Difference]: Finished difference Result 515 states and 598 transitions. [2018-10-22 16:10:03,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-10-22 16:10:03,636 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 119 [2018-10-22 16:10:03,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:03,638 INFO L225 Difference]: With dead ends: 515 [2018-10-22 16:10:03,638 INFO L226 Difference]: Without dead ends: 462 [2018-10-22 16:10:03,639 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 553 GetRequests, 409 SyntacticMatches, 48 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4487 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1725, Invalid=7781, Unknown=0, NotChecked=0, Total=9506 [2018-10-22 16:10:03,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 462 states. [2018-10-22 16:10:03,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 462 to 154. [2018-10-22 16:10:03,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:10:03,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-10-22 16:10:03,881 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-10-22 16:10:03,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:03,881 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-10-22 16:10:03,882 INFO L482 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-10-22 16:10:03,882 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-10-22 16:10:03,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:10:03,882 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:03,882 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 6, 6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:03,883 INFO L424 AbstractCegarLoop]: === Iteration 72 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:03,883 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:03,883 INFO L82 PathProgramCache]: Analyzing trace with hash -1911429607, now seen corresponding path program 41 times [2018-10-22 16:10:03,883 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:03,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:03,884 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:03,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:03,884 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:03,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:04,623 INFO L134 CoverageAnalysis]: Checked inductivity of 470 backedges. 230 proven. 60 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:04,623 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:04,623 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:04,623 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:04,623 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:04,623 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:04,623 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 138 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 138 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:04,633 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:10:04,633 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:10:04,671 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-10-22 16:10:04,671 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:04,673 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:05,096 INFO L134 CoverageAnalysis]: Checked inductivity of 470 backedges. 230 proven. 60 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:05,096 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:05,319 INFO L134 CoverageAnalysis]: Checked inductivity of 470 backedges. 230 proven. 60 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:05,339 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:05,340 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 139 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 139 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:05,356 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:10:05,356 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:10:05,509 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-10-22 16:10:05,509 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:05,513 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:05,536 INFO L134 CoverageAnalysis]: Checked inductivity of 470 backedges. 230 proven. 60 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:05,537 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:05,788 INFO L134 CoverageAnalysis]: Checked inductivity of 470 backedges. 230 proven. 60 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:05,789 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:05,789 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 45 [2018-10-22 16:10:05,789 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:05,789 INFO L460 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-10-22 16:10:05,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-10-22 16:10:05,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=370, Invalid=1610, Unknown=0, NotChecked=0, Total=1980 [2018-10-22 16:10:05,790 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 45 states. [2018-10-22 16:10:08,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:08,748 INFO L93 Difference]: Finished difference Result 571 states and 666 transitions. [2018-10-22 16:10:08,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-10-22 16:10:08,748 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 119 [2018-10-22 16:10:08,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:08,751 INFO L225 Difference]: With dead ends: 571 [2018-10-22 16:10:08,751 INFO L226 Difference]: Without dead ends: 518 [2018-10-22 16:10:08,753 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 555 GetRequests, 410 SyntacticMatches, 48 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4487 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1759, Invalid=7943, Unknown=0, NotChecked=0, Total=9702 [2018-10-22 16:10:08,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 518 states. [2018-10-22 16:10:09,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 518 to 154. [2018-10-22 16:10:09,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:10:09,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-10-22 16:10:09,004 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-10-22 16:10:09,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:09,004 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-10-22 16:10:09,004 INFO L482 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-10-22 16:10:09,004 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-10-22 16:10:09,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:10:09,005 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:09,005 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 7, 6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:09,005 INFO L424 AbstractCegarLoop]: === Iteration 73 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:09,005 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:09,005 INFO L82 PathProgramCache]: Analyzing trace with hash 260690597, now seen corresponding path program 42 times [2018-10-22 16:10:09,005 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:09,006 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:09,006 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:09,006 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:09,006 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:09,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:09,607 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:09,608 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:09,608 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:09,608 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:09,608 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:09,608 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:09,608 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 140 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 140 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:09,615 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:10:09,615 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:10:09,655 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-10-22 16:10:09,656 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:09,658 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:10,078 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:10,078 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:10,292 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:10,313 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:10,313 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 141 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 141 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:10,328 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:10:10,328 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:10:10,499 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-10-22 16:10:10,499 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:10,503 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:10,528 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:10,528 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:10,769 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 230 proven. 62 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:10,770 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:10,770 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 44 [2018-10-22 16:10:10,770 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:10,771 INFO L460 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-10-22 16:10:10,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-10-22 16:10:10,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=1535, Unknown=0, NotChecked=0, Total=1892 [2018-10-22 16:10:10,771 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 44 states. [2018-10-22 16:10:13,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:13,935 INFO L93 Difference]: Finished difference Result 625 states and 732 transitions. [2018-10-22 16:10:13,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-10-22 16:10:13,936 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 119 [2018-10-22 16:10:13,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:13,938 INFO L225 Difference]: With dead ends: 625 [2018-10-22 16:10:13,938 INFO L226 Difference]: Without dead ends: 572 [2018-10-22 16:10:13,939 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 555 GetRequests, 411 SyntacticMatches, 48 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4344 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1725, Invalid=7781, Unknown=0, NotChecked=0, Total=9506 [2018-10-22 16:10:13,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2018-10-22 16:10:14,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 154. [2018-10-22 16:10:14,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:10:14,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-10-22 16:10:14,199 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-10-22 16:10:14,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:14,199 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-10-22 16:10:14,199 INFO L482 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-10-22 16:10:14,200 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-10-22 16:10:14,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:10:14,200 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:14,200 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 8, 7, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:14,201 INFO L424 AbstractCegarLoop]: === Iteration 74 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:14,201 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:14,201 INFO L82 PathProgramCache]: Analyzing trace with hash -487886287, now seen corresponding path program 43 times [2018-10-22 16:10:14,201 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:14,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:14,202 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:14,202 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:14,202 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:14,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:14,556 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:14,556 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:14,556 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:14,557 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:14,557 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:14,557 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:14,557 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 142 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 142 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:14,566 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:10:14,567 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:10:14,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:14,598 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:15,164 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:15,165 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:15,385 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:15,404 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:15,405 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 143 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 143 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:15,419 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:10:15,419 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:10:15,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:15,494 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:15,518 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:15,518 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:15,755 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 230 proven. 68 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:15,756 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:15,756 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 43 [2018-10-22 16:10:15,756 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:15,757 INFO L460 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-10-22 16:10:15,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-10-22 16:10:15,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=348, Invalid=1458, Unknown=0, NotChecked=0, Total=1806 [2018-10-22 16:10:15,757 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 43 states. [2018-10-22 16:10:19,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:19,072 INFO L93 Difference]: Finished difference Result 677 states and 796 transitions. [2018-10-22 16:10:19,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-10-22 16:10:19,072 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 119 [2018-10-22 16:10:19,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:19,075 INFO L225 Difference]: With dead ends: 677 [2018-10-22 16:10:19,075 INFO L226 Difference]: Without dead ends: 624 [2018-10-22 16:10:19,076 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 553 GetRequests, 412 SyntacticMatches, 48 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4055 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1626, Invalid=7304, Unknown=0, NotChecked=0, Total=8930 [2018-10-22 16:10:19,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 624 states. [2018-10-22 16:10:19,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 624 to 154. [2018-10-22 16:10:19,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:10:19,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-10-22 16:10:19,338 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-10-22 16:10:19,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:19,338 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-10-22 16:10:19,338 INFO L482 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-10-22 16:10:19,338 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-10-22 16:10:19,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:10:19,339 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:19,339 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 9, 8, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:19,340 INFO L424 AbstractCegarLoop]: === Iteration 75 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:19,340 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:19,340 INFO L82 PathProgramCache]: Analyzing trace with hash -855145283, now seen corresponding path program 44 times [2018-10-22 16:10:19,340 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:19,341 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:19,341 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:10:19,341 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:19,341 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:19,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:19,780 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:19,781 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:19,781 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:19,781 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:19,781 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:19,781 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:19,781 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 144 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 144 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:19,787 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:10:19,788 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:10:19,821 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:10:19,821 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:19,823 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:20,249 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:20,249 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:20,462 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:20,483 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:20,483 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 145 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 145 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:20,498 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:10:20,499 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:10:20,575 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:10:20,575 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:20,580 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:20,603 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:20,603 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:20,846 INFO L134 CoverageAnalysis]: Checked inductivity of 488 backedges. 230 proven. 78 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:20,847 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:20,847 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 42 [2018-10-22 16:10:20,848 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:20,848 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-10-22 16:10:20,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-10-22 16:10:20,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=343, Invalid=1379, Unknown=0, NotChecked=0, Total=1722 [2018-10-22 16:10:20,848 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 42 states. [2018-10-22 16:10:24,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:24,106 INFO L93 Difference]: Finished difference Result 727 states and 858 transitions. [2018-10-22 16:10:24,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-10-22 16:10:24,106 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 119 [2018-10-22 16:10:24,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:24,109 INFO L225 Difference]: With dead ends: 727 [2018-10-22 16:10:24,109 INFO L226 Difference]: Without dead ends: 674 [2018-10-22 16:10:24,110 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 549 GetRequests, 413 SyntacticMatches, 48 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3628 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1471, Invalid=6539, Unknown=0, NotChecked=0, Total=8010 [2018-10-22 16:10:24,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 674 states. [2018-10-22 16:10:24,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 674 to 154. [2018-10-22 16:10:24,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:10:24,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-10-22 16:10:24,358 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-10-22 16:10:24,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:24,358 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-10-22 16:10:24,358 INFO L482 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-10-22 16:10:24,358 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-10-22 16:10:24,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:10:24,358 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:24,359 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 10, 9, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:24,359 INFO L424 AbstractCegarLoop]: === Iteration 76 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:24,359 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:24,359 INFO L82 PathProgramCache]: Analyzing trace with hash 266259017, now seen corresponding path program 45 times [2018-10-22 16:10:24,359 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:24,359 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:24,360 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:24,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:24,360 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:24,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:24,659 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:24,660 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:24,660 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:24,660 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:24,660 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:24,660 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:24,660 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 146 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 146 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:24,668 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:10:24,668 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:10:24,719 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-10-22 16:10:24,719 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:24,722 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:25,396 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:25,397 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:25,676 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:25,696 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:25,697 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 147 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 147 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:25,711 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:10:25,711 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:10:25,901 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-10-22 16:10:25,901 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:25,905 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:25,928 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:25,928 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:26,171 INFO L134 CoverageAnalysis]: Checked inductivity of 502 backedges. 230 proven. 92 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:26,173 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:26,173 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 41 [2018-10-22 16:10:26,173 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:26,173 INFO L460 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-10-22 16:10:26,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-10-22 16:10:26,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=342, Invalid=1298, Unknown=0, NotChecked=0, Total=1640 [2018-10-22 16:10:26,174 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 41 states. [2018-10-22 16:10:29,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:29,481 INFO L93 Difference]: Finished difference Result 775 states and 918 transitions. [2018-10-22 16:10:29,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-10-22 16:10:29,481 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 119 [2018-10-22 16:10:29,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:29,483 INFO L225 Difference]: With dead ends: 775 [2018-10-22 16:10:29,484 INFO L226 Difference]: Without dead ends: 722 [2018-10-22 16:10:29,484 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 543 GetRequests, 414 SyntacticMatches, 48 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3083 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1275, Invalid=5531, Unknown=0, NotChecked=0, Total=6806 [2018-10-22 16:10:29,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 722 states. [2018-10-22 16:10:29,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 722 to 154. [2018-10-22 16:10:29,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-22 16:10:29,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 166 transitions. [2018-10-22 16:10:29,724 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 166 transitions. Word has length 119 [2018-10-22 16:10:29,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:29,724 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 166 transitions. [2018-10-22 16:10:29,724 INFO L482 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-10-22 16:10:29,724 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 166 transitions. [2018-10-22 16:10:29,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-10-22 16:10:29,724 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:29,725 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 11, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:29,725 INFO L424 AbstractCegarLoop]: === Iteration 77 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:29,725 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:29,725 INFO L82 PathProgramCache]: Analyzing trace with hash -157154603, now seen corresponding path program 10 times [2018-10-22 16:10:29,725 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:29,725 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:29,725 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:29,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:29,726 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:29,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:30,194 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:30,194 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:30,194 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:30,195 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:30,195 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:30,195 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:30,195 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 148 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 148 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:30,201 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:10:30,201 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:10:30,238 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:10:30,238 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:30,240 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:30,597 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:30,597 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:30,817 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:30,838 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:30,838 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 149 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 149 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:30,853 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:10:30,853 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:10:30,940 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:10:30,940 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:30,945 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:30,967 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:30,967 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:31,208 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 230 proven. 110 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:31,209 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:31,209 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 40 [2018-10-22 16:10:31,209 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:31,209 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-10-22 16:10:31,210 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-10-22 16:10:31,210 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=345, Invalid=1215, Unknown=0, NotChecked=0, Total=1560 [2018-10-22 16:10:31,210 INFO L87 Difference]: Start difference. First operand 154 states and 166 transitions. Second operand 40 states. [2018-10-22 16:10:34,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:34,458 INFO L93 Difference]: Finished difference Result 826 states and 982 transitions. [2018-10-22 16:10:34,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-10-22 16:10:34,458 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 119 [2018-10-22 16:10:34,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:34,461 INFO L225 Difference]: With dead ends: 826 [2018-10-22 16:10:34,461 INFO L226 Difference]: Without dead ends: 773 [2018-10-22 16:10:34,462 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 535 GetRequests, 415 SyntacticMatches, 48 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2452 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1059, Invalid=4343, Unknown=0, NotChecked=0, Total=5402 [2018-10-22 16:10:34,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 773 states. [2018-10-22 16:10:34,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 773 to 157. [2018-10-22 16:10:34,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-10-22 16:10:34,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 170 transitions. [2018-10-22 16:10:34,738 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 170 transitions. Word has length 119 [2018-10-22 16:10:34,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:34,738 INFO L481 AbstractCegarLoop]: Abstraction has 157 states and 170 transitions. [2018-10-22 16:10:34,738 INFO L482 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-10-22 16:10:34,739 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 170 transitions. [2018-10-22 16:10:34,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-10-22 16:10:34,739 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:34,739 INFO L375 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:34,740 INFO L424 AbstractCegarLoop]: === Iteration 78 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:34,740 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:34,740 INFO L82 PathProgramCache]: Analyzing trace with hash 777037143, now seen corresponding path program 20 times [2018-10-22 16:10:34,740 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:34,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:34,741 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:34,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:34,741 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:34,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:34,935 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 151 proven. 238 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-10-22 16:10:34,935 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:34,935 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:34,935 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:34,935 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:34,935 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:34,935 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 150 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 150 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:34,943 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:10:34,943 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:10:34,976 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:10:34,977 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:34,978 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:35,056 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:35,057 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:35,365 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:35,384 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:35,385 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 151 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 151 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:35,399 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:10:35,400 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:10:35,478 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:10:35,479 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:35,484 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:35,497 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:35,497 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:35,659 INFO L134 CoverageAnalysis]: Checked inductivity of 542 backedges. 152 proven. 210 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-10-22 16:10:35,660 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:35,660 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16, 16, 16] total 19 [2018-10-22 16:10:35,660 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:35,661 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-22 16:10:35,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-22 16:10:35,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=239, Unknown=0, NotChecked=0, Total=342 [2018-10-22 16:10:35,661 INFO L87 Difference]: Start difference. First operand 157 states and 170 transitions. Second operand 19 states. [2018-10-22 16:10:36,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:36,240 INFO L93 Difference]: Finished difference Result 167 states and 180 transitions. [2018-10-22 16:10:36,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-10-22 16:10:36,241 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 121 [2018-10-22 16:10:36,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:36,242 INFO L225 Difference]: With dead ends: 167 [2018-10-22 16:10:36,243 INFO L226 Difference]: Without dead ends: 165 [2018-10-22 16:10:36,243 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 513 GetRequests, 448 SyntacticMatches, 46 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 347 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=116, Invalid=304, Unknown=0, NotChecked=0, Total=420 [2018-10-22 16:10:36,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-10-22 16:10:36,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-10-22 16:10:36,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-10-22 16:10:36,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 178 transitions. [2018-10-22 16:10:36,519 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 178 transitions. Word has length 121 [2018-10-22 16:10:36,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:36,519 INFO L481 AbstractCegarLoop]: Abstraction has 165 states and 178 transitions. [2018-10-22 16:10:36,519 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-22 16:10:36,519 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 178 transitions. [2018-10-22 16:10:36,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-22 16:10:36,520 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:36,520 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:36,520 INFO L424 AbstractCegarLoop]: === Iteration 79 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:36,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:36,520 INFO L82 PathProgramCache]: Analyzing trace with hash -1277952389, now seen corresponding path program 21 times [2018-10-22 16:10:36,520 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:36,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:36,521 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:36,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:36,521 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:36,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:37,332 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:37,332 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:37,332 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:37,332 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:37,333 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:37,333 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:37,333 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 152 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 152 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:37,339 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:10:37,339 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:10:37,385 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-10-22 16:10:37,385 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:37,387 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:37,953 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:37,954 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:38,246 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:38,266 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:38,266 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 153 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 153 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:38,281 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:10:38,281 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:10:38,472 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-10-22 16:10:38,472 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:38,476 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:38,504 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:38,505 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:38,846 INFO L134 CoverageAnalysis]: Checked inductivity of 627 backedges. 275 proven. 132 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:38,847 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:38,847 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 54 [2018-10-22 16:10:38,847 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:38,848 INFO L460 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-10-22 16:10:38,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-10-22 16:10:38,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=575, Invalid=2287, Unknown=0, NotChecked=0, Total=2862 [2018-10-22 16:10:38,848 INFO L87 Difference]: Start difference. First operand 165 states and 178 transitions. Second operand 54 states. [2018-10-22 16:10:40,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:40,819 INFO L93 Difference]: Finished difference Result 294 states and 332 transitions. [2018-10-22 16:10:40,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-10-22 16:10:40,820 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 129 [2018-10-22 16:10:40,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:40,821 INFO L225 Difference]: With dead ends: 294 [2018-10-22 16:10:40,821 INFO L226 Difference]: Without dead ends: 237 [2018-10-22 16:10:40,822 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 569 GetRequests, 439 SyntacticMatches, 52 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4047 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1225, Invalid=5095, Unknown=0, NotChecked=0, Total=6320 [2018-10-22 16:10:40,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-10-22 16:10:41,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 167. [2018-10-22 16:10:41,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-22 16:10:41,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-10-22 16:10:41,130 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-10-22 16:10:41,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:41,130 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-10-22 16:10:41,130 INFO L482 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-10-22 16:10:41,130 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-10-22 16:10:41,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-22 16:10:41,131 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:41,131 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 11, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:41,131 INFO L424 AbstractCegarLoop]: === Iteration 80 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:41,131 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:41,131 INFO L82 PathProgramCache]: Analyzing trace with hash -1178325753, now seen corresponding path program 46 times [2018-10-22 16:10:41,131 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:41,132 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:41,132 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:41,132 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:41,132 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:41,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:41,479 INFO L134 CoverageAnalysis]: Checked inductivity of 607 backedges. 275 proven. 112 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:41,480 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:41,480 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:41,480 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:41,480 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:41,480 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:41,480 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 154 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 154 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:41,487 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:10:41,487 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:10:41,521 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:10:41,522 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:41,523 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:42,114 INFO L134 CoverageAnalysis]: Checked inductivity of 607 backedges. 275 proven. 112 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:42,114 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:42,382 INFO L134 CoverageAnalysis]: Checked inductivity of 607 backedges. 275 proven. 112 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:42,402 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:42,402 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 155 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 155 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:42,417 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-22 16:10:42,417 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-22 16:10:42,513 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-22 16:10:42,513 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:42,518 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:42,546 INFO L134 CoverageAnalysis]: Checked inductivity of 607 backedges. 275 proven. 112 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:42,546 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:42,848 INFO L134 CoverageAnalysis]: Checked inductivity of 607 backedges. 275 proven. 112 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:42,849 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:42,850 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 53 [2018-10-22 16:10:42,850 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:42,850 INFO L460 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-10-22 16:10:42,850 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-10-22 16:10:42,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=539, Invalid=2217, Unknown=0, NotChecked=0, Total=2756 [2018-10-22 16:10:42,851 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 53 states. [2018-10-22 16:10:45,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:45,274 INFO L93 Difference]: Finished difference Result 364 states and 415 transitions. [2018-10-22 16:10:45,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-10-22 16:10:45,274 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 129 [2018-10-22 16:10:45,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:45,276 INFO L225 Difference]: With dead ends: 364 [2018-10-22 16:10:45,276 INFO L226 Difference]: Without dead ends: 307 [2018-10-22 16:10:45,276 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 580 GetRequests, 440 SyntacticMatches, 52 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4508 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1485, Invalid=6525, Unknown=0, NotChecked=0, Total=8010 [2018-10-22 16:10:45,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307 states. [2018-10-22 16:10:45,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307 to 167. [2018-10-22 16:10:45,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-22 16:10:45,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-10-22 16:10:45,574 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-10-22 16:10:45,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:45,574 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-10-22 16:10:45,574 INFO L482 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-10-22 16:10:45,574 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-10-22 16:10:45,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-22 16:10:45,575 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:45,575 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 10, 9, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:45,575 INFO L424 AbstractCegarLoop]: === Iteration 81 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:45,575 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:45,575 INFO L82 PathProgramCache]: Analyzing trace with hash -154759533, now seen corresponding path program 47 times [2018-10-22 16:10:45,575 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:45,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:45,576 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:45,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:45,576 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:45,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:46,084 INFO L134 CoverageAnalysis]: Checked inductivity of 591 backedges. 275 proven. 96 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:46,084 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:46,085 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:46,085 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:46,085 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:46,085 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:46,085 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 156 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 156 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:46,092 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:10:46,092 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:10:46,135 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-10-22 16:10:46,136 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:46,138 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:46,705 INFO L134 CoverageAnalysis]: Checked inductivity of 591 backedges. 275 proven. 96 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:46,706 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:46,962 INFO L134 CoverageAnalysis]: Checked inductivity of 591 backedges. 275 proven. 96 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:46,983 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:46,983 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 157 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 157 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:46,998 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-10-22 16:10:46,999 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:10:47,181 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-10-22 16:10:47,181 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:47,186 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:47,226 INFO L134 CoverageAnalysis]: Checked inductivity of 591 backedges. 275 proven. 96 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:47,226 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:47,509 INFO L134 CoverageAnalysis]: Checked inductivity of 591 backedges. 275 proven. 96 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:47,511 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:47,511 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 52 [2018-10-22 16:10:47,511 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:47,511 INFO L460 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-10-22 16:10:47,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-10-22 16:10:47,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=507, Invalid=2145, Unknown=0, NotChecked=0, Total=2652 [2018-10-22 16:10:47,512 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 52 states. [2018-10-22 16:10:50,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:50,469 INFO L93 Difference]: Finished difference Result 432 states and 496 transitions. [2018-10-22 16:10:50,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-10-22 16:10:50,470 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 129 [2018-10-22 16:10:50,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:50,471 INFO L225 Difference]: With dead ends: 432 [2018-10-22 16:10:50,471 INFO L226 Difference]: Without dead ends: 375 [2018-10-22 16:10:50,472 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 589 GetRequests, 441 SyntacticMatches, 52 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4938 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1729, Invalid=7777, Unknown=0, NotChecked=0, Total=9506 [2018-10-22 16:10:50,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 375 states. [2018-10-22 16:10:50,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 375 to 167. [2018-10-22 16:10:50,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-22 16:10:50,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-10-22 16:10:50,793 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-10-22 16:10:50,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:50,793 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-10-22 16:10:50,793 INFO L482 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-10-22 16:10:50,793 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-10-22 16:10:50,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-22 16:10:50,793 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:50,793 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 9, 8, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:50,794 INFO L424 AbstractCegarLoop]: === Iteration 82 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:50,794 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:50,794 INFO L82 PathProgramCache]: Analyzing trace with hash 1607197471, now seen corresponding path program 48 times [2018-10-22 16:10:50,794 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:50,794 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:50,795 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:50,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:50,795 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:50,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:51,149 INFO L134 CoverageAnalysis]: Checked inductivity of 579 backedges. 275 proven. 84 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:51,149 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:51,150 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:51,150 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:51,150 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:51,150 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:51,150 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 158 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 158 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:51,160 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:10:51,160 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:10:51,216 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-10-22 16:10:51,217 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:51,219 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:51,754 INFO L134 CoverageAnalysis]: Checked inductivity of 579 backedges. 275 proven. 84 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:51,755 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:52,012 INFO L134 CoverageAnalysis]: Checked inductivity of 579 backedges. 275 proven. 84 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:52,033 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:52,033 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 159 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 159 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:52,049 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-10-22 16:10:52,049 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-10-22 16:10:52,248 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-10-22 16:10:52,248 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:10:52,253 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:52,281 INFO L134 CoverageAnalysis]: Checked inductivity of 579 backedges. 275 proven. 84 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:52,282 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:52,569 INFO L134 CoverageAnalysis]: Checked inductivity of 579 backedges. 275 proven. 84 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:52,570 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:52,571 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 51 [2018-10-22 16:10:52,571 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:52,571 INFO L460 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-10-22 16:10:52,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-10-22 16:10:52,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=479, Invalid=2071, Unknown=0, NotChecked=0, Total=2550 [2018-10-22 16:10:52,572 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 51 states. [2018-10-22 16:10:56,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:10:56,190 INFO L93 Difference]: Finished difference Result 498 states and 575 transitions. [2018-10-22 16:10:56,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-10-22 16:10:56,191 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 129 [2018-10-22 16:10:56,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:10:56,192 INFO L225 Difference]: With dead ends: 498 [2018-10-22 16:10:56,192 INFO L226 Difference]: Without dead ends: 441 [2018-10-22 16:10:56,193 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 596 GetRequests, 442 SyntacticMatches, 52 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5287 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1933, Invalid=8779, Unknown=0, NotChecked=0, Total=10712 [2018-10-22 16:10:56,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states. [2018-10-22 16:10:56,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 167. [2018-10-22 16:10:56,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-22 16:10:56,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-10-22 16:10:56,519 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-10-22 16:10:56,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:10:56,519 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-10-22 16:10:56,519 INFO L482 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-10-22 16:10:56,519 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-10-22 16:10:56,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-22 16:10:56,520 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:10:56,520 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 8, 7, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:10:56,520 INFO L424 AbstractCegarLoop]: === Iteration 83 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:10:56,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:10:56,521 INFO L82 PathProgramCache]: Analyzing trace with hash -285939029, now seen corresponding path program 49 times [2018-10-22 16:10:56,521 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:10:56,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:56,521 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:10:56,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:10:56,522 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:10:56,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:56,831 INFO L134 CoverageAnalysis]: Checked inductivity of 571 backedges. 275 proven. 76 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:56,831 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:56,831 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:10:56,832 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:10:56,832 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:10:56,832 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:56,832 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 160 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 160 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:10:56,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:10:56,839 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:10:56,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:56,877 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:57,378 INFO L134 CoverageAnalysis]: Checked inductivity of 571 backedges. 275 proven. 76 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:57,378 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:57,636 INFO L134 CoverageAnalysis]: Checked inductivity of 571 backedges. 275 proven. 76 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:57,658 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:10:57,658 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 161 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 161 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:10:57,672 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:10:57,673 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-22 16:10:57,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:10:57,757 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:10:57,784 INFO L134 CoverageAnalysis]: Checked inductivity of 571 backedges. 275 proven. 76 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:57,784 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:10:58,058 INFO L134 CoverageAnalysis]: Checked inductivity of 571 backedges. 275 proven. 76 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:10:58,060 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:10:58,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 50 [2018-10-22 16:10:58,060 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:10:58,060 INFO L460 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-10-22 16:10:58,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-10-22 16:10:58,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=455, Invalid=1995, Unknown=0, NotChecked=0, Total=2450 [2018-10-22 16:10:58,061 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 50 states. [2018-10-22 16:11:01,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:11:01,867 INFO L93 Difference]: Finished difference Result 562 states and 652 transitions. [2018-10-22 16:11:01,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-10-22 16:11:01,868 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 129 [2018-10-22 16:11:01,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:11:01,870 INFO L225 Difference]: With dead ends: 562 [2018-10-22 16:11:01,870 INFO L226 Difference]: Without dead ends: 505 [2018-10-22 16:11:01,871 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 601 GetRequests, 443 SyntacticMatches, 52 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5517 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=2079, Invalid=9477, Unknown=0, NotChecked=0, Total=11556 [2018-10-22 16:11:01,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 505 states. [2018-10-22 16:11:02,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 505 to 167. [2018-10-22 16:11:02,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-22 16:11:02,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-10-22 16:11:02,221 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-10-22 16:11:02,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:11:02,222 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-10-22 16:11:02,222 INFO L482 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-10-22 16:11:02,222 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-10-22 16:11:02,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-22 16:11:02,222 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:11:02,222 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 7, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:11:02,223 INFO L424 AbstractCegarLoop]: === Iteration 84 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:11:02,223 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:11:02,223 INFO L82 PathProgramCache]: Analyzing trace with hash 798123319, now seen corresponding path program 50 times [2018-10-22 16:11:02,223 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:11:02,223 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:11:02,223 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-22 16:11:02,224 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:11:02,224 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:11:02,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:11:02,587 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:11:02,587 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:11:02,587 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:11:02,588 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:11:02,588 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:11:02,588 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:11:02,588 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 162 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 162 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:11:02,595 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:11:02,595 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:11:02,631 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:11:02,631 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:11:02,633 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:11:03,123 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:11:03,123 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:11:03,382 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:11:03,401 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:11:03,401 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 163 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 163 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:11:03,416 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-22 16:11:03,416 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-10-22 16:11:03,501 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-22 16:11:03,501 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:11:03,506 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:11:03,542 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:11:03,542 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:11:03,818 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:11:03,819 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:11:03,819 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 49 [2018-10-22 16:11:03,820 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:11:03,820 INFO L460 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-10-22 16:11:03,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-10-22 16:11:03,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1917, Unknown=0, NotChecked=0, Total=2352 [2018-10-22 16:11:03,820 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 49 states. [2018-10-22 16:11:08,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:11:08,109 INFO L93 Difference]: Finished difference Result 624 states and 727 transitions. [2018-10-22 16:11:08,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2018-10-22 16:11:08,109 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 129 [2018-10-22 16:11:08,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:11:08,111 INFO L225 Difference]: With dead ends: 624 [2018-10-22 16:11:08,111 INFO L226 Difference]: Without dead ends: 567 [2018-10-22 16:11:08,112 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 604 GetRequests, 444 SyntacticMatches, 52 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5602 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=2155, Invalid=9835, Unknown=0, NotChecked=0, Total=11990 [2018-10-22 16:11:08,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states. [2018-10-22 16:11:08,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 167. [2018-10-22 16:11:08,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-22 16:11:08,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 180 transitions. [2018-10-22 16:11:08,464 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 180 transitions. Word has length 129 [2018-10-22 16:11:08,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-22 16:11:08,464 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 180 transitions. [2018-10-22 16:11:08,464 INFO L482 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-10-22 16:11:08,464 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 180 transitions. [2018-10-22 16:11:08,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-22 16:11:08,465 INFO L367 BasicCegarLoop]: Found error trace [2018-10-22 16:11:08,465 INFO L375 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 7, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-22 16:11:08,465 INFO L424 AbstractCegarLoop]: === Iteration 85 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-22 16:11:08,465 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-22 16:11:08,465 INFO L82 PathProgramCache]: Analyzing trace with hash -903540029, now seen corresponding path program 51 times [2018-10-22 16:11:08,465 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-22 16:11:08,466 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:11:08,466 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-22 16:11:08,466 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-22 16:11:08,466 INFO L295 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-22 16:11:08,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-22 16:11:08,778 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:11:08,778 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:11:08,778 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-22 16:11:08,778 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-22 16:11:08,778 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-22 16:11:08,779 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:11:08,779 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 164 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 164 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-22 16:11:08,786 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:11:08,786 INFO L295 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:11:08,830 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-10-22 16:11:08,831 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:11:08,833 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:11:09,308 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:11:09,308 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:11:09,566 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:11:09,586 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-22 16:11:09,586 INFO L197 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/cvc4nyu Starting monitored process 165 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 165 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-10-22 16:11:09,603 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-22 16:11:09,604 INFO L295 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-22 16:11:09,810 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-10-22 16:11:09,810 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-22 16:11:09,815 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-22 16:11:09,852 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:11:09,852 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-22 16:11:10,228 INFO L134 CoverageAnalysis]: Checked inductivity of 567 backedges. 275 proven. 72 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-22 16:11:10,230 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-10-22 16:11:10,230 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 48 [2018-10-22 16:11:10,230 INFO L258 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-22 16:11:10,230 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-10-22 16:11:10,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-10-22 16:11:10,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=419, Invalid=1837, Unknown=0, NotChecked=0, Total=2256 [2018-10-22 16:11:10,231 INFO L87 Difference]: Start difference. First operand 167 states and 180 transitions. Second operand 48 states. [2018-10-22 16:11:14,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-22 16:11:14,512 INFO L93 Difference]: Finished difference Result 684 states and 800 transitions. [2018-10-22 16:11:14,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-10-22 16:11:14,512 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 129 [2018-10-22 16:11:14,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-22 16:11:14,514 INFO L225 Difference]: With dead ends: 684 [2018-10-22 16:11:14,514 INFO L226 Difference]: Without dead ends: 627 [2018-10-22 16:11:14,515 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 605 GetRequests, 445 SyntacticMatches, 52 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5528 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=2155, Invalid=9835, Unknown=0, NotChecked=0, Total=11990 [2018-10-22 16:11:14,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 627 states. Received shutdown request... [2018-10-22 16:11:15,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 627 to 167. [2018-10-22 16:11:15,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-22 16:11:15,098 WARN L550 AbstractCegarLoop]: Verification canceled [2018-10-22 16:11:15,104 WARN L205 ceAbstractionStarter]: Timeout [2018-10-22 16:11:15,105 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.10 04:11:15 BoogieIcfgContainer [2018-10-22 16:11:15,105 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-22 16:11:15,105 INFO L168 Benchmark]: Toolchain (without parser) took 237700.66 ms. Allocated memory was 1.5 GB in the beginning and 2.2 GB in the end (delta: 677.4 MB). Free memory was 1.4 GB in the beginning and 1.8 GB in the end (delta: -403.7 MB). Peak memory consumption was 565.3 MB. Max. memory is 7.1 GB. [2018-10-22 16:11:15,106 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-22 16:11:15,106 INFO L168 Benchmark]: CACSL2BoogieTranslator took 245.65 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-10-22 16:11:15,107 INFO L168 Benchmark]: Boogie Procedure Inliner took 18.89 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-22 16:11:15,107 INFO L168 Benchmark]: Boogie Preprocessor took 22.53 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-22 16:11:15,107 INFO L168 Benchmark]: RCFGBuilder took 502.96 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 733.5 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -775.9 MB). Peak memory consumption was 26.5 MB. Max. memory is 7.1 GB. [2018-10-22 16:11:15,108 INFO L168 Benchmark]: TraceAbstraction took 236906.29 ms. Allocated memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: -56.1 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 361.6 MB). Peak memory consumption was 597.1 MB. Max. memory is 7.1 GB. [2018-10-22 16:11:15,109 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 245.65 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 18.89 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 22.53 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 502.96 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 733.5 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -775.9 MB). Peak memory consumption was 26.5 MB. Max. memory is 7.1 GB. * TraceAbstraction took 236906.29 ms. Allocated memory was 2.3 GB in the beginning and 2.2 GB in the end (delta: -56.1 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 361.6 MB). Peak memory consumption was 597.1 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 5]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 5). Cancelled while ReachableStatesComputation was computing reachable states (1 states constructedinput type DoubleDeckerAutomaton). - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 27 locations, 1 error locations. TIMEOUT Result, 236.8s OverallTime, 85 OverallIterations, 12 TraceHistogramMax, 117.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4025 SDtfs, 10410 SDslu, 35144 SDs, 0 SdLazy, 32002 SolverSat, 6795 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 30.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 33004 GetRequests, 25320 SyntacticMatches, 2924 SemanticMatches, 4760 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 168306 ImplicationChecksByTransitivity, 119.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=167occurred in iteration=79, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 1.4s AbstIntTime, 3 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 10.3s AutomataMinimizationTime, 85 MinimizatonAttempts, 14482 StatesRemovedByMinimization, 73 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.7s SsaConstructionTime, 9.3s SatisfiabilityAnalysisTime, 92.5s InterpolantComputationTime, 21951 NumberOfCodeBlocks, 21951 NumberOfCodeBlocksAsserted, 875 NumberOfCheckSat, 36134 ConstructedInterpolants, 0 QuantifiedInterpolants, 14393820 SizeOfPredicates, 1048 NumberOfNonLiveVariables, 31524 ConjunctsInSsa, 3312 ConjunctsInUnsatCore, 413 InterpolantComputations, 3 PerfectInterpolantSequences, 94282/116072 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Completed graceful shutdown