java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/eca-rers2012/Problem17_label06_true-unreach-call.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-d380424 [2018-10-24 16:44:18,550 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-24 16:44:18,552 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-24 16:44:18,564 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-24 16:44:18,564 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-24 16:44:18,565 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-24 16:44:18,567 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-24 16:44:18,569 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-24 16:44:18,570 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-24 16:44:18,571 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-24 16:44:18,572 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-24 16:44:18,572 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-24 16:44:18,573 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-24 16:44:18,574 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-24 16:44:18,576 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-24 16:44:18,576 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-24 16:44:18,577 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-24 16:44:18,579 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-24 16:44:18,581 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-24 16:44:18,583 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-24 16:44:18,584 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-24 16:44:18,585 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-24 16:44:18,588 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-24 16:44:18,588 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-24 16:44:18,589 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-24 16:44:18,590 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-24 16:44:18,591 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-24 16:44:18,592 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-24 16:44:18,592 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-24 16:44:18,594 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-24 16:44:18,594 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-24 16:44:18,595 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-24 16:44:18,595 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-24 16:44:18,595 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-24 16:44:18,596 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-24 16:44:18,597 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-24 16:44:18,597 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf [2018-10-24 16:44:18,613 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-24 16:44:18,613 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-24 16:44:18,614 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-24 16:44:18,614 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-10-24 16:44:18,615 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-24 16:44:18,615 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-24 16:44:18,615 INFO L133 SettingsManager]: * Use SBE=true [2018-10-24 16:44:18,615 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-24 16:44:18,616 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-24 16:44:18,616 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-24 16:44:18,616 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-10-24 16:44:18,616 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-24 16:44:18,616 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-10-24 16:44:18,616 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-10-24 16:44:18,617 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-10-24 16:44:18,617 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-24 16:44:18,617 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-24 16:44:18,617 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-24 16:44:18,617 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-24 16:44:18,618 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-24 16:44:18,618 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-24 16:44:18,618 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-24 16:44:18,618 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-10-24 16:44:18,618 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-10-24 16:44:18,619 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-24 16:44:18,619 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-24 16:44:18,619 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-10-24 16:44:18,619 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-10-24 16:44:18,671 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-24 16:44:18,686 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-24 16:44:18,690 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-24 16:44:18,692 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-24 16:44:18,693 INFO L276 PluginConnector]: CDTParser initialized [2018-10-24 16:44:18,694 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/../../../trunk/examples/svcomp/eca-rers2012/Problem17_label06_true-unreach-call.c [2018-10-24 16:44:18,763 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data/67ee516c2/c17dd1cdbeff487d87b05736b0ad6a55/FLAG86ff6bac7 [2018-10-24 16:44:19,521 INFO L298 CDTParser]: Found 1 translation units. [2018-10-24 16:44:19,524 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/eca-rers2012/Problem17_label06_true-unreach-call.c [2018-10-24 16:44:19,553 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data/67ee516c2/c17dd1cdbeff487d87b05736b0ad6a55/FLAG86ff6bac7 [2018-10-24 16:44:19,576 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/data/67ee516c2/c17dd1cdbeff487d87b05736b0ad6a55 [2018-10-24 16:44:19,588 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-24 16:44:19,590 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-10-24 16:44:19,591 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-24 16:44:19,591 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-24 16:44:19,595 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-24 16:44:19,596 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 04:44:19" (1/1) ... [2018-10-24 16:44:19,599 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@73d4e6ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:19, skipping insertion in model container [2018-10-24 16:44:19,599 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 04:44:19" (1/1) ... [2018-10-24 16:44:19,610 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-24 16:44:19,728 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-24 16:44:20,733 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-24 16:44:20,738 INFO L189 MainTranslator]: Completed pre-run [2018-10-24 16:44:21,113 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-24 16:44:21,137 INFO L193 MainTranslator]: Completed translation [2018-10-24 16:44:21,138 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21 WrapperNode [2018-10-24 16:44:21,138 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-24 16:44:21,139 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-24 16:44:21,140 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-24 16:44:21,140 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-24 16:44:21,150 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (1/1) ... [2018-10-24 16:44:21,216 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (1/1) ... [2018-10-24 16:44:21,687 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-24 16:44:21,688 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-24 16:44:21,688 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-24 16:44:21,688 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-24 16:44:21,700 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (1/1) ... [2018-10-24 16:44:21,700 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (1/1) ... [2018-10-24 16:44:21,749 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (1/1) ... [2018-10-24 16:44:21,750 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (1/1) ... [2018-10-24 16:44:21,862 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (1/1) ... [2018-10-24 16:44:21,885 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (1/1) ... [2018-10-24 16:44:21,931 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (1/1) ... [2018-10-24 16:44:21,983 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-24 16:44:21,984 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-24 16:44:21,984 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-24 16:44:21,984 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-24 16:44:21,985 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-24 16:44:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-10-24 16:44:22,052 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-24 16:44:22,053 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-24 16:44:33,113 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-24 16:44:33,114 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:44:33 BoogieIcfgContainer [2018-10-24 16:44:33,114 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-24 16:44:33,115 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-24 16:44:33,115 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-24 16:44:33,119 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-24 16:44:33,119 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.10 04:44:19" (1/3) ... [2018-10-24 16:44:33,120 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6a1c9ee8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.10 04:44:33, skipping insertion in model container [2018-10-24 16:44:33,120 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:44:21" (2/3) ... [2018-10-24 16:44:33,121 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6a1c9ee8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.10 04:44:33, skipping insertion in model container [2018-10-24 16:44:33,121 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:44:33" (3/3) ... [2018-10-24 16:44:33,123 INFO L112 eAbstractionObserver]: Analyzing ICFG Problem17_label06_true-unreach-call.c [2018-10-24 16:44:33,133 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-24 16:44:33,147 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-10-24 16:44:33,165 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-10-24 16:44:33,218 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-10-24 16:44:33,219 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-24 16:44:33,219 INFO L383 AbstractCegarLoop]: Hoare is true [2018-10-24 16:44:33,219 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-24 16:44:33,219 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-24 16:44:33,219 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-24 16:44:33,220 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-24 16:44:33,220 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-24 16:44:33,220 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-24 16:44:33,255 INFO L276 IsEmpty]: Start isEmpty. Operand 591 states. [2018-10-24 16:44:33,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-10-24 16:44:33,264 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:44:33,265 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:44:33,268 INFO L424 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:44:33,274 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:44:33,274 INFO L82 PathProgramCache]: Analyzing trace with hash 18549650, now seen corresponding path program 1 times [2018-10-24 16:44:33,277 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:44:33,277 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:44:33,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:44:33,326 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:44:33,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:44:33,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:44:33,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-24 16:44:33,703 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:44:33,703 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-24 16:44:33,710 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-24 16:44:33,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-24 16:44:33,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:44:33,730 INFO L87 Difference]: Start difference. First operand 591 states. Second operand 4 states. [2018-10-24 16:44:44,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:44:44,420 INFO L93 Difference]: Finished difference Result 2122 states and 3950 transitions. [2018-10-24 16:44:44,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-24 16:44:44,422 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-10-24 16:44:44,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:44:44,461 INFO L225 Difference]: With dead ends: 2122 [2018-10-24 16:44:44,461 INFO L226 Difference]: Without dead ends: 1524 [2018-10-24 16:44:44,468 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:44:44,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1524 states. [2018-10-24 16:44:44,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1524 to 1497. [2018-10-24 16:44:44,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1497 states. [2018-10-24 16:44:44,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1497 states to 1497 states and 2656 transitions. [2018-10-24 16:44:44,604 INFO L78 Accepts]: Start accepts. Automaton has 1497 states and 2656 transitions. Word has length 32 [2018-10-24 16:44:44,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:44:44,604 INFO L481 AbstractCegarLoop]: Abstraction has 1497 states and 2656 transitions. [2018-10-24 16:44:44,605 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-24 16:44:44,605 INFO L276 IsEmpty]: Start isEmpty. Operand 1497 states and 2656 transitions. [2018-10-24 16:44:44,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-10-24 16:44:44,610 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:44:44,610 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:44:44,611 INFO L424 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:44:44,611 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:44:44,611 INFO L82 PathProgramCache]: Analyzing trace with hash -659292299, now seen corresponding path program 1 times [2018-10-24 16:44:44,611 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:44:44,611 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:44:44,612 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:44:44,613 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:44:44,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:44:44,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:44:44,884 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-24 16:44:44,885 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:44:44,885 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-24 16:44:44,887 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-24 16:44:44,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-24 16:44:44,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:44:44,888 INFO L87 Difference]: Start difference. First operand 1497 states and 2656 transitions. Second operand 4 states. [2018-10-24 16:44:55,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:44:55,345 INFO L93 Difference]: Finished difference Result 5604 states and 10151 transitions. [2018-10-24 16:44:55,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-24 16:44:55,346 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 107 [2018-10-24 16:44:55,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:44:55,368 INFO L225 Difference]: With dead ends: 5604 [2018-10-24 16:44:55,368 INFO L226 Difference]: Without dead ends: 4109 [2018-10-24 16:44:55,372 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:44:55,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4109 states. [2018-10-24 16:44:55,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4109 to 4098. [2018-10-24 16:44:55,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4098 states. [2018-10-24 16:44:55,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4098 states to 4098 states and 6039 transitions. [2018-10-24 16:44:55,451 INFO L78 Accepts]: Start accepts. Automaton has 4098 states and 6039 transitions. Word has length 107 [2018-10-24 16:44:55,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:44:55,451 INFO L481 AbstractCegarLoop]: Abstraction has 4098 states and 6039 transitions. [2018-10-24 16:44:55,452 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-24 16:44:55,452 INFO L276 IsEmpty]: Start isEmpty. Operand 4098 states and 6039 transitions. [2018-10-24 16:44:55,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-10-24 16:44:55,462 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:44:55,463 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:44:55,463 INFO L424 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:44:55,463 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:44:55,464 INFO L82 PathProgramCache]: Analyzing trace with hash 658439846, now seen corresponding path program 1 times [2018-10-24 16:44:55,464 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:44:55,464 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:44:55,465 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:44:55,465 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:44:55,465 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:44:55,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:44:55,858 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-24 16:44:55,859 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:44:55,859 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-24 16:44:55,860 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-24 16:44:55,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-24 16:44:55,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:44:55,860 INFO L87 Difference]: Start difference. First operand 4098 states and 6039 transitions. Second operand 4 states. [2018-10-24 16:45:02,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:45:02,222 INFO L93 Difference]: Finished difference Result 15443 states and 23002 transitions. [2018-10-24 16:45:02,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-24 16:45:02,223 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 170 [2018-10-24 16:45:02,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:45:02,275 INFO L225 Difference]: With dead ends: 15443 [2018-10-24 16:45:02,275 INFO L226 Difference]: Without dead ends: 11347 [2018-10-24 16:45:02,282 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:45:02,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11347 states. [2018-10-24 16:45:02,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11347 to 11347. [2018-10-24 16:45:02,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11347 states. [2018-10-24 16:45:02,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11347 states to 11347 states and 14546 transitions. [2018-10-24 16:45:02,487 INFO L78 Accepts]: Start accepts. Automaton has 11347 states and 14546 transitions. Word has length 170 [2018-10-24 16:45:02,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:45:02,488 INFO L481 AbstractCegarLoop]: Abstraction has 11347 states and 14546 transitions. [2018-10-24 16:45:02,488 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-24 16:45:02,488 INFO L276 IsEmpty]: Start isEmpty. Operand 11347 states and 14546 transitions. [2018-10-24 16:45:02,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2018-10-24 16:45:02,493 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:45:02,493 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:45:02,493 INFO L424 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:45:02,494 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:45:02,494 INFO L82 PathProgramCache]: Analyzing trace with hash 2077510206, now seen corresponding path program 1 times [2018-10-24 16:45:02,494 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:45:02,494 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:45:02,495 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:02,495 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:45:02,496 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:02,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:45:02,823 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 135 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-24 16:45:02,823 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:45:02,823 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-24 16:45:02,824 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-24 16:45:02,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-24 16:45:02,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:45:02,825 INFO L87 Difference]: Start difference. First operand 11347 states and 14546 transitions. Second operand 4 states. [2018-10-24 16:45:10,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:45:10,586 INFO L93 Difference]: Finished difference Result 23970 states and 30803 transitions. [2018-10-24 16:45:10,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-24 16:45:10,586 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 195 [2018-10-24 16:45:10,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:45:10,637 INFO L225 Difference]: With dead ends: 23970 [2018-10-24 16:45:10,637 INFO L226 Difference]: Without dead ends: 12625 [2018-10-24 16:45:10,651 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:45:10,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12625 states. [2018-10-24 16:45:10,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12625 to 12199. [2018-10-24 16:45:10,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12199 states. [2018-10-24 16:45:10,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12199 states to 12199 states and 14547 transitions. [2018-10-24 16:45:10,848 INFO L78 Accepts]: Start accepts. Automaton has 12199 states and 14547 transitions. Word has length 195 [2018-10-24 16:45:10,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:45:10,849 INFO L481 AbstractCegarLoop]: Abstraction has 12199 states and 14547 transitions. [2018-10-24 16:45:10,849 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-24 16:45:10,849 INFO L276 IsEmpty]: Start isEmpty. Operand 12199 states and 14547 transitions. [2018-10-24 16:45:10,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2018-10-24 16:45:10,855 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:45:10,856 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:45:10,856 INFO L424 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:45:10,856 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:45:10,856 INFO L82 PathProgramCache]: Analyzing trace with hash 495823094, now seen corresponding path program 1 times [2018-10-24 16:45:10,856 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:45:10,857 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:45:10,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:10,858 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:45:10,858 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:10,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:45:11,611 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 59 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-24 16:45:11,611 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-24 16:45:11,612 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-24 16:45:11,620 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:45:11,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:45:11,727 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-24 16:45:12,016 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 59 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-24 16:45:12,045 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-24 16:45:12,045 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 3] total 6 [2018-10-24 16:45:12,046 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-24 16:45:12,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-24 16:45:12,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-10-24 16:45:12,046 INFO L87 Difference]: Start difference. First operand 12199 states and 14547 transitions. Second operand 7 states. [2018-10-24 16:45:34,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:45:34,430 INFO L93 Difference]: Finished difference Result 37707 states and 45491 transitions. [2018-10-24 16:45:34,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-24 16:45:34,433 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 254 [2018-10-24 16:45:34,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:45:34,473 INFO L225 Difference]: With dead ends: 37707 [2018-10-24 16:45:34,473 INFO L226 Difference]: Without dead ends: 21610 [2018-10-24 16:45:34,489 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 252 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-10-24 16:45:34,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21610 states. [2018-10-24 16:45:34,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21610 to 19008. [2018-10-24 16:45:34,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19008 states. [2018-10-24 16:45:34,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19008 states to 19008 states and 21287 transitions. [2018-10-24 16:45:34,800 INFO L78 Accepts]: Start accepts. Automaton has 19008 states and 21287 transitions. Word has length 254 [2018-10-24 16:45:34,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:45:34,800 INFO L481 AbstractCegarLoop]: Abstraction has 19008 states and 21287 transitions. [2018-10-24 16:45:34,800 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-24 16:45:34,801 INFO L276 IsEmpty]: Start isEmpty. Operand 19008 states and 21287 transitions. [2018-10-24 16:45:34,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 348 [2018-10-24 16:45:34,811 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:45:34,812 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:45:34,812 INFO L424 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:45:34,813 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:45:34,813 INFO L82 PathProgramCache]: Analyzing trace with hash 1001240506, now seen corresponding path program 1 times [2018-10-24 16:45:34,813 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:45:34,813 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:45:34,814 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:34,814 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:45:34,814 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:34,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:45:35,279 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 272 trivial. 0 not checked. [2018-10-24 16:45:35,279 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:45:35,279 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-24 16:45:35,280 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-24 16:45:35,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-24 16:45:35,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:45:35,281 INFO L87 Difference]: Start difference. First operand 19008 states and 21287 transitions. Second operand 4 states. [2018-10-24 16:45:42,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:45:42,742 INFO L93 Difference]: Finished difference Result 46139 states and 52619 transitions. [2018-10-24 16:45:42,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-24 16:45:42,743 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 347 [2018-10-24 16:45:42,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:45:42,789 INFO L225 Difference]: With dead ends: 46139 [2018-10-24 16:45:42,789 INFO L226 Difference]: Without dead ends: 27562 [2018-10-24 16:45:42,807 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:45:42,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27562 states. [2018-10-24 16:45:43,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27562 to 23269. [2018-10-24 16:45:43,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23269 states. [2018-10-24 16:45:43,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23269 states to 23269 states and 26308 transitions. [2018-10-24 16:45:43,082 INFO L78 Accepts]: Start accepts. Automaton has 23269 states and 26308 transitions. Word has length 347 [2018-10-24 16:45:43,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:45:43,083 INFO L481 AbstractCegarLoop]: Abstraction has 23269 states and 26308 transitions. [2018-10-24 16:45:43,083 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-24 16:45:43,083 INFO L276 IsEmpty]: Start isEmpty. Operand 23269 states and 26308 transitions. [2018-10-24 16:45:43,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 365 [2018-10-24 16:45:43,093 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:45:43,093 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:45:43,094 INFO L424 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:45:43,094 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:45:43,094 INFO L82 PathProgramCache]: Analyzing trace with hash 1918072682, now seen corresponding path program 1 times [2018-10-24 16:45:43,094 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:45:43,094 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:45:43,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:43,095 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:45:43,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:43,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:45:43,688 WARN L179 SmtUtils]: Spent 308.00 ms on a formula simplification. DAG size of input: 15 DAG size of output: 5 [2018-10-24 16:45:43,803 INFO L134 CoverageAnalysis]: Checked inductivity of 553 backedges. 333 proven. 0 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-10-24 16:45:43,804 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:45:43,804 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-24 16:45:43,805 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-24 16:45:43,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-24 16:45:43,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:45:43,805 INFO L87 Difference]: Start difference. First operand 23269 states and 26308 transitions. Second operand 4 states. [2018-10-24 16:45:50,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:45:50,703 INFO L93 Difference]: Finished difference Result 78925 states and 89304 transitions. [2018-10-24 16:45:50,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-24 16:45:50,706 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 364 [2018-10-24 16:45:50,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:45:50,766 INFO L225 Difference]: With dead ends: 78925 [2018-10-24 16:45:50,766 INFO L226 Difference]: Without dead ends: 44518 [2018-10-24 16:45:50,799 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:45:50,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44518 states. [2018-10-24 16:45:51,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44518 to 43234. [2018-10-24 16:45:51,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43234 states. [2018-10-24 16:45:51,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43234 states to 43234 states and 46809 transitions. [2018-10-24 16:45:51,700 INFO L78 Accepts]: Start accepts. Automaton has 43234 states and 46809 transitions. Word has length 364 [2018-10-24 16:45:51,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:45:51,700 INFO L481 AbstractCegarLoop]: Abstraction has 43234 states and 46809 transitions. [2018-10-24 16:45:51,700 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-24 16:45:51,701 INFO L276 IsEmpty]: Start isEmpty. Operand 43234 states and 46809 transitions. [2018-10-24 16:45:51,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 386 [2018-10-24 16:45:51,713 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:45:51,713 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:45:51,714 INFO L424 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:45:51,714 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:45:51,714 INFO L82 PathProgramCache]: Analyzing trace with hash 822837799, now seen corresponding path program 1 times [2018-10-24 16:45:51,714 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:45:51,714 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:45:51,715 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:51,715 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:45:51,715 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:51,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:45:52,033 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 272 trivial. 0 not checked. [2018-10-24 16:45:52,033 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:45:52,033 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-24 16:45:52,034 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-24 16:45:52,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-24 16:45:52,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-24 16:45:52,034 INFO L87 Difference]: Start difference. First operand 43234 states and 46809 transitions. Second operand 3 states. [2018-10-24 16:45:55,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:45:55,143 INFO L93 Difference]: Finished difference Result 90294 states and 97673 transitions. [2018-10-24 16:45:55,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-24 16:45:55,144 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 385 [2018-10-24 16:45:55,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:45:55,182 INFO L225 Difference]: With dead ends: 90294 [2018-10-24 16:45:55,182 INFO L226 Difference]: Without dead ends: 47488 [2018-10-24 16:45:55,208 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-24 16:45:55,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47488 states. [2018-10-24 16:45:55,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47488 to 41502. [2018-10-24 16:45:55,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41502 states. [2018-10-24 16:45:55,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41502 states to 41502 states and 44916 transitions. [2018-10-24 16:45:55,639 INFO L78 Accepts]: Start accepts. Automaton has 41502 states and 44916 transitions. Word has length 385 [2018-10-24 16:45:55,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:45:55,640 INFO L481 AbstractCegarLoop]: Abstraction has 41502 states and 44916 transitions. [2018-10-24 16:45:55,640 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-24 16:45:55,640 INFO L276 IsEmpty]: Start isEmpty. Operand 41502 states and 44916 transitions. [2018-10-24 16:45:55,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 417 [2018-10-24 16:45:55,656 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:45:55,657 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:45:55,657 INFO L424 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:45:55,657 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:45:55,657 INFO L82 PathProgramCache]: Analyzing trace with hash -1336113058, now seen corresponding path program 1 times [2018-10-24 16:45:55,658 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:45:55,658 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:45:55,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:55,659 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:45:55,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:45:55,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:45:56,038 INFO L134 CoverageAnalysis]: Checked inductivity of 609 backedges. 337 proven. 0 refuted. 0 times theorem prover too weak. 272 trivial. 0 not checked. [2018-10-24 16:45:56,039 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:45:56,039 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-24 16:45:56,040 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-24 16:45:56,040 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-24 16:45:56,040 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-10-24 16:45:56,040 INFO L87 Difference]: Start difference. First operand 41502 states and 44916 transitions. Second operand 5 states. [2018-10-24 16:46:03,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:46:03,272 INFO L93 Difference]: Finished difference Result 99197 states and 107510 transitions. [2018-10-24 16:46:03,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-24 16:46:03,273 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 416 [2018-10-24 16:46:03,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:46:03,335 INFO L225 Difference]: With dead ends: 99197 [2018-10-24 16:46:03,335 INFO L226 Difference]: Without dead ends: 50427 [2018-10-24 16:46:03,365 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-10-24 16:46:03,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50427 states. [2018-10-24 16:46:03,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50427 to 47009. [2018-10-24 16:46:03,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47009 states. [2018-10-24 16:46:03,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47009 states to 47009 states and 50733 transitions. [2018-10-24 16:46:03,872 INFO L78 Accepts]: Start accepts. Automaton has 47009 states and 50733 transitions. Word has length 416 [2018-10-24 16:46:03,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:46:03,875 INFO L481 AbstractCegarLoop]: Abstraction has 47009 states and 50733 transitions. [2018-10-24 16:46:03,875 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-24 16:46:03,875 INFO L276 IsEmpty]: Start isEmpty. Operand 47009 states and 50733 transitions. [2018-10-24 16:46:03,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 483 [2018-10-24 16:46:03,891 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:46:03,892 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:46:03,892 INFO L424 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:46:03,892 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:46:03,893 INFO L82 PathProgramCache]: Analyzing trace with hash -945692016, now seen corresponding path program 1 times [2018-10-24 16:46:03,893 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:46:03,893 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:46:03,894 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:46:03,894 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:46:03,894 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:46:03,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:46:05,127 INFO L134 CoverageAnalysis]: Checked inductivity of 609 backedges. 192 proven. 417 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-24 16:46:05,127 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-24 16:46:05,127 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-24 16:46:05,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:46:05,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:46:05,279 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-24 16:46:05,694 WARN L179 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 20 [2018-10-24 16:46:06,794 INFO L134 CoverageAnalysis]: Checked inductivity of 609 backedges. 393 proven. 83 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-10-24 16:46:06,815 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-24 16:46:06,815 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 3] total 7 [2018-10-24 16:46:06,816 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-24 16:46:06,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-24 16:46:06,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-10-24 16:46:06,817 INFO L87 Difference]: Start difference. First operand 47009 states and 50733 transitions. Second operand 8 states. [2018-10-24 16:46:20,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:46:20,341 INFO L93 Difference]: Finished difference Result 117049 states and 126380 transitions. [2018-10-24 16:46:20,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-24 16:46:20,342 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 482 [2018-10-24 16:46:20,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:46:20,408 INFO L225 Difference]: With dead ends: 117049 [2018-10-24 16:46:20,408 INFO L226 Difference]: Without dead ends: 67049 [2018-10-24 16:46:20,440 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 489 GetRequests, 480 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-10-24 16:46:20,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67049 states. [2018-10-24 16:46:20,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67049 to 63617. [2018-10-24 16:46:20,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63617 states. [2018-10-24 16:46:21,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63617 states to 63617 states and 67336 transitions. [2018-10-24 16:46:21,587 INFO L78 Accepts]: Start accepts. Automaton has 63617 states and 67336 transitions. Word has length 482 [2018-10-24 16:46:21,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:46:21,587 INFO L481 AbstractCegarLoop]: Abstraction has 63617 states and 67336 transitions. [2018-10-24 16:46:21,588 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-24 16:46:21,588 INFO L276 IsEmpty]: Start isEmpty. Operand 63617 states and 67336 transitions. [2018-10-24 16:46:21,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 566 [2018-10-24 16:46:21,606 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:46:21,607 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:46:21,607 INFO L424 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:46:21,608 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:46:21,608 INFO L82 PathProgramCache]: Analyzing trace with hash 1899921262, now seen corresponding path program 1 times [2018-10-24 16:46:21,608 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:46:21,608 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:46:21,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:46:21,609 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:46:21,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:46:21,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:46:22,273 INFO L134 CoverageAnalysis]: Checked inductivity of 691 backedges. 376 proven. 0 refuted. 0 times theorem prover too weak. 315 trivial. 0 not checked. [2018-10-24 16:46:22,273 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:46:22,273 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-24 16:46:22,274 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-24 16:46:22,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-24 16:46:22,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:46:22,275 INFO L87 Difference]: Start difference. First operand 63617 states and 67336 transitions. Second operand 4 states. [2018-10-24 16:46:27,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:46:27,673 INFO L93 Difference]: Finished difference Result 128090 states and 135797 transitions. [2018-10-24 16:46:27,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-24 16:46:27,673 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 565 [2018-10-24 16:46:27,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:46:27,754 INFO L225 Difference]: With dead ends: 128090 [2018-10-24 16:46:27,755 INFO L226 Difference]: Without dead ends: 73857 [2018-10-24 16:46:27,792 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-10-24 16:46:27,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73857 states. [2018-10-24 16:46:28,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73857 to 56794. [2018-10-24 16:46:28,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56794 states. [2018-10-24 16:46:28,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56794 states to 56794 states and 60126 transitions. [2018-10-24 16:46:28,350 INFO L78 Accepts]: Start accepts. Automaton has 56794 states and 60126 transitions. Word has length 565 [2018-10-24 16:46:28,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:46:28,351 INFO L481 AbstractCegarLoop]: Abstraction has 56794 states and 60126 transitions. [2018-10-24 16:46:28,351 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-24 16:46:28,351 INFO L276 IsEmpty]: Start isEmpty. Operand 56794 states and 60126 transitions. [2018-10-24 16:46:28,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 578 [2018-10-24 16:46:28,363 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:46:28,364 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:46:28,364 INFO L424 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:46:28,364 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:46:28,364 INFO L82 PathProgramCache]: Analyzing trace with hash -665478367, now seen corresponding path program 1 times [2018-10-24 16:46:28,364 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:46:28,364 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:46:28,365 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:46:28,365 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:46:28,365 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:46:28,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:46:29,163 INFO L134 CoverageAnalysis]: Checked inductivity of 956 backedges. 724 proven. 0 refuted. 0 times theorem prover too weak. 232 trivial. 0 not checked. [2018-10-24 16:46:29,164 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:46:29,164 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-24 16:46:29,165 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-24 16:46:29,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-24 16:46:29,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-10-24 16:46:29,166 INFO L87 Difference]: Start difference. First operand 56794 states and 60126 transitions. Second operand 5 states. [2018-10-24 16:46:37,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:46:37,565 INFO L93 Difference]: Finished difference Result 131525 states and 139618 transitions. [2018-10-24 16:46:37,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-24 16:46:37,565 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 577 [2018-10-24 16:46:37,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:46:37,643 INFO L225 Difference]: With dead ends: 131525 [2018-10-24 16:46:37,643 INFO L226 Difference]: Without dead ends: 81132 [2018-10-24 16:46:37,674 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-10-24 16:46:37,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81132 states. [2018-10-24 16:46:38,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81132 to 72166. [2018-10-24 16:46:38,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72166 states. [2018-10-24 16:46:38,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72166 states to 72166 states and 76203 transitions. [2018-10-24 16:46:38,325 INFO L78 Accepts]: Start accepts. Automaton has 72166 states and 76203 transitions. Word has length 577 [2018-10-24 16:46:38,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:46:38,325 INFO L481 AbstractCegarLoop]: Abstraction has 72166 states and 76203 transitions. [2018-10-24 16:46:38,325 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-24 16:46:38,325 INFO L276 IsEmpty]: Start isEmpty. Operand 72166 states and 76203 transitions. [2018-10-24 16:46:38,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 605 [2018-10-24 16:46:38,342 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:46:38,342 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:46:38,342 INFO L424 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:46:38,343 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:46:38,343 INFO L82 PathProgramCache]: Analyzing trace with hash -697558868, now seen corresponding path program 1 times [2018-10-24 16:46:38,343 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:46:38,343 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:46:38,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:46:38,344 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:46:38,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:46:38,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:46:38,954 WARN L179 SmtUtils]: Spent 129.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-10-24 16:46:40,492 INFO L134 CoverageAnalysis]: Checked inductivity of 1023 backedges. 600 proven. 83 refuted. 0 times theorem prover too weak. 340 trivial. 0 not checked. [2018-10-24 16:46:40,492 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-24 16:46:40,492 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-24 16:46:40,500 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:46:40,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:46:40,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-24 16:46:43,249 WARN L854 $PredicateComparison]: unable to prove that (or (and (exists ((v_prenex_142 Int)) (let ((.cse2 (* 9 v_prenex_142))) (let ((.cse1 (div .cse2 10))) (let ((.cse0 (+ .cse1 1))) (and (< .cse0 0) (not (= (mod .cse1 5) 0)) (< .cse1 0) (= (mod .cse2 10) 0) (not (= (mod .cse0 5) 0)) (<= (+ c_~a28~0 225073) (div .cse1 5)) (< 300 v_prenex_142)))))) (exists ((v_prenex_141 Int)) (let ((.cse3 (* 9 v_prenex_141))) (and (not (= (mod .cse3 10) 0)) (< .cse3 0) (< 0 (+ v_prenex_141 114)) (<= (+ c_~a14~0 585377) (div .cse3 10)) (<= (+ v_prenex_141 84) 0))))) (and (exists ((v_prenex_216 Int)) (let ((.cse5 (* 9 v_prenex_216))) (let ((.cse4 (div .cse5 10))) (and (< 300 v_prenex_216) (<= (+ c_~a28~0 225074) (div .cse4 5)) (= (mod .cse5 10) 0) (<= 0 (+ .cse4 1)) (= (mod .cse4 5) 0))))) (exists ((v_prenex_215 Int)) (let ((.cse6 (* 9 v_prenex_215))) (and (<= (+ c_~a14~0 585378) (div .cse6 10)) (< 0 (+ v_prenex_215 114)) (<= (+ v_prenex_215 84) 0) (= (mod .cse6 10) 0))))) (and (exists ((v_prenex_241 Int)) (let ((.cse7 (* 9 v_prenex_241))) (and (not (= (mod .cse7 10) 0)) (< .cse7 0) (< 0 (+ v_prenex_241 114)) (<= (+ c_~a14~0 585377) (div .cse7 10)) (<= (+ v_prenex_241 84) 0)))) (exists ((v_prenex_242 Int)) (let ((.cse8 (* 9 v_prenex_242))) (let ((.cse9 (div .cse8 10))) (and (<= 0 .cse8) (< 300 v_prenex_242) (<= (+ c_~a28~0 225074) (div .cse9 5)) (= (mod (+ .cse9 1) 5) 0) (= (mod .cse9 5) 0)))))) (and (exists ((v_prenex_48 Int)) (let ((.cse10 (* 9 v_prenex_48))) (and (<= (+ v_prenex_48 84) 0) (<= (+ c_~a14~0 585378) (div .cse10 10)) (< 0 (+ v_prenex_48 114)) (<= 0 .cse10)))) (exists ((v_prenex_47 Int)) (let ((.cse12 (* 9 v_prenex_47))) (let ((.cse11 (div .cse12 10))) (and (< 300 v_prenex_47) (<= 0 .cse11) (<= 0 (+ .cse11 1)) (= (mod .cse12 10) 0) (<= (+ c_~a28~0 225074) (div .cse11 5))))))) (and (exists ((v_prenex_205 Int)) (let ((.cse13 (* 9 v_prenex_205))) (and (< 0 (+ v_prenex_205 84)) (<= (+ c_~a14~0 585378) (div .cse13 10)) (<= 0 .cse13)))) (exists ((v_prenex_206 Int)) (let ((.cse14 (* 9 v_prenex_206))) (let ((.cse16 (div .cse14 10))) (let ((.cse15 (+ .cse16 1))) (and (not (= (mod .cse14 10) 0)) (< .cse14 0) (<= (+ c_~a28~0 225074) (div .cse15 5)) (<= 0 .cse16) (<= 0 .cse15) (<= v_prenex_206 37))))))) (and (exists ((v_prenex_75 Int)) (let ((.cse18 (* 9 v_prenex_75))) (let ((.cse17 (div .cse18 10))) (and (<= (+ c_~a28~0 225074) (div .cse17 5)) (< 300 v_prenex_75) (<= 0 .cse18) (= (mod .cse17 5) 0) (= (mod (+ .cse17 1) 5) 0))))) (exists ((v_prenex_76 Int)) (let ((.cse19 (* 9 v_prenex_76))) (and (<= (+ c_~a14~0 585378) (div .cse19 10)) (< 0 (+ v_prenex_76 114)) (<= (+ v_prenex_76 84) 0) (= (mod .cse19 10) 0))))) (and (exists ((v_prenex_309 Int)) (let ((.cse20 (* 9 v_prenex_309))) (and (<= (+ c_~a14~0 585378) (div .cse20 10)) (< 0 (+ v_prenex_309 84)) (= (mod .cse20 10) 0)))) (exists ((v_prenex_310 Int)) (let ((.cse23 (* 9 v_prenex_310))) (let ((.cse21 (div .cse23 10))) (let ((.cse22 (+ .cse21 1))) (and (<= 0 .cse21) (<= v_prenex_310 37) (<= (+ c_~a28~0 225074) (div .cse21 5)) (not (= (mod .cse22 5) 0)) (<= 0 .cse23) (< .cse22 0))))))) (and (exists ((v_prenex_278 Int)) (let ((.cse25 (* 9 v_prenex_278))) (let ((.cse24 (div .cse25 10))) (and (<= (+ c_~a28~0 225073) (div .cse24 5)) (<= 0 (+ .cse24 1)) (= (mod .cse25 10) 0) (< .cse24 0) (not (= (mod .cse24 5) 0)) (< 300 v_prenex_278))))) (exists ((v_prenex_277 Int)) (let ((.cse26 (* 9 v_prenex_277))) (and (not (= (mod .cse26 10) 0)) (< 0 (+ v_prenex_277 114)) (<= (+ c_~a14~0 585377) (div .cse26 10)) (< .cse26 0) (<= (+ v_prenex_277 84) 0))))) (and (exists ((v_prenex_111 Int)) (let ((.cse27 (* 9 v_prenex_111))) (and (= (mod .cse27 10) 0) (< 0 (+ v_prenex_111 114)) (<= (+ c_~a14~0 585378) (div .cse27 10)) (<= (+ v_prenex_111 84) 0)))) (exists ((v_prenex_112 Int)) (let ((.cse29 (* 9 v_prenex_112))) (let ((.cse28 (div .cse29 10))) (and (not (= (mod .cse28 5) 0)) (< .cse28 0) (< 300 v_prenex_112) (<= (+ c_~a28~0 225073) (div .cse28 5)) (<= 0 (+ .cse28 1)) (= (mod .cse29 10) 0)))))) (and (exists ((v_prenex_54 Int)) (let ((.cse30 (* 9 v_prenex_54))) (and (<= (+ c_~a14~0 585378) (div .cse30 10)) (<= 0 .cse30) (<= (+ v_prenex_54 84) 0) (< 0 (+ v_prenex_54 114))))) (exists ((v_prenex_53 Int)) (let ((.cse31 (* 9 v_prenex_53))) (let ((.cse32 (div .cse31 10))) (and (= (mod .cse31 10) 0) (= (mod (+ .cse32 1) 5) 0) (not (= (mod .cse32 5) 0)) (< 300 v_prenex_53) (< .cse32 0) (<= (+ c_~a28~0 225073) (div .cse32 5))))))) (and (exists ((v_prenex_61 Int)) (let ((.cse33 (* 9 v_prenex_61))) (let ((.cse35 (div .cse33 10))) (let ((.cse34 (+ .cse35 1))) (and (= (mod .cse33 10) 0) (< .cse34 0) (<= (+ c_~a28~0 225074) (div .cse35 5)) (<= 0 .cse35) (not (= (mod .cse34 5) 0)) (< 300 v_prenex_61)))))) (exists ((v_prenex_62 Int)) (let ((.cse36 (* 9 v_prenex_62))) (and (< 0 (+ v_prenex_62 114)) (<= (+ c_~a14~0 585377) (div .cse36 10)) (<= (+ v_prenex_62 84) 0) (< .cse36 0) (not (= (mod .cse36 10) 0)))))) (and (exists ((v_prenex_25 Int)) (let ((.cse39 (* 9 v_prenex_25))) (let ((.cse38 (div .cse39 10))) (let ((.cse37 (+ .cse38 1))) (and (<= v_prenex_25 37) (< .cse37 0) (not (= (mod .cse37 5) 0)) (not (= (mod .cse38 5) 0)) (<= (+ c_~a28~0 225073) (div .cse37 5)) (< .cse38 0) (not (= (mod .cse39 10) 0)) (< .cse39 0)))))) (exists ((v_prenex_26 Int)) (let ((.cse40 (* 9 v_prenex_26))) (and (not (= (mod .cse40 10) 0)) (<= (+ c_~a14~0 585377) (div .cse40 10)) (< 0 (+ v_prenex_26 84)) (< .cse40 0))))) (and (exists ((v_prenex_197 Int)) (let ((.cse41 (* 9 v_prenex_197))) (and (not (= (mod .cse41 10) 0)) (< .cse41 0) (< 0 (+ v_prenex_197 84)) (<= (+ c_~a14~0 585377) (div .cse41 10))))) (exists ((v_prenex_198 Int)) (let ((.cse44 (* 9 v_prenex_198))) (let ((.cse43 (div .cse44 10))) (let ((.cse42 (+ .cse43 1))) (and (< .cse42 0) (not (= (mod .cse42 5) 0)) (<= v_prenex_198 37) (<= (+ c_~a28~0 225073) (div .cse42 5)) (= (mod .cse43 5) 0) (< .cse44 0) (not (= (mod .cse44 10) 0)))))))) (and (exists ((v_prenex_271 Int)) (let ((.cse45 (* 9 v_prenex_271))) (and (< 0 (+ v_prenex_271 114)) (not (= (mod .cse45 10) 0)) (<= (+ v_prenex_271 84) 0) (< .cse45 0) (<= (+ c_~a14~0 585377) (div .cse45 10))))) (exists ((v_prenex_272 Int)) (let ((.cse47 (* 9 v_prenex_272))) (let ((.cse46 (div .cse47 10))) (let ((.cse48 (+ .cse46 1))) (and (<= (+ c_~a28~0 225074) (div .cse46 5)) (<= 0 .cse47) (< 300 v_prenex_272) (<= 0 .cse46) (not (= (mod .cse48 5) 0)) (< .cse48 0))))))) (and (exists ((v_prenex_312 Int)) (let ((.cse50 (* 9 v_prenex_312))) (let ((.cse49 (div .cse50 10))) (and (<= v_prenex_312 37) (not (= (mod .cse49 5) 0)) (<= (+ c_~a28~0 225073) (div .cse49 5)) (= (mod (+ .cse49 1) 5) 0) (< .cse49 0) (<= 0 .cse50))))) (exists ((v_prenex_311 Int)) (let ((.cse51 (* 9 v_prenex_311))) (and (< .cse51 0) (not (= (mod .cse51 10) 0)) (<= (+ c_~a14~0 585377) (div .cse51 10)) (< 0 (+ v_prenex_311 84)))))) (and (exists ((v_prenex_195 Int)) (let ((.cse52 (* 9 v_prenex_195))) (and (< 0 (+ v_prenex_195 84)) (<= (+ c_~a14~0 585378) (div .cse52 10)) (<= 0 .cse52)))) (exists ((v_prenex_196 Int)) (let ((.cse55 (* 9 v_prenex_196))) (let ((.cse54 (div .cse55 10))) (let ((.cse53 (+ .cse54 1))) (and (not (= (mod .cse53 5) 0)) (<= (+ c_~a28~0 225073) (div .cse53 5)) (= (mod .cse54 5) 0) (< .cse53 0) (not (= (mod .cse55 10) 0)) (<= v_prenex_196 37) (< .cse55 0))))))) (and (exists ((v_prenex_138 Int)) (let ((.cse57 (* 9 v_prenex_138))) (let ((.cse58 (div .cse57 10))) (let ((.cse56 (+ .cse58 1))) (and (<= (+ c_~a28~0 225074) (div .cse56 5)) (< 300 v_prenex_138) (<= 0 .cse56) (< .cse57 0) (< .cse58 0) (not (= (mod .cse57 10) 0)) (not (= (mod .cse58 5) 0))))))) (exists ((v_prenex_137 Int)) (let ((.cse59 (* 9 v_prenex_137))) (and (< 0 (+ v_prenex_137 114)) (<= (+ v_prenex_137 84) 0) (< .cse59 0) (<= (+ c_~a14~0 585377) (div .cse59 10)) (not (= (mod .cse59 10) 0)))))) (and (exists ((v_prenex_120 Int)) (let ((.cse61 (* 9 v_prenex_120))) (let ((.cse60 (div .cse61 10))) (and (= (mod (+ .cse60 1) 5) 0) (not (= (mod .cse60 5) 0)) (< .cse60 0) (<= (+ c_~a28~0 225073) (div .cse60 5)) (<= 0 .cse61) (< 300 v_prenex_120))))) (exists ((v_prenex_119 Int)) (let ((.cse62 (* 9 v_prenex_119))) (and (< 0 (+ v_prenex_119 114)) (= (mod .cse62 10) 0) (<= (+ c_~a14~0 585378) (div .cse62 10)) (<= (+ v_prenex_119 84) 0))))) (and (exists ((v_prenex_55 Int)) (let ((.cse65 (* 9 v_prenex_55))) (let ((.cse64 (div .cse65 10))) (let ((.cse63 (+ .cse64 1))) (and (< 300 v_prenex_55) (not (= (mod .cse63 5) 0)) (< .cse63 0) (<= (+ c_~a28~0 225073) (div .cse64 5)) (= (mod .cse65 10) 0) (< .cse64 0) (not (= (mod .cse64 5) 0))))))) (exists ((v_prenex_56 Int)) (let ((.cse66 (* 9 v_prenex_56))) (and (<= (+ c_~a14~0 585378) (div .cse66 10)) (<= 0 .cse66) (<= (+ v_prenex_56 84) 0) (< 0 (+ v_prenex_56 114)))))) (and (exists ((v_prenex_39 Int)) (let ((.cse68 (* 9 v_prenex_39))) (let ((.cse69 (div .cse68 10))) (let ((.cse67 (+ .cse69 1))) (and (< .cse67 0) (<= (+ c_~a28~0 225073) (div .cse67 5)) (not (= (mod .cse67 5) 0)) (not (= (mod .cse68 10) 0)) (< 300 v_prenex_39) (< .cse68 0) (= (mod .cse69 5) 0)))))) (exists ((v_prenex_40 Int)) (let ((.cse70 (* 9 v_prenex_40))) (and (< 0 (+ v_prenex_40 114)) (<= (+ c_~a14~0 585378) (div .cse70 10)) (= (mod .cse70 10) 0) (<= (+ v_prenex_40 84) 0))))) (and (exists ((v_prenex_167 Int)) (let ((.cse71 (* 9 v_prenex_167))) (and (<= (+ c_~a14~0 585378) (div .cse71 10)) (= (mod .cse71 10) 0) (< 0 (+ v_prenex_167 84))))) (exists ((v_prenex_168 Int)) (let ((.cse72 (* 9 v_prenex_168))) (let ((.cse73 (div .cse72 10))) (and (= (mod .cse72 10) 0) (<= (+ c_~a28~0 225073) (div .cse73 5)) (<= v_prenex_168 37) (not (= (mod .cse73 5) 0)) (< .cse73 0) (= (mod (+ .cse73 1) 5) 0)))))) (and (exists ((v_prenex_91 Int)) (let ((.cse74 (* 9 v_prenex_91))) (let ((.cse75 (div .cse74 10))) (and (= (mod .cse74 10) 0) (<= 0 .cse75) (<= (+ c_~a28~0 225074) (div .cse75 5)) (<= v_prenex_91 37) (= (mod (+ .cse75 1) 5) 0))))) (exists ((v_prenex_92 Int)) (let ((.cse76 (* 9 v_prenex_92))) (and (= (mod .cse76 10) 0) (< 0 (+ v_prenex_92 84)) (<= (+ c_~a14~0 585378) (div .cse76 10)))))) (and (exists ((v_prenex_58 Int)) (let ((.cse77 (* 9 v_prenex_58))) (and (<= (+ c_~a14~0 585378) (div .cse77 10)) (= (mod .cse77 10) 0) (<= (+ v_prenex_58 84) 0) (< 0 (+ v_prenex_58 114))))) (exists ((v_prenex_57 Int)) (let ((.cse78 (* 9 v_prenex_57))) (let ((.cse80 (div .cse78 10))) (let ((.cse79 (+ .cse80 1))) (and (not (= (mod .cse78 10) 0)) (< .cse78 0) (<= 0 .cse79) (< 300 v_prenex_57) (<= (+ c_~a28~0 225074) (div .cse79 5)) (<= 0 .cse80))))))) (and (exists ((v_prenex_153 Int)) (let ((.cse81 (* 9 v_prenex_153))) (and (<= 0 .cse81) (< 0 (+ v_prenex_153 84)) (<= (+ c_~a14~0 585378) (div .cse81 10))))) (exists ((v_prenex_154 Int)) (let ((.cse83 (* 9 v_prenex_154))) (let ((.cse82 (div .cse83 10))) (and (<= (+ c_~a28~0 225074) (div .cse82 5)) (<= 0 .cse82) (= (mod (+ .cse82 1) 5) 0) (= (mod .cse83 10) 0) (<= v_prenex_154 37)))))) (and (exists ((v_prenex_147 Int)) (let ((.cse84 (* 9 v_prenex_147))) (and (< 0 (+ v_prenex_147 114)) (<= 0 .cse84) (<= (+ c_~a14~0 585378) (div .cse84 10)) (<= (+ v_prenex_147 84) 0)))) (exists ((v_prenex_148 Int)) (let ((.cse85 (* 9 v_prenex_148))) (let ((.cse87 (div .cse85 10))) (let ((.cse86 (+ .cse87 1))) (and (< .cse85 0) (< 300 v_prenex_148) (<= (+ c_~a28~0 225074) (div .cse86 5)) (not (= (mod .cse85 10) 0)) (<= 0 .cse87) (<= 0 .cse86))))))) (and (exists ((v_prenex_201 Int)) (let ((.cse88 (* 9 v_prenex_201))) (and (< 0 (+ v_prenex_201 84)) (= (mod .cse88 10) 0) (<= (+ c_~a14~0 585378) (div .cse88 10))))) (exists ((v_prenex_202 Int)) (let ((.cse91 (* 9 v_prenex_202))) (let ((.cse90 (div .cse91 10))) (let ((.cse89 (+ .cse90 1))) (and (<= (+ c_~a28~0 225074) (div .cse89 5)) (= (mod .cse90 5) 0) (not (= (mod .cse91 10) 0)) (<= v_prenex_202 37) (= (mod .cse89 5) 0) (< .cse91 0))))))) (and (exists ((v_prenex_177 Int)) (let ((.cse92 (* 9 v_prenex_177))) (and (<= 0 .cse92) (<= (+ v_prenex_177 84) 0) (< 0 (+ v_prenex_177 114)) (<= (+ c_~a14~0 585378) (div .cse92 10))))) (exists ((v_prenex_178 Int)) (let ((.cse94 (* 9 v_prenex_178))) (let ((.cse93 (div .cse94 10))) (let ((.cse95 (+ .cse93 1))) (and (< 300 v_prenex_178) (< .cse93 0) (<= (+ c_~a28~0 225073) (div .cse93 5)) (not (= (mod .cse93 5) 0)) (<= 0 .cse94) (< .cse95 0) (not (= (mod .cse95 5) 0)))))))) (and (exists ((v_prenex_231 Int)) (let ((.cse96 (* 9 v_prenex_231))) (and (< .cse96 0) (not (= (mod .cse96 10) 0)) (< 0 (+ v_prenex_231 114)) (<= (+ v_prenex_231 84) 0) (<= (+ c_~a14~0 585377) (div .cse96 10))))) (exists ((v_prenex_232 Int)) (let ((.cse99 (* 9 v_prenex_232))) (let ((.cse97 (div .cse99 10))) (let ((.cse98 (+ .cse97 1))) (and (not (= (mod .cse97 5) 0)) (< .cse98 0) (not (= (mod .cse98 5) 0)) (< 300 v_prenex_232) (< .cse97 0) (<= (+ c_~a28~0 225073) (div .cse97 5)) (<= 0 .cse99))))))) (and (exists ((v_prenex_146 Int)) (let ((.cse102 (* 9 v_prenex_146))) (let ((.cse101 (div .cse102 10))) (let ((.cse100 (+ .cse101 1))) (and (<= 0 .cse100) (= (mod .cse101 5) 0) (< 300 v_prenex_146) (<= (+ c_~a28~0 225074) (div .cse100 5)) (not (= (mod .cse102 10) 0)) (< .cse102 0)))))) (exists ((v_prenex_145 Int)) (let ((.cse103 (* 9 v_prenex_145))) (and (<= 0 .cse103) (<= (+ v_prenex_145 84) 0) (< 0 (+ v_prenex_145 114)) (<= (+ c_~a14~0 585378) (div .cse103 10)))))) (and (exists ((v_prenex_269 Int)) (let ((.cse104 (* 9 v_prenex_269))) (and (<= (+ c_~a14~0 585378) (div .cse104 10)) (<= 0 .cse104) (< 0 (+ v_prenex_269 114)) (<= (+ v_prenex_269 84) 0)))) (exists ((v_prenex_270 Int)) (let ((.cse106 (* 9 v_prenex_270))) (let ((.cse105 (div .cse106 10))) (let ((.cse107 (+ .cse105 1))) (and (<= 0 .cse105) (< 300 v_prenex_270) (<= (+ c_~a28~0 225074) (div .cse105 5)) (= (mod .cse106 10) 0) (not (= (mod .cse107 5) 0)) (< .cse107 0))))))) (and (exists ((v_prenex_250 Int)) (let ((.cse108 (* 9 v_prenex_250))) (let ((.cse110 (div .cse108 10))) (let ((.cse109 (+ .cse110 1))) (and (< 300 v_prenex_250) (< .cse108 0) (< .cse109 0) (not (= (mod .cse108 10) 0)) (not (= (mod .cse109 5) 0)) (<= (+ c_~a28~0 225073) (div .cse109 5)) (= (mod .cse110 5) 0)))))) (exists ((v_prenex_249 Int)) (let ((.cse111 (* 9 v_prenex_249))) (and (<= (+ c_~a14~0 585378) (div .cse111 10)) (< 0 (+ v_prenex_249 114)) (<= (+ v_prenex_249 84) 0) (<= 0 .cse111))))) (and (exists ((v_prenex_308 Int)) (let ((.cse112 (* 9 v_prenex_308))) (let ((.cse113 (div .cse112 10))) (let ((.cse114 (+ .cse113 1))) (and (<= 0 .cse112) (<= (+ c_~a28~0 225074) (div .cse113 5)) (< .cse114 0) (= (mod .cse113 5) 0) (not (= (mod .cse114 5) 0)) (<= v_prenex_308 37)))))) (exists ((v_prenex_307 Int)) (let ((.cse115 (* 9 v_prenex_307))) (and (< 0 (+ v_prenex_307 84)) (<= (+ c_~a14~0 585378) (div .cse115 10)) (= (mod .cse115 10) 0))))) (and (exists ((v_prenex_273 Int)) (let ((.cse116 (* 9 v_prenex_273))) (and (<= 0 .cse116) (< 0 (+ v_prenex_273 114)) (<= (+ v_prenex_273 84) 0) (<= (+ c_~a14~0 585378) (div .cse116 10))))) (exists ((v_prenex_274 Int)) (let ((.cse117 (* 9 v_prenex_274))) (let ((.cse119 (div .cse117 10))) (let ((.cse118 (+ .cse119 1))) (and (not (= (mod .cse117 10) 0)) (<= 0 .cse118) (not (= (mod .cse119 5) 0)) (< .cse117 0) (< .cse119 0) (< 300 v_prenex_274) (<= (+ c_~a28~0 225074) (div .cse118 5)))))))) (and (exists ((v_prenex_67 Int)) (let ((.cse121 (* 9 v_prenex_67))) (let ((.cse120 (div .cse121 10))) (and (= (mod (+ .cse120 1) 5) 0) (= (mod .cse120 5) 0) (< 300 v_prenex_67) (<= (+ c_~a28~0 225074) (div .cse120 5)) (= (mod .cse121 10) 0))))) (exists ((v_prenex_68 Int)) (let ((.cse122 (* 9 v_prenex_68))) (and (< .cse122 0) (< 0 (+ v_prenex_68 114)) (not (= (mod .cse122 10) 0)) (<= (+ v_prenex_68 84) 0) (<= (+ c_~a14~0 585377) (div .cse122 10)))))) (and (exists ((v_~a14~0_1225 Int)) (let ((.cse123 (* 9 v_~a14~0_1225))) (and (<= (+ v_~a14~0_1225 84) 0) (<= (+ c_~a14~0 585378) (div .cse123 10)) (<= 0 .cse123) (< 0 (+ v_~a14~0_1225 114))))) (exists ((v_~a28~0_1301 Int)) (let ((.cse126 (* 9 v_~a28~0_1301))) (let ((.cse125 (div .cse126 10))) (let ((.cse124 (+ .cse125 1))) (and (<= (+ c_~a28~0 225074) (div .cse124 5)) (< 300 v_~a28~0_1301) (= (mod .cse125 5) 0) (not (= (mod .cse126 10) 0)) (= (mod .cse124 5) 0) (< .cse126 0))))))) (and (exists ((v_prenex_265 Int)) (let ((.cse127 (* 9 v_prenex_265))) (and (< 0 (+ v_prenex_265 84)) (<= 0 .cse127) (<= (+ c_~a14~0 585378) (div .cse127 10))))) (exists ((v_prenex_266 Int)) (let ((.cse129 (* 9 v_prenex_266))) (let ((.cse128 (div .cse129 10))) (and (<= (+ c_~a28~0 225074) (div .cse128 5)) (<= 0 (+ .cse128 1)) (<= 0 .cse129) (= (mod .cse128 5) 0) (<= v_prenex_266 37)))))) (and (exists ((v_prenex_160 Int)) (let ((.cse131 (* 9 v_prenex_160))) (let ((.cse130 (div .cse131 10))) (and (<= 0 (+ .cse130 1)) (<= 0 .cse130) (<= (+ c_~a28~0 225074) (div .cse130 5)) (< 300 v_prenex_160) (= (mod .cse131 10) 0))))) (exists ((v_prenex_159 Int)) (let ((.cse132 (* 9 v_prenex_159))) (and (not (= (mod .cse132 10) 0)) (<= (+ c_~a14~0 585377) (div .cse132 10)) (<= (+ v_prenex_159 84) 0) (< .cse132 0) (< 0 (+ v_prenex_159 114)))))) (and (exists ((v_prenex_226 Int)) (let ((.cse134 (* 9 v_prenex_226))) (let ((.cse133 (div .cse134 10))) (and (<= 0 .cse133) (<= 0 .cse134) (<= v_prenex_226 37) (<= 0 (+ .cse133 1)) (<= (+ c_~a28~0 225074) (div .cse133 5)))))) (exists ((v_prenex_225 Int)) (let ((.cse135 (* 9 v_prenex_225))) (and (= (mod .cse135 10) 0) (<= (+ c_~a14~0 585378) (div .cse135 10)) (< 0 (+ v_prenex_225 84)))))) (and (exists ((v_prenex_5 Int)) (let ((.cse138 (* 9 v_prenex_5))) (let ((.cse136 (div .cse138 10))) (let ((.cse137 (+ .cse136 1))) (and (<= (+ c_~a28~0 225073) (div .cse136 5)) (< .cse136 0) (< .cse137 0) (<= v_prenex_5 37) (not (= (mod .cse136 5) 0)) (not (= (mod .cse137 5) 0)) (= (mod .cse138 10) 0)))))) (exists ((v_prenex_6 Int)) (let ((.cse139 (* 9 v_prenex_6))) (and (< .cse139 0) (not (= (mod .cse139 10) 0)) (<= (+ c_~a14~0 585377) (div .cse139 10)) (< 0 (+ v_prenex_6 84)))))) (and (exists ((v_prenex_247 Int)) (let ((.cse140 (* 9 v_prenex_247))) (and (<= (+ v_prenex_247 84) 0) (<= (+ c_~a14~0 585377) (div .cse140 10)) (< 0 (+ v_prenex_247 114)) (< .cse140 0) (not (= (mod .cse140 10) 0))))) (exists ((v_prenex_248 Int)) (let ((.cse141 (* 9 v_prenex_248))) (let ((.cse143 (div .cse141 10))) (let ((.cse142 (+ .cse143 1))) (and (< .cse141 0) (= (mod .cse142 5) 0) (<= 0 .cse143) (< 300 v_prenex_248) (not (= (mod .cse141 10) 0)) (<= (+ c_~a28~0 225074) (div .cse142 5)))))))) (and (exists ((v_prenex_281 Int)) (let ((.cse144 (* 9 v_prenex_281))) (and (not (= (mod .cse144 10) 0)) (<= (+ v_prenex_281 84) 0) (<= (+ c_~a14~0 585377) (div .cse144 10)) (< .cse144 0) (< 0 (+ v_prenex_281 114))))) (exists ((v_prenex_282 Int)) (let ((.cse145 (* 9 v_prenex_282))) (let ((.cse146 (div .cse145 10))) (let ((.cse147 (+ .cse146 1))) (and (not (= (mod .cse145 10) 0)) (< 300 v_prenex_282) (< .cse145 0) (<= 0 .cse146) (<= 0 .cse147) (<= (+ c_~a28~0 225074) (div .cse147 5)))))))) (and (exists ((v_prenex_181 Int)) (let ((.cse148 (* 9 v_prenex_181))) (and (<= (+ c_~a14~0 585378) (div .cse148 10)) (= (mod .cse148 10) 0) (< 0 (+ v_prenex_181 114)) (<= (+ v_prenex_181 84) 0)))) (exists ((v_prenex_182 Int)) (let ((.cse151 (* 9 v_prenex_182))) (let ((.cse150 (div .cse151 10))) (let ((.cse149 (+ .cse150 1))) (and (< .cse149 0) (<= (+ c_~a28~0 225074) (div .cse150 5)) (<= 0 .cse150) (<= 0 .cse151) (< 300 v_prenex_182) (not (= (mod .cse149 5) 0)))))))) (and (exists ((v_prenex_157 Int)) (let ((.cse152 (* 9 v_prenex_157))) (and (= (mod .cse152 10) 0) (<= (+ c_~a14~0 585378) (div .cse152 10)) (< 0 (+ v_prenex_157 114)) (<= (+ v_prenex_157 84) 0)))) (exists ((v_prenex_158 Int)) (let ((.cse153 (* 9 v_prenex_158))) (let ((.cse154 (div .cse153 10))) (let ((.cse155 (+ .cse154 1))) (and (< .cse153 0) (not (= (mod .cse153 10) 0)) (< 300 v_prenex_158) (= (mod .cse154 5) 0) (<= 0 .cse155) (<= (+ c_~a28~0 225074) (div .cse155 5)))))))) (and (exists ((v_prenex_223 Int)) (let ((.cse156 (* 9 v_prenex_223))) (and (<= 0 .cse156) (< 0 (+ v_prenex_223 84)) (<= (+ c_~a14~0 585378) (div .cse156 10))))) (exists ((v_prenex_224 Int)) (let ((.cse158 (* 9 v_prenex_224))) (let ((.cse157 (div .cse158 10))) (and (<= (+ c_~a28~0 225074) (div .cse157 5)) (<= v_prenex_224 37) (<= 0 .cse158) (<= 0 (+ .cse157 1)) (<= 0 .cse157)))))) (and (exists ((v_prenex_179 Int)) (let ((.cse159 (* 9 v_prenex_179))) (and (< 0 (+ v_prenex_179 84)) (not (= (mod .cse159 10) 0)) (<= (+ c_~a14~0 585377) (div .cse159 10)) (< .cse159 0)))) (exists ((v_prenex_180 Int)) (let ((.cse161 (* 9 v_prenex_180))) (let ((.cse160 (div .cse161 10))) (and (<= (+ c_~a28~0 225074) (div .cse160 5)) (= (mod .cse160 5) 0) (<= v_prenex_180 37) (<= 0 .cse161) (= (mod (+ .cse160 1) 5) 0)))))) (and (exists ((v_prenex_42 Int)) (let ((.cse162 (* 9 v_prenex_42))) (and (not (= (mod .cse162 10) 0)) (< .cse162 0) (<= (+ c_~a14~0 585377) (div .cse162 10)) (< 0 (+ v_prenex_42 84))))) (exists ((v_prenex_41 Int)) (let ((.cse164 (* 9 v_prenex_41))) (let ((.cse165 (div .cse164 10))) (let ((.cse163 (+ .cse165 1))) (and (not (= (mod .cse163 5) 0)) (< .cse163 0) (<= 0 .cse164) (<= (+ c_~a28~0 225074) (div .cse165 5)) (= (mod .cse165 5) 0) (<= v_prenex_41 37))))))) (and (exists ((v_prenex_276 Int)) (let ((.cse168 (* 9 v_prenex_276))) (let ((.cse166 (div .cse168 10))) (let ((.cse167 (+ .cse166 1))) (and (< .cse166 0) (not (= (mod .cse167 5) 0)) (< .cse167 0) (<= (+ c_~a28~0 225073) (div .cse167 5)) (not (= (mod .cse168 10) 0)) (not (= (mod .cse166 5) 0)) (< .cse168 0) (< 300 v_prenex_276)))))) (exists ((v_prenex_275 Int)) (let ((.cse169 (* 9 v_prenex_275))) (and (< 0 (+ v_prenex_275 114)) (< .cse169 0) (not (= (mod .cse169 10) 0)) (<= (+ v_prenex_275 84) 0) (<= (+ c_~a14~0 585377) (div .cse169 10)))))) (and (exists ((v_prenex_304 Int)) (let ((.cse170 (* 9 v_prenex_304))) (let ((.cse172 (div .cse170 10))) (let ((.cse171 (+ .cse172 1))) (and (not (= (mod .cse170 10) 0)) (< .cse170 0) (<= (+ c_~a28~0 225073) (div .cse171 5)) (< 300 v_prenex_304) (not (= (mod .cse171 5) 0)) (< .cse171 0) (<= 0 .cse172)))))) (exists ((v_prenex_303 Int)) (let ((.cse173 (* 9 v_prenex_303))) (and (<= (+ v_prenex_303 84) 0) (<= (+ c_~a14~0 585378) (div .cse173 10)) (< 0 (+ v_prenex_303 114)) (= (mod .cse173 10) 0))))) (and (exists ((v_prenex_110 Int)) (let ((.cse174 (* 9 v_prenex_110))) (let ((.cse175 (div .cse174 10))) (and (<= 0 .cse174) (<= (+ c_~a28~0 225074) (div .cse175 5)) (< 300 v_prenex_110) (<= 0 .cse175) (<= 0 (+ .cse175 1)))))) (exists ((v_prenex_109 Int)) (let ((.cse176 (* 9 v_prenex_109))) (and (< 0 (+ v_prenex_109 114)) (= (mod .cse176 10) 0) (<= (+ c_~a14~0 585378) (div .cse176 10)) (<= (+ v_prenex_109 84) 0))))) (and (exists ((v_prenex_89 Int)) (let ((.cse178 (* 9 v_prenex_89))) (let ((.cse177 (div .cse178 10))) (and (= (mod (+ .cse177 1) 5) 0) (= (mod .cse177 5) 0) (= (mod .cse178 10) 0) (<= (+ c_~a28~0 225074) (div .cse177 5)) (< 300 v_prenex_89))))) (exists ((v_prenex_90 Int)) (let ((.cse179 (* 9 v_prenex_90))) (and (= (mod .cse179 10) 0) (<= (+ c_~a14~0 585378) (div .cse179 10)) (<= (+ v_prenex_90 84) 0) (< 0 (+ v_prenex_90 114)))))) (and (exists ((v_prenex_20 Int)) (let ((.cse180 (* 9 v_prenex_20))) (and (<= (+ c_~a14~0 585378) (div .cse180 10)) (<= (+ v_prenex_20 84) 0) (< 0 (+ v_prenex_20 114)) (= (mod .cse180 10) 0)))) (exists ((v_prenex_19 Int)) (let ((.cse183 (* 9 v_prenex_19))) (let ((.cse182 (div .cse183 10))) (let ((.cse181 (+ .cse182 1))) (and (<= (+ c_~a28~0 225074) (div .cse181 5)) (< 300 v_prenex_19) (= (mod .cse181 5) 0) (= (mod .cse182 5) 0) (< .cse183 0) (not (= (mod .cse183 10) 0)))))))) (and (exists ((v_prenex_28 Int)) (let ((.cse184 (* 9 v_prenex_28))) (and (< .cse184 0) (<= (+ c_~a14~0 585377) (div .cse184 10)) (not (= (mod .cse184 10) 0)) (< 0 (+ v_prenex_28 84))))) (exists ((v_prenex_27 Int)) (let ((.cse185 (* 9 v_prenex_27))) (let ((.cse186 (div .cse185 10))) (and (<= v_prenex_27 37) (= (mod .cse185 10) 0) (<= (+ c_~a28~0 225074) (div .cse186 5)) (= (mod (+ .cse186 1) 5) 0) (= (mod .cse186 5) 0)))))) (and (exists ((v_prenex_221 Int)) (let ((.cse187 (* 9 v_prenex_221))) (and (< .cse187 0) (not (= (mod .cse187 10) 0)) (<= (+ c_~a14~0 585377) (div .cse187 10)) (< 0 (+ v_prenex_221 84))))) (exists ((v_prenex_222 Int)) (let ((.cse190 (* 9 v_prenex_222))) (let ((.cse189 (div .cse190 10))) (let ((.cse188 (+ .cse189 1))) (and (<= v_prenex_222 37) (= (mod .cse188 5) 0) (<= (+ c_~a28~0 225074) (div .cse188 5)) (= (mod .cse189 5) 0) (< .cse190 0) (not (= (mod .cse190 10) 0)))))))) (and (exists ((v_prenex_187 Int)) (let ((.cse191 (* 9 v_prenex_187))) (and (< 0 (+ v_prenex_187 84)) (<= 0 .cse191) (<= (+ c_~a14~0 585378) (div .cse191 10))))) (exists ((v_prenex_188 Int)) (let ((.cse194 (* 9 v_prenex_188))) (let ((.cse192 (div .cse194 10))) (let ((.cse193 (+ .cse192 1))) (and (not (= (mod .cse192 5) 0)) (= (mod .cse193 5) 0) (< .cse192 0) (not (= (mod .cse194 10) 0)) (<= (+ c_~a28~0 225074) (div .cse193 5)) (< .cse194 0) (<= v_prenex_188 37))))))) (and (exists ((v_prenex_219 Int)) (let ((.cse195 (* 9 v_prenex_219))) (and (< 0 (+ v_prenex_219 114)) (<= (+ c_~a14~0 585378) (div .cse195 10)) (<= 0 .cse195) (<= (+ v_prenex_219 84) 0)))) (exists ((v_prenex_220 Int)) (let ((.cse197 (* 9 v_prenex_220))) (let ((.cse196 (div .cse197 10))) (and (< 300 v_prenex_220) (<= (+ c_~a28~0 225074) (div .cse196 5)) (= (mod (+ .cse196 1) 5) 0) (<= 0 .cse197) (<= 0 .cse196)))))) (and (exists ((v_prenex_93 Int)) (let ((.cse200 (* 9 v_prenex_93))) (let ((.cse199 (div .cse200 10))) (let ((.cse198 (+ .cse199 1))) (and (< .cse198 0) (<= v_prenex_93 37) (<= (+ c_~a28~0 225074) (div .cse199 5)) (not (= (mod .cse198 5) 0)) (<= 0 .cse200) (= (mod .cse199 5) 0)))))) (exists ((v_prenex_94 Int)) (let ((.cse201 (* 9 v_prenex_94))) (and (<= 0 .cse201) (< 0 (+ v_prenex_94 84)) (<= (+ c_~a14~0 585378) (div .cse201 10)))))) (and (exists ((v_prenex_283 Int)) (let ((.cse202 (* 9 v_prenex_283))) (and (< 0 (+ v_prenex_283 84)) (<= (+ c_~a14~0 585377) (div .cse202 10)) (not (= (mod .cse202 10) 0)) (< .cse202 0)))) (exists ((v_prenex_284 Int)) (let ((.cse204 (* 9 v_prenex_284))) (let ((.cse203 (div .cse204 10))) (let ((.cse205 (+ .cse203 1))) (and (<= v_prenex_284 37) (<= (+ c_~a28~0 225074) (div .cse203 5)) (= (mod .cse203 5) 0) (= (mod .cse204 10) 0) (not (= (mod .cse205 5) 0)) (< .cse205 0))))))) (and (exists ((v_prenex_37 Int)) (let ((.cse207 (* 9 v_prenex_37))) (let ((.cse206 (div .cse207 10))) (and (<= v_prenex_37 37) (= (mod .cse206 5) 0) (<= 0 .cse207) (<= (+ c_~a28~0 225074) (div .cse206 5)) (= (mod (+ .cse206 1) 5) 0))))) (exists ((v_prenex_38 Int)) (let ((.cse208 (* 9 v_prenex_38))) (and (< 0 (+ v_prenex_38 84)) (<= 0 .cse208) (<= (+ c_~a14~0 585378) (div .cse208 10)))))) (and (exists ((v_prenex_9 Int)) (let ((.cse210 (* 9 v_prenex_9))) (let ((.cse211 (div .cse210 10))) (let ((.cse209 (+ .cse211 1))) (and (<= (+ c_~a28~0 225074) (div .cse209 5)) (< .cse210 0) (not (= (mod .cse210 10) 0)) (not (= (mod .cse211 5) 0)) (< .cse211 0) (<= v_prenex_9 37) (<= 0 .cse209)))))) (exists ((v_prenex_10 Int)) (let ((.cse212 (* 9 v_prenex_10))) (and (< .cse212 0) (not (= (mod .cse212 10) 0)) (<= (+ c_~a14~0 585377) (div .cse212 10)) (< 0 (+ v_prenex_10 84)))))) (and (exists ((v_prenex_124 Int)) (let ((.cse215 (* 9 v_prenex_124))) (let ((.cse214 (div .cse215 10))) (let ((.cse213 (+ .cse214 1))) (and (< 300 v_prenex_124) (< .cse213 0) (not (= (mod .cse213 5) 0)) (<= 0 .cse214) (<= (+ c_~a28~0 225073) (div .cse213 5)) (not (= (mod .cse215 10) 0)) (< .cse215 0)))))) (exists ((v_prenex_123 Int)) (let ((.cse216 (* 9 v_prenex_123))) (and (< .cse216 0) (<= (+ v_prenex_123 84) 0) (< 0 (+ v_prenex_123 114)) (<= (+ c_~a14~0 585377) (div .cse216 10)) (not (= (mod .cse216 10) 0)))))) (and (exists ((v_prenex_322 Int)) (let ((.cse219 (* 9 v_prenex_322))) (let ((.cse217 (div .cse219 10))) (let ((.cse218 (+ .cse217 1))) (and (<= (+ c_~a28~0 225073) (div .cse217 5)) (<= v_prenex_322 37) (< .cse217 0) (not (= (mod .cse218 5) 0)) (not (= (mod .cse217 5) 0)) (<= 0 .cse219) (< .cse218 0)))))) (exists ((v_prenex_321 Int)) (let ((.cse220 (* 9 v_prenex_321))) (and (<= (+ c_~a14~0 585378) (div .cse220 10)) (= (mod .cse220 10) 0) (< 0 (+ v_prenex_321 84)))))) (and (exists ((v_prenex_32 Int)) (let ((.cse221 (* 9 v_prenex_32))) (and (< 0 (+ v_prenex_32 84)) (<= (+ c_~a14~0 585378) (div .cse221 10)) (= (mod .cse221 10) 0)))) (exists ((v_prenex_31 Int)) (let ((.cse223 (* 9 v_prenex_31))) (let ((.cse222 (div .cse223 10))) (and (<= 0 (+ .cse222 1)) (= (mod .cse223 10) 0) (<= 0 .cse222) (<= v_prenex_31 37) (<= (+ c_~a28~0 225074) (div .cse222 5))))))) (and (exists ((v_prenex_204 Int)) (let ((.cse225 (* 9 v_prenex_204))) (let ((.cse224 (div .cse225 10))) (and (< 300 v_prenex_204) (= (mod (+ .cse224 1) 5) 0) (<= (+ c_~a28~0 225073) (div .cse224 5)) (not (= (mod .cse224 5) 0)) (< .cse224 0) (= (mod .cse225 10) 0))))) (exists ((v_prenex_203 Int)) (let ((.cse226 (* 9 v_prenex_203))) (and (<= (+ c_~a14~0 585377) (div .cse226 10)) (< 0 (+ v_prenex_203 114)) (not (= (mod .cse226 10) 0)) (< .cse226 0) (<= (+ v_prenex_203 84) 0))))) (and (exists ((v_prenex_156 Int)) (let ((.cse228 (* 9 v_prenex_156))) (let ((.cse227 (div .cse228 10))) (and (< 300 v_prenex_156) (<= (+ c_~a28~0 225074) (div .cse227 5)) (<= 0 .cse228) (= (mod (+ .cse227 1) 5) 0) (= (mod .cse227 5) 0))))) (exists ((v_prenex_155 Int)) (let ((.cse229 (* 9 v_prenex_155))) (and (<= (+ c_~a14~0 585378) (div .cse229 10)) (< 0 (+ v_prenex_155 114)) (<= 0 .cse229) (<= (+ v_prenex_155 84) 0))))) (and (exists ((v_prenex_73 Int)) (let ((.cse232 (* 9 v_prenex_73))) (let ((.cse230 (div .cse232 10))) (let ((.cse231 (+ .cse230 1))) (and (<= 0 .cse230) (<= (+ c_~a28~0 225074) (div .cse230 5)) (not (= (mod .cse231 5) 0)) (< .cse231 0) (<= v_prenex_73 37) (= (mod .cse232 10) 0)))))) (exists ((v_prenex_74 Int)) (let ((.cse233 (* 9 v_prenex_74))) (and (< 0 (+ v_prenex_74 84)) (<= 0 .cse233) (<= (+ c_~a14~0 585378) (div .cse233 10)))))) (and (exists ((v_prenex_80 Int)) (let ((.cse234 (* 9 v_prenex_80))) (and (<= (+ c_~a14~0 585377) (div .cse234 10)) (not (= (mod .cse234 10) 0)) (< 0 (+ v_prenex_80 84)) (< .cse234 0)))) (exists ((v_prenex_79 Int)) (let ((.cse237 (* 9 v_prenex_79))) (let ((.cse236 (div .cse237 10))) (let ((.cse235 (+ .cse236 1))) (and (not (= (mod .cse235 5) 0)) (< .cse235 0) (<= (+ c_~a28~0 225073) (div .cse236 5)) (< .cse236 0) (not (= (mod .cse236 5) 0)) (<= 0 .cse237) (<= v_prenex_79 37))))))) (and (exists ((v_prenex_288 Int)) (let ((.cse239 (* 9 v_prenex_288))) (let ((.cse238 (div .cse239 10))) (and (= (mod .cse238 5) 0) (<= (+ c_~a28~0 225074) (div .cse238 5)) (= (mod .cse239 10) 0) (<= v_prenex_288 37) (= (mod (+ .cse238 1) 5) 0))))) (exists ((v_prenex_287 Int)) (let ((.cse240 (* 9 v_prenex_287))) (and (= (mod .cse240 10) 0) (< 0 (+ v_prenex_287 84)) (<= (+ c_~a14~0 585378) (div .cse240 10)))))) (and (exists ((v_prenex_87 Int)) (let ((.cse241 (* 9 v_prenex_87))) (let ((.cse242 (div .cse241 10))) (let ((.cse243 (+ .cse242 1))) (and (< .cse241 0) (< .cse242 0) (not (= (mod .cse243 5) 0)) (not (= (mod .cse242 5) 0)) (<= (+ c_~a28~0 225073) (div .cse243 5)) (<= v_prenex_87 37) (< .cse243 0) (not (= (mod .cse241 10) 0))))))) (exists ((v_prenex_88 Int)) (let ((.cse244 (* 9 v_prenex_88))) (and (= (mod .cse244 10) 0) (<= (+ c_~a14~0 585378) (div .cse244 10)) (< 0 (+ v_prenex_88 84)))))) (and (exists ((v_prenex_29 Int)) (let ((.cse246 (* 9 v_prenex_29))) (let ((.cse245 (div .cse246 10))) (and (< .cse245 0) (<= 0 .cse246) (<= (+ c_~a28~0 225073) (div .cse245 5)) (<= v_prenex_29 37) (not (= (mod .cse245 5) 0)) (<= 0 (+ .cse245 1)))))) (exists ((v_prenex_30 Int)) (let ((.cse247 (* 9 v_prenex_30))) (and (<= 0 .cse247) (< 0 (+ v_prenex_30 84)) (<= (+ c_~a14~0 585378) (div .cse247 10)))))) (and (exists ((v_prenex_34 Int)) (let ((.cse248 (* 9 v_prenex_34))) (and (= (mod .cse248 10) 0) (< 0 (+ v_prenex_34 84)) (<= (+ c_~a14~0 585378) (div .cse248 10))))) (exists ((v_prenex_33 Int)) (let ((.cse249 (* 9 v_prenex_33))) (let ((.cse251 (div .cse249 10))) (let ((.cse250 (+ .cse251 1))) (and (not (= (mod .cse249 10) 0)) (<= (+ c_~a28~0 225074) (div .cse250 5)) (= (mod .cse250 5) 0) (< .cse249 0) (<= v_prenex_33 37) (<= 0 .cse251))))))) (and (exists ((v_prenex_116 Int)) (let ((.cse254 (* 9 v_prenex_116))) (let ((.cse253 (div .cse254 10))) (let ((.cse252 (+ .cse253 1))) (and (<= v_prenex_116 37) (<= 0 .cse252) (<= (+ c_~a28~0 225074) (div .cse252 5)) (<= 0 .cse253) (< .cse254 0) (not (= (mod .cse254 10) 0))))))) (exists ((v_prenex_115 Int)) (let ((.cse255 (* 9 v_prenex_115))) (and (not (= (mod .cse255 10) 0)) (< 0 (+ v_prenex_115 84)) (< .cse255 0) (<= (+ c_~a14~0 585377) (div .cse255 10)))))) (and (exists ((v_prenex_257 Int)) (let ((.cse256 (* 9 v_prenex_257))) (and (<= 0 .cse256) (< 0 (+ v_prenex_257 84)) (<= (+ c_~a14~0 585378) (div .cse256 10))))) (exists ((v_prenex_258 Int)) (let ((.cse258 (* 9 v_prenex_258))) (let ((.cse257 (div .cse258 10))) (and (< .cse257 0) (<= (+ c_~a28~0 225073) (div .cse257 5)) (<= v_prenex_258 37) (<= 0 (+ .cse257 1)) (not (= (mod .cse257 5) 0)) (= (mod .cse258 10) 0)))))) (and (exists ((v_prenex_174 Int)) (let ((.cse259 (* 9 v_prenex_174))) (let ((.cse260 (div .cse259 10))) (let ((.cse261 (+ .cse260 1))) (and (<= 0 .cse259) (< 300 v_prenex_174) (<= (+ c_~a28~0 225074) (div .cse260 5)) (< .cse261 0) (<= 0 .cse260) (not (= (mod .cse261 5) 0))))))) (exists ((v_prenex_173 Int)) (let ((.cse262 (* 9 v_prenex_173))) (and (<= (+ c_~a14~0 585378) (div .cse262 10)) (<= 0 .cse262) (< 0 (+ v_prenex_173 114)) (<= (+ v_prenex_173 84) 0))))) (and (exists ((v_prenex_165 Int)) (let ((.cse263 (* 9 v_prenex_165))) (and (<= 0 .cse263) (< 0 (+ v_prenex_165 84)) (<= (+ c_~a14~0 585378) (div .cse263 10))))) (exists ((v_prenex_166 Int)) (let ((.cse265 (* 9 v_prenex_166))) (let ((.cse266 (div .cse265 10))) (let ((.cse264 (+ .cse266 1))) (and (<= 0 .cse264) (<= (+ c_~a28~0 225074) (div .cse264 5)) (< .cse265 0) (not (= (mod .cse266 5) 0)) (not (= (mod .cse265 10) 0)) (< .cse266 0) (<= v_prenex_166 37))))))) (and (exists ((v_prenex_183 Int)) (let ((.cse267 (* 9 v_prenex_183))) (and (<= (+ c_~a14~0 585378) (div .cse267 10)) (<= 0 .cse267) (< 0 (+ v_prenex_183 114)) (<= (+ v_prenex_183 84) 0)))) (exists ((v_prenex_184 Int)) (let ((.cse270 (* 9 v_prenex_184))) (let ((.cse268 (div .cse270 10))) (let ((.cse269 (+ .cse268 1))) (and (<= (+ c_~a28~0 225074) (div .cse268 5)) (= (mod .cse268 5) 0) (not (= (mod .cse269 5) 0)) (< 300 v_prenex_184) (< .cse269 0) (= (mod .cse270 10) 0))))))) (and (exists ((v_prenex_66 Int)) (let ((.cse271 (* 9 v_prenex_66))) (and (<= (+ c_~a14~0 585378) (div .cse271 10)) (< 0 (+ v_prenex_66 84)) (= (mod .cse271 10) 0)))) (exists ((v_prenex_65 Int)) (let ((.cse273 (* 9 v_prenex_65))) (let ((.cse274 (div .cse273 10))) (let ((.cse272 (+ .cse274 1))) (and (<= (+ c_~a28~0 225074) (div .cse272 5)) (<= 0 .cse272) (<= v_prenex_65 37) (< .cse273 0) (not (= (mod .cse274 5) 0)) (< .cse274 0) (not (= (mod .cse273 10) 0)))))))) (and (exists ((v_prenex_3 Int)) (let ((.cse275 (* 9 v_prenex_3))) (let ((.cse276 (div .cse275 10))) (and (= (mod .cse275 10) 0) (= (mod .cse276 5) 0) (<= (+ c_~a28~0 225074) (div .cse276 5)) (<= 0 (+ .cse276 1)) (< 300 v_prenex_3))))) (exists ((v_prenex_4 Int)) (let ((.cse277 (* 9 v_prenex_4))) (and (<= (+ v_prenex_4 84) 0) (<= 0 .cse277) (<= (+ c_~a14~0 585378) (div .cse277 10)) (< 0 (+ v_prenex_4 114)))))) (and (exists ((v_prenex_261 Int)) (let ((.cse278 (* 9 v_prenex_261))) (and (<= (+ v_prenex_261 84) 0) (<= (+ c_~a14~0 585377) (div .cse278 10)) (not (= (mod .cse278 10) 0)) (< .cse278 0) (< 0 (+ v_prenex_261 114))))) (exists ((v_prenex_262 Int)) (let ((.cse280 (* 9 v_prenex_262))) (let ((.cse279 (div .cse280 10))) (and (< 300 v_prenex_262) (<= 0 .cse279) (= (mod .cse280 10) 0) (= (mod (+ .cse279 1) 5) 0) (<= (+ c_~a28~0 225074) (div .cse279 5))))))) (and (exists ((v_prenex_46 Int)) (let ((.cse281 (* 9 v_prenex_46))) (and (< 0 (+ v_prenex_46 114)) (<= (+ c_~a14~0 585377) (div .cse281 10)) (not (= (mod .cse281 10) 0)) (<= (+ v_prenex_46 84) 0) (< .cse281 0)))) (exists ((v_prenex_45 Int)) (let ((.cse283 (* 9 v_prenex_45))) (let ((.cse282 (div .cse283 10))) (and (<= (+ c_~a28~0 225073) (div .cse282 5)) (<= 0 .cse283) (< 300 v_prenex_45) (not (= (mod .cse282 5) 0)) (<= 0 (+ .cse282 1)) (< .cse282 0)))))) (and (exists ((v_prenex_286 Int)) (let ((.cse284 (* 9 v_prenex_286))) (let ((.cse286 (div .cse284 10))) (let ((.cse285 (+ .cse286 1))) (and (< .cse284 0) (<= (+ c_~a28~0 225073) (div .cse285 5)) (not (= (mod .cse284 10) 0)) (<= 0 .cse286) (<= v_prenex_286 37) (< .cse285 0) (not (= (mod .cse285 5) 0))))))) (exists ((v_prenex_285 Int)) (let ((.cse287 (* 9 v_prenex_285))) (and (<= 0 .cse287) (< 0 (+ v_prenex_285 84)) (<= (+ c_~a14~0 585378) (div .cse287 10)))))) (and (exists ((v_prenex_279 Int)) (let ((.cse288 (* 9 v_prenex_279))) (and (< 0 (+ v_prenex_279 84)) (< .cse288 0) (<= (+ c_~a14~0 585377) (div .cse288 10)) (not (= (mod .cse288 10) 0))))) (exists ((v_prenex_280 Int)) (let ((.cse291 (* 9 v_prenex_280))) (let ((.cse290 (div .cse291 10))) (let ((.cse289 (+ .cse290 1))) (and (not (= (mod .cse289 5) 0)) (<= 0 .cse290) (< .cse289 0) (<= v_prenex_280 37) (= (mod .cse291 10) 0) (<= (+ c_~a28~0 225074) (div .cse290 5)))))))) (and (exists ((v_prenex_104 Int)) (let ((.cse293 (* 9 v_prenex_104))) (let ((.cse294 (div .cse293 10))) (let ((.cse292 (+ .cse294 1))) (and (not (= (mod .cse292 5) 0)) (< .cse292 0) (< .cse293 0) (= (mod .cse294 5) 0) (<= v_prenex_104 37) (not (= (mod .cse293 10) 0)) (<= (+ c_~a28~0 225073) (div .cse292 5))))))) (exists ((v_prenex_103 Int)) (let ((.cse295 (* 9 v_prenex_103))) (and (= (mod .cse295 10) 0) (<= (+ c_~a14~0 585378) (div .cse295 10)) (< 0 (+ v_prenex_103 84)))))) (and (exists ((v_prenex_189 Int)) (let ((.cse296 (* 9 v_prenex_189))) (and (<= 0 .cse296) (< 0 (+ v_prenex_189 84)) (<= (+ c_~a14~0 585378) (div .cse296 10))))) (exists ((v_prenex_190 Int)) (let ((.cse297 (* 9 v_prenex_190))) (let ((.cse298 (div .cse297 10))) (and (<= 0 .cse297) (not (= (mod .cse298 5) 0)) (<= (+ c_~a28~0 225073) (div .cse298 5)) (< .cse298 0) (= (mod (+ .cse298 1) 5) 0) (<= v_prenex_190 37)))))) (and (exists ((v_prenex_23 Int)) (let ((.cse300 (* 9 v_prenex_23))) (let ((.cse299 (div .cse300 10))) (and (= (mod .cse299 5) 0) (= (mod .cse300 10) 0) (<= v_prenex_23 37) (<= 0 (+ .cse299 1)) (<= (+ c_~a28~0 225074) (div .cse299 5)))))) (exists ((v_prenex_24 Int)) (let ((.cse301 (* 9 v_prenex_24))) (and (<= (+ c_~a14~0 585377) (div .cse301 10)) (not (= (mod .cse301 10) 0)) (< 0 (+ v_prenex_24 84)) (< .cse301 0))))) (and (exists ((v_prenex_35 Int)) (let ((.cse303 (* 9 v_prenex_35))) (let ((.cse302 (div .cse303 10))) (and (<= (+ c_~a28~0 225074) (div .cse302 5)) (= (mod .cse303 10) 0) (= (mod .cse302 5) 0) (<= 0 (+ .cse302 1)) (<= v_prenex_35 37))))) (exists ((v_prenex_36 Int)) (let ((.cse304 (* 9 v_prenex_36))) (and (<= (+ c_~a14~0 585378) (div .cse304 10)) (< 0 (+ v_prenex_36 84)) (<= 0 .cse304))))) (and (exists ((v_prenex_170 Int)) (let ((.cse306 (* 9 v_prenex_170))) (let ((.cse305 (div .cse306 10))) (and (< 300 v_prenex_170) (<= 0 .cse305) (<= (+ c_~a28~0 225074) (div .cse305 5)) (= (mod .cse306 10) 0) (<= 0 (+ .cse305 1)))))) (exists ((v_prenex_169 Int)) (let ((.cse307 (* 9 v_prenex_169))) (and (<= (+ v_prenex_169 84) 0) (= (mod .cse307 10) 0) (< 0 (+ v_prenex_169 114)) (<= (+ c_~a14~0 585378) (div .cse307 10)))))) (and (exists ((v_prenex_315 Int)) (let ((.cse308 (* 9 v_prenex_315))) (and (<= 0 .cse308) (<= (+ c_~a14~0 585378) (div .cse308 10)) (< 0 (+ v_prenex_315 114)) (<= (+ v_prenex_315 84) 0)))) (exists ((v_prenex_316 Int)) (let ((.cse310 (* 9 v_prenex_316))) (let ((.cse311 (div .cse310 10))) (let ((.cse309 (+ .cse311 1))) (and (not (= (mod .cse309 5) 0)) (< 300 v_prenex_316) (< .cse309 0) (< .cse310 0) (not (= (mod .cse310 10) 0)) (not (= (mod .cse311 5) 0)) (< .cse311 0) (<= (+ c_~a28~0 225073) (div .cse309 5)))))))) (and (exists ((v_prenex_117 Int)) (let ((.cse312 (* 9 v_prenex_117))) (and (< 0 (+ v_prenex_117 84)) (= (mod .cse312 10) 0) (<= (+ c_~a14~0 585378) (div .cse312 10))))) (exists ((v_prenex_118 Int)) (let ((.cse313 (* 9 v_prenex_118))) (let ((.cse314 (div .cse313 10))) (and (<= 0 .cse313) (<= v_prenex_118 37) (not (= (mod .cse314 5) 0)) (= (mod (+ .cse314 1) 5) 0) (< .cse314 0) (<= (+ c_~a28~0 225073) (div .cse314 5))))))) (and (exists ((v_prenex_318 Int)) (let ((.cse317 (* 9 v_prenex_318))) (let ((.cse316 (div .cse317 10))) (let ((.cse315 (+ .cse316 1))) (and (<= v_prenex_318 37) (< .cse315 0) (<= 0 .cse316) (<= (+ c_~a28~0 225074) (div .cse316 5)) (not (= (mod .cse315 5) 0)) (= (mod .cse317 10) 0)))))) (exists ((v_prenex_317 Int)) (let ((.cse318 (* 9 v_prenex_317))) (and (< 0 (+ v_prenex_317 84)) (= (mod .cse318 10) 0) (<= (+ c_~a14~0 585378) (div .cse318 10)))))) (and (exists ((v_prenex_192 Int)) (let ((.cse321 (* 9 v_prenex_192))) (let ((.cse320 (div .cse321 10))) (let ((.cse319 (+ .cse320 1))) (and (not (= (mod .cse319 5) 0)) (= (mod .cse320 5) 0) (<= (+ c_~a28~0 225074) (div .cse320 5)) (< 300 v_prenex_192) (< .cse319 0) (= (mod .cse321 10) 0)))))) (exists ((v_prenex_191 Int)) (let ((.cse322 (* 9 v_prenex_191))) (and (<= (+ v_prenex_191 84) 0) (<= (+ c_~a14~0 585377) (div .cse322 10)) (< 0 (+ v_prenex_191 114)) (not (= (mod .cse322 10) 0)) (< .cse322 0))))) (and (exists ((v_prenex_113 Int)) (let ((.cse323 (* 9 v_prenex_113))) (and (<= (+ c_~a14~0 585377) (div .cse323 10)) (not (= (mod .cse323 10) 0)) (< 0 (+ v_prenex_113 84)) (< .cse323 0)))) (exists ((v_prenex_114 Int)) (let ((.cse324 (* 9 v_prenex_114))) (let ((.cse325 (div .cse324 10))) (let ((.cse326 (+ .cse325 1))) (and (<= v_prenex_114 37) (<= 0 .cse324) (<= 0 .cse325) (< .cse326 0) (<= (+ c_~a28~0 225074) (div .cse325 5)) (not (= (mod .cse326 5) 0)))))))) (and (exists ((v_prenex_194 Int)) (let ((.cse328 (* 9 v_prenex_194))) (let ((.cse327 (div .cse328 10))) (and (< .cse327 0) (<= 0 (+ .cse327 1)) (<= v_prenex_194 37) (<= (+ c_~a28~0 225073) (div .cse327 5)) (<= 0 .cse328) (not (= (mod .cse327 5) 0)))))) (exists ((v_prenex_193 Int)) (let ((.cse329 (* 9 v_prenex_193))) (and (<= (+ c_~a14~0 585378) (div .cse329 10)) (< 0 (+ v_prenex_193 84)) (= (mod .cse329 10) 0))))) (and (exists ((v_prenex_105 Int)) (let ((.cse330 (* 9 v_prenex_105))) (and (<= (+ c_~a14~0 585377) (div .cse330 10)) (< .cse330 0) (<= (+ v_prenex_105 84) 0) (not (= (mod .cse330 10) 0)) (< 0 (+ v_prenex_105 114))))) (exists ((v_prenex_106 Int)) (let ((.cse333 (* 9 v_prenex_106))) (let ((.cse331 (div .cse333 10))) (let ((.cse332 (+ .cse331 1))) (and (< 300 v_prenex_106) (= (mod .cse331 5) 0) (<= (+ c_~a28~0 225074) (div .cse332 5)) (<= 0 .cse332) (< .cse333 0) (not (= (mod .cse333 10) 0)))))))) (and (exists ((v_prenex_237 Int)) (let ((.cse334 (* 9 v_prenex_237))) (and (< 0 (+ v_prenex_237 114)) (<= (+ c_~a14~0 585378) (div .cse334 10)) (<= 0 .cse334) (<= (+ v_prenex_237 84) 0)))) (exists ((v_prenex_238 Int)) (let ((.cse335 (* 9 v_prenex_238))) (let ((.cse336 (div .cse335 10))) (and (< 300 v_prenex_238) (<= 0 .cse335) (<= (+ c_~a28~0 225073) (div .cse336 5)) (< .cse336 0) (<= 0 (+ .cse336 1)) (not (= (mod .cse336 5) 0))))))) (and (exists ((v_prenex_128 Int)) (let ((.cse338 (* 9 v_prenex_128))) (let ((.cse339 (div .cse338 10))) (let ((.cse337 (+ .cse339 1))) (and (< .cse337 0) (<= 0 .cse338) (<= (+ c_~a28~0 225073) (div .cse339 5)) (< 300 v_prenex_128) (not (= (mod .cse339 5) 0)) (not (= (mod .cse337 5) 0)) (< .cse339 0)))))) (exists ((v_prenex_127 Int)) (let ((.cse340 (* 9 v_prenex_127))) (and (<= (+ v_prenex_127 84) 0) (< 0 (+ v_prenex_127 114)) (<= (+ c_~a14~0 585378) (div .cse340 10)) (= (mod .cse340 10) 0))))) (and (exists ((v_prenex_199 Int)) (let ((.cse341 (* 9 v_prenex_199))) (and (<= (+ c_~a14~0 585378) (div .cse341 10)) (< 0 (+ v_prenex_199 84)) (<= 0 .cse341)))) (exists ((v_prenex_200 Int)) (let ((.cse343 (* 9 v_prenex_200))) (let ((.cse342 (div .cse343 10))) (and (= (mod (+ .cse342 1) 5) 0) (<= 0 .cse343) (<= (+ c_~a28~0 225074) (div .cse342 5)) (<= 0 .cse342) (<= v_prenex_200 37)))))) (and (exists ((v_prenex_256 Int)) (let ((.cse344 (* 9 v_prenex_256))) (let ((.cse345 (div .cse344 10))) (let ((.cse346 (+ .cse345 1))) (and (<= 0 .cse344) (= (mod .cse345 5) 0) (not (= (mod .cse346 5) 0)) (< .cse346 0) (< 300 v_prenex_256) (<= (+ c_~a28~0 225074) (div .cse345 5))))))) (exists ((v_prenex_255 Int)) (let ((.cse347 (* 9 v_prenex_255))) (and (<= 0 .cse347) (< 0 (+ v_prenex_255 114)) (<= (+ v_prenex_255 84) 0) (<= (+ c_~a14~0 585378) (div .cse347 10)))))) (and (exists ((v_prenex_7 Int)) (let ((.cse349 (* 9 v_prenex_7))) (let ((.cse348 (div .cse349 10))) (and (<= (+ c_~a28~0 225073) (div .cse348 5)) (not (= (mod .cse348 5) 0)) (<= 0 .cse349) (< .cse348 0) (< 300 v_prenex_7) (= (mod (+ .cse348 1) 5) 0))))) (exists ((v_prenex_8 Int)) (let ((.cse350 (* 9 v_prenex_8))) (and (not (= (mod .cse350 10) 0)) (< 0 (+ v_prenex_8 114)) (< .cse350 0) (<= (+ c_~a14~0 585377) (div .cse350 10)) (<= (+ v_prenex_8 84) 0))))) (and (exists ((v_prenex_131 Int)) (let ((.cse351 (* 9 v_prenex_131))) (and (<= (+ c_~a14~0 585377) (div .cse351 10)) (< .cse351 0) (not (= (mod .cse351 10) 0)) (<= (+ v_prenex_131 84) 0) (< 0 (+ v_prenex_131 114))))) (exists ((v_prenex_132 Int)) (let ((.cse353 (* 9 v_prenex_132))) (let ((.cse352 (div .cse353 10))) (and (<= 0 (+ .cse352 1)) (= (mod .cse352 5) 0) (< 300 v_prenex_132) (<= (+ c_~a28~0 225074) (div .cse352 5)) (<= 0 .cse353)))))) (and (exists ((v_prenex_263 Int)) (let ((.cse354 (* 9 v_prenex_263))) (and (< 0 (+ v_prenex_263 84)) (<= (+ c_~a14~0 585378) (div .cse354 10)) (<= 0 .cse354)))) (exists ((v_prenex_264 Int)) (let ((.cse356 (* 9 v_prenex_264))) (let ((.cse357 (div .cse356 10))) (let ((.cse355 (+ .cse357 1))) (and (= (mod .cse355 5) 0) (not (= (mod .cse356 10) 0)) (<= v_prenex_264 37) (<= 0 .cse357) (<= (+ c_~a28~0 225074) (div .cse355 5)) (< .cse356 0))))))) (and (exists ((v_prenex_164 Int)) (let ((.cse359 (* 9 v_prenex_164))) (let ((.cse358 (div .cse359 10))) (and (<= (+ c_~a28~0 225073) (div .cse358 5)) (= (mod .cse359 10) 0) (< .cse358 0) (< 300 v_prenex_164) (<= 0 (+ .cse358 1)) (not (= (mod .cse358 5) 0)))))) (exists ((v_prenex_163 Int)) (let ((.cse360 (* 9 v_prenex_163))) (and (<= (+ v_prenex_163 84) 0) (< 0 (+ v_prenex_163 114)) (<= 0 .cse360) (<= (+ c_~a14~0 585378) (div .cse360 10)))))) (and (exists ((v_prenex_133 Int)) (let ((.cse361 (* 9 v_prenex_133))) (and (= (mod .cse361 10) 0) (<= (+ c_~a14~0 585378) (div .cse361 10)) (< 0 (+ v_prenex_133 84))))) (exists ((v_prenex_134 Int)) (let ((.cse362 (* 9 v_prenex_134))) (let ((.cse363 (div .cse362 10))) (and (<= 0 .cse362) (<= v_prenex_134 37) (<= 0 (+ .cse363 1)) (<= (+ c_~a28~0 225074) (div .cse363 5)) (= (mod .cse363 5) 0)))))) (and (exists ((v_prenex_129 Int)) (let ((.cse364 (* 9 v_prenex_129))) (and (<= (+ c_~a14~0 585378) (div .cse364 10)) (< 0 (+ v_prenex_129 84)) (= (mod .cse364 10) 0)))) (exists ((v_prenex_130 Int)) (let ((.cse367 (* 9 v_prenex_130))) (let ((.cse365 (div .cse367 10))) (let ((.cse366 (+ .cse365 1))) (and (< .cse365 0) (not (= (mod .cse366 5) 0)) (<= v_prenex_130 37) (< .cse366 0) (= (mod .cse367 10) 0) (not (= (mod .cse365 5) 0)) (<= (+ c_~a28~0 225073) (div .cse365 5)))))))) (and (exists ((v_prenex_171 Int)) (let ((.cse368 (* 9 v_prenex_171))) (and (<= (+ c_~a14~0 585377) (div .cse368 10)) (< .cse368 0) (not (= (mod .cse368 10) 0)) (< 0 (+ v_prenex_171 84))))) (exists ((v_prenex_172 Int)) (let ((.cse369 (* 9 v_prenex_172))) (let ((.cse370 (div .cse369 10))) (let ((.cse371 (+ .cse370 1))) (and (not (= (mod .cse369 10) 0)) (= (mod .cse370 5) 0) (<= (+ c_~a28~0 225074) (div .cse371 5)) (< .cse369 0) (<= v_prenex_172 37) (<= 0 .cse371))))))) (and (exists ((v_prenex_214 Int)) (let ((.cse374 (* 9 v_prenex_214))) (let ((.cse372 (div .cse374 10))) (let ((.cse373 (+ .cse372 1))) (and (= (mod .cse372 5) 0) (<= (+ c_~a28~0 225074) (div .cse372 5)) (not (= (mod .cse373 5) 0)) (<= 0 .cse374) (< .cse373 0) (< 300 v_prenex_214)))))) (exists ((v_prenex_213 Int)) (let ((.cse375 (* 9 v_prenex_213))) (and (= (mod .cse375 10) 0) (< 0 (+ v_prenex_213 114)) (<= (+ v_prenex_213 84) 0) (<= (+ c_~a14~0 585378) (div .cse375 10)))))) (and (exists ((v_prenex_43 Int)) (let ((.cse377 (* 9 v_prenex_43))) (let ((.cse376 (div .cse377 10))) (and (<= (+ c_~a28~0 225074) (div .cse376 5)) (= (mod .cse376 5) 0) (< 300 v_prenex_43) (<= 0 .cse377) (<= 0 (+ .cse376 1)))))) (exists ((v_prenex_44 Int)) (let ((.cse378 (* 9 v_prenex_44))) (and (<= (+ c_~a14~0 585378) (div .cse378 10)) (< 0 (+ v_prenex_44 114)) (<= (+ v_prenex_44 84) 0) (= (mod .cse378 10) 0))))) (and (exists ((v_prenex_17 Int)) (let ((.cse380 (* 9 v_prenex_17))) (let ((.cse379 (div .cse380 10))) (let ((.cse381 (+ .cse379 1))) (and (= (mod .cse379 5) 0) (< .cse380 0) (<= v_prenex_17 37) (= (mod .cse381 5) 0) (<= (+ c_~a28~0 225074) (div .cse381 5)) (not (= (mod .cse380 10) 0))))))) (exists ((v_prenex_18 Int)) (let ((.cse382 (* 9 v_prenex_18))) (and (<= 0 .cse382) (< 0 (+ v_prenex_18 84)) (<= (+ c_~a14~0 585378) (div .cse382 10)))))) (and (exists ((v_prenex_227 Int)) (let ((.cse383 (* 9 v_prenex_227))) (and (< 0 (+ v_prenex_227 84)) (<= (+ c_~a14~0 585378) (div .cse383 10)) (<= 0 .cse383)))) (exists ((v_prenex_228 Int)) (let ((.cse386 (* 9 v_prenex_228))) (let ((.cse385 (div .cse386 10))) (let ((.cse384 (+ .cse385 1))) (and (not (= (mod .cse384 5) 0)) (= (mod .cse385 5) 0) (<= (+ c_~a28~0 225074) (div .cse385 5)) (<= v_prenex_228 37) (= (mod .cse386 10) 0) (< .cse384 0))))))) (and (exists ((v_prenex_240 Int)) (let ((.cse389 (* 9 v_prenex_240))) (let ((.cse388 (div .cse389 10))) (let ((.cse387 (+ .cse388 1))) (and (< .cse387 0) (<= 0 .cse388) (<= v_prenex_240 37) (not (= (mod .cse387 5) 0)) (not (= (mod .cse389 10) 0)) (< .cse389 0) (<= (+ c_~a28~0 225073) (div .cse387 5))))))) (exists ((v_prenex_239 Int)) (let ((.cse390 (* 9 v_prenex_239))) (and (< 0 (+ v_prenex_239 84)) (< .cse390 0) (not (= (mod .cse390 10) 0)) (<= (+ c_~a14~0 585377) (div .cse390 10)))))) (and (exists ((v_prenex_299 Int)) (let ((.cse391 (* 9 v_prenex_299))) (and (< 0 (+ v_prenex_299 84)) (<= (+ c_~a14~0 585378) (div .cse391 10)) (<= 0 .cse391)))) (exists ((v_prenex_300 Int)) (let ((.cse394 (* 9 v_prenex_300))) (let ((.cse393 (div .cse394 10))) (let ((.cse392 (+ .cse393 1))) (and (< .cse392 0) (< .cse393 0) (< .cse394 0) (not (= (mod .cse393 5) 0)) (<= (+ c_~a28~0 225073) (div .cse392 5)) (not (= (mod .cse392 5) 0)) (<= v_prenex_300 37) (not (= (mod .cse394 10) 0)))))))) (and (exists ((v_prenex_78 Int)) (let ((.cse395 (* 9 v_prenex_78))) (and (<= (+ c_~a14~0 585378) (div .cse395 10)) (<= (+ v_prenex_78 84) 0) (= (mod .cse395 10) 0) (< 0 (+ v_prenex_78 114))))) (exists ((v_prenex_77 Int)) (let ((.cse397 (* 9 v_prenex_77))) (let ((.cse396 (div .cse397 10))) (and (not (= (mod .cse396 5) 0)) (< 300 v_prenex_77) (<= (+ c_~a28~0 225073) (div .cse396 5)) (<= 0 .cse397) (< .cse396 0) (<= 0 (+ .cse396 1))))))) (and (exists ((v_prenex_70 Int)) (let ((.cse398 (* 9 v_prenex_70))) (and (= (mod .cse398 10) 0) (< 0 (+ v_prenex_70 84)) (<= (+ c_~a14~0 585378) (div .cse398 10))))) (exists ((v_prenex_69 Int)) (let ((.cse401 (* 9 v_prenex_69))) (let ((.cse399 (div .cse401 10))) (let ((.cse400 (+ .cse399 1))) (and (< .cse399 0) (<= v_prenex_69 37) (= (mod .cse400 5) 0) (not (= (mod .cse401 10) 0)) (< .cse401 0) (<= (+ c_~a28~0 225074) (div .cse400 5)) (not (= (mod .cse399 5) 0)))))))) (and (exists ((v_prenex_63 Int)) (let ((.cse403 (* 9 v_prenex_63))) (let ((.cse402 (div .cse403 10))) (and (= (mod (+ .cse402 1) 5) 0) (= (mod .cse403 10) 0) (< 300 v_prenex_63) (<= 0 .cse402) (<= (+ c_~a28~0 225074) (div .cse402 5)))))) (exists ((v_prenex_64 Int)) (let ((.cse404 (* 9 v_prenex_64))) (and (< 0 (+ v_prenex_64 114)) (= (mod .cse404 10) 0) (<= (+ c_~a14~0 585378) (div .cse404 10)) (<= (+ v_prenex_64 84) 0))))) (and (exists ((v_prenex_86 Int)) (let ((.cse405 (* 9 v_prenex_86))) (and (<= (+ v_prenex_86 84) 0) (not (= (mod .cse405 10) 0)) (< .cse405 0) (<= (+ c_~a14~0 585377) (div .cse405 10)) (< 0 (+ v_prenex_86 114))))) (exists ((v_prenex_85 Int)) (let ((.cse408 (* 9 v_prenex_85))) (let ((.cse407 (div .cse408 10))) (let ((.cse406 (+ .cse407 1))) (and (<= (+ c_~a28~0 225074) (div .cse406 5)) (< .cse407 0) (< .cse408 0) (not (= (mod .cse407 5) 0)) (not (= (mod .cse408 10) 0)) (= (mod .cse406 5) 0) (< 300 v_prenex_85))))))) (and (exists ((v_prenex_211 Int)) (let ((.cse409 (* 9 v_prenex_211))) (and (< 0 (+ v_prenex_211 84)) (<= (+ c_~a14~0 585378) (div .cse409 10)) (= (mod .cse409 10) 0)))) (exists ((v_prenex_212 Int)) (let ((.cse411 (* 9 v_prenex_212))) (let ((.cse410 (div .cse411 10))) (and (< .cse410 0) (<= 0 (+ .cse410 1)) (not (= (mod .cse410 5) 0)) (= (mod .cse411 10) 0) (<= (+ c_~a28~0 225073) (div .cse410 5)) (<= v_prenex_212 37)))))) (and (exists ((v_prenex_50 Int)) (let ((.cse412 (* 9 v_prenex_50))) (and (<= (+ v_prenex_50 84) 0) (<= (+ c_~a14~0 585378) (div .cse412 10)) (< 0 (+ v_prenex_50 114)) (= (mod .cse412 10) 0)))) (exists ((v_prenex_49 Int)) (let ((.cse414 (* 9 v_prenex_49))) (let ((.cse413 (div .cse414 10))) (and (= (mod (+ .cse413 1) 5) 0) (= (mod .cse414 10) 0) (< .cse413 0) (< 300 v_prenex_49) (not (= (mod .cse413 5) 0)) (<= (+ c_~a28~0 225073) (div .cse413 5))))))) (and (exists ((v_prenex_140 Int)) (let ((.cse416 (* 9 v_prenex_140))) (let ((.cse415 (div .cse416 10))) (and (= (mod .cse415 5) 0) (<= 0 (+ .cse415 1)) (<= 0 .cse416) (< 300 v_prenex_140) (<= (+ c_~a28~0 225074) (div .cse415 5)))))) (exists ((v_prenex_139 Int)) (let ((.cse417 (* 9 v_prenex_139))) (and (<= (+ v_prenex_139 84) 0) (<= 0 .cse417) (<= (+ c_~a14~0 585378) (div .cse417 10)) (< 0 (+ v_prenex_139 114)))))) (and (exists ((v_prenex_151 Int)) (let ((.cse418 (* 9 v_prenex_151))) (and (<= (+ v_prenex_151 84) 0) (< .cse418 0) (not (= (mod .cse418 10) 0)) (<= (+ c_~a14~0 585377) (div .cse418 10)) (< 0 (+ v_prenex_151 114))))) (exists ((v_prenex_152 Int)) (let ((.cse420 (* 9 v_prenex_152))) (let ((.cse419 (div .cse420 10))) (and (<= 0 (+ .cse419 1)) (< 300 v_prenex_152) (<= (+ c_~a28~0 225074) (div .cse419 5)) (= (mod .cse419 5) 0) (= (mod .cse420 10) 0)))))) (and (exists ((v_prenex_51 Int)) (let ((.cse422 (* 9 v_prenex_51))) (let ((.cse421 (div .cse422 10))) (and (< 300 v_prenex_51) (<= (+ c_~a28~0 225074) (div .cse421 5)) (= (mod (+ .cse421 1) 5) 0) (<= 0 .cse421) (<= 0 .cse422))))) (exists ((v_prenex_52 Int)) (let ((.cse423 (* 9 v_prenex_52))) (and (= (mod .cse423 10) 0) (< 0 (+ v_prenex_52 114)) (<= (+ c_~a14~0 585378) (div .cse423 10)) (<= (+ v_prenex_52 84) 0))))) (and (exists ((v_prenex_289 Int)) (let ((.cse424 (* 9 v_prenex_289))) (and (not (= (mod .cse424 10) 0)) (< 0 (+ v_prenex_289 114)) (< .cse424 0) (<= (+ v_prenex_289 84) 0) (<= (+ c_~a14~0 585377) (div .cse424 10))))) (exists ((v_prenex_290 Int)) (let ((.cse426 (* 9 v_prenex_290))) (let ((.cse425 (div .cse426 10))) (and (<= 0 .cse425) (= (mod (+ .cse425 1) 5) 0) (< 300 v_prenex_290) (<= (+ c_~a28~0 225074) (div .cse425 5)) (<= 0 .cse426)))))) (and (exists ((v_prenex_313 Int)) (let ((.cse427 (* 9 v_prenex_313))) (and (< .cse427 0) (not (= (mod .cse427 10) 0)) (< 0 (+ v_prenex_313 84)) (<= (+ c_~a14~0 585377) (div .cse427 10))))) (exists ((v_prenex_314 Int)) (let ((.cse429 (* 9 v_prenex_314))) (let ((.cse428 (div .cse429 10))) (and (< .cse428 0) (<= 0 (+ .cse428 1)) (<= v_prenex_314 37) (not (= (mod .cse428 5) 0)) (<= 0 .cse429) (<= (+ c_~a28~0 225073) (div .cse428 5))))))) (and (exists ((v_prenex_83 Int)) (let ((.cse431 (* 9 v_prenex_83))) (let ((.cse430 (div .cse431 10))) (let ((.cse432 (+ .cse430 1))) (and (< .cse430 0) (< 300 v_prenex_83) (not (= (mod .cse431 10) 0)) (= (mod .cse432 5) 0) (not (= (mod .cse430 5) 0)) (< .cse431 0) (<= (+ c_~a28~0 225074) (div .cse432 5))))))) (exists ((v_prenex_84 Int)) (let ((.cse433 (* 9 v_prenex_84))) (and (<= (+ c_~a14~0 585378) (div .cse433 10)) (= (mod .cse433 10) 0) (<= (+ v_prenex_84 84) 0) (< 0 (+ v_prenex_84 114)))))) (and (exists ((v_prenex_125 Int)) (let ((.cse434 (* 9 v_prenex_125))) (and (not (= (mod .cse434 10) 0)) (<= (+ c_~a14~0 585377) (div .cse434 10)) (< 0 (+ v_prenex_125 84)) (< .cse434 0)))) (exists ((v_prenex_126 Int)) (let ((.cse436 (* 9 v_prenex_126))) (let ((.cse435 (div .cse436 10))) (and (<= 0 (+ .cse435 1)) (<= (+ c_~a28~0 225074) (div .cse435 5)) (<= v_prenex_126 37) (= (mod .cse436 10) 0) (<= 0 .cse435)))))) (and (exists ((v_prenex_294 Int)) (let ((.cse438 (* 9 v_prenex_294))) (let ((.cse439 (div .cse438 10))) (let ((.cse437 (+ .cse439 1))) (and (<= v_prenex_294 37) (<= 0 .cse437) (not (= (mod .cse438 10) 0)) (< .cse438 0) (<= (+ c_~a28~0 225074) (div .cse437 5)) (<= 0 .cse439)))))) (exists ((v_prenex_293 Int)) (let ((.cse440 (* 9 v_prenex_293))) (and (= (mod .cse440 10) 0) (< 0 (+ v_prenex_293 84)) (<= (+ c_~a14~0 585378) (div .cse440 10)))))) (and (exists ((v_prenex_246 Int)) (let ((.cse441 (* 9 v_prenex_246))) (let ((.cse442 (div .cse441 10))) (let ((.cse443 (+ .cse442 1))) (and (= (mod .cse441 10) 0) (<= (+ c_~a28~0 225074) (div .cse442 5)) (< 300 v_prenex_246) (not (= (mod .cse443 5) 0)) (< .cse443 0) (<= 0 .cse442)))))) (exists ((v_prenex_245 Int)) (let ((.cse444 (* 9 v_prenex_245))) (and (< 0 (+ v_prenex_245 114)) (<= (+ c_~a14~0 585378) (div .cse444 10)) (<= (+ v_prenex_245 84) 0) (= (mod .cse444 10) 0))))) (and (exists ((v_prenex_122 Int)) (let ((.cse446 (* 9 v_prenex_122))) (let ((.cse445 (div .cse446 10))) (and (= (mod (+ .cse445 1) 5) 0) (<= (+ c_~a28~0 225074) (div .cse445 5)) (= (mod .cse445 5) 0) (= (mod .cse446 10) 0) (< 300 v_prenex_122))))) (exists ((v_prenex_121 Int)) (let ((.cse447 (* 9 v_prenex_121))) (and (<= (+ v_prenex_121 84) 0) (<= 0 .cse447) (<= (+ c_~a14~0 585378) (div .cse447 10)) (< 0 (+ v_prenex_121 114)))))) (and (exists ((v_prenex_244 Int)) (let ((.cse449 (* 9 v_prenex_244))) (let ((.cse448 (div .cse449 10))) (and (<= (+ c_~a28~0 225074) (div .cse448 5)) (<= 0 .cse449) (<= 0 (+ .cse448 1)) (<= v_prenex_244 37) (<= 0 .cse448))))) (exists ((v_prenex_243 Int)) (let ((.cse450 (* 9 v_prenex_243))) (and (not (= (mod .cse450 10) 0)) (<= (+ c_~a14~0 585377) (div .cse450 10)) (< 0 (+ v_prenex_243 84)) (< .cse450 0))))) (and (exists ((v_prenex_21 Int)) (let ((.cse452 (* 9 v_prenex_21))) (let ((.cse451 (div .cse452 10))) (and (<= 0 (+ .cse451 1)) (<= 0 .cse451) (< 300 v_prenex_21) (<= 0 .cse452) (<= (+ c_~a28~0 225074) (div .cse451 5)))))) (exists ((v_prenex_22 Int)) (let ((.cse453 (* 9 v_prenex_22))) (and (<= (+ v_prenex_22 84) 0) (< 0 (+ v_prenex_22 114)) (< .cse453 0) (<= (+ c_~a14~0 585377) (div .cse453 10)) (not (= (mod .cse453 10) 0)))))) (and (exists ((v_prenex_13 Int)) (let ((.cse455 (* 9 v_prenex_13))) (let ((.cse454 (div .cse455 10))) (let ((.cse456 (+ .cse454 1))) (and (< .cse454 0) (< .cse455 0) (<= 0 .cse456) (not (= (mod .cse455 10) 0)) (< 300 v_prenex_13) (<= (+ c_~a28~0 225074) (div .cse456 5)) (not (= (mod .cse454 5) 0))))))) (exists ((v_prenex_14 Int)) (let ((.cse457 (* 9 v_prenex_14))) (and (<= (+ c_~a14~0 585378) (div .cse457 10)) (= (mod .cse457 10) 0) (< 0 (+ v_prenex_14 114)) (<= (+ v_prenex_14 84) 0))))) (and (exists ((v_prenex_298 Int)) (let ((.cse458 (* 9 v_prenex_298))) (let ((.cse460 (div .cse458 10))) (let ((.cse459 (+ .cse460 1))) (and (<= 0 .cse458) (not (= (mod .cse459 5) 0)) (< .cse460 0) (<= v_prenex_298 37) (<= (+ c_~a28~0 225073) (div .cse460 5)) (not (= (mod .cse460 5) 0)) (< .cse459 0)))))) (exists ((v_prenex_297 Int)) (let ((.cse461 (* 9 v_prenex_297))) (and (<= 0 .cse461) (<= (+ c_~a14~0 585378) (div .cse461 10)) (< 0 (+ v_prenex_297 84)))))) (and (exists ((v_prenex_102 Int)) (let ((.cse462 (* 9 v_prenex_102))) (let ((.cse464 (div .cse462 10))) (let ((.cse463 (+ .cse464 1))) (and (< 300 v_prenex_102) (= (mod .cse462 10) 0) (not (= (mod .cse463 5) 0)) (not (= (mod .cse464 5) 0)) (<= (+ c_~a28~0 225073) (div .cse464 5)) (< .cse464 0) (< .cse463 0)))))) (exists ((v_prenex_101 Int)) (let ((.cse465 (* 9 v_prenex_101))) (and (<= (+ v_prenex_101 84) 0) (<= (+ c_~a14~0 585378) (div .cse465 10)) (< 0 (+ v_prenex_101 114)) (= (mod .cse465 10) 0))))) (and (exists ((v_prenex_108 Int)) (let ((.cse466 (* 9 v_prenex_108))) (let ((.cse467 (div .cse466 10))) (let ((.cse468 (+ .cse467 1))) (and (not (= (mod .cse466 10) 0)) (<= 0 .cse467) (not (= (mod .cse468 5) 0)) (< .cse466 0) (< .cse468 0) (<= v_prenex_108 37) (<= (+ c_~a28~0 225073) (div .cse468 5))))))) (exists ((v_prenex_107 Int)) (let ((.cse469 (* 9 v_prenex_107))) (and (= (mod .cse469 10) 0) (<= (+ c_~a14~0 585378) (div .cse469 10)) (< 0 (+ v_prenex_107 84)))))) (and (exists ((v_prenex_292 Int)) (let ((.cse471 (* 9 v_prenex_292))) (let ((.cse472 (div .cse471 10))) (let ((.cse470 (+ .cse472 1))) (and (< 300 v_prenex_292) (= (mod .cse470 5) 0) (< .cse471 0) (<= (+ c_~a28~0 225074) (div .cse470 5)) (<= 0 .cse472) (not (= (mod .cse471 10) 0))))))) (exists ((v_prenex_291 Int)) (let ((.cse473 (* 9 v_prenex_291))) (and (<= (+ v_prenex_291 84) 0) (<= 0 .cse473) (< 0 (+ v_prenex_291 114)) (<= (+ c_~a14~0 585378) (div .cse473 10)))))) (and (exists ((v_prenex_176 Int)) (let ((.cse476 (* 9 v_prenex_176))) (let ((.cse475 (div .cse476 10))) (let ((.cse474 (+ .cse475 1))) (and (<= v_prenex_176 37) (= (mod .cse474 5) 0) (not (= (mod .cse475 5) 0)) (not (= (mod .cse476 10) 0)) (< .cse475 0) (<= (+ c_~a28~0 225074) (div .cse474 5)) (< .cse476 0)))))) (exists ((v_prenex_175 Int)) (let ((.cse477 (* 9 v_prenex_175))) (and (< .cse477 0) (< 0 (+ v_prenex_175 84)) (<= (+ c_~a14~0 585377) (div .cse477 10)) (not (= (mod .cse477 10) 0)))))) (and (exists ((v_prenex_82 Int)) (let ((.cse478 (* 9 v_prenex_82))) (and (< 0 (+ v_prenex_82 84)) (<= (+ c_~a14~0 585378) (div .cse478 10)) (= (mod .cse478 10) 0)))) (exists ((v_prenex_81 Int)) (let ((.cse479 (* 9 v_prenex_81))) (let ((.cse481 (div .cse479 10))) (let ((.cse480 (+ .cse481 1))) (and (= (mod .cse479 10) 0) (not (= (mod .cse480 5) 0)) (< .cse480 0) (= (mod .cse481 5) 0) (<= v_prenex_81 37) (<= (+ c_~a28~0 225074) (div .cse481 5)))))))) (and (exists ((v_prenex_16 Int)) (let ((.cse482 (* 9 v_prenex_16))) (and (= (mod .cse482 10) 0) (<= (+ v_prenex_16 84) 0) (< 0 (+ v_prenex_16 114)) (<= (+ c_~a14~0 585378) (div .cse482 10))))) (exists ((v_prenex_15 Int)) (let ((.cse484 (* 9 v_prenex_15))) (let ((.cse485 (div .cse484 10))) (let ((.cse483 (+ .cse485 1))) (and (= (mod .cse483 5) 0) (<= (+ c_~a28~0 225074) (div .cse483 5)) (not (= (mod .cse484 10) 0)) (< .cse484 0) (< 300 v_prenex_15) (<= 0 .cse485))))))) (and (exists ((v_prenex_295 Int)) (let ((.cse486 (* 9 v_prenex_295))) (and (<= (+ c_~a14~0 585378) (div .cse486 10)) (<= 0 .cse486) (<= (+ v_prenex_295 84) 0) (< 0 (+ v_prenex_295 114))))) (exists ((v_prenex_296 Int)) (let ((.cse487 (* 9 v_prenex_296))) (let ((.cse489 (div .cse487 10))) (let ((.cse488 (+ .cse489 1))) (and (not (= (mod .cse487 10) 0)) (< .cse488 0) (< .cse487 0) (<= (+ c_~a28~0 225073) (div .cse488 5)) (<= 0 .cse489) (not (= (mod .cse488 5) 0)) (< 300 v_prenex_296))))))) (and (exists ((v_prenex_217 Int)) (let ((.cse490 (* 9 v_prenex_217))) (and (<= (+ c_~a14~0 585377) (div .cse490 10)) (< 0 (+ v_prenex_217 84)) (not (= (mod .cse490 10) 0)) (< .cse490 0)))) (exists ((v_prenex_218 Int)) (let ((.cse493 (* 9 v_prenex_218))) (let ((.cse492 (div .cse493 10))) (let ((.cse491 (+ .cse492 1))) (and (<= (+ c_~a28~0 225074) (div .cse491 5)) (<= 0 .cse492) (<= v_prenex_218 37) (not (= (mod .cse493 10) 0)) (= (mod .cse491 5) 0) (< .cse493 0))))))) (and (exists ((v_prenex_207 Int)) (let ((.cse494 (* 9 v_prenex_207))) (and (< .cse494 0) (not (= (mod .cse494 10) 0)) (< 0 (+ v_prenex_207 114)) (<= (+ v_prenex_207 84) 0) (<= (+ c_~a14~0 585377) (div .cse494 10))))) (exists ((v_prenex_208 Int)) (let ((.cse495 (* 9 v_prenex_208))) (let ((.cse497 (div .cse495 10))) (let ((.cse496 (+ .cse497 1))) (and (not (= (mod .cse495 10) 0)) (< .cse496 0) (= (mod .cse497 5) 0) (< 300 v_prenex_208) (<= (+ c_~a28~0 225073) (div .cse496 5)) (not (= (mod .cse496 5) 0)) (< .cse495 0))))))) (and (exists ((v_prenex_99 Int)) (let ((.cse498 (* 9 v_prenex_99))) (and (<= 0 .cse498) (< 0 (+ v_prenex_99 84)) (<= (+ c_~a14~0 585378) (div .cse498 10))))) (exists ((v_prenex_100 Int)) (let ((.cse500 (* 9 v_prenex_100))) (let ((.cse499 (div .cse500 10))) (and (= (mod (+ .cse499 1) 5) 0) (= (mod .cse499 5) 0) (<= v_prenex_100 37) (<= (+ c_~a28~0 225074) (div .cse499 5)) (= (mod .cse500 10) 0)))))) (and (exists ((v_prenex_71 Int)) (let ((.cse502 (* 9 v_prenex_71))) (let ((.cse503 (div .cse502 10))) (let ((.cse501 (+ .cse503 1))) (and (< .cse501 0) (<= 0 .cse502) (= (mod .cse503 5) 0) (<= (+ c_~a28~0 225074) (div .cse503 5)) (< 300 v_prenex_71) (not (= (mod .cse501 5) 0))))))) (exists ((v_prenex_72 Int)) (let ((.cse504 (* 9 v_prenex_72))) (and (<= (+ c_~a14~0 585377) (div .cse504 10)) (< .cse504 0) (not (= (mod .cse504 10) 0)) (< 0 (+ v_prenex_72 114)) (<= (+ v_prenex_72 84) 0))))) (and (exists ((v_prenex_259 Int)) (let ((.cse505 (* 9 v_prenex_259))) (and (<= (+ c_~a14~0 585378) (div .cse505 10)) (< 0 (+ v_prenex_259 84)) (= (mod .cse505 10) 0)))) (exists ((v_prenex_260 Int)) (let ((.cse507 (* 9 v_prenex_260))) (let ((.cse506 (div .cse507 10))) (and (= (mod .cse506 5) 0) (<= (+ c_~a28~0 225074) (div .cse506 5)) (= (mod (+ .cse506 1) 5) 0) (<= v_prenex_260 37) (<= 0 .cse507)))))) (and (exists ((v_prenex_136 Int)) (let ((.cse510 (* 9 v_prenex_136))) (let ((.cse508 (div .cse510 10))) (let ((.cse509 (+ .cse508 1))) (and (not (= (mod .cse508 5) 0)) (< .cse508 0) (<= (+ c_~a28~0 225073) (div .cse509 5)) (not (= (mod .cse509 5) 0)) (not (= (mod .cse510 10) 0)) (< .cse510 0) (< 300 v_prenex_136) (< .cse509 0)))))) (exists ((v_prenex_135 Int)) (let ((.cse511 (* 9 v_prenex_135))) (and (= (mod .cse511 10) 0) (<= (+ v_prenex_135 84) 0) (< 0 (+ v_prenex_135 114)) (<= (+ c_~a14~0 585378) (div .cse511 10)))))) (and (exists ((v_prenex_235 Int)) (let ((.cse512 (* 9 v_prenex_235))) (and (not (= (mod .cse512 10) 0)) (< 0 (+ v_prenex_235 84)) (<= (+ c_~a14~0 585377) (div .cse512 10)) (< .cse512 0)))) (exists ((v_prenex_236 Int)) (let ((.cse514 (* 9 v_prenex_236))) (let ((.cse513 (div .cse514 10))) (and (= (mod .cse513 5) 0) (<= 0 (+ .cse513 1)) (<= (+ c_~a28~0 225074) (div .cse513 5)) (<= v_prenex_236 37) (<= 0 .cse514)))))) (and (exists ((v_prenex_143 Int)) (let ((.cse515 (* 9 v_prenex_143))) (and (< 0 (+ v_prenex_143 84)) (<= (+ c_~a14~0 585378) (div .cse515 10)) (<= 0 .cse515)))) (exists ((v_prenex_144 Int)) (let ((.cse517 (* 9 v_prenex_144))) (let ((.cse516 (div .cse517 10))) (and (<= (+ c_~a28~0 225073) (div .cse516 5)) (< .cse516 0) (= (mod .cse517 10) 0) (not (= (mod .cse516 5) 0)) (= (mod (+ .cse516 1) 5) 0) (<= v_prenex_144 37)))))) (and (exists ((v_prenex_305 Int)) (let ((.cse518 (* 9 v_prenex_305))) (and (<= 0 .cse518) (< 0 (+ v_prenex_305 84)) (<= (+ c_~a14~0 585378) (div .cse518 10))))) (exists ((v_prenex_306 Int)) (let ((.cse519 (* 9 v_prenex_306))) (let ((.cse520 (div .cse519 10))) (let ((.cse521 (+ .cse520 1))) (and (< .cse519 0) (= (mod .cse520 5) 0) (<= (+ c_~a28~0 225074) (div .cse521 5)) (<= 0 .cse521) (<= v_prenex_306 37) (not (= (mod .cse519 10) 0)))))))) (and (exists ((v_prenex_320 Int)) (let ((.cse523 (* 9 v_prenex_320))) (let ((.cse522 (div .cse523 10))) (let ((.cse524 (+ .cse522 1))) (and (< .cse522 0) (not (= (mod .cse523 10) 0)) (not (= (mod .cse522 5) 0)) (< 300 v_prenex_320) (< .cse523 0) (= (mod .cse524 5) 0) (<= (+ c_~a28~0 225074) (div .cse524 5))))))) (exists ((v_prenex_319 Int)) (let ((.cse525 (* 9 v_prenex_319))) (and (<= (+ c_~a14~0 585378) (div .cse525 10)) (< 0 (+ v_prenex_319 114)) (<= (+ v_prenex_319 84) 0) (<= 0 .cse525))))) (and (exists ((v_prenex_302 Int)) (let ((.cse527 (* 9 v_prenex_302))) (let ((.cse526 (div .cse527 10))) (and (<= 0 .cse526) (= (mod .cse527 10) 0) (= (mod (+ .cse526 1) 5) 0) (<= (+ c_~a28~0 225074) (div .cse526 5)) (< 300 v_prenex_302))))) (exists ((v_prenex_301 Int)) (let ((.cse528 (* 9 v_prenex_301))) (and (< 0 (+ v_prenex_301 114)) (<= (+ c_~a14~0 585378) (div .cse528 10)) (<= 0 .cse528) (<= (+ v_prenex_301 84) 0))))) (and (exists ((v_prenex_254 Int)) (let ((.cse530 (* 9 v_prenex_254))) (let ((.cse529 (div .cse530 10))) (and (<= (+ c_~a28~0 225073) (div .cse529 5)) (= (mod .cse530 10) 0) (< .cse529 0) (<= v_prenex_254 37) (<= 0 (+ .cse529 1)) (not (= (mod .cse529 5) 0)))))) (exists ((v_prenex_253 Int)) (let ((.cse531 (* 9 v_prenex_253))) (and (<= (+ c_~a14~0 585377) (div .cse531 10)) (not (= (mod .cse531 10) 0)) (< .cse531 0) (< 0 (+ v_prenex_253 84)))))) (and (exists ((v_prenex_229 Int)) (let ((.cse532 (* 9 v_prenex_229))) (and (<= 0 .cse532) (< 0 (+ v_prenex_229 84)) (<= (+ c_~a14~0 585378) (div .cse532 10))))) (exists ((v_prenex_230 Int)) (let ((.cse534 (* 9 v_prenex_230))) (let ((.cse533 (div .cse534 10))) (and (<= v_prenex_230 37) (<= 0 (+ .cse533 1)) (<= (+ c_~a28~0 225074) (div .cse533 5)) (<= 0 .cse533) (= (mod .cse534 10) 0)))))) (and (exists ((v_prenex_267 Int)) (let ((.cse535 (* 9 v_prenex_267))) (and (< .cse535 0) (<= (+ c_~a14~0 585377) (div .cse535 10)) (<= (+ v_prenex_267 84) 0) (< 0 (+ v_prenex_267 114)) (not (= (mod .cse535 10) 0))))) (exists ((v_prenex_268 Int)) (let ((.cse537 (* 9 v_prenex_268))) (let ((.cse538 (div .cse537 10))) (let ((.cse536 (+ .cse538 1))) (and (= (mod .cse536 5) 0) (< 300 v_prenex_268) (<= (+ c_~a28~0 225074) (div .cse536 5)) (not (= (mod .cse537 10) 0)) (< .cse537 0) (= (mod .cse538 5) 0))))))) (and (exists ((v_prenex_161 Int)) (let ((.cse539 (* 9 v_prenex_161))) (and (< 0 (+ v_prenex_161 84)) (not (= (mod .cse539 10) 0)) (<= (+ c_~a14~0 585377) (div .cse539 10)) (< .cse539 0)))) (exists ((v_prenex_162 Int)) (let ((.cse541 (* 9 v_prenex_162))) (let ((.cse540 (div .cse541 10))) (and (<= (+ c_~a28~0 225074) (div .cse540 5)) (<= 0 .cse540) (<= 0 .cse541) (<= v_prenex_162 37) (= (mod (+ .cse540 1) 5) 0)))))) (and (exists ((v_prenex_209 Int)) (let ((.cse542 (* 9 v_prenex_209))) (and (<= (+ v_prenex_209 84) 0) (<= 0 .cse542) (< 0 (+ v_prenex_209 114)) (<= (+ c_~a14~0 585378) (div .cse542 10))))) (exists ((v_prenex_210 Int)) (let ((.cse544 (* 9 v_prenex_210))) (let ((.cse543 (div .cse544 10))) (and (not (= (mod .cse543 5) 0)) (< .cse543 0) (<= 0 .cse544) (< 300 v_prenex_210) (= (mod (+ .cse543 1) 5) 0) (<= (+ c_~a28~0 225073) (div .cse543 5))))))) (and (exists ((v_prenex_98 Int)) (let ((.cse546 (* 9 v_prenex_98))) (let ((.cse545 (div .cse546 10))) (and (<= v_prenex_98 37) (<= 0 .cse545) (= (mod (+ .cse545 1) 5) 0) (= (mod .cse546 10) 0) (<= (+ c_~a28~0 225074) (div .cse545 5)))))) (exists ((v_prenex_97 Int)) (let ((.cse547 (* 9 v_prenex_97))) (and (< .cse547 0) (not (= (mod .cse547 10) 0)) (< 0 (+ v_prenex_97 84)) (<= (+ c_~a14~0 585377) (div .cse547 10)))))) (and (exists ((v_prenex_233 Int)) (let ((.cse548 (* 9 v_prenex_233))) (and (< .cse548 0) (< 0 (+ v_prenex_233 84)) (not (= (mod .cse548 10) 0)) (<= (+ c_~a14~0 585377) (div .cse548 10))))) (exists ((v_prenex_234 Int)) (let ((.cse550 (* 9 v_prenex_234))) (let ((.cse549 (div .cse550 10))) (and (= (mod (+ .cse549 1) 5) 0) (not (= (mod .cse549 5) 0)) (< .cse549 0) (<= v_prenex_234 37) (<= (+ c_~a28~0 225073) (div .cse549 5)) (= (mod .cse550 10) 0)))))) (and (exists ((v_prenex_324 Int)) (let ((.cse553 (* 9 v_prenex_324))) (let ((.cse551 (div .cse553 10))) (let ((.cse552 (+ .cse551 1))) (and (<= 0 .cse551) (not (= (mod .cse552 5) 0)) (<= (+ c_~a28~0 225074) (div .cse551 5)) (<= 0 .cse553) (<= v_prenex_324 37) (< .cse552 0)))))) (exists ((v_prenex_323 Int)) (let ((.cse554 (* 9 v_prenex_323))) (and (< 0 (+ v_prenex_323 84)) (<= (+ c_~a14~0 585378) (div .cse554 10)) (<= 0 .cse554))))) (and (exists ((v_prenex_252 Int)) (let ((.cse555 (* 9 v_prenex_252))) (let ((.cse557 (div .cse555 10))) (let ((.cse556 (+ .cse557 1))) (and (= (mod .cse555 10) 0) (not (= (mod .cse556 5) 0)) (< .cse556 0) (< 300 v_prenex_252) (<= (+ c_~a28~0 225074) (div .cse557 5)) (= (mod .cse557 5) 0)))))) (exists ((v_prenex_251 Int)) (let ((.cse558 (* 9 v_prenex_251))) (and (= (mod .cse558 10) 0) (<= (+ v_prenex_251 84) 0) (<= (+ c_~a14~0 585378) (div .cse558 10)) (< 0 (+ v_prenex_251 114)))))) (and (exists ((v_prenex_186 Int)) (let ((.cse559 (* 9 v_prenex_186))) (let ((.cse560 (div .cse559 10))) (and (<= 0 .cse559) (<= 0 .cse560) (<= v_prenex_186 37) (<= (+ c_~a28~0 225074) (div .cse560 5)) (= (mod (+ .cse560 1) 5) 0))))) (exists ((v_prenex_185 Int)) (let ((.cse561 (* 9 v_prenex_185))) (and (<= (+ c_~a14~0 585378) (div .cse561 10)) (= (mod .cse561 10) 0) (< 0 (+ v_prenex_185 84)))))) (and (exists ((v_prenex_149 Int)) (let ((.cse562 (* 9 v_prenex_149))) (and (< 0 (+ v_prenex_149 84)) (<= (+ c_~a14~0 585378) (div .cse562 10)) (= (mod .cse562 10) 0)))) (exists ((v_prenex_150 Int)) (let ((.cse564 (* 9 v_prenex_150))) (let ((.cse565 (div .cse564 10))) (let ((.cse563 (+ .cse565 1))) (and (<= v_prenex_150 37) (<= (+ c_~a28~0 225074) (div .cse563 5)) (not (= (mod .cse564 10) 0)) (<= 0 .cse563) (= (mod .cse565 5) 0) (< .cse564 0))))))) (and (exists ((v_prenex_59 Int)) (let ((.cse567 (* 9 v_prenex_59))) (let ((.cse566 (div .cse567 10))) (and (<= 0 (+ .cse566 1)) (= (mod .cse567 10) 0) (<= (+ c_~a28~0 225074) (div .cse566 5)) (= (mod .cse566 5) 0) (<= v_prenex_59 37))))) (exists ((v_prenex_60 Int)) (let ((.cse568 (* 9 v_prenex_60))) (and (< 0 (+ v_prenex_60 84)) (= (mod .cse568 10) 0) (<= (+ c_~a14~0 585378) (div .cse568 10)))))) (and (exists ((v_prenex_96 Int)) (let ((.cse569 (* 9 v_prenex_96))) (and (< 0 (+ v_prenex_96 114)) (<= 0 .cse569) (<= (+ c_~a14~0 585378) (div .cse569 10)) (<= (+ v_prenex_96 84) 0)))) (exists ((v_prenex_95 Int)) (let ((.cse570 (* 9 v_prenex_95))) (let ((.cse571 (div .cse570 10))) (and (<= 0 .cse570) (<= 0 .cse571) (<= (+ c_~a28~0 225074) (div .cse571 5)) (< 300 v_prenex_95) (<= 0 (+ .cse571 1))))))) (and (exists ((v_prenex_12 Int)) (let ((.cse572 (* 9 v_prenex_12))) (and (< 0 (+ v_prenex_12 84)) (<= (+ c_~a14~0 585378) (div .cse572 10)) (<= 0 .cse572)))) (exists ((v_prenex_11 Int)) (let ((.cse575 (* 9 v_prenex_11))) (let ((.cse574 (div .cse575 10))) (let ((.cse573 (+ .cse574 1))) (and (not (= (mod .cse573 5) 0)) (< .cse574 0) (<= v_prenex_11 37) (< .cse573 0) (= (mod .cse575 10) 0) (<= (+ c_~a28~0 225073) (div .cse574 5)) (not (= (mod .cse574 5) 0))))))))) is different from true [2018-10-24 16:47:29,596 INFO L134 CoverageAnalysis]: Checked inductivity of 1023 backedges. 149 proven. 0 refuted. 0 times theorem prover too weak. 874 trivial. 0 not checked. [2018-10-24 16:47:29,618 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-10-24 16:47:29,618 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 11 [2018-10-24 16:47:29,619 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-24 16:47:29,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-24 16:47:29,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=61, Unknown=1, NotChecked=16, Total=110 [2018-10-24 16:47:29,620 INFO L87 Difference]: Start difference. First operand 72166 states and 76203 transitions. Second operand 11 states. [2018-10-24 16:47:45,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:47:45,266 INFO L93 Difference]: Finished difference Result 140220 states and 148124 transitions. [2018-10-24 16:47:45,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-24 16:47:45,267 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 604 [2018-10-24 16:47:45,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:47:45,334 INFO L225 Difference]: With dead ends: 140220 [2018-10-24 16:47:45,334 INFO L226 Difference]: Without dead ends: 75308 [2018-10-24 16:47:45,356 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 619 GetRequests, 606 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=56, Invalid=103, Unknown=1, NotChecked=22, Total=182 [2018-10-24 16:47:45,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75308 states. [2018-10-24 16:47:45,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75308 to 74750. [2018-10-24 16:47:45,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74750 states. [2018-10-24 16:47:46,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74750 states to 74750 states and 78786 transitions. [2018-10-24 16:47:46,023 INFO L78 Accepts]: Start accepts. Automaton has 74750 states and 78786 transitions. Word has length 604 [2018-10-24 16:47:46,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:47:46,024 INFO L481 AbstractCegarLoop]: Abstraction has 74750 states and 78786 transitions. [2018-10-24 16:47:46,024 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-24 16:47:46,024 INFO L276 IsEmpty]: Start isEmpty. Operand 74750 states and 78786 transitions. [2018-10-24 16:47:46,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 607 [2018-10-24 16:47:46,037 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:47:46,037 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:47:46,037 INFO L424 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:47:46,037 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:47:46,038 INFO L82 PathProgramCache]: Analyzing trace with hash 1318261800, now seen corresponding path program 1 times [2018-10-24 16:47:46,038 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:47:46,038 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:47:46,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:47:46,039 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:47:46,039 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:47:46,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:47:46,635 INFO L134 CoverageAnalysis]: Checked inductivity of 983 backedges. 440 proven. 0 refuted. 0 times theorem prover too weak. 543 trivial. 0 not checked. [2018-10-24 16:47:46,635 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-24 16:47:46,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-24 16:47:46,636 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-24 16:47:46,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-24 16:47:46,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-10-24 16:47:46,637 INFO L87 Difference]: Start difference. First operand 74750 states and 78786 transitions. Second operand 5 states. [2018-10-24 16:47:53,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-24 16:47:53,419 INFO L93 Difference]: Finished difference Result 173029 states and 182392 transitions. [2018-10-24 16:47:53,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-24 16:47:53,420 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 606 [2018-10-24 16:47:53,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-24 16:47:53,509 INFO L225 Difference]: With dead ends: 173029 [2018-10-24 16:47:53,509 INFO L226 Difference]: Without dead ends: 102946 [2018-10-24 16:47:53,548 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-10-24 16:47:53,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102946 states. [2018-10-24 16:47:54,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102946 to 100357. [2018-10-24 16:47:54,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100357 states. [2018-10-24 16:47:54,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100357 states to 100357 states and 105756 transitions. [2018-10-24 16:47:54,704 INFO L78 Accepts]: Start accepts. Automaton has 100357 states and 105756 transitions. Word has length 606 [2018-10-24 16:47:54,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-24 16:47:54,704 INFO L481 AbstractCegarLoop]: Abstraction has 100357 states and 105756 transitions. [2018-10-24 16:47:54,704 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-24 16:47:54,704 INFO L276 IsEmpty]: Start isEmpty. Operand 100357 states and 105756 transitions. [2018-10-24 16:47:54,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 767 [2018-10-24 16:47:54,726 INFO L367 BasicCegarLoop]: Found error trace [2018-10-24 16:47:54,727 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-24 16:47:54,727 INFO L424 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-24 16:47:54,727 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-24 16:47:54,727 INFO L82 PathProgramCache]: Analyzing trace with hash -591474775, now seen corresponding path program 1 times [2018-10-24 16:47:54,728 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-24 16:47:54,728 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-24 16:47:54,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:47:54,728 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:47:54,729 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-24 16:47:54,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:47:55,232 WARN L179 SmtUtils]: Spent 113.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-10-24 16:47:55,536 INFO L134 CoverageAnalysis]: Checked inductivity of 1012 backedges. 410 proven. 30 refuted. 0 times theorem prover too weak. 572 trivial. 0 not checked. [2018-10-24 16:47:55,536 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-24 16:47:55,536 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UTaipan-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-24 16:47:55,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-24 16:47:55,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-24 16:47:55,760 INFO L273 TraceCheckSpWp]: Computing forward predicates... Received shutdown request... [2018-10-24 16:48:12,387 WARN L187 SmtUtils]: Removed 2 from assertion stack [2018-10-24 16:48:12,387 INFO L177 TraceCheckSpWp]: Timeout while computing interpolants [2018-10-24 16:48:12,589 WARN L522 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-24 16:48:12,589 WARN L550 AbstractCegarLoop]: Verification canceled [2018-10-24 16:48:12,595 WARN L205 ceAbstractionStarter]: Timeout [2018-10-24 16:48:12,595 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.10 04:48:12 BoogieIcfgContainer [2018-10-24 16:48:12,595 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-24 16:48:12,597 INFO L168 Benchmark]: Toolchain (without parser) took 233008.04 ms. Allocated memory was 1.5 GB in the beginning and 3.9 GB in the end (delta: 2.4 GB). Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 95.7 MB). Peak memory consumption was 2.5 GB. Max. memory is 7.1 GB. [2018-10-24 16:48:12,598 INFO L168 Benchmark]: CDTParser took 0.26 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-24 16:48:12,598 INFO L168 Benchmark]: CACSL2BoogieTranslator took 1547.95 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 137.4 MB). Peak memory consumption was 137.4 MB. Max. memory is 7.1 GB. [2018-10-24 16:48:12,599 INFO L168 Benchmark]: Boogie Procedure Inliner took 548.06 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 766.5 MB). Free memory was 1.3 GB in the beginning and 2.1 GB in the end (delta: -869.2 MB). Peak memory consumption was 56.0 MB. Max. memory is 7.1 GB. [2018-10-24 16:48:12,600 INFO L168 Benchmark]: Boogie Preprocessor took 295.61 ms. Allocated memory is still 2.3 GB. Free memory was 2.1 GB in the beginning and 2.1 GB in the end (delta: 29.3 MB). Peak memory consumption was 29.3 MB. Max. memory is 7.1 GB. [2018-10-24 16:48:12,601 INFO L168 Benchmark]: RCFGBuilder took 11130.35 ms. Allocated memory is still 2.3 GB. Free memory was 2.1 GB in the beginning and 1.7 GB in the end (delta: 457.9 MB). Peak memory consumption was 457.9 MB. Max. memory is 7.1 GB. [2018-10-24 16:48:12,601 INFO L168 Benchmark]: TraceAbstraction took 219480.47 ms. Allocated memory was 2.3 GB in the beginning and 3.9 GB in the end (delta: 1.6 GB). Free memory was 1.7 GB in the beginning and 1.3 GB in the end (delta: 340.3 MB). Peak memory consumption was 2.0 GB. Max. memory is 7.1 GB. [2018-10-24 16:48:12,607 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 1547.95 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 137.4 MB). Peak memory consumption was 137.4 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 548.06 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 766.5 MB). Free memory was 1.3 GB in the beginning and 2.1 GB in the end (delta: -869.2 MB). Peak memory consumption was 56.0 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 295.61 ms. Allocated memory is still 2.3 GB. Free memory was 2.1 GB in the beginning and 2.1 GB in the end (delta: 29.3 MB). Peak memory consumption was 29.3 MB. Max. memory is 7.1 GB. * RCFGBuilder took 11130.35 ms. Allocated memory is still 2.3 GB. Free memory was 2.1 GB in the beginning and 1.7 GB in the end (delta: 457.9 MB). Peak memory consumption was 457.9 MB. Max. memory is 7.1 GB. * TraceAbstraction took 219480.47 ms. Allocated memory was 2.3 GB in the beginning and 3.9 GB in the end (delta: 1.6 GB). Free memory was 1.7 GB in the beginning and 1.3 GB in the end (delta: 340.3 MB). Peak memory consumption was 2.0 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 101]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 101). Cancelled while BasicCegarLoop was analyzing trace of length 767 with TraceHistMax 6,while TraceCheckSpWp was constructing forward predicates,while PredicateUnifier was unifying predicates,while SimplifyDDAWithTimeout was simplifying term of DAG size 224. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 591 locations, 1 error locations. TIMEOUT Result, 219.3s OverallTime, 15 OverallIterations, 6 TraceHistogramMax, 133.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5752 SDtfs, 19652 SDslu, 2975 SDs, 0 SdLazy, 52454 SolverSat, 7492 SolverUnsat, 3 SolverUnknown, 0 SolverNotchecked, 114.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1411 GetRequests, 1357 SyntacticMatches, 3 SemanticMatches, 51 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 7.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=100357occurred in iteration=14, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 7.2s AutomataMinimizationTime, 14 MinimizatonAttempts, 50655 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 1.0s SatisfiabilityAnalysisTime, 56.6s InterpolantComputationTime, 6444 NumberOfCodeBlocks, 6444 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 6427 ConstructedInterpolants, 136 QuantifiedInterpolants, 236656711 SizeOfPredicates, 2 NumberOfNonLiveVariables, 1730 ConjunctsInSsa, 14 ConjunctsInUnsatCore, 17 InterpolantComputations, 12 PerfectInterpolantSequences, 7506/8255 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Completed graceful shutdown