java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/eca-rers2012/Problem15_label52_true-unreach-call.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-df4b876 [2018-11-06 21:33:42,400 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-06 21:33:42,402 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-06 21:33:42,414 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-06 21:33:42,414 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-06 21:33:42,415 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-06 21:33:42,417 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-06 21:33:42,418 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-06 21:33:42,420 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-06 21:33:42,421 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-06 21:33:42,422 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-06 21:33:42,422 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-06 21:33:42,423 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-06 21:33:42,424 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-06 21:33:42,425 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-06 21:33:42,426 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-06 21:33:42,427 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-06 21:33:42,429 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-06 21:33:42,431 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-06 21:33:42,433 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-06 21:33:42,434 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-06 21:33:42,435 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-06 21:33:42,437 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-06 21:33:42,438 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-06 21:33:42,438 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-06 21:33:42,439 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-06 21:33:42,440 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-06 21:33:42,441 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-06 21:33:42,441 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-06 21:33:42,443 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-06 21:33:42,443 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-06 21:33:42,444 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-11-06 21:33:42,446 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-64bit-Automizer_Default.epf [2018-11-06 21:33:42,474 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-06 21:33:42,475 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-06 21:33:42,476 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-06 21:33:42,476 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-06 21:33:42,476 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-06 21:33:42,477 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-06 21:33:42,477 INFO L133 SettingsManager]: * Use SBE=true [2018-11-06 21:33:42,477 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-06 21:33:42,477 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-06 21:33:42,477 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-06 21:33:42,478 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-06 21:33:42,478 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-06 21:33:42,478 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-06 21:33:42,478 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-06 21:33:42,478 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-06 21:33:42,479 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-06 21:33:42,479 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-06 21:33:42,479 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-06 21:33:42,479 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-06 21:33:42,479 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-06 21:33:42,480 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-06 21:33:42,480 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-06 21:33:42,480 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-06 21:33:42,480 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-06 21:33:42,480 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-06 21:33:42,481 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-06 21:33:42,481 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-06 21:33:42,481 INFO L133 SettingsManager]: * To the following directory=dump/ [2018-11-06 21:33:42,531 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-06 21:33:42,549 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-06 21:33:42,554 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-06 21:33:42,555 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-06 21:33:42,556 INFO L276 PluginConnector]: CDTParser initialized [2018-11-06 21:33:42,556 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/eca-rers2012/Problem15_label52_true-unreach-call.c [2018-11-06 21:33:42,615 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a2c108e7a/90a14cfa0dbe468aba95d44ccbf891c9/FLAG4001ce79c [2018-11-06 21:33:43,260 INFO L298 CDTParser]: Found 1 translation units. [2018-11-06 21:33:43,261 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/eca-rers2012/Problem15_label52_true-unreach-call.c [2018-11-06 21:33:43,279 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a2c108e7a/90a14cfa0dbe468aba95d44ccbf891c9/FLAG4001ce79c [2018-11-06 21:33:43,294 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a2c108e7a/90a14cfa0dbe468aba95d44ccbf891c9 [2018-11-06 21:33:43,304 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-06 21:33:43,306 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-06 21:33:43,307 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-06 21:33:43,307 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-06 21:33:43,311 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-06 21:33:43,312 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.11 09:33:43" (1/1) ... [2018-11-06 21:33:43,315 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d100604 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:43, skipping insertion in model container [2018-11-06 21:33:43,315 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.11 09:33:43" (1/1) ... [2018-11-06 21:33:43,325 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-06 21:33:43,421 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-11-06 21:33:44,273 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-06 21:33:44,277 INFO L189 MainTranslator]: Completed pre-run [2018-11-06 21:33:44,554 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-11-06 21:33:44,578 INFO L193 MainTranslator]: Completed translation [2018-11-06 21:33:44,579 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44 WrapperNode [2018-11-06 21:33:44,579 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-06 21:33:44,580 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-06 21:33:44,581 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-06 21:33:44,581 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-06 21:33:44,593 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (1/1) ... [2018-11-06 21:33:44,781 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (1/1) ... [2018-11-06 21:33:44,990 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-06 21:33:44,990 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-06 21:33:44,991 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-06 21:33:44,991 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-06 21:33:45,003 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (1/1) ... [2018-11-06 21:33:45,003 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (1/1) ... [2018-11-06 21:33:45,024 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (1/1) ... [2018-11-06 21:33:45,025 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (1/1) ... [2018-11-06 21:33:45,128 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (1/1) ... [2018-11-06 21:33:45,161 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (1/1) ... [2018-11-06 21:33:45,204 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (1/1) ... [2018-11-06 21:33:45,244 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-06 21:33:45,245 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-06 21:33:45,245 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-06 21:33:45,245 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-06 21:33:45,246 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-06 21:33:45,312 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-11-06 21:33:45,313 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-06 21:33:45,313 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-06 21:33:51,437 INFO L276 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-06 21:33:51,438 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.11 09:33:51 BoogieIcfgContainer [2018-11-06 21:33:51,438 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-06 21:33:51,440 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-06 21:33:51,440 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-06 21:33:51,443 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-06 21:33:51,444 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.11 09:33:43" (1/3) ... [2018-11-06 21:33:51,444 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b5a5200 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.11 09:33:51, skipping insertion in model container [2018-11-06 21:33:51,445 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.11 09:33:44" (2/3) ... [2018-11-06 21:33:51,445 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b5a5200 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.11 09:33:51, skipping insertion in model container [2018-11-06 21:33:51,445 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.11 09:33:51" (3/3) ... [2018-11-06 21:33:51,447 INFO L112 eAbstractionObserver]: Analyzing ICFG Problem15_label52_true-unreach-call.c [2018-11-06 21:33:51,457 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-06 21:33:51,466 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-06 21:33:51,484 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-06 21:33:51,520 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-11-06 21:33:51,521 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-06 21:33:51,521 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-06 21:33:51,521 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-06 21:33:51,521 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-06 21:33:51,522 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-06 21:33:51,522 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-06 21:33:51,522 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-06 21:33:51,522 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-06 21:33:51,559 INFO L276 IsEmpty]: Start isEmpty. Operand 425 states. [2018-11-06 21:33:51,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-06 21:33:51,571 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:33:51,573 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:33:51,575 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:33:51,580 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:33:51,581 INFO L82 PathProgramCache]: Analyzing trace with hash 935177138, now seen corresponding path program 1 times [2018-11-06 21:33:51,583 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:33:51,583 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:33:51,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:33:51,640 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:33:51,640 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:33:51,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:33:52,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-06 21:33:52,035 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:33:52,035 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-06 21:33:52,041 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-06 21:33:52,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-06 21:33:52,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-06 21:33:52,062 INFO L87 Difference]: Start difference. First operand 425 states. Second operand 4 states. [2018-11-06 21:33:57,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:33:57,659 INFO L93 Difference]: Finished difference Result 1470 states and 2718 transitions. [2018-11-06 21:33:57,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-06 21:33:57,660 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 40 [2018-11-06 21:33:57,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:33:57,688 INFO L225 Difference]: With dead ends: 1470 [2018-11-06 21:33:57,688 INFO L226 Difference]: Without dead ends: 1038 [2018-11-06 21:33:57,694 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-06 21:33:57,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1038 states. [2018-11-06 21:33:57,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1038 to 1036. [2018-11-06 21:33:57,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1036 states. [2018-11-06 21:33:57,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1036 states to 1036 states and 1670 transitions. [2018-11-06 21:33:57,800 INFO L78 Accepts]: Start accepts. Automaton has 1036 states and 1670 transitions. Word has length 40 [2018-11-06 21:33:57,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:33:57,800 INFO L480 AbstractCegarLoop]: Abstraction has 1036 states and 1670 transitions. [2018-11-06 21:33:57,800 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-06 21:33:57,801 INFO L276 IsEmpty]: Start isEmpty. Operand 1036 states and 1670 transitions. [2018-11-06 21:33:57,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2018-11-06 21:33:57,808 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:33:57,809 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:33:57,809 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:33:57,809 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:33:57,810 INFO L82 PathProgramCache]: Analyzing trace with hash -1935840339, now seen corresponding path program 1 times [2018-11-06 21:33:57,810 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:33:57,810 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:33:57,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:33:57,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:33:57,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:33:57,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:33:58,174 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-06 21:33:58,175 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:33:58,175 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-06 21:33:58,177 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-06 21:33:58,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-06 21:33:58,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-06 21:33:58,178 INFO L87 Difference]: Start difference. First operand 1036 states and 1670 transitions. Second operand 4 states. [2018-11-06 21:34:04,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:34:04,443 INFO L93 Difference]: Finished difference Result 3937 states and 6425 transitions. [2018-11-06 21:34:04,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-06 21:34:04,444 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 153 [2018-11-06 21:34:04,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:34:04,461 INFO L225 Difference]: With dead ends: 3937 [2018-11-06 21:34:04,461 INFO L226 Difference]: Without dead ends: 2903 [2018-11-06 21:34:04,467 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-06 21:34:04,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2903 states. [2018-11-06 21:34:04,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2903 to 1937. [2018-11-06 21:34:04,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1937 states. [2018-11-06 21:34:04,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1937 states to 1937 states and 2808 transitions. [2018-11-06 21:34:04,532 INFO L78 Accepts]: Start accepts. Automaton has 1937 states and 2808 transitions. Word has length 153 [2018-11-06 21:34:04,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:34:04,533 INFO L480 AbstractCegarLoop]: Abstraction has 1937 states and 2808 transitions. [2018-11-06 21:34:04,533 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-06 21:34:04,533 INFO L276 IsEmpty]: Start isEmpty. Operand 1937 states and 2808 transitions. [2018-11-06 21:34:04,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 315 [2018-11-06 21:34:04,551 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:34:04,556 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:34:04,556 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:34:04,556 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:34:04,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1861564259, now seen corresponding path program 1 times [2018-11-06 21:34:04,557 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:34:04,557 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:34:04,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:04,558 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:34:04,559 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:04,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:34:05,428 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 113 proven. 0 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-11-06 21:34:05,428 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:34:05,428 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-06 21:34:05,429 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-06 21:34:05,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-06 21:34:05,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-06 21:34:05,430 INFO L87 Difference]: Start difference. First operand 1937 states and 2808 transitions. Second operand 5 states. [2018-11-06 21:34:12,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:34:12,175 INFO L93 Difference]: Finished difference Result 4777 states and 6638 transitions. [2018-11-06 21:34:12,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-06 21:34:12,176 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 314 [2018-11-06 21:34:12,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:34:12,194 INFO L225 Difference]: With dead ends: 4777 [2018-11-06 21:34:12,194 INFO L226 Difference]: Without dead ends: 2842 [2018-11-06 21:34:12,198 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-06 21:34:12,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2842 states. [2018-11-06 21:34:12,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2842 to 2841. [2018-11-06 21:34:12,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2841 states. [2018-11-06 21:34:12,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2841 states to 2841 states and 3775 transitions. [2018-11-06 21:34:12,255 INFO L78 Accepts]: Start accepts. Automaton has 2841 states and 3775 transitions. Word has length 314 [2018-11-06 21:34:12,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:34:12,257 INFO L480 AbstractCegarLoop]: Abstraction has 2841 states and 3775 transitions. [2018-11-06 21:34:12,257 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-06 21:34:12,257 INFO L276 IsEmpty]: Start isEmpty. Operand 2841 states and 3775 transitions. [2018-11-06 21:34:12,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 389 [2018-11-06 21:34:12,266 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:34:12,266 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:34:12,267 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:34:12,267 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:34:12,267 INFO L82 PathProgramCache]: Analyzing trace with hash 636620843, now seen corresponding path program 1 times [2018-11-06 21:34:12,267 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:34:12,267 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:34:12,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:12,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:34:12,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:12,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:34:12,959 WARN L179 SmtUtils]: Spent 130.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2018-11-06 21:34:13,176 WARN L179 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 21 [2018-11-06 21:34:13,699 WARN L179 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 13 [2018-11-06 21:34:14,486 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 79 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-06 21:34:14,487 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-06 21:34:14,487 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-06 21:34:14,496 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:34:14,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:34:14,634 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-06 21:34:14,803 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 151 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-06 21:34:14,824 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-06 21:34:14,824 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [10] total 12 [2018-11-06 21:34:14,826 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-06 21:34:14,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-06 21:34:14,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=83, Unknown=0, NotChecked=0, Total=132 [2018-11-06 21:34:14,827 INFO L87 Difference]: Start difference. First operand 2841 states and 3775 transitions. Second operand 12 states. [2018-11-06 21:34:31,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:34:31,759 INFO L93 Difference]: Finished difference Result 9555 states and 12449 transitions. [2018-11-06 21:34:31,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-06 21:34:31,760 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 388 [2018-11-06 21:34:31,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:34:31,794 INFO L225 Difference]: With dead ends: 9555 [2018-11-06 21:34:31,795 INFO L226 Difference]: Without dead ends: 6716 [2018-11-06 21:34:31,801 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 412 GetRequests, 392 SyntacticMatches, 5 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=100, Invalid=172, Unknown=0, NotChecked=0, Total=272 [2018-11-06 21:34:31,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6716 states. [2018-11-06 21:34:31,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6716 to 5199. [2018-11-06 21:34:31,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5199 states. [2018-11-06 21:34:31,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5199 states to 5199 states and 6574 transitions. [2018-11-06 21:34:31,991 INFO L78 Accepts]: Start accepts. Automaton has 5199 states and 6574 transitions. Word has length 388 [2018-11-06 21:34:31,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:34:31,992 INFO L480 AbstractCegarLoop]: Abstraction has 5199 states and 6574 transitions. [2018-11-06 21:34:31,992 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-06 21:34:31,992 INFO L276 IsEmpty]: Start isEmpty. Operand 5199 states and 6574 transitions. [2018-11-06 21:34:32,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 407 [2018-11-06 21:34:32,002 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:34:32,002 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:34:32,003 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:34:32,003 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:34:32,003 INFO L82 PathProgramCache]: Analyzing trace with hash -816750615, now seen corresponding path program 1 times [2018-11-06 21:34:32,003 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:34:32,004 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:34:32,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:32,005 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:34:32,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:32,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:34:32,801 WARN L179 SmtUtils]: Spent 265.00 ms on a formula simplification. DAG size of input: 19 DAG size of output: 13 [2018-11-06 21:34:33,124 WARN L179 SmtUtils]: Spent 260.00 ms on a formula simplification. DAG size of input: 19 DAG size of output: 13 [2018-11-06 21:34:33,575 WARN L179 SmtUtils]: Spent 371.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 14 [2018-11-06 21:34:34,205 INFO L134 CoverageAnalysis]: Checked inductivity of 357 backedges. 315 proven. 4 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-11-06 21:34:34,206 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-06 21:34:34,206 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-06 21:34:34,216 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:34:34,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:34:34,317 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-06 21:34:34,448 INFO L134 CoverageAnalysis]: Checked inductivity of 357 backedges. 266 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-11-06 21:34:34,469 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-06 21:34:34,469 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 8 [2018-11-06 21:34:34,470 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-06 21:34:34,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-06 21:34:34,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=32, Unknown=0, NotChecked=0, Total=56 [2018-11-06 21:34:34,470 INFO L87 Difference]: Start difference. First operand 5199 states and 6574 transitions. Second operand 8 states. [2018-11-06 21:34:41,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:34:41,889 INFO L93 Difference]: Finished difference Result 14466 states and 17816 transitions. [2018-11-06 21:34:41,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-06 21:34:41,889 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 406 [2018-11-06 21:34:41,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:34:41,913 INFO L225 Difference]: With dead ends: 14466 [2018-11-06 21:34:41,913 INFO L226 Difference]: Without dead ends: 6095 [2018-11-06 21:34:41,924 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 420 GetRequests, 409 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=56, Invalid=76, Unknown=0, NotChecked=0, Total=132 [2018-11-06 21:34:41,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6095 states. [2018-11-06 21:34:42,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6095 to 5755. [2018-11-06 21:34:42,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5755 states. [2018-11-06 21:34:42,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5755 states to 5755 states and 6941 transitions. [2018-11-06 21:34:42,025 INFO L78 Accepts]: Start accepts. Automaton has 5755 states and 6941 transitions. Word has length 406 [2018-11-06 21:34:42,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:34:42,026 INFO L480 AbstractCegarLoop]: Abstraction has 5755 states and 6941 transitions. [2018-11-06 21:34:42,026 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-06 21:34:42,026 INFO L276 IsEmpty]: Start isEmpty. Operand 5755 states and 6941 transitions. [2018-11-06 21:34:42,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 518 [2018-11-06 21:34:42,038 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:34:42,039 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:34:42,039 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:34:42,039 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:34:42,040 INFO L82 PathProgramCache]: Analyzing trace with hash 1496499592, now seen corresponding path program 1 times [2018-11-06 21:34:42,040 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:34:42,040 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:34:42,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:42,041 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:34:42,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:42,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:34:42,617 INFO L134 CoverageAnalysis]: Checked inductivity of 415 backedges. 113 proven. 0 refuted. 0 times theorem prover too weak. 302 trivial. 0 not checked. [2018-11-06 21:34:42,618 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:34:42,618 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-06 21:34:42,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-06 21:34:42,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-06 21:34:42,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-06 21:34:42,619 INFO L87 Difference]: Start difference. First operand 5755 states and 6941 transitions. Second operand 3 states. [2018-11-06 21:34:45,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:34:45,335 INFO L93 Difference]: Finished difference Result 15627 states and 19091 transitions. [2018-11-06 21:34:45,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-06 21:34:45,336 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 517 [2018-11-06 21:34:45,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:34:45,375 INFO L225 Difference]: With dead ends: 15627 [2018-11-06 21:34:45,375 INFO L226 Difference]: Without dead ends: 9874 [2018-11-06 21:34:45,381 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-06 21:34:45,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9874 states. [2018-11-06 21:34:45,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9874 to 9423. [2018-11-06 21:34:45,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9423 states. [2018-11-06 21:34:45,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9423 states to 9423 states and 10994 transitions. [2018-11-06 21:34:45,520 INFO L78 Accepts]: Start accepts. Automaton has 9423 states and 10994 transitions. Word has length 517 [2018-11-06 21:34:45,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:34:45,521 INFO L480 AbstractCegarLoop]: Abstraction has 9423 states and 10994 transitions. [2018-11-06 21:34:45,521 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-06 21:34:45,522 INFO L276 IsEmpty]: Start isEmpty. Operand 9423 states and 10994 transitions. [2018-11-06 21:34:45,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 541 [2018-11-06 21:34:45,542 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:34:45,543 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:34:45,543 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:34:45,543 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:34:45,543 INFO L82 PathProgramCache]: Analyzing trace with hash -755033643, now seen corresponding path program 1 times [2018-11-06 21:34:45,544 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:34:45,544 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:34:45,544 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:45,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:34:45,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:45,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:34:46,178 WARN L179 SmtUtils]: Spent 141.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2018-11-06 21:34:46,559 WARN L179 SmtUtils]: Spent 332.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 21 [2018-11-06 21:34:47,033 INFO L134 CoverageAnalysis]: Checked inductivity of 446 backedges. 271 proven. 136 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2018-11-06 21:34:47,034 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-06 21:34:47,034 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-06 21:34:47,043 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:34:47,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:34:47,175 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-06 21:34:47,480 INFO L134 CoverageAnalysis]: Checked inductivity of 446 backedges. 339 proven. 0 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2018-11-06 21:34:47,500 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-06 21:34:47,500 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8] total 9 [2018-11-06 21:34:47,501 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-06 21:34:47,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-06 21:34:47,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-06 21:34:47,502 INFO L87 Difference]: Start difference. First operand 9423 states and 10994 transitions. Second operand 9 states. [2018-11-06 21:34:54,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:34:54,032 INFO L93 Difference]: Finished difference Result 19251 states and 22398 transitions. [2018-11-06 21:34:54,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-06 21:34:54,032 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 540 [2018-11-06 21:34:54,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:34:54,057 INFO L225 Difference]: With dead ends: 19251 [2018-11-06 21:34:54,057 INFO L226 Difference]: Without dead ends: 9830 [2018-11-06 21:34:54,069 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 559 GetRequests, 544 SyntacticMatches, 5 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2018-11-06 21:34:54,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9830 states. [2018-11-06 21:34:54,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9830 to 9420. [2018-11-06 21:34:54,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9420 states. [2018-11-06 21:34:54,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9420 states to 9420 states and 10491 transitions. [2018-11-06 21:34:54,211 INFO L78 Accepts]: Start accepts. Automaton has 9420 states and 10491 transitions. Word has length 540 [2018-11-06 21:34:54,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:34:54,212 INFO L480 AbstractCegarLoop]: Abstraction has 9420 states and 10491 transitions. [2018-11-06 21:34:54,212 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-06 21:34:54,212 INFO L276 IsEmpty]: Start isEmpty. Operand 9420 states and 10491 transitions. [2018-11-06 21:34:54,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 571 [2018-11-06 21:34:54,231 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:34:54,232 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:34:54,232 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:34:54,232 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:34:54,232 INFO L82 PathProgramCache]: Analyzing trace with hash 638222884, now seen corresponding path program 1 times [2018-11-06 21:34:54,232 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:34:54,233 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:34:54,233 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:54,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:34:54,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:54,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:34:54,834 INFO L134 CoverageAnalysis]: Checked inductivity of 478 backedges. 371 proven. 0 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2018-11-06 21:34:54,835 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:34:54,835 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-06 21:34:54,835 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-06 21:34:54,836 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-06 21:34:54,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-06 21:34:54,836 INFO L87 Difference]: Start difference. First operand 9420 states and 10491 transitions. Second operand 3 states. [2018-11-06 21:34:57,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:34:57,485 INFO L93 Difference]: Finished difference Result 24429 states and 27345 transitions. [2018-11-06 21:34:57,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-06 21:34:57,486 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 570 [2018-11-06 21:34:57,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:34:57,517 INFO L225 Difference]: With dead ends: 24429 [2018-11-06 21:34:57,517 INFO L226 Difference]: Without dead ends: 15011 [2018-11-06 21:34:57,529 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-06 21:34:57,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15011 states. [2018-11-06 21:34:57,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15011 to 15011. [2018-11-06 21:34:57,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15011 states. [2018-11-06 21:34:57,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15011 states to 15011 states and 16626 transitions. [2018-11-06 21:34:57,929 INFO L78 Accepts]: Start accepts. Automaton has 15011 states and 16626 transitions. Word has length 570 [2018-11-06 21:34:57,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:34:57,930 INFO L480 AbstractCegarLoop]: Abstraction has 15011 states and 16626 transitions. [2018-11-06 21:34:57,930 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-06 21:34:57,930 INFO L276 IsEmpty]: Start isEmpty. Operand 15011 states and 16626 transitions. [2018-11-06 21:34:57,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 579 [2018-11-06 21:34:57,942 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:34:57,943 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:34:57,943 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:34:57,944 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:34:57,944 INFO L82 PathProgramCache]: Analyzing trace with hash 469499223, now seen corresponding path program 1 times [2018-11-06 21:34:57,944 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:34:57,944 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:34:57,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:57,946 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:34:57,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:34:58,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:34:59,101 INFO L134 CoverageAnalysis]: Checked inductivity of 455 backedges. 113 proven. 0 refuted. 0 times theorem prover too weak. 342 trivial. 0 not checked. [2018-11-06 21:34:59,101 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:34:59,102 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-06 21:34:59,102 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-06 21:34:59,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-06 21:34:59,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-06 21:34:59,103 INFO L87 Difference]: Start difference. First operand 15011 states and 16626 transitions. Second operand 5 states. [2018-11-06 21:35:03,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:35:03,931 INFO L93 Difference]: Finished difference Result 44098 states and 49253 transitions. [2018-11-06 21:35:03,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-06 21:35:03,932 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 578 [2018-11-06 21:35:03,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:35:03,977 INFO L225 Difference]: With dead ends: 44098 [2018-11-06 21:35:03,977 INFO L226 Difference]: Without dead ends: 29089 [2018-11-06 21:35:03,996 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-06 21:35:04,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29089 states. [2018-11-06 21:35:04,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29089 to 23619. [2018-11-06 21:35:04,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23619 states. [2018-11-06 21:35:04,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23619 states to 23619 states and 25731 transitions. [2018-11-06 21:35:04,348 INFO L78 Accepts]: Start accepts. Automaton has 23619 states and 25731 transitions. Word has length 578 [2018-11-06 21:35:04,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:35:04,350 INFO L480 AbstractCegarLoop]: Abstraction has 23619 states and 25731 transitions. [2018-11-06 21:35:04,350 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-06 21:35:04,350 INFO L276 IsEmpty]: Start isEmpty. Operand 23619 states and 25731 transitions. [2018-11-06 21:35:04,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 582 [2018-11-06 21:35:04,364 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:35:04,365 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:35:04,365 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:35:04,365 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:35:04,365 INFO L82 PathProgramCache]: Analyzing trace with hash 484713971, now seen corresponding path program 1 times [2018-11-06 21:35:04,366 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:35:04,366 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:35:04,366 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:04,367 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:04,367 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:04,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:05,100 INFO L134 CoverageAnalysis]: Checked inductivity of 489 backedges. 113 proven. 0 refuted. 0 times theorem prover too weak. 376 trivial. 0 not checked. [2018-11-06 21:35:05,100 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:35:05,100 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-06 21:35:05,101 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-06 21:35:05,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-06 21:35:05,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-06 21:35:05,102 INFO L87 Difference]: Start difference. First operand 23619 states and 25731 transitions. Second operand 3 states. [2018-11-06 21:35:06,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:35:06,890 INFO L93 Difference]: Finished difference Result 50259 states and 54388 transitions. [2018-11-06 21:35:06,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-06 21:35:06,891 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 581 [2018-11-06 21:35:06,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:35:06,914 INFO L225 Difference]: With dead ends: 50259 [2018-11-06 21:35:06,914 INFO L226 Difference]: Without dead ends: 15204 [2018-11-06 21:35:06,934 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-06 21:35:06,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15204 states. [2018-11-06 21:35:07,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15204 to 10178. [2018-11-06 21:35:07,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10178 states. [2018-11-06 21:35:07,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10178 states to 10178 states and 10606 transitions. [2018-11-06 21:35:07,074 INFO L78 Accepts]: Start accepts. Automaton has 10178 states and 10606 transitions. Word has length 581 [2018-11-06 21:35:07,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:35:07,075 INFO L480 AbstractCegarLoop]: Abstraction has 10178 states and 10606 transitions. [2018-11-06 21:35:07,075 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-06 21:35:07,076 INFO L276 IsEmpty]: Start isEmpty. Operand 10178 states and 10606 transitions. [2018-11-06 21:35:07,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 730 [2018-11-06 21:35:07,087 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:35:07,088 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:35:07,088 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:35:07,088 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:35:07,089 INFO L82 PathProgramCache]: Analyzing trace with hash 1311033631, now seen corresponding path program 1 times [2018-11-06 21:35:07,089 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:35:07,089 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:35:07,090 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:07,090 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:07,090 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:07,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:07,751 WARN L179 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 7 [2018-11-06 21:35:08,097 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 529 proven. 0 refuted. 0 times theorem prover too weak. 342 trivial. 0 not checked. [2018-11-06 21:35:08,098 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:35:08,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-06 21:35:08,098 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-06 21:35:08,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-06 21:35:08,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-06 21:35:08,099 INFO L87 Difference]: Start difference. First operand 10178 states and 10606 transitions. Second operand 6 states. [2018-11-06 21:35:11,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:35:11,418 INFO L93 Difference]: Finished difference Result 21998 states and 22907 transitions. [2018-11-06 21:35:11,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-06 21:35:11,419 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 729 [2018-11-06 21:35:11,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:35:11,433 INFO L225 Difference]: With dead ends: 21998 [2018-11-06 21:35:11,433 INFO L226 Difference]: Without dead ends: 12122 [2018-11-06 21:35:11,439 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-06 21:35:11,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12122 states. [2018-11-06 21:35:11,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12122 to 10362. [2018-11-06 21:35:11,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10362 states. [2018-11-06 21:35:11,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10362 states to 10362 states and 10705 transitions. [2018-11-06 21:35:11,574 INFO L78 Accepts]: Start accepts. Automaton has 10362 states and 10705 transitions. Word has length 729 [2018-11-06 21:35:11,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:35:11,575 INFO L480 AbstractCegarLoop]: Abstraction has 10362 states and 10705 transitions. [2018-11-06 21:35:11,575 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-06 21:35:11,576 INFO L276 IsEmpty]: Start isEmpty. Operand 10362 states and 10705 transitions. [2018-11-06 21:35:11,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 736 [2018-11-06 21:35:11,588 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:35:11,589 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:35:11,589 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:35:11,589 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:35:11,590 INFO L82 PathProgramCache]: Analyzing trace with hash 1761273195, now seen corresponding path program 1 times [2018-11-06 21:35:11,590 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:35:11,590 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:35:11,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:11,591 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:11,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:11,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:13,051 INFO L134 CoverageAnalysis]: Checked inductivity of 883 backedges. 38 proven. 495 refuted. 0 times theorem prover too weak. 350 trivial. 0 not checked. [2018-11-06 21:35:13,051 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-06 21:35:13,051 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-06 21:35:13,060 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:13,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:13,237 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-06 21:35:13,613 WARN L179 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 16 [2018-11-06 21:35:14,063 WARN L179 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 23 [2018-11-06 21:35:15,766 INFO L134 CoverageAnalysis]: Checked inductivity of 883 backedges. 38 proven. 495 refuted. 0 times theorem prover too weak. 350 trivial. 0 not checked. [2018-11-06 21:35:15,787 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-06 21:35:15,787 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4] total 8 [2018-11-06 21:35:15,788 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-06 21:35:15,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-06 21:35:15,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2018-11-06 21:35:15,789 INFO L87 Difference]: Start difference. First operand 10362 states and 10705 transitions. Second operand 9 states. [2018-11-06 21:35:34,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:35:34,609 INFO L93 Difference]: Finished difference Result 33063 states and 34277 transitions. [2018-11-06 21:35:34,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-06 21:35:34,610 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 735 [2018-11-06 21:35:34,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:35:34,637 INFO L225 Difference]: With dead ends: 33063 [2018-11-06 21:35:34,637 INFO L226 Difference]: Without dead ends: 23003 [2018-11-06 21:35:34,648 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 742 GetRequests, 732 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=50, Invalid=82, Unknown=0, NotChecked=0, Total=132 [2018-11-06 21:35:34,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23003 states. [2018-11-06 21:35:35,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23003 to 14273. [2018-11-06 21:35:35,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14273 states. [2018-11-06 21:35:35,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14273 states to 14273 states and 14784 transitions. [2018-11-06 21:35:35,065 INFO L78 Accepts]: Start accepts. Automaton has 14273 states and 14784 transitions. Word has length 735 [2018-11-06 21:35:35,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:35:35,066 INFO L480 AbstractCegarLoop]: Abstraction has 14273 states and 14784 transitions. [2018-11-06 21:35:35,066 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-06 21:35:35,067 INFO L276 IsEmpty]: Start isEmpty. Operand 14273 states and 14784 transitions. [2018-11-06 21:35:35,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 825 [2018-11-06 21:35:35,089 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:35:35,090 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:35:35,090 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:35:35,090 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:35:35,091 INFO L82 PathProgramCache]: Analyzing trace with hash -1613505904, now seen corresponding path program 1 times [2018-11-06 21:35:35,091 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:35:35,091 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:35:35,092 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:35,092 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:35,092 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:35,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:36,098 INFO L134 CoverageAnalysis]: Checked inductivity of 1026 backedges. 560 proven. 0 refuted. 0 times theorem prover too weak. 466 trivial. 0 not checked. [2018-11-06 21:35:36,098 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:35:36,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-06 21:35:36,099 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-06 21:35:36,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-06 21:35:36,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-06 21:35:36,100 INFO L87 Difference]: Start difference. First operand 14273 states and 14784 transitions. Second operand 4 states. [2018-11-06 21:35:38,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:35:38,008 INFO L93 Difference]: Finished difference Result 28023 states and 29041 transitions. [2018-11-06 21:35:38,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-06 21:35:38,008 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 824 [2018-11-06 21:35:38,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:35:38,022 INFO L225 Difference]: With dead ends: 28023 [2018-11-06 21:35:38,022 INFO L226 Difference]: Without dead ends: 14052 [2018-11-06 21:35:38,031 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-06 21:35:38,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14052 states. [2018-11-06 21:35:38,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14052 to 13882. [2018-11-06 21:35:38,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13882 states. [2018-11-06 21:35:38,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13882 states to 13882 states and 14305 transitions. [2018-11-06 21:35:38,200 INFO L78 Accepts]: Start accepts. Automaton has 13882 states and 14305 transitions. Word has length 824 [2018-11-06 21:35:38,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:35:38,201 INFO L480 AbstractCegarLoop]: Abstraction has 13882 states and 14305 transitions. [2018-11-06 21:35:38,201 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-06 21:35:38,201 INFO L276 IsEmpty]: Start isEmpty. Operand 13882 states and 14305 transitions. [2018-11-06 21:35:38,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1029 [2018-11-06 21:35:38,226 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:35:38,227 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:35:38,227 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:35:38,227 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:35:38,228 INFO L82 PathProgramCache]: Analyzing trace with hash -1368484188, now seen corresponding path program 1 times [2018-11-06 21:35:38,228 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:35:38,228 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:35:38,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:38,229 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:38,229 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:38,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:38,832 WARN L179 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 3 [2018-11-06 21:35:39,739 INFO L134 CoverageAnalysis]: Checked inductivity of 1613 backedges. 1036 proven. 0 refuted. 0 times theorem prover too weak. 577 trivial. 0 not checked. [2018-11-06 21:35:39,740 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:35:39,740 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-06 21:35:39,741 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-06 21:35:39,741 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-06 21:35:39,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-06 21:35:39,742 INFO L87 Difference]: Start difference. First operand 13882 states and 14305 transitions. Second operand 3 states. [2018-11-06 21:35:41,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:35:41,660 INFO L93 Difference]: Finished difference Result 31358 states and 32317 transitions. [2018-11-06 21:35:41,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-06 21:35:41,660 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 1028 [2018-11-06 21:35:41,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:35:41,676 INFO L225 Difference]: With dead ends: 31358 [2018-11-06 21:35:41,676 INFO L226 Difference]: Without dead ends: 17778 [2018-11-06 21:35:41,686 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-06 21:35:41,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17778 states. [2018-11-06 21:35:41,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17778 to 13949. [2018-11-06 21:35:41,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13949 states. [2018-11-06 21:35:41,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13949 states to 13949 states and 14344 transitions. [2018-11-06 21:35:41,858 INFO L78 Accepts]: Start accepts. Automaton has 13949 states and 14344 transitions. Word has length 1028 [2018-11-06 21:35:41,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:35:41,859 INFO L480 AbstractCegarLoop]: Abstraction has 13949 states and 14344 transitions. [2018-11-06 21:35:41,859 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-06 21:35:41,859 INFO L276 IsEmpty]: Start isEmpty. Operand 13949 states and 14344 transitions. [2018-11-06 21:35:41,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1042 [2018-11-06 21:35:41,880 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:35:41,881 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:35:41,881 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:35:41,882 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:35:41,882 INFO L82 PathProgramCache]: Analyzing trace with hash 437339455, now seen corresponding path program 1 times [2018-11-06 21:35:41,882 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:35:41,882 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:35:41,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:41,883 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:41,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:41,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:44,886 INFO L134 CoverageAnalysis]: Checked inductivity of 1673 backedges. 699 proven. 556 refuted. 0 times theorem prover too weak. 418 trivial. 0 not checked. [2018-11-06 21:35:44,886 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-06 21:35:44,886 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-06 21:35:44,895 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:45,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:45,155 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-06 21:35:46,011 WARN L179 SmtUtils]: Spent 648.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 14 [2018-11-06 21:35:46,858 INFO L134 CoverageAnalysis]: Checked inductivity of 1673 backedges. 737 proven. 0 refuted. 0 times theorem prover too weak. 936 trivial. 0 not checked. [2018-11-06 21:35:46,880 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-06 21:35:46,881 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [4] total 8 [2018-11-06 21:35:46,882 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-06 21:35:46,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-06 21:35:46,882 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-06 21:35:46,882 INFO L87 Difference]: Start difference. First operand 13949 states and 14344 transitions. Second operand 8 states. [2018-11-06 21:35:53,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:35:53,146 INFO L93 Difference]: Finished difference Result 40240 states and 41455 transitions. [2018-11-06 21:35:53,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-06 21:35:53,147 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 1041 [2018-11-06 21:35:53,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:35:53,169 INFO L225 Difference]: With dead ends: 40240 [2018-11-06 21:35:53,170 INFO L226 Difference]: Without dead ends: 26593 [2018-11-06 21:35:53,179 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 1048 GetRequests, 1040 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2018-11-06 21:35:53,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26593 states. [2018-11-06 21:35:53,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26593 to 14245. [2018-11-06 21:35:53,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14245 states. [2018-11-06 21:35:53,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14245 states to 14245 states and 14572 transitions. [2018-11-06 21:35:53,370 INFO L78 Accepts]: Start accepts. Automaton has 14245 states and 14572 transitions. Word has length 1041 [2018-11-06 21:35:53,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:35:53,371 INFO L480 AbstractCegarLoop]: Abstraction has 14245 states and 14572 transitions. [2018-11-06 21:35:53,371 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-06 21:35:53,371 INFO L276 IsEmpty]: Start isEmpty. Operand 14245 states and 14572 transitions. [2018-11-06 21:35:53,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1281 [2018-11-06 21:35:53,391 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:35:53,391 INFO L375 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:35:53,392 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:35:53,392 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:35:53,392 INFO L82 PathProgramCache]: Analyzing trace with hash -603654940, now seen corresponding path program 1 times [2018-11-06 21:35:53,392 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:35:53,393 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:35:53,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:53,393 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:53,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:53,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:54,811 INFO L134 CoverageAnalysis]: Checked inductivity of 3280 backedges. 1109 proven. 0 refuted. 0 times theorem prover too weak. 2171 trivial. 0 not checked. [2018-11-06 21:35:54,811 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-06 21:35:54,812 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-06 21:35:54,812 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-06 21:35:54,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-06 21:35:54,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-06 21:35:54,813 INFO L87 Difference]: Start difference. First operand 14245 states and 14572 transitions. Second operand 3 states. [2018-11-06 21:35:56,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-06 21:35:56,156 INFO L93 Difference]: Finished difference Result 32095 states and 32845 transitions. [2018-11-06 21:35:56,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-06 21:35:56,156 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 1280 [2018-11-06 21:35:56,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-06 21:35:56,171 INFO L225 Difference]: With dead ends: 32095 [2018-11-06 21:35:56,172 INFO L226 Difference]: Without dead ends: 18152 [2018-11-06 21:35:56,179 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-06 21:35:56,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18152 states. [2018-11-06 21:35:56,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18152 to 15746. [2018-11-06 21:35:56,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15746 states. [2018-11-06 21:35:56,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15746 states to 15746 states and 16070 transitions. [2018-11-06 21:35:56,350 INFO L78 Accepts]: Start accepts. Automaton has 15746 states and 16070 transitions. Word has length 1280 [2018-11-06 21:35:56,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-06 21:35:56,350 INFO L480 AbstractCegarLoop]: Abstraction has 15746 states and 16070 transitions. [2018-11-06 21:35:56,351 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-06 21:35:56,351 INFO L276 IsEmpty]: Start isEmpty. Operand 15746 states and 16070 transitions. [2018-11-06 21:35:56,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1366 [2018-11-06 21:35:56,371 INFO L367 BasicCegarLoop]: Found error trace [2018-11-06 21:35:56,372 INFO L375 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-06 21:35:56,372 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-06 21:35:56,372 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-06 21:35:56,373 INFO L82 PathProgramCache]: Analyzing trace with hash 194785411, now seen corresponding path program 1 times [2018-11-06 21:35:56,373 INFO L225 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-06 21:35:56,373 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-06 21:35:56,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:56,374 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:56,374 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-06 21:35:56,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:59,003 INFO L134 CoverageAnalysis]: Checked inductivity of 3912 backedges. 2131 proven. 822 refuted. 0 times theorem prover too weak. 959 trivial. 0 not checked. [2018-11-06 21:35:59,003 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-06 21:35:59,003 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-06 21:35:59,012 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-06 21:35:59,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-06 21:35:59,366 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-06 21:35:59,578 WARN L179 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 19 [2018-11-06 21:36:02,085 WARN L832 $PredicateComparison]: unable to prove that (or (exists ((v_prenex_60 Int)) (let ((.cse0 (div (* (- 250) v_prenex_60) 9))) (let ((.cse2 (div .cse0 5))) (let ((.cse1 (+ (* 10 .cse2) 3459790))) (and (<= 0 .cse0) (<= (* 250 v_prenex_60) 0) (<= (+ v_prenex_60 98) 0) (< 0 (+ v_prenex_60 147)) (<= (div .cse1 (- 9)) (+ c_~a0~0 1)) (< .cse1 0) (not (= (mod (+ .cse2 1) (- 9)) 0)) (= 0 (mod (+ .cse2 2) (- 9)))))))) (exists ((v_prenex_34 Int)) (let ((.cse4 (div (* (- 250) v_prenex_34) 9))) (let ((.cse5 (div .cse4 5))) (let ((.cse3 (* 10 .cse5))) (and (<= (div (+ .cse3 3459790) (- 9)) c_~a0~0) (<= (* 250 v_prenex_34) 0) (<= 0 .cse4) (< 0 (+ v_prenex_34 147)) (<= 0 (+ .cse3 3459800)) (<= (+ v_prenex_34 98) 0) (= (mod (+ .cse5 1) (- 9)) 0)))))) (exists ((v_prenex_12 Int)) (let ((.cse8 (div (* (- 250) v_prenex_12) 9))) (let ((.cse7 (div .cse8 5))) (let ((.cse6 (+ (* 10 .cse7) 3459790))) (and (<= (div .cse6 (- 9)) c_~a0~0) (<= (* 250 v_prenex_12) 0) (= 0 (mod (+ .cse7 2) (- 9))) (< 0 (+ v_prenex_12 147)) (<= (+ v_prenex_12 98) 0) (= 0 (mod .cse8 5)) (<= 0 .cse6)))))) (exists ((v_prenex_44 Int)) (let ((.cse10 (div (* (- 250) v_prenex_44) 9))) (let ((.cse11 (div .cse10 5))) (let ((.cse12 (* 10 .cse11))) (let ((.cse9 (+ .cse12 3459800))) (and (<= (div .cse9 (- 9)) c_~a0~0) (< .cse10 0) (<= (+ v_prenex_44 98) 0) (<= (* 250 v_prenex_44) 0) (not (= 0 (mod (+ .cse11 1) (- 9)))) (not (= (mod .cse10 5) 0)) (<= 0 .cse9) (< 0 (+ v_prenex_44 147)) (< (+ .cse12 3459790) 0))))))) (exists ((v_prenex_16 Int)) (let ((.cse14 (div (* (- 250) v_prenex_16) 9))) (let ((.cse13 (div .cse14 5))) (and (< 0 (+ v_prenex_16 147)) (<= (div (+ (* 10 .cse13) 3459790) (- 9)) c_~a0~0) (= (mod (+ .cse13 1) (- 9)) 0) (<= (+ v_prenex_16 98) 0) (<= 0 .cse14) (<= (* 250 v_prenex_16) 0) (= 0 (mod (+ .cse13 2) (- 9))))))) (exists ((v_prenex_56 Int)) (let ((.cse18 (div (* (- 250) v_prenex_56) 9))) (let ((.cse15 (div .cse18 5))) (let ((.cse17 (* 10 .cse15))) (let ((.cse16 (+ .cse17 3459800))) (and (<= (+ v_prenex_56 98) 0) (not (= (mod (+ .cse15 2) (- 9)) 0)) (< .cse16 0) (< (+ .cse17 3459790) 0) (< .cse18 0) (not (= (mod .cse18 5) 0)) (<= (div .cse16 (- 9)) (+ c_~a0~0 1)) (< 0 (+ v_prenex_56 147)) (not (= 0 (mod (+ .cse15 1) (- 9)))) (<= (* 250 v_prenex_56) 0))))))) (exists ((v_prenex_9 Int)) (let ((.cse19 (div (* (- 250) v_prenex_9) 9))) (let ((.cse20 (div .cse19 5))) (let ((.cse22 (* 10 .cse20))) (let ((.cse21 (+ .cse22 3459800))) (and (<= (+ v_prenex_9 98) 0) (<= (* 250 v_prenex_9) 0) (< .cse19 0) (not (= 0 (mod (+ .cse20 2) (- 9)))) (not (= 0 (mod .cse19 5))) (< .cse21 0) (<= (div .cse21 (- 9)) (+ c_~a0~0 1)) (< 0 (+ v_prenex_9 147)) (<= 0 (+ .cse22 3459790)))))))) (exists ((v_prenex_30 Int)) (let ((.cse24 (div (* (- 250) v_prenex_30) 9))) (let ((.cse23 (div .cse24 5))) (let ((.cse25 (+ (* 10 .cse23) 3459790))) (and (not (= (mod (+ .cse23 1) (- 9)) 0)) (<= (* 250 v_prenex_30) 0) (= 0 (mod (+ .cse23 2) (- 9))) (< 0 (+ v_prenex_30 147)) (<= (+ v_prenex_30 98) 0) (= (mod .cse24 5) 0) (< .cse25 0) (<= (div .cse25 (- 9)) (+ c_~a0~0 1))))))) (exists ((v_prenex_18 Int)) (let ((.cse28 (div (* (- 250) v_prenex_18) 9))) (let ((.cse29 (div .cse28 5))) (let ((.cse26 (* 10 .cse29))) (let ((.cse27 (+ .cse26 3459790))) (and (< 0 (+ v_prenex_18 147)) (< (+ .cse26 3459800) 0) (<= 0 .cse27) (<= (* 250 v_prenex_18) 0) (= 0 (mod .cse28 5)) (not (= (mod (+ .cse29 2) (- 9)) 0)) (<= (div .cse27 (- 9)) c_~a0~0) (<= (+ v_prenex_18 98) 0))))))) (exists ((v_prenex_62 Int)) (let ((.cse32 (div (* (- 250) v_prenex_62) 9))) (let ((.cse31 (div .cse32 5))) (let ((.cse33 (* 10 .cse31))) (let ((.cse30 (+ .cse33 3459790))) (and (<= (* 250 v_prenex_62) 0) (< .cse30 0) (not (= 0 (mod (+ .cse31 1) (- 9)))) (<= 0 .cse32) (<= (div .cse30 (- 9)) (+ c_~a0~0 1)) (<= 0 (+ .cse33 3459800)) (<= (+ v_prenex_62 98) 0) (< 0 (+ v_prenex_62 147)))))))) (exists ((v_prenex_48 Int)) (let ((.cse34 (div (* (- 250) v_prenex_48) 9))) (let ((.cse35 (div .cse34 5))) (and (not (= (mod .cse34 5) 0)) (< .cse34 0) (<= (* 250 v_prenex_48) 0) (= (mod (+ .cse35 2) (- 9)) 0) (<= (+ v_prenex_48 98) 0) (<= (div (+ (* 10 .cse35) 3459800) (- 9)) c_~a0~0) (= (mod (+ .cse35 1) (- 9)) 0) (< 0 (+ v_prenex_48 147)))))) (exists ((v_prenex_22 Int)) (let ((.cse39 (div (* (- 250) v_prenex_22) 9))) (let ((.cse36 (div .cse39 5))) (let ((.cse38 (* 10 .cse36))) (let ((.cse37 (+ .cse38 3459790))) (and (<= (* 250 v_prenex_22) 0) (not (= 0 (mod (+ .cse36 1) (- 9)))) (< .cse37 0) (< 0 (+ v_prenex_22 147)) (not (= (mod (+ .cse36 2) (- 9)) 0)) (<= (div .cse37 (- 9)) (+ c_~a0~0 1)) (<= (+ v_prenex_22 98) 0) (< (+ .cse38 3459800) 0) (<= 0 .cse39))))))) (exists ((v_prenex_52 Int)) (let ((.cse42 (div (* (- 250) v_prenex_52) 9))) (let ((.cse41 (* 10 (div .cse42 5)))) (let ((.cse40 (+ .cse41 3459790))) (and (<= 0 .cse40) (<= (* 250 v_prenex_52) 0) (<= (+ v_prenex_52 98) 0) (< 0 (+ v_prenex_52 147)) (<= (div .cse40 (- 9)) c_~a0~0) (<= 0 (+ .cse41 3459800)) (<= 0 .cse42)))))) (exists ((v_prenex_50 Int)) (let ((.cse44 (div (* (- 250) v_prenex_50) 9))) (let ((.cse43 (div .cse44 5))) (let ((.cse45 (* 10 .cse43))) (and (not (= 0 (mod (+ .cse43 1) (- 9)))) (<= (+ v_prenex_50 98) 0) (< .cse44 0) (< 0 (+ v_prenex_50 147)) (= (mod (+ .cse43 2) (- 9)) 0) (not (= (mod .cse44 5) 0)) (< (+ .cse45 3459790) 0) (<= (div (+ .cse45 3459800) (- 9)) c_~a0~0) (<= (* 250 v_prenex_50) 0)))))) (exists ((v_prenex_58 Int)) (let ((.cse48 (div (* (- 250) v_prenex_58) 9))) (let ((.cse46 (div .cse48 5))) (let ((.cse47 (+ (* 10 .cse46) 3459790))) (and (< 0 (+ v_prenex_58 147)) (= 0 (mod (+ .cse46 2) (- 9))) (<= (div .cse47 (- 9)) c_~a0~0) (<= 0 .cse48) (<= 0 .cse47) (<= (+ v_prenex_58 98) 0) (<= (* 250 v_prenex_58) 0)))))) (exists ((v_prenex_42 Int)) (let ((.cse51 (div (* (- 250) v_prenex_42) 9))) (let ((.cse50 (div .cse51 5))) (let ((.cse49 (+ (* 10 .cse50) 3459800))) (and (<= (+ v_prenex_42 98) 0) (<= (div .cse49 (- 9)) (+ c_~a0~0 1)) (not (= 0 (mod (+ .cse50 2) (- 9)))) (< .cse49 0) (not (= (mod .cse51 5) 0)) (< 0 (+ v_prenex_42 147)) (= (mod (+ .cse50 1) (- 9)) 0) (< .cse51 0) (<= (* 250 v_prenex_42) 0)))))) (exists ((v_prenex_38 Int)) (let ((.cse53 (div (* (- 250) v_prenex_38) 9))) (let ((.cse54 (* 10 (div .cse53 5)))) (let ((.cse52 (+ .cse54 3459790))) (and (<= (+ v_prenex_38 98) 0) (<= (div .cse52 (- 9)) c_~a0~0) (< 0 (+ v_prenex_38 147)) (= (mod .cse53 5) 0) (<= 0 (+ .cse54 3459800)) (<= 0 .cse52) (<= (* 250 v_prenex_38) 0)))))) (exists ((v_prenex_36 Int)) (let ((.cse57 (div (* (- 250) v_prenex_36) 9))) (let ((.cse56 (div .cse57 5))) (let ((.cse55 (* 10 .cse56))) (and (<= (div (+ .cse55 3459790) (- 9)) c_~a0~0) (<= (+ v_prenex_36 98) 0) (< 0 (+ v_prenex_36 147)) (<= (* 250 v_prenex_36) 0) (not (= 0 (mod (+ .cse56 2) (- 9)))) (< (+ .cse55 3459800) 0) (= (mod .cse57 5) 0) (= 0 (mod (+ .cse56 1) (- 9)))))))) (exists ((v_prenex_54 Int)) (let ((.cse59 (div (* (- 250) v_prenex_54) 9))) (let ((.cse60 (div .cse59 5))) (let ((.cse61 (* 10 .cse60))) (let ((.cse58 (+ .cse61 3459790))) (and (<= (* 250 v_prenex_54) 0) (<= (+ v_prenex_54 98) 0) (< 0 (+ v_prenex_54 147)) (<= (div .cse58 (- 9)) c_~a0~0) (<= 0 .cse59) (<= 0 .cse58) (not (= (mod (+ .cse60 2) (- 9)) 0)) (< (+ .cse61 3459800) 0))))))) (exists ((v_prenex_32 Int)) (let ((.cse62 (div (* (- 250) v_prenex_32) 9))) (let ((.cse64 (div .cse62 5))) (let ((.cse63 (* 10 .cse64))) (and (< .cse62 0) (<= (* 250 v_prenex_32) 0) (<= 0 (+ .cse63 3459790)) (= 0 (mod (+ .cse64 2) (- 9))) (< 0 (+ v_prenex_32 147)) (<= (div (+ .cse63 3459800) (- 9)) c_~a0~0) (not (= 0 (mod .cse62 5))) (<= (+ v_prenex_32 98) 0)))))) (exists ((v_prenex_40 Int)) (let ((.cse68 (div (* (- 250) v_prenex_40) 9))) (let ((.cse65 (div .cse68 5))) (let ((.cse67 (* 10 .cse65))) (let ((.cse66 (+ .cse67 3459790))) (and (< 0 (+ v_prenex_40 147)) (<= (* 250 v_prenex_40) 0) (not (= (mod (+ .cse65 1) (- 9)) 0)) (< .cse66 0) (< (+ .cse67 3459800) 0) (not (= 0 (mod (+ .cse65 2) (- 9)))) (<= (+ v_prenex_40 98) 0) (<= (div .cse66 (- 9)) (+ c_~a0~0 1)) (= (mod .cse68 5) 0))))))) (exists ((v_prenex_26 Int)) (let ((.cse69 (div (* (- 250) v_prenex_26) 9))) (let ((.cse70 (div .cse69 5))) (let ((.cse71 (+ (* 10 .cse70) 3459800))) (and (< .cse69 0) (= 0 (mod (+ .cse70 1) (- 9))) (< 0 (+ v_prenex_26 147)) (<= 0 .cse71) (not (= 0 (mod .cse69 5))) (<= (+ v_prenex_26 98) 0) (<= (* 250 v_prenex_26) 0) (<= (div .cse71 (- 9)) c_~a0~0)))))) (exists ((v_prenex_14 Int)) (let ((.cse72 (div (* (- 250) v_prenex_14) 9))) (let ((.cse74 (div .cse72 5))) (let ((.cse75 (* 10 .cse74))) (let ((.cse73 (+ .cse75 3459790))) (and (= 0 (mod .cse72 5)) (< .cse73 0) (not (= 0 (mod (+ .cse74 1) (- 9)))) (<= 0 (+ .cse75 3459800)) (<= (+ v_prenex_14 98) 0) (<= (div .cse73 (- 9)) (+ c_~a0~0 1)) (< 0 (+ v_prenex_14 147)) (<= (* 250 v_prenex_14) 0))))))) (exists ((v_prenex_28 Int)) (let ((.cse76 (div (* (- 250) v_prenex_28) 9))) (let ((.cse77 (* 10 (div .cse76 5)))) (let ((.cse78 (+ .cse77 3459800))) (and (not (= 0 (mod .cse76 5))) (<= (+ v_prenex_28 98) 0) (<= (* 250 v_prenex_28) 0) (< 0 (+ v_prenex_28 147)) (<= 0 (+ .cse77 3459790)) (<= (div .cse78 (- 9)) c_~a0~0) (< .cse76 0) (<= 0 .cse78)))))) (exists ((v_prenex_20 Int)) (let ((.cse81 (div (* (- 250) v_prenex_20) 9))) (let ((.cse80 (div .cse81 5))) (let ((.cse79 (* 10 .cse80))) (and (<= (+ v_prenex_20 98) 0) (<= (div (+ .cse79 3459790) (- 9)) c_~a0~0) (< (+ .cse79 3459800) 0) (= 0 (mod (+ .cse80 1) (- 9))) (< 0 (+ v_prenex_20 147)) (not (= (mod (+ .cse80 2) (- 9)) 0)) (<= (* 250 v_prenex_20) 0) (<= 0 .cse81)))))) (exists ((v_prenex_24 Int)) (let ((.cse84 (div (* (- 250) v_prenex_24) 9))) (let ((.cse83 (div .cse84 5))) (let ((.cse82 (* 10 .cse83))) (and (<= 0 (+ .cse82 3459800)) (< 0 (+ v_prenex_24 147)) (= (mod (+ .cse83 1) (- 9)) 0) (<= (+ v_prenex_24 98) 0) (<= (div (+ .cse82 3459790) (- 9)) c_~a0~0) (<= (* 250 v_prenex_24) 0) (= 0 (mod .cse84 5))))))) (exists ((v_prenex_46 Int)) (let ((.cse85 (div (* (- 250) v_prenex_46) 9))) (let ((.cse86 (div .cse85 5))) (and (< 0 (+ v_prenex_46 147)) (= (mod .cse85 5) 0) (<= (div (+ (* 10 .cse86) 3459790) (- 9)) c_~a0~0) (<= (* 250 v_prenex_46) 0) (= (mod (+ .cse86 2) (- 9)) 0) (= 0 (mod (+ .cse86 1) (- 9))) (<= (+ v_prenex_46 98) 0)))))) is different from false [2018-11-06 21:36:09,541 WARN L832 $PredicateComparison]: unable to prove that (or (exists ((v_prenex_121 Int) (v_prenex_122 Int)) (let ((.cse3 (div (* (- 250) v_prenex_122) 9))) (let ((.cse1 (div .cse3 5))) (let ((.cse4 (* 10 .cse1))) (let ((.cse2 (+ .cse4 3459790)) (.cse0 (+ v_prenex_121 600067))) (and (<= (div .cse0 5) c_~a0~0) (not (= (mod (+ .cse1 1) (- 9)) 0)) (< .cse2 0) (<= (div .cse2 (- 9)) (+ v_prenex_121 1)) (not (= 0 (mod (+ .cse1 2) (- 9)))) (< 0 (+ v_prenex_122 147)) (= (mod .cse3 5) 0) (<= 0 .cse0) (< (+ .cse4 3459800) 0) (<= (+ v_prenex_122 98) 0) (<= (* 250 v_prenex_122) 0))))))) (exists ((v_prenex_105 Int) (v_prenex_106 Int)) (let ((.cse6 (div (* (- 250) v_prenex_106) 9))) (let ((.cse8 (div .cse6 5))) (let ((.cse9 (* 10 .cse8))) (let ((.cse5 (+ v_prenex_105 600067)) (.cse7 (+ .cse9 3459790))) (and (not (= 0 (mod (+ v_prenex_105 2) 5))) (<= (+ v_prenex_106 98) 0) (<= (+ (div .cse5 5) 1) c_~a0~0) (< .cse5 0) (<= 0 .cse6) (< 0 (+ v_prenex_106 147)) (< .cse7 0) (not (= 0 (mod (+ .cse8 1) (- 9)))) (<= (* 250 v_prenex_106) 0) (<= (div .cse7 (- 9)) (+ v_prenex_105 1)) (<= 0 (+ .cse9 3459800)))))))) (exists ((v_prenex_56 Int) (v_prenex_66 Int)) (let ((.cse14 (div (* (- 250) v_prenex_56) 9))) (let ((.cse10 (div .cse14 5))) (let ((.cse13 (* 10 .cse10))) (let ((.cse12 (+ v_prenex_66 600067)) (.cse11 (+ .cse13 3459800))) (and (<= (+ v_prenex_56 98) 0) (not (= (mod (+ .cse10 2) (- 9)) 0)) (< .cse11 0) (<= (div .cse12 5) c_~a0~0) (< (+ .cse13 3459790) 0) (<= 0 .cse12) (< .cse14 0) (not (= (mod .cse14 5) 0)) (< 0 (+ v_prenex_56 147)) (<= (div .cse11 (- 9)) (+ v_prenex_66 1)) (not (= 0 (mod (+ .cse10 1) (- 9)))) (<= (* 250 v_prenex_56) 0))))))) (exists ((v_prenex_194 Int) (v_prenex_193 Int)) (let ((.cse19 (div (* (- 250) v_prenex_193) 9))) (let ((.cse15 (div .cse19 5))) (let ((.cse18 (* 10 .cse15))) (let ((.cse17 (+ v_prenex_194 600067)) (.cse16 (+ .cse18 3459790))) (and (< 0 (+ v_prenex_193 147)) (not (= 0 (mod (+ .cse15 1) (- 9)))) (< .cse16 0) (<= (div .cse17 5) c_~a0~0) (<= 0 .cse17) (<= (+ v_prenex_193 98) 0) (<= 0 (+ .cse18 3459800)) (<= (* 250 v_prenex_193) 0) (<= 0 .cse19) (<= (div .cse16 (- 9)) (+ v_prenex_194 1)))))))) (exists ((v_prenex_134 Int) (v_prenex_133 Int)) (let ((.cse21 (div (* (- 250) v_prenex_133) 9))) (let ((.cse23 (div .cse21 5))) (let ((.cse22 (* 10 .cse23))) (let ((.cse20 (+ .cse22 3459800))) (and (< 0 (+ v_prenex_133 147)) (<= (* 250 v_prenex_133) 0) (<= (div .cse20 (- 9)) (+ v_prenex_134 1)) (not (= 0 (mod .cse21 5))) (<= (div (+ v_prenex_134 600067) 5) c_~a0~0) (= 0 (mod (+ v_prenex_134 2) 5)) (<= 0 (+ .cse22 3459790)) (<= (+ v_prenex_133 98) 0) (not (= 0 (mod (+ .cse23 2) (- 9)))) (< .cse20 0) (< .cse21 0))))))) (exists ((v_prenex_73 Int) (v_prenex_72 Int)) (let ((.cse27 (div (* (- 250) v_prenex_72) 9))) (let ((.cse24 (div .cse27 5))) (let ((.cse25 (+ v_prenex_73 600067)) (.cse26 (+ (* 10 .cse24) 3459790))) (and (= 0 (mod (+ .cse24 2) (- 9))) (< 0 (+ v_prenex_72 147)) (<= (div .cse25 5) c_~a0~0) (<= (div .cse26 (- 9)) v_prenex_73) (<= 0 .cse25) (<= (* 250 v_prenex_72) 0) (<= 0 .cse27) (<= (+ v_prenex_72 98) 0) (<= 0 .cse26)))))) (exists ((v_prenex_120 Int) (v_prenex_119 Int)) (let ((.cse31 (div (* (- 250) v_prenex_119) 9))) (let ((.cse30 (div .cse31 5))) (let ((.cse28 (+ v_prenex_120 600067)) (.cse29 (+ (* 10 .cse30) 3459800))) (and (<= (+ v_prenex_119 98) 0) (<= 0 .cse28) (<= 0 .cse29) (< 0 (+ v_prenex_119 147)) (= 0 (mod (+ .cse30 1) (- 9))) (<= (div .cse28 5) c_~a0~0) (< .cse31 0) (<= (div .cse29 (- 9)) v_prenex_120) (<= (* 250 v_prenex_119) 0) (not (= 0 (mod .cse31 5)))))))) (exists ((v_prenex_114 Int) (v_prenex_115 Int)) (let ((.cse32 (div (* (- 250) v_prenex_115) 9))) (let ((.cse34 (div .cse32 5))) (let ((.cse35 (* 10 .cse34))) (let ((.cse33 (+ .cse35 3459790))) (and (< 0 (+ v_prenex_115 147)) (<= 0 .cse32) (= 0 (mod (+ v_prenex_114 2) 5)) (<= (+ v_prenex_115 98) 0) (<= 0 .cse33) (<= (* 250 v_prenex_115) 0) (<= (div .cse33 (- 9)) v_prenex_114) (not (= (mod (+ .cse34 2) (- 9)) 0)) (< (+ .cse35 3459800) 0) (<= (div (+ v_prenex_114 600067) 5) c_~a0~0))))))) (exists ((v_prenex_14 Int) (v_prenex_142 Int)) (let ((.cse38 (div (* (- 250) v_prenex_14) 9))) (let ((.cse39 (div .cse38 5))) (let ((.cse40 (* 10 .cse39))) (let ((.cse36 (+ .cse40 3459790)) (.cse37 (+ v_prenex_142 600067))) (and (<= (div .cse36 (- 9)) (+ v_prenex_142 1)) (< .cse37 0) (not (= 0 (mod (+ v_prenex_142 2) 5))) (= 0 (mod .cse38 5)) (< .cse36 0) (not (= 0 (mod (+ .cse39 1) (- 9)))) (<= 0 (+ .cse40 3459800)) (<= (+ v_prenex_14 98) 0) (<= (+ (div .cse37 5) 1) c_~a0~0) (< 0 (+ v_prenex_14 147)) (<= (* 250 v_prenex_14) 0))))))) (exists ((v_prenex_94 Int) (v_prenex_93 Int)) (let ((.cse41 (div (* (- 250) v_prenex_93) 9))) (let ((.cse43 (div .cse41 5))) (let ((.cse42 (+ (* 10 .cse43) 3459800))) (and (< .cse41 0) (<= (* 250 v_prenex_93) 0) (<= (+ v_prenex_93 98) 0) (not (= 0 (mod .cse41 5))) (= 0 (mod (+ v_prenex_94 2) 5)) (< 0 (+ v_prenex_93 147)) (<= 0 .cse42) (<= (div (+ v_prenex_94 600067) 5) c_~a0~0) (= 0 (mod (+ .cse43 1) (- 9))) (<= (div .cse42 (- 9)) v_prenex_94)))))) (exists ((v_prenex_87 Int) (v_prenex_20 Int)) (let ((.cse46 (div (* (- 250) v_prenex_20) 9))) (let ((.cse45 (div .cse46 5))) (let ((.cse44 (* 10 .cse45))) (and (<= (+ v_prenex_20 98) 0) (< (+ .cse44 3459800) 0) (<= (div (+ v_prenex_87 600067) 5) c_~a0~0) (<= (div (+ .cse44 3459790) (- 9)) v_prenex_87) (= 0 (mod (+ .cse45 1) (- 9))) (< 0 (+ v_prenex_20 147)) (not (= (mod (+ .cse45 2) (- 9)) 0)) (<= (* 250 v_prenex_20) 0) (= 0 (mod (+ v_prenex_87 2) 5)) (<= 0 .cse46)))))) (exists ((v_prenex_65 Int) (v_prenex_64 Int)) (let ((.cse47 (div (* (- 250) v_prenex_65) 9))) (let ((.cse48 (div .cse47 5))) (let ((.cse49 (* 10 .cse48))) (and (< .cse47 0) (= (mod (+ .cse48 2) (- 9)) 0) (not (= (mod .cse47 5) 0)) (<= (div (+ .cse49 3459800) (- 9)) v_prenex_64) (<= (+ v_prenex_65 98) 0) (= 0 (mod (+ v_prenex_64 2) 5)) (<= (div (+ v_prenex_64 600067) 5) c_~a0~0) (not (= 0 (mod (+ .cse48 1) (- 9)))) (< 0 (+ v_prenex_65 147)) (<= (* 250 v_prenex_65) 0) (< (+ .cse49 3459790) 0)))))) (exists ((v_prenex_145 Int) (v_prenex_146 Int)) (let ((.cse50 (div (* (- 250) v_prenex_145) 9))) (let ((.cse52 (div .cse50 5))) (let ((.cse51 (+ (* 10 .cse52) 3459790))) (and (<= (* 250 v_prenex_145) 0) (<= (+ v_prenex_145 98) 0) (<= 0 .cse50) (<= (div .cse51 (- 9)) (+ v_prenex_146 1)) (< .cse51 0) (= 0 (mod (+ v_prenex_146 2) 5)) (< 0 (+ v_prenex_145 147)) (= 0 (mod (+ .cse52 2) (- 9))) (not (= (mod (+ .cse52 1) (- 9)) 0)) (<= (div (+ v_prenex_146 600067) 5) c_~a0~0)))))) (exists ((v_prenex_189 Int) (v_prenex_190 Int)) (let ((.cse54 (div (* (- 250) v_prenex_189) 9))) (let ((.cse55 (div .cse54 5)) (.cse53 (+ v_prenex_190 600067))) (and (< 0 (+ v_prenex_189 147)) (< .cse53 0) (not (= (mod .cse54 5) 0)) (= (mod (+ .cse55 1) (- 9)) 0) (< .cse54 0) (<= (div (+ (* 10 .cse55) 3459800) (- 9)) v_prenex_190) (<= (+ v_prenex_189 98) 0) (= (mod (+ .cse55 2) (- 9)) 0) (<= (* 250 v_prenex_189) 0) (<= (+ (div .cse53 5) 1) c_~a0~0) (not (= 0 (mod (+ v_prenex_190 2) 5))))))) (exists ((v_prenex_143 Int) (v_prenex_144 Int)) (let ((.cse58 (div (* (- 250) v_prenex_144) 9))) (let ((.cse59 (div .cse58 5))) (let ((.cse57 (* 10 .cse59))) (let ((.cse56 (+ .cse57 3459790))) (and (<= (div .cse56 (- 9)) (+ v_prenex_143 1)) (= 0 (mod (+ v_prenex_143 2) 5)) (<= 0 (+ .cse57 3459800)) (= 0 (mod .cse58 5)) (<= (div (+ v_prenex_143 600067) 5) c_~a0~0) (<= (+ v_prenex_144 98) 0) (< 0 (+ v_prenex_144 147)) (< .cse56 0) (not (= 0 (mod (+ .cse59 1) (- 9)))) (<= (* 250 v_prenex_144) 0))))))) (exists ((v_prenex_196 Int) (v_prenex_195 Int)) (let ((.cse62 (div (* (- 250) v_prenex_196) 9))) (let ((.cse60 (div .cse62 5))) (let ((.cse61 (+ (* 10 .cse60) 3459790))) (and (<= (+ v_prenex_196 98) 0) (< 0 (+ v_prenex_196 147)) (= 0 (mod (+ v_prenex_195 2) 5)) (<= (* 250 v_prenex_196) 0) (= 0 (mod (+ .cse60 2) (- 9))) (<= (div .cse61 (- 9)) v_prenex_195) (<= 0 .cse61) (<= (div (+ v_prenex_195 600067) 5) c_~a0~0) (= 0 (mod .cse62 5))))))) (exists ((v_prenex_96 Int) (v_prenex_95 Int)) (let ((.cse64 (div (* (- 250) v_prenex_95) 9))) (let ((.cse65 (* 10 (div .cse64 5)))) (let ((.cse63 (+ .cse65 3459800))) (and (<= (div .cse63 (- 9)) v_prenex_96) (<= (+ v_prenex_95 98) 0) (< .cse64 0) (= 0 (mod (+ v_prenex_96 2) 5)) (<= (* 250 v_prenex_95) 0) (<= (div (+ v_prenex_96 600067) 5) c_~a0~0) (< 0 (+ v_prenex_95 147)) (not (= 0 (mod .cse64 5))) (<= 0 .cse63) (<= 0 (+ .cse65 3459790))))))) (exists ((v_prenex_181 Int) (v_prenex_182 Int)) (let ((.cse69 (div (* (- 250) v_prenex_181) 9))) (let ((.cse67 (div .cse69 5))) (let ((.cse68 (+ v_prenex_182 600067)) (.cse66 (+ (* 10 .cse67) 3459790))) (and (<= (div .cse66 (- 9)) (+ v_prenex_182 1)) (< 0 (+ v_prenex_181 147)) (not (= (mod (+ .cse67 1) (- 9)) 0)) (< .cse68 0) (<= (+ (div .cse68 5) 1) c_~a0~0) (not (= 0 (mod (+ v_prenex_182 2) 5))) (= (mod .cse69 5) 0) (< .cse66 0) (<= (* 250 v_prenex_181) 0) (= 0 (mod (+ .cse67 2) (- 9))) (<= (+ v_prenex_181 98) 0)))))) (exists ((v_prenex_63 Int) (v_prenex_50 Int)) (let ((.cse72 (div (* (- 250) v_prenex_50) 9))) (let ((.cse70 (div .cse72 5))) (let ((.cse71 (+ v_prenex_63 600067)) (.cse73 (* 10 .cse70))) (and (not (= 0 (mod (+ .cse70 1) (- 9)))) (<= 0 .cse71) (<= (+ v_prenex_50 98) 0) (<= (div .cse71 5) c_~a0~0) (< .cse72 0) (< 0 (+ v_prenex_50 147)) (= (mod (+ .cse70 2) (- 9)) 0) (not (= (mod .cse72 5) 0)) (< (+ .cse73 3459790) 0) (<= (* 250 v_prenex_50) 0) (<= (div (+ .cse73 3459800) (- 9)) v_prenex_63)))))) (exists ((v_prenex_136 Int) (v_prenex_135 Int)) (let ((.cse76 (div (* (- 250) v_prenex_135) 9))) (let ((.cse75 (div .cse76 5))) (let ((.cse74 (+ (* 10 .cse75) 3459790)) (.cse77 (+ v_prenex_136 600067))) (and (< 0 (+ v_prenex_135 147)) (<= 0 .cse74) (<= (div .cse74 (- 9)) v_prenex_136) (= 0 (mod (+ .cse75 2) (- 9))) (<= 0 .cse76) (not (= 0 (mod (+ v_prenex_136 2) 5))) (<= (* 250 v_prenex_135) 0) (<= (+ v_prenex_135 98) 0) (<= (+ (div .cse77 5) 1) c_~a0~0) (< .cse77 0)))))) (exists ((v_prenex_125 Int) (v_prenex_126 Int)) (let ((.cse78 (div (* (- 250) v_prenex_126) 9))) (let ((.cse80 (* 10 (div .cse78 5)))) (let ((.cse79 (+ .cse80 3459790))) (and (<= 0 .cse78) (<= (* 250 v_prenex_126) 0) (<= (+ v_prenex_126 98) 0) (= 0 (mod (+ v_prenex_125 2) 5)) (<= 0 .cse79) (< 0 (+ v_prenex_126 147)) (<= (div .cse79 (- 9)) v_prenex_125) (<= 0 (+ .cse80 3459800)) (<= (div (+ v_prenex_125 600067) 5) c_~a0~0)))))) (exists ((v_prenex_90 Int) (v_prenex_12 Int)) (let ((.cse84 (div (* (- 250) v_prenex_12) 9))) (let ((.cse83 (div .cse84 5))) (let ((.cse82 (+ v_prenex_90 600067)) (.cse81 (+ (* 10 .cse83) 3459790))) (and (<= (* 250 v_prenex_12) 0) (<= (div .cse81 (- 9)) v_prenex_90) (<= 0 .cse82) (= 0 (mod (+ .cse83 2) (- 9))) (< 0 (+ v_prenex_12 147)) (<= (div .cse82 5) c_~a0~0) (<= (+ v_prenex_12 98) 0) (= 0 (mod .cse84 5)) (<= 0 .cse81)))))) (exists ((v_prenex_167 Int) (v_prenex_168 Int)) (let ((.cse87 (div (* (- 250) v_prenex_168) 9))) (let ((.cse89 (div .cse87 5))) (let ((.cse85 (* 10 .cse89))) (let ((.cse86 (+ v_prenex_167 600067)) (.cse88 (+ .cse85 3459790))) (and (< (+ .cse85 3459800) 0) (<= (div .cse86 5) c_~a0~0) (<= (+ v_prenex_168 98) 0) (<= (* 250 v_prenex_168) 0) (= 0 (mod .cse87 5)) (<= (div .cse88 (- 9)) v_prenex_167) (< 0 (+ v_prenex_168 147)) (not (= (mod (+ .cse89 2) (- 9)) 0)) (<= 0 .cse86) (<= 0 .cse88))))))) (exists ((v_prenex_138 Int) (v_prenex_137 Int)) (let ((.cse93 (div (* (- 250) v_prenex_137) 9))) (let ((.cse92 (div .cse93 5))) (let ((.cse91 (+ v_prenex_138 600067)) (.cse90 (* 10 .cse92))) (and (<= (+ v_prenex_137 98) 0) (< 0 (+ v_prenex_137 147)) (<= 0 (+ .cse90 3459800)) (<= (div .cse91 5) c_~a0~0) (<= 0 .cse91) (<= (div (+ .cse90 3459790) (- 9)) v_prenex_138) (= (mod (+ .cse92 1) (- 9)) 0) (<= 0 .cse93) (<= (* 250 v_prenex_137) 0)))))) (exists ((v_prenex_98 Int) (v_prenex_97 Int)) (let ((.cse94 (div (* (- 250) v_prenex_98) 9))) (let ((.cse95 (div .cse94 5))) (and (< .cse94 0) (<= (+ v_prenex_98 98) 0) (<= (div (+ v_prenex_97 600067) 5) c_~a0~0) (<= (div (+ (* 10 .cse95) 3459800) (- 9)) v_prenex_97) (= (mod (+ .cse95 2) (- 9)) 0) (not (= (mod .cse94 5) 0)) (<= (* 250 v_prenex_98) 0) (= 0 (mod (+ v_prenex_97 2) 5)) (< 0 (+ v_prenex_98 147)) (= (mod (+ .cse95 1) (- 9)) 0))))) (exists ((v_prenex_38 Int) (v_prenex_80 Int)) (let ((.cse97 (div (* (- 250) v_prenex_38) 9))) (let ((.cse99 (* 10 (div .cse97 5)))) (let ((.cse96 (+ .cse99 3459790)) (.cse98 (+ v_prenex_80 600067))) (and (<= (+ v_prenex_38 98) 0) (< 0 (+ v_prenex_38 147)) (<= (div .cse96 (- 9)) v_prenex_80) (= (mod .cse97 5) 0) (<= 0 .cse98) (<= 0 (+ .cse99 3459800)) (<= 0 .cse96) (<= (div .cse98 5) c_~a0~0) (<= (* 250 v_prenex_38) 0)))))) (exists ((v_prenex_58 Int) (v_prenex_68 Int)) (let ((.cse102 (div (* (- 250) v_prenex_58) 9))) (let ((.cse101 (div .cse102 5))) (let ((.cse100 (+ (* 10 .cse101) 3459790))) (and (< 0 (+ v_prenex_58 147)) (<= (div .cse100 (- 9)) v_prenex_68) (= 0 (mod (+ .cse101 2) (- 9))) (<= 0 .cse102) (<= (div (+ v_prenex_68 600067) 5) c_~a0~0) (<= 0 .cse100) (<= (+ v_prenex_58 98) 0) (= 0 (mod (+ v_prenex_68 2) 5)) (<= (* 250 v_prenex_58) 0)))))) (exists ((v_prenex_36 Int) (v_prenex_76 Int)) (let ((.cse106 (div (* (- 250) v_prenex_36) 9))) (let ((.cse104 (div .cse106 5))) (let ((.cse103 (+ v_prenex_76 600067)) (.cse105 (* 10 .cse104))) (and (< .cse103 0) (<= (+ v_prenex_36 98) 0) (not (= 0 (mod (+ v_prenex_76 2) 5))) (< 0 (+ v_prenex_36 147)) (<= (+ (div .cse103 5) 1) c_~a0~0) (<= (* 250 v_prenex_36) 0) (not (= 0 (mod (+ .cse104 2) (- 9)))) (< (+ .cse105 3459800) 0) (<= (div (+ .cse105 3459790) (- 9)) v_prenex_76) (= (mod .cse106 5) 0) (= 0 (mod (+ .cse104 1) (- 9)))))))) (exists ((v_prenex_149 Int) (v_prenex_150 Int)) (let ((.cse110 (div (* (- 250) v_prenex_149) 9))) (let ((.cse109 (div .cse110 5))) (let ((.cse111 (* 10 .cse109))) (let ((.cse107 (+ .cse111 3459790)) (.cse108 (+ v_prenex_150 600067))) (and (< .cse107 0) (<= (div .cse107 (- 9)) (+ v_prenex_150 1)) (not (= 0 (mod (+ v_prenex_150 2) 5))) (< .cse108 0) (<= (* 250 v_prenex_149) 0) (<= (+ v_prenex_149 98) 0) (not (= 0 (mod (+ .cse109 1) (- 9)))) (< 0 (+ v_prenex_149 147)) (<= (+ (div .cse108 5) 1) c_~a0~0) (<= 0 .cse110) (not (= (mod (+ .cse109 2) (- 9)) 0)) (< (+ .cse111 3459800) 0))))))) (exists ((v_prenex_44 Int) (v_prenex_92 Int)) (let ((.cse112 (div (* (- 250) v_prenex_44) 9))) (let ((.cse114 (div .cse112 5))) (let ((.cse116 (* 10 .cse114))) (let ((.cse115 (+ .cse116 3459800)) (.cse113 (+ v_prenex_92 600067))) (and (< .cse112 0) (<= (+ v_prenex_44 98) 0) (<= (div .cse113 5) c_~a0~0) (<= (* 250 v_prenex_44) 0) (not (= 0 (mod (+ .cse114 1) (- 9)))) (not (= (mod .cse112 5) 0)) (<= 0 .cse115) (< 0 (+ v_prenex_44 147)) (< (+ .cse116 3459790) 0) (<= (div .cse115 (- 9)) v_prenex_92) (<= 0 .cse113))))))) (exists ((v_prenex_32 Int) (v_prenex_75 Int)) (let ((.cse117 (div (* (- 250) v_prenex_32) 9))) (let ((.cse120 (div .cse117 5))) (let ((.cse118 (* 10 .cse120)) (.cse119 (+ v_prenex_75 600067))) (and (< .cse117 0) (<= (div (+ .cse118 3459800) (- 9)) v_prenex_75) (<= (* 250 v_prenex_32) 0) (<= 0 (+ .cse118 3459790)) (not (= 0 (mod (+ v_prenex_75 2) 5))) (<= (+ (div .cse119 5) 1) c_~a0~0) (= 0 (mod (+ .cse120 2) (- 9))) (< 0 (+ v_prenex_32 147)) (< .cse119 0) (not (= 0 (mod .cse117 5))) (<= (+ v_prenex_32 98) 0)))))) (exists ((v_prenex_165 Int) (v_prenex_166 Int)) (let ((.cse123 (div (* (- 250) v_prenex_166) 9))) (let ((.cse122 (+ v_prenex_165 600067)) (.cse121 (div .cse123 5))) (and (= (mod (+ .cse121 1) (- 9)) 0) (not (= 0 (mod (+ v_prenex_165 2) 5))) (<= (div (+ (* 10 .cse121) 3459790) (- 9)) v_prenex_165) (<= (+ (div .cse122 5) 1) c_~a0~0) (<= (+ v_prenex_166 98) 0) (<= (* 250 v_prenex_166) 0) (< .cse122 0) (= 0 (mod (+ .cse121 2) (- 9))) (<= 0 .cse123) (< 0 (+ v_prenex_166 147)))))) (exists ((v_prenex_116 Int) (v_prenex_117 Int)) (let ((.cse126 (div (* (- 250) v_prenex_117) 9))) (let ((.cse124 (div .cse126 5))) (let ((.cse125 (* 10 .cse124))) (and (= (mod (+ .cse124 1) (- 9)) 0) (<= (+ v_prenex_117 98) 0) (<= (* 250 v_prenex_117) 0) (<= (div (+ .cse125 3459790) (- 9)) v_prenex_116) (<= (div (+ v_prenex_116 600067) 5) c_~a0~0) (= 0 (mod (+ v_prenex_116 2) 5)) (< 0 (+ v_prenex_117 147)) (<= 0 .cse126) (<= 0 (+ .cse125 3459800))))))) (exists ((v_prenex_169 Int) (v_prenex_170 Int)) (let ((.cse129 (div (* (- 250) v_prenex_169) 9))) (let ((.cse127 (+ v_prenex_170 600067)) (.cse128 (div .cse129 5))) (and (<= (div .cse127 5) c_~a0~0) (= 0 (mod (+ .cse128 1) (- 9))) (= (mod (+ .cse128 2) (- 9)) 0) (<= 0 .cse127) (<= (div (+ (* 10 .cse128) 3459790) (- 9)) v_prenex_170) (< 0 (+ v_prenex_169 147)) (<= (+ v_prenex_169 98) 0) (= (mod .cse129 5) 0) (<= (* 250 v_prenex_169) 0))))) (exists ((v_prenex_78 Int) (v_prenex_79 Int)) (let ((.cse130 (div (* (- 250) v_prenex_79) 9))) (let ((.cse132 (div .cse130 5))) (let ((.cse131 (* 10 .cse132))) (and (<= (div (+ v_prenex_78 600067) 5) c_~a0~0) (<= (+ v_prenex_79 98) 0) (< .cse130 0) (<= 0 (+ .cse131 3459790)) (<= (* 250 v_prenex_79) 0) (= 0 (mod (+ .cse132 2) (- 9))) (= 0 (mod (+ v_prenex_78 2) 5)) (<= (div (+ .cse131 3459800) (- 9)) v_prenex_78) (not (= 0 (mod .cse130 5))) (< 0 (+ v_prenex_79 147))))))) (exists ((v_prenex_127 Int) (v_prenex_128 Int)) (let ((.cse133 (div (* (- 250) v_prenex_128) 9))) (let ((.cse135 (div .cse133 5))) (let ((.cse136 (+ v_prenex_127 600067)) (.cse134 (* 10 .cse135))) (and (<= (* 250 v_prenex_128) 0) (not (= (mod .cse133 5) 0)) (<= (+ v_prenex_128 98) 0) (< 0 (+ v_prenex_128 147)) (not (= 0 (mod (+ v_prenex_127 2) 5))) (<= (div (+ .cse134 3459800) (- 9)) v_prenex_127) (= (mod (+ .cse135 2) (- 9)) 0) (<= (+ (div .cse136 5) 1) c_~a0~0) (< .cse136 0) (< (+ .cse134 3459790) 0) (not (= 0 (mod (+ .cse135 1) (- 9)))) (< .cse133 0)))))) (exists ((v_prenex_52 Int) (v_prenex_118 Int)) (let ((.cse140 (div (* (- 250) v_prenex_52) 9))) (let ((.cse139 (* 10 (div .cse140 5)))) (let ((.cse138 (+ v_prenex_118 600067)) (.cse137 (+ .cse139 3459790))) (and (<= 0 .cse137) (<= (* 250 v_prenex_52) 0) (<= (+ v_prenex_52 98) 0) (< 0 (+ v_prenex_52 147)) (<= (+ (div .cse138 5) 1) c_~a0~0) (<= 0 (+ .cse139 3459800)) (< .cse138 0) (<= 0 .cse140) (not (= 0 (mod (+ v_prenex_118 2) 5))) (<= (div .cse137 (- 9)) v_prenex_118)))))) (exists ((v_prenex_48 Int) (v_prenex_91 Int)) (let ((.cse143 (div (* (- 250) v_prenex_48) 9))) (let ((.cse142 (+ v_prenex_91 600067)) (.cse141 (div .cse143 5))) (and (<= (div (+ (* 10 .cse141) 3459800) (- 9)) v_prenex_91) (<= 0 .cse142) (not (= (mod .cse143 5) 0)) (< .cse143 0) (<= (* 250 v_prenex_48) 0) (= (mod (+ .cse141 2) (- 9)) 0) (<= (+ v_prenex_48 98) 0) (<= (div .cse142 5) c_~a0~0) (= (mod (+ .cse141 1) (- 9)) 0) (< 0 (+ v_prenex_48 147)))))) (exists ((v_prenex_69 Int) (v_prenex_24 Int)) (let ((.cse146 (div (* (- 250) v_prenex_24) 9))) (let ((.cse145 (div .cse146 5))) (let ((.cse144 (* 10 .cse145))) (and (<= 0 (+ .cse144 3459800)) (< 0 (+ v_prenex_24 147)) (<= (div (+ .cse144 3459790) (- 9)) v_prenex_69) (= (mod (+ .cse145 1) (- 9)) 0) (<= (+ v_prenex_24 98) 0) (<= (div (+ v_prenex_69 600067) 5) c_~a0~0) (<= (* 250 v_prenex_24) 0) (= 0 (mod (+ v_prenex_69 2) 5)) (= 0 (mod .cse146 5))))))) (exists ((v_prenex_18 Int) (v_~a0~0_831 Int)) (let ((.cse149 (div (* (- 250) v_prenex_18) 9))) (let ((.cse150 (div .cse149 5))) (let ((.cse148 (* 10 .cse150))) (let ((.cse147 (+ .cse148 3459790))) (and (<= (div .cse147 (- 9)) v_~a0~0_831) (< 0 (+ v_prenex_18 147)) (< (+ .cse148 3459800) 0) (<= 0 .cse147) (<= (* 250 v_prenex_18) 0) (= 0 (mod .cse149 5)) (not (= (mod (+ .cse150 2) (- 9)) 0)) (= 0 (mod (+ v_~a0~0_831 2) 5)) (<= (div (+ v_~a0~0_831 600067) 5) c_~a0~0) (<= (+ v_prenex_18 98) 0))))))) (exists ((v_prenex_159 Int) (v_prenex_160 Int)) (let ((.cse154 (div (* (- 250) v_prenex_159) 9))) (let ((.cse152 (div .cse154 5))) (let ((.cse151 (+ v_prenex_160 600067)) (.cse153 (* 10 .cse152))) (and (< 0 (+ v_prenex_159 147)) (<= (* 250 v_prenex_159) 0) (<= (+ (div .cse151 5) 1) c_~a0~0) (not (= 0 (mod (+ v_prenex_160 2) 5))) (<= (+ v_prenex_159 98) 0) (= (mod (+ .cse152 1) (- 9)) 0) (< .cse151 0) (<= (div (+ .cse153 3459790) (- 9)) v_prenex_160) (<= 0 (+ .cse153 3459800)) (= 0 (mod .cse154 5))))))) (exists ((v_prenex_139 Int) (v_prenex_46 Int)) (let ((.cse155 (div (* (- 250) v_prenex_46) 9))) (let ((.cse156 (div .cse155 5))) (and (< 0 (+ v_prenex_46 147)) (= 0 (mod (+ v_prenex_139 2) 5)) (= (mod .cse155 5) 0) (<= (div (+ v_prenex_139 600067) 5) c_~a0~0) (<= (div (+ (* 10 .cse156) 3459790) (- 9)) v_prenex_139) (<= (* 250 v_prenex_46) 0) (= (mod (+ .cse156 2) (- 9)) 0) (= 0 (mod (+ .cse156 1) (- 9))) (<= (+ v_prenex_46 98) 0))))) (exists ((v_prenex_28 Int) (v_prenex_89 Int)) (let ((.cse157 (div (* (- 250) v_prenex_28) 9))) (let ((.cse160 (* 10 (div .cse157 5)))) (let ((.cse159 (+ v_prenex_89 600067)) (.cse158 (+ .cse160 3459800))) (and (not (= 0 (mod .cse157 5))) (<= (div .cse158 (- 9)) v_prenex_89) (<= (+ v_prenex_28 98) 0) (<= (* 250 v_prenex_28) 0) (< 0 (+ v_prenex_28 147)) (<= (+ (div .cse159 5) 1) c_~a0~0) (<= 0 (+ .cse160 3459790)) (< .cse157 0) (< .cse159 0) (not (= 0 (mod (+ v_prenex_89 2) 5))) (<= 0 .cse158)))))) (exists ((v_prenex_183 Int) (v_prenex_184 Int)) (let ((.cse161 (div (* (- 250) v_prenex_183) 9))) (let ((.cse162 (+ v_prenex_184 600067)) (.cse163 (div .cse161 5))) (and (<= (+ v_prenex_183 98) 0) (not (= 0 (mod (+ v_prenex_184 2) 5))) (= (mod .cse161 5) 0) (< .cse162 0) (= 0 (mod (+ .cse163 1) (- 9))) (<= (+ (div .cse162 5) 1) c_~a0~0) (<= (div (+ (* 10 .cse163) 3459790) (- 9)) v_prenex_184) (< 0 (+ v_prenex_183 147)) (= (mod (+ .cse163 2) (- 9)) 0) (<= (* 250 v_prenex_183) 0))))) (exists ((v_prenex_67 Int) (v_prenex_42 Int)) (let ((.cse167 (div (* (- 250) v_prenex_42) 9))) (let ((.cse164 (div .cse167 5))) (let ((.cse166 (+ v_prenex_67 600067)) (.cse165 (+ (* 10 .cse164) 3459800))) (and (<= (+ v_prenex_42 98) 0) (not (= 0 (mod (+ v_prenex_67 2) 5))) (not (= 0 (mod (+ .cse164 2) (- 9)))) (< .cse165 0) (< .cse166 0) (not (= (mod .cse167 5) 0)) (< 0 (+ v_prenex_42 147)) (= (mod (+ .cse164 1) (- 9)) 0) (< .cse167 0) (<= (* 250 v_prenex_42) 0) (<= (+ (div .cse166 5) 1) c_~a0~0) (<= (div .cse165 (- 9)) (+ v_prenex_67 1))))))) (exists ((v_prenex_101 Int) (v_prenex_62 Int)) (let ((.cse170 (div (* (- 250) v_prenex_62) 9))) (let ((.cse169 (div .cse170 5))) (let ((.cse171 (* 10 .cse169))) (let ((.cse168 (+ .cse171 3459790))) (and (<= (div (+ v_prenex_101 600067) 5) c_~a0~0) (= 0 (mod (+ v_prenex_101 2) 5)) (<= (div .cse168 (- 9)) (+ v_prenex_101 1)) (<= (* 250 v_prenex_62) 0) (< .cse168 0) (not (= 0 (mod (+ .cse169 1) (- 9)))) (<= 0 .cse170) (<= 0 (+ .cse171 3459800)) (<= (+ v_prenex_62 98) 0) (< 0 (+ v_prenex_62 147)))))))) (exists ((v_prenex_77 Int) (v_prenex_60 Int)) (let ((.cse172 (div (* (- 250) v_prenex_60) 9))) (let ((.cse174 (div .cse172 5))) (let ((.cse173 (+ (* 10 .cse174) 3459790)) (.cse175 (+ v_prenex_77 600067))) (and (<= 0 .cse172) (<= (* 250 v_prenex_60) 0) (<= (div .cse173 (- 9)) (+ v_prenex_77 1)) (<= (+ v_prenex_60 98) 0) (< 0 (+ v_prenex_60 147)) (< .cse173 0) (not (= (mod (+ .cse174 1) (- 9)) 0)) (= 0 (mod (+ .cse174 2) (- 9))) (<= (div .cse175 5) c_~a0~0) (<= 0 .cse175)))))) (exists ((v_prenex_109 Int) (v_prenex_108 Int)) (let ((.cse179 (div (* (- 250) v_prenex_108) 9))) (let ((.cse177 (div .cse179 5))) (let ((.cse176 (* 10 .cse177))) (let ((.cse178 (+ .cse176 3459790))) (and (< (+ .cse176 3459800) 0) (<= (+ v_prenex_108 98) 0) (< 0 (+ v_prenex_108 147)) (not (= (mod (+ .cse177 2) (- 9)) 0)) (< .cse178 0) (= 0 (mod (+ v_prenex_109 2) 5)) (<= (div (+ v_prenex_109 600067) 5) c_~a0~0) (<= 0 .cse179) (not (= 0 (mod (+ .cse177 1) (- 9)))) (<= (* 250 v_prenex_108) 0) (<= (div .cse178 (- 9)) (+ v_prenex_109 1)))))))) (exists ((v_prenex_178 Int) (v_prenex_177 Int)) (let ((.cse183 (div (* (- 250) v_prenex_177) 9))) (let ((.cse181 (div .cse183 5))) (let ((.cse180 (+ (* 10 .cse181) 3459800)) (.cse182 (+ v_prenex_178 600067))) (and (< .cse180 0) (< 0 (+ v_prenex_177 147)) (not (= 0 (mod (+ .cse181 2) (- 9)))) (<= (+ v_prenex_177 98) 0) (= (mod (+ .cse181 1) (- 9)) 0) (<= 0 .cse182) (<= (* 250 v_prenex_177) 0) (< .cse183 0) (not (= (mod .cse183 5) 0)) (<= (div .cse180 (- 9)) (+ v_prenex_178 1)) (<= (div .cse182 5) c_~a0~0)))))) (exists ((v_prenex_185 Int) (v_prenex_186 Int)) (let ((.cse186 (div (* (- 250) v_prenex_185) 9))) (let ((.cse187 (div .cse186 5))) (let ((.cse185 (* 10 .cse187))) (let ((.cse184 (+ .cse185 3459800)) (.cse188 (+ v_prenex_186 600067))) (and (< .cse184 0) (<= (+ v_prenex_185 98) 0) (<= (* 250 v_prenex_185) 0) (< (+ .cse185 3459790) 0) (<= (div .cse184 (- 9)) (+ v_prenex_186 1)) (not (= (mod .cse186 5) 0)) (not (= 0 (mod (+ .cse187 1) (- 9)))) (not (= (mod (+ .cse187 2) (- 9)) 0)) (< .cse188 0) (not (= 0 (mod (+ v_prenex_186 2) 5))) (<= (+ (div .cse188 5) 1) c_~a0~0) (< .cse186 0) (< 0 (+ v_prenex_185 147)))))))) (exists ((v_prenex_161 Int) (v_prenex_162 Int)) (let ((.cse191 (div (* (- 250) v_prenex_161) 9))) (let ((.cse192 (* 10 (div .cse191 5)))) (let ((.cse189 (+ v_prenex_162 600067)) (.cse190 (+ .cse192 3459790))) (and (<= (div .cse189 5) c_~a0~0) (< 0 (+ v_prenex_161 147)) (<= 0 .cse189) (<= (div .cse190 (- 9)) v_prenex_162) (<= 0 .cse191) (<= (+ v_prenex_161 98) 0) (<= 0 .cse190) (<= 0 (+ .cse192 3459800)) (<= (* 250 v_prenex_161) 0)))))) (exists ((v_prenex_174 Int) (v_prenex_173 Int)) (let ((.cse193 (div (* (- 250) v_prenex_174) 9))) (let ((.cse194 (div .cse193 5))) (let ((.cse197 (* 10 .cse194))) (let ((.cse195 (+ v_prenex_173 600067)) (.cse196 (+ .cse197 3459790))) (and (= 0 (mod .cse193 5)) (<= (+ v_prenex_174 98) 0) (<= (* 250 v_prenex_174) 0) (not (= 0 (mod (+ .cse194 1) (- 9)))) (< 0 (+ v_prenex_174 147)) (<= (div .cse195 5) c_~a0~0) (<= 0 .cse195) (< .cse196 0) (<= (div .cse196 (- 9)) (+ v_prenex_173 1)) (<= 0 (+ .cse197 3459800)))))))) (exists ((v_prenex_103 Int) (v_prenex_104 Int)) (let ((.cse199 (div (* (- 250) v_prenex_104) 9))) (let ((.cse198 (div .cse199 5))) (let ((.cse201 (* 10 .cse198))) (let ((.cse200 (+ .cse201 3459800)) (.cse202 (+ v_prenex_103 600067))) (and (not (= 0 (mod (+ .cse198 1) (- 9)))) (<= (+ v_prenex_104 98) 0) (< 0 (+ v_prenex_104 147)) (not (= (mod .cse199 5) 0)) (<= (div .cse200 (- 9)) v_prenex_103) (< .cse199 0) (< (+ .cse201 3459790) 0) (<= 0 .cse200) (not (= 0 (mod (+ v_prenex_103 2) 5))) (<= (* 250 v_prenex_104) 0) (< .cse202 0) (<= (+ (div .cse202 5) 1) c_~a0~0))))))) (exists ((v_prenex_26 Int) (v_prenex_83 Int)) (let ((.cse203 (div (* (- 250) v_prenex_26) 9))) (let ((.cse204 (div .cse203 5))) (let ((.cse205 (+ (* 10 .cse204) 3459800)) (.cse206 (+ v_prenex_83 600067))) (and (< .cse203 0) (= 0 (mod (+ .cse204 1) (- 9))) (< 0 (+ v_prenex_26 147)) (<= 0 .cse205) (<= (+ (div .cse206 5) 1) c_~a0~0) (not (= 0 (mod .cse203 5))) (<= (+ v_prenex_26 98) 0) (<= (* 250 v_prenex_26) 0) (not (= 0 (mod (+ v_prenex_83 2) 5))) (<= (div .cse205 (- 9)) v_prenex_83) (< .cse206 0)))))) (exists ((v_prenex_102 Int) (v_prenex_30 Int)) (let ((.cse209 (div (* (- 250) v_prenex_30) 9))) (let ((.cse207 (div .cse209 5))) (let ((.cse208 (+ (* 10 .cse207) 3459790))) (and (not (= (mod (+ .cse207 1) (- 9)) 0)) (<= (div (+ v_prenex_102 600067) 5) c_~a0~0) (<= (div .cse208 (- 9)) (+ v_prenex_102 1)) (<= (* 250 v_prenex_30) 0) (= 0 (mod (+ .cse207 2) (- 9))) (< 0 (+ v_prenex_30 147)) (<= (+ v_prenex_30 98) 0) (= (mod .cse209 5) 0) (= 0 (mod (+ v_prenex_102 2) 5)) (< .cse208 0)))))) (exists ((v_prenex_112 Int) (v_prenex_40 Int)) (let ((.cse214 (div (* (- 250) v_prenex_40) 9))) (let ((.cse210 (div .cse214 5))) (let ((.cse213 (* 10 .cse210))) (let ((.cse211 (+ v_prenex_112 600067)) (.cse212 (+ .cse213 3459790))) (and (< 0 (+ v_prenex_40 147)) (<= (* 250 v_prenex_40) 0) (not (= (mod (+ .cse210 1) (- 9)) 0)) (< .cse211 0) (<= (+ (div .cse211 5) 1) c_~a0~0) (<= (div .cse212 (- 9)) (+ v_prenex_112 1)) (< .cse212 0) (< (+ .cse213 3459800) 0) (not (= 0 (mod (+ .cse210 2) (- 9)))) (not (= 0 (mod (+ v_prenex_112 2) 5))) (<= (+ v_prenex_40 98) 0) (= (mod .cse214 5) 0))))))) (exists ((v_prenex_81 Int) (v_prenex_82 Int)) (let ((.cse215 (div (* (- 250) v_prenex_82) 9))) (let ((.cse217 (div .cse215 5))) (let ((.cse216 (+ (* 10 .cse217) 3459800))) (and (<= (div (+ v_prenex_81 600067) 5) c_~a0~0) (< 0 (+ v_prenex_82 147)) (= 0 (mod (+ v_prenex_81 2) 5)) (< .cse215 0) (not (= (mod .cse215 5) 0)) (<= (+ v_prenex_82 98) 0) (<= (* 250 v_prenex_82) 0) (<= (div .cse216 (- 9)) (+ v_prenex_81 1)) (< .cse216 0) (not (= 0 (mod (+ .cse217 2) (- 9)))) (= (mod (+ .cse217 1) (- 9)) 0)))))) (exists ((v_prenex_132 Int) (v_prenex_131 Int)) (let ((.cse221 (div (* (- 250) v_prenex_131) 9))) (let ((.cse220 (div .cse221 5))) (let ((.cse219 (* 10 .cse220)) (.cse218 (+ v_prenex_132 600067))) (and (<= 0 .cse218) (<= (* 250 v_prenex_131) 0) (<= (div (+ .cse219 3459790) (- 9)) v_prenex_132) (= (mod (+ .cse220 1) (- 9)) 0) (<= (+ v_prenex_131 98) 0) (= 0 (mod .cse221 5)) (< 0 (+ v_prenex_131 147)) (<= 0 (+ .cse219 3459800)) (<= (div .cse218 5) c_~a0~0)))))) (exists ((v_prenex_110 Int) (v_prenex_111 Int)) (let ((.cse223 (div (* (- 250) v_prenex_111) 9))) (let ((.cse225 (* 10 (div .cse223 5)))) (let ((.cse224 (+ .cse225 3459790)) (.cse222 (+ v_prenex_110 600067))) (and (<= (+ (div .cse222 5) 1) c_~a0~0) (= (mod .cse223 5) 0) (<= 0 .cse224) (<= (* 250 v_prenex_111) 0) (not (= 0 (mod (+ v_prenex_110 2) 5))) (<= (div .cse224 (- 9)) v_prenex_110) (< 0 (+ v_prenex_111 147)) (< .cse222 0) (<= 0 (+ .cse225 3459800)) (<= (+ v_prenex_111 98) 0)))))) (exists ((v_prenex_179 Int) (v_prenex_180 Int)) (let ((.cse226 (div (* (- 250) v_prenex_179) 9))) (let ((.cse227 (div .cse226 5))) (let ((.cse228 (+ v_prenex_180 600067)) (.cse229 (* 10 .cse227))) (and (= (mod .cse226 5) 0) (not (= 0 (mod (+ .cse227 2) (- 9)))) (< 0 (+ v_prenex_179 147)) (<= 0 .cse228) (<= (+ v_prenex_179 98) 0) (= 0 (mod (+ .cse227 1) (- 9))) (<= (div .cse228 5) c_~a0~0) (<= (div (+ .cse229 3459790) (- 9)) v_prenex_180) (<= (* 250 v_prenex_179) 0) (< (+ .cse229 3459800) 0)))))) (exists ((v_prenex_123 Int) (v_prenex_124 Int)) (let ((.cse231 (div (* (- 250) v_prenex_124) 9))) (let ((.cse232 (div .cse231 5))) (let ((.cse230 (* 10 .cse232)) (.cse233 (+ v_prenex_123 600067))) (and (<= (div (+ .cse230 3459790) (- 9)) v_prenex_123) (<= 0 .cse231) (<= (+ v_prenex_124 98) 0) (not (= (mod (+ .cse232 2) (- 9)) 0)) (<= (div .cse233 5) c_~a0~0) (= 0 (mod (+ .cse232 1) (- 9))) (< 0 (+ v_prenex_124 147)) (<= (* 250 v_prenex_124) 0) (< (+ .cse230 3459800) 0) (<= 0 .cse233)))))) (exists ((v_prenex_70 Int) (v_prenex_71 Int)) (let ((.cse235 (div (* (- 250) v_prenex_70) 9))) (let ((.cse238 (div .cse235 5))) (let ((.cse237 (* 10 .cse238))) (let ((.cse234 (+ .cse237 3459790)) (.cse236 (+ v_prenex_71 600067))) (and (not (= 0 (mod (+ v_prenex_71 2) 5))) (<= (* 250 v_prenex_70) 0) (<= (div .cse234 (- 9)) v_prenex_71) (= 0 (mod .cse235 5)) (<= (+ (div .cse236 5) 1) c_~a0~0) (<= (+ v_prenex_70 98) 0) (< 0 (+ v_prenex_70 147)) (<= 0 .cse234) (< (+ .cse237 3459800) 0) (not (= (mod (+ .cse238 2) (- 9)) 0)) (< .cse236 0))))))) (exists ((v_prenex_147 Int) (v_prenex_148 Int)) (let ((.cse243 (div (* (- 250) v_prenex_147) 9))) (let ((.cse242 (div .cse243 5))) (let ((.cse241 (* 10 .cse242))) (let ((.cse240 (+ .cse241 3459790)) (.cse239 (+ v_prenex_148 600067))) (and (<= (div .cse239 5) c_~a0~0) (<= 0 .cse240) (< (+ .cse241 3459800) 0) (< 0 (+ v_prenex_147 147)) (<= (div .cse240 (- 9)) v_prenex_148) (<= (+ v_prenex_147 98) 0) (<= 0 .cse239) (not (= (mod (+ .cse242 2) (- 9)) 0)) (<= 0 .cse243) (<= (* 250 v_prenex_147) 0))))))) (exists ((v_prenex_84 Int) (v_prenex_54 Int)) (let ((.cse244 (div (* (- 250) v_prenex_54) 9))) (let ((.cse247 (div .cse244 5))) (let ((.cse248 (* 10 .cse247))) (let ((.cse245 (+ .cse248 3459790)) (.cse246 (+ v_prenex_84 600067))) (and (not (= 0 (mod (+ v_prenex_84 2) 5))) (<= (* 250 v_prenex_54) 0) (<= (+ v_prenex_54 98) 0) (< 0 (+ v_prenex_54 147)) (<= 0 .cse244) (<= 0 .cse245) (<= (+ (div .cse246 5) 1) c_~a0~0) (<= (div .cse245 (- 9)) v_prenex_84) (not (= (mod (+ .cse247 2) (- 9)) 0)) (< (+ .cse248 3459800) 0) (< .cse246 0))))))) (exists ((v_prenex_192 Int) (v_prenex_191 Int)) (let ((.cse251 (div (* (- 250) v_prenex_192) 9))) (let ((.cse250 (div .cse251 5))) (let ((.cse249 (+ v_prenex_191 600067)) (.cse252 (* 10 .cse250))) (and (< .cse249 0) (not (= 0 (mod (+ v_prenex_191 2) 5))) (<= (+ v_prenex_192 98) 0) (= 0 (mod (+ .cse250 1) (- 9))) (not (= (mod (+ .cse250 2) (- 9)) 0)) (<= 0 .cse251) (<= (div (+ .cse252 3459790) (- 9)) v_prenex_191) (<= (+ (div .cse249 5) 1) c_~a0~0) (< 0 (+ v_prenex_192 147)) (< (+ .cse252 3459800) 0) (<= (* 250 v_prenex_192) 0)))))) (exists ((v_prenex_163 Int) (v_prenex_164 Int)) (let ((.cse254 (div (* (- 250) v_prenex_163) 9))) (let ((.cse256 (div .cse254 5))) (let ((.cse255 (* 10 .cse256))) (let ((.cse253 (+ .cse255 3459800))) (and (<= (div (+ v_prenex_164 600067) 5) c_~a0~0) (<= (* 250 v_prenex_163) 0) (<= (div .cse253 (- 9)) v_prenex_164) (< .cse254 0) (< (+ .cse255 3459790) 0) (<= (+ v_prenex_163 98) 0) (not (= 0 (mod (+ .cse256 1) (- 9)))) (<= 0 .cse253) (not (= (mod .cse254 5) 0)) (= 0 (mod (+ v_prenex_164 2) 5)) (< 0 (+ v_prenex_163 147)))))))) (exists ((v_prenex_22 Int) (v_prenex_88 Int)) (let ((.cse261 (div (* (- 250) v_prenex_22) 9))) (let ((.cse257 (div .cse261 5))) (let ((.cse260 (* 10 .cse257))) (let ((.cse258 (+ .cse260 3459790)) (.cse259 (+ v_prenex_88 600067))) (and (<= (* 250 v_prenex_22) 0) (not (= 0 (mod (+ .cse257 1) (- 9)))) (< .cse258 0) (<= (div .cse258 (- 9)) (+ v_prenex_88 1)) (<= (div .cse259 5) c_~a0~0) (< 0 (+ v_prenex_22 147)) (not (= (mod (+ .cse257 2) (- 9)) 0)) (<= (+ v_prenex_22 98) 0) (< (+ .cse260 3459800) 0) (<= 0 .cse261) (<= 0 .cse259))))))) (exists ((v_prenex_176 Int) (v_prenex_175 Int)) (let ((.cse265 (div (* (- 250) v_prenex_175) 9))) (let ((.cse264 (div .cse265 5))) (let ((.cse263 (* 10 .cse264))) (let ((.cse262 (+ .cse263 3459790))) (and (< .cse262 0) (< (+ .cse263 3459800) 0) (<= (div (+ v_prenex_176 600067) 5) c_~a0~0) (< 0 (+ v_prenex_175 147)) (<= (+ v_prenex_175 98) 0) (not (= 0 (mod (+ .cse264 2) (- 9)))) (<= (div .cse262 (- 9)) (+ v_prenex_176 1)) (= (mod .cse265 5) 0) (<= (* 250 v_prenex_175) 0) (not (= (mod (+ .cse264 1) (- 9)) 0)) (= 0 (mod (+ v_prenex_176 2) 5)))))))) (exists ((v_prenex_85 Int) (v_prenex_86 Int)) (let ((.cse266 (div (* (- 250) v_prenex_86) 9))) (let ((.cse268 (div .cse266 5))) (let ((.cse267 (* 10 .cse268)) (.cse269 (+ v_prenex_85 600067))) (and (<= (+ v_prenex_86 98) 0) (not (= 0 (mod .cse266 5))) (< .cse266 0) (<= 0 (+ .cse267 3459790)) (<= (div (+ .cse267 3459800) (- 9)) v_prenex_85) (= 0 (mod (+ .cse268 2) (- 9))) (<= (div .cse269 5) c_~a0~0) (<= (* 250 v_prenex_86) 0) (< 0 (+ v_prenex_86 147)) (<= 0 .cse269)))))) (exists ((v_prenex_34 Int) (v_prenex_113 Int)) (let ((.cse271 (div (* (- 250) v_prenex_34) 9))) (let ((.cse273 (div .cse271 5))) (let ((.cse270 (* 10 .cse273)) (.cse272 (+ v_prenex_113 600067))) (and (not (= 0 (mod (+ v_prenex_113 2) 5))) (<= (div (+ .cse270 3459790) (- 9)) v_prenex_113) (<= (* 250 v_prenex_34) 0) (<= 0 .cse271) (< 0 (+ v_prenex_34 147)) (< .cse272 0) (<= 0 (+ .cse270 3459800)) (<= (+ v_prenex_34 98) 0) (= (mod (+ .cse273 1) (- 9)) 0) (<= (+ (div .cse272 5) 1) c_~a0~0)))))) (exists ((v_prenex_156 Int) (v_prenex_155 Int)) (let ((.cse277 (div (* (- 250) v_prenex_155) 9))) (let ((.cse276 (div .cse277 5))) (let ((.cse274 (+ v_prenex_156 600067)) (.cse275 (+ (* 10 .cse276) 3459790))) (and (<= 0 .cse274) (<= (div .cse275 (- 9)) (+ v_prenex_156 1)) (<= (* 250 v_prenex_155) 0) (not (= (mod (+ .cse276 1) (- 9)) 0)) (= (mod .cse277 5) 0) (<= (div .cse274 5) c_~a0~0) (< 0 (+ v_prenex_155 147)) (= 0 (mod (+ .cse276 2) (- 9))) (<= (+ v_prenex_155 98) 0) (< .cse275 0)))))) (exists ((v_prenex_152 Int) (v_prenex_151 Int)) (let ((.cse280 (div (* (- 250) v_prenex_151) 9))) (let ((.cse279 (div .cse280 5))) (let ((.cse278 (* 10 .cse279))) (and (<= (* 250 v_prenex_151) 0) (< 0 (+ v_prenex_151 147)) (= 0 (mod (+ v_prenex_152 2) 5)) (< (+ .cse278 3459800) 0) (not (= 0 (mod (+ .cse279 2) (- 9)))) (<= (div (+ v_prenex_152 600067) 5) c_~a0~0) (= (mod .cse280 5) 0) (<= (div (+ .cse278 3459790) (- 9)) v_prenex_152) (= 0 (mod (+ .cse279 1) (- 9))) (<= (+ v_prenex_151 98) 0)))))) (exists ((v_prenex_99 Int) (v_prenex_100 Int)) (let ((.cse284 (div (* (- 250) v_prenex_100) 9))) (let ((.cse282 (div .cse284 5))) (let ((.cse281 (+ (* 10 .cse282) 3459790)) (.cse283 (+ v_prenex_99 600067))) (and (<= (div .cse281 (- 9)) v_prenex_99) (= 0 (mod (+ .cse282 2) (- 9))) (< .cse283 0) (<= 0 .cse281) (= 0 (mod .cse284 5)) (<= (+ v_prenex_100 98) 0) (<= (+ (div .cse283 5) 1) c_~a0~0) (< 0 (+ v_prenex_100 147)) (not (= 0 (mod (+ v_prenex_99 2) 5))) (<= (* 250 v_prenex_100) 0)))))) (exists ((v_prenex_74 Int) (v_prenex_9 Int)) (let ((.cse285 (div (* (- 250) v_prenex_9) 9))) (let ((.cse286 (div .cse285 5))) (let ((.cse288 (* 10 .cse286))) (let ((.cse287 (+ .cse288 3459800)) (.cse289 (+ v_prenex_74 600067))) (and (<= (+ v_prenex_9 98) 0) (<= (* 250 v_prenex_9) 0) (< .cse285 0) (not (= 0 (mod (+ .cse286 2) (- 9)))) (not (= 0 (mod .cse285 5))) (< .cse287 0) (< 0 (+ v_prenex_9 147)) (<= 0 (+ .cse288 3459790)) (<= 0 .cse289) (<= (div .cse287 (- 9)) (+ v_prenex_74 1)) (<= (div .cse289 5) c_~a0~0))))))) (exists ((v_prenex_16 Int) (v_prenex_107 Int)) (let ((.cse291 (div (* (- 250) v_prenex_16) 9))) (let ((.cse290 (div .cse291 5))) (and (< 0 (+ v_prenex_16 147)) (= 0 (mod (+ v_prenex_107 2) 5)) (= (mod (+ .cse290 1) (- 9)) 0) (<= (+ v_prenex_16 98) 0) (<= (div (+ v_prenex_107 600067) 5) c_~a0~0) (<= 0 .cse291) (<= (* 250 v_prenex_16) 0) (= 0 (mod (+ .cse290 2) (- 9))) (<= (div (+ (* 10 .cse290) 3459790) (- 9)) v_prenex_107))))) (exists ((v_prenex_154 Int) (v_prenex_153 Int)) (let ((.cse292 (div (* (- 250) v_prenex_153) 9))) (let ((.cse293 (* 10 (div .cse292 5)))) (let ((.cse294 (+ .cse293 3459790))) (and (<= (div (+ v_prenex_154 600067) 5) c_~a0~0) (<= (+ v_prenex_153 98) 0) (<= (* 250 v_prenex_153) 0) (= (mod .cse292 5) 0) (<= 0 (+ .cse293 3459800)) (= 0 (mod (+ v_prenex_154 2) 5)) (<= (div .cse294 (- 9)) v_prenex_154) (< 0 (+ v_prenex_153 147)) (<= 0 .cse294)))))) (exists ((v_prenex_130 Int) (v_prenex_129 Int)) (let ((.cse295 (div (* (- 250) v_prenex_130) 9))) (let ((.cse296 (div .cse295 5))) (let ((.cse297 (* 10 .cse296))) (let ((.cse299 (+ v_prenex_129 600067)) (.cse298 (+ .cse297 3459800))) (and (not (= 0 (mod .cse295 5))) (not (= 0 (mod (+ .cse296 2) (- 9)))) (<= 0 (+ .cse297 3459790)) (<= (div .cse298 (- 9)) (+ v_prenex_129 1)) (<= (+ (div .cse299 5) 1) c_~a0~0) (<= (* 250 v_prenex_130) 0) (not (= 0 (mod (+ v_prenex_129 2) 5))) (< 0 (+ v_prenex_130 147)) (< .cse299 0) (< .cse295 0) (<= (+ v_prenex_130 98) 0) (< .cse298 0))))))) (exists ((v_prenex_187 Int) (v_prenex_188 Int)) (let ((.cse303 (div (* (- 250) v_prenex_187) 9))) (let ((.cse302 (div .cse303 5))) (let ((.cse300 (+ (* 10 .cse302) 3459790)) (.cse301 (+ v_prenex_188 600067))) (and (<= (div .cse300 (- 9)) (+ v_prenex_188 1)) (<= (+ (div .cse301 5) 1) c_~a0~0) (< .cse300 0) (<= (* 250 v_prenex_187) 0) (not (= (mod (+ .cse302 1) (- 9)) 0)) (< 0 (+ v_prenex_187 147)) (= 0 (mod (+ .cse302 2) (- 9))) (<= 0 .cse303) (not (= 0 (mod (+ v_prenex_188 2) 5))) (< .cse301 0) (<= (+ v_prenex_187 98) 0)))))) (exists ((v_prenex_172 Int) (v_prenex_171 Int)) (let ((.cse307 (div (* (- 250) v_prenex_171) 9))) (let ((.cse305 (* 10 (div .cse307 5)))) (let ((.cse304 (+ .cse305 3459800)) (.cse306 (+ v_prenex_172 600067))) (and (< 0 (+ v_prenex_171 147)) (<= 0 .cse304) (<= 0 (+ .cse305 3459790)) (<= 0 .cse306) (<= (+ v_prenex_171 98) 0) (<= (div .cse304 (- 9)) v_prenex_172) (<= (* 250 v_prenex_171) 0) (< .cse307 0) (not (= 0 (mod .cse307 5))) (<= (div .cse306 5) c_~a0~0)))))) (exists ((v_prenex_141 Int) (v_prenex_140 Int)) (let ((.cse309 (div (* (- 250) v_prenex_140) 9))) (let ((.cse310 (div .cse309 5))) (let ((.cse311 (* 10 .cse310))) (let ((.cse308 (+ .cse311 3459800))) (and (< .cse308 0) (< .cse309 0) (= 0 (mod (+ v_prenex_141 2) 5)) (not (= 0 (mod (+ .cse310 1) (- 9)))) (< (+ .cse311 3459790) 0) (< 0 (+ v_prenex_140 147)) (<= (div (+ v_prenex_141 600067) 5) c_~a0~0) (not (= (mod (+ .cse310 2) (- 9)) 0)) (<= (+ v_prenex_140 98) 0) (<= (* 250 v_prenex_140) 0) (<= (div .cse308 (- 9)) (+ v_prenex_141 1)) (not (= (mod .cse309 5) 0)))))))) (exists ((v_prenex_158 Int) (v_prenex_157 Int)) (let ((.cse314 (div (* (- 250) v_prenex_158) 9))) (let ((.cse312 (+ v_prenex_157 600067)) (.cse313 (div .cse314 5))) (and (<= (div .cse312 5) c_~a0~0) (<= (+ v_prenex_158 98) 0) (<= (* 250 v_prenex_158) 0) (<= 0 .cse312) (= (mod (+ .cse313 1) (- 9)) 0) (< 0 (+ v_prenex_158 147)) (<= 0 .cse314) (= 0 (mod (+ .cse313 2) (- 9))) (<= (div (+ (* 10 .cse313) 3459790) (- 9)) v_prenex_157)))))) is different from false Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown