./Ultimate.py --spec /storage/repos/svcomp/c/properties/unreach-call.prp --file /storage/repos/svcomp/c/pthread-wmm/safe029_rmo.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 91b1670e Calling Ultimate with: java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i /storage/repos/svcomp/c/pthread-wmm/safe029_rmo.opt_false-unreach-call.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 268f6c11f16694e91f5909169c21d5ec84460cb7 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-91b1670 [2018-11-28 20:37:57,151 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 20:37:57,153 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 20:37:57,166 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 20:37:57,166 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 20:37:57,168 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 20:37:57,169 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 20:37:57,171 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 20:37:57,173 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 20:37:57,174 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 20:37:57,175 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 20:37:57,175 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 20:37:57,177 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 20:37:57,178 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 20:37:57,179 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 20:37:57,180 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 20:37:57,181 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 20:37:57,183 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 20:37:57,185 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 20:37:57,187 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 20:37:57,189 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 20:37:57,190 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 20:37:57,193 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 20:37:57,193 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 20:37:57,193 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 20:37:57,194 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 20:37:57,196 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 20:37:57,197 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 20:37:57,198 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 20:37:57,199 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 20:37:57,199 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 20:37:57,200 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 20:37:57,200 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 20:37:57,200 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 20:37:57,202 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 20:37:57,203 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 20:37:57,203 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-28 20:37:57,222 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 20:37:57,222 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 20:37:57,223 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 20:37:57,224 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 20:37:57,225 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 20:37:57,225 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 20:37:57,225 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 20:37:57,225 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 20:37:57,226 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 20:37:57,226 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 20:37:57,227 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 20:37:57,227 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 20:37:57,227 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-28 20:37:57,227 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 20:37:57,227 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-28 20:37:57,228 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 20:37:57,228 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-28 20:37:57,228 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 20:37:57,228 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-28 20:37:57,228 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 20:37:57,228 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 20:37:57,229 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 20:37:57,229 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 20:37:57,229 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 20:37:57,229 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 20:37:57,229 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 20:37:57,230 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-28 20:37:57,232 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 20:37:57,232 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 20:37:57,232 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-28 20:37:57,232 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 268f6c11f16694e91f5909169c21d5ec84460cb7 [2018-11-28 20:37:57,270 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 20:37:57,286 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 20:37:57,290 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 20:37:57,292 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 20:37:57,292 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 20:37:57,293 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/svcomp/c/pthread-wmm/safe029_rmo.opt_false-unreach-call.i [2018-11-28 20:37:57,367 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1179785a9/8624e7dcd2044d6c95feba92a7f8f658/FLAG1e19403ed [2018-11-28 20:37:57,965 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 20:37:57,969 INFO L161 CDTParser]: Scanning /storage/repos/svcomp/c/pthread-wmm/safe029_rmo.opt_false-unreach-call.i [2018-11-28 20:37:57,998 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1179785a9/8624e7dcd2044d6c95feba92a7f8f658/FLAG1e19403ed [2018-11-28 20:37:58,198 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1179785a9/8624e7dcd2044d6c95feba92a7f8f658 [2018-11-28 20:37:58,204 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 20:37:58,206 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-28 20:37:58,208 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 20:37:58,212 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 20:37:58,218 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 20:37:58,219 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 08:37:58" (1/1) ... [2018-11-28 20:37:58,225 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@ea4f66f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:58, skipping insertion in model container [2018-11-28 20:37:58,226 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 08:37:58" (1/1) ... [2018-11-28 20:37:58,235 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 20:37:58,312 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 20:37:58,827 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 20:37:58,851 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 20:37:59,025 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 20:37:59,109 INFO L195 MainTranslator]: Completed translation [2018-11-28 20:37:59,110 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59 WrapperNode [2018-11-28 20:37:59,110 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 20:37:59,111 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-28 20:37:59,111 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-28 20:37:59,111 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-28 20:37:59,122 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (1/1) ... [2018-11-28 20:37:59,161 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (1/1) ... [2018-11-28 20:37:59,205 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-28 20:37:59,205 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 20:37:59,205 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 20:37:59,206 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 20:37:59,217 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (1/1) ... [2018-11-28 20:37:59,218 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (1/1) ... [2018-11-28 20:37:59,223 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (1/1) ... [2018-11-28 20:37:59,224 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (1/1) ... [2018-11-28 20:37:59,236 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (1/1) ... [2018-11-28 20:37:59,241 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (1/1) ... [2018-11-28 20:37:59,245 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (1/1) ... [2018-11-28 20:37:59,250 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 20:37:59,251 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 20:37:59,251 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 20:37:59,251 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 20:37:59,252 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 20:37:59,335 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 20:37:59,335 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 20:37:59,335 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-28 20:37:59,336 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 20:37:59,336 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-28 20:37:59,337 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-28 20:37:59,337 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-28 20:37:59,337 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-28 20:37:59,337 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-28 20:37:59,337 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 20:37:59,337 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 20:37:59,341 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-28 20:38:00,600 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 20:38:00,601 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-28 20:38:00,601 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 08:38:00 BoogieIcfgContainer [2018-11-28 20:38:00,602 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 20:38:00,603 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 20:38:00,603 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 20:38:00,608 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 20:38:00,609 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 08:37:58" (1/3) ... [2018-11-28 20:38:00,610 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b15c173 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 08:38:00, skipping insertion in model container [2018-11-28 20:38:00,611 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 08:37:59" (2/3) ... [2018-11-28 20:38:00,613 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b15c173 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 08:38:00, skipping insertion in model container [2018-11-28 20:38:00,615 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 08:38:00" (3/3) ... [2018-11-28 20:38:00,618 INFO L112 eAbstractionObserver]: Analyzing ICFG safe029_rmo.opt_false-unreach-call.i [2018-11-28 20:38:00,663 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,663 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,664 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,664 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,664 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,665 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,665 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,665 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,665 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,665 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,667 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,667 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,668 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,668 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,668 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,668 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,668 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,670 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,670 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,670 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,671 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,671 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,672 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,672 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,672 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,672 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,674 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,674 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,674 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,674 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,674 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,675 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,675 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,675 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet9.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,677 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,677 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,677 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,678 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,678 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,678 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,678 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,680 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,680 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,680 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,681 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,681 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,681 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,682 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,682 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,682 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,682 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,683 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,683 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,683 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,683 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,683 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,686 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,686 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,687 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,687 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,687 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,687 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,687 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,688 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,688 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,688 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,688 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet16.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,689 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet16.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,690 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,690 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,691 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet16.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,691 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet16.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-28 20:38:00,712 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-28 20:38:00,712 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 20:38:00,721 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-28 20:38:00,740 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-28 20:38:00,769 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 20:38:00,770 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 20:38:00,770 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-28 20:38:00,770 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 20:38:00,770 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 20:38:00,770 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 20:38:00,770 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 20:38:00,771 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 20:38:00,771 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 20:38:00,785 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 140places, 178 transitions [2018-11-28 20:38:02,464 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 25086 states. [2018-11-28 20:38:02,466 INFO L276 IsEmpty]: Start isEmpty. Operand 25086 states. [2018-11-28 20:38:02,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-28 20:38:02,476 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:02,477 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:02,479 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:02,486 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:02,486 INFO L82 PathProgramCache]: Analyzing trace with hash 1594278667, now seen corresponding path program 1 times [2018-11-28 20:38:02,489 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:02,490 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:02,549 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:02,550 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:02,550 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:02,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:02,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:02,886 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:02,886 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 20:38:02,891 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 20:38:02,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 20:38:02,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 20:38:02,915 INFO L87 Difference]: Start difference. First operand 25086 states. Second operand 4 states. [2018-11-28 20:38:04,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:04,122 INFO L93 Difference]: Finished difference Result 45386 states and 177624 transitions. [2018-11-28 20:38:04,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 20:38:04,124 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2018-11-28 20:38:04,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:04,546 INFO L225 Difference]: With dead ends: 45386 [2018-11-28 20:38:04,546 INFO L226 Difference]: Without dead ends: 40626 [2018-11-28 20:38:04,550 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 20:38:05,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40626 states. [2018-11-28 20:38:06,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40626 to 23660. [2018-11-28 20:38:06,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23660 states. [2018-11-28 20:38:06,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23660 states to 23660 states and 92541 transitions. [2018-11-28 20:38:06,371 INFO L78 Accepts]: Start accepts. Automaton has 23660 states and 92541 transitions. Word has length 35 [2018-11-28 20:38:06,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:06,373 INFO L480 AbstractCegarLoop]: Abstraction has 23660 states and 92541 transitions. [2018-11-28 20:38:06,373 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 20:38:06,374 INFO L276 IsEmpty]: Start isEmpty. Operand 23660 states and 92541 transitions. [2018-11-28 20:38:06,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-28 20:38:06,386 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:06,386 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:06,386 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:06,387 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:06,387 INFO L82 PathProgramCache]: Analyzing trace with hash 1049069648, now seen corresponding path program 1 times [2018-11-28 20:38:06,387 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:06,387 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:06,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:06,404 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:06,404 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:06,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:06,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:06,691 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:06,694 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 20:38:06,699 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 20:38:06,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 20:38:06,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:06,702 INFO L87 Difference]: Start difference. First operand 23660 states and 92541 transitions. Second operand 5 states. [2018-11-28 20:38:09,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:09,718 INFO L93 Difference]: Finished difference Result 64828 states and 241367 transitions. [2018-11-28 20:38:09,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 20:38:09,720 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2018-11-28 20:38:09,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:10,183 INFO L225 Difference]: With dead ends: 64828 [2018-11-28 20:38:10,183 INFO L226 Difference]: Without dead ends: 64668 [2018-11-28 20:38:10,184 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 20:38:10,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64668 states. [2018-11-28 20:38:11,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64668 to 37140. [2018-11-28 20:38:11,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37140 states. [2018-11-28 20:38:11,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37140 states to 37140 states and 138282 transitions. [2018-11-28 20:38:11,992 INFO L78 Accepts]: Start accepts. Automaton has 37140 states and 138282 transitions. Word has length 42 [2018-11-28 20:38:11,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:11,994 INFO L480 AbstractCegarLoop]: Abstraction has 37140 states and 138282 transitions. [2018-11-28 20:38:11,994 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 20:38:11,994 INFO L276 IsEmpty]: Start isEmpty. Operand 37140 states and 138282 transitions. [2018-11-28 20:38:12,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 20:38:12,001 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:12,001 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:12,001 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:12,002 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:12,002 INFO L82 PathProgramCache]: Analyzing trace with hash -888651829, now seen corresponding path program 1 times [2018-11-28 20:38:12,002 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:12,002 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:12,006 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:12,006 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:12,006 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:12,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:12,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:12,119 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:12,120 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 20:38:12,120 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 20:38:12,120 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 20:38:12,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 20:38:12,121 INFO L87 Difference]: Start difference. First operand 37140 states and 138282 transitions. Second operand 4 states. [2018-11-28 20:38:12,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:12,200 INFO L93 Difference]: Finished difference Result 12362 states and 41175 transitions. [2018-11-28 20:38:12,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 20:38:12,202 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 43 [2018-11-28 20:38:12,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:12,224 INFO L225 Difference]: With dead ends: 12362 [2018-11-28 20:38:12,225 INFO L226 Difference]: Without dead ends: 11841 [2018-11-28 20:38:12,225 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:12,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11841 states. [2018-11-28 20:38:12,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11841 to 11841. [2018-11-28 20:38:12,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11841 states. [2018-11-28 20:38:12,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11841 states to 11841 states and 39620 transitions. [2018-11-28 20:38:12,489 INFO L78 Accepts]: Start accepts. Automaton has 11841 states and 39620 transitions. Word has length 43 [2018-11-28 20:38:12,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:12,489 INFO L480 AbstractCegarLoop]: Abstraction has 11841 states and 39620 transitions. [2018-11-28 20:38:12,490 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 20:38:12,490 INFO L276 IsEmpty]: Start isEmpty. Operand 11841 states and 39620 transitions. [2018-11-28 20:38:12,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-28 20:38:12,496 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:12,496 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:12,496 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:12,497 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:12,497 INFO L82 PathProgramCache]: Analyzing trace with hash 727038507, now seen corresponding path program 1 times [2018-11-28 20:38:12,497 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:12,497 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:12,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:12,500 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:12,500 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:12,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:12,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:12,737 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:12,737 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 20:38:12,737 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 20:38:12,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 20:38:12,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 20:38:12,739 INFO L87 Difference]: Start difference. First operand 11841 states and 39620 transitions. Second operand 4 states. [2018-11-28 20:38:13,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:13,140 INFO L93 Difference]: Finished difference Result 17017 states and 55691 transitions. [2018-11-28 20:38:13,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 20:38:13,141 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 56 [2018-11-28 20:38:13,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:13,180 INFO L225 Difference]: With dead ends: 17017 [2018-11-28 20:38:13,180 INFO L226 Difference]: Without dead ends: 17017 [2018-11-28 20:38:13,181 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:13,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17017 states. [2018-11-28 20:38:13,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17017 to 12877. [2018-11-28 20:38:13,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12877 states. [2018-11-28 20:38:13,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12877 states to 12877 states and 42718 transitions. [2018-11-28 20:38:13,585 INFO L78 Accepts]: Start accepts. Automaton has 12877 states and 42718 transitions. Word has length 56 [2018-11-28 20:38:13,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:13,585 INFO L480 AbstractCegarLoop]: Abstraction has 12877 states and 42718 transitions. [2018-11-28 20:38:13,586 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 20:38:13,586 INFO L276 IsEmpty]: Start isEmpty. Operand 12877 states and 42718 transitions. [2018-11-28 20:38:13,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-28 20:38:13,594 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:13,594 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:13,594 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:13,594 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:13,595 INFO L82 PathProgramCache]: Analyzing trace with hash -1892125207, now seen corresponding path program 1 times [2018-11-28 20:38:13,595 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:13,595 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:13,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:13,597 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:13,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:13,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:13,816 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:13,816 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:13,816 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 20:38:13,817 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 20:38:13,817 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 20:38:13,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-28 20:38:13,817 INFO L87 Difference]: Start difference. First operand 12877 states and 42718 transitions. Second operand 6 states. [2018-11-28 20:38:15,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:15,178 INFO L93 Difference]: Finished difference Result 18597 states and 60828 transitions. [2018-11-28 20:38:15,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 20:38:15,184 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2018-11-28 20:38:15,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:15,223 INFO L225 Difference]: With dead ends: 18597 [2018-11-28 20:38:15,223 INFO L226 Difference]: Without dead ends: 18565 [2018-11-28 20:38:15,224 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2018-11-28 20:38:15,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18565 states. [2018-11-28 20:38:15,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18565 to 14409. [2018-11-28 20:38:15,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14409 states. [2018-11-28 20:38:15,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14409 states to 14409 states and 47547 transitions. [2018-11-28 20:38:15,561 INFO L78 Accepts]: Start accepts. Automaton has 14409 states and 47547 transitions. Word has length 56 [2018-11-28 20:38:15,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:15,561 INFO L480 AbstractCegarLoop]: Abstraction has 14409 states and 47547 transitions. [2018-11-28 20:38:15,561 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 20:38:15,562 INFO L276 IsEmpty]: Start isEmpty. Operand 14409 states and 47547 transitions. [2018-11-28 20:38:15,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 20:38:15,590 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:15,590 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:15,590 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:15,590 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:15,591 INFO L82 PathProgramCache]: Analyzing trace with hash 315883094, now seen corresponding path program 1 times [2018-11-28 20:38:15,591 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:15,591 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:15,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:15,593 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:15,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:15,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:15,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:15,778 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:15,778 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 20:38:15,779 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 20:38:15,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 20:38:15,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:15,779 INFO L87 Difference]: Start difference. First operand 14409 states and 47547 transitions. Second operand 5 states. [2018-11-28 20:38:16,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:16,387 INFO L93 Difference]: Finished difference Result 23941 states and 78280 transitions. [2018-11-28 20:38:16,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 20:38:16,387 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-11-28 20:38:16,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:16,432 INFO L225 Difference]: With dead ends: 23941 [2018-11-28 20:38:16,432 INFO L226 Difference]: Without dead ends: 23845 [2018-11-28 20:38:16,433 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:16,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23845 states. [2018-11-28 20:38:16,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23845 to 22789. [2018-11-28 20:38:16,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22789 states. [2018-11-28 20:38:16,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22789 states to 22789 states and 74768 transitions. [2018-11-28 20:38:16,855 INFO L78 Accepts]: Start accepts. Automaton has 22789 states and 74768 transitions. Word has length 70 [2018-11-28 20:38:16,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:16,856 INFO L480 AbstractCegarLoop]: Abstraction has 22789 states and 74768 transitions. [2018-11-28 20:38:16,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 20:38:16,856 INFO L276 IsEmpty]: Start isEmpty. Operand 22789 states and 74768 transitions. [2018-11-28 20:38:16,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 20:38:16,886 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:16,886 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:16,886 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:16,887 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:16,887 INFO L82 PathProgramCache]: Analyzing trace with hash 22480087, now seen corresponding path program 1 times [2018-11-28 20:38:16,887 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:16,887 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:16,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:16,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:16,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:16,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:17,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:17,013 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:17,014 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 20:38:17,014 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 20:38:17,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 20:38:17,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 20:38:17,015 INFO L87 Difference]: Start difference. First operand 22789 states and 74768 transitions. Second operand 4 states. [2018-11-28 20:38:18,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:18,331 INFO L93 Difference]: Finished difference Result 32264 states and 104461 transitions. [2018-11-28 20:38:18,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 20:38:18,332 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2018-11-28 20:38:18,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:18,392 INFO L225 Difference]: With dead ends: 32264 [2018-11-28 20:38:18,392 INFO L226 Difference]: Without dead ends: 32264 [2018-11-28 20:38:18,393 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:18,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32264 states. [2018-11-28 20:38:18,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32264 to 29029. [2018-11-28 20:38:18,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29029 states. [2018-11-28 20:38:18,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29029 states to 29029 states and 94668 transitions. [2018-11-28 20:38:18,891 INFO L78 Accepts]: Start accepts. Automaton has 29029 states and 94668 transitions. Word has length 70 [2018-11-28 20:38:18,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:18,892 INFO L480 AbstractCegarLoop]: Abstraction has 29029 states and 94668 transitions. [2018-11-28 20:38:18,892 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 20:38:18,892 INFO L276 IsEmpty]: Start isEmpty. Operand 29029 states and 94668 transitions. [2018-11-28 20:38:18,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 20:38:18,925 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:18,925 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:18,926 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:18,926 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:18,926 INFO L82 PathProgramCache]: Analyzing trace with hash 2133770456, now seen corresponding path program 1 times [2018-11-28 20:38:18,926 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:18,926 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:18,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:18,928 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:18,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:18,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:19,145 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:19,145 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:19,145 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 20:38:19,146 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 20:38:19,146 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 20:38:19,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-28 20:38:19,146 INFO L87 Difference]: Start difference. First operand 29029 states and 94668 transitions. Second operand 4 states. [2018-11-28 20:38:19,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:19,845 INFO L93 Difference]: Finished difference Result 41177 states and 132363 transitions. [2018-11-28 20:38:19,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 20:38:19,846 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2018-11-28 20:38:19,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:19,922 INFO L225 Difference]: With dead ends: 41177 [2018-11-28 20:38:19,922 INFO L226 Difference]: Without dead ends: 40929 [2018-11-28 20:38:19,922 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:20,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40929 states. [2018-11-28 20:38:20,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40929 to 35657. [2018-11-28 20:38:20,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35657 states. [2018-11-28 20:38:20,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35657 states to 35657 states and 115827 transitions. [2018-11-28 20:38:20,531 INFO L78 Accepts]: Start accepts. Automaton has 35657 states and 115827 transitions. Word has length 70 [2018-11-28 20:38:20,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:20,532 INFO L480 AbstractCegarLoop]: Abstraction has 35657 states and 115827 transitions. [2018-11-28 20:38:20,532 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 20:38:20,532 INFO L276 IsEmpty]: Start isEmpty. Operand 35657 states and 115827 transitions. [2018-11-28 20:38:20,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 20:38:20,574 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:20,574 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:20,574 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:20,575 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:20,575 INFO L82 PathProgramCache]: Analyzing trace with hash -514484136, now seen corresponding path program 1 times [2018-11-28 20:38:20,575 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:20,575 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:20,577 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:20,577 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:20,577 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:20,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:21,092 WARN L180 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 10 [2018-11-28 20:38:21,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:21,151 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:21,152 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 20:38:21,152 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 20:38:21,152 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 20:38:21,152 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-11-28 20:38:21,153 INFO L87 Difference]: Start difference. First operand 35657 states and 115827 transitions. Second operand 8 states. [2018-11-28 20:38:23,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:23,465 INFO L93 Difference]: Finished difference Result 51571 states and 162646 transitions. [2018-11-28 20:38:23,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-28 20:38:23,466 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 70 [2018-11-28 20:38:23,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:23,574 INFO L225 Difference]: With dead ends: 51571 [2018-11-28 20:38:23,574 INFO L226 Difference]: Without dead ends: 51323 [2018-11-28 20:38:23,574 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-11-28 20:38:23,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51323 states. [2018-11-28 20:38:24,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51323 to 38086. [2018-11-28 20:38:24,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38086 states. [2018-11-28 20:38:24,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38086 states to 38086 states and 123157 transitions. [2018-11-28 20:38:24,708 INFO L78 Accepts]: Start accepts. Automaton has 38086 states and 123157 transitions. Word has length 70 [2018-11-28 20:38:24,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:24,708 INFO L480 AbstractCegarLoop]: Abstraction has 38086 states and 123157 transitions. [2018-11-28 20:38:24,708 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 20:38:24,708 INFO L276 IsEmpty]: Start isEmpty. Operand 38086 states and 123157 transitions. [2018-11-28 20:38:24,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-28 20:38:24,740 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:24,740 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:24,740 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:24,740 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:24,741 INFO L82 PathProgramCache]: Analyzing trace with hash -807887143, now seen corresponding path program 1 times [2018-11-28 20:38:24,741 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:24,741 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:24,744 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:24,745 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:24,745 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:24,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:24,987 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:24,988 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:24,988 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 20:38:24,988 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 20:38:24,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 20:38:24,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:24,989 INFO L87 Difference]: Start difference. First operand 38086 states and 123157 transitions. Second operand 5 states. [2018-11-28 20:38:25,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:25,127 INFO L93 Difference]: Finished difference Result 5418 states and 14328 transitions. [2018-11-28 20:38:25,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 20:38:25,128 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-11-28 20:38:25,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:25,135 INFO L225 Difference]: With dead ends: 5418 [2018-11-28 20:38:25,135 INFO L226 Difference]: Without dead ends: 4696 [2018-11-28 20:38:25,135 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:25,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4696 states. [2018-11-28 20:38:25,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4696 to 4448. [2018-11-28 20:38:25,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4448 states. [2018-11-28 20:38:25,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4448 states to 4448 states and 11840 transitions. [2018-11-28 20:38:25,189 INFO L78 Accepts]: Start accepts. Automaton has 4448 states and 11840 transitions. Word has length 70 [2018-11-28 20:38:25,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:25,189 INFO L480 AbstractCegarLoop]: Abstraction has 4448 states and 11840 transitions. [2018-11-28 20:38:25,189 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 20:38:25,189 INFO L276 IsEmpty]: Start isEmpty. Operand 4448 states and 11840 transitions. [2018-11-28 20:38:25,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-11-28 20:38:25,195 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:25,195 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:25,195 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:25,195 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:25,195 INFO L82 PathProgramCache]: Analyzing trace with hash -1160314703, now seen corresponding path program 1 times [2018-11-28 20:38:25,196 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:25,196 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:25,198 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:25,198 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:25,198 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:25,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:25,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:25,331 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:25,331 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-28 20:38:25,332 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 20:38:25,332 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 20:38:25,332 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 20:38:25,332 INFO L87 Difference]: Start difference. First operand 4448 states and 11840 transitions. Second operand 3 states. [2018-11-28 20:38:25,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:25,494 INFO L93 Difference]: Finished difference Result 4573 states and 12119 transitions. [2018-11-28 20:38:25,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 20:38:25,496 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2018-11-28 20:38:25,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:25,502 INFO L225 Difference]: With dead ends: 4573 [2018-11-28 20:38:25,502 INFO L226 Difference]: Without dead ends: 4573 [2018-11-28 20:38:25,503 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 20:38:25,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4573 states. [2018-11-28 20:38:25,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4573 to 4506. [2018-11-28 20:38:25,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4506 states. [2018-11-28 20:38:25,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4506 states to 4506 states and 11970 transitions. [2018-11-28 20:38:25,556 INFO L78 Accepts]: Start accepts. Automaton has 4506 states and 11970 transitions. Word has length 89 [2018-11-28 20:38:25,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:25,557 INFO L480 AbstractCegarLoop]: Abstraction has 4506 states and 11970 transitions. [2018-11-28 20:38:25,557 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 20:38:25,557 INFO L276 IsEmpty]: Start isEmpty. Operand 4506 states and 11970 transitions. [2018-11-28 20:38:25,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-11-28 20:38:25,563 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:25,563 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:25,563 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:25,563 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:25,564 INFO L82 PathProgramCache]: Analyzing trace with hash 1012155850, now seen corresponding path program 1 times [2018-11-28 20:38:25,564 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:25,564 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:25,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:25,566 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:25,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:25,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:25,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:25,708 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:25,708 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 20:38:25,708 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 20:38:25,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 20:38:25,709 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:25,709 INFO L87 Difference]: Start difference. First operand 4506 states and 11970 transitions. Second operand 5 states. [2018-11-28 20:38:25,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:25,984 INFO L93 Difference]: Finished difference Result 5158 states and 13499 transitions. [2018-11-28 20:38:25,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 20:38:25,985 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 89 [2018-11-28 20:38:25,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:25,991 INFO L225 Difference]: With dead ends: 5158 [2018-11-28 20:38:25,991 INFO L226 Difference]: Without dead ends: 5130 [2018-11-28 20:38:25,992 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-28 20:38:25,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5130 states. [2018-11-28 20:38:26,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5130 to 5038. [2018-11-28 20:38:26,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5038 states. [2018-11-28 20:38:26,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5038 states to 5038 states and 13233 transitions. [2018-11-28 20:38:26,053 INFO L78 Accepts]: Start accepts. Automaton has 5038 states and 13233 transitions. Word has length 89 [2018-11-28 20:38:26,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:26,053 INFO L480 AbstractCegarLoop]: Abstraction has 5038 states and 13233 transitions. [2018-11-28 20:38:26,053 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 20:38:26,053 INFO L276 IsEmpty]: Start isEmpty. Operand 5038 states and 13233 transitions. [2018-11-28 20:38:26,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 20:38:26,059 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:26,059 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:26,059 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:26,059 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:26,060 INFO L82 PathProgramCache]: Analyzing trace with hash -1509856129, now seen corresponding path program 1 times [2018-11-28 20:38:26,060 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:26,060 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:26,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:26,061 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:26,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:26,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:26,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:26,225 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:26,225 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 20:38:26,225 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-28 20:38:26,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-28 20:38:26,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 20:38:26,226 INFO L87 Difference]: Start difference. First operand 5038 states and 13233 transitions. Second operand 4 states. [2018-11-28 20:38:26,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:26,507 INFO L93 Difference]: Finished difference Result 9234 states and 24456 transitions. [2018-11-28 20:38:26,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 20:38:26,508 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 91 [2018-11-28 20:38:26,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:26,521 INFO L225 Difference]: With dead ends: 9234 [2018-11-28 20:38:26,521 INFO L226 Difference]: Without dead ends: 9206 [2018-11-28 20:38:26,521 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-28 20:38:26,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9206 states. [2018-11-28 20:38:26,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9206 to 4900. [2018-11-28 20:38:26,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4900 states. [2018-11-28 20:38:26,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4900 states to 4900 states and 12810 transitions. [2018-11-28 20:38:26,625 INFO L78 Accepts]: Start accepts. Automaton has 4900 states and 12810 transitions. Word has length 91 [2018-11-28 20:38:26,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:26,625 INFO L480 AbstractCegarLoop]: Abstraction has 4900 states and 12810 transitions. [2018-11-28 20:38:26,625 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-28 20:38:26,625 INFO L276 IsEmpty]: Start isEmpty. Operand 4900 states and 12810 transitions. [2018-11-28 20:38:26,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 20:38:26,633 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:26,633 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:26,634 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:26,634 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:26,634 INFO L82 PathProgramCache]: Analyzing trace with hash 1082731118, now seen corresponding path program 1 times [2018-11-28 20:38:26,634 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:26,634 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:26,636 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:26,636 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:26,636 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:26,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:26,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:26,898 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:26,898 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 20:38:26,898 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 20:38:26,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 20:38:26,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-28 20:38:26,899 INFO L87 Difference]: Start difference. First operand 4900 states and 12810 transitions. Second operand 6 states. [2018-11-28 20:38:27,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:27,169 INFO L93 Difference]: Finished difference Result 5421 states and 14010 transitions. [2018-11-28 20:38:27,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 20:38:27,173 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 91 [2018-11-28 20:38:27,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:27,181 INFO L225 Difference]: With dead ends: 5421 [2018-11-28 20:38:27,181 INFO L226 Difference]: Without dead ends: 5421 [2018-11-28 20:38:27,182 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-11-28 20:38:27,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5421 states. [2018-11-28 20:38:27,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5421 to 4982. [2018-11-28 20:38:27,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4982 states. [2018-11-28 20:38:27,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4982 states to 4982 states and 13010 transitions. [2018-11-28 20:38:27,242 INFO L78 Accepts]: Start accepts. Automaton has 4982 states and 13010 transitions. Word has length 91 [2018-11-28 20:38:27,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:27,243 INFO L480 AbstractCegarLoop]: Abstraction has 4982 states and 13010 transitions. [2018-11-28 20:38:27,243 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 20:38:27,243 INFO L276 IsEmpty]: Start isEmpty. Operand 4982 states and 13010 transitions. [2018-11-28 20:38:27,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 20:38:27,249 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:27,249 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:27,249 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:27,249 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:27,250 INFO L82 PathProgramCache]: Analyzing trace with hash 2052312141, now seen corresponding path program 1 times [2018-11-28 20:38:27,250 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:27,251 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:27,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:27,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:27,257 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:27,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:27,877 WARN L180 SmtUtils]: Spent 266.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 10 [2018-11-28 20:38:27,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:27,893 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:27,893 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 20:38:27,894 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 20:38:27,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 20:38:27,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-28 20:38:27,894 INFO L87 Difference]: Start difference. First operand 4982 states and 13010 transitions. Second operand 6 states. [2018-11-28 20:38:28,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:28,318 INFO L93 Difference]: Finished difference Result 6685 states and 17135 transitions. [2018-11-28 20:38:28,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 20:38:28,319 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 91 [2018-11-28 20:38:28,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:28,329 INFO L225 Difference]: With dead ends: 6685 [2018-11-28 20:38:28,329 INFO L226 Difference]: Without dead ends: 6653 [2018-11-28 20:38:28,330 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:28,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6653 states. [2018-11-28 20:38:28,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6653 to 5220. [2018-11-28 20:38:28,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5220 states. [2018-11-28 20:38:28,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5220 states to 5220 states and 13566 transitions. [2018-11-28 20:38:28,407 INFO L78 Accepts]: Start accepts. Automaton has 5220 states and 13566 transitions. Word has length 91 [2018-11-28 20:38:28,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:28,408 INFO L480 AbstractCegarLoop]: Abstraction has 5220 states and 13566 transitions. [2018-11-28 20:38:28,408 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 20:38:28,408 INFO L276 IsEmpty]: Start isEmpty. Operand 5220 states and 13566 transitions. [2018-11-28 20:38:28,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 20:38:28,416 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:28,416 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:28,417 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:28,417 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:28,417 INFO L82 PathProgramCache]: Analyzing trace with hash 1769161677, now seen corresponding path program 1 times [2018-11-28 20:38:28,417 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:28,417 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:28,422 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:28,422 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:28,422 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:28,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:28,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:28,586 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:28,586 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 20:38:28,587 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 20:38:28,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 20:38:28,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:28,587 INFO L87 Difference]: Start difference. First operand 5220 states and 13566 transitions. Second operand 7 states. [2018-11-28 20:38:29,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:29,228 INFO L93 Difference]: Finished difference Result 10836 states and 28363 transitions. [2018-11-28 20:38:29,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-28 20:38:29,229 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 91 [2018-11-28 20:38:29,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:29,244 INFO L225 Difference]: With dead ends: 10836 [2018-11-28 20:38:29,244 INFO L226 Difference]: Without dead ends: 10836 [2018-11-28 20:38:29,244 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2018-11-28 20:38:29,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10836 states. [2018-11-28 20:38:29,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10836 to 5696. [2018-11-28 20:38:29,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5696 states. [2018-11-28 20:38:29,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5696 states to 5696 states and 14820 transitions. [2018-11-28 20:38:29,358 INFO L78 Accepts]: Start accepts. Automaton has 5696 states and 14820 transitions. Word has length 91 [2018-11-28 20:38:29,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:29,359 INFO L480 AbstractCegarLoop]: Abstraction has 5696 states and 14820 transitions. [2018-11-28 20:38:29,359 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 20:38:29,359 INFO L276 IsEmpty]: Start isEmpty. Operand 5696 states and 14820 transitions. [2018-11-28 20:38:29,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 20:38:29,366 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:29,366 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:29,366 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:29,366 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:29,367 INFO L82 PathProgramCache]: Analyzing trace with hash -1281041138, now seen corresponding path program 1 times [2018-11-28 20:38:29,367 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:29,367 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:29,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:29,369 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:29,369 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:29,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:29,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:29,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:29,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 20:38:29,594 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 20:38:29,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 20:38:29,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:29,594 INFO L87 Difference]: Start difference. First operand 5696 states and 14820 transitions. Second operand 7 states. [2018-11-28 20:38:29,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:29,969 INFO L93 Difference]: Finished difference Result 5443 states and 14126 transitions. [2018-11-28 20:38:29,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 20:38:29,970 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 91 [2018-11-28 20:38:29,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:29,977 INFO L225 Difference]: With dead ends: 5443 [2018-11-28 20:38:29,977 INFO L226 Difference]: Without dead ends: 5443 [2018-11-28 20:38:29,978 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2018-11-28 20:38:29,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5443 states. [2018-11-28 20:38:30,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5443 to 5297. [2018-11-28 20:38:30,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5297 states. [2018-11-28 20:38:30,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5297 states to 5297 states and 13794 transitions. [2018-11-28 20:38:30,039 INFO L78 Accepts]: Start accepts. Automaton has 5297 states and 13794 transitions. Word has length 91 [2018-11-28 20:38:30,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:30,039 INFO L480 AbstractCegarLoop]: Abstraction has 5297 states and 13794 transitions. [2018-11-28 20:38:30,039 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 20:38:30,039 INFO L276 IsEmpty]: Start isEmpty. Operand 5297 states and 13794 transitions. [2018-11-28 20:38:30,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 20:38:30,046 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:30,046 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:30,046 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:30,047 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:30,047 INFO L82 PathProgramCache]: Analyzing trace with hash -641458048, now seen corresponding path program 1 times [2018-11-28 20:38:30,047 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:30,047 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:30,049 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:30,049 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:30,049 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:30,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:30,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:30,182 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:30,182 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 20:38:30,183 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 20:38:30,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 20:38:30,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 20:38:30,183 INFO L87 Difference]: Start difference. First operand 5297 states and 13794 transitions. Second operand 6 states. [2018-11-28 20:38:30,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:30,657 INFO L93 Difference]: Finished difference Result 5627 states and 14404 transitions. [2018-11-28 20:38:30,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 20:38:30,659 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 91 [2018-11-28 20:38:30,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:30,667 INFO L225 Difference]: With dead ends: 5627 [2018-11-28 20:38:30,667 INFO L226 Difference]: Without dead ends: 5484 [2018-11-28 20:38:30,667 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:30,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5484 states. [2018-11-28 20:38:30,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5484 to 5367. [2018-11-28 20:38:30,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5367 states. [2018-11-28 20:38:30,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5367 states to 5367 states and 13906 transitions. [2018-11-28 20:38:30,735 INFO L78 Accepts]: Start accepts. Automaton has 5367 states and 13906 transitions. Word has length 91 [2018-11-28 20:38:30,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:30,736 INFO L480 AbstractCegarLoop]: Abstraction has 5367 states and 13906 transitions. [2018-11-28 20:38:30,736 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 20:38:30,736 INFO L276 IsEmpty]: Start isEmpty. Operand 5367 states and 13906 transitions. [2018-11-28 20:38:30,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 20:38:30,744 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:30,744 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:30,745 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:30,745 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:30,745 INFO L82 PathProgramCache]: Analyzing trace with hash 1059282431, now seen corresponding path program 1 times [2018-11-28 20:38:30,745 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:30,745 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:30,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:30,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:30,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:30,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:31,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:31,449 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:31,449 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 20:38:31,449 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 20:38:31,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 20:38:31,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:31,450 INFO L87 Difference]: Start difference. First operand 5367 states and 13906 transitions. Second operand 7 states. [2018-11-28 20:38:33,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:33,561 INFO L93 Difference]: Finished difference Result 5647 states and 14605 transitions. [2018-11-28 20:38:33,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 20:38:33,562 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 91 [2018-11-28 20:38:33,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:33,570 INFO L225 Difference]: With dead ends: 5647 [2018-11-28 20:38:33,570 INFO L226 Difference]: Without dead ends: 5647 [2018-11-28 20:38:33,571 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:33,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5647 states. [2018-11-28 20:38:33,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5647 to 5342. [2018-11-28 20:38:33,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5342 states. [2018-11-28 20:38:33,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5342 states to 5342 states and 13859 transitions. [2018-11-28 20:38:33,636 INFO L78 Accepts]: Start accepts. Automaton has 5342 states and 13859 transitions. Word has length 91 [2018-11-28 20:38:33,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:33,637 INFO L480 AbstractCegarLoop]: Abstraction has 5342 states and 13859 transitions. [2018-11-28 20:38:33,637 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 20:38:33,637 INFO L276 IsEmpty]: Start isEmpty. Operand 5342 states and 13859 transitions. [2018-11-28 20:38:33,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 20:38:33,644 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:33,645 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:33,645 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:33,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:33,645 INFO L82 PathProgramCache]: Analyzing trace with hash -1824805345, now seen corresponding path program 1 times [2018-11-28 20:38:33,645 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:33,646 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:33,648 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:33,648 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:33,648 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:33,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:34,046 WARN L180 SmtUtils]: Spent 220.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 14 [2018-11-28 20:38:34,261 WARN L180 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 9 [2018-11-28 20:38:34,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:34,274 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:34,274 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 20:38:34,275 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 20:38:34,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 20:38:34,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:34,275 INFO L87 Difference]: Start difference. First operand 5342 states and 13859 transitions. Second operand 5 states. [2018-11-28 20:38:34,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:34,442 INFO L93 Difference]: Finished difference Result 5050 states and 13114 transitions. [2018-11-28 20:38:34,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-28 20:38:34,443 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 91 [2018-11-28 20:38:34,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:34,451 INFO L225 Difference]: With dead ends: 5050 [2018-11-28 20:38:34,451 INFO L226 Difference]: Without dead ends: 5050 [2018-11-28 20:38:34,451 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-28 20:38:34,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5050 states. [2018-11-28 20:38:34,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5050 to 4932. [2018-11-28 20:38:34,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4932 states. [2018-11-28 20:38:34,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4932 states to 4932 states and 12877 transitions. [2018-11-28 20:38:34,512 INFO L78 Accepts]: Start accepts. Automaton has 4932 states and 12877 transitions. Word has length 91 [2018-11-28 20:38:34,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:34,513 INFO L480 AbstractCegarLoop]: Abstraction has 4932 states and 12877 transitions. [2018-11-28 20:38:34,513 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 20:38:34,513 INFO L276 IsEmpty]: Start isEmpty. Operand 4932 states and 12877 transitions. [2018-11-28 20:38:34,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-11-28 20:38:34,519 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:34,520 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:34,520 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:34,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:34,520 INFO L82 PathProgramCache]: Analyzing trace with hash -803005088, now seen corresponding path program 1 times [2018-11-28 20:38:34,520 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:34,520 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:34,522 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:34,523 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:34,523 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:34,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:35,188 WARN L180 SmtUtils]: Spent 276.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 16 [2018-11-28 20:38:35,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:35,212 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:35,212 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 20:38:35,213 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 20:38:35,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 20:38:35,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 20:38:35,213 INFO L87 Difference]: Start difference. First operand 4932 states and 12877 transitions. Second operand 6 states. [2018-11-28 20:38:35,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:35,461 INFO L93 Difference]: Finished difference Result 3604 states and 9013 transitions. [2018-11-28 20:38:35,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-28 20:38:35,462 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 91 [2018-11-28 20:38:35,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:35,467 INFO L225 Difference]: With dead ends: 3604 [2018-11-28 20:38:35,467 INFO L226 Difference]: Without dead ends: 3604 [2018-11-28 20:38:35,468 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:35,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3604 states. [2018-11-28 20:38:35,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3604 to 2672. [2018-11-28 20:38:35,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2672 states. [2018-11-28 20:38:35,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2672 states to 2672 states and 6817 transitions. [2018-11-28 20:38:35,501 INFO L78 Accepts]: Start accepts. Automaton has 2672 states and 6817 transitions. Word has length 91 [2018-11-28 20:38:35,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:35,502 INFO L480 AbstractCegarLoop]: Abstraction has 2672 states and 6817 transitions. [2018-11-28 20:38:35,502 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 20:38:35,502 INFO L276 IsEmpty]: Start isEmpty. Operand 2672 states and 6817 transitions. [2018-11-28 20:38:35,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 20:38:35,505 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:35,505 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:35,506 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:35,506 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:35,506 INFO L82 PathProgramCache]: Analyzing trace with hash -1422839622, now seen corresponding path program 1 times [2018-11-28 20:38:35,506 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:35,506 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:35,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:35,511 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:35,511 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:35,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:35,636 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:35,637 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:35,637 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 20:38:35,637 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 20:38:35,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 20:38:35,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:35,638 INFO L87 Difference]: Start difference. First operand 2672 states and 6817 transitions. Second operand 7 states. [2018-11-28 20:38:36,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:36,221 INFO L93 Difference]: Finished difference Result 4257 states and 10597 transitions. [2018-11-28 20:38:36,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 20:38:36,222 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2018-11-28 20:38:36,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:36,230 INFO L225 Difference]: With dead ends: 4257 [2018-11-28 20:38:36,231 INFO L226 Difference]: Without dead ends: 4257 [2018-11-28 20:38:36,232 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-11-28 20:38:36,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4257 states. [2018-11-28 20:38:36,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4257 to 3022. [2018-11-28 20:38:36,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3022 states. [2018-11-28 20:38:36,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3022 states to 3022 states and 7675 transitions. [2018-11-28 20:38:36,282 INFO L78 Accepts]: Start accepts. Automaton has 3022 states and 7675 transitions. Word has length 93 [2018-11-28 20:38:36,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:36,282 INFO L480 AbstractCegarLoop]: Abstraction has 3022 states and 7675 transitions. [2018-11-28 20:38:36,282 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 20:38:36,282 INFO L276 IsEmpty]: Start isEmpty. Operand 3022 states and 7675 transitions. [2018-11-28 20:38:36,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 20:38:36,286 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:36,286 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:36,286 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:36,287 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:36,287 INFO L82 PathProgramCache]: Analyzing trace with hash -178075141, now seen corresponding path program 1 times [2018-11-28 20:38:36,287 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:36,287 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:36,288 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:36,288 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:36,289 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:36,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:36,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:36,669 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:36,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 20:38:36,669 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 20:38:36,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 20:38:36,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:36,670 INFO L87 Difference]: Start difference. First operand 3022 states and 7675 transitions. Second operand 7 states. [2018-11-28 20:38:37,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:37,168 INFO L93 Difference]: Finished difference Result 3031 states and 7689 transitions. [2018-11-28 20:38:37,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 20:38:37,169 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2018-11-28 20:38:37,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:37,174 INFO L225 Difference]: With dead ends: 3031 [2018-11-28 20:38:37,174 INFO L226 Difference]: Without dead ends: 3031 [2018-11-28 20:38:37,175 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=45, Invalid=65, Unknown=0, NotChecked=0, Total=110 [2018-11-28 20:38:37,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3031 states. [2018-11-28 20:38:37,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3031 to 3022. [2018-11-28 20:38:37,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3022 states. [2018-11-28 20:38:37,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3022 states to 3022 states and 7672 transitions. [2018-11-28 20:38:37,212 INFO L78 Accepts]: Start accepts. Automaton has 3022 states and 7672 transitions. Word has length 93 [2018-11-28 20:38:37,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:37,212 INFO L480 AbstractCegarLoop]: Abstraction has 3022 states and 7672 transitions. [2018-11-28 20:38:37,212 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 20:38:37,212 INFO L276 IsEmpty]: Start isEmpty. Operand 3022 states and 7672 transitions. [2018-11-28 20:38:37,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 20:38:37,216 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:37,216 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:37,217 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:37,217 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:37,217 INFO L82 PathProgramCache]: Analyzing trace with hash -1963213381, now seen corresponding path program 2 times [2018-11-28 20:38:37,217 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:37,217 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:37,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:37,219 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:37,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:37,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:37,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:37,456 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:37,456 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 20:38:37,456 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 20:38:37,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 20:38:37,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-28 20:38:37,457 INFO L87 Difference]: Start difference. First operand 3022 states and 7672 transitions. Second operand 6 states. [2018-11-28 20:38:37,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:37,737 INFO L93 Difference]: Finished difference Result 3145 states and 7875 transitions. [2018-11-28 20:38:37,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 20:38:37,739 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2018-11-28 20:38:37,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:37,744 INFO L225 Difference]: With dead ends: 3145 [2018-11-28 20:38:37,744 INFO L226 Difference]: Without dead ends: 3145 [2018-11-28 20:38:37,744 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-28 20:38:37,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3145 states. [2018-11-28 20:38:37,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3145 to 3037. [2018-11-28 20:38:37,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3037 states. [2018-11-28 20:38:37,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3037 states to 3037 states and 7665 transitions. [2018-11-28 20:38:37,785 INFO L78 Accepts]: Start accepts. Automaton has 3037 states and 7665 transitions. Word has length 93 [2018-11-28 20:38:37,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:37,785 INFO L480 AbstractCegarLoop]: Abstraction has 3037 states and 7665 transitions. [2018-11-28 20:38:37,785 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 20:38:37,785 INFO L276 IsEmpty]: Start isEmpty. Operand 3037 states and 7665 transitions. [2018-11-28 20:38:37,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 20:38:37,789 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:37,790 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:37,790 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:37,790 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:37,790 INFO L82 PathProgramCache]: Analyzing trace with hash 1409070332, now seen corresponding path program 1 times [2018-11-28 20:38:37,790 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:37,790 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:37,792 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:37,792 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 20:38:37,792 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:37,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:37,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:37,990 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:37,990 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 20:38:37,991 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 20:38:37,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 20:38:37,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:37,991 INFO L87 Difference]: Start difference. First operand 3037 states and 7665 transitions. Second operand 7 states. [2018-11-28 20:38:38,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:38,420 INFO L93 Difference]: Finished difference Result 4249 states and 10944 transitions. [2018-11-28 20:38:38,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 20:38:38,421 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2018-11-28 20:38:38,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:38,427 INFO L225 Difference]: With dead ends: 4249 [2018-11-28 20:38:38,427 INFO L226 Difference]: Without dead ends: 4249 [2018-11-28 20:38:38,428 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=76, Invalid=134, Unknown=0, NotChecked=0, Total=210 [2018-11-28 20:38:38,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4249 states. [2018-11-28 20:38:38,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4249 to 2694. [2018-11-28 20:38:38,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2694 states. [2018-11-28 20:38:38,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2694 states to 2694 states and 6785 transitions. [2018-11-28 20:38:38,480 INFO L78 Accepts]: Start accepts. Automaton has 2694 states and 6785 transitions. Word has length 93 [2018-11-28 20:38:38,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:38,480 INFO L480 AbstractCegarLoop]: Abstraction has 2694 states and 6785 transitions. [2018-11-28 20:38:38,480 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 20:38:38,481 INFO L276 IsEmpty]: Start isEmpty. Operand 2694 states and 6785 transitions. [2018-11-28 20:38:38,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 20:38:38,486 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:38,487 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:38,487 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:38,487 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:38,487 INFO L82 PathProgramCache]: Analyzing trace with hash 494071612, now seen corresponding path program 1 times [2018-11-28 20:38:38,487 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:38,487 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:38,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:38,492 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:38,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:38,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:38,766 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:38,767 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:38,767 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 20:38:38,767 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 20:38:38,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 20:38:38,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 20:38:38,769 INFO L87 Difference]: Start difference. First operand 2694 states and 6785 transitions. Second operand 5 states. [2018-11-28 20:38:38,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:38,980 INFO L93 Difference]: Finished difference Result 3046 states and 7649 transitions. [2018-11-28 20:38:38,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 20:38:38,982 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2018-11-28 20:38:38,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:38,986 INFO L225 Difference]: With dead ends: 3046 [2018-11-28 20:38:38,986 INFO L226 Difference]: Without dead ends: 3014 [2018-11-28 20:38:38,987 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:38,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3014 states. [2018-11-28 20:38:39,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3014 to 2510. [2018-11-28 20:38:39,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2510 states. [2018-11-28 20:38:39,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2510 states to 2510 states and 6326 transitions. [2018-11-28 20:38:39,019 INFO L78 Accepts]: Start accepts. Automaton has 2510 states and 6326 transitions. Word has length 93 [2018-11-28 20:38:39,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:39,019 INFO L480 AbstractCegarLoop]: Abstraction has 2510 states and 6326 transitions. [2018-11-28 20:38:39,019 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 20:38:39,019 INFO L276 IsEmpty]: Start isEmpty. Operand 2510 states and 6326 transitions. [2018-11-28 20:38:39,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 20:38:39,022 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:39,023 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:39,023 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:39,023 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:39,023 INFO L82 PathProgramCache]: Analyzing trace with hash 1738836093, now seen corresponding path program 1 times [2018-11-28 20:38:39,023 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:39,023 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:39,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:39,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:39,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:39,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:39,281 WARN L180 SmtUtils]: Spent 182.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2018-11-28 20:38:39,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:39,504 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:39,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 20:38:39,505 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 20:38:39,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 20:38:39,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:39,506 INFO L87 Difference]: Start difference. First operand 2510 states and 6326 transitions. Second operand 7 states. [2018-11-28 20:38:39,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:39,822 INFO L93 Difference]: Finished difference Result 4161 states and 10709 transitions. [2018-11-28 20:38:39,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 20:38:39,823 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 93 [2018-11-28 20:38:39,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:39,827 INFO L225 Difference]: With dead ends: 4161 [2018-11-28 20:38:39,827 INFO L226 Difference]: Without dead ends: 1726 [2018-11-28 20:38:39,828 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-28 20:38:39,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1726 states. [2018-11-28 20:38:39,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1726 to 1726. [2018-11-28 20:38:39,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1726 states. [2018-11-28 20:38:39,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1726 states to 1726 states and 4513 transitions. [2018-11-28 20:38:39,847 INFO L78 Accepts]: Start accepts. Automaton has 1726 states and 4513 transitions. Word has length 93 [2018-11-28 20:38:39,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:39,848 INFO L480 AbstractCegarLoop]: Abstraction has 1726 states and 4513 transitions. [2018-11-28 20:38:39,848 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 20:38:39,848 INFO L276 IsEmpty]: Start isEmpty. Operand 1726 states and 4513 transitions. [2018-11-28 20:38:39,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 20:38:39,850 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:39,850 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:39,851 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:39,851 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:39,851 INFO L82 PathProgramCache]: Analyzing trace with hash -1752144950, now seen corresponding path program 1 times [2018-11-28 20:38:39,851 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:39,851 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:39,853 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:39,853 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:39,853 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:39,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:40,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:40,011 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:40,011 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 20:38:40,012 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-28 20:38:40,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-28 20:38:40,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-28 20:38:40,012 INFO L87 Difference]: Start difference. First operand 1726 states and 4513 transitions. Second operand 6 states. [2018-11-28 20:38:40,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:40,097 INFO L93 Difference]: Finished difference Result 1812 states and 4666 transitions. [2018-11-28 20:38:40,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-28 20:38:40,098 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2018-11-28 20:38:40,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:40,101 INFO L225 Difference]: With dead ends: 1812 [2018-11-28 20:38:40,101 INFO L226 Difference]: Without dead ends: 1792 [2018-11-28 20:38:40,101 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-28 20:38:40,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1792 states. [2018-11-28 20:38:40,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1792 to 1718. [2018-11-28 20:38:40,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1718 states. [2018-11-28 20:38:40,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1718 states to 1718 states and 4487 transitions. [2018-11-28 20:38:40,121 INFO L78 Accepts]: Start accepts. Automaton has 1718 states and 4487 transitions. Word has length 93 [2018-11-28 20:38:40,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:40,122 INFO L480 AbstractCegarLoop]: Abstraction has 1718 states and 4487 transitions. [2018-11-28 20:38:40,122 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-28 20:38:40,122 INFO L276 IsEmpty]: Start isEmpty. Operand 1718 states and 4487 transitions. [2018-11-28 20:38:40,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 20:38:40,124 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:40,125 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:40,125 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:40,125 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:40,125 INFO L82 PathProgramCache]: Analyzing trace with hash 2094125707, now seen corresponding path program 2 times [2018-11-28 20:38:40,125 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:40,125 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:40,127 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:40,127 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 20:38:40,127 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:40,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 20:38:40,344 WARN L180 SmtUtils]: Spent 156.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2018-11-28 20:38:40,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 20:38:40,531 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 20:38:40,531 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-28 20:38:40,531 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-28 20:38:40,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-28 20:38:40,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-11-28 20:38:40,532 INFO L87 Difference]: Start difference. First operand 1718 states and 4487 transitions. Second operand 12 states. [2018-11-28 20:38:41,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 20:38:41,158 INFO L93 Difference]: Finished difference Result 3315 states and 8720 transitions. [2018-11-28 20:38:41,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-28 20:38:41,159 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 93 [2018-11-28 20:38:41,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 20:38:41,164 INFO L225 Difference]: With dead ends: 3315 [2018-11-28 20:38:41,164 INFO L226 Difference]: Without dead ends: 2339 [2018-11-28 20:38:41,165 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=100, Invalid=550, Unknown=0, NotChecked=0, Total=650 [2018-11-28 20:38:41,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2339 states. [2018-11-28 20:38:41,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2339 to 2187. [2018-11-28 20:38:41,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2187 states. [2018-11-28 20:38:41,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2187 states to 2187 states and 5546 transitions. [2018-11-28 20:38:41,192 INFO L78 Accepts]: Start accepts. Automaton has 2187 states and 5546 transitions. Word has length 93 [2018-11-28 20:38:41,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 20:38:41,192 INFO L480 AbstractCegarLoop]: Abstraction has 2187 states and 5546 transitions. [2018-11-28 20:38:41,192 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-28 20:38:41,192 INFO L276 IsEmpty]: Start isEmpty. Operand 2187 states and 5546 transitions. [2018-11-28 20:38:41,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-28 20:38:41,195 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 20:38:41,195 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 20:38:41,196 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-28 20:38:41,196 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 20:38:41,196 INFO L82 PathProgramCache]: Analyzing trace with hash 1369725745, now seen corresponding path program 3 times [2018-11-28 20:38:41,196 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 20:38:41,196 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 20:38:41,197 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:41,198 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-28 20:38:41,198 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 20:38:41,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 20:38:41,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 20:38:41,276 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 20:38:41,463 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-28 20:38:41,465 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 08:38:41 BasicIcfg [2018-11-28 20:38:41,465 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 20:38:41,469 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 20:38:41,469 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 20:38:41,469 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 20:38:41,470 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 08:38:00" (3/4) ... [2018-11-28 20:38:41,475 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 20:38:41,668 INFO L145 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2018-11-28 20:38:41,669 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 20:38:41,670 INFO L168 Benchmark]: Toolchain (without parser) took 43464.72 ms. Allocated memory was 1.0 GB in the beginning and 3.0 GB in the end (delta: 1.9 GB). Free memory was 952.7 MB in the beginning and 1.3 GB in the end (delta: -376.3 MB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2018-11-28 20:38:41,670 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 20:38:41,674 INFO L168 Benchmark]: CACSL2BoogieTranslator took 902.36 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 947.3 MB in the beginning and 1.1 GB in the end (delta: -169.1 MB). Peak memory consumption was 27.1 MB. Max. memory is 11.5 GB. [2018-11-28 20:38:41,674 INFO L168 Benchmark]: Boogie Procedure Inliner took 93.75 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2018-11-28 20:38:41,674 INFO L168 Benchmark]: Boogie Preprocessor took 45.02 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 20:38:41,675 INFO L168 Benchmark]: RCFGBuilder took 1351.16 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.6 MB). Peak memory consumption was 45.6 MB. Max. memory is 11.5 GB. [2018-11-28 20:38:41,675 INFO L168 Benchmark]: TraceAbstraction took 40862.53 ms. Allocated memory was 1.2 GB in the beginning and 3.0 GB in the end (delta: 1.8 GB). Free memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: -264.9 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2018-11-28 20:38:41,675 INFO L168 Benchmark]: Witness Printer took 199.92 ms. Allocated memory is still 3.0 GB. Free memory is still 1.3 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 20:38:41,678 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 902.36 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 947.3 MB in the beginning and 1.1 GB in the end (delta: -169.1 MB). Peak memory consumption was 27.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 93.75 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 45.02 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 1351.16 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 45.6 MB). Peak memory consumption was 45.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 40862.53 ms. Allocated memory was 1.2 GB in the beginning and 3.0 GB in the end (delta: 1.8 GB). Free memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: -264.9 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 199.92 ms. Allocated memory is still 3.0 GB. Free memory is still 1.3 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L672] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L673] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L675] -1 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L676] -1 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L677] -1 int x$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L678] -1 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L679] -1 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L680] -1 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L681] -1 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L682] -1 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L683] -1 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L684] -1 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L685] -1 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L686] -1 int x$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L687] -1 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L688] -1 int x$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L689] -1 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L691] -1 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L692] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L693] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L753] -1 pthread_t t2485; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L754] FCALL, FORK -1 pthread_create(&t2485, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L755] -1 pthread_t t2486; VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] FCALL, FORK -1 pthread_create(&t2486, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L717] 0 x$w_buff1 = x$w_buff0 [L718] 0 x$w_buff0 = 2 [L719] 0 x$w_buff1_used = x$w_buff0_used [L720] 0 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 0 x$r_buff1_thd0 = x$r_buff0_thd0 [L723] 0 x$r_buff1_thd1 = x$r_buff0_thd1 [L724] 0 x$r_buff1_thd2 = x$r_buff0_thd2 [L725] 0 x$r_buff0_thd2 = (_Bool)1 [L728] 0 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L697] 1 y = 2 [L700] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L703] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L703] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L703] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=2] [L703] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L704] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L704] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L705] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L705] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L731] 0 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L706] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L706] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L732] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L732] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L733] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L733] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L734] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L734] 0 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L735] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L735] 0 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L738] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L707] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L707] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L710] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L758] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L762] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L762] EXPR -1 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L762] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L762] -1 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L763] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L763] -1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L764] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L764] -1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L765] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L765] -1 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L766] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L766] -1 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L769] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L770] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L771] -1 x$flush_delayed = weak$$choice2 [L772] -1 x$mem_tmp = x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L773] EXPR -1 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L773] -1 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L774] EXPR -1 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L774] -1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L775] EXPR -1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L775] -1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L776] EXPR -1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L776] -1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L777] EXPR -1 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L777] -1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L778] EXPR -1 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L778] -1 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L779] EXPR -1 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L779] -1 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L780] -1 main$tmp_guard1 = !(x == 2 && y == 2) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L781] EXPR -1 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L781] -1 x = x$flush_delayed ? x$mem_tmp : x [L782] -1 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 178 locations, 3 error locations. UNSAFE Result, 40.7s OverallTime, 30 OverallIterations, 1 TraceHistogramMax, 21.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 6819 SDtfs, 6188 SDslu, 15881 SDs, 0 SdLazy, 7296 SolverSat, 366 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 12.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 292 GetRequests, 87 SyntacticMatches, 13 SemanticMatches, 192 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 203 ImplicationChecksByTransitivity, 8.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=38086occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 8.3s AutomataMinimizationTime, 29 MinimizatonAttempts, 92570 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 8.0s InterpolantComputationTime, 2416 NumberOfCodeBlocks, 2416 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 2294 ConstructedInterpolants, 0 QuantifiedInterpolants, 473977 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...