/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf -i ../../../trunk/examples/svcomp/pthread-atomic/lamport-b.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-21b0908 [2022-07-22 11:39:48,790 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-22 11:39:48,793 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-22 11:39:48,828 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-22 11:39:48,828 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-22 11:39:48,830 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-22 11:39:48,832 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-22 11:39:48,834 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-22 11:39:48,836 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-22 11:39:48,838 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-22 11:39:48,839 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-22 11:39:48,841 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-22 11:39:48,841 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-22 11:39:48,843 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-22 11:39:48,844 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-22 11:39:48,845 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-22 11:39:48,846 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-22 11:39:48,848 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-22 11:39:48,850 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-22 11:39:48,869 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-22 11:39:48,871 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-22 11:39:48,873 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-22 11:39:48,874 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-22 11:39:48,876 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-22 11:39:48,877 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-22 11:39:48,881 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-22 11:39:48,881 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-22 11:39:48,882 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-22 11:39:48,883 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-22 11:39:48,884 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-22 11:39:48,885 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-22 11:39:48,885 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-22 11:39:48,886 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-22 11:39:48,887 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-22 11:39:48,888 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-22 11:39:48,890 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-22 11:39:48,890 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-22 11:39:48,891 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-22 11:39:48,891 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-22 11:39:48,892 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-22 11:39:48,893 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-22 11:39:48,894 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-22 11:39:48,895 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf [2022-07-22 11:39:48,935 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-22 11:39:48,935 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-22 11:39:48,937 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-22 11:39:48,937 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-22 11:39:48,939 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-22 11:39:48,940 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-22 11:39:48,940 INFO L138 SettingsManager]: * Use SBE=true [2022-07-22 11:39:48,940 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-22 11:39:48,941 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-22 11:39:48,942 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-22 11:39:48,943 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-22 11:39:48,943 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-22 11:39:48,943 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-22 11:39:48,944 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-22 11:39:48,944 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-22 11:39:48,944 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-22 11:39:48,945 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-22 11:39:48,945 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-22 11:39:48,946 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-22 11:39:48,946 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-22 11:39:48,946 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-22 11:39:48,947 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-22 11:39:48,947 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-22 11:39:48,947 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-22 11:39:48,948 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-22 11:39:48,948 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-22 11:39:48,948 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-22 11:39:48,948 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-22 11:39:48,949 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-22 11:39:48,949 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-22 11:39:48,950 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-22 11:39:48,950 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-07-22 11:39:48,953 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-22 11:39:48,953 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-07-22 11:39:49,382 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-22 11:39:49,409 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-22 11:39:49,413 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-22 11:39:49,414 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-22 11:39:49,415 INFO L275 PluginConnector]: CDTParser initialized [2022-07-22 11:39:49,416 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-atomic/lamport-b.i [2022-07-22 11:39:49,515 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/800a2d1b1/820b177a6f2a4deb8347c723a8c6219b/FLAG4e09fae2d [2022-07-22 11:39:50,271 INFO L306 CDTParser]: Found 1 translation units. [2022-07-22 11:39:50,272 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport-b.i [2022-07-22 11:39:50,293 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/800a2d1b1/820b177a6f2a4deb8347c723a8c6219b/FLAG4e09fae2d [2022-07-22 11:39:50,533 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/800a2d1b1/820b177a6f2a4deb8347c723a8c6219b [2022-07-22 11:39:50,536 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-22 11:39:50,541 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-07-22 11:39:50,545 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-22 11:39:50,545 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-22 11:39:50,550 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-22 11:39:50,555 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.07 11:39:50" (1/1) ... [2022-07-22 11:39:50,556 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d5ae0ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:50, skipping insertion in model container [2022-07-22 11:39:50,557 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.07 11:39:50" (1/1) ... [2022-07-22 11:39:50,565 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-22 11:39:50,632 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-22 11:39:50,952 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport-b.i[30203,30216] [2022-07-22 11:39:50,957 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport-b.i[30581,30594] [2022-07-22 11:39:50,971 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-22 11:39:50,982 INFO L203 MainTranslator]: Completed pre-run [2022-07-22 11:39:51,024 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport-b.i[30203,30216] [2022-07-22 11:39:51,031 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport-b.i[30581,30594] [2022-07-22 11:39:51,044 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-22 11:39:51,109 INFO L208 MainTranslator]: Completed translation [2022-07-22 11:39:51,109 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51 WrapperNode [2022-07-22 11:39:51,109 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-22 11:39:51,111 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-22 11:39:51,112 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-22 11:39:51,112 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-22 11:39:51,122 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,164 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,203 INFO L137 Inliner]: procedures = 167, calls = 18, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 44 [2022-07-22 11:39:51,203 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-22 11:39:51,204 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-22 11:39:51,205 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-22 11:39:51,205 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-22 11:39:51,215 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,215 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,227 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,227 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,247 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,261 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,265 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,274 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-22 11:39:51,275 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-22 11:39:51,275 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-22 11:39:51,275 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-22 11:39:51,276 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,293 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-22 11:39:51,307 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 11:39:51,337 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-22 11:39:51,359 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-22 11:39:51,405 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-22 11:39:51,405 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2022-07-22 11:39:51,405 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2022-07-22 11:39:51,406 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2022-07-22 11:39:51,406 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2022-07-22 11:39:51,406 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-22 11:39:51,406 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-22 11:39:51,406 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-22 11:39:51,407 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-22 11:39:51,407 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-22 11:39:51,407 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-22 11:39:51,407 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-22 11:39:51,409 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-07-22 11:39:51,530 INFO L234 CfgBuilder]: Building ICFG [2022-07-22 11:39:51,532 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-22 11:39:51,879 INFO L275 CfgBuilder]: Performing block encoding [2022-07-22 11:39:51,893 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-22 11:39:51,894 INFO L299 CfgBuilder]: Removed 8 assume(true) statements. [2022-07-22 11:39:51,898 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.07 11:39:51 BoogieIcfgContainer [2022-07-22 11:39:51,898 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-22 11:39:51,900 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-22 11:39:51,900 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-22 11:39:51,905 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-22 11:39:51,906 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 11:39:51,907 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 22.07 11:39:50" (1/3) ... [2022-07-22 11:39:51,908 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@653e7648 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 22.07 11:39:51, skipping insertion in model container [2022-07-22 11:39:51,908 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 11:39:51,908 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (2/3) ... [2022-07-22 11:39:51,909 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@653e7648 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 22.07 11:39:51, skipping insertion in model container [2022-07-22 11:39:51,909 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 11:39:51,909 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.07 11:39:51" (3/3) ... [2022-07-22 11:39:51,911 INFO L322 chiAutomizerObserver]: Analyzing ICFG lamport-b.i [2022-07-22 11:39:52,074 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-07-22 11:39:52,131 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 98 places, 117 transitions, 250 flow [2022-07-22 11:39:52,213 INFO L129 PetriNetUnfolder]: 24/113 cut-off events. [2022-07-22 11:39:52,214 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-07-22 11:39:52,220 INFO L84 FinitePrefix]: Finished finitePrefix Result has 122 conditions, 113 events. 24/113 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 6. Compared 179 event pairs, 0 based on Foata normal form. 0/89 useless extension candidates. Maximal degree in co-relation 79. Up to 5 conditions per place. [2022-07-22 11:39:52,221 INFO L82 GeneralOperation]: Start removeDead. Operand has 98 places, 117 transitions, 250 flow [2022-07-22 11:39:52,239 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 96 places, 113 transitions, 238 flow [2022-07-22 11:39:52,259 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2022-07-22 11:39:52,259 INFO L301 stractBuchiCegarLoop]: Hoare is false [2022-07-22 11:39:52,259 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-22 11:39:52,259 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-22 11:39:52,260 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-22 11:39:52,261 INFO L305 stractBuchiCegarLoop]: Difference is false [2022-07-22 11:39:52,261 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-22 11:39:52,261 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-22 11:39:52,264 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-22 11:39:52,701 INFO L131 ngComponentsAnalysis]: Automaton has 101 accepting balls. 1740 [2022-07-22 11:39:52,701 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:52,702 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:52,711 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:52,711 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-07-22 11:39:52,712 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-22 11:39:52,713 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 2355 states, but on-demand construction may add more states [2022-07-22 11:39:52,816 INFO L131 ngComponentsAnalysis]: Automaton has 101 accepting balls. 1740 [2022-07-22 11:39:52,816 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:52,817 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:52,818 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:52,820 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-07-22 11:39:52,838 INFO L748 eck$LassoCheckResult]: Stem: 101#[ULTIMATE.startENTRY]don't care [296] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 104#[L-1]don't care [276] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 106#[L-1-1]don't care [304] L-1-1-->L-1-2: Formula: (= (select |v_#valid_8| 0) 0) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_8|} AuxVars[] AssignedVars[] 108#[L-1-2]don't care [307] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 110#[L12]don't care [246] L12-->L12-1: Formula: (and (= 2 (select |v_#length_4| 1)) (= (select |v_#valid_9| 1) 1)) InVars {#length=|v_#length_4|, #valid=|v_#valid_9|} OutVars{#length=|v_#length_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[] 112#[L12-1]don't care [273] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_5| 1) 0) 48) InVars {#memory_int=|v_#memory_int_5|} OutVars{#memory_int=|v_#memory_int_5|} AuxVars[] AssignedVars[] 114#[L12-2]don't care [271] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_6| 1) 1) 0) InVars {#memory_int=|v_#memory_int_6|} OutVars{#memory_int=|v_#memory_int_6|} AuxVars[] AssignedVars[] 116#[L12-3]don't care [297] L12-3-->L12-4: Formula: (and (= (select |v_#valid_10| 2) 1) (= (select |v_#length_5| 2) 10)) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 118#[L12-4]don't care [285] L12-4-->L684: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 120#[L684]don't care [220] L684-->L685: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0] 122#[L685]don't care [245] L685-->L685-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 124#[L685-1]don't care [288] L685-1-->L686: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 126#[L686]don't care [321] L686-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 128#[L-1-3]don't care [312] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 130#[L-1-4]don't care [284] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 132#[L-1-5]don't care [244] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 134#[L-1-6]don't care [282] L-1-6-->L740: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_4|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|, ULTIMATE.start_main_#t~mem7#1=|v_ULTIMATE.start_main_#t~mem7#1_3|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_#t~nondet6#1=|v_ULTIMATE.start_main_#t~nondet6#1_2|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~mem7#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet6#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 136#[L740]don't care [286] L740-->L740-1: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) (= (store |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 1) |v_#valid_11|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_5| 0)) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 4)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_6|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 138#[L740-1]don't care [293] L740-1-->L740-2: Formula: (and (= |v_#valid_13| (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_6| 0)) (= |v_#length_8| (store |v_#length_9| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 4)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) (= (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 0) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 140#[L740-2]don't care [263] L740-2-->L741: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 142#[L741]don't care [298] L741-->L741-1: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 144#[L741-1]don't care [294] L741-1-->L741-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_6|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_6| 4) (select |v_#length_10| |v_ULTIMATE.start_main_~#t1~0#1.base_6|)) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) |v_ULTIMATE.start_main_~#t1~0#1.offset_6| |v_ULTIMATE.start_main_#t~pre3#1_4|)) |v_#memory_int_7|) (= (select |v_#valid_15| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) 1)) InVars {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} OutVars{#valid=|v_#valid_15|, #memory_int=|v_#memory_int_7|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[#memory_int] 146#[L741-2]don't care [401] L741-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre3#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 148#[thr1ENTRY, L741-3]don't care [362] thr1ENTRY-->L688loopEntry: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 150#[L688loopEntry, L741-3]don't care [363] L688loopEntry-->L701-3: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 154#[L701-3, L741-3]don't care [2022-07-22 11:39:52,838 INFO L750 eck$LassoCheckResult]: Loop: 154#[L701-3, L741-3]don't care [366] L701-3-->L689: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 164#[L689, L741-3]don't care [368] L689-->L690: Formula: (= v_~b1~0_3 1) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0] 178#[L690, L741-3]don't care [371] L690-->L691: Formula: (= v_~x~0_5 1) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 198#[L691, L741-3]don't care [374] L691-->L692: Formula: (not (= v_~y~0_15 0)) InVars {~y~0=v_~y~0_15} OutVars{~y~0=v_~y~0_15} AuxVars[] AssignedVars[] 224#[L692, L741-3]don't care [378] L692-->L693-2: Formula: (= v_~b1~0_4 0) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 258#[L693-2, L741-3]don't care [381] L693-2-->L701-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] 154#[L701-3, L741-3]don't care [2022-07-22 11:39:52,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:52,846 INFO L85 PathProgramCache]: Analyzing trace with hash -813792526, now seen corresponding path program 1 times [2022-07-22 11:39:52,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:52,859 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101221908] [2022-07-22 11:39:52,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:52,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:53,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:53,021 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:53,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:53,075 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:53,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:53,079 INFO L85 PathProgramCache]: Analyzing trace with hash -1167849239, now seen corresponding path program 1 times [2022-07-22 11:39:53,079 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:53,079 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [41466125] [2022-07-22 11:39:53,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:53,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:53,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:53,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:53,142 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:53,142 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [41466125] [2022-07-22 11:39:53,143 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [41466125] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:53,143 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:53,143 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-07-22 11:39:53,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034106306] [2022-07-22 11:39:53,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:53,152 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-07-22 11:39:53,154 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:53,192 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-07-22 11:39:53,192 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-07-22 11:39:53,195 INFO L87 Difference]: Start difference. First operand currently 2355 states, but on-demand construction may add more states Second operand has 2 states, 1 states have (on average 6.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:53,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:53,256 INFO L93 Difference]: Finished difference Result 2167 states and 6678 transitions. [2022-07-22 11:39:53,257 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2167 states and 6678 transitions. [2022-07-22 11:39:53,290 INFO L131 ngComponentsAnalysis]: Automaton has 93 accepting balls. 1644 [2022-07-22 11:39:53,327 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2167 states to 1877 states and 5849 transitions. [2022-07-22 11:39:53,329 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1877 [2022-07-22 11:39:53,334 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1877 [2022-07-22 11:39:53,335 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1877 states and 5849 transitions. [2022-07-22 11:39:53,349 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:53,349 INFO L220 hiAutomatonCegarLoop]: Abstraction has 1877 states and 5849 transitions. [2022-07-22 11:39:53,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1877 states and 5849 transitions. [2022-07-22 11:39:53,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1877 to 1877. [2022-07-22 11:39:53,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1877 states, 1877 states have (on average 3.116142781033564) internal successors, (5849), 1876 states have internal predecessors, (5849), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:53,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1877 states to 1877 states and 5849 transitions. [2022-07-22 11:39:53,517 INFO L242 hiAutomatonCegarLoop]: Abstraction has 1877 states and 5849 transitions. [2022-07-22 11:39:53,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-07-22 11:39:53,530 INFO L425 stractBuchiCegarLoop]: Abstraction has 1877 states and 5849 transitions. [2022-07-22 11:39:53,531 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-22 11:39:53,531 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1877 states and 5849 transitions. [2022-07-22 11:39:53,555 INFO L131 ngComponentsAnalysis]: Automaton has 93 accepting balls. 1644 [2022-07-22 11:39:53,555 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:53,555 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:53,557 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:53,557 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-07-22 11:39:53,560 INFO L748 eck$LassoCheckResult]: Stem: 9346#[ULTIMATE.startENTRY]don't care [296] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 9348#[L-1]don't care [276] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 9358#[L-1-1]don't care [304] L-1-1-->L-1-2: Formula: (= (select |v_#valid_8| 0) 0) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_8|} AuxVars[] AssignedVars[] 9360#[L-1-2]don't care [307] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 10454#[L12]don't care [246] L12-->L12-1: Formula: (and (= 2 (select |v_#length_4| 1)) (= (select |v_#valid_9| 1) 1)) InVars {#length=|v_#length_4|, #valid=|v_#valid_9|} OutVars{#length=|v_#length_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[] 10670#[L12-1]don't care [273] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_5| 1) 0) 48) InVars {#memory_int=|v_#memory_int_5|} OutVars{#memory_int=|v_#memory_int_5|} AuxVars[] AssignedVars[] 9676#[L12-2]don't care [271] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_6| 1) 1) 0) InVars {#memory_int=|v_#memory_int_6|} OutVars{#memory_int=|v_#memory_int_6|} AuxVars[] AssignedVars[] 9678#[L12-3]don't care [297] L12-3-->L12-4: Formula: (and (= (select |v_#valid_10| 2) 1) (= (select |v_#length_5| 2) 10)) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 8932#[L12-4]don't care [285] L12-4-->L684: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 8934#[L684]don't care [220] L684-->L685: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0] 10322#[L685]don't care [245] L685-->L685-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 10270#[L685-1]don't care [288] L685-1-->L686: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 10272#[L686]don't care [321] L686-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 10034#[L-1-3]don't care [312] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 7354#[L-1-4]don't care [284] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 7356#[L-1-5]don't care [244] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 8412#[L-1-6]don't care [282] L-1-6-->L740: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_4|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|, ULTIMATE.start_main_#t~mem7#1=|v_ULTIMATE.start_main_#t~mem7#1_3|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_#t~nondet6#1=|v_ULTIMATE.start_main_#t~nondet6#1_2|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~mem7#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet6#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 8414#[L740]don't care [286] L740-->L740-1: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) (= (store |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 1) |v_#valid_11|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_5| 0)) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 4)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_6|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 9728#[L740-1]don't care [293] L740-1-->L740-2: Formula: (and (= |v_#valid_13| (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_6| 0)) (= |v_#length_8| (store |v_#length_9| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 4)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) (= (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 0) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 9730#[L740-2]don't care [263] L740-2-->L741: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 7770#[L741]don't care [298] L741-->L741-1: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 7772#[L741-1]don't care [294] L741-1-->L741-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_6|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_6| 4) (select |v_#length_10| |v_ULTIMATE.start_main_~#t1~0#1.base_6|)) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) |v_ULTIMATE.start_main_~#t1~0#1.offset_6| |v_ULTIMATE.start_main_#t~pre3#1_4|)) |v_#memory_int_7|) (= (select |v_#valid_15| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) 1)) InVars {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} OutVars{#valid=|v_#valid_15|, #memory_int=|v_#memory_int_7|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[#memory_int] 10706#[L741-2]don't care [401] L741-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre3#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 9454#[thr1ENTRY, L741-3]don't care [362] thr1ENTRY-->L688loopEntry: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 9456#[L688loopEntry, L741-3]don't care [363] L688loopEntry-->L701-3: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 10336#[L701-3, L741-3]don't care [2022-07-22 11:39:53,562 INFO L750 eck$LassoCheckResult]: Loop: 10336#[L701-3, L741-3]don't care [366] L701-3-->L689: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 10734#[L689, L741-3]don't care [368] L689-->L690: Formula: (= v_~b1~0_3 1) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0] 9012#[L690, L741-3]don't care [371] L690-->L691: Formula: (= v_~x~0_5 1) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 9014#[L691, L741-3]don't care [374] L691-->L692: Formula: (not (= v_~y~0_15 0)) InVars {~y~0=v_~y~0_15} OutVars{~y~0=v_~y~0_15} AuxVars[] AssignedVars[] 10566#[L692, L741-3]don't care [378] L692-->L693-2: Formula: (= v_~b1~0_4 0) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 10396#[L693-2, L741-3]don't care [382] L693-2-->L701-3: Formula: (= v_~y~0_17 0) InVars {~y~0=v_~y~0_17} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[] 10336#[L701-3, L741-3]don't care [2022-07-22 11:39:53,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:53,565 INFO L85 PathProgramCache]: Analyzing trace with hash -813792526, now seen corresponding path program 2 times [2022-07-22 11:39:53,566 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:53,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011606039] [2022-07-22 11:39:53,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:53,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:53,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:53,639 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:53,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:53,664 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:53,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:53,665 INFO L85 PathProgramCache]: Analyzing trace with hash -1167849238, now seen corresponding path program 1 times [2022-07-22 11:39:53,665 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:53,666 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319900524] [2022-07-22 11:39:53,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:53,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:53,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:53,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:53,784 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:53,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319900524] [2022-07-22 11:39:53,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [319900524] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:53,788 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:53,788 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-22 11:39:53,788 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [178884880] [2022-07-22 11:39:53,788 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:53,789 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-07-22 11:39:53,789 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:53,791 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-22 11:39:53,791 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-22 11:39:53,791 INFO L87 Difference]: Start difference. First operand 1877 states and 5849 transitions. cyclomatic complexity: 4065 Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:53,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:53,944 INFO L93 Difference]: Finished difference Result 2122 states and 6098 transitions. [2022-07-22 11:39:53,944 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2122 states and 6098 transitions. [2022-07-22 11:39:53,987 INFO L131 ngComponentsAnalysis]: Automaton has 554 accepting balls. 554 [2022-07-22 11:39:54,024 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2122 states to 2122 states and 6098 transitions. [2022-07-22 11:39:54,025 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2122 [2022-07-22 11:39:54,030 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2122 [2022-07-22 11:39:54,031 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2122 states and 6098 transitions. [2022-07-22 11:39:54,040 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:54,041 INFO L220 hiAutomatonCegarLoop]: Abstraction has 2122 states and 6098 transitions. [2022-07-22 11:39:54,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2122 states and 6098 transitions. [2022-07-22 11:39:54,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2122 to 2122. [2022-07-22 11:39:54,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2122 states, 2122 states have (on average 2.8737040527803956) internal successors, (6098), 2121 states have internal predecessors, (6098), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:54,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2122 states to 2122 states and 6098 transitions. [2022-07-22 11:39:54,136 INFO L242 hiAutomatonCegarLoop]: Abstraction has 2122 states and 6098 transitions. [2022-07-22 11:39:54,138 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-22 11:39:54,139 INFO L425 stractBuchiCegarLoop]: Abstraction has 2122 states and 6098 transitions. [2022-07-22 11:39:54,140 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-22 11:39:54,140 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2122 states and 6098 transitions. [2022-07-22 11:39:54,166 INFO L131 ngComponentsAnalysis]: Automaton has 554 accepting balls. 554 [2022-07-22 11:39:54,166 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:54,166 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:54,168 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:54,169 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-22 11:39:54,171 INFO L748 eck$LassoCheckResult]: Stem: 15166#[ULTIMATE.startENTRY]don't care [296] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 15168#[L-1]don't care [276] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 15178#[L-1-1]don't care [304] L-1-1-->L-1-2: Formula: (= (select |v_#valid_8| 0) 0) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_8|} AuxVars[] AssignedVars[] 15180#[L-1-2]don't care [307] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 16336#[L12]don't care [246] L12-->L12-1: Formula: (and (= 2 (select |v_#length_4| 1)) (= (select |v_#valid_9| 1) 1)) InVars {#length=|v_#length_4|, #valid=|v_#valid_9|} OutVars{#length=|v_#length_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[] 16604#[L12-1]don't care [273] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_5| 1) 0) 48) InVars {#memory_int=|v_#memory_int_5|} OutVars{#memory_int=|v_#memory_int_5|} AuxVars[] AssignedVars[] 15496#[L12-2]don't care [271] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_6| 1) 1) 0) InVars {#memory_int=|v_#memory_int_6|} OutVars{#memory_int=|v_#memory_int_6|} AuxVars[] AssignedVars[] 15498#[L12-3]don't care [297] L12-3-->L12-4: Formula: (and (= (select |v_#valid_10| 2) 1) (= (select |v_#length_5| 2) 10)) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 14762#[L12-4]don't care [285] L12-4-->L684: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 14764#[L684]don't care [220] L684-->L685: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0] 16174#[L685]don't care [245] L685-->L685-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 16120#[L685-1]don't care [288] L685-1-->L686: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 16122#[L686]don't care [321] L686-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 15876#[L-1-3]don't care [312] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 13220#[L-1-4]don't care [284] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 13222#[L-1-5]don't care [244] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 14240#[L-1-6]don't care [282] L-1-6-->L740: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_4|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|, ULTIMATE.start_main_#t~mem7#1=|v_ULTIMATE.start_main_#t~mem7#1_3|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_#t~nondet6#1=|v_ULTIMATE.start_main_#t~nondet6#1_2|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~mem7#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet6#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 14242#[L740]don't care [286] L740-->L740-1: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) (= (store |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 1) |v_#valid_11|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_5| 0)) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 4)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_6|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 15548#[L740-1]don't care [293] L740-1-->L740-2: Formula: (and (= |v_#valid_13| (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_6| 0)) (= |v_#length_8| (store |v_#length_9| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 4)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) (= (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 0) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 15550#[L740-2]don't care [263] L740-2-->L741: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 13624#[L741]don't care [298] L741-->L741-1: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 13626#[L741-1]don't care [294] L741-1-->L741-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_6|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_6| 4) (select |v_#length_10| |v_ULTIMATE.start_main_~#t1~0#1.base_6|)) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) |v_ULTIMATE.start_main_~#t1~0#1.offset_6| |v_ULTIMATE.start_main_#t~pre3#1_4|)) |v_#memory_int_7|) (= (select |v_#valid_15| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) 1)) InVars {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} OutVars{#valid=|v_#valid_15|, #memory_int=|v_#memory_int_7|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[#memory_int] 16652#[L741-2]don't care [401] L741-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre3#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 15268#[thr1ENTRY, L741-3]don't care [362] thr1ENTRY-->L688loopEntry: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 15270#[L688loopEntry, L741-3]don't care [363] L688loopEntry-->L701-3: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 16236#[L701-3, L741-3]don't care [366] L701-3-->L689: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 16704#[L689, L741-3]don't care [368] L689-->L690: Formula: (= v_~b1~0_3 1) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0] 14836#[L690, L741-3]don't care [371] L690-->L691: Formula: (= v_~x~0_5 1) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 14838#[L691, L741-3]don't care [374] L691-->L692: Formula: (not (= v_~y~0_15 0)) InVars {~y~0=v_~y~0_15} OutVars{~y~0=v_~y~0_15} AuxVars[] AssignedVars[] 16482#[L692, L741-3]don't care [378] L692-->L693-2: Formula: (= v_~b1~0_4 0) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 16262#[L693-2, L741-3]don't care [2022-07-22 11:39:54,171 INFO L750 eck$LassoCheckResult]: Loop: 16262#[L693-2, L741-3]don't care [383] L693-2-->L693-2: Formula: (not (= v_~y~0_18 0)) InVars {~y~0=v_~y~0_18} OutVars{~y~0=v_~y~0_18} AuxVars[] AssignedVars[] 16262#[L693-2, L741-3]don't care [2022-07-22 11:39:54,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:54,172 INFO L85 PathProgramCache]: Analyzing trace with hash -1224079677, now seen corresponding path program 1 times [2022-07-22 11:39:54,173 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:54,173 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829265583] [2022-07-22 11:39:54,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:54,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:54,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:54,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:54,309 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:54,310 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829265583] [2022-07-22 11:39:54,310 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [829265583] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:54,310 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:54,310 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-22 11:39:54,311 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1559947369] [2022-07-22 11:39:54,311 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:54,311 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-07-22 11:39:54,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:54,312 INFO L85 PathProgramCache]: Analyzing trace with hash 414, now seen corresponding path program 1 times [2022-07-22 11:39:54,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:54,313 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189777195] [2022-07-22 11:39:54,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:54,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:54,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:54,324 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:54,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:54,328 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:54,350 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:54,351 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-22 11:39:54,352 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-22 11:39:54,352 INFO L87 Difference]: Start difference. First operand 2122 states and 6098 transitions. cyclomatic complexity: 4530 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:54,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:54,439 INFO L93 Difference]: Finished difference Result 1912 states and 5383 transitions. [2022-07-22 11:39:54,440 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1912 states and 5383 transitions. [2022-07-22 11:39:54,471 INFO L131 ngComponentsAnalysis]: Automaton has 445 accepting balls. 445 [2022-07-22 11:39:54,498 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1912 states to 1912 states and 5383 transitions. [2022-07-22 11:39:54,498 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1912 [2022-07-22 11:39:54,505 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1912 [2022-07-22 11:39:54,505 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1912 states and 5383 transitions. [2022-07-22 11:39:54,511 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:54,511 INFO L220 hiAutomatonCegarLoop]: Abstraction has 1912 states and 5383 transitions. [2022-07-22 11:39:54,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1912 states and 5383 transitions. [2022-07-22 11:39:54,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1912 to 1912. [2022-07-22 11:39:54,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1912 states, 1912 states have (on average 2.815376569037657) internal successors, (5383), 1911 states have internal predecessors, (5383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:54,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1912 states to 1912 states and 5383 transitions. [2022-07-22 11:39:54,653 INFO L242 hiAutomatonCegarLoop]: Abstraction has 1912 states and 5383 transitions. [2022-07-22 11:39:54,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-22 11:39:54,656 INFO L425 stractBuchiCegarLoop]: Abstraction has 1912 states and 5383 transitions. [2022-07-22 11:39:54,656 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-07-22 11:39:54,656 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1912 states and 5383 transitions. [2022-07-22 11:39:54,677 INFO L131 ngComponentsAnalysis]: Automaton has 445 accepting balls. 445 [2022-07-22 11:39:54,677 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:54,677 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:54,679 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:54,680 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-22 11:39:54,682 INFO L748 eck$LassoCheckResult]: Stem: 21126#[ULTIMATE.startENTRY]don't care [296] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 21128#[L-1]don't care [276] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 21138#[L-1-1]don't care [304] L-1-1-->L-1-2: Formula: (= (select |v_#valid_8| 0) 0) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_8|} AuxVars[] AssignedVars[] 21140#[L-1-2]don't care [307] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 22220#[L12]don't care [246] L12-->L12-1: Formula: (and (= 2 (select |v_#length_4| 1)) (= (select |v_#valid_9| 1) 1)) InVars {#length=|v_#length_4|, #valid=|v_#valid_9|} OutVars{#length=|v_#length_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[] 22464#[L12-1]don't care [273] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_5| 1) 0) 48) InVars {#memory_int=|v_#memory_int_5|} OutVars{#memory_int=|v_#memory_int_5|} AuxVars[] AssignedVars[] 21448#[L12-2]don't care [271] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_6| 1) 1) 0) InVars {#memory_int=|v_#memory_int_6|} OutVars{#memory_int=|v_#memory_int_6|} AuxVars[] AssignedVars[] 21450#[L12-3]don't care [297] L12-3-->L12-4: Formula: (and (= (select |v_#valid_10| 2) 1) (= (select |v_#length_5| 2) 10)) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 20776#[L12-4]don't care [285] L12-4-->L684: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 20778#[L684]don't care [220] L684-->L685: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0] 22066#[L685]don't care [245] L685-->L685-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 22006#[L685-1]don't care [288] L685-1-->L686: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 22008#[L686]don't care [321] L686-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 21782#[L-1-3]don't care [312] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 19364#[L-1-4]don't care [284] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 19366#[L-1-5]don't care [244] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 20326#[L-1-6]don't care [282] L-1-6-->L740: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_4|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|, ULTIMATE.start_main_#t~mem7#1=|v_ULTIMATE.start_main_#t~mem7#1_3|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_#t~nondet6#1=|v_ULTIMATE.start_main_#t~nondet6#1_2|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~mem7#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet6#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 20328#[L740]don't care [286] L740-->L740-1: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) (= (store |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 1) |v_#valid_11|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_5| 0)) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 4)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_6|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 21494#[L740-1]don't care [293] L740-1-->L740-2: Formula: (and (= |v_#valid_13| (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_6| 0)) (= |v_#length_8| (store |v_#length_9| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 4)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) (= (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 0) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 21496#[L740-2]don't care [263] L740-2-->L741: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 19754#[L741]don't care [298] L741-->L741-1: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 19756#[L741-1]don't care [294] L741-1-->L741-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_6|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_6| 4) (select |v_#length_10| |v_ULTIMATE.start_main_~#t1~0#1.base_6|)) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) |v_ULTIMATE.start_main_~#t1~0#1.offset_6| |v_ULTIMATE.start_main_#t~pre3#1_4|)) |v_#memory_int_7|) (= (select |v_#valid_15| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) 1)) InVars {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} OutVars{#valid=|v_#valid_15|, #memory_int=|v_#memory_int_7|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[#memory_int] 22512#[L741-2]don't care [401] L741-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre3#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 21224#[thr1ENTRY, L741-3]don't care [362] thr1ENTRY-->L688loopEntry: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 21226#[L688loopEntry, L741-3]don't care [363] L688loopEntry-->L701-3: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 22128#[L701-3, L741-3]don't care [366] L701-3-->L689: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 22562#[L689, L741-3]don't care [368] L689-->L690: Formula: (= v_~b1~0_3 1) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0] 20828#[L690, L741-3]don't care [371] L690-->L691: Formula: (= v_~x~0_5 1) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 20830#[L691, L741-3]don't care [375] L691-->L696: Formula: (= v_~y~0_19 0) InVars {~y~0=v_~y~0_19} OutVars{~y~0=v_~y~0_19} AuxVars[] AssignedVars[] 22112#[L696, L741-3]don't care [379] L696-->L697: Formula: (= v_~y~0_20 1) InVars {} OutVars{~y~0=v_~y~0_20} AuxVars[] AssignedVars[~y~0] 22114#[L697, L741-3]don't care [384] L697-->L698: Formula: (not (= v_~x~0_6 1)) InVars {~x~0=v_~x~0_6} OutVars{~x~0=v_~x~0_6} AuxVars[] AssignedVars[] 20674#[L698, L741-3]don't care [387] L698-->L699-2: Formula: (= v_~b1~0_6 0) InVars {} OutVars{~b1~0=v_~b1~0_6} AuxVars[] AssignedVars[~b1~0] 20676#[L699-2, L741-3]don't care [2022-07-22 11:39:54,682 INFO L750 eck$LassoCheckResult]: Loop: 20676#[L699-2, L741-3]don't care [390] L699-2-->L699-2: Formula: (<= 1 v_~b2~0_6) InVars {~b2~0=v_~b2~0_6} OutVars{~b2~0=v_~b2~0_6} AuxVars[] AssignedVars[] 20676#[L699-2, L741-3]don't care [2022-07-22 11:39:54,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:54,683 INFO L85 PathProgramCache]: Analyzing trace with hash 480512550, now seen corresponding path program 1 times [2022-07-22 11:39:54,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:54,683 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1814287243] [2022-07-22 11:39:54,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:54,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:54,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:54,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:54,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:54,777 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1814287243] [2022-07-22 11:39:54,778 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1814287243] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:54,778 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:54,778 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-22 11:39:54,778 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160265286] [2022-07-22 11:39:54,778 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:54,779 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-07-22 11:39:54,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:54,779 INFO L85 PathProgramCache]: Analyzing trace with hash 421, now seen corresponding path program 1 times [2022-07-22 11:39:54,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:54,780 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167495781] [2022-07-22 11:39:54,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:54,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:54,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:54,785 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:54,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:54,792 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:54,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:54,805 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-22 11:39:54,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-22 11:39:54,805 INFO L87 Difference]: Start difference. First operand 1912 states and 5383 transitions. cyclomatic complexity: 3916 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:54,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:54,865 INFO L93 Difference]: Finished difference Result 2631 states and 7204 transitions. [2022-07-22 11:39:54,866 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2631 states and 7204 transitions. [2022-07-22 11:39:54,901 INFO L131 ngComponentsAnalysis]: Automaton has 570 accepting balls. 570 [2022-07-22 11:39:54,929 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2631 states to 2311 states and 6372 transitions. [2022-07-22 11:39:54,930 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2311 [2022-07-22 11:39:54,934 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2311 [2022-07-22 11:39:54,935 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2311 states and 6372 transitions. [2022-07-22 11:39:54,941 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:54,941 INFO L220 hiAutomatonCegarLoop]: Abstraction has 2311 states and 6372 transitions. [2022-07-22 11:39:54,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2311 states and 6372 transitions. [2022-07-22 11:39:54,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2311 to 1772. [2022-07-22 11:39:55,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1772 states, 1772 states have (on average 2.7866817155756207) internal successors, (4938), 1771 states have internal predecessors, (4938), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:55,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1772 states to 1772 states and 4938 transitions. [2022-07-22 11:39:55,014 INFO L242 hiAutomatonCegarLoop]: Abstraction has 1772 states and 4938 transitions. [2022-07-22 11:39:55,015 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-22 11:39:55,016 INFO L425 stractBuchiCegarLoop]: Abstraction has 1772 states and 4938 transitions. [2022-07-22 11:39:55,016 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-07-22 11:39:55,016 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1772 states and 4938 transitions. [2022-07-22 11:39:55,071 INFO L131 ngComponentsAnalysis]: Automaton has 421 accepting balls. 421 [2022-07-22 11:39:55,071 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:55,071 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:55,073 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:55,073 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-22 11:39:55,074 INFO L748 eck$LassoCheckResult]: Stem: 28185#[ULTIMATE.startENTRY]don't care [296] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 28187#[L-1]don't care [276] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 28193#[L-1-1]don't care [304] L-1-1-->L-1-2: Formula: (= (select |v_#valid_8| 0) 0) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_8|} AuxVars[] AssignedVars[] 28195#[L-1-2]don't care [307] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 27805#[L12]don't care [246] L12-->L12-1: Formula: (and (= 2 (select |v_#length_4| 1)) (= (select |v_#valid_9| 1) 1)) InVars {#length=|v_#length_4|, #valid=|v_#valid_9|} OutVars{#length=|v_#length_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[] 27807#[L12-1]don't care [273] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_5| 1) 0) 48) InVars {#memory_int=|v_#memory_int_5|} OutVars{#memory_int=|v_#memory_int_5|} AuxVars[] AssignedVars[] 27863#[L12-2]don't care [271] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_6| 1) 1) 0) InVars {#memory_int=|v_#memory_int_6|} OutVars{#memory_int=|v_#memory_int_6|} AuxVars[] AssignedVars[] 26625#[L12-3]don't care [297] L12-3-->L12-4: Formula: (and (= (select |v_#valid_10| 2) 1) (= (select |v_#length_5| 2) 10)) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 26627#[L12-4]don't care [285] L12-4-->L684: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 27899#[L684]don't care [220] L684-->L685: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0] 28591#[L685]don't care [245] L685-->L685-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 28593#[L685-1]don't care [288] L685-1-->L686: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 28617#[L686]don't care [321] L686-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 28499#[L-1-3]don't care [312] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 25969#[L-1-4]don't care [284] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 25971#[L-1-5]don't care [244] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 27387#[L-1-6]don't care [282] L-1-6-->L740: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_4|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|, ULTIMATE.start_main_#t~mem7#1=|v_ULTIMATE.start_main_#t~mem7#1_3|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_#t~nondet6#1=|v_ULTIMATE.start_main_#t~nondet6#1_2|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~mem7#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet6#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 27389#[L740]don't care [286] L740-->L740-1: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) (= (store |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 1) |v_#valid_11|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_5| 0)) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 4)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_6|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 28363#[L740-1]don't care [293] L740-1-->L740-2: Formula: (and (= |v_#valid_13| (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_6| 0)) (= |v_#length_8| (store |v_#length_9| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 4)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) (= (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 0) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 28239#[L740-2]don't care [263] L740-2-->L741: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 26641#[L741]don't care [298] L741-->L741-1: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 26643#[L741-1]don't care [294] L741-1-->L741-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_6|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_6| 4) (select |v_#length_10| |v_ULTIMATE.start_main_~#t1~0#1.base_6|)) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) |v_ULTIMATE.start_main_~#t1~0#1.offset_6| |v_ULTIMATE.start_main_#t~pre3#1_4|)) |v_#memory_int_7|) (= (select |v_#valid_15| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) 1)) InVars {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} OutVars{#valid=|v_#valid_15|, #memory_int=|v_#memory_int_7|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[#memory_int] 28125#[L741-2]don't care [401] L741-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre3#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 28127#[thr1ENTRY, L741-3]don't care [283] L741-3-->L741-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 28225#[thr1ENTRY, L741-4]don't care [239] L741-4-->L742: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet4#1] 26827#[thr1ENTRY, L742]don't care [274] L742-->L742-1: Formula: (= |v_ULTIMATE.start_main_#t~pre5#1_1| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_1|, #pthreadsForks=|v_#pthreadsForks_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1] 26829#[thr1ENTRY, L742-1]don't care [278] L742-1-->L742-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 28461#[thr1ENTRY, L742-2]don't care [238] L742-2-->L742-3: Formula: (and (= (select |v_#valid_1| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) |v_ULTIMATE.start_main_~#t2~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre5#1_2|)) |v_#memory_int_1|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (select |v_#length_1| |v_ULTIMATE.start_main_~#t2~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|)) InVars {ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[#memory_int] 28163#[thr1ENTRY, L742-3]don't care [398] L742-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre5#1_6| v_thr2Thread1of1ForFork0_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_6|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_6|, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 27529#[thr2ENTRY, thr1ENTRY, L742-4]don't care [328] thr2ENTRY-->L714loopEntry: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 27531#[L714loopEntry, thr1ENTRY, L742-4]don't care [329] L714loopEntry-->L727-3: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 27865#[L727-3, thr1ENTRY, L742-4]don't care [332] L727-3-->L715: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 27793#[L715, thr1ENTRY, L742-4]don't care [334] L715-->L716: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0] 27737#[thr1ENTRY, L716, L742-4]don't care [337] L716-->L717: Formula: (= 2 v_~x~0_2) InVars {} OutVars{~x~0=v_~x~0_2} AuxVars[] AssignedVars[~x~0] 27739#[L717, thr1ENTRY, L742-4]don't care [341] L717-->L722: Formula: (= v_~y~0_5 0) InVars {~y~0=v_~y~0_5} OutVars{~y~0=v_~y~0_5} AuxVars[] AssignedVars[] 28507#[L722, thr1ENTRY, L742-4]don't care [345] L722-->L723: Formula: (= 2 v_~y~0_6) InVars {} OutVars{~y~0=v_~y~0_6} AuxVars[] AssignedVars[~y~0] 28659#[L723, thr1ENTRY, L742-4]don't care [350] L723-->L724: Formula: (not (= 2 v_~x~0_3)) InVars {~x~0=v_~x~0_3} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[] 28597#[L724, thr1ENTRY, L742-4]don't care [353] L724-->L725-2: Formula: (= v_~b2~0_4 0) InVars {} OutVars{~b2~0=v_~b2~0_4} AuxVars[] AssignedVars[~b2~0] 28599#[L725-2, thr1ENTRY, L742-4]don't care [2022-07-22 11:39:55,075 INFO L750 eck$LassoCheckResult]: Loop: 28599#[L725-2, thr1ENTRY, L742-4]don't care [356] L725-2-->L725-2: Formula: (<= 1 v_~b1~0_2) InVars {~b1~0=v_~b1~0_2} OutVars{~b1~0=v_~b1~0_2} AuxVars[] AssignedVars[] 28599#[L725-2, thr1ENTRY, L742-4]don't care [2022-07-22 11:39:55,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:55,076 INFO L85 PathProgramCache]: Analyzing trace with hash 149030380, now seen corresponding path program 1 times [2022-07-22 11:39:55,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:55,076 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [833467223] [2022-07-22 11:39:55,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:55,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:55,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:55,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:55,166 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:55,166 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [833467223] [2022-07-22 11:39:55,166 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [833467223] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:55,166 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:55,166 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-22 11:39:55,167 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588762780] [2022-07-22 11:39:55,167 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:55,167 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-07-22 11:39:55,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:55,169 INFO L85 PathProgramCache]: Analyzing trace with hash 387, now seen corresponding path program 1 times [2022-07-22 11:39:55,169 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:55,169 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54491618] [2022-07-22 11:39:55,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:55,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:55,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:55,175 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:55,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:55,185 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:55,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:55,192 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-22 11:39:55,192 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-22 11:39:55,192 INFO L87 Difference]: Start difference. First operand 1772 states and 4938 transitions. cyclomatic complexity: 3587 Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:55,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:55,232 INFO L93 Difference]: Finished difference Result 1871 states and 4868 transitions. [2022-07-22 11:39:55,233 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1871 states and 4868 transitions. [2022-07-22 11:39:55,253 INFO L131 ngComponentsAnalysis]: Automaton has 345 accepting balls. 345 [2022-07-22 11:39:55,270 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1871 states to 1473 states and 3883 transitions. [2022-07-22 11:39:55,270 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1473 [2022-07-22 11:39:55,273 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1473 [2022-07-22 11:39:55,273 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1473 states and 3883 transitions. [2022-07-22 11:39:55,277 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:55,277 INFO L220 hiAutomatonCegarLoop]: Abstraction has 1473 states and 3883 transitions. [2022-07-22 11:39:55,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1473 states and 3883 transitions. [2022-07-22 11:39:55,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1473 to 1401. [2022-07-22 11:39:55,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1401 states, 1401 states have (on average 2.6473947180585298) internal successors, (3709), 1400 states have internal predecessors, (3709), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:55,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1401 states to 1401 states and 3709 transitions. [2022-07-22 11:39:55,336 INFO L242 hiAutomatonCegarLoop]: Abstraction has 1401 states and 3709 transitions. [2022-07-22 11:39:55,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-22 11:39:55,340 INFO L425 stractBuchiCegarLoop]: Abstraction has 1401 states and 3709 transitions. [2022-07-22 11:39:55,340 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-07-22 11:39:55,340 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1401 states and 3709 transitions. [2022-07-22 11:39:55,351 INFO L131 ngComponentsAnalysis]: Automaton has 313 accepting balls. 313 [2022-07-22 11:39:55,352 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:55,352 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:55,353 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:55,353 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-22 11:39:55,354 INFO L748 eck$LassoCheckResult]: Stem: 33018#[ULTIMATE.startENTRY]don't care [296] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 33020#[L-1]don't care [276] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 33026#[L-1-1]don't care [304] L-1-1-->L-1-2: Formula: (= (select |v_#valid_8| 0) 0) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_8|} AuxVars[] AssignedVars[] 33028#[L-1-2]don't care [307] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 32700#[L12]don't care [246] L12-->L12-1: Formula: (and (= 2 (select |v_#length_4| 1)) (= (select |v_#valid_9| 1) 1)) InVars {#length=|v_#length_4|, #valid=|v_#valid_9|} OutVars{#length=|v_#length_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[] 32702#[L12-1]don't care [273] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_5| 1) 0) 48) InVars {#memory_int=|v_#memory_int_5|} OutVars{#memory_int=|v_#memory_int_5|} AuxVars[] AssignedVars[] 32750#[L12-2]don't care [271] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_6| 1) 1) 0) InVars {#memory_int=|v_#memory_int_6|} OutVars{#memory_int=|v_#memory_int_6|} AuxVars[] AssignedVars[] 31768#[L12-3]don't care [297] L12-3-->L12-4: Formula: (and (= (select |v_#valid_10| 2) 1) (= (select |v_#length_5| 2) 10)) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 31770#[L12-4]don't care [285] L12-4-->L684: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 32786#[L684]don't care [220] L684-->L685: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0] 33408#[L685]don't care [245] L685-->L685-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 33410#[L685-1]don't care [288] L685-1-->L686: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 33430#[L686]don't care [321] L686-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 33316#[L-1-3]don't care [312] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 31282#[L-1-4]don't care [284] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 31284#[L-1-5]don't care [244] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 32380#[L-1-6]don't care [282] L-1-6-->L740: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_4|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|, ULTIMATE.start_main_#t~mem7#1=|v_ULTIMATE.start_main_#t~mem7#1_3|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_#t~nondet6#1=|v_ULTIMATE.start_main_#t~nondet6#1_2|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~mem7#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet6#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 32382#[L740]don't care [286] L740-->L740-1: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) (= (store |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 1) |v_#valid_11|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_5| 0)) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t1~0#1.base_5| 4)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_6|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 33198#[L740-1]don't care [293] L740-1-->L740-2: Formula: (and (= |v_#valid_13| (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_6| 0)) (= |v_#length_8| (store |v_#length_9| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 4)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) (= (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 0) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 33080#[L740-2]don't care [263] L740-2-->L741: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 31780#[L741]don't care [298] L741-->L741-1: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 31782#[L741-1]don't care [294] L741-1-->L741-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_6|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_6| 4) (select |v_#length_10| |v_ULTIMATE.start_main_~#t1~0#1.base_6|)) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) |v_ULTIMATE.start_main_~#t1~0#1.offset_6| |v_ULTIMATE.start_main_#t~pre3#1_4|)) |v_#memory_int_7|) (= (select |v_#valid_15| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) 1)) InVars {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} OutVars{#valid=|v_#valid_15|, #memory_int=|v_#memory_int_7|, #length=|v_#length_10|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[#memory_int] 32974#[L741-2]don't care [401] L741-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre3#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 32976#[thr1ENTRY, L741-3]don't care [362] thr1ENTRY-->L688loopEntry: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 33064#[L688loopEntry, L741-3]don't care [363] L688loopEntry-->L701-3: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 33370#[L701-3, L741-3]don't care [283] L741-3-->L741-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 31024#[L741-4, L701-3]don't care [366] L701-3-->L689: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 30978#[L689, L741-4]don't care [368] L689-->L690: Formula: (= v_~b1~0_3 1) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0] 30980#[L741-4, L690]don't care [371] L690-->L691: Formula: (= v_~x~0_5 1) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 32534#[L741-4, L691]don't care [375] L691-->L696: Formula: (= v_~y~0_19 0) InVars {~y~0=v_~y~0_19} OutVars{~y~0=v_~y~0_19} AuxVars[] AssignedVars[] 33348#[L696, L741-4]don't care [379] L696-->L697: Formula: (= v_~y~0_20 1) InVars {} OutVars{~y~0=v_~y~0_20} AuxVars[] AssignedVars[~y~0] 33196#[L697, L741-4]don't care [239] L741-4-->L742: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet4#1] 31290#[L742, L697]don't care [274] L742-->L742-1: Formula: (= |v_ULTIMATE.start_main_#t~pre5#1_1| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_1|, #pthreadsForks=|v_#pthreadsForks_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1] 31750#[L697, L742-1]don't care [278] L742-1-->L742-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 32256#[L697, L742-2]don't care [238] L742-2-->L742-3: Formula: (and (= (select |v_#valid_1| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) |v_ULTIMATE.start_main_~#t2~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre5#1_2|)) |v_#memory_int_1|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (select |v_#length_1| |v_ULTIMATE.start_main_~#t2~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|)) InVars {ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[#memory_int] 32536#[L697, L742-3]don't care [398] L742-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre5#1_6| v_thr2Thread1of1ForFork0_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_6|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_6|, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 32538#[thr2ENTRY, L697, L742-4]don't care [328] thr2ENTRY-->L714loopEntry: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 31732#[L714loopEntry, L697, L742-4]don't care [329] L714loopEntry-->L727-3: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 31736#[L727-3, L697, L742-4]don't care [332] L727-3-->L715: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 32444#[L715, L697, L742-4]don't care [334] L715-->L716: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0] 32236#[L716, L697, L742-4]don't care [337] L716-->L717: Formula: (= 2 v_~x~0_2) InVars {} OutVars{~x~0=v_~x~0_2} AuxVars[] AssignedVars[~x~0] 32238#[L717, L697, L742-4]don't care [384] L697-->L698: Formula: (not (= v_~x~0_6 1)) InVars {~x~0=v_~x~0_6} OutVars{~x~0=v_~x~0_6} AuxVars[] AssignedVars[] 33184#[L717, L698, L742-4]don't care [387] L698-->L699-2: Formula: (= v_~b1~0_6 0) InVars {} OutVars{~b1~0=v_~b1~0_6} AuxVars[] AssignedVars[~b1~0] 31396#[L717, L699-2, L742-4]don't care [2022-07-22 11:39:55,356 INFO L750 eck$LassoCheckResult]: Loop: 31396#[L717, L699-2, L742-4]don't care [390] L699-2-->L699-2: Formula: (<= 1 v_~b2~0_6) InVars {~b2~0=v_~b2~0_6} OutVars{~b2~0=v_~b2~0_6} AuxVars[] AssignedVars[] 31396#[L717, L699-2, L742-4]don't care [2022-07-22 11:39:55,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:55,356 INFO L85 PathProgramCache]: Analyzing trace with hash 1706553674, now seen corresponding path program 1 times [2022-07-22 11:39:55,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:55,357 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665811928] [2022-07-22 11:39:55,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:55,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:55,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:55,399 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:55,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:55,419 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:55,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:55,420 INFO L85 PathProgramCache]: Analyzing trace with hash 421, now seen corresponding path program 2 times [2022-07-22 11:39:55,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:55,421 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1772672798] [2022-07-22 11:39:55,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:55,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:55,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:55,425 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:55,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:55,428 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:55,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:55,429 INFO L85 PathProgramCache]: Analyzing trace with hash 1363556732, now seen corresponding path program 1 times [2022-07-22 11:39:55,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:55,430 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457088314] [2022-07-22 11:39:55,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:55,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:55,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:55,449 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:55,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:55,469 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:56,591 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 22.07 11:39:56 BoogieIcfgContainer [2022-07-22 11:39:56,592 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2022-07-22 11:39:56,593 INFO L158 Benchmark]: Toolchain (without parser) took 6055.19ms. Allocated memory was 151.0MB in the beginning and 185.6MB in the end (delta: 34.6MB). Free memory was 124.4MB in the beginning and 105.9MB in the end (delta: 18.5MB). Peak memory consumption was 106.1MB. Max. memory is 8.0GB. [2022-07-22 11:39:56,593 INFO L158 Benchmark]: CDTParser took 0.27ms. Allocated memory is still 151.0MB. Free memory was 122.4MB in the beginning and 121.9MB in the end (delta: 435.2kB). There was no memory consumed. Max. memory is 8.0GB. [2022-07-22 11:39:56,594 INFO L158 Benchmark]: CACSL2BoogieTranslator took 564.70ms. Allocated memory is still 151.0MB. Free memory was 124.3MB in the beginning and 105.3MB in the end (delta: 18.9MB). Peak memory consumption was 18.9MB. Max. memory is 8.0GB. [2022-07-22 11:39:56,595 INFO L158 Benchmark]: Boogie Procedure Inliner took 91.86ms. Allocated memory is still 151.0MB. Free memory was 105.3MB in the beginning and 103.4MB in the end (delta: 1.9MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-07-22 11:39:56,596 INFO L158 Benchmark]: Boogie Preprocessor took 69.72ms. Allocated memory is still 151.0MB. Free memory was 103.4MB in the beginning and 101.9MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-07-22 11:39:56,596 INFO L158 Benchmark]: RCFGBuilder took 623.38ms. Allocated memory is still 151.0MB. Free memory was 101.9MB in the beginning and 120.8MB in the end (delta: -18.9MB). Peak memory consumption was 5.7MB. Max. memory is 8.0GB. [2022-07-22 11:39:56,597 INFO L158 Benchmark]: BuchiAutomizer took 4691.64ms. Allocated memory was 151.0MB in the beginning and 185.6MB in the end (delta: 34.6MB). Free memory was 120.8MB in the beginning and 105.9MB in the end (delta: 14.9MB). Peak memory consumption was 101.4MB. Max. memory is 8.0GB. [2022-07-22 11:39:56,601 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27ms. Allocated memory is still 151.0MB. Free memory was 122.4MB in the beginning and 121.9MB in the end (delta: 435.2kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 564.70ms. Allocated memory is still 151.0MB. Free memory was 124.3MB in the beginning and 105.3MB in the end (delta: 18.9MB). Peak memory consumption was 18.9MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 91.86ms. Allocated memory is still 151.0MB. Free memory was 105.3MB in the beginning and 103.4MB in the end (delta: 1.9MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 69.72ms. Allocated memory is still 151.0MB. Free memory was 103.4MB in the beginning and 101.9MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 623.38ms. Allocated memory is still 151.0MB. Free memory was 101.9MB in the beginning and 120.8MB in the end (delta: -18.9MB). Peak memory consumption was 5.7MB. Max. memory is 8.0GB. * BuchiAutomizer took 4691.64ms. Allocated memory was 151.0MB in the beginning and 185.6MB in the end (delta: 34.6MB). Free memory was 120.8MB in the beginning and 105.9MB in the end (delta: 14.9MB). Peak memory consumption was 101.4MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 5 terminating modules (5 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.5 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 1401 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 4.4s and 6 iterations. TraceHistogramMax:1. Analysis of lassos took 2.1s. Construction of modules took 0.1s. Büchi inclusion checks took 1.2s. Highest rank in rank-based complementation 0. Minimization of det autom 5. Minimization of nondet autom 0. Automata minimization 0.5s AutomataMinimizationTime, 5 MinimizatonAttempts, 611 StatesRemovedByMinimization, 2 NontrivialMinimizations. Non-live state removal took 0.3s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 188 SdHoareTripleChecker+Valid, 0.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 188 mSDsluCounter, 775 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 267 mSDsCounter, 22 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 87 IncrementalHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 22 mSolverCounterUnsat, 519 mSDtfsCounter, 87 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI2 SFLT0 conc0 concLT0 SILN3 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.1s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 699]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result=0, \result={0:0}, \result={0:0}, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=0, b2=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@53325e41 in51998,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@7892c76 in0,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@5929f54e=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@d561a49=0, t1={9797:0}, t2={3:0}, X=0, x=2, y=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 699]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L684] 0 int x, y; [L685] 0 int b1, b2; [L686] 0 int X; [L740] 0 pthread_t t1, t2; [L741] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) [L688] COND TRUE 1 1 [L689] 1 b1 = 1 [L690] 1 x = 1 [L691] COND FALSE 1 !(y != 0) [L696] 1 y = 1 [L742] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) [L714] COND TRUE 2 1 [L715] 2 b2 = 1 [L716] 2 x = 2 [L697] COND TRUE 1 x != 1 [L698] 1 b1 = 0 Loop: [L699] COND TRUE b2 >= 1 End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2022-07-22 11:39:56,680 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...